[llvm] [MachineCSE][AArch64] Coalesce subregister copies behind an opt-in target hook (PR #224593)

[Sjoerd Meijer via llvm-commits]

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@@ -291,7 +291,8 @@ define i64 @smull_ldrsw_shift(ptr %x0, i64 %x1) {
 ; CHECK-LABEL: smull_ldrsw_shift:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    ldrsw x8, [x0]
-; CHECK-NEXT:    smull x0, w8, w1
+; CHECK-NEXT:    sxtw x9, w1
+; CHECK-NEXT:    smull x0, w8, w9
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sjoerdmeijer wrote:

Yeah, this, and also this would include extra MOVs otherwise the codegen will be wrong but it is just that those tests don't show the full changes:

> but if you are looking at test changes then those are purely because RA chose different registers now.

https://github.com/llvm/llvm-project/pull/224593