[clang] [llvm] [clang][NVPTX] Add overloaded fmul intrinsics (PR #224546)

[Durgadoss R via llvm-commits]

================
@@ -1403,29 +1403,65 @@ PTX instruction. The supported combinations are:
      - None
 ```
 
-#### '`llvm.nvvm.mul.*`' Half-precision Intrinsics
+#### '`llvm.nvvm.fmul.*`' Intrinsics
 
 ##### Syntax:
 
-```llvm
-declare half @llvm.nvvm.mul.rn.sat.f16(half %a, half %b)
-declare <2 x half> @llvm.nvvm.mul.rn.sat.v2f16(<2 x half> %a, <2 x half> %b)
+This is an overloaded intrinsic. The '`.ftz`' and '`.sat`' modifiers are
+optional.
 
-declare half @llvm.nvvm.mul.rn.ftz.sat.f16(half %a, half %b)
-declare <2 x half> @llvm.nvvm.mul.rn.ftz.sat.v2f16(<2 x half> %a, <2 x half> %b)
+```llvm
+declare half         @llvm.nvvm.fmul{.ftz}{.sat}.f16(half %a, half %b, i32 immarg %rnd)
+declare <2 x half>   @llvm.nvvm.fmul{.ftz}{.sat}.v2f16(<2 x half> %a, <2 x half> %b, i32 immarg %rnd)
----------------
durga4github wrote:

For flag arguments, we follow a naming convention like `flag_<suffix-name>`. (you can refer TMA/MMA intrinsics for reference). Can we have the same here?
```
flag_fp_rnd_mode
flag_rnd_mode
```
etc..

https://github.com/llvm/llvm-project/pull/224546