[llvm] [AMDGPU][InstCombine] Add dot zero/constant folding tests. NFC (PR #225001)

[Harrison Hao via llvm-commits]

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@@ -0,0 +1,616 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=instcombine -mtriple=amdgpu12.00 %s | FileCheck %s
+
+define i32 @sdot2_add(<2 x i16> %a, <2 x i16> %b) {
+; CHECK-LABEL: define i32 @sdot2_add(
+; CHECK-SAME: <2 x i16> [[A:%.*]], <2 x i16> [[B:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> [[A]], <2 x i16> [[B]], i32 7, i1 false)
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> %a, <2 x i16> %b, i32 7, i1 false)
+  %r = add i32 %dot, 9
+  ret i32 %r
+}
+
+define i32 @sdot2_sub(<2 x i16> %a, <2 x i16> %b) {
+; CHECK-LABEL: define i32 @sdot2_sub(
+; CHECK-SAME: <2 x i16> [[A:%.*]], <2 x i16> [[B:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> [[A]], <2 x i16> [[B]], i32 7, i1 false)
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[DOT]], -1
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> %a, <2 x i16> %b, i32 7, i1 false)
+  %r = sub i32 %dot, 1
+  ret i32 %r
+}
+
+define i32 @sdot2_a_zero(<2 x i16> %b) {
+; CHECK-LABEL: define i32 @sdot2_a_zero(
+; CHECK-SAME: <2 x i16> [[B:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> zeroinitializer, <2 x i16> [[B]], i32 7, i1 false)
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> zeroinitializer, <2 x i16> %b, i32 7, i1 false)
+  %r = add i32 %dot, 9
+  ret i32 %r
+}
+
+define i32 @sdot2_const_lhs(<2 x i16> %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sdot2_const_lhs(
+; CHECK-SAME: <2 x i16> [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> zeroinitializer, <2 x i16> [[B]], i32 [[ACC]], i1 false)
+; CHECK-NEXT:    ret i32 [[DOT]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> zeroinitializer, <2 x i16> %b, i32 %acc, i1 false)
+  ret i32 %dot
+}
+
+define i32 @sdot2_b_zero(<2 x i16> %a) {
+; CHECK-LABEL: define i32 @sdot2_b_zero(
+; CHECK-SAME: <2 x i16> [[A:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> [[A]], <2 x i16> zeroinitializer, i32 7, i1 false)
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> %a, <2 x i16> zeroinitializer, i32 7, i1 false)
+  %r = add i32 %dot, 9
+  ret i32 %r
+}
+
+define i32 @sdot2_const_nonzero(<2 x i16> %a, <2 x i16> %b) {
+; CHECK-LABEL: define i32 @sdot2_const_nonzero(
+; CHECK-SAME: <2 x i16> [[A:%.*]], <2 x i16> [[B:%.*]]) {
+; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sdot2(<2 x i16> splat (i16 1), <2 x i16> splat (i16 2), i32 7, i1 false)
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %dot = call i32 @llvm.amdgcn.sdot2(<2 x i16> <i16 1, i16 1>, <2 x i16> <i16 2, i16 2>, i32 7, i1 false)
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harrisonGPU wrote:

Thanks, I have updated.

https://github.com/llvm/llvm-project/pull/225001