[llvm] [AArch64][NeoverseV1/V2] Fix ASIMD FP convert and round scheduling (PR #224046)

[Asher Dobrescu via llvm-commits]

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@@ -1030,33 +1029,33 @@ def : InstRW<[V1Write_3c_1V02], (instregex "^FCVTNv[24]i32$",
 
 // ASIMD FP convert, other, D-form F32 and Q-form F64
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Asher8118 wrote:

NIT: This group now contains H and S forms as well, but the comment does not show that. Could it please be updated?

https://github.com/llvm/llvm-project/pull/224046