[llvm] [CodeGen] computeRegisterProperties - fix `bf16` to `i16` bitcast quieting NaNs (PR #224867)

[Folkert de Vries via llvm-commits]

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@@ -78,19 +78,12 @@ define void @phi_vec1bf16_to_f32(ptr addrspace(1) %src, ptr addrspace(1) %dst) #
 ; CHECK-NEXT:    s_mov_b32 s4, s6
 ; CHECK-NEXT:    s_mov_b32 s5, s6
 ; CHECK-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64
-; CHECK-NEXT:    s_mov_b32 s4, 0xffff
-; CHECK-NEXT:    s_waitcnt vmcnt(0)
-; CHECK-NEXT:    v_and_b32_e64 v0, v0, s4
-; CHECK-NEXT:    s_mov_b32 s4, 16
-; CHECK-NEXT:    v_lshlrev_b32_e64 v0, s4, v0
 ; CHECK-NEXT:  ; %bb.1: ; %bb
-; CHECK-NEXT:    v_mul_f32_e64 v0, 1.0, v0
-; CHECK-NEXT:    s_mov_b32 s4, 16
-; CHECK-NEXT:    v_lshrrev_b32_e64 v0, s4, v0
 ; CHECK-NEXT:    s_mov_b32 s7, 0xf000
 ; CHECK-NEXT:    s_mov_b32 s6, 0
 ; CHECK-NEXT:    s_mov_b32 s4, s6
 ; CHECK-NEXT:    s_mov_b32 s5, s6
+; CHECK-NEXT:    s_waitcnt vmcnt(0)
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folkertdev wrote:

@arsenm amdgpu assembly is a bit of a mystery to me, but here there are some explicit `f32` instructions used that both aren't needed, and cannot be used, on `i16`.

Also amdgpu apparently just works with `bf16` a lot.

https://github.com/llvm/llvm-project/pull/224867