[llvm] [AArch64MIPeepholeOpt] Coalesce sibling base-address materializations (PR #223682)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 21 04:33:03 PDT 2026
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@@ -0,0 +1,101 @@
+# RUN: llc -mtriple=aarch64 -run-pass=aarch64-mi-peephole-opt \
+# RUN: -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=SHARED
+# RUN: llc -mtriple=aarch64 -run-pass=aarch64-mi-peephole-opt \
+# RUN: -aarch64-base-address-cse=0 -o - %s | FileCheck %s --check-prefix=NOBASECSE
+
+--- |
+ define void @share_sub_i32(ptr %p) { ret void }
+ define void @share_sub_i32_3sibling(ptr %p) { ret void }
+ define void @share_add_i64(ptr %p) { ret void }
+...
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davemgreen wrote:
This can usually be removed.
https://github.com/llvm/llvm-project/pull/223682
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