[llvm] [LV] Trim VFs that cause vector splitting when tail-folding with EVL (PR #222836)

[Luke Lau via llvm-commits]

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@@ -332,38 +332,38 @@ define i32 @chained_reduce_iv_derived_first_link(ptr %c, ptr %d, i64 %N) #0 {
 ; MAXBW-NEXT:  [[ENTRY:.*:]]
 ; MAXBW-NEXT:    br label %[[VECTOR_PH:.*]]
 ; MAXBW:       [[VECTOR_PH]]:
-; MAXBW-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.stepvector.nxv16i8()
+; MAXBW-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
 ; MAXBW-NEXT:    br label %[[VECTOR_BODY:.*]]
 ; MAXBW:       [[VECTOR_BODY]]:
 ; MAXBW-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; MAXBW-NEXT:    [[VEC_PHI:%.*]] = phi <vscale x 4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE2:%.*]], %[[VECTOR_BODY]] ]
-; MAXBW-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 16 x i8> [ [[TMP0]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; MAXBW-NEXT:    [[VEC_PHI:%.*]] = phi <vscale x 2 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE2:%.*]], %[[VECTOR_BODY]] ]
+; MAXBW-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 8 x i8> [ [[TMP0]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
 ; MAXBW-NEXT:    [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; MAXBW-NEXT:    [[TMP1:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 16, i1 true)
+; MAXBW-NEXT:    [[TMP1:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 8, i1 true)
 ; MAXBW-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
 ; MAXBW-NEXT:    [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
-; MAXBW-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[TMP3]], i64 0
-; MAXBW-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[BROADCAST_SPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
-; MAXBW-NEXT:    [[TMP4:%.*]] = sext <vscale x 16 x i8> [[VEC_IND]] to <vscale x 16 x i32>
-; MAXBW-NEXT:    [[TMP5:%.*]] = mul <vscale x 16 x i32> [[TMP4]], [[TMP4]]
-; MAXBW-NEXT:    [[TMP6:%.*]] = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 true), <vscale x 16 x i32> [[TMP5]], <vscale x 16 x i32> zeroinitializer, i32 [[TMP1]])
-; MAXBW-NEXT:    [[PARTIAL_REDUCE:%.*]] = call <vscale x 4 x i32> @llvm.vector.partial.reduce.add.nxv4i32.nxv16i32(<vscale x 4 x i32> [[VEC_PHI]], <vscale x 16 x i32> [[TMP6]])
----------------
lukel97 wrote:

I don't think we end up splitting this type here. llc seems to be able to lower the existing partial reduction without splitting:

```asm
.LBB0_1:                                # %vector.body
                                        # =>This Inner Loop Header: Depth=1
	vmv2r.v	v14, v12
	vsetvli	a4, a2, e8, m2, tu, ma
	vmv.v.v	v14, v10
	add	a5, a0, a3
	vsetvli	a6, zero, e32, m2, ta, ma
	vdot4a.vv	v8, v10, v14
	vsetvli	zero, a2, e8, m2, ta, ma
	vle8.v	v14, (a5)
	vmv2r.v	v16, v12
	add	a5, a1, a3
	vsetvli	zero, zero, e8, m2, tu, ma
	vle8.v	v16, (a5)
	vsetvli	a5, zero, e32, m2, ta, ma
	vdot4a.vv	v8, v14, v16
	vsetvli	a5, zero, e8, m2, ta, ma
	vadd.vx	v10, v10, a4
	sub	a2, a2, a4
	add	a3, a4, a3
	bnez	a2, .LBB0_1
```

as a side observation, we need to teach RISCVVLOptimizer about vdot4a

https://github.com/llvm/llvm-project/pull/222836