[llvm] [CostModel][X86] Improve vXi1 mask broadcast cost handling (PR #222467)

[Dmitry Sidorov via llvm-commits]

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@@ -0,0 +1,95 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl,+fast-variable-crosslane-shuffle | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mattr=+avx512f,+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle | FileCheck %s --check-prefixes=CHECK,X64-NODQ
+; RUN: opt < %s -mtriple=i386-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl,+fast-variable-crosslane-shuffle | FileCheck %s --check-prefixes=CHECK,X86
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MrSidims wrote:

It covers the costs that depend on the function's vector width attributes and on 32-bit mode, e.g. a v64i1 splat with min-legal-vector-width <= 256 can't use 512-bit registers and goes through a GPR instead. Neither of those files sets these attributes or has a 32-bit run, so they can't reach those paths. 

https://github.com/llvm/llvm-project/pull/222467