[llvm] [GVN] Handle value-preserving stores in MSSA-based load elimination (PR #223793)
Antonio Frighetto via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 21 02:46:39 PDT 2026
https://github.com/antoniofrighetto updated https://github.com/llvm/llvm-project/pull/223793
>From 681a8e304ee0ee6174bb7122971d29e15252edde Mon Sep 17 00:00:00 2001
From: Antonio Frighetto <me at antoniofrighetto.com>
Date: Tue, 15 Sep 2026 17:26:39 +0200
Subject: [PATCH 1/2] [GVN] Regenerate check lines (NFC)
---
.../Transforms/GVN/rle-clobbering-store.ll | 120 ++++++++++++++----
1 file changed, 95 insertions(+), 25 deletions(-)
diff --git a/llvm/test/Transforms/GVN/rle-clobbering-store.ll b/llvm/test/Transforms/GVN/rle-clobbering-store.ll
index b60f6c323d42d..fd2473bc2a2d2 100644
--- a/llvm/test/Transforms/GVN/rle-clobbering-store.ll
+++ b/llvm/test/Transforms/GVN/rle-clobbering-store.ll
@@ -1,13 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt < %s -passes=gvn -S | FileCheck %s
+; RUN: opt < %s -passes=gvn -S | FileCheck %s --check-prefixes=CHECK,MEMDEP
+; RUN: opt < %s -passes='gvn<memoryssa>' -S | FileCheck %s --check-prefixes=CHECK,MSSA
define i1 @test_i1(ptr %a, ptr %b, ptr %c) {
-; CHECK-LABEL: define i1 @test_i1(
-; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
-; CHECK-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
-; CHECK-NEXT: ret i1 [[TMP0]]
+; MEMDEP-LABEL: define i1 @test_i1(
+; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MEMDEP-NEXT: entry:
+; MEMDEP-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
+; MEMDEP-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
+; MEMDEP-NEXT: ret i1 [[TMP0]]
+;
+; MSSA-LABEL: define i1 @test_i1(
+; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MSSA-NEXT: entry:
+; MSSA-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
+; MSSA-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
+; MSSA-NEXT: [[TMP1:%.*]] = load i1, ptr [[A]], align 1
+; MSSA-NEXT: ret i1 [[TMP1]]
;
entry:
%0 = load i1, ptr %a, align 1
@@ -17,12 +26,20 @@ entry:
}
define i8 @test_i8(ptr %a, ptr %b, ptr %c) {
-; CHECK-LABEL: define i8 @test_i8(
-; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-; CHECK-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
-; CHECK-NEXT: ret i8 [[TMP0]]
+; MEMDEP-LABEL: define i8 @test_i8(
+; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MEMDEP-NEXT: entry:
+; MEMDEP-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
+; MEMDEP-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
+; MEMDEP-NEXT: ret i8 [[TMP0]]
+;
+; MSSA-LABEL: define i8 @test_i8(
+; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MSSA-NEXT: entry:
+; MSSA-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
+; MSSA-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
+; MSSA-NEXT: [[TMP1:%.*]] = load i8, ptr [[A]], align 1
+; MSSA-NEXT: ret i8 [[TMP1]]
;
entry:
%0 = load i8, ptr %a, align 1
@@ -32,12 +49,20 @@ entry:
}
define i32 @test_i32(ptr %a, ptr %b, ptr %c) {
-; CHECK-LABEL: define i32 @test_i32(
-; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
-; CHECK-NEXT: ret i32 [[TMP0]]
+; MEMDEP-LABEL: define i32 @test_i32(
+; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MEMDEP-NEXT: entry:
+; MEMDEP-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
+; MEMDEP-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
+; MEMDEP-NEXT: ret i32 [[TMP0]]
+;
+; MSSA-LABEL: define i32 @test_i32(
+; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MSSA-NEXT: entry:
+; MSSA-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
+; MSSA-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
+; MSSA-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
+; MSSA-NEXT: ret i32 [[TMP1]]
;
entry:
%0 = load i32, ptr %a, align 4
@@ -47,12 +72,20 @@ entry:
}
define float @test_float(ptr %a, ptr %b, ptr %c) {
-; CHECK-LABEL: define float @test_float(
-; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
-; CHECK-NEXT: store float [[TMP0]], ptr [[B]], align 4
-; CHECK-NEXT: ret float [[TMP0]]
+; MEMDEP-LABEL: define float @test_float(
+; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MEMDEP-NEXT: entry:
+; MEMDEP-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
+; MEMDEP-NEXT: store float [[TMP0]], ptr [[B]], align 4
+; MEMDEP-NEXT: ret float [[TMP0]]
+;
+; MSSA-LABEL: define float @test_float(
+; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; MSSA-NEXT: entry:
+; MSSA-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
+; MSSA-NEXT: store float [[TMP0]], ptr [[B]], align 4
+; MSSA-NEXT: [[TMP1:%.*]] = load float, ptr [[A]], align 4
+; MSSA-NEXT: ret float [[TMP1]]
;
entry:
%0 = load float, ptr %a, align 4
@@ -126,3 +159,40 @@ entry:
%1 = load atomic i32, ptr %a unordered, align 4
ret i32 %1
}
+
+define i32 @test_nonlocal(i1 %c, ptr %a, ptr %b) {
+; MEMDEP-LABEL: define i32 @test_nonlocal(
+; MEMDEP-SAME: i1 [[C:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {
+; MEMDEP-NEXT: entry:
+; MEMDEP-NEXT: [[VAL:%.*]] = load i32, ptr [[A]], align 4
+; MEMDEP-NEXT: store i32 [[VAL]], ptr [[B]], align 4
+; MEMDEP-NEXT: br i1 [[C]], label [[OTHER:%.*]], label [[EXIT:%.*]]
+; MEMDEP: other:
+; MEMDEP-NEXT: ret i32 1
+; MEMDEP: exit:
+; MEMDEP-NEXT: ret i32 [[VAL]]
+;
+; MSSA-LABEL: define i32 @test_nonlocal(
+; MSSA-SAME: i1 [[C:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {
+; MSSA-NEXT: entry:
+; MSSA-NEXT: [[VAL:%.*]] = load i32, ptr [[A]], align 4
+; MSSA-NEXT: store i32 [[VAL]], ptr [[B]], align 4
+; MSSA-NEXT: br i1 [[C]], label [[OTHER:%.*]], label [[EXIT:%.*]]
+; MSSA: other:
+; MSSA-NEXT: ret i32 1
+; MSSA: exit:
+; MSSA-NEXT: [[REUSE:%.*]] = load i32, ptr [[A]], align 4
+; MSSA-NEXT: ret i32 [[REUSE]]
+;
+entry:
+ %val = load i32, ptr %a, align 4
+ store i32 %val, ptr %b, align 4
+ br i1 %c, label %other, label %exit
+
+other:
+ ret i32 1
+
+exit:
+ %reuse = load i32, ptr %a, align 4
+ ret i32 %reuse
+}
>From 89c241ab8e9aad2a063ec09b6dd9e902d23b0ba3 Mon Sep 17 00:00:00 2001
From: Antonio Frighetto <me at antoniofrighetto.com>
Date: Tue, 15 Sep 2026 17:51:46 +0200
Subject: [PATCH 2/2] [GVN] Handle value-preserving stores in MSSA-based load
elimination
Following up on #68322, extend the MemorySSA-based redundant load
elimination path to recognize stores that write back a value previously
loaded from the same location. If nothing modifies the memory location
in between, such stores may be treated as non-clobbering, and the
subsequent load may be redundant.
---
llvm/include/llvm/Transforms/Scalar/GVN.h | 4 +-
llvm/lib/Transforms/Scalar/GVN.cpp | 23 ++--
.../Transforms/GVN/rle-clobbering-store.ll | 116 ++++++------------
3 files changed, 54 insertions(+), 89 deletions(-)
diff --git a/llvm/include/llvm/Transforms/Scalar/GVN.h b/llvm/include/llvm/Transforms/Scalar/GVN.h
index 19a9113f7ffaa..3867afffbf550 100644
--- a/llvm/include/llvm/Transforms/Scalar/GVN.h
+++ b/llvm/include/llvm/Transforms/Scalar/GVN.h
@@ -424,8 +424,8 @@ class GVNPass : public OptionalPassInfoMixin<GVNPass> {
std::optional<GVNPass::ReachingMemVal>
accessMayModifyLocation(MemoryAccess *ClobberMA, const MemoryLocation &Loc,
- bool IsInvariantLoad, BasicBlock *BB, MemorySSA &MSSA,
- BatchAAResults &AA);
+ Align LoadAlign, bool IsInvariantLoad, BasicBlock *BB,
+ MemorySSA &MSSA, BatchAAResults &AA);
bool collectPredecessors(BasicBlock *BB, const PHITransAddr &Addr,
MemoryAccess *ClobberMA, DependencyBlockSet &Blocks,
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp
index 7eee9a7b164aa..a9392998ede75 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -2402,8 +2402,8 @@ std::optional<GVNPass::ReachingMemVal> GVNPass::scanMemoryAccessesUsers(
/// Check if a given MemoryAccess (usually a MemoryDef) actually modifies a
/// given location. Returns a ReachingMemVal describing the dependency.
std::optional<GVNPass::ReachingMemVal> GVNPass::accessMayModifyLocation(
- MemoryAccess *ClobberMA, const MemoryLocation &Loc, bool IsInvariantLoad,
- BasicBlock *BB, MemorySSA &MSSA, BatchAAResults &AA) {
+ MemoryAccess *ClobberMA, const MemoryLocation &Loc, Align LoadAlign,
+ bool IsInvariantLoad, BasicBlock *BB, MemorySSA &MSSA, BatchAAResults &AA) {
assert(ClobberMA->getBlock() == BB);
// If the clobbering access is the entry memory state, we cannot say anything
@@ -2450,6 +2450,13 @@ std::optional<GVNPass::ReachingMemVal> GVNPass::accessMayModifyLocation(
if (!ClobberI->isAtomic() && isa<LoadInst>(ClobberI))
return std::nullopt;
+ // A store that writes back a value already at the memory location leaves
+ // the latter unchanged.
+ if (auto *SI = dyn_cast<StoreInst>(ClobberI))
+ if (isStorePreservingMemoryLocation(SI, Loc, LoadAlign, AA,
+ MaxNumInsnsPerBlock))
+ return std::nullopt;
+
if (AR == AliasResult::MayAlias ||
(AR == AliasResult::PartialAlias &&
(!AR.hasOffset() || AR.getOffset() < 0)))
@@ -2648,8 +2655,9 @@ bool GVNPass::findReachingValuesForLoad(LoadInst *L,
break;
// Check if the clobber actually aliases the load location.
- if (auto RMV = accessMayModifyLocation(ClobberMA, Loc, IsInvariantLoad,
- StartBlock, MSSA, AA)) {
+ if (auto RMV =
+ accessMayModifyLocation(ClobberMA, Loc, L->getAlign(),
+ IsInvariantLoad, StartBlock, MSSA, AA)) {
Values.emplace_back(*RMV);
return true;
}
@@ -2696,9 +2704,10 @@ bool GVNPass::findReachingValuesForLoad(LoadInst *L,
// predecessors of this block further, continue with the blocks in the
// worklist.
if (Info.ClobberMA->getBlock() == BB && !isa<MemoryPhi>(Info.ClobberMA)) {
- if (auto RMV = accessMayModifyLocation(
- Info.ClobberMA, Loc.getWithNewPtr(Info.Addr.getAddr()),
- IsInvariantLoad, BB, MSSA, AA)) {
+ const MemoryLocation BBLoc = Loc.getWithNewPtr(Info.Addr.getAddr());
+ if (auto RMV =
+ accessMayModifyLocation(Info.ClobberMA, BBLoc, L->getAlign(),
+ IsInvariantLoad, BB, MSSA, AA)) {
Info.MemVal = RMV;
continue;
}
diff --git a/llvm/test/Transforms/GVN/rle-clobbering-store.ll b/llvm/test/Transforms/GVN/rle-clobbering-store.ll
index fd2473bc2a2d2..3bfa09643e3ca 100644
--- a/llvm/test/Transforms/GVN/rle-clobbering-store.ll
+++ b/llvm/test/Transforms/GVN/rle-clobbering-store.ll
@@ -1,22 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt < %s -passes=gvn -S | FileCheck %s --check-prefixes=CHECK,MEMDEP
-; RUN: opt < %s -passes='gvn<memoryssa>' -S | FileCheck %s --check-prefixes=CHECK,MSSA
+; RUN: opt < %s -passes=gvn -S | FileCheck %s
+; RUN: opt < %s -passes='gvn<memoryssa>' -S | FileCheck %s
define i1 @test_i1(ptr %a, ptr %b, ptr %c) {
-; MEMDEP-LABEL: define i1 @test_i1(
-; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MEMDEP-NEXT: entry:
-; MEMDEP-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
-; MEMDEP-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
-; MEMDEP-NEXT: ret i1 [[TMP0]]
-;
-; MSSA-LABEL: define i1 @test_i1(
-; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MSSA-NEXT: entry:
-; MSSA-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
-; MSSA-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
-; MSSA-NEXT: [[TMP1:%.*]] = load i1, ptr [[A]], align 1
-; MSSA-NEXT: ret i1 [[TMP1]]
+; CHECK-LABEL: define i1 @test_i1(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i1, ptr [[A]], align 1
+; CHECK-NEXT: store i1 [[TMP0]], ptr [[B]], align 1
+; CHECK-NEXT: ret i1 [[TMP0]]
;
entry:
%0 = load i1, ptr %a, align 1
@@ -26,20 +18,12 @@ entry:
}
define i8 @test_i8(ptr %a, ptr %b, ptr %c) {
-; MEMDEP-LABEL: define i8 @test_i8(
-; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MEMDEP-NEXT: entry:
-; MEMDEP-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-; MEMDEP-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
-; MEMDEP-NEXT: ret i8 [[TMP0]]
-;
-; MSSA-LABEL: define i8 @test_i8(
-; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MSSA-NEXT: entry:
-; MSSA-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-; MSSA-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
-; MSSA-NEXT: [[TMP1:%.*]] = load i8, ptr [[A]], align 1
-; MSSA-NEXT: ret i8 [[TMP1]]
+; CHECK-LABEL: define i8 @test_i8(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
+; CHECK-NEXT: store i8 [[TMP0]], ptr [[B]], align 1
+; CHECK-NEXT: ret i8 [[TMP0]]
;
entry:
%0 = load i8, ptr %a, align 1
@@ -49,20 +33,12 @@ entry:
}
define i32 @test_i32(ptr %a, ptr %b, ptr %c) {
-; MEMDEP-LABEL: define i32 @test_i32(
-; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MEMDEP-NEXT: entry:
-; MEMDEP-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
-; MEMDEP-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
-; MEMDEP-NEXT: ret i32 [[TMP0]]
-;
-; MSSA-LABEL: define i32 @test_i32(
-; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MSSA-NEXT: entry:
-; MSSA-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
-; MSSA-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
-; MSSA-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
-; MSSA-NEXT: ret i32 [[TMP1]]
+; CHECK-LABEL: define i32 @test_i32(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: store i32 [[TMP0]], ptr [[B]], align 4
+; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%0 = load i32, ptr %a, align 4
@@ -72,20 +48,12 @@ entry:
}
define float @test_float(ptr %a, ptr %b, ptr %c) {
-; MEMDEP-LABEL: define float @test_float(
-; MEMDEP-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MEMDEP-NEXT: entry:
-; MEMDEP-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
-; MEMDEP-NEXT: store float [[TMP0]], ptr [[B]], align 4
-; MEMDEP-NEXT: ret float [[TMP0]]
-;
-; MSSA-LABEL: define float @test_float(
-; MSSA-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
-; MSSA-NEXT: entry:
-; MSSA-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
-; MSSA-NEXT: store float [[TMP0]], ptr [[B]], align 4
-; MSSA-NEXT: [[TMP1:%.*]] = load float, ptr [[A]], align 4
-; MSSA-NEXT: ret float [[TMP1]]
+; CHECK-LABEL: define float @test_float(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
+; CHECK-NEXT: store float [[TMP0]], ptr [[B]], align 4
+; CHECK-NEXT: ret float [[TMP0]]
;
entry:
%0 = load float, ptr %a, align 4
@@ -161,28 +129,16 @@ entry:
}
define i32 @test_nonlocal(i1 %c, ptr %a, ptr %b) {
-; MEMDEP-LABEL: define i32 @test_nonlocal(
-; MEMDEP-SAME: i1 [[C:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {
-; MEMDEP-NEXT: entry:
-; MEMDEP-NEXT: [[VAL:%.*]] = load i32, ptr [[A]], align 4
-; MEMDEP-NEXT: store i32 [[VAL]], ptr [[B]], align 4
-; MEMDEP-NEXT: br i1 [[C]], label [[OTHER:%.*]], label [[EXIT:%.*]]
-; MEMDEP: other:
-; MEMDEP-NEXT: ret i32 1
-; MEMDEP: exit:
-; MEMDEP-NEXT: ret i32 [[VAL]]
-;
-; MSSA-LABEL: define i32 @test_nonlocal(
-; MSSA-SAME: i1 [[C:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {
-; MSSA-NEXT: entry:
-; MSSA-NEXT: [[VAL:%.*]] = load i32, ptr [[A]], align 4
-; MSSA-NEXT: store i32 [[VAL]], ptr [[B]], align 4
-; MSSA-NEXT: br i1 [[C]], label [[OTHER:%.*]], label [[EXIT:%.*]]
-; MSSA: other:
-; MSSA-NEXT: ret i32 1
-; MSSA: exit:
-; MSSA-NEXT: [[REUSE:%.*]] = load i32, ptr [[A]], align 4
-; MSSA-NEXT: ret i32 [[REUSE]]
+; CHECK-LABEL: define i32 @test_nonlocal(
+; CHECK-SAME: i1 [[C:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: store i32 [[VAL]], ptr [[B]], align 4
+; CHECK-NEXT: br i1 [[C]], label [[OTHER:%.*]], label [[EXIT:%.*]]
+; CHECK: other:
+; CHECK-NEXT: ret i32 1
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[VAL]]
;
entry:
%val = load i32, ptr %a, align 4
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