[llvm] [LoopLoadElim] Fix miscompile caused by incorrect store-to-load forwarding across mixed-width clobbers (PR #224833)

[Hadong Lee via llvm-commits]

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@@ -0,0 +1,132 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=loop-load-elim -S < %s | FileCheck %s
+;
+; Do not forward across a partial clobber, but preserve forwarding when a
+; later full-width store overwrites the clobber.
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ChrisLee02 wrote:

https://github.com/llvm/llvm-project/pull/224833/commits/daefafd5d8849321b2f09c5ab81dbedcda798152

The test comment and PR description updated

https://github.com/llvm/llvm-project/pull/224833