[llvm] [Mips] Introduce ABI-specific register names and accessors (PR #224284)

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git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h llvm/lib/Target/Mips/MipsFastISel.cpp llvm/lib/Target/Mips/MipsISelLowering.cpp llvm/lib/Target/Mips/MipsISelLowering.h llvm/lib/Target/Mips/MipsMachineFunction.cpp llvm/lib/Target/Mips/MipsOptimizePICCall.cpp llvm/lib/Target/Mips/MipsRegisterInfo.cpp llvm/lib/Target/Mips/MipsSEFrameLowering.cpp llvm/lib/Target/Mips/MipsSEInstrInfo.cpp llvm/utils/TableGen/AsmMatcherEmitter.cpp --diff_from_common_commit
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diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
index e0a35fcd8..3f7a0c7f2 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
@@ -196,9 +196,7 @@ unsigned MipsABIInfo::GetFramePtr() const {
   return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
 }
 
-unsigned MipsABIInfo::GetBasePtr() const {
-  return getSavedRegPtr(7);
-}
+unsigned MipsABIInfo::GetBasePtr() const { return getSavedRegPtr(7); }
 
 unsigned MipsABIInfo::GetGlobalPtr() const {
   return ArePtrs64bit() ? Mips::GP_64 : Mips::GP;
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
index 2d16b8652..f583bde14 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
@@ -48,7 +48,8 @@ public:
   ArrayRef<MCPhysReg> getArgRegs(bool Is64Bit) const;
 
   /// ABI register accessors default to the ABI's GPR width. Use the *RegPtr
-  /// variants for pointer-sized values; N32 has 32-bit pointers and 64-bit GPRs.
+  /// variants for pointer-sized values; N32 has 32-bit pointers and 64-bit
+  /// GPRs.
   MCRegister getArgReg(unsigned I, bool Is64Bit) const;
   MCRegister getArgReg(unsigned I) const {
     return getArgReg(I, AreGprs64bit());

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https://github.com/llvm/llvm-project/pull/224284