[llvm] [SelectionDAG] Freeze dynamic vector indices lowered through the stack (PR #225031)
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Mon Sep 21 01:51:26 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: Mahmoud Naderi (slant14)
<details>
<summary>Changes</summary>
related to issue #<!-- -->224200
---
Full diff: https://github.com/llvm/llvm-project/pull/225031.diff
7 Files Affected:
- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+3)
- (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (+6)
- (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+3)
- (modified) llvm/test/CodeGen/X86/freeze-vector.ll (+181)
- (modified) llvm/test/CodeGen/X86/var-permute-128.ll (+39-29)
- (modified) llvm/test/CodeGen/X86/vecloadextract.ll (+4-2)
- (modified) llvm/test/CodeGen/X86/vector-extract-last-active.ll (+7-5)
``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d4a7403a6b25f..c6f842a1d2568 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -25358,6 +25358,9 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
if (!IsByteSized && Elmnt.getValueType().bitsLT(EltVT))
Elmnt = DAG.getNode(ISD::ANY_EXTEND, DL, EltVT, Elmnt);
+ // Freeze the index, as clamping a poison index would be meaningless.
+ Index = DAG.getFreeze(Index);
+
// Store the new element. This may be larger than the vector element
// type, so use a truncating store.
SDValue EltPtr =
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index dc3b589087421..844ffe455d8a1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -2295,6 +2295,9 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
}
}
+ // Freeze the index, as clamping a poison index would be meaningless.
+ Idx = DAG.getFreeze(Idx);
+
// Make the vector elements byte-addressable if they aren't already.
EVT VecVT = Vec.getValueType();
EVT EltVT = VecVT.getVectorElementType();
@@ -4358,6 +4361,9 @@ SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
if (CustomLowerNode(N, N->getValueType(0), true))
return SDValue();
+ // Freeze the index, as clamping a poison index would be meaningless.
+ Idx = DAG.getFreeze(Idx);
+
// Make the vector elements byte-addressable if they aren't already.
SDLoc dl(N);
EVT EltVT = VecVT.getVectorElementType();
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 6e559d91952f2..248302669ed1c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -14284,6 +14284,9 @@ SDValue TargetLowering::scalarizeExtractedVectorLoad(EVT ResultVT,
!IsFast)
return SDValue();
+ // Freeze EltNo, as clamping a poison index would be meaningless.
+ EltNo = DAG.getFreeze(EltNo);
+
// The original DAG loaded the entire vector from memory, so arithmetic
// within it must be inbounds.
SDValue NewPtr = getInboundsVectorElementPointer(
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 7062ace700512..54a9bdc851cdb 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -944,3 +944,184 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
%add = add <2 x i64> %ext, splat (i64 16)
ret <2 x i64> %add
}
+
+; A dynamic insert/extract that is legalized through a stack slot must freeze
+; the index before clamping it, or the clamp can be optimized away and the
+; store/load uses an unbounded offset.
+; https://github.com/llvm/llvm-project/issues/224200
+define void @freeze_dynamic_insertelement_wide_vector(ptr %vp, i32 %x, ptr %dst) nounwind {
+; X86-LABEL: freeze_dynamic_insertelement_wide_vector:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: andl $-32, %esp
+; X86-NEXT: subl $160, %esp
+; X86-NEXT: movl 16(%ebp), %eax
+; X86-NEXT: movl 8(%ebp), %ecx
+; X86-NEXT: vmovaps (%ecx), %ymm0
+; X86-NEXT: vmovaps 32(%ecx), %ymm1
+; X86-NEXT: vmovaps 64(%ecx), %ymm2
+; X86-NEXT: vmovaps 96(%ecx), %ymm3
+; X86-NEXT: bsrl 12(%ebp), %ecx
+; X86-NEXT: notl %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: vmovaps %ymm3, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm2, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm0, (%esp)
+; X86-NEXT: movl $5, (%esp,%ecx,4)
+; X86-NEXT: vmovaps (%esp), %ymm0
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm1
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm2
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm3
+; X86-NEXT: vmovaps %ymm3, 64(%eax)
+; X86-NEXT: vmovaps %ymm2, 96(%eax)
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vmovaps %ymm1, 32(%eax)
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
+;
+; X64-LABEL: freeze_dynamic_insertelement_wide_vector:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbp
+; X64-NEXT: movq %rsp, %rbp
+; X64-NEXT: andq $-32, %rsp
+; X64-NEXT: subq $160, %rsp
+; X64-NEXT: vmovaps (%rdi), %ymm0
+; X64-NEXT: vmovaps 32(%rdi), %ymm1
+; X64-NEXT: vmovaps 64(%rdi), %ymm2
+; X64-NEXT: vmovaps 96(%rdi), %ymm3
+; X64-NEXT: bsrl %esi, %eax
+; X64-NEXT: notl %eax
+; X64-NEXT: vmovaps %ymm3, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm2, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm0, (%rsp)
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: movl $5, (%rsp,%rax,4)
+; X64-NEXT: vmovaps (%rsp), %ymm0
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm1
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm2
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm3
+; X64-NEXT: vmovaps %ymm2, 64(%rdx)
+; X64-NEXT: vmovaps %ymm3, 96(%rdx)
+; X64-NEXT: vmovaps %ymm0, (%rdx)
+; X64-NEXT: vmovaps %ymm1, 32(%rdx)
+; X64-NEXT: movq %rbp, %rsp
+; X64-NEXT: popq %rbp
+; X64-NEXT: vzeroupper
+; X64-NEXT: retq
+ %v = load <32 x i32>, ptr %vp
+ %idx = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ %ins = insertelement <32 x i32> %v, i32 5, i32 %idx
+ store <32 x i32> %ins, ptr %dst
+ ret void
+}
+
+define i32 @freeze_dynamic_extractelement_wide_vector(ptr %vp, i32 %x) nounwind {
+; X86-LABEL: freeze_dynamic_extractelement_wide_vector:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: bsrl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: notl %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: movl (%eax,%ecx,4), %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: freeze_dynamic_extractelement_wide_vector:
+; X64: # %bb.0:
+; X64-NEXT: bsrl %esi, %eax
+; X64-NEXT: notl %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
+; X64-NEXT: retq
+ %v = load <32 x i32>, ptr %vp
+ %idx = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ %r = extractelement <32 x i32> %v, i32 %idx
+ ret i32 %r
+}
+
+define void @freeze_dynamic_insertelement_chain_wide_vector(ptr %vp, i32 %x, i32 %y, ptr %dst) nounwind {
+; X86-LABEL: freeze_dynamic_insertelement_chain_wide_vector:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: andl $-32, %esp
+; X86-NEXT: subl $160, %esp
+; X86-NEXT: movl 20(%ebp), %eax
+; X86-NEXT: movl 8(%ebp), %ecx
+; X86-NEXT: vmovaps (%ecx), %ymm0
+; X86-NEXT: vmovaps 32(%ecx), %ymm1
+; X86-NEXT: vmovaps 64(%ecx), %ymm2
+; X86-NEXT: vmovaps 96(%ecx), %ymm3
+; X86-NEXT: bsrl 12(%ebp), %ecx
+; X86-NEXT: notl %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: bsrl 16(%ebp), %edx
+; X86-NEXT: notl %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: vmovaps %ymm3, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm2, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-NEXT: vmovaps %ymm0, (%esp)
+; X86-NEXT: movl $5, (%esp,%ecx,4)
+; X86-NEXT: movl $7, (%esp,%edx,4)
+; X86-NEXT: vmovaps (%esp), %ymm0
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm1
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm2
+; X86-NEXT: vmovaps {{[0-9]+}}(%esp), %ymm3
+; X86-NEXT: vmovaps %ymm3, 64(%eax)
+; X86-NEXT: vmovaps %ymm2, 96(%eax)
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vmovaps %ymm1, 32(%eax)
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
+;
+; X64-LABEL: freeze_dynamic_insertelement_chain_wide_vector:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbp
+; X64-NEXT: movq %rsp, %rbp
+; X64-NEXT: andq $-32, %rsp
+; X64-NEXT: subq $160, %rsp
+; X64-NEXT: vmovaps (%rdi), %ymm0
+; X64-NEXT: vmovaps 32(%rdi), %ymm1
+; X64-NEXT: vmovaps 64(%rdi), %ymm2
+; X64-NEXT: vmovaps 96(%rdi), %ymm3
+; X64-NEXT: bsrl %esi, %eax
+; X64-NEXT: notl %eax
+; X64-NEXT: bsrl %edx, %edx
+; X64-NEXT: notl %edx
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: vmovaps %ymm3, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm2, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
+; X64-NEXT: vmovaps %ymm0, (%rsp)
+; X64-NEXT: movl $5, (%rsp,%rax,4)
+; X64-NEXT: andl $31, %edx
+; X64-NEXT: movl $7, (%rsp,%rdx,4)
+; X64-NEXT: vmovaps (%rsp), %ymm0
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm1
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm2
+; X64-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm3
+; X64-NEXT: vmovaps %ymm2, 64(%rcx)
+; X64-NEXT: vmovaps %ymm3, 96(%rcx)
+; X64-NEXT: vmovaps %ymm0, (%rcx)
+; X64-NEXT: vmovaps %ymm1, 32(%rcx)
+; X64-NEXT: movq %rbp, %rsp
+; X64-NEXT: popq %rbp
+; X64-NEXT: vzeroupper
+; X64-NEXT: retq
+ %v = load <32 x i32>, ptr %vp
+ %idx0 = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ %idx1 = call i32 @llvm.ctlz.i32(i32 %y, i1 true)
+ %ins0 = insertelement <32 x i32> %v, i32 5, i32 %idx0
+ %ins1 = insertelement <32 x i32> %ins0, i32 7, i32 %idx1
+ store <32 x i32> %ins1, ptr %dst
+ ret void
+}
+
+declare i32 @llvm.ctlz.i32(i32, i1)
diff --git a/llvm/test/CodeGen/X86/var-permute-128.ll b/llvm/test/CodeGen/X86/var-permute-128.ll
index a66c074425374..2b3abf2de5ba9 100644
--- a/llvm/test/CodeGen/X86/var-permute-128.ll
+++ b/llvm/test/CodeGen/X86/var-permute-128.ll
@@ -2026,46 +2026,56 @@ define <16 x i8> @var_shuffle_v16i8_from_v32i8_v16i8(<32 x i8> %v, <16 x i8> %in
define void @indices_convert() {
; SSE3-LABEL: indices_convert:
; SSE3: # %bb.0: # %bb
-; SSE3-NEXT: movaps (%rax), %xmm0
-; SSE3-NEXT: movaps %xmm0, -24(%rsp)
-; SSE3-NEXT: movaps %xmm0, -40(%rsp)
-; SSE3-NEXT: movl (%rax), %eax
-; SSE3-NEXT: movaps %xmm0, -56(%rsp)
-; SSE3-NEXT: movaps %xmm0, -72(%rsp)
+; SSE3-NEXT: movdqa (%rax), %xmm0
+; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE3-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE3-NEXT: movd %xmm1, %eax
+; SSE3-NEXT: movdqa %xmm0, -24(%rsp)
+; SSE3-NEXT: movdqa %xmm0, -40(%rsp)
; SSE3-NEXT: andl $3, %eax
-; SSE3-NEXT: shll $3, %eax
-; SSE3-NEXT: movsd -72(%rsp,%rax), %xmm0 # xmm0 = mem[0],zero
-; SSE3-NEXT: movsd -40(%rsp,%rax), %xmm1 # xmm1 = mem[0],zero
-; SSE3-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
-; SSE3-NEXT: movups %xmm1, (%rax)
+; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSE3-NEXT: movd %xmm1, %ecx
+; SSE3-NEXT: movdqa %xmm0, -56(%rsp)
+; SSE3-NEXT: movdqa %xmm0, -72(%rsp)
+; SSE3-NEXT: andl $3, %ecx
+; SSE3-NEXT: movsd -40(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
+; SSE3-NEXT: movsd -72(%rsp,%rcx,8), %xmm1 # xmm1 = mem[0],zero
+; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE3-NEXT: movups %xmm0, (%rax)
; SSE3-NEXT: retq
;
; SSSE3-LABEL: indices_convert:
; SSSE3: # %bb.0: # %bb
-; SSSE3-NEXT: movaps (%rax), %xmm0
-; SSSE3-NEXT: movaps %xmm0, -24(%rsp)
-; SSSE3-NEXT: movaps %xmm0, -40(%rsp)
-; SSSE3-NEXT: movl (%rax), %eax
-; SSSE3-NEXT: movaps %xmm0, -56(%rsp)
-; SSSE3-NEXT: movaps %xmm0, -72(%rsp)
+; SSSE3-NEXT: movdqa (%rax), %xmm0
+; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSSE3-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSSE3-NEXT: movd %xmm1, %eax
+; SSSE3-NEXT: movdqa %xmm0, -24(%rsp)
+; SSSE3-NEXT: movdqa %xmm0, -40(%rsp)
; SSSE3-NEXT: andl $3, %eax
-; SSSE3-NEXT: shll $3, %eax
-; SSSE3-NEXT: movsd -72(%rsp,%rax), %xmm0 # xmm0 = mem[0],zero
-; SSSE3-NEXT: movsd -40(%rsp,%rax), %xmm1 # xmm1 = mem[0],zero
-; SSSE3-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
-; SSSE3-NEXT: movups %xmm1, (%rax)
+; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSSE3-NEXT: movd %xmm1, %ecx
+; SSSE3-NEXT: movdqa %xmm0, -56(%rsp)
+; SSSE3-NEXT: movdqa %xmm0, -72(%rsp)
+; SSSE3-NEXT: andl $3, %ecx
+; SSSE3-NEXT: movsd -40(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
+; SSSE3-NEXT: movsd -72(%rsp,%rcx,8), %xmm1 # xmm1 = mem[0],zero
+; SSSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSSE3-NEXT: movups %xmm0, (%rax)
; SSSE3-NEXT: retq
;
; SSE41-LABEL: indices_convert:
; SSE41: # %bb.0: # %bb
-; SSE41-NEXT: movaps (%rax), %xmm0
-; SSE41-NEXT: extractps $2, %xmm0, %eax
-; SSE41-NEXT: movaps %xmm0, -24(%rsp)
-; SSE41-NEXT: movaps %xmm0, -40(%rsp)
+; SSE41-NEXT: movdqa (%rax), %xmm0
+; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE41-NEXT: movd %xmm1, %eax
+; SSE41-NEXT: movdqa %xmm0, -24(%rsp)
+; SSE41-NEXT: movdqa %xmm0, -40(%rsp)
; SSE41-NEXT: andl $3, %eax
-; SSE41-NEXT: extractps $3, %xmm0, %ecx
-; SSE41-NEXT: movaps %xmm0, -56(%rsp)
-; SSE41-NEXT: movaps %xmm0, -72(%rsp)
+; SSE41-NEXT: pextrd $1, %xmm1, %ecx
+; SSE41-NEXT: movdqa %xmm0, -56(%rsp)
+; SSE41-NEXT: movdqa %xmm0, -72(%rsp)
; SSE41-NEXT: andl $3, %ecx
; SSE41-NEXT: movsd -72(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
; SSE41-NEXT: movsd -40(%rsp,%rax,8), %xmm1 # xmm1 = mem[0],zero
diff --git a/llvm/test/CodeGen/X86/vecloadextract.ll b/llvm/test/CodeGen/X86/vecloadextract.ll
index ad5fc22b1e6af..90c44efb9234a 100644
--- a/llvm/test/CodeGen/X86/vecloadextract.ll
+++ b/llvm/test/CodeGen/X86/vecloadextract.ll
@@ -20,7 +20,8 @@ define i32 @const_index(ptr %v) {
; CHECK: name: variable_index
; CHECK: bb.0 (%ir-block.0):
; CHECK: [[INDEX:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.0)
-; CHECK: [[MASKED_INDEX:%[0-9]+]]:gr32_nosp = AND32ri [[INDEX]], 7, implicit-def dead $eflags
+; CHECK: [[FROZEN_INDEX:%[0-9]+]]:gr32 = COPY killed [[INDEX]]
+; CHECK: [[MASKED_INDEX:%[0-9]+]]:gr32_nosp = AND32ri [[FROZEN_INDEX]], 7, implicit-def dead $eflags
; CHECK: [[POINTER:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.1)
; CHECK: [[LOAD:%[0-9]+]]:gr32 = MOV32rm killed [[POINTER]], 4, killed [[MASKED_INDEX]], 0, $noreg :: (load (s32))
; CHECK: $eax = COPY [[LOAD]]
@@ -34,7 +35,8 @@ define i32 @variable_index(ptr %v, i32 %i) {
; CHECK: name: variable_index_with_addrspace
; CHECK: bb.0 (%ir-block.0):
; CHECK: [[INDEX:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.0)
-; CHECK: [[MASKED_INDEX:%[0-9]+]]:gr32_nosp = AND32ri [[INDEX]], 7, implicit-def dead $eflags
+; CHECK: [[FROZEN_INDEX:%[0-9]+]]:gr32 = COPY killed [[INDEX]]
+; CHECK: [[MASKED_INDEX:%[0-9]+]]:gr32_nosp = AND32ri [[FROZEN_INDEX]], 7, implicit-def dead $eflags
; CHECK: [[POINTER:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.1)
; CHECK: [[LOAD:%[0-9]+]]:gr32 = MOV32rm killed [[POINTER]], 4, killed [[MASKED_INDEX]], 0, $noreg :: (load (s32), addrspace 1)
; CHECK: $eax = COPY [[LOAD]]
diff --git a/llvm/test/CodeGen/X86/vector-extract-last-active.ll b/llvm/test/CodeGen/X86/vector-extract-last-active.ll
index 16a2de9783893..fcf9c295c3852 100644
--- a/llvm/test/CodeGen/X86/vector-extract-last-active.ll
+++ b/llvm/test/CodeGen/X86/vector-extract-last-active.ll
@@ -654,6 +654,7 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
; SSE2-NEXT: psrlw $8, %xmm5
; SSE2-NEXT: pmaxub %xmm1, %xmm5
; SSE2-NEXT: movd %xmm5, %eax
+; SSE2-NEXT: movzbl %al, %eax
; SSE2-NEXT: pmovmskb %xmm3, %ecx
; SSE2-NEXT: pandn %xmm0, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,3,2,3]
@@ -667,7 +668,8 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
; SSE2-NEXT: psrlw $8, %xmm1
; SSE2-NEXT: pmaxub %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %edx
-; SSE2-NEXT: addl $16, %edx
+; SSE2-NEXT: movzbl %dl, %edx
+; SSE2-NEXT: addq $16, %rdx
; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: cmoveq %rax, %rdx
; SSE2-NEXT: andl $31, %edx
@@ -682,9 +684,9 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
; SSE42-LABEL: extract_last_active_split:
; SSE42: # %bb.0:
; SSE42-NEXT: pxor %xmm4, %xmm4
-; SSE42-NEXT: movdqa %xmm2, %xmm5
+; SSE42-NEXT: movdqa %xmm3, %xmm5
; SSE42-NEXT: pcmpeqb %xmm4, %xmm5
-; SSE42-NEXT: pcmpeqb %xmm3, %xmm4
+; SSE42-NEXT: pcmpeqb %xmm2, %xmm4
; SSE42-NEXT: pcmpeqd %xmm6, %xmm6
; SSE42-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; SSE42-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
@@ -698,7 +700,6 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
; SSE42-NEXT: movd %xmm1, %eax
; SSE42-NEXT: notb %al
; SSE42-NEXT: movzbl %al, %eax
-; SSE42-NEXT: addl $16, %eax
; SSE42-NEXT: pandn %xmm0, %xmm5
; SSE42-NEXT: pxor %xmm6, %xmm5
; SSE42-NEXT: movdqa %xmm5, %xmm0
@@ -708,8 +709,9 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
; SSE42-NEXT: movd %xmm0, %ecx
; SSE42-NEXT: notb %cl
; SSE42-NEXT: movzbl %cl, %ecx
+; SSE42-NEXT: addq $16, %rcx
; SSE42-NEXT: ptest %xmm3, %xmm3
-; SSE42-NEXT: cmovneq %rax, %rcx
+; SSE42-NEXT: cmoveq %rax, %rcx
; SSE42-NEXT: andl $31, %ecx
; SSE42-NEXT: por %xmm3, %xmm2
; SSE42-NEXT: ptest %xmm2, %xmm2
``````````
</details>
https://github.com/llvm/llvm-project/pull/225031
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