[llvm] [X86] Fix cmov-unpredictable MIR tests under expensive checks (PR #225011)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/225011

>From 39f2c4f82647113d4325e0e1915f1dd4784ce28f Mon Sep 17 00:00:00 2001
From: Yangyu Chen <cyy at cyyself.name>
Date: Mon, 21 Sep 2026 14:16:34 +0800
Subject: [PATCH] [X86] Fix cmov-unpredictable MIR tests under expensive checks

The machine functions have no body, so the MIR parser sets NoVRegs and
leaves TracksLiveness unset, and the verifier rejects the vregs created
by instruction selection. Declare tracksRegLiveness: true and
noVRegs: false, and add -verify-machineinstrs to the RUN lines.

Fixes https://lab.llvm.org/buildbot/#/builders/187/builds/23887 after
#223469.

Assisted-by: Claude Code:claude-fable-5-1
Signed-off-by: Yangyu Chen <cyy at cyyself.name>
---
 llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir | 10 +++++++++-
 llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir  |  6 +++++-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir b/llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
index 54e91ebe672394..43ebdd28b92b53 100644
--- a/llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
+++ b/llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64 -start-before=x86-isel -stop-after=finalize-isel %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64 -start-before=x86-isel -stop-after=finalize-isel -verify-machineinstrs %s -o - | FileCheck %s
 
 # The unpredictable flag of a select through the CMOV rewrites in combineCMov.
 # The machine functions have no body: instruction selection runs on the
@@ -45,6 +45,8 @@
 ...
 ---
 name: simplified_eflags
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: simplified_eflags
   ; CHECK: bb.0 (%ir-block.0):
@@ -60,6 +62,8 @@ body: |
 ...
 ---
 name: double_cmov
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: double_cmov
   ; CHECK: bb.0 (%ir-block.0):
@@ -77,6 +81,8 @@ body: |
 ...
 ---
 name: constant_to_register
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: constant_to_register
   ; CHECK: bb.0 (%ir-block.0):
@@ -91,6 +97,8 @@ body: |
 ...
 ---
 name: cttz_add
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: cttz_add
   ; CHECK: bb.0 (%ir-block.0):
diff --git a/llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir b/llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
index b798a129101ba0..7d1637af4c7bc5 100644
--- a/llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
+++ b/llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64 -start-before=x86-isel -stop-after=x86-cmov-conversion %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64 -start-before=x86-isel -stop-after=x86-cmov-conversion -verify-machineinstrs %s -o - | FileCheck %s
 
 # A select marked !unpredictable should stay a CMOV even when the CMOV folds a
 # load: X86CmovConversion leaves CMOVs carrying the unpredictable flag alone.
@@ -26,6 +26,8 @@
 ...
 ---
 name: load_or_zero
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: load_or_zero
   ; CHECK: bb.0 (%ir-block.0):
@@ -40,6 +42,8 @@ body: |
 ...
 ---
 name: load_or_zero_nohint
+tracksRegLiveness: true
+noVRegs: false
 body: |
   ; CHECK-LABEL: name: load_or_zero_nohint
   ; CHECK: bb.0 (%ir-block.0):