[llvm] [X86] Don't drop a redundant 32-bit `and` whose users were selected as def32 (PR #223750)

[Akash Manna via llvm-commits]

akash-manna-sky wrote:

> > On AArch64 we killed off isDef32, and instead do some post-isel cleanups. It's too hard to get the predicate right. See [bccbf52](https://github.com/llvm/llvm-project/commit/bccbf5276e6ee23a427b48d80ad42ff31575c1e7) .
> 
> We use X86DAGToDAGISel::PostprocessISelDAG() to remove unnecessary vector moves that zero upper bits for ymm/zmm registers before SUBREG_TO_REG. The vector case predicate was also hard to manage.

Well... that's the shape I had in mind for the follow-up: same as the sub_xmm/sub_ymm case, but for GPRs the "real def" test would be opcode > GENERIC_OP_END plus exclusions for the BSF/BSR passthrough and pseudos that expand to PHIs (CMOV_GR32), since there's no VEX-style encoding check to lean on. Does that sound right, or is there an existing "this GR32 def zeroes the upper half" predicate I should reuse?


https://github.com/llvm/llvm-project/pull/223750