[llvm] [AMDGPU] Remove `hasSideEffects` from `SI_IF`, `SI_ELSE` and `SI_LOOP` (PR #224007)

Igor Wodiany via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 16 06:05:53 PDT 2026


https://github.com/IgWod created https://github.com/llvm/llvm-project/pull/224007

An arbitrary side-effect flag blocks sinking of memory operations due to the unmodelled-side-effect check returning true. This changes has no effect on other transformations as modeled side effects (EXEC and SCC defs) are still accounted for and sufficient to gate unsound code motion. All three instructions are still rejected by `isSafeToMove` as they carry the terminator flag.

This commit is part of the effort to enhance `MachineSink` on the AMDGPU target. By itself itself it does not unblock more code motion opportunities but it is a prerequisite to do so.

>From 4c54474ecff6e2dca226ab44ec538c16243a59d6 Mon Sep 17 00:00:00 2001
From: Igor Wodiany <igor.wodiany at amd.com>
Date: Thu, 27 Aug 2026 15:53:26 +0100
Subject: [PATCH] [AMDGPU] Remove `hasSideEffects` from `SI_IF`, `SI_ELSE` and
 `SI_LOOP`

An arbitrary side-effect flags blocks sinking of memory operations
due to the unmodelled-side-effect check returning true. This changes
has no effect on other transformations as modelled side effects
(EXEC and SCC defs) are still accounted for and sufficient to gate
unsound code motion. All three instructions are still rejected by
`isSafeToMove` as they carry the terminator flag.

This commit is part of the effort to enhance `MachineSink` on the AMDGPU
target. By itself itself it does not unblock more code motion
opportunities but it is a pre-requisite to do so.
---
 llvm/lib/Target/AMDGPU/SIInstructions.td | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index e891ba31bbf67..eaece88e98525 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -599,7 +599,6 @@ def SI_IF: CFPseudoInstSI <
   [(set i1:$dst, (AMDGPUif i1:$vcc, bb:$target))], 1, 1> {
   let Constraints = "";
   let Size = 12;
-  let hasSideEffects = 1;
   let IsNeverUniform = 1;
 }
 
@@ -607,7 +606,6 @@ def SI_ELSE : CFPseudoInstSI <
   (outs SReg_1:$dst),
   (ins SReg_1:$src, brtarget:$target), [], 1, 1> {
   let Size = 12;
-  let hasSideEffects = 1;
   let IsNeverUniform = 1;
 }
 
@@ -624,11 +622,10 @@ def SI_LOOP : CFPseudoInstSI <
   [(AMDGPUloop i1:$saved, bb:$target)], 1, 1> {
   let Size = 8;
   let isBranch = 1;
-  let hasSideEffects = 1;
   let IsNeverUniform = 1;
 }
 
-} // End isTerminator = 1
+} // End isTerminator = 1, isNotDuplicable = 1
 
 def SI_END_CF : CFPseudoInstSI <
   (outs), (ins SReg_1:$saved), [], 1, 1> {



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