[llvm] [VPlan] Lower safe uniform load to unconditional scalar load (PR #216767)
Shih-Po Hung via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 16 01:19:18 PDT 2026
https://github.com/arcbbb updated https://github.com/llvm/llvm-project/pull/216767
>From 351b7e2d002c95975b4aba0ffd42b9a26da6ea69 Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Mon, 17 Aug 2026 01:58:51 -0700
Subject: [PATCH 1/7] [VPlan] precommit uniform gather test
---
.../LoopVectorize/uniform-gather.ll | 411 ++++++++++++++++++
1 file changed, 411 insertions(+)
create mode 100644 llvm/test/Transforms/LoopVectorize/uniform-gather.ll
diff --git a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
new file mode 100644
index 00000000000000..61af4c533d69ac
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
@@ -0,0 +1,411 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 -force-target-supports-gather-scatter-ops=true -tail-folding-policy=must-fold-tail %s 2>&1 | FileCheck %s --check-prefix=FIXED
+; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 -force-target-supports-gather-scatter-ops=true -tail-folding-policy=must-fold-tail -force-target-supports-scalable-vectors -scalable-vectorization=on %s 2>&1 | FileCheck %s --check-prefix=SCALABLE
+
+ at log_table = internal constant [4 x i32] [i32 10, i32 20, i32 30, i32 40]
+ at exp_table = internal constant [4 x i32] [i32 1, i32 2, i32 3, i32 4]
+
+; Uniform, dereferenceable global variable.
+define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
+; FIXED-LABEL: define void @global_table_load(
+; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], i64 [[N:%.*]]) {
+; FIXED-NEXT: [[ENTRY:.*:]]
+; FIXED-NEXT: br label %[[VECTOR_PH1:.*]]
+; FIXED: [[VECTOR_PH1]]:
+; FIXED-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], 1
+; FIXED-NEXT: [[TMP0:%.*]] = and i64 [[N_RND_UP]], 1
+; FIXED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]]
+; FIXED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: br label %[[VECTOR_BODY1:.*]]
+; FIXED: [[VECTOR_BODY1]]:
+; FIXED-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY1]] ]
+; FIXED-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY1]] ]
+; FIXED-NEXT: [[TMP1:%.*]] = icmp ule <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; FIXED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX1]]
+; FIXED-NEXT: [[WIDE_LOAD:%.*]] = call <2 x i32> @llvm.masked.load.v2i32.p0(ptr align 4 [[TMP40]], <2 x i1> [[TMP1]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
+; FIXED-NEXT: [[TMP3:%.*]] = xor <2 x i1> [[TMP2]], splat (i1 true)
+; FIXED-NEXT: [[TMP7:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP3]], <2 x i1> zeroinitializer
+; FIXED-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 <ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4)>, <2 x i1> [[TMP7]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP6:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP2]], <2 x i1> zeroinitializer
+; FIXED-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 <ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8)>, <2 x i1> [[TMP6]], <2 x i32> poison)
+; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[WIDE_MASKED_GATHER1]], <2 x i32> [[WIDE_MASKED_GATHER]]
+; FIXED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX1]]
+; FIXED-NEXT: call void @llvm.masked.store.v2i32.p0(<2 x i32> [[PREDPHI]], ptr align 4 [[TMP4]], <2 x i1> [[TMP1]])
+; FIXED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX1]], 2
+; FIXED-NEXT: [[VEC_IND_NEXT]] = add nuw <2 x i64> [[VEC_IND]], splat (i64 2)
+; FIXED-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; FIXED-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF27:.*]], label %[[VECTOR_BODY1]], !llvm.loop [[LOOP0:![0-9]+]]
+; FIXED: [[PRED_STORE_IF27]]:
+; FIXED-NEXT: br label %[[PRED_STORE_CONTINUE28:.*]]
+; FIXED: [[PRED_STORE_CONTINUE28]]:
+; FIXED-NEXT: ret void
+;
+; SCALABLE-LABEL: define void @global_table_load(
+; SCALABLE-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], i64 [[N:%.*]]) {
+; SCALABLE-NEXT: [[SCALAR_PH:.*:]]
+; SCALABLE-NEXT: br label %[[VECTOR_PH:.*]]
+; SCALABLE: [[VECTOR_PH]]:
+; SCALABLE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; SCALABLE-NEXT: [[TMP2:%.*]] = shl nuw i64 [[TMP0]], 1
+; SCALABLE-NEXT: [[TMP10:%.*]] = sub i64 [[TMP2]], 1
+; SCALABLE-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP10]]
+; SCALABLE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP2]]
+; SCALABLE-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
+; SCALABLE-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP2]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: br label %[[FOR_BODY:.*]]
+; SCALABLE: [[FOR_BODY]]:
+; SCALABLE-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[FOR_BODY]] ]
+; SCALABLE-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[FOR_BODY]] ]
+; SCALABLE-NEXT: [[TMP11:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; SCALABLE-NEXT: [[ARRAYIDX_COND:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
+; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[ARRAYIDX_COND]], <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP4:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
+; SCALABLE-NEXT: [[TMP5:%.*]] = xor <vscale x 2 x i1> [[TMP4]], splat (i1 true)
+; SCALABLE-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 shufflevector (<vscale x 2 x ptr> insertelement (<vscale x 2 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), i64 0), <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer), <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP9:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> zeroinitializer
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 shufflevector (<vscale x 2 x ptr> insertelement (<vscale x 2 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), i64 0), <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer), <vscale x 2 x i1> [[TMP9]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER1]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]]
+; SCALABLE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IV]]
+; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 2 x i1> [[TMP11]])
+; SCALABLE-NEXT: [[INDEX_NEXT]] = add i64 [[IV]], [[TMP2]]
+; SCALABLE-NEXT: [[VEC_IND_NEXT]] = add nuw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]]
+; SCALABLE-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; SCALABLE-NEXT: br i1 [[TMP7]], label %[[IF_END:.*]], label %[[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; SCALABLE: [[IF_END]]:
+; SCALABLE-NEXT: br label %[[FOR_INC:.*]]
+; SCALABLE: [[FOR_INC]]:
+; SCALABLE-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ %gep.log = getelementptr inbounds [4 x i32], ptr @log_table, i64 0, i64 2
+ %v.then = load i32, ptr %gep.log, align 4
+ br label %if.end
+
+if.else:
+ %gep.exp = getelementptr inbounds [4 x i32], ptr @exp_table, i64 0, i64 1
+ %v.else = load i32, ptr %gep.exp, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ %v.else, %if.else ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+; Uniform, dereferenceable(16) pointer parameter.
+; The access (bytes [12,16)) is inside the range.
+define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(16) %table) nofree {
+; FIXED-LABEL: define void @deref_param_in_range(
+; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR0:[0-9]+]] {
+; FIXED-NEXT: [[ENTRY:.*:]]
+; FIXED-NEXT: br label %[[VECTOR_PH:.*]]
+; FIXED: [[VECTOR_PH]]:
+; FIXED-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x ptr> poison, ptr [[TMP0]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x ptr> [[BROADCAST_SPLATINSERT]], <2 x ptr> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: br label %[[VECTOR_BODY:.*]]
+; FIXED: [[VECTOR_BODY]]:
+; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; FIXED-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; FIXED-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP1]], align 4
+; FIXED-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
+; FIXED-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT]], <2 x i1> [[TMP2]], <2 x i32> poison)
+; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP6]], <2 x i32> zeroinitializer
+; FIXED-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; FIXED-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP11]], align 4
+; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; FIXED-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
+; FIXED-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; FIXED: [[MIDDLE_BLOCK]]:
+; FIXED-NEXT: br label %[[EXIT:.*]]
+; FIXED: [[EXIT]]:
+; FIXED-NEXT: ret void
+;
+; SCALABLE-LABEL: define void @deref_param_in_range(
+; SCALABLE-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR0:[0-9]+]] {
+; SCALABLE-NEXT: [[VECTOR_PH:.*:]]
+; SCALABLE-NEXT: br label %[[VECTOR_PH1:.*]]
+; SCALABLE: [[VECTOR_PH1]]:
+; SCALABLE-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
+; SCALABLE-NEXT: [[TMP2:%.*]] = shl nuw i64 [[TMP4]], 1
+; SCALABLE-NEXT: [[TMP9:%.*]] = sub i64 [[TMP2]], 1
+; SCALABLE-NEXT: [[N_RND_UP:%.*]] = add i64 16, [[TMP9]]
+; SCALABLE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP2]]
+; SCALABLE-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
+; SCALABLE-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP3]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP10:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP2]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT1:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: br label %[[VECTOR_BODY:.*]]
+; SCALABLE: [[VECTOR_BODY]]:
+; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; SCALABLE-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP10]], %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; SCALABLE-NEXT: [[TMP11:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], splat (i64 15)
+; SCALABLE-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[TMP1]], <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP5:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
+; SCALABLE-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 2 x i1> [[TMP11]])
+; SCALABLE-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP2]]
+; SCALABLE-NEXT: [[VEC_IND_NEXT]] = add nuw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT1]]
+; SCALABLE-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; SCALABLE-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; SCALABLE: [[MIDDLE_BLOCK]]:
+; SCALABLE-NEXT: br label %[[EXIT:.*]]
+; SCALABLE: [[EXIT]]:
+; SCALABLE-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 3
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 16
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+; Uniform, dereferenceable(15) pointer parameter.
+; The last byte of the accessed i32 falls outside the range.
+define void @deref_param_out_of_range_last_byte(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(15) %table) nofree {
+; FIXED-LABEL: define void @deref_param_out_of_range_last_byte(
+; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(15) [[TABLE:%.*]]) #[[ATTR0]] {
+; FIXED-NEXT: [[ENTRY:.*:]]
+; FIXED-NEXT: br label %[[VECTOR_PH:.*]]
+; FIXED: [[VECTOR_PH]]:
+; FIXED-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x ptr> poison, ptr [[TMP0]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x ptr> [[BROADCAST_SPLATINSERT]], <2 x ptr> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: br label %[[VECTOR_BODY:.*]]
+; FIXED: [[VECTOR_BODY]]:
+; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; FIXED-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; FIXED-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP1]], align 4
+; FIXED-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
+; FIXED-NEXT: [[TMP10:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT]], <2 x i1> [[TMP2]], <2 x i32> poison)
+; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP10]], <2 x i32> zeroinitializer
+; FIXED-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; FIXED-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP19]], align 4
+; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; FIXED-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
+; FIXED-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; FIXED: [[MIDDLE_BLOCK]]:
+; FIXED-NEXT: br label %[[EXIT:.*]]
+; FIXED: [[EXIT]]:
+; FIXED-NEXT: ret void
+;
+; SCALABLE-LABEL: define void @deref_param_out_of_range_last_byte(
+; SCALABLE-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(15) [[TABLE:%.*]]) #[[ATTR0]] {
+; SCALABLE-NEXT: [[ENTRY:.*:]]
+; SCALABLE-NEXT: br label %[[VECTOR_PH:.*]]
+; SCALABLE: [[VECTOR_PH]]:
+; SCALABLE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; SCALABLE-NEXT: [[TMP2:%.*]] = shl nuw i64 [[TMP0]], 1
+; SCALABLE-NEXT: [[TMP9:%.*]] = sub i64 [[TMP2]], 1
+; SCALABLE-NEXT: [[N_RND_UP:%.*]] = add i64 16, [[TMP9]]
+; SCALABLE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP2]]
+; SCALABLE-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
+; SCALABLE-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP3]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP2]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT1:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: br label %[[FOR_BODY:.*]]
+; SCALABLE: [[FOR_BODY]]:
+; SCALABLE-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[FOR_BODY]] ]
+; SCALABLE-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP4]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[FOR_BODY]] ]
+; SCALABLE-NEXT: [[TMP10:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], splat (i64 15)
+; SCALABLE-NEXT: [[ARRAYIDX_COND:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
+; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[ARRAYIDX_COND]], <vscale x 2 x i1> [[TMP10]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP5:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
+; SCALABLE-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[TMP10]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IV]]
+; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 2 x i1> [[TMP10]])
+; SCALABLE-NEXT: [[INDEX_NEXT]] = add i64 [[IV]], [[TMP2]]
+; SCALABLE-NEXT: [[VEC_IND_NEXT]] = add nuw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT1]]
+; SCALABLE-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; SCALABLE-NEXT: br i1 [[TMP7]], label %[[IF_END:.*]], label %[[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; SCALABLE: [[IF_END]]:
+; SCALABLE-NEXT: br label %[[FOR_INC:.*]]
+; SCALABLE: [[FOR_INC]]:
+; SCALABLE-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 3
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 16
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+; Uniform, dereferenceable(16) pointer parameter.
+; Since %iv < 1024, The offset (bytes [0,4)) is inside the range.
+define void @deref_param_in_range_uniform_but_not_loop_invariant(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(16) %table) nofree vscale_range(4, 4) {
+; FIXED-LABEL: define void @deref_param_in_range_uniform_but_not_loop_invariant(
+; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] {
+; FIXED-NEXT: [[ENTRY:.*:]]
+; FIXED-NEXT: br label %[[VECTOR_PH:.*]]
+; FIXED: [[VECTOR_PH]]:
+; FIXED-NEXT: br label %[[VECTOR_BODY:.*]]
+; FIXED: [[VECTOR_BODY]]:
+; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; FIXED-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; FIXED-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; FIXED-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
+; FIXED-NEXT: [[TMP2:%.*]] = lshr i64 [[INDEX]], 10
+; FIXED-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 [[TMP2]]
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x ptr> poison, ptr [[TMP3]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x ptr> [[BROADCAST_SPLATINSERT]], <2 x ptr> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: [[TMP11:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT]], <2 x i1> [[TMP1]], <2 x i32> poison)
+; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP11]], <2 x i32> zeroinitializer
+; FIXED-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; FIXED-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP20]], align 4
+; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; FIXED-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
+; FIXED-NEXT: br i1 [[TMP21]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; FIXED: [[MIDDLE_BLOCK]]:
+; FIXED-NEXT: br label %[[EXIT:.*]]
+; FIXED: [[EXIT]]:
+; FIXED-NEXT: ret void
+;
+; SCALABLE-LABEL: define void @deref_param_in_range_uniform_but_not_loop_invariant(
+; SCALABLE-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] {
+; SCALABLE-NEXT: [[ENTRY:.*:]]
+; SCALABLE-NEXT: br label %[[FOR_BODY:.*]]
+; SCALABLE: [[FOR_BODY]]:
+; SCALABLE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; SCALABLE-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1
+; SCALABLE-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: br label %[[IF_END:.*]]
+; SCALABLE: [[IF_END]]:
+; SCALABLE-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[FOR_BODY]] ], [ [[IV_NEXT:%.*]], %[[IF_END]] ]
+; SCALABLE-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP2]], %[[FOR_BODY]] ], [ [[VEC_IND_NEXT:%.*]], %[[IF_END]] ]
+; SCALABLE-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
+; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[TMP3]], align 4
+; SCALABLE-NEXT: [[TMP4:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
+; SCALABLE-NEXT: [[TMP5:%.*]] = lshr <vscale x 2 x i64> [[VEC_IND]], splat (i64 10)
+; SCALABLE-NEXT: [[WIDE_GEP:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], <vscale x 2 x i64> [[TMP5]]
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[WIDE_GEP]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[ARRAYIDX_OUT:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IV]]
+; SCALABLE-NEXT: store <vscale x 2 x i32> [[PREDPHI]], ptr [[ARRAYIDX_OUT]], align 4
+; SCALABLE-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], [[TMP1]]
+; SCALABLE-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; SCALABLE-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 32
+; SCALABLE-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[IF_END]], !llvm.loop [[LOOP5:![0-9]+]]
+; SCALABLE: [[EXIT]]:
+; SCALABLE-NEXT: br label %[[EXIT1:.*]]
+; SCALABLE: [[EXIT1]]:
+; SCALABLE-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %offset = udiv i64 %iv, 1024
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 %offset
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 32
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
>From 9957fb2d67ae5f660f75127e5040d21c04c2dd0f Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Mon, 17 Aug 2026 09:27:32 -0700
Subject: [PATCH 2/7] [VPlan] Lower safe uniform load to unconditional scalar
load
When a load's address is uniform across VFs/UFs and provably safe to
access unconditionally, lower it to an unconditional scalar load recipe.
This avoids generating unnecessary masked loads or gathers for uniform memory
accesses.
---
.../Transforms/Vectorize/VPlanTransforms.cpp | 23 ++++++++++++
.../VPlan/vplan-print-before-after-all.ll | 1 +
.../LoopVectorize/X86/load-deref-pred.ll | 9 ++---
.../LoopVectorize/uniform-gather.ll | 36 ++++++++++---------
4 files changed, 45 insertions(+), 24 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index 37fa91fc97be53..65186b7bdde4ac 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5657,6 +5657,29 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
return ReplaceWith(VPI, StoreR);
});
+ // Lower safe uniform (potentially masked) loads to unconditional scalar
+ // loads.
+ VPlanTransforms::runPass(
+ "lowerSafeUniformLoads", ProcessSubset, Plan, [&](VPInstruction *VPI) {
+ if (VPI->getOpcode() != Instruction::Load)
+ return false;
+ VPValue *Addr = VPI->getOperand(0);
+ if (!vputils::isUniformAcrossVFsAndUFs(Addr))
+ return false;
+ auto &LI = cast<LoadInst>(*VPI->getUnderlyingInstr());
+ Value *Underlying = Addr->getUnderlyingValue();
+ if (!Underlying || !isSafeToLoadUnconditionally(
+ Underlying, LI.getType(), LI.getAlign(),
+ Plan.getDataLayout(), &LI,
+ /*AC=*/nullptr, /*DT=*/nullptr, &CostCtx.TLI))
+ return false;
+ auto *Recipe = VPBuilder::createSingleScalarOp(
+ VPI->getOpcode(), VPI->operandsWithoutMask(), /*Mask=*/nullptr,
+ *VPI, *VPI, VPI->getDebugLoc(), &LI);
+ Recipe->insertBefore(VPI);
+ return ReplaceWith(VPI, Recipe);
+ });
+
VPlanTransforms::runPass("delegateMemOpWideningToLegacyCM", ProcessSubset,
Plan, [&](VPInstruction *VPI) {
if (VPRecipeBase *Recipe =
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
index b5ee488ae5bd5b..d1dc1b85a2368e 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
@@ -26,6 +26,7 @@
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] lowerMemoryIdioms
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] scalarizeMemOpsWithIrregularTypes
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] widenConsecutiveMemOps
+; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] lowerSafeUniformLoads
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] delegateMemOpWideningToLegacyCM
; CHECK-AFTER: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] VPlanTransforms::makeMemOpWideningDecisions
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] VPlanTransforms::makeScalarizationDecisions
diff --git a/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll b/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
index 411318d341de37..dc436186a889ab 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
@@ -233,14 +233,9 @@ define i32 @test_invariant_address(i64 %len, ptr %test_base) {
; CHECK-NEXT: call void @init(ptr [[ALLOCA]])
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
; CHECK: vector.ph:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ALLOCA]], align 4
-; CHECK-NEXT: [[TMP64:%.*]] = load i32, ptr [[ALLOCA]], align 4
-; CHECK-NEXT: [[TMP65:%.*]] = load i32, ptr [[ALLOCA]], align 4
; CHECK-NEXT: [[TMP66:%.*]] = load i32, ptr [[ALLOCA]], align 4
-; CHECK-NEXT: [[TMP67:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0
-; CHECK-NEXT: [[TMP68:%.*]] = insertelement <4 x i32> [[TMP67]], i32 [[TMP64]], i64 1
-; CHECK-NEXT: [[TMP69:%.*]] = insertelement <4 x i32> [[TMP68]], i32 [[TMP65]], i64 2
-; CHECK-NEXT: [[TMP71:%.*]] = insertelement <4 x i32> [[TMP69]], i32 [[TMP66]], i64 3
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP66]], i64 0
+; CHECK-NEXT: [[TMP71:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
diff --git a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
index 61af4c533d69ac..8ee6b2ea33c0f0 100644
--- a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
@@ -26,11 +26,12 @@ define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
; FIXED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX1]]
; FIXED-NEXT: [[WIDE_LOAD:%.*]] = call <2 x i32> @llvm.masked.load.v2i32.p0(ptr align 4 [[TMP40]], <2 x i1> [[TMP1]], <2 x i32> poison)
; FIXED-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
-; FIXED-NEXT: [[TMP3:%.*]] = xor <2 x i1> [[TMP2]], splat (i1 true)
-; FIXED-NEXT: [[TMP7:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP3]], <2 x i1> zeroinitializer
-; FIXED-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 <ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4)>, <2 x i1> [[TMP7]], <2 x i32> poison)
-; FIXED-NEXT: [[TMP6:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP2]], <2 x i1> zeroinitializer
-; FIXED-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 <ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8)>, <2 x i1> [[TMP6]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP6:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), align 4
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <2 x i32> poison, i32 [[TMP6]], i64 0
+; FIXED-NEXT: [[WIDE_MASKED_GATHER:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT3]], <2 x i32> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: [[TMP7:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), align 4
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0
+; FIXED-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer
; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[WIDE_MASKED_GATHER1]], <2 x i32> [[WIDE_MASKED_GATHER]]
; FIXED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX1]]
; FIXED-NEXT: call void @llvm.masked.store.v2i32.p0(<2 x i32> [[PREDPHI]], ptr align 4 [[TMP4]], <2 x i1> [[TMP1]])
@@ -68,11 +69,12 @@ define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
; SCALABLE-NEXT: [[ARRAYIDX_COND:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[ARRAYIDX_COND]], <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i32> poison)
; SCALABLE-NEXT: [[TMP4:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
-; SCALABLE-NEXT: [[TMP5:%.*]] = xor <vscale x 2 x i1> [[TMP4]], splat (i1 true)
-; SCALABLE-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer
-; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 shufflevector (<vscale x 2 x ptr> insertelement (<vscale x 2 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), i64 0), <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer), <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i32> poison)
-; SCALABLE-NEXT: [[TMP9:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> zeroinitializer
-; SCALABLE-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 shufflevector (<vscale x 2 x ptr> insertelement (<vscale x 2 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), i64 0), <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer), <vscale x 2 x i1> [[TMP9]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP9:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), align 4
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT5:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[TMP9]], i64 0
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT5]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP8:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), align 4
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[TMP8]], i64 0
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT3]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER1]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]]
; SCALABLE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IV]]
; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 2 x i1> [[TMP11]])
@@ -129,15 +131,15 @@ define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noali
; FIXED-NEXT: br label %[[VECTOR_PH:.*]]
; FIXED: [[VECTOR_PH]]:
; FIXED-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
-; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x ptr> poison, ptr [[TMP0]], i64 0
-; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x ptr> [[BROADCAST_SPLATINSERT]], <2 x ptr> poison, <2 x i32> zeroinitializer
; FIXED-NEXT: br label %[[VECTOR_BODY:.*]]
; FIXED: [[VECTOR_BODY]]:
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
; FIXED-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP1]], align 4
; FIXED-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
-; FIXED-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT]], <2 x i1> [[TMP2]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0
+; FIXED-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
; FIXED-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP6]], <2 x i32> zeroinitializer
; FIXED-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
; FIXED-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP11]], align 4
@@ -161,8 +163,6 @@ define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noali
; SCALABLE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP2]]
; SCALABLE-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
; SCALABLE-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
-; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP3]], i64 0
-; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
; SCALABLE-NEXT: [[TMP10:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP2]], i64 0
; SCALABLE-NEXT: [[BROADCAST_SPLAT1:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
@@ -174,8 +174,9 @@ define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noali
; SCALABLE-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
; SCALABLE-NEXT: [[WIDE_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[TMP1]], <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i32> poison)
; SCALABLE-NEXT: [[TMP5:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_LOAD]], zeroinitializer
-; SCALABLE-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[TMP11]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer
-; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP3]], align 4
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[TMP8]], i64 0
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT2]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
; SCALABLE-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], <vscale x 2 x i32> zeroinitializer
; SCALABLE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 2 x i1> [[TMP11]])
@@ -318,6 +319,7 @@ exit:
; Uniform, dereferenceable(16) pointer parameter.
; Since %iv < 1024, The offset (bytes [0,4)) is inside the range.
+; TODO: Fold GEP offset to 0 using IV upper bound (< 1024).
define void @deref_param_in_range_uniform_but_not_loop_invariant(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(16) %table) nofree vscale_range(4, 4) {
; FIXED-LABEL: define void @deref_param_in_range_uniform_but_not_loop_invariant(
; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] {
>From d1643972497c04b02b2050e4f70391f7a4a9e0e5 Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Thu, 27 Aug 2026 20:20:44 -0700
Subject: [PATCH 3/7] Use SCEV-based isDereferenceableAndAlignedInLoop
---
llvm/lib/Analysis/Loads.cpp | 41 ++++++++++---------
.../Transforms/Vectorize/LoopVectorize.cpp | 2 +-
.../Transforms/Vectorize/VPlanTransforms.cpp | 21 +++++++---
.../Transforms/Vectorize/VPlanTransforms.h | 3 +-
.../LoopVectorize/uniform-gather.ll | 1 -
5 files changed, 39 insertions(+), 29 deletions(-)
diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp
index de9022c540d42c..5b970b34405411 100644
--- a/llvm/lib/Analysis/Loads.cpp
+++ b/llvm/lib/Analysis/Loads.cpp
@@ -326,27 +326,29 @@ bool llvm::isDereferenceableAndAlignedInLoop(
const SCEV *PtrSCEV, Align Alignment, const SCEV *EltSizeSCEV, Loop *L,
ScalarEvolution &SE, DominatorTree &DT, AssumptionCache *AC,
SmallVectorImpl<const SCEVPredicate *> *Predicates) {
- auto *AddRec = dyn_cast<SCEVAddRecExpr>(PtrSCEV);
-
- // Check to see if we have a repeating access pattern and it's possible
- // to prove all accesses are well aligned.
- if (!AddRec || AddRec->getLoop() != L || !AddRec->isAffine())
- return false;
+ bool IsInvariant = SE.isLoopInvariant(PtrSCEV, L);
+ if (!IsInvariant) {
+ auto *AddRec = dyn_cast<SCEVAddRecExpr>(PtrSCEV);
+ // Check to see if we have a repeating access pattern and it's possible
+ // to prove all accesses are well aligned.
+ if (!AddRec || AddRec->getLoop() != L || !AddRec->isAffine())
+ return false;
- auto *Step = dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(SE));
- if (!Step)
- return false;
+ auto *Step = dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(SE));
+ if (!Step)
+ return false;
- const APInt &EltSize = cast<SCEVConstant>(EltSizeSCEV)->getAPInt();
- // For the moment, restrict ourselves to the case where the access size is a
- // multiple of the requested alignment and the base is aligned.
- // TODO: generalize if a case found which warrants
- if (EltSize.urem(Alignment.value()) != 0)
- return false;
+ const APInt &EltSize = cast<SCEVConstant>(EltSizeSCEV)->getAPInt();
+ // For the moment, restrict ourselves to the case where the access size
+ // is a multiple of the requested alignment and the base is aligned.
+ // TODO: generalize if a case found which warrants
+ if (EltSize.urem(Alignment.value()) != 0)
+ return false;
- // TODO: Handle overlapping accesses.
- if (EltSize.ugt(Step->getAPInt().abs()))
- return false;
+ // TODO: Handle overlapping accesses.
+ if (EltSize.ugt(Step->getAPInt().abs()))
+ return false;
+ }
const SCEV *MaxBECount =
Predicates ? SE.getPredicatedSymbolicMaxBackedgeTakenCount(L, *Predicates)
@@ -372,8 +374,7 @@ bool llvm::isDereferenceableAndAlignedInLoop(
return false;
if (!LoopGuards)
- LoopGuards.emplace(
- ScalarEvolution::LoopGuards::collect(AddRec->getLoop(), SE));
+ LoopGuards.emplace(ScalarEvolution::LoopGuards::collect(L, SE));
APInt MaxPtrDiff =
SE.getUnsignedRangeMax(SE.applyLoopGuards(PtrDiff, *LoopGuards));
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 04abdac5ee680c..86ed0d4b1d9e4e 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6663,7 +6663,7 @@ VPlanPtr LoopVectorizationPlanner::tryToBuildVPlan(VPlanPtr Plan,
VPCostContext CostCtx(*TLI, *Plan, *CM, Config);
RUN_VPLAN_PASS(VPlanTransforms::makeMemOpWideningDecisions, *Plan, Range,
- RecipeBuilder, CostCtx);
+ RecipeBuilder, CostCtx, *DT);
RUN_VPLAN_PASS(VPlanTransforms::makeScalarizationDecisions, *Plan, Range);
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index 65186b7bdde4ac..b01bca3ec25bdd 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5489,7 +5489,8 @@ void VPlanTransforms::createPartialReductions(VPlan &Plan,
void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
VPRecipeBuilder &RecipeBuilder,
- VPCostContext &CostCtx) {
+ VPCostContext &CostCtx,
+ DominatorTree &DT) {
// Collect all loads/stores first. We will start with ones having simpler
// decisions followed by more complex ones that are potentially
// guided/dependent on the simpler ones.
@@ -5666,12 +5667,20 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
VPValue *Addr = VPI->getOperand(0);
if (!vputils::isUniformAcrossVFsAndUFs(Addr))
return false;
+ ScalarEvolution &SE = *CostCtx.PSE.getSE();
+ Loop *L = const_cast<Loop *>(CostCtx.L);
+ const SCEV *PtrSCEV =
+ vputils::getSCEVExprForVPValue(Addr, CostCtx.PSE, CostCtx.L);
+ if (isa<SCEVCouldNotCompute>(PtrSCEV))
+ return false;
+ const DataLayout &DL = Plan.getDataLayout();
+ Type *ScalarTy = VPI->getScalarType();
+ APInt EltSize(DL.getIndexTypeSizeInBits(Addr->getScalarType()),
+ DL.getTypeStoreSize(ScalarTy).getFixedValue());
auto &LI = cast<LoadInst>(*VPI->getUnderlyingInstr());
- Value *Underlying = Addr->getUnderlyingValue();
- if (!Underlying || !isSafeToLoadUnconditionally(
- Underlying, LI.getType(), LI.getAlign(),
- Plan.getDataLayout(), &LI,
- /*AC=*/nullptr, /*DT=*/nullptr, &CostCtx.TLI))
+
+ if (!isDereferenceableAndAlignedInLoop(
+ PtrSCEV, LI.getAlign(), SE.getConstant(EltSize), L, SE, DT))
return false;
auto *Recipe = VPBuilder::createSingleScalarOp(
VPI->getOpcode(), VPI->operandsWithoutMask(), /*Mask=*/nullptr,
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.h b/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
index 1c7b17942b7952..ece0043ec05d35 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
@@ -612,7 +612,8 @@ struct VPlanTransforms {
/// recipes. Non load/store input instructions are left unchanged.
static void makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
VPRecipeBuilder &RecipeBuilder,
- VPCostContext &CostCtx);
+ VPCostContext &CostCtx,
+ DominatorTree &DT);
/// Make VPlan-based scalarization decision prior to delegating to the ones
/// made by the legacy CM. Only transforms "usesFirstLaneOnly` def-use chains
diff --git a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
index 8ee6b2ea33c0f0..512eb59263cc8b 100644
--- a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
@@ -410,4 +410,3 @@ for.inc:
exit:
ret void
}
-
>From 8f3784eab7d73eb1154947e53f0ee6dffd6fef6b Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Fri, 28 Aug 2026 10:48:30 -0700
Subject: [PATCH 4/7] Rename to convertToSingleScalarMemOps
---
llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 5 +++--
.../LoopVectorize/VPlan/vplan-print-before-after-all.ll | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index b01bca3ec25bdd..0f09d3396e28ad 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5658,10 +5658,11 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
return ReplaceWith(VPI, StoreR);
});
- // Lower safe uniform (potentially masked) loads to unconditional scalar
+ // convert safe uniform (potentially masked) loads to unconditional scalar
// loads.
VPlanTransforms::runPass(
- "lowerSafeUniformLoads", ProcessSubset, Plan, [&](VPInstruction *VPI) {
+ "convertToSingleScalarMemOps", ProcessSubset, Plan,
+ [&](VPInstruction *VPI) {
if (VPI->getOpcode() != Instruction::Load)
return false;
VPValue *Addr = VPI->getOperand(0);
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
index d1dc1b85a2368e..2819470b08a11a 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
@@ -26,7 +26,7 @@
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] lowerMemoryIdioms
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] scalarizeMemOpsWithIrregularTypes
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] widenConsecutiveMemOps
-; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] lowerSafeUniformLoads
+; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] convertToSingleScalarMemOps
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] delegateMemOpWideningToLegacyCM
; CHECK-AFTER: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] VPlanTransforms::makeMemOpWideningDecisions
; CHECK: VPlan for loop in 'foo' [[BEFORE_OR_AFTER]] VPlanTransforms::makeScalarizationDecisions
>From d249f1e86c2433776840d8d93a423a19cf35d6af Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Tue, 1 Sep 2026 05:47:13 -0700
Subject: [PATCH 5/7] Update tests
---
.../LoopVectorize/uniform-gather.ll | 113 +++++++++++++++++-
1 file changed, 111 insertions(+), 2 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
index 512eb59263cc8b..400673ca8548b6 100644
--- a/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/uniform-gather.ll
@@ -2,8 +2,8 @@
; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 -force-target-supports-gather-scatter-ops=true -tail-folding-policy=must-fold-tail %s 2>&1 | FileCheck %s --check-prefix=FIXED
; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 -force-target-supports-gather-scatter-ops=true -tail-folding-policy=must-fold-tail -force-target-supports-scalable-vectors -scalable-vectorization=on %s 2>&1 | FileCheck %s --check-prefix=SCALABLE
- at log_table = internal constant [4 x i32] [i32 10, i32 20, i32 30, i32 40]
- at exp_table = internal constant [4 x i32] [i32 1, i32 2, i32 3, i32 4]
+ at log_table = external global [4 x i32]
+ at exp_table = external global [4 x i32]
; Uniform, dereferenceable global variable.
define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
@@ -410,3 +410,112 @@ for.inc:
exit:
ret void
}
+
+; An IR-based analysis would consider the second load safe to execute unconditionally,
+; since a previous load was already performed at that address.
+; Ensure we don't unmask the second load here.
+define void @load_safe_only_via_predicated_load(ptr noalias %out, ptr noalias %cond, ptr %p, i64 %n) {
+; FIXED-LABEL: define void @load_safe_only_via_predicated_load(
+; FIXED-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr [[P:%.*]], i64 [[N:%.*]]) {
+; FIXED-NEXT: [[ENTRY:.*:]]
+; FIXED-NEXT: br label %[[VECTOR_PH:.*]]
+; FIXED: [[VECTOR_PH]]:
+; FIXED-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], 1
+; FIXED-NEXT: [[TMP0:%.*]] = and i64 [[N_RND_UP]], 1
+; FIXED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]]
+; FIXED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x ptr> poison, ptr [[P]], i64 0
+; FIXED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x ptr> [[BROADCAST_SPLATINSERT1]], <2 x ptr> poison, <2 x i32> zeroinitializer
+; FIXED-NEXT: br label %[[VECTOR_BODY:.*]]
+; FIXED: [[VECTOR_BODY]]:
+; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; FIXED-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; FIXED-NEXT: [[TMP1:%.*]] = icmp ule <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; FIXED-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; FIXED-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <2 x i32> @llvm.masked.load.v2i32.p0(ptr align 4 [[TMP2]], <2 x i1> [[TMP1]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP3:%.*]] = icmp ne <2 x i32> [[WIDE_MASKED_LOAD]], zeroinitializer
+; FIXED-NEXT: [[TMP4:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP3]], <2 x i1> zeroinitializer
+; FIXED-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT2]], <2 x i1> [[TMP4]], <2 x i32> poison)
+; FIXED-NEXT: [[WIDE_MASKED_GATHER3:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> align 4 [[BROADCAST_SPLAT2]], <2 x i1> [[TMP4]], <2 x i32> poison)
+; FIXED-NEXT: [[TMP5:%.*]] = add <2 x i32> [[WIDE_MASKED_GATHER]], [[WIDE_MASKED_GATHER3]]
+; FIXED-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[OUT]], i64 [[INDEX]]
+; FIXED-NEXT: call void @llvm.masked.store.v2i32.p0(<2 x i32> [[TMP5]], ptr align 4 [[TMP6]], <2 x i1> [[TMP4]])
+; FIXED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2
+; FIXED-NEXT: [[VEC_IND_NEXT]] = add nuw <2 x i64> [[VEC_IND]], splat (i64 2)
+; FIXED-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; FIXED-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; FIXED: [[MIDDLE_BLOCK]]:
+; FIXED-NEXT: br label %[[EXIT:.*]]
+; FIXED: [[EXIT]]:
+; FIXED-NEXT: ret void
+;
+; SCALABLE-LABEL: define void @load_safe_only_via_predicated_load(
+; SCALABLE-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr [[P:%.*]], i64 [[N:%.*]]) {
+; SCALABLE-NEXT: [[ENTRY:.*:]]
+; SCALABLE-NEXT: br label %[[VECTOR_PH:.*]]
+; SCALABLE: [[VECTOR_PH]]:
+; SCALABLE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; SCALABLE-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1
+; SCALABLE-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], 1
+; SCALABLE-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP2]]
+; SCALABLE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]]
+; SCALABLE-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
+; SCALABLE-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[P]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+; SCALABLE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0
+; SCALABLE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT3]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; SCALABLE-NEXT: br label %[[VECTOR_BODY:.*]]
+; SCALABLE: [[VECTOR_BODY]]:
+; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; SCALABLE-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; SCALABLE-NEXT: [[TMP4:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; SCALABLE-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; SCALABLE-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr align 4 [[TMP5]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP6:%.*]] = icmp ne <vscale x 2 x i32> [[WIDE_MASKED_LOAD]], zeroinitializer
+; SCALABLE-NEXT: [[TMP7:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> [[TMP6]], <vscale x 2 x i1> zeroinitializer
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT2]], <vscale x 2 x i1> [[TMP7]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[WIDE_MASKED_GATHER5:%.*]] = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT2]], <vscale x 2 x i1> [[TMP7]], <vscale x 2 x i32> poison)
+; SCALABLE-NEXT: [[TMP8:%.*]] = add <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], [[WIDE_MASKED_GATHER5]]
+; SCALABLE-NEXT: [[TMP9:%.*]] = getelementptr i32, ptr [[OUT]], i64 [[INDEX]]
+; SCALABLE-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP8]], ptr align 4 [[TMP9]], <vscale x 2 x i1> [[TMP7]])
+; SCALABLE-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]]
+; SCALABLE-NEXT: [[VEC_IND_NEXT]] = add nuw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT4]]
+; SCALABLE-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; SCALABLE-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; SCALABLE: [[MIDDLE_BLOCK]]:
+; SCALABLE-NEXT: br label %[[EXIT:.*]]
+; SCALABLE: [[EXIT]]:
+; SCALABLE-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
+ %cond.gep = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %cond.gep, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %latch
+
+if.then:
+ %a = load i32, ptr %p, align 4
+ %b = load i32, ptr %p, align 4
+ %sum = add i32 %a, %b
+ %out.gep = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %sum, ptr %out.gep, align 4
+ br label %latch
+
+latch:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %n
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
>From e0885a6ebdc363dc74941dcd56e4acf647261bff Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Fri, 11 Sep 2026 00:22:07 -0700
Subject: [PATCH 6/7] Suppress speculative loads for sanitizers
---
llvm/include/llvm/Analysis/Loads.h | 7 ++++---
llvm/lib/Analysis/Loads.cpp | 6 +++---
llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 13 ++++++++++---
3 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/Analysis/Loads.h b/llvm/include/llvm/Analysis/Loads.h
index 22ce31d61ddb85..8408c98bdfc0ff 100644
--- a/llvm/include/llvm/Analysis/Loads.h
+++ b/llvm/include/llvm/Analysis/Loads.h
@@ -87,15 +87,16 @@ LLVM_ABI bool isSafeToLoadUnconditionally(Value *V, Align Alignment,
/// if desired.) This is more powerful than the variants above when the
/// address loaded from is analyzeable by SCEV.
LLVM_ABI bool isDereferenceableAndAlignedInLoop(
- LoadInst *LI, Loop *L, ScalarEvolution &SE, DominatorTree &DT,
+ LoadInst *LI, const Loop *L, ScalarEvolution &SE, DominatorTree &DT,
AssumptionCache *AC = nullptr,
SmallVectorImpl<const SCEVPredicate *> *Predicates = nullptr);
/// Overload for isDereferenceableAndAlignedInLoop taking the pointer and access
/// size directly as SCEVs.
LLVM_ABI bool isDereferenceableAndAlignedInLoop(
- const SCEV *PtrSCEV, Align Alignment, const SCEV *EltSizeSCEV, Loop *L,
- ScalarEvolution &SE, DominatorTree &DT, AssumptionCache *AC = nullptr,
+ const SCEV *PtrSCEV, Align Alignment, const SCEV *EltSizeSCEV,
+ const Loop *L, ScalarEvolution &SE, DominatorTree &DT,
+ AssumptionCache *AC = nullptr,
SmallVectorImpl<const SCEVPredicate *> *Predicates = nullptr);
/// Returns true if the loop contains read-only memory accesses and doesn't
diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp
index 5b970b34405411..65f96f24d33677 100644
--- a/llvm/lib/Analysis/Loads.cpp
+++ b/llvm/lib/Analysis/Loads.cpp
@@ -302,7 +302,7 @@ static bool AreEquivalentAddressValues(const Value *A, const Value *B) {
}
bool llvm::isDereferenceableAndAlignedInLoop(
- LoadInst *LI, Loop *L, ScalarEvolution &SE, DominatorTree &DT,
+ LoadInst *LI, const Loop *L, ScalarEvolution &SE, DominatorTree &DT,
AssumptionCache *AC, SmallVectorImpl<const SCEVPredicate *> *Predicates) {
auto &DL = LI->getDataLayout();
Value *Ptr = LI->getPointerOperand();
@@ -323,8 +323,8 @@ bool llvm::isDereferenceableAndAlignedInLoop(
}
bool llvm::isDereferenceableAndAlignedInLoop(
- const SCEV *PtrSCEV, Align Alignment, const SCEV *EltSizeSCEV, Loop *L,
- ScalarEvolution &SE, DominatorTree &DT, AssumptionCache *AC,
+ const SCEV *PtrSCEV, Align Alignment, const SCEV *EltSizeSCEV,
+ const Loop *L, ScalarEvolution &SE, DominatorTree &DT, AssumptionCache *AC,
SmallVectorImpl<const SCEVPredicate *> *Predicates) {
bool IsInvariant = SE.isLoopInvariant(PtrSCEV, L);
if (!IsInvariant) {
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index 0f09d3396e28ad..b24cf4d3c20b8d 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5669,7 +5669,6 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
if (!vputils::isUniformAcrossVFsAndUFs(Addr))
return false;
ScalarEvolution &SE = *CostCtx.PSE.getSE();
- Loop *L = const_cast<Loop *>(CostCtx.L);
const SCEV *PtrSCEV =
vputils::getSCEVExprForVPValue(Addr, CostCtx.PSE, CostCtx.L);
if (isa<SCEVCouldNotCompute>(PtrSCEV))
@@ -5680,8 +5679,16 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
DL.getTypeStoreSize(ScalarTy).getFixedValue());
auto &LI = cast<LoadInst>(*VPI->getUnderlyingInstr());
- if (!isDereferenceableAndAlignedInLoop(
- PtrSCEV, LI.getAlign(), SE.getConstant(EltSize), L, SE, DT))
+ // Suppress speculative loads for sanitizers.
+ const Function &F = *LI.getFunction();
+ if (F.hasFnAttribute(Attribute::SanitizeAddress) ||
+ F.hasFnAttribute(Attribute::SanitizeMemory) ||
+ F.hasFnAttribute(Attribute::SanitizeThread) ||
+ F.hasFnAttribute(Attribute::SanitizeHWAddress))
+ return false;
+ if (!isDereferenceableAndAlignedInLoop(PtrSCEV, LI.getAlign(),
+ SE.getConstant(EltSize),
+ CostCtx.L, SE, DT))
return false;
auto *Recipe = VPBuilder::createSingleScalarOp(
VPI->getOpcode(), VPI->operandsWithoutMask(), /*Mask=*/nullptr,
>From e9f62ab858fa05c1c3e3f1b31e3b57b634d9ea8f Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Wed, 16 Sep 2026 01:18:40 -0700
Subject: [PATCH 7/7] Pass AssumptionCache
---
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 2 +-
llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 5 +++--
llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 3 ++-
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 86ed0d4b1d9e4e..41be9bb60bd936 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6663,7 +6663,7 @@ VPlanPtr LoopVectorizationPlanner::tryToBuildVPlan(VPlanPtr Plan,
VPCostContext CostCtx(*TLI, *Plan, *CM, Config);
RUN_VPLAN_PASS(VPlanTransforms::makeMemOpWideningDecisions, *Plan, Range,
- RecipeBuilder, CostCtx, *DT);
+ RecipeBuilder, CostCtx, *DT, Legal->getAssumptionCache());
RUN_VPLAN_PASS(VPlanTransforms::makeScalarizationDecisions, *Plan, Range);
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index b24cf4d3c20b8d..1de7f390b98ed5 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5490,7 +5490,8 @@ void VPlanTransforms::createPartialReductions(VPlan &Plan,
void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
VPRecipeBuilder &RecipeBuilder,
VPCostContext &CostCtx,
- DominatorTree &DT) {
+ DominatorTree &DT,
+ AssumptionCache *AC) {
// Collect all loads/stores first. We will start with ones having simpler
// decisions followed by more complex ones that are potentially
// guided/dependent on the simpler ones.
@@ -5688,7 +5689,7 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
return false;
if (!isDereferenceableAndAlignedInLoop(PtrSCEV, LI.getAlign(),
SE.getConstant(EltSize),
- CostCtx.L, SE, DT))
+ CostCtx.L, SE, DT, AC))
return false;
auto *Recipe = VPBuilder::createSingleScalarOp(
VPI->getOpcode(), VPI->operandsWithoutMask(), /*Mask=*/nullptr,
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.h b/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
index ece0043ec05d35..cfe25590b36371 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.h
@@ -613,7 +613,8 @@ struct VPlanTransforms {
static void makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
VPRecipeBuilder &RecipeBuilder,
VPCostContext &CostCtx,
- DominatorTree &DT);
+ DominatorTree &DT,
+ AssumptionCache *AC);
/// Make VPlan-based scalarization decision prior to delegating to the ones
/// made by the legacy CM. Only transforms "usesFirstLaneOnly` def-use chains
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