[llvm] d3e5f97 - [RISCV] Replace decodeImmThreeOperand/decodeImmFourOperand with a template function. NFC (#223924)

[via llvm-commits]

Author: Craig Topper
Date: 2026-09-16T07:16:04Z
New Revision: d3e5f97569f0d058b4a58f5fab37e50f115e339d

URL: https://github.com/llvm/llvm-project/commit/d3e5f97569f0d058b4a58f5fab37e50f115e339d
DIFF: https://github.com/llvm/llvm-project/commit/d3e5f97569f0d058b4a58f5fab37e50f115e339d.diff

LOG: [RISCV] Replace decodeImmThreeOperand/decodeImmFourOperand with a template function. NFC (#223924)

Make the immediate a template argument that we can be provided in the
DecoderMethod name.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 90b37950a906e..0e0c22af3db8a 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -271,15 +271,10 @@ static DecodeStatus decodeVMaskReg(MCInst &Inst, uint32_t RegNo,
   return MCDisassembler::Success;
 }
 
-static DecodeStatus decodeImmThreeOperand(MCInst &Inst,
+template <int64_t Imm>
+static DecodeStatus decodeFixedImmOperand(MCInst &Inst,
                                           const MCDisassembler *Decoder) {
-  Inst.addOperand(MCOperand::createImm(3));
-  return MCDisassembler::Success;
-}
-
-static DecodeStatus decodeImmFourOperand(MCInst &Inst,
-                                         const MCDisassembler *Decoder) {
-  Inst.addOperand(MCOperand::createImm(4));
+  Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembler::Success;
 }
 

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
index 52b95393500f9..bc8fc8915b649 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
@@ -44,7 +44,7 @@ def ImmThreeAsmOperand : AsmOperandClass {
 def immthree : RISCVOp {
   let ParserMatchClass = ImmThreeAsmOperand;
   let OperandType = "OPERAND_THREE";
-  let DecoderMethod = "decodeImmThreeOperand";
+  let DecoderMethod = "decodeFixedImmOperand<3>";
 }
 
 def ImmFourAsmOperand : AsmOperandClass {
@@ -57,7 +57,7 @@ def ImmFourAsmOperand : AsmOperandClass {
 def immfour : RISCVOp {
   let ParserMatchClass = ImmFourAsmOperand;
   let OperandType = "OPERAND_FOUR";
-  let DecoderMethod = "decodeImmFourOperand";
+  let DecoderMethod = "decodeFixedImmOperand<4>";
 }
 
 def tuimm2 : TImmLeaf<XLenVT, [{return isUInt<2>(Imm);}]>;