[llvm] [RISCV] Merge zeroing stores into wider LMUL vector stores (PR #223908)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 15 22:16:19 PDT 2026
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@@ -217,8 +217,16 @@ class RISCVTargetLowering : public TargetLowering {
bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, unsigned NumElem,
unsigned AddrSpace) const override {
- // If we can replace 4 or more scalar stores, there will be a reduction
- // in instructions even after we add a vector constant load.
+ // A zero splat is free to materialize, so merging is a win once it
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lukel97 wrote:
Is this comment accurate? A zero splat isn't free since it needs a vmv.v.i
https://github.com/llvm/llvm-project/pull/223908
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