[llvm] [GlobalISel] Remove dead declarations and functions in CombinerHelper (NFC) (PR #223624)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 15 01:23:05 PDT 2026
https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/223624
CombinerHelper::getDataLayout: Added on July 25, 2024 in commit
db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73 without any callers.
CombinerHelper::tryCombineCopy: The last caller was removed on
September 24, 2023 in commit bc6e7f057340ab0b995cc17a170e34545a295f03.
CombinerHelper::matchCombineMergeUnmerge: The last use was removed on
January 30, 2026 in commit 369e78774aef11f8e1215bb41fdf8db138ce315e.
CombinerHelper::matchCombineAddP2IToPtrAdd,
CombinerHelper::applyCombineAddP2IToPtrAdd: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchCombineConstPtrAddToI2P,
CombinerHelper::applyCombineConstPtrAddToI2P: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchUndefSelectCmp: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
CombinerHelper::matchConstantOp: The last use was removed on
January 29, 2026 in commit d8d4096c0be07b993322d4f20bf82aaee498e578.
CombinerHelper::matchBinOpSameVal: The last use was removed on
September 2, 2026 in commit a7dc3296e484a0d92237e899cbce24dbbc7d0e45.
CombinerHelper::matchSimplifyAddToSub,
CombinerHelper::applySimplifyAddToSub: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchAddSubSameReg: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
>From 3211343b0c464e6173157c4d5f0568a649559c0c Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Mon, 14 Sep 2026 09:12:59 -0700
Subject: [PATCH] [GlobalISel] Remove dead declarations and functions in
CombinerHelper (NFC)
CombinerHelper::getDataLayout: Added on July 25, 2024 in commit
db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73 without any callers.
CombinerHelper::tryCombineCopy: The last caller was removed on
September 24, 2023 in commit bc6e7f057340ab0b995cc17a170e34545a295f03.
CombinerHelper::matchCombineMergeUnmerge: The last use was removed on
January 30, 2026 in commit 369e78774aef11f8e1215bb41fdf8db138ce315e.
CombinerHelper::matchCombineAddP2IToPtrAdd,
CombinerHelper::applyCombineAddP2IToPtrAdd: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchCombineConstPtrAddToI2P,
CombinerHelper::applyCombineConstPtrAddToI2P: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchUndefSelectCmp: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
CombinerHelper::matchConstantOp: The last use was removed on
January 29, 2026 in commit d8d4096c0be07b993322d4f20bf82aaee498e578.
CombinerHelper::matchBinOpSameVal: The last use was removed on
September 2, 2026 in commit a7dc3296e484a0d92237e899cbce24dbbc7d0e45.
CombinerHelper::matchSimplifyAddToSub,
CombinerHelper::applySimplifyAddToSub: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchAddSubSameReg: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
---
.../llvm/CodeGen/GlobalISel/CombinerHelper.h | 46 -----
.../lib/CodeGen/GlobalISel/CombinerHelper.cpp | 162 ------------------
2 files changed, 208 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index 6b80367d786a5..9f020ba7be528 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -147,8 +147,6 @@ class CombinerHelper {
LLVM_ABI const MachineFunction &getMachineFunction() const;
- LLVM_ABI const DataLayout &getDataLayout() const;
-
LLVM_ABI LLVMContext &getContext() const;
/// \returns true if the combiner is running pre-legalization.
@@ -200,9 +198,6 @@ class CombinerHelper {
/// This is the counterpart to getRegBank.
LLVM_ABI void setRegBank(Register Reg, const RegisterBank *RegBank) const;
- /// If \p MI is COPY, try to combine it.
- /// Returns true if MI changed.
- LLVM_ABI bool tryCombineCopy(MachineInstr &MI) const;
LLVM_ABI bool matchCombineCopy(MachineInstr &MI) const;
LLVM_ABI void applyCombineCopy(MachineInstr &MI) const;
@@ -406,10 +401,6 @@ class CombinerHelper {
LLVM_ABI void applyCombineShlOfExtend(MachineInstr &MI,
const RegisterImmPair &MatchData) const;
- /// Fold away a merge of an unmerge of the corresponding values.
- LLVM_ABI bool matchCombineMergeUnmerge(MachineInstr &MI,
- Register &MatchInfo) const;
-
/// Reduce a shift by a constant to an unmerge and a shift on a half sized
/// type. This will not produce a shift smaller than \p TargetShiftSize.
LLVM_ABI bool matchCombineShiftToUnmerge(MachineInstr &MI,
@@ -458,21 +449,6 @@ class CombinerHelper {
/// Transform PtrToInt(IntToPtr(x)) to x.
LLVM_ABI void applyCombineP2IToI2P(MachineInstr &MI, Register &Reg) const;
- /// Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y)
- /// Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)
- LLVM_ABI bool
- matchCombineAddP2IToPtrAdd(MachineInstr &MI,
- std::pair<Register, bool> &PtrRegAndCommute) const;
- LLVM_ABI void
- applyCombineAddP2IToPtrAdd(MachineInstr &MI,
- std::pair<Register, bool> &PtrRegAndCommute) const;
-
- // Transform G_PTR_ADD (G_PTRTOINT C1), C2 -> C1 + C2
- LLVM_ABI bool matchCombineConstPtrAddToI2P(MachineInstr &MI,
- APInt &NewCst) const;
- LLVM_ABI void applyCombineConstPtrAddToI2P(MachineInstr &MI,
- APInt &NewCst) const;
-
/// Transform anyext(trunc(x)) to x.
LLVM_ABI bool matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg) const;
@@ -503,9 +479,6 @@ class CombinerHelper {
/// Return true if a G_STORE instruction \p MI is storing an undef value.
LLVM_ABI bool matchUndefStore(MachineInstr &MI) const;
- /// Return true if a G_SELECT instruction \p MI has an undef comparison.
- LLVM_ABI bool matchUndefSelectCmp(MachineInstr &MI) const;
-
/// Return true if a G_{EXTRACT,INSERT}_VECTOR_ELT has an out of range index.
LLVM_ABI bool matchInsertExtractVecEltOutOfBounds(MachineInstr &MI) const;
@@ -546,10 +519,6 @@ class CombinerHelper {
LLVM_ABI bool matchEqualDefs(const MachineOperand &MOP1,
const MachineOperand &MOP2) const;
- /// Return true if \p MOP is defined by a G_CONSTANT or splat with a value equal to
- /// \p C.
- LLVM_ABI bool matchConstantOp(const MachineOperand &MOP, int64_t C) const;
-
/// Return true if \p MOP is defined by a G_FCONSTANT or splat with a value exactly
/// equal to \p C.
LLVM_ABI bool matchConstantFPOp(const MachineOperand &MOP, double C) const;
@@ -562,9 +531,6 @@ class CombinerHelper {
/// Optimize (cond ? x : x) -> x
LLVM_ABI bool matchSelectSameVal(MachineInstr &MI) const;
- /// Optimize (x op x) -> x
- LLVM_ABI bool matchBinOpSameVal(MachineInstr &MI) const;
-
/// Check if operand \p MO is known to be a power of 2. When \p OrNegative
/// is true, also match operands whose negation is a power of 2 (i.e. whose
/// absolute value is a power of 2).
@@ -575,14 +541,6 @@ class CombinerHelper {
/// Erase \p MI
LLVM_ABI void eraseInst(MachineInstr &MI) const;
- /// Return true if MI is a G_ADD which can be simplified to a G_SUB.
- LLVM_ABI bool
- matchSimplifyAddToSub(MachineInstr &MI,
- std::tuple<Register, Register> &MatchInfo) const;
- LLVM_ABI void
- applySimplifyAddToSub(MachineInstr &MI,
- std::tuple<Register, Register> &MatchInfo) const;
-
/// Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)`
LLVM_ABI bool matchBinopWithNeg(MachineInstr &MI, BuildFnTy &MatchInfo) const;
@@ -935,10 +893,6 @@ class CombinerHelper {
LLVM_ABI void
applyRepeatedFPDivisor(SmallVector<MachineInstr *> &MatchInfo) const;
- /// Transform G_ADD(x, G_SUB(y, x)) to y.
- /// Transform G_ADD(G_SUB(y, x), x) to y.
- LLVM_ABI bool matchAddSubSameReg(MachineInstr &MI, Register &Src) const;
-
LLVM_ABI bool matchBuildVectorIdentityFold(MachineInstr &MI,
Register &MatchInfo) const;
LLVM_ABI bool matchTruncBuildVectorFold(MachineInstr &MI,
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 47145f2cffa17..4dce66a74cacc 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -75,10 +75,6 @@ const MachineFunction &CombinerHelper::getMachineFunction() const {
return Builder.getMF();
}
-const DataLayout &CombinerHelper::getDataLayout() const {
- return getMachineFunction().getDataLayout();
-}
-
LLVMContext &CombinerHelper::getContext() const { return Builder.getContext(); }
/// \returns The little endian in-memory byte position of byte \p I in a
@@ -228,13 +224,6 @@ void CombinerHelper::setRegBank(Register Reg,
MRI.setRegBank(Reg, *RegBank);
}
-bool CombinerHelper::tryCombineCopy(MachineInstr &MI) const {
- if (matchCombineCopy(MI)) {
- applyCombineCopy(MI);
- return true;
- }
- return false;
-}
bool CombinerHelper::matchCombineCopy(MachineInstr &MI) const {
if (MI.getOpcode() != TargetOpcode::COPY)
return false;
@@ -2297,25 +2286,6 @@ void CombinerHelper::applyCombineShlOfExtend(
MI.eraseFromParent();
}
-bool CombinerHelper::matchCombineMergeUnmerge(MachineInstr &MI,
- Register &MatchInfo) const {
- GMerge &Merge = cast<GMerge>(MI);
- SmallVector<Register, 16> MergedValues;
- for (unsigned I = 0; I < Merge.getNumSources(); ++I)
- MergedValues.emplace_back(Merge.getSourceReg(I));
-
- auto *Unmerge = getOpcodeDef<GUnmerge>(MergedValues[0], MRI);
- if (!Unmerge || Unmerge->getNumDefs() != Merge.getNumSources())
- return false;
-
- for (unsigned I = 0; I < MergedValues.size(); ++I)
- if (MergedValues[I] != Unmerge->getReg(I))
- return false;
-
- MatchInfo = Unmerge->getSourceReg();
- return true;
-}
-
static Register peekThroughBitcast(Register Reg,
const MachineRegisterInfo &MRI) {
while (mi_match(Reg, MRI, m_GBitcast(m_Reg(Reg))))
@@ -2623,79 +2593,6 @@ void CombinerHelper::applyCombineP2IToI2P(MachineInstr &MI,
MI.eraseFromParent();
}
-bool CombinerHelper::matchCombineAddP2IToPtrAdd(
- MachineInstr &MI, std::pair<Register, bool> &PtrReg) const {
- assert(MI.getOpcode() == TargetOpcode::G_ADD);
- Register LHS = MI.getOperand(1).getReg();
- Register RHS = MI.getOperand(2).getReg();
- LLT IntTy = MRI.getType(LHS);
-
- // G_PTR_ADD always has the pointer in the LHS, so we may need to commute the
- // instruction.
- PtrReg.second = false;
- for (Register SrcReg : {LHS, RHS}) {
- if (mi_match(SrcReg, MRI, m_GPtrToInt(m_Reg(PtrReg.first)))) {
- // Don't handle cases where the integer is implicitly converted to the
- // pointer width.
- LLT PtrTy = MRI.getType(PtrReg.first);
- if (PtrTy.getScalarSizeInBits() == IntTy.getScalarSizeInBits())
- return true;
- }
-
- PtrReg.second = true;
- }
-
- return false;
-}
-
-void CombinerHelper::applyCombineAddP2IToPtrAdd(
- MachineInstr &MI, std::pair<Register, bool> &PtrReg) const {
- Register Dst = MI.getOperand(0).getReg();
- Register LHS = MI.getOperand(1).getReg();
- Register RHS = MI.getOperand(2).getReg();
-
- const bool DoCommute = PtrReg.second;
- if (DoCommute)
- std::swap(LHS, RHS);
- LHS = PtrReg.first;
-
- LLT PtrTy = MRI.getType(LHS);
-
- auto PtrAdd = Builder.buildPtrAdd(PtrTy, LHS, RHS);
- Builder.buildPtrToInt(Dst, PtrAdd);
- MI.eraseFromParent();
-}
-
-bool CombinerHelper::matchCombineConstPtrAddToI2P(MachineInstr &MI,
- APInt &NewCst) const {
- auto &PtrAdd = cast<GPtrAdd>(MI);
- Register LHS = PtrAdd.getBaseReg();
- Register RHS = PtrAdd.getOffsetReg();
- MachineRegisterInfo &MRI = Builder.getMF().getRegInfo();
-
- if (auto RHSCst = getIConstantVRegVal(RHS, MRI)) {
- APInt Cst;
- if (mi_match(LHS, MRI, m_GIntToPtr(m_ICst(Cst)))) {
- auto DstTy = MRI.getType(PtrAdd.getReg(0));
- // G_INTTOPTR uses zero-extension
- NewCst = Cst.zextOrTrunc(DstTy.getSizeInBits());
- NewCst += RHSCst->sextOrTrunc(DstTy.getSizeInBits());
- return true;
- }
- }
-
- return false;
-}
-
-void CombinerHelper::applyCombineConstPtrAddToI2P(MachineInstr &MI,
- APInt &NewCst) const {
- auto &PtrAdd = cast<GPtrAdd>(MI);
- Register Dst = PtrAdd.getReg(0);
-
- Builder.buildConstant(Dst, NewCst);
- PtrAdd.eraseFromParent();
-}
-
bool CombinerHelper::matchCombineAnyExtTrunc(MachineInstr &MI,
Register &Reg) const {
assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT");
@@ -2853,12 +2750,6 @@ bool CombinerHelper::matchUndefStore(MachineInstr &MI) const {
MRI);
}
-bool CombinerHelper::matchUndefSelectCmp(MachineInstr &MI) const {
- assert(MI.getOpcode() == TargetOpcode::G_SELECT);
- return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(),
- MRI);
-}
-
bool CombinerHelper::matchInsertExtractVecEltOutOfBounds(
MachineInstr &MI) const {
assert((MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT ||
@@ -2985,15 +2876,6 @@ bool CombinerHelper::matchEqualDefs(const MachineOperand &MOP1,
return false;
}
-bool CombinerHelper::matchConstantOp(const MachineOperand &MOP,
- int64_t C) const {
- if (!MOP.isReg())
- return false;
- auto MaybeCst = isConstantOrConstantSplatVector(MOP.getReg(), MRI);
- return MaybeCst && MaybeCst->getBitWidth() <= 64 &&
- MaybeCst->getSExtValue() == C;
-}
-
bool CombinerHelper::matchConstantFPOp(const MachineOperand &MOP,
double C) const {
if (!MOP.isReg())
@@ -3108,26 +2990,6 @@ void CombinerHelper::replaceInstWithUndef(MachineInstr &MI) const {
MI.eraseFromParent();
}
-bool CombinerHelper::matchSimplifyAddToSub(
- MachineInstr &MI, std::tuple<Register, Register> &MatchInfo) const {
- Register LHS = MI.getOperand(1).getReg();
- Register RHS = MI.getOperand(2).getReg();
- Register &NewLHS = std::get<0>(MatchInfo);
- Register &NewRHS = std::get<1>(MatchInfo);
-
- // Helper lambda to check for opportunities for
- // ((0-A) + B) -> B - A
- // (A + (0-B)) -> A - B
- auto CheckFold = [&](Register &MaybeSub, Register &MaybeNewLHS) {
- if (!mi_match(MaybeSub, MRI, m_Neg(m_Reg(NewRHS))))
- return false;
- NewLHS = MaybeNewLHS;
- return true;
- };
-
- return CheckFold(LHS, RHS) || CheckFold(RHS, LHS);
-}
-
bool CombinerHelper::matchCombineInsertVecElts(
MachineInstr &MI, SmallVectorImpl<Register> &MatchInfo) const {
assert(MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT &&
@@ -3193,14 +3055,6 @@ void CombinerHelper::applyCombineInsertVecElts(
MI.eraseFromParent();
}
-void CombinerHelper::applySimplifyAddToSub(
- MachineInstr &MI, std::tuple<Register, Register> &MatchInfo) const {
- Register SubLHS, SubRHS;
- std::tie(SubLHS, SubRHS) = MatchInfo;
- Builder.buildSub(MI.getOperand(0).getReg(), SubLHS, SubRHS);
- MI.eraseFromParent();
-}
-
bool CombinerHelper::matchBinopWithNegInner(Register MInner, Register Other,
unsigned RootOpc, Register Dst,
LLT Ty,
@@ -7079,22 +6933,6 @@ void CombinerHelper::applyRepeatedFPDivisor(
}
}
-bool CombinerHelper::matchAddSubSameReg(MachineInstr &MI, Register &Src) const {
- assert(MI.getOpcode() == TargetOpcode::G_ADD && "Expected a G_ADD");
- Register LHS = MI.getOperand(1).getReg();
- Register RHS = MI.getOperand(2).getReg();
-
- // Helper lambda to check for opportunities for
- // A + (B - A) -> B
- // (B - A) + A -> B
- auto CheckFold = [&](Register MaybeSub, Register MaybeSameReg) {
- Register Reg;
- return mi_match(MaybeSub, MRI, m_GSub(m_Reg(Src), m_Reg(Reg))) &&
- Reg == MaybeSameReg;
- };
- return CheckFold(LHS, RHS) || CheckFold(RHS, LHS);
-}
-
bool CombinerHelper::matchBuildVectorIdentityFold(MachineInstr &MI,
Register &MatchInfo) const {
// This combine folds the following patterns:
More information about the llvm-commits
mailing list