[llvm] [ARM][Disassembler] Add missing predicates when decoding Thumb barriers (PR #223540)

[via llvm-commits]

https://github.com/raaller created https://github.com/llvm/llvm-project/pull/223540

`DecodeThumb2BCCInstruction` omits predicate operands for Thumb barriers when the data-barrier feature is disabled, causing llvm-objdump --arch-name=thumb to abort.

Add the missing operands using the current IT state, with disassembler and llvm-objdump regression tests.

Fixes #193877

>From 5076c0917b41499a6197c55fa43841366ead1370 Mon Sep 17 00:00:00 2001
From: raaller <ralerrdirsardx at gmail.com>
Date: Tue, 15 Sep 2026 00:11:39 +0300
Subject: [PATCH] [ARM][Disassembler] Add missing predicates when decoding
 Thumb barriers

Without the data-barrier feature, Thumb ISB, DSB and DMB instructions can
be decoded by DecodeThumb2BCCInstruction. This path adds the barrier
option but omits the predicate operands, causing the operand-count check
to abort.

Decode the implicit predicate after the barrier option, using the current
IT state. Add disassembler coverage with and without the data-barrier
feature, including IT blocks, and an llvm-objdump regression test.

Fixes #193877
---
 .../ARM/Disassembler/ARMDisassembler.cpp      |  5 ++-
 .../ARM/thumb-barrier-predicates.txt          | 31 +++++++++++++++++++
 .../llvm-objdump/ELF/ARM/thumb-barriers.s     | 19 ++++++++++++
 3 files changed, 54 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/MC/Disassembler/ARM/thumb-barrier-predicates.txt
 create mode 100644 llvm/test/tools/llvm-objdump/ELF/ARM/thumb-barriers.s

diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 2fa07ee611d490..b365bd1a384566 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3952,7 +3952,10 @@ static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
     }
 
     unsigned imm = fieldFromInstruction(Insn, 0, 4);
-    return DecodeMemBarrierOption(Inst, imm, Address, Decoder);
+    if (!Check(S, DecodeMemBarrierOption(Inst, imm, Address, Decoder)))
+      return MCDisassembler::Fail;
+    DecodePredicateOperand(Inst, Decoder);
+    return S;
   }
 
   unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
diff --git a/llvm/test/MC/Disassembler/ARM/thumb-barrier-predicates.txt b/llvm/test/MC/Disassembler/ARM/thumb-barrier-predicates.txt
new file mode 100644
index 00000000000000..bd38f8b6620cd1
--- /dev/null
+++ b/llvm/test/MC/Disassembler/ARM/thumb-barrier-predicates.txt
@@ -0,0 +1,31 @@
+# RUN: llvm-mc -triple=thumb -mattr=+thumb2 -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=thumbv7a -mattr=-db -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=thumbv7a -disassemble < %s | FileCheck %s
+
+# Without the data-barrier feature, these instructions are decoded through
+# DecodeThumb2BCCInstruction. They still need their implicit predicate operands.
+
+# CHECK: dsb sy
+0xbf 0xf3 0x4f 0x8f
+# CHECK: dmb ish
+0xbf 0xf3 0x5b 0x8f
+# CHECK: isb sy
+0xbf 0xf3 0x6f 0x8f
+# CHECK: isb #0xa
+0xbf 0xf3 0x6a 0x8f
+
+# CHECK: it eq
+0x08 0xbf
+# CHECK: dsbeq sy
+0xbf 0xf3 0x4f 0x8f
+# CHECK: it ne
+0x18 0xbf
+# CHECK: dmbne ish
+0xbf 0xf3 0x5b 0x8f
+# CHECK: it eq
+0x08 0xbf
+# CHECK: isbeq sy
+0xbf 0xf3 0x6f 0x8f
+
+# CHECK: isb sy
+0xbf 0xf3 0x6f 0x8f
diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/thumb-barriers.s b/llvm/test/tools/llvm-objdump/ELF/ARM/thumb-barriers.s
new file mode 100644
index 00000000000000..d4906c8dd24796
--- /dev/null
+++ b/llvm/test/tools/llvm-objdump/ELF/ARM/thumb-barriers.s
@@ -0,0 +1,19 @@
+@ RUN: llvm-mc -triple=thumbv7m-none-eabi -filetype=obj %s -o %t.o
+@ RUN: llvm-objdump -D --arch-name=thumb %t.o | FileCheck %s
+@ RUN: llvm-objdump -D %t.o | FileCheck %s
+
+@ Check that overriding the architecture with generic Thumb still decodes
+@ barriers with all their operands, even without the data-barrier feature.
+
+.text
+.arch armv7-m
+.thumb
+foo:
+  isb sy
+  dsb sy
+  dmb sy
+
+@ CHECK-LABEL: <foo>:
+@ CHECK-NEXT: 0: f3bf 8f6f isb sy
+@ CHECK-NEXT: 4: f3bf 8f4f dsb sy
+@ CHECK-NEXT: 8: f3bf 8f5f dmb sy