[llvm] [MachineLateInstrsCleanup] Reuse redundant spill-slot reloads (PR #220180)

[via llvm-commits]

anupkum-sgs wrote:

Thanks for running SPEC2017.

I thought about assigning one vreg across dominated reloads and letting
regalloc split it later. The vregs created by the spiller are marked
RS_Done:

    ExtraInfo->setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);

RS_Done means there is nothing more to do with that live range except
assign it (or abort):

    /// There is nothing more we can do to this live range.  Abort compilation
    /// if it can't be assigned.
    RS_Done

Stages go assign ---> split ---> spill --> RS_Done.
To split those merged reloads we would have to send spill products back
through splitting. That goes against how stages work (see the LiveRangeStage
comment in RegAllocEvictionAdvisor.h):

    // Ranges produced by one of the stages skip the previous stages when they
    // are dequeued. This improves performance because we can skip interference
    // checks that are unlikely to give any results. It also guarantees that
    // the live range splitting algorithm terminates, something that is
    // otherwise hard to ensure.

If we did that, compile time could grow, and as that comment says it
becomes hard to ensure splitting still terminates.

https://github.com/llvm/llvm-project/pull/220180