[llvm] [VPlan] Preserve SSA in early exits (PR #201784)

[David Sherwood via llvm-commits]

================
@@ -3033,14 +3033,13 @@ getRecipesForUncountableExit(SmallVectorImpl<VPInstruction *> &Recipes,
   //   EMIT ir<%uncountable.addr> = getelementptr inbounds nuw ir<%pred>,ir<%iv>
   //   EMIT ir<%uncountable.val> = load ir<%uncountable.addr>
   //   EMIT ir<%uncountable.cond> = icmp sgt ir<%uncountable.val>, ir<500>
-  //   EMIT vp<%3> = masked-cond ir<%uncountable.cond>
----------------
david-arm wrote:

I was looking at the definition of the `MaskedCond` opcode in VPlan.h and sadly there doesn't seem to be any documentation for it. :( It looks like it's an artificial construct used as a marker for the vplan predicator? It then gets converted to concrete recipes later on. I guess it was added for tail-folding in combination with early exits?

Do we actually still need `MaskedCond` after this PR as it looks like you've removed a lot of the code related to it?

https://github.com/llvm/llvm-project/pull/201784