[llvm] [AMDGPU] Fold high-half 16-bit extracts into VOP3 op_sel (PR #222255)

[Madhur Kumar via llvm-commits]

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@@ -3,25 +3,22 @@
 ; RUN: llc -global-isel=1 -mtriple=amdgpu9.00 < %s | FileCheck -check-prefixes=GFX9-GISEL %s
 
 ; Scalar 16-bit VOP3 ternaries reading and writing the high half of a packed
-; register. On GFX9 v_fma_f16 and v_mad_legacy_f16 both support op_sel, so each
-; of these could be a single instruction, but SelectVOP3OpSel() does not set
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MadhurKumar004 wrote:

This is one of the test file which mentions the issue.

https://github.com/llvm/llvm-project/pull/222255