[llvm] f8c52ad - [TargetInstrInfo] Enable instruction size verification by default (#221687)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 14 00:20:08 PDT 2026
Author: Nikita Popov
Date: 2026-09-14T09:20:03+02:00
New Revision: f8c52ad174682e05e222c1456a9f3ad177cf464b
URL: https://github.com/llvm/llvm-project/commit/f8c52ad174682e05e222c1456a9f3ad177cf464b
DIFF: https://github.com/llvm/llvm-project/commit/f8c52ad174682e05e222c1456a9f3ad177cf464b.diff
LOG: [TargetInstrInfo] Enable instruction size verification by default (#221687)
Enable verification for instruction sizes by default. When emitting
machine code, this checks that the reported instruction size is not
smaller than the actual instruction size. Not under-reporting
instruction sizes is critical for any target that does branch relaxation
(or similar) on MIR.
The default allows over-estimating the size. Targets can opt-in to
precise instruction sizes if they want.
Exclude two instructions on ARM, which report incorrect sizes, but
fixing those sizes breaks the constant islands pass for some reason.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index f27261e7be1aa..eff16348a8bc0 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -450,7 +450,7 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
/// getInstSizeInBytes() should be verified.
virtual InstSizeVerifyMode
getInstSizeVerifyMode(const MachineInstr &MI) const {
- return InstSizeVerifyMode::NoVerify;
+ return InstSizeVerifyMode::AllowOverEstimate;
}
/// Return true if the instruction is as cheap as a move instruction.
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 94595ab2b338b..3ad5b3d45ce55 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -193,6 +193,15 @@ class ARMBaseInstrInfo : public ARMGenInstrInfo {
///
unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
+ InstSizeVerifyMode
+ getInstSizeVerifyMode(const MachineInstr &MI) const override {
+ // FIXME: These instructions report an incorrect size, but the ARM constant
+ // islands pass somehow depends on it being incorrect.
+ if (MI.getOpcode() == ARM::tTBB_JT || MI.getOpcode() == ARM::tTBH_JT)
+ return InstSizeVerifyMode::NoVerify;
+ return InstSizeVerifyMode::AllowOverEstimate;
+ }
+
Register isLoadFromStackSlot(const MachineInstr &MI,
int &FrameIndex) const override;
Register isStoreToStackSlot(const MachineInstr &MI,
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