[llvm] [X86] Respect denormal mode in f32-to-bf16 conversions (PR #221052)

[Matt Arsenault via llvm-commits]

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@@ -22831,6 +22831,57 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
   return DAG.getNode(X86ISD::VFPEXT, DL, VT, Res);
 }
 
+static bool hasCVTNEPS2BF16(const X86Subtarget &Subtarget) {
+  return (Subtarget.hasBF16() && Subtarget.hasVLX()) ||
+         Subtarget.hasAVXNECONVERT();
+}
+
+/// VCVTNEPS2BF16 always flushes input and output denormals to zero. Since f32
+/// and bf16 have the same exponent range, a normal f32 cannot produce a bf16
+/// denormal. The instruction is therefore valid when f32 input denormals are
+/// flushed while preserving their sign.
+static bool canUseCVTNEPS2BF16(const X86Subtarget &Subtarget,
+                               const SelectionDAG &DAG) {
+  return hasCVTNEPS2BF16(Subtarget) &&
+         DAG.getDenormalMode(MVT::f32).Input == DenormalMode::PreserveSign;
+}
+
+/// Round f32 values (scalar or vector) to bf16 using integer arithmetic,
+/// producing the bf16 bit pattern as i16 (or vXi16). This is round to nearest
+/// even, quiets NaNs and, unlike VCVTNEPS2BF16, handles denormals exactly. It
+/// mirrors the bf16 expansion in TargetLowering::expandFP_ROUND.
+static SDValue expandF32ToBF16Bits(SDValue Src, const SDLoc &DL,
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arsenm wrote:

This isn't x86 specific and should be in the general legalizer (isn't it already? I thought all of this was already implemented)

https://github.com/llvm/llvm-project/pull/221052