[llvm] [AMDGPU] Fix mode register intersection across predecessors (PR #222244)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 13 12:45:53 PDT 2026


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@@ -362,8 +362,9 @@ void SIModeRegister::processBlockPhase2(MachineBasicBlock &MBB,
   bool RevisitRequired = false;
   bool ExitSet = false;
   unsigned ThisBlock = MBB.getNumber();
-  if (MBB.pred_empty()) {
-    // There are no predecessors, so use the default starting status.
+  if (MBB.pred_empty() || MBB.isEntryBlock()) {
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arsenm wrote:

isEntryBlock is now redundant 

https://github.com/llvm/llvm-project/pull/222244


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