[llvm] [AArch64][SPIRV][GlobalISel] Migrate target-specific wip_match_opcode combines to MIR-pattern (PR #222903)

[Matt Arsenault via llvm-commits]

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@@ -251,15 +256,15 @@ def icmp_lowering : GICombineGroup<[adjust_icmp_imm, swap_icmp_operands]>;
 def extractvecelt_pairwise_add_matchdata : GIDefMatchData<"std::tuple<unsigned, LLT, Register>">;
 def extractvecelt_pairwise_add : GICombineRule<
   (defs root:$root, extractvecelt_pairwise_add_matchdata:$matchinfo),
-  (match (wip_match_opcode G_EXTRACT_VECTOR_ELT):$root,
+  (match (G_EXTRACT_VECTOR_ELT $dst, $src, $idx):$root,
           [{ return matchExtractVecEltPairwiseAdd(*${root}, MRI, ${matchinfo}); }]),
   (apply [{ applyExtractVecEltPairwiseAdd(*${root}, MRI, B, ${matchinfo}); }])
 >;
 
 def mul_const_matchdata : GIDefMatchData<"std::function<void(MachineIRBuilder&, Register)>">;
 def mul_const : GICombineRule<
   (defs root:$root, mul_const_matchdata:$matchinfo),
-  (match (wip_match_opcode G_MUL):$root,
+  (match (G_MUL $dst, $src1, $src2):$root,
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arsenm wrote:

I'd rather leave it alone if you aren't moving meaningful amounts of code into tablegen 

https://github.com/llvm/llvm-project/pull/222903