[llvm] [GlobalISel] [AArch64] Skip redundant shift amount masking during isel (PR #223136)

[Matt Arsenault via llvm-commits]

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@@ -3158,6 +3158,29 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
         MRI.setRegBank(Trunc.getReg(0), RBI.getRegBank(AArch64::GPRRegBankID));
         I.getOperand(2).setReg(Trunc.getReg(0));
       }
+
+      // Mirror tryShiftAmountMod from AArch64DAGToDAGISel.
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arsenm wrote:

Why is this manually done? Everything here could be done in tablegen, at worst with a complex pattern? 

https://github.com/llvm/llvm-project/pull/223136