[llvm] [AMDGPU] Follow up for Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #219755)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 13 04:49:21 PDT 2026
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@@ -3213,6 +3213,20 @@ def VOP_I64_I64_I32 : VOPProfile <[i64, i64, i32, untyped]>;
def VOP_I64_I32_I64 : VOPProfile <[i64, i32, i64, untyped]>;
def VOP_I64_I64_I64 : VOPProfile <[i64, i64, i64, untyped]>;
+// Signed 64-bit operand variants for arithmetic shift operations
+def VOP_I64_I64_I32_Signed : VOPProfile <[i64, i64, i32, untyped]> {
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arsenm wrote:
The 'Signed' is the I part, and applies to individual operands not the operation as a whole
https://github.com/llvm/llvm-project/pull/219755
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