[llvm] [AMDGPU] Follow up for Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #219755)

[Matt Arsenault via llvm-commits]

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@@ -464,7 +464,7 @@ class AMDGPUOperand : public MCParsedAsmOperand {
     return isSSrc_b16();
   }
 
-  bool isSSrc_b64() const {
+  bool isSSrc_u64() const {
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arsenm wrote:

Most instructions are "b64" instructions 

https://github.com/llvm/llvm-project/pull/219755