[llvm] [AMDGPU] Convert an i64 that fits in 32 bits from its low half (PR #223107)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 13 03:35:54 PDT 2026


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@@ -3674,6 +3674,15 @@ SDValue AMDGPUTargetLowering::lowerINT_TO_FPImpl(SDValue Op, SelectionDAG &DAG,
     return DAG.getNode(CvtOpc, DL, DestVT, Ext);
   }
 
+  // Narrow an i64 that fits in 32 bits.
+  if (SrcVT == MVT::i64 &&
+      (Signed ? DAG.ComputeNumSignBits(Src) > 32
+              : DAG.MaskedValueIsZero(Src, APInt::getHighBitsSet(64, 32)))) {
+    SDLoc DL(Op);
+    SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Src);
+    return DAG.getNode(CvtOpc, DL, DestVT, Trunc);
+  }
+
----------------
arsenm wrote:

I"d put it in DAGCombiner (or maybe even instcombine or aggressive instcombine) 

https://github.com/llvm/llvm-project/pull/223107


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