[llvm] [SelectionDAG] Remove unused float promotion in DAGTypeLegalizer (NFC) (PR #223219)

[Kazu Hirata via llvm-commits]

https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/223219

This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat.  The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.

The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.

With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.

Assisted-by: Antigravity


>From 47e5eb10532ddbb240d50753ddaca3a11bbe6383 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Sat, 12 Sep 2026 10:18:57 -0700
Subject: [PATCH] [SelectionDAG] Remove unused float promotion in
 DAGTypeLegalizer (NFC)

This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat.  The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.

The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.

With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.

Assisted-by: Antigravity
---
 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 17 +----------------
 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h   | 17 -----------------
 2 files changed, 1 insertion(+), 33 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index 74b81572b66922..4ed6d00416fe6c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -120,10 +120,8 @@ void DAGTypeLegalizer::PerformExpensiveChecks() {
           Mapped |= 64;
         if (WidenedVectors.count(ResId))
           Mapped |= 128;
-        if (PromotedFloats.count(ResId))
-          Mapped |= 256;
         if (SoftPromotedHalfs.count(ResId))
-          Mapped |= 512;
+          Mapped |= 256;
       }
 
       if (Node.getNodeId() != Processed) {
@@ -176,8 +174,6 @@ void DAGTypeLegalizer::PerformExpensiveChecks() {
         if (Mapped & 128)
           dbgs() << " WidenedVectors";
         if (Mapped & 256)
-          dbgs() << " PromotedFloats";
-        if (Mapped & 512)
           dbgs() << " SoftPromoteHalfs";
         dbgs() << "\n";
         llvm_unreachable(nullptr);
@@ -733,17 +729,6 @@ void DAGTypeLegalizer::SetSoftenedFloat(SDValue Op, SDValue Result) {
   OpIdEntry = getTableId(Result);
 }
 
-void DAGTypeLegalizer::SetPromotedFloat(SDValue Op, SDValue Result) {
-  assert(Result.getValueType() ==
-         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
-         "Invalid type for promoted float");
-  AnalyzeNewValue(Result);
-
-  auto &OpIdEntry = PromotedFloats[getTableId(Op)];
-  assert((OpIdEntry == 0) && "Node is already promoted!");
-  OpIdEntry = getTableId(Result);
-}
-
 void DAGTypeLegalizer::SetSoftPromotedHalf(SDValue Op, SDValue Result) {
   assert(Result.getValueType() == MVT::i16 &&
          "Invalid type for soft-promoted half");
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index d6d9617440fb70..6fc6d61c6a38df 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -104,10 +104,6 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
   /// indicates the converted value to use.
   SmallDenseMap<TableId, TableId, 8> SoftenedFloats;
 
-  /// For floating-point nodes that have a smaller precision than the smallest
-  /// supported precision, this map indicates what promoted value to use.
-  SmallDenseMap<TableId, TableId, 8> PromotedFloats;
-
   /// For floating-point nodes that have a smaller precision than the smallest
   /// supported precision, this map indicates the converted value to use.
   SmallDenseMap<TableId, TableId, 8> SoftPromotedHalfs;
@@ -190,7 +186,6 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
         PromotedIntegers.erase(OldId);
         ExpandedIntegers.erase(OldId);
         SoftenedFloats.erase(OldId);
-        PromotedFloats.erase(OldId);
         SoftPromotedHalfs.erase(OldId);
         ExpandedFloats.erase(OldId);
         ScalarizedVectors.erase(OldId);
@@ -749,18 +744,6 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
                                 ISD::CondCode &CCCode, const SDLoc &dl,
                                 SDValue &Chain, bool IsSignaling = false);
 
-  //===--------------------------------------------------------------------===//
-  // Float promotion support: LegalizeFloatTypes.cpp
-  //===--------------------------------------------------------------------===//
-
-  SDValue GetPromotedFloat(SDValue Op) {
-    TableId &PromotedId = PromotedFloats[getTableId(Op)];
-    SDValue PromotedOp = getSDValue(PromotedId);
-    assert(PromotedOp.getNode() && "Operand wasn't promoted?");
-    return PromotedOp;
-  }
-  void SetPromotedFloat(SDValue Op, SDValue Result);
-
   SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N);
 
   //===--------------------------------------------------------------------===//