[llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)

[Pedro Lobo via llvm-commits]

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@@ -4392,6 +4394,26 @@ void Verifier::visitShuffleVectorInst(ShuffleVectorInst &SV) {
   visitInstruction(SV);
 }
 
+void Verifier::visitBitInsertInst(BitInsertInst &BII) {
+  Check(BitInsertInst::isValidOperands(BII.getOperand(0), BII.getOperand(1),
+                                       BII.getOperand(2)),
+        "Invalid bitinsert operands!", &BII);
+  Check(DL.getTypeSizeInBits(BII.getOperand(0)->getType()) >=
+            DL.getTypeSizeInBits(BII.getOperand(1)->getType()),
+        "bitinsert val type cannot be wider than base type!", &BII);
+  visitInstruction(BII);
+}
+
+void Verifier::visitBitExtractInst(BitExtractInst &BEI) {
+  Check(BitExtractInst::isValidOperands(BEI.getType(), BEI.getOperand(0),
+                                        BEI.getOperand(1)),
+        "Invalid bitextract operands!", &BEI);
+  Check(DL.getTypeSizeInBits(BEI.getType()) <=
+            DL.getTypeSizeInBits(BEI.getOperand(0)->getType()),
+        "bitextract result type cannot be wider than source type!", &BEI);
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pedroclobo wrote:

Yes, I believe it does. `DataLayout::getTypeSizeInBits()` returns the pointer representation width, including non-address bits.

https://github.com/llvm/llvm-project/pull/200605