[llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)

[Anatoly Trosinenko via llvm-commits]

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@@ -10013,6 +10013,23 @@ AArch64InstrInfo::getOutliningCandidateInfo(
                                    ->getInfo<AArch64FunctionInfo>()
                                    ->getSignReturnAddressCondition();
   if (RASignCondition != SignReturnAddress::None) {
+    // Candidates that have Return Address Signing Hardening enabled are
+    // discarded.
+    //
+    // In its current form, the machine outliner does not preserve X16/X17
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atrosinenko wrote:

@kovdan01 For the record, X16 and X17 (a.k.a. IP0 and IP1) are quite [special](https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#use-of-ip0-and-ip1-by-the-linker) w.r.t. function calls. I wonder if they require special handling in the outliner even in absence of Return Address Authentication Hardening then. (This is out of scope of this PR, of course)

https://github.com/llvm/llvm-project/pull/176187