[llvm] [BOLT][RISCV] Preserve distinct IPLT entries for IFUNC aliases and fix RISC-V call targets (PR #222901)

[via llvm-commits]

================
@@ -2870,15 +2816,18 @@ bool RewriteInstance::analyzeRelocation(
     SkipVerification = (cantFail(Symbol.getType()) == SymbolRef::ST_Other);
     // Section symbols are marked as ST_Debug.
     IsSectionRelocation = (cantFail(Symbol.getType()) == SymbolRef::ST_Debug);
-    // Check for PLT entry registered with symbol name
-    // LLD may give a defined RISC-V IFUNC symbol the .iplt entry address.
-    // R_RISCV_CALL_PLT must still resolve it through the registered @PLT
-    // BinaryData instead of treating that symbol value as a normal function.
-    const bool IsRISCVIFuncPLT =
-        IsRISCV && RType == ELF::R_RISCV_CALL_PLT &&
+    // An IFUNC symbol can name its resolver rather than the IPLT entry.
+    // Decode the linked call target: aliases sharing a resolver can have
+    // different IPLT entries, so the symbol name cannot identify the entry.
+    const bool IsRISCVIFuncCall =
+        IsRISCV &&
+        (RType == ELF::R_RISCV_CALL || RType == ELF::R_RISCV_CALL_PLT) &&
         ELFSymbolRef(Symbol).getELFType() == ELF::STT_GNU_IFUNC;
-    if ((!SymbolAddress || IsRISCVIFuncPLT) && !IsWeakReference(Symbol) &&
-        (IsAArch64 || IsRISCV)) {
+    if (IsRISCVIFuncCall) {
+      SymbolAddress = truncateToSize(ExtractedValue - Addend + Rel.getOffset(),
+                                     BC->AsmInfo->getCodePointerSize());
+    } else if (!SymbolAddress && !IsWeakReference(Symbol) &&
+               (IsAArch64 || IsRISCV)) {
----------------
Thrrreeee wrote:

The ambiguity is not RISC-V-specific: the resolver address alone does not establish the mapping between IFUNC aliases and IPLT entries. BOLT already recovers direct call and tail-branch targets on x86-64 and AArch64 from the encoded branch displacements. For RISC-V AUIPC/JALR calls, symbolization uses the call relocation, so this change recovers the linked target during relocation analysis to identify the correct IPLT entry.

https://github.com/llvm/llvm-project/pull/222901