[llvm] [BOLT][RISCV] Preserve distinct IPLT entries for IFUNC aliases and fix RISC-V call targets (PR #222901)

via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 11 02:58:50 PDT 2026


================
@@ -532,27 +531,6 @@ static bool shouldDisassemble(const BinaryFunction &BF) {
   return !BF.isIgnored();
 }
 
-static void createRISCVIFuncResolverFunctions(BinaryContext &BC) {
-  assert(BC.isRISCV() && "expected RISC-V target");
-
-  for (const BinarySection &Section : BC.allocatableSections()) {
-    for (const Relocation &Rel : Section.dynamicRelocations()) {
-      if (!Rel.isIRelative() || !Rel.Addend ||
-          BC.getBinaryFunctionAtAddress(Rel.Addend))
-        continue;
-
-      ErrorOr<BinarySection &> ResolverSection =
-          BC.getSectionForAddress(Rel.Addend);
-      assert(ResolverSection &&
-             "cannot get section for address from IFUNC resolver");
-
-      const std::string FunctionName =
-          "__BOLT_IFUNC_RESOLVERat" + Twine::utohexstr(Rel.Addend).str();
-      BC.createBinaryFunction(FunctionName, *ResolverSection, Rel.Addend, 0);
-    }
-  }
-}
----------------
Thrrreeee wrote:

This function is primarily needed because `llvm-objcopy --discard-all %t.64` removes the **local resolver function symbol** or  the absence of the **local resolver function symbol** , causing BOLT to skip processing the corresponding IFUNC(report " **BOLT-WARNING: Expected BF to be presented as IFUNC resolver at  xxxx** " ). This issue affects x86, AArch64, and RV64.

Until we find a better solution, I think we should remove this implementation and skip these cases, consistent with the behavior on other architectures.


https://github.com/llvm/llvm-project/pull/222901


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