[llvm] [NVPTX] Add support for f32x2 mixed-precision add/sub (PR #221957)

[Rajat Bajpai via llvm-commits]

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@@ -181,6 +181,7 @@ def hasTensormapReplaceSupport : SubtargetPredicate;
 //  - TMA S2G im2col_w mode support
 //  - tcgen05.commit shared mem A variants.
 //  - conversions involving ue5m3x2
+//  - f16x2/bf16x2 mixed precision support
 def hasRubinFamilySupport : PredOr<[SM107f]>;
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rajatbajpai wrote:

Thanks, Srini. It's fine.

There are two possible futures:
1. These instructions are extended to newer architecture families.
2. These instructions remain Rubin-only.

In the first case, both approaches would require updating the predicates. In the second case, not having separate predicates saves us from carrying redundant predicates.

https://github.com/llvm/llvm-project/pull/221957