[llvm] [SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (PR #222755)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 11 00:03:15 PDT 2026
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/222755
>From 9b62223f5fb743e3abf01bac10cd6bbf42711ae5 Mon Sep 17 00:00:00 2001
From: Florian Hahn <flo at fhahn.com>
Date: Thu, 10 Sep 2026 20:54:09 +0100
Subject: [PATCH 1/3] [SLP] Precommit tests
---
.../AArch64/operand-chains-max-reg-vf.ll | 86 +++++++++++++++++++
1 file changed, 86 insertions(+)
create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
new file mode 100644
index 0000000000000..2cccd063a8631
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
@@ -0,0 +1,86 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=slp-vectorizer -mtriple=aarch64 -S %s | FileCheck %s
+
+define void @call_operands_wider_than_reg(ptr %p, ptr %q) {
+; CHECK-LABEL: define void @call_operands_wider_than_reg(
+; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 0
+; CHECK-NEXT: [[Q_0:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 0
+; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr [[P_0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr [[Q_0]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = add <8 x i32> [[TMP0]], [[TMP1]]
+; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0
+; CHECK-NEXT: call void @f(i32 [[TMP6]])
+; CHECK-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1
+; CHECK-NEXT: call void @f(i32 [[TMP7]])
+; CHECK-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2
+; CHECK-NEXT: call void @g(i32 [[TMP8]])
+; CHECK-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3
+; CHECK-NEXT: call void @g(i32 [[TMP9]])
+; CHECK-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4
+; CHECK-NEXT: call void @h(i32 [[TMP10]])
+; CHECK-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5
+; CHECK-NEXT: call void @h(i32 [[TMP11]])
+; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6
+; CHECK-NEXT: call void @k(i32 [[TMP12]])
+; CHECK-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7
+; CHECK-NEXT: call void @k(i32 [[TMP13]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %p.0 = getelementptr inbounds i32, ptr %p, i64 0
+ %p.1 = getelementptr inbounds i32, ptr %p, i64 1
+ %p.2 = getelementptr inbounds i32, ptr %p, i64 2
+ %p.3 = getelementptr inbounds i32, ptr %p, i64 3
+ %p.4 = getelementptr inbounds i32, ptr %p, i64 4
+ %p.5 = getelementptr inbounds i32, ptr %p, i64 5
+ %p.6 = getelementptr inbounds i32, ptr %p, i64 6
+ %p.7 = getelementptr inbounds i32, ptr %p, i64 7
+ %q.0 = getelementptr inbounds i32, ptr %q, i64 0
+ %q.1 = getelementptr inbounds i32, ptr %q, i64 1
+ %q.2 = getelementptr inbounds i32, ptr %q, i64 2
+ %q.3 = getelementptr inbounds i32, ptr %q, i64 3
+ %q.4 = getelementptr inbounds i32, ptr %q, i64 4
+ %q.5 = getelementptr inbounds i32, ptr %q, i64 5
+ %q.6 = getelementptr inbounds i32, ptr %q, i64 6
+ %q.7 = getelementptr inbounds i32, ptr %q, i64 7
+ %l.0 = load i32, ptr %p.0
+ %r.0 = load i32, ptr %q.0
+ %add.0 = add i32 %l.0, %r.0
+ %l.1 = load i32, ptr %p.1
+ %r.1 = load i32, ptr %q.1
+ %add.1 = add i32 %l.1, %r.1
+ %l.2 = load i32, ptr %p.2
+ %r.2 = load i32, ptr %q.2
+ %add.2 = add i32 %l.2, %r.2
+ %l.3 = load i32, ptr %p.3
+ %r.3 = load i32, ptr %q.3
+ %add.3 = add i32 %l.3, %r.3
+ %l.4 = load i32, ptr %p.4
+ %r.4 = load i32, ptr %q.4
+ %add.4 = add i32 %l.4, %r.4
+ %l.5 = load i32, ptr %p.5
+ %r.5 = load i32, ptr %q.5
+ %add.5 = add i32 %l.5, %r.5
+ %l.6 = load i32, ptr %p.6
+ %r.6 = load i32, ptr %q.6
+ %add.6 = add i32 %l.6, %r.6
+ %l.7 = load i32, ptr %p.7
+ %r.7 = load i32, ptr %q.7
+ %add.7 = add i32 %l.7, %r.7
+ call void @f(i32 %add.0)
+ call void @f(i32 %add.1)
+ call void @g(i32 %add.2)
+ call void @g(i32 %add.3)
+ call void @h(i32 %add.4)
+ call void @h(i32 %add.5)
+ call void @k(i32 %add.6)
+ call void @k(i32 %add.7)
+ ret void
+}
+
+declare void @f(i32)
+declare void @g(i32)
+declare void @h(i32)
+declare void @k(i32)
>From ff684340fe69976d66544eb74745086c658f4914 Mon Sep 17 00:00:00 2001
From: Florian Hahn <flo at fhahn.com>
Date: Thu, 10 Sep 2026 18:14:20 +0100
Subject: [PATCH 2/3] [SLP] Limit second pass to register VF in
vectorizeNonVectorizableInsts.
The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.
This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.
For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.
On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.
---
.../Transforms/Vectorize/SLPVectorizer.cpp | 5 +++-
.../AArch64/operand-chains-max-reg-vf.ll | 27 +++++++++++--------
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 28e665c4c07cf..f92fa516630de 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -33365,7 +33365,10 @@ bool SLPVectorizerPass::vectorizeNonVectorizableInsts(
Changed |= tryToVectorizeSequence<Value>(
Operands, OperandSorter, AreCompatibleOperands,
[this, &R](ArrayRef<Value *> Candidates, bool MaxVFOnly) {
- return tryToVectorizeList(Candidates, R, MaxVFOnly);
+ // Limit to StandaloneSeeds if !MaxVFOnly to avoid quadratic scan for
+ // large set of candidates.
+ return tryToVectorizeList(Candidates, R, MaxVFOnly,
+ /*StandaloneSeeds=*/!MaxVFOnly);
},
/*MaxVFOnly=*/true, R);
return Changed;
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
index 2cccd063a8631..5a08a24001cfc 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
@@ -6,25 +6,30 @@ define void @call_operands_wider_than_reg(ptr %p, ptr %q) {
; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 0
+; CHECK-NEXT: [[P_4:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 4
; CHECK-NEXT: [[Q_0:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 0
-; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr [[P_0]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr [[Q_0]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = add <8 x i32> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0
+; CHECK-NEXT: [[Q_4:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 4
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P_0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[Q_0]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[TMP0]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[P_4]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[Q_4]], align 4
+; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i64 0
; CHECK-NEXT: call void @f(i32 [[TMP6]])
-; CHECK-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1
+; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP2]], i64 1
; CHECK-NEXT: call void @f(i32 [[TMP7]])
-; CHECK-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2
+; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP2]], i64 2
; CHECK-NEXT: call void @g(i32 [[TMP8]])
-; CHECK-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3
+; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP2]], i64 3
; CHECK-NEXT: call void @g(i32 [[TMP9]])
-; CHECK-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4
+; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP5]], i64 0
; CHECK-NEXT: call void @h(i32 [[TMP10]])
-; CHECK-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5
+; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[TMP5]], i64 1
; CHECK-NEXT: call void @h(i32 [[TMP11]])
-; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6
+; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP5]], i64 2
; CHECK-NEXT: call void @k(i32 [[TMP12]])
-; CHECK-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7
+; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i32> [[TMP5]], i64 3
; CHECK-NEXT: call void @k(i32 [[TMP13]])
; CHECK-NEXT: ret void
;
>From 2a0c543fe6345969f804d5e0c1bfe3a066ea9304 Mon Sep 17 00:00:00 2001
From: Florian Hahn <flo at fhahn.com>
Date: Thu, 10 Sep 2026 22:10:22 +0100
Subject: [PATCH 3/3] !fixup introduce limit
---
.../Transforms/Vectorize/SLPVectorizer.cpp | 4 +-
.../AArch64/operand-chains-max-reg-vf.ll | 292 ++++++++++++++++--
2 files changed, 271 insertions(+), 25 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index f92fa516630de..a42856400eaa0 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -33362,13 +33362,15 @@ bool SLPVectorizerPass::vectorizeNonVectorizableInsts(
}
if (Operands.size() <= 1)
return Changed;
+ constexpr unsigned Limit = 32;
Changed |= tryToVectorizeSequence<Value>(
Operands, OperandSorter, AreCompatibleOperands,
[this, &R](ArrayRef<Value *> Candidates, bool MaxVFOnly) {
// Limit to StandaloneSeeds if !MaxVFOnly to avoid quadratic scan for
// large set of candidates.
return tryToVectorizeList(Candidates, R, MaxVFOnly,
- /*StandaloneSeeds=*/!MaxVFOnly);
+ /*StandaloneSeeds=*/!MaxVFOnly &&
+ Candidates.size() >= Limit);
},
/*MaxVFOnly=*/true, R);
return Changed;
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
index 5a08a24001cfc..62ad213bc4184 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
@@ -2,35 +2,31 @@
; RUN: opt -passes=slp-vectorizer -mtriple=aarch64 -S %s | FileCheck %s
define void @call_operands_wider_than_reg(ptr %p, ptr %q) {
+;
; CHECK-LABEL: define void @call_operands_wider_than_reg(
; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 0
-; CHECK-NEXT: [[P_4:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 4
; CHECK-NEXT: [[Q_0:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 0
-; CHECK-NEXT: [[Q_4:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 4
-; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P_0]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[Q_0]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[P_4]], align 4
-; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[Q_4]], align 4
-; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP3]], [[TMP4]]
-; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i64 0
-; CHECK-NEXT: call void @f(i32 [[TMP6]])
-; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP2]], i64 1
-; CHECK-NEXT: call void @f(i32 [[TMP7]])
-; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP2]], i64 2
-; CHECK-NEXT: call void @g(i32 [[TMP8]])
-; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP2]], i64 3
-; CHECK-NEXT: call void @g(i32 [[TMP9]])
-; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP5]], i64 0
-; CHECK-NEXT: call void @h(i32 [[TMP10]])
-; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[TMP5]], i64 1
-; CHECK-NEXT: call void @h(i32 [[TMP11]])
-; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP5]], i64 2
-; CHECK-NEXT: call void @k(i32 [[TMP12]])
-; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i32> [[TMP5]], i64 3
-; CHECK-NEXT: call void @k(i32 [[TMP13]])
+; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr [[P_0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr [[Q_0]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = add <8 x i32> [[TMP0]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0
+; CHECK-NEXT: call void @f(i32 [[TMP3]])
+; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1
+; CHECK-NEXT: call void @f(i32 [[TMP4]])
+; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2
+; CHECK-NEXT: call void @g(i32 [[TMP5]])
+; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3
+; CHECK-NEXT: call void @g(i32 [[TMP6]])
+; CHECK-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4
+; CHECK-NEXT: call void @h(i32 [[TMP7]])
+; CHECK-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5
+; CHECK-NEXT: call void @h(i32 [[TMP8]])
+; CHECK-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6
+; CHECK-NEXT: call void @k(i32 [[TMP9]])
+; CHECK-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7
+; CHECK-NEXT: call void @k(i32 [[TMP10]])
; CHECK-NEXT: ret void
;
entry:
@@ -85,7 +81,255 @@ entry:
ret void
}
+define void @many_call_operands_limited_to_reg_vf(ptr %p, ptr %q) {
+; CHECK-LABEL: define void @many_call_operands_limited_to_reg_vf(
+; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 0
+; CHECK-NEXT: [[P_4:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 4
+; CHECK-NEXT: [[P_8:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 8
+; CHECK-NEXT: [[P_12:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 12
+; CHECK-NEXT: [[P_16:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 16
+; CHECK-NEXT: [[P_20:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 20
+; CHECK-NEXT: [[P_24:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 24
+; CHECK-NEXT: [[P_28:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 28
+; CHECK-NEXT: [[Q_0:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 0
+; CHECK-NEXT: [[Q_4:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 4
+; CHECK-NEXT: [[Q_8:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 8
+; CHECK-NEXT: [[Q_12:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 12
+; CHECK-NEXT: [[Q_16:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 16
+; CHECK-NEXT: [[Q_20:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 20
+; CHECK-NEXT: [[Q_24:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 24
+; CHECK-NEXT: [[Q_28:%.*]] = getelementptr inbounds i32, ptr [[Q]], i64 28
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P_0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[Q_0]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[TMP0]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[P_4]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[Q_4]], align 4
+; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP3]], [[TMP4]]
+; CHECK-NEXT: [[TMP6:%.*]] = load <4 x i32>, ptr [[P_8]], align 4
+; CHECK-NEXT: [[TMP7:%.*]] = load <4 x i32>, ptr [[Q_8]], align 4
+; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i32> [[TMP6]], [[TMP7]]
+; CHECK-NEXT: [[TMP9:%.*]] = load <4 x i32>, ptr [[P_12]], align 4
+; CHECK-NEXT: [[TMP10:%.*]] = load <4 x i32>, ptr [[Q_12]], align 4
+; CHECK-NEXT: [[TMP11:%.*]] = add <4 x i32> [[TMP9]], [[TMP10]]
+; CHECK-NEXT: [[TMP12:%.*]] = load <4 x i32>, ptr [[P_16]], align 4
+; CHECK-NEXT: [[TMP13:%.*]] = load <4 x i32>, ptr [[Q_16]], align 4
+; CHECK-NEXT: [[TMP14:%.*]] = add <4 x i32> [[TMP12]], [[TMP13]]
+; CHECK-NEXT: [[TMP15:%.*]] = load <4 x i32>, ptr [[P_20]], align 4
+; CHECK-NEXT: [[TMP16:%.*]] = load <4 x i32>, ptr [[Q_20]], align 4
+; CHECK-NEXT: [[TMP17:%.*]] = add <4 x i32> [[TMP15]], [[TMP16]]
+; CHECK-NEXT: [[TMP18:%.*]] = load <4 x i32>, ptr [[P_24]], align 4
+; CHECK-NEXT: [[TMP19:%.*]] = load <4 x i32>, ptr [[Q_24]], align 4
+; CHECK-NEXT: [[TMP20:%.*]] = add <4 x i32> [[TMP18]], [[TMP19]]
+; CHECK-NEXT: [[TMP21:%.*]] = load <4 x i32>, ptr [[P_28]], align 4
+; CHECK-NEXT: [[TMP22:%.*]] = load <4 x i32>, ptr [[Q_28]], align 4
+; CHECK-NEXT: [[TMP23:%.*]] = add <4 x i32> [[TMP21]], [[TMP22]]
+; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP2]], i64 0
+; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP2]], i64 1
+; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP2]], i64 2
+; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP2]], i64 3
+; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP5]], i64 0
+; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[TMP5]], i64 1
+; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP5]], i64 2
+; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i32> [[TMP5]], i64 3
+; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x i32> [[TMP8]], i64 0
+; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i32> [[TMP8]], i64 1
+; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x i32> [[TMP8]], i64 2
+; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x i32> [[TMP8]], i64 3
+; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x i32> [[TMP11]], i64 0
+; CHECK-NEXT: [[TMP37:%.*]] = extractelement <4 x i32> [[TMP11]], i64 1
+; CHECK-NEXT: [[TMP38:%.*]] = extractelement <4 x i32> [[TMP11]], i64 2
+; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3
+; CHECK-NEXT: call void @f16(i32 [[TMP24]], i32 [[TMP25]], i32 [[TMP26]], i32 [[TMP27]], i32 [[TMP28]], i32 [[TMP29]], i32 [[TMP30]], i32 [[TMP31]], i32 [[TMP32]], i32 [[TMP33]], i32 [[TMP34]], i32 [[TMP35]], i32 [[TMP36]], i32 [[TMP37]], i32 [[TMP38]], i32 [[TMP39]])
+; CHECK-NEXT: [[TMP40:%.*]] = extractelement <4 x i32> [[TMP14]], i64 0
+; CHECK-NEXT: [[TMP41:%.*]] = extractelement <4 x i32> [[TMP14]], i64 1
+; CHECK-NEXT: [[TMP42:%.*]] = extractelement <4 x i32> [[TMP14]], i64 2
+; CHECK-NEXT: [[TMP43:%.*]] = extractelement <4 x i32> [[TMP14]], i64 3
+; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x i32> [[TMP17]], i64 0
+; CHECK-NEXT: [[TMP45:%.*]] = extractelement <4 x i32> [[TMP17]], i64 1
+; CHECK-NEXT: [[TMP46:%.*]] = extractelement <4 x i32> [[TMP17]], i64 2
+; CHECK-NEXT: [[TMP47:%.*]] = extractelement <4 x i32> [[TMP17]], i64 3
+; CHECK-NEXT: [[TMP48:%.*]] = extractelement <4 x i32> [[TMP20]], i64 0
+; CHECK-NEXT: [[TMP49:%.*]] = extractelement <4 x i32> [[TMP20]], i64 1
+; CHECK-NEXT: [[TMP50:%.*]] = extractelement <4 x i32> [[TMP20]], i64 2
+; CHECK-NEXT: [[TMP51:%.*]] = extractelement <4 x i32> [[TMP20]], i64 3
+; CHECK-NEXT: [[TMP52:%.*]] = extractelement <4 x i32> [[TMP23]], i64 0
+; CHECK-NEXT: [[TMP53:%.*]] = extractelement <4 x i32> [[TMP23]], i64 1
+; CHECK-NEXT: [[TMP54:%.*]] = extractelement <4 x i32> [[TMP23]], i64 2
+; CHECK-NEXT: [[TMP55:%.*]] = extractelement <4 x i32> [[TMP23]], i64 3
+; CHECK-NEXT: call void @g16(i32 [[TMP40]], i32 [[TMP41]], i32 [[TMP42]], i32 [[TMP43]], i32 [[TMP44]], i32 [[TMP45]], i32 [[TMP46]], i32 [[TMP47]], i32 [[TMP48]], i32 [[TMP49]], i32 [[TMP50]], i32 [[TMP51]], i32 [[TMP52]], i32 [[TMP53]], i32 [[TMP54]], i32 [[TMP55]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %p.0 = getelementptr inbounds i32, ptr %p, i64 0
+ %p.1 = getelementptr inbounds i32, ptr %p, i64 1
+ %p.2 = getelementptr inbounds i32, ptr %p, i64 2
+ %p.3 = getelementptr inbounds i32, ptr %p, i64 3
+ %p.4 = getelementptr inbounds i32, ptr %p, i64 4
+ %p.5 = getelementptr inbounds i32, ptr %p, i64 5
+ %p.6 = getelementptr inbounds i32, ptr %p, i64 6
+ %p.7 = getelementptr inbounds i32, ptr %p, i64 7
+ %p.8 = getelementptr inbounds i32, ptr %p, i64 8
+ %p.9 = getelementptr inbounds i32, ptr %p, i64 9
+ %p.10 = getelementptr inbounds i32, ptr %p, i64 10
+ %p.11 = getelementptr inbounds i32, ptr %p, i64 11
+ %p.12 = getelementptr inbounds i32, ptr %p, i64 12
+ %p.13 = getelementptr inbounds i32, ptr %p, i64 13
+ %p.14 = getelementptr inbounds i32, ptr %p, i64 14
+ %p.15 = getelementptr inbounds i32, ptr %p, i64 15
+ %p.16 = getelementptr inbounds i32, ptr %p, i64 16
+ %p.17 = getelementptr inbounds i32, ptr %p, i64 17
+ %p.18 = getelementptr inbounds i32, ptr %p, i64 18
+ %p.19 = getelementptr inbounds i32, ptr %p, i64 19
+ %p.20 = getelementptr inbounds i32, ptr %p, i64 20
+ %p.21 = getelementptr inbounds i32, ptr %p, i64 21
+ %p.22 = getelementptr inbounds i32, ptr %p, i64 22
+ %p.23 = getelementptr inbounds i32, ptr %p, i64 23
+ %p.24 = getelementptr inbounds i32, ptr %p, i64 24
+ %p.25 = getelementptr inbounds i32, ptr %p, i64 25
+ %p.26 = getelementptr inbounds i32, ptr %p, i64 26
+ %p.27 = getelementptr inbounds i32, ptr %p, i64 27
+ %p.28 = getelementptr inbounds i32, ptr %p, i64 28
+ %p.29 = getelementptr inbounds i32, ptr %p, i64 29
+ %p.30 = getelementptr inbounds i32, ptr %p, i64 30
+ %p.31 = getelementptr inbounds i32, ptr %p, i64 31
+ %q.0 = getelementptr inbounds i32, ptr %q, i64 0
+ %q.1 = getelementptr inbounds i32, ptr %q, i64 1
+ %q.2 = getelementptr inbounds i32, ptr %q, i64 2
+ %q.3 = getelementptr inbounds i32, ptr %q, i64 3
+ %q.4 = getelementptr inbounds i32, ptr %q, i64 4
+ %q.5 = getelementptr inbounds i32, ptr %q, i64 5
+ %q.6 = getelementptr inbounds i32, ptr %q, i64 6
+ %q.7 = getelementptr inbounds i32, ptr %q, i64 7
+ %q.8 = getelementptr inbounds i32, ptr %q, i64 8
+ %q.9 = getelementptr inbounds i32, ptr %q, i64 9
+ %q.10 = getelementptr inbounds i32, ptr %q, i64 10
+ %q.11 = getelementptr inbounds i32, ptr %q, i64 11
+ %q.12 = getelementptr inbounds i32, ptr %q, i64 12
+ %q.13 = getelementptr inbounds i32, ptr %q, i64 13
+ %q.14 = getelementptr inbounds i32, ptr %q, i64 14
+ %q.15 = getelementptr inbounds i32, ptr %q, i64 15
+ %q.16 = getelementptr inbounds i32, ptr %q, i64 16
+ %q.17 = getelementptr inbounds i32, ptr %q, i64 17
+ %q.18 = getelementptr inbounds i32, ptr %q, i64 18
+ %q.19 = getelementptr inbounds i32, ptr %q, i64 19
+ %q.20 = getelementptr inbounds i32, ptr %q, i64 20
+ %q.21 = getelementptr inbounds i32, ptr %q, i64 21
+ %q.22 = getelementptr inbounds i32, ptr %q, i64 22
+ %q.23 = getelementptr inbounds i32, ptr %q, i64 23
+ %q.24 = getelementptr inbounds i32, ptr %q, i64 24
+ %q.25 = getelementptr inbounds i32, ptr %q, i64 25
+ %q.26 = getelementptr inbounds i32, ptr %q, i64 26
+ %q.27 = getelementptr inbounds i32, ptr %q, i64 27
+ %q.28 = getelementptr inbounds i32, ptr %q, i64 28
+ %q.29 = getelementptr inbounds i32, ptr %q, i64 29
+ %q.30 = getelementptr inbounds i32, ptr %q, i64 30
+ %q.31 = getelementptr inbounds i32, ptr %q, i64 31
+ %l.0 = load i32, ptr %p.0
+ %r.0 = load i32, ptr %q.0
+ %add.0 = add i32 %l.0, %r.0
+ %l.1 = load i32, ptr %p.1
+ %r.1 = load i32, ptr %q.1
+ %add.1 = add i32 %l.1, %r.1
+ %l.2 = load i32, ptr %p.2
+ %r.2 = load i32, ptr %q.2
+ %add.2 = add i32 %l.2, %r.2
+ %l.3 = load i32, ptr %p.3
+ %r.3 = load i32, ptr %q.3
+ %add.3 = add i32 %l.3, %r.3
+ %l.4 = load i32, ptr %p.4
+ %r.4 = load i32, ptr %q.4
+ %add.4 = add i32 %l.4, %r.4
+ %l.5 = load i32, ptr %p.5
+ %r.5 = load i32, ptr %q.5
+ %add.5 = add i32 %l.5, %r.5
+ %l.6 = load i32, ptr %p.6
+ %r.6 = load i32, ptr %q.6
+ %add.6 = add i32 %l.6, %r.6
+ %l.7 = load i32, ptr %p.7
+ %r.7 = load i32, ptr %q.7
+ %add.7 = add i32 %l.7, %r.7
+ %l.8 = load i32, ptr %p.8
+ %r.8 = load i32, ptr %q.8
+ %add.8 = add i32 %l.8, %r.8
+ %l.9 = load i32, ptr %p.9
+ %r.9 = load i32, ptr %q.9
+ %add.9 = add i32 %l.9, %r.9
+ %l.10 = load i32, ptr %p.10
+ %r.10 = load i32, ptr %q.10
+ %add.10 = add i32 %l.10, %r.10
+ %l.11 = load i32, ptr %p.11
+ %r.11 = load i32, ptr %q.11
+ %add.11 = add i32 %l.11, %r.11
+ %l.12 = load i32, ptr %p.12
+ %r.12 = load i32, ptr %q.12
+ %add.12 = add i32 %l.12, %r.12
+ %l.13 = load i32, ptr %p.13
+ %r.13 = load i32, ptr %q.13
+ %add.13 = add i32 %l.13, %r.13
+ %l.14 = load i32, ptr %p.14
+ %r.14 = load i32, ptr %q.14
+ %add.14 = add i32 %l.14, %r.14
+ %l.15 = load i32, ptr %p.15
+ %r.15 = load i32, ptr %q.15
+ %add.15 = add i32 %l.15, %r.15
+ %l.16 = load i32, ptr %p.16
+ %r.16 = load i32, ptr %q.16
+ %add.16 = add i32 %l.16, %r.16
+ %l.17 = load i32, ptr %p.17
+ %r.17 = load i32, ptr %q.17
+ %add.17 = add i32 %l.17, %r.17
+ %l.18 = load i32, ptr %p.18
+ %r.18 = load i32, ptr %q.18
+ %add.18 = add i32 %l.18, %r.18
+ %l.19 = load i32, ptr %p.19
+ %r.19 = load i32, ptr %q.19
+ %add.19 = add i32 %l.19, %r.19
+ %l.20 = load i32, ptr %p.20
+ %r.20 = load i32, ptr %q.20
+ %add.20 = add i32 %l.20, %r.20
+ %l.21 = load i32, ptr %p.21
+ %r.21 = load i32, ptr %q.21
+ %add.21 = add i32 %l.21, %r.21
+ %l.22 = load i32, ptr %p.22
+ %r.22 = load i32, ptr %q.22
+ %add.22 = add i32 %l.22, %r.22
+ %l.23 = load i32, ptr %p.23
+ %r.23 = load i32, ptr %q.23
+ %add.23 = add i32 %l.23, %r.23
+ %l.24 = load i32, ptr %p.24
+ %r.24 = load i32, ptr %q.24
+ %add.24 = add i32 %l.24, %r.24
+ %l.25 = load i32, ptr %p.25
+ %r.25 = load i32, ptr %q.25
+ %add.25 = add i32 %l.25, %r.25
+ %l.26 = load i32, ptr %p.26
+ %r.26 = load i32, ptr %q.26
+ %add.26 = add i32 %l.26, %r.26
+ %l.27 = load i32, ptr %p.27
+ %r.27 = load i32, ptr %q.27
+ %add.27 = add i32 %l.27, %r.27
+ %l.28 = load i32, ptr %p.28
+ %r.28 = load i32, ptr %q.28
+ %add.28 = add i32 %l.28, %r.28
+ %l.29 = load i32, ptr %p.29
+ %r.29 = load i32, ptr %q.29
+ %add.29 = add i32 %l.29, %r.29
+ %l.30 = load i32, ptr %p.30
+ %r.30 = load i32, ptr %q.30
+ %add.30 = add i32 %l.30, %r.30
+ %l.31 = load i32, ptr %p.31
+ %r.31 = load i32, ptr %q.31
+ %add.31 = add i32 %l.31, %r.31
+ call void @f16(i32 %add.0, i32 %add.1, i32 %add.2, i32 %add.3, i32 %add.4, i32 %add.5, i32 %add.6, i32 %add.7, i32 %add.8, i32 %add.9, i32 %add.10, i32 %add.11, i32 %add.12, i32 %add.13, i32 %add.14, i32 %add.15)
+ call void @g16(i32 %add.16, i32 %add.17, i32 %add.18, i32 %add.19, i32 %add.20, i32 %add.21, i32 %add.22, i32 %add.23, i32 %add.24, i32 %add.25, i32 %add.26, i32 %add.27, i32 %add.28, i32 %add.29, i32 %add.30, i32 %add.31)
+ ret void
+}
+
declare void @f(i32)
declare void @g(i32)
declare void @h(i32)
declare void @k(i32)
+declare void @f16(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
+declare void @g16(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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