[llvm] [DAGCombine] Do not gate a pre-legalization FADD fold on FMUL legality (PR #218748)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,57 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefix=RV32I %s
+; RUN: llc -mtriple=riscv32 -target-abi ilp32 -mattr=+f -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefix=RV32IF %s
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arsenm wrote:

Don't need -verify-machineinstrs 

https://github.com/llvm/llvm-project/pull/218748