[llvm] [DAG][X86] Bitfield insertion can combine into SHL + SHRD (PR #220182)

Pratyay Pande via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 10 03:29:09 PDT 2026


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@@ -53859,6 +53859,61 @@ static SDValue combineOrXorWithSETCC(unsigned Opc, const SDLoc &DL, EVT VT,
   return SDValue();
 }
 
+// Fold an OR with a masked destination and a left-shifted
+// source into a shift + double-precision shift (SHRD):
+static SDValue combineOrOnSHLToSHRD(SDNode *N, SDLoc &DL, SelectionDAG &DAG,
+                                    const X86Subtarget &Subtarget) {
+  using namespace SDPatternMatch;
+  assert(N->getOpcode() == ISD::OR && "Invalid Node. Expected OR.");
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pratyaypande wrote:

Done. marking as resolved

https://github.com/llvm/llvm-project/pull/220182


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