[llvm] bab513b - [AMDGPU] Use new CSR cost calculation (#219220)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 10 01:21:12 PDT 2026
Author: Lukas Sommer
Date: 2026-09-10T10:20:45+02:00
New Revision: bab513bedcf5c7582a24c97976042af4dba19c01
URL: https://github.com/llvm/llvm-project/commit/bab513bedcf5c7582a24c97976042af4dba19c01
DIFF: https://github.com/llvm/llvm-project/commit/bab513bedcf5c7582a24c97976042af4dba19c01.diff
LOG: [AMDGPU] Use new CSR cost calculation (#219220)
So far, AMDGPU backend relied on the legacy calculation for the cost of
the first use of a callee-save register. This legacy path scales the
entry block frequency by a fixed value, making a comparison with
alternatives, e.g., rematerialization, difficult due to different
scales. One example for that is the work in
https://github.com/llvm/llvm-project/pull/206756, where comparison of
rematerialization cost and first use of a CSR is hard to compare due to
the different scales.
Change to instead use the new calculation path with different target
hooks for better comparability.
As the new scale is different, the cost was changed. The new cost value
accounts for various factors impacting CSR cost.
This change (with different cost value) was originally part of
https://github.com/llvm/llvm-project/pull/202007. Another part of that
PR was already extracted into
https://github.com/llvm/llvm-project/pull/214857.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Added:
Modified:
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
llvm/test/CodeGen/AMDGPU/indirect-call.ll
llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 296389ed88915..66909861271e2 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -107,9 +107,17 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
// lanes (not even inactive ones).
static bool isChainScratchRegister(Register VGPR);
- // Stack access is very expensive. CSRs are also the high registers, and we
- // want to minimize the number of used registers.
- unsigned getCSRCost() const override { return 100; }
+ unsigned getCSRFirstUseCost(const MachineFunction &) const override {
+ // The cost of 27 balances multiple factors that influence CSR cost:
+ // - Saving a SGPR CSR to VGPR lanes is relatively cheap.
+ // - In cases where this is not possible, stack access is very expensive.
+ // - CSRs are also the high registers, and we want to minimize the number of
+ // used registers as it impacts occupancy.
+ // Note: Register allocation only applies these cost to callee-save
+ // registers according to getCalleeSavedRegs, so handling of calling
+ // conventions with no CSR is handled there.
+ return 27;
+ }
// When building a block VGPR load, we only really transfer a subset of the
// registers in the block, based on a mask. Liveness analysis is not aware of
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 7be6ad4575d69..62ad9928797e2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -5295,331 +5295,330 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB12_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_mov_b32_e32 v42, v35
; VI-NEXT: .LBB12_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB12_4
@@ -5672,280 +5671,281 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
-; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3
-; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
; VI-NEXT: .LBB12_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v7, v7, v38, s4
-; VI-NEXT: v_perm_b32 v10, v10, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v13, v13, v35, s4
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v8, v8, v33, s4
-; VI-NEXT: v_perm_b32 v33, v49, v53, s4
-; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v34, s4
-; VI-NEXT: v_perm_b32 v34, v47, v39, s4
-; VI-NEXT: v_perm_b32 v39, v50, v54, s4
-; VI-NEXT: v_perm_b32 v55, v59, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v52, s4
-; VI-NEXT: v_perm_b32 v2, v2, v58, s4
-; VI-NEXT: v_perm_b32 v51, v51, v40, s4
-; VI-NEXT: v_perm_b32 v4, v4, v57, s4
-; VI-NEXT: v_perm_b32 v5, v5, v56, s4
-; VI-NEXT: v_perm_b32 v6, v6, v46, s4
-; VI-NEXT: v_perm_b32 v9, v9, v45, s4
-; VI-NEXT: v_perm_b32 v12, v12, v63, s4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v36, v36, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: v_perm_b32 v12, v12, v34, s4
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v36, s4
+; VI-NEXT: v_perm_b32 v1, v1, v33, s4
+; VI-NEXT: v_perm_b32 v33, v51, v40, s4
+; VI-NEXT: v_perm_b32 v51, v46, v53, s4
+; VI-NEXT: v_perm_b32 v9, v9, v38, s4
+; VI-NEXT: v_perm_b32 v38, v43, v52, s4
+; VI-NEXT: v_perm_b32 v11, v11, v37, s4
+; VI-NEXT: v_perm_b32 v41, v63, v41, s4
+; VI-NEXT: v_perm_b32 v10, v10, v49, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
+; VI-NEXT: v_perm_b32 v3, v3, v61, s4
+; VI-NEXT: v_perm_b32 v4, v4, v60, s4
+; VI-NEXT: v_perm_b32 v39, v58, v39, s4
+; VI-NEXT: v_perm_b32 v5, v5, v59, s4
+; VI-NEXT: v_perm_b32 v6, v6, v57, s4
+; VI-NEXT: v_perm_b32 v50, v50, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v8, v8, v47, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v34, v35, v34, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v14, v14, v35, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v36, v35, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v35, v48, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v36, v52, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v17, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v18, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v49, s4
-; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v49
+; VI-NEXT: v_perm_b32 v49, v36, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v44, v43, s4
+; VI-NEXT: v_perm_b32 v1, v45, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v62, v61, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v20, v42, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v48, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -5954,157 +5954,159 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v21, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v22, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v23, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v24, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v26, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v28, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v29, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v30, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -6210,321 +6212,324 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB12_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(24)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: s_waitcnt vmcnt(22)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; GFX9-NEXT: v_mov_b32_e32 v55, v39
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; GFX9-NEXT: .LBB12_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v42, v35
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB12_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
@@ -6594,426 +6599,412 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX9-NEXT: v_add_u32_e32 v10, 3, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: v_add_u32_e32 v8, 3, v8
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: v_add_u32_e32 v10, 3, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: v_add_u32_e32 v6, 3, v6
; GFX9-NEXT: v_add_u32_e32 v5, 3, v5
-; GFX9-NEXT: v_add_u32_e32 v8, 3, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_add_u32_e32 v4, 3, v4
; GFX9-NEXT: v_add_u32_e32 v3, 3, v3
; GFX9-NEXT: v_add_u32_e32 v9, 3, v9
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_add_u32_e32 v2, 3, v2
; GFX9-NEXT: v_add_u32_e32 v1, 3, v1
; GFX9-NEXT: v_add_u32_e32 v7, 3, v7
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
; GFX9-NEXT: .LBB12_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
-; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4
-; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4
-; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v38, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v5, v5, v52, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
+; GFX9-NEXT: v_perm_b32 v36, v51, v54, s4
+; GFX9-NEXT: v_perm_b32 v51, v44, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v50, s4
+; GFX9-NEXT: v_perm_b32 v41, v59, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v63, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v48, s4
; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4
-; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v48, v58, v40, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v62, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v57, s4
+; GFX9-NEXT: v_perm_b32 v39, v46, v39, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v60, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v13, v13, v38, s4
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4
+; GFX9-NEXT: v_perm_b32 v14, v14, v38, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v35, v35, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v38, v38, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v52, v52, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v17, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v18, v18, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4
+; GFX9-NEXT: v_perm_b32 v53, v53, v44, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4
+; GFX9-NEXT: v_perm_b32 v1, v43, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4
+; GFX9-NEXT: v_perm_b32 v1, v49, v37, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v20, v55, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v42, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v61, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -7037,74 +7028,70 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v32i32_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
@@ -7184,19 +7171,25 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB12_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v48.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -7258,28 +7251,24 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-TRUE16-NEXT: .LBB12_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -7395,50 +7384,50 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: .LBB12_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v59, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v73, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v67, 16, v2
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -7447,9 +7436,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -7525,101 +7513,95 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v32i32_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
@@ -7699,19 +7681,25 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB12_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v55, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -7773,28 +7761,24 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-FAKE16-NEXT: .LBB12_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -7910,50 +7894,51 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: .LBB12_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v63, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v60, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -7962,9 +7947,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -8040,27 +8024,25 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -8150,587 +8132,575 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB13_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s46, s5, 24
+; SI-NEXT: s_lshr_b32 s46, s13, 24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v22, s46, 60
-; SI-NEXT: s_lshr_b32 s46, s13, 8
+; SI-NEXT: s_lshr_b32 s46, s13, 16
; SI-NEXT: v_writelane_b32 v22, s46, 61
-; SI-NEXT: s_lshr_b32 s46, s15, 24
+; SI-NEXT: s_lshr_b32 s46, s13, 8
; SI-NEXT: v_writelane_b32 v22, s46, 62
-; SI-NEXT: s_lshr_b32 s46, s15, 8
+; SI-NEXT: s_lshr_b32 s46, s15, 24
; SI-NEXT: v_writelane_b32 v22, s46, 63
-; SI-NEXT: s_lshr_b32 s56, s17, 24
-; SI-NEXT: v_writelane_b32 v22, s56, 58
-; SI-NEXT: s_lshr_b32 s56, s17, 16
-; SI-NEXT: v_writelane_b32 v22, s56, 59
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 56
-; SI-NEXT: v_writelane_b32 v22, s59, 57
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 54
-; SI-NEXT: v_writelane_b32 v22, s59, 55
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 52
-; SI-NEXT: v_writelane_b32 v22, s59, 53
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 50
-; SI-NEXT: v_writelane_b32 v22, s59, 51
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 48
-; SI-NEXT: v_writelane_b32 v22, s59, 49
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 46
-; SI-NEXT: v_writelane_b32 v22, s59, 47
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 44
-; SI-NEXT: v_writelane_b32 v22, s59, 45
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 42
-; SI-NEXT: v_writelane_b32 v22, s59, 43
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 40
-; SI-NEXT: v_writelane_b32 v22, s59, 41
-; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 38
-; SI-NEXT: v_writelane_b32 v22, s59, 39
-; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 36
-; SI-NEXT: v_writelane_b32 v22, s59, 37
-; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 34
-; SI-NEXT: v_writelane_b32 v22, s59, 35
-; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 32
-; SI-NEXT: v_writelane_b32 v22, s59, 33
-; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 30
-; SI-NEXT: v_writelane_b32 v22, s59, 31
-; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 28
-; SI-NEXT: v_writelane_b32 v22, s59, 29
-; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 26
-; SI-NEXT: v_writelane_b32 v22, s59, 27
-; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 24
-; SI-NEXT: v_writelane_b32 v22, s59, 25
-; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 22
-; SI-NEXT: v_writelane_b32 v22, s59, 23
-; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 20
-; SI-NEXT: v_writelane_b32 v22, s59, 21
-; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 18
-; SI-NEXT: v_writelane_b32 v22, s59, 19
-; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 16
-; SI-NEXT: v_writelane_b32 v22, s59, 17
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 14
-; SI-NEXT: v_writelane_b32 v22, s59, 15
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 12
-; SI-NEXT: v_writelane_b32 v22, s59, 13
-; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 10
-; SI-NEXT: v_writelane_b32 v22, s59, 11
-; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 8
-; SI-NEXT: v_writelane_b32 v22, s59, 9
-; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 8
-; SI-NEXT: v_writelane_b32 v22, s58, 6
-; SI-NEXT: v_writelane_b32 v22, s59, 7
-; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 24
-; SI-NEXT: v_writelane_b32 v22, s58, 4
-; SI-NEXT: v_writelane_b32 v22, s59, 5
-; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 2
-; SI-NEXT: v_writelane_b32 v22, s59, 3
-; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 8
-; SI-NEXT: s_lshr_b32 s76, s7, 16
-; SI-NEXT: s_lshr_b32 s77, s43, 24
-; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[98:99], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v22, s58, 0
-; SI-NEXT: s_lshr_b32 s78, s7, 8
-; SI-NEXT: s_lshr_b32 s88, s9, 24
-; SI-NEXT: s_lshr_b32 s89, s25, 24
-; SI-NEXT: s_mov_b32 s99, s77
-; SI-NEXT: v_writelane_b32 v22, s59, 1
-; SI-NEXT: s_mov_b32 s83, s76
+; SI-NEXT: s_lshr_b32 s46, s15, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 0
+; SI-NEXT: s_lshr_b32 s46, s15, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 1
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s47, 59
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 56
+; SI-NEXT: v_writelane_b32 v22, s47, 57
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 54
+; SI-NEXT: v_writelane_b32 v22, s47, 55
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 52
+; SI-NEXT: v_writelane_b32 v22, s47, 53
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 50
+; SI-NEXT: v_writelane_b32 v22, s47, 51
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 48
+; SI-NEXT: v_writelane_b32 v22, s47, 49
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 46
+; SI-NEXT: v_writelane_b32 v22, s47, 47
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 44
+; SI-NEXT: v_writelane_b32 v22, s47, 45
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 42
+; SI-NEXT: v_writelane_b32 v22, s47, 43
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 40
+; SI-NEXT: v_writelane_b32 v22, s47, 41
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 38
+; SI-NEXT: v_writelane_b32 v22, s47, 39
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 36
+; SI-NEXT: v_writelane_b32 v22, s47, 37
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 34
+; SI-NEXT: v_writelane_b32 v22, s47, 35
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 32
+; SI-NEXT: v_writelane_b32 v22, s47, 33
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 30
+; SI-NEXT: v_writelane_b32 v22, s47, 31
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 28
+; SI-NEXT: v_writelane_b32 v22, s47, 29
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 26
+; SI-NEXT: v_writelane_b32 v22, s47, 27
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 25
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 22
+; SI-NEXT: v_writelane_b32 v22, s47, 23
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 20
+; SI-NEXT: v_writelane_b32 v22, s47, 21
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 18
+; SI-NEXT: v_writelane_b32 v22, s47, 19
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 17
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 14
+; SI-NEXT: v_writelane_b32 v22, s47, 15
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v22, s46, 12
+; SI-NEXT: s_lshr_b32 s62, s5, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 13
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8
+; SI-NEXT: s_lshr_b32 s72, s5, 16
+; SI-NEXT: v_writelane_b32 v22, s46, 10
+; SI-NEXT: s_mov_b32 s61, s62
+; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
+; SI-NEXT: s_lshr_b32 s74, s5, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 11
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s76, s7, 24
+; SI-NEXT: v_writelane_b32 v22, s46, 8
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
+; SI-NEXT: s_lshr_b32 s78, s7, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 9
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; SI-NEXT: s_mov_b32 s75, s76
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[58:59], s[20:21], 16
-; SI-NEXT: s_lshr_b32 s62, s5, 16
-; SI-NEXT: s_lshr_b32 s90, s9, 16
-; SI-NEXT: s_lshr_b32 s60, s15, 16
-; SI-NEXT: s_lshr_b32 s63, s41, 24
-; SI-NEXT: s_lshr_b32 s91, s25, 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 8
-; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 24
+; SI-NEXT: s_lshr_b32 s88, s7, 8
+; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: s_mov_b32 s77, s78
-; SI-NEXT: s_mov_b32 s59, s89
-; SI-NEXT: s_mov_b32 s78, s88
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s90, s9, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 7
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
+; SI-NEXT: s_mov_b32 s79, s88
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8
-; SI-NEXT: s_lshr_b32 s72, s5, 8
-; SI-NEXT: s_lshr_b32 s92, s9, 8
-; SI-NEXT: s_lshr_b32 s94, s11, 24
-; SI-NEXT: s_lshr_b32 s73, s41, 16
-; SI-NEXT: s_lshr_b32 s95, s21, 16
-; SI-NEXT: s_mov_b32 s85, s63
-; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
-; SI-NEXT: s_mov_b32 s65, s60
-; SI-NEXT: s_mov_b32 s69, s91
-; SI-NEXT: s_mov_b32 s60, s62
+; SI-NEXT: s_lshr_b32 s92, s9, 16
+; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: s_mov_b32 s89, s90
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16
-; SI-NEXT: s_lshr_b32 s74, s7, 24
-; SI-NEXT: s_lshr_b32 vcc_lo, s11, 16
-; SI-NEXT: s_lshr_b32 s30, s11, 8
-; SI-NEXT: s_lshr_b32 s75, s41, 8
-; SI-NEXT: s_lshr_b32 s31, s19, 24
-; SI-NEXT: s_mov_b32 s87, s73
-; SI-NEXT: s_lshr_b64 s[96:97], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8
-; SI-NEXT: s_mov_b32 s55, s72
+; SI-NEXT: s_lshr_b32 s94, s9, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 5
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8
; SI-NEXT: s_mov_b32 s91, s92
-; SI-NEXT: s_mov_b32 s63, s95
-; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s11, 24
+; SI-NEXT: v_writelane_b32 v22, s46, 2
+; SI-NEXT: s_mov_b32 s93, s94
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 24
-; SI-NEXT: s_lshr_b32 s34, s13, 24
-; SI-NEXT: s_lshr_b32 s36, s13, 16
-; SI-NEXT: s_lshr_b32 s47, s19, 8
-; SI-NEXT: s_lshr_b32 s56, s17, 8
-; SI-NEXT: s_mov_b32 s97, s75
-; SI-NEXT: s_mov_b32 s53, s74
+; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
; SI-NEXT: s_mov_b32 s95, vcc_lo
-; SI-NEXT: s_mov_b32 s73, s31
-; SI-NEXT: s_mov_b32 vcc_lo, s30
+; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
+; SI-NEXT: s_lshr_b32 s34, s11, 8
+; SI-NEXT: v_writelane_b32 v22, s46, 0
+; SI-NEXT: s_mov_b32 vcc_hi, s30
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[16:17], 8
-; SI-NEXT: s_lshr_b32 s51, s43, 16
-; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: s_lshr_b32 s66, s45, 24
-; SI-NEXT: s_lshr_b32 s67, s45, 16
-; SI-NEXT: s_lshr_b32 s38, s45, 8
-; SI-NEXT: s_lshr_b32 s48, s29, 24
-; SI-NEXT: s_lshr_b32 s49, s29, 16
-; SI-NEXT: s_lshr_b32 s39, s29, 8
-; SI-NEXT: s_lshr_b32 s70, s27, 24
-; SI-NEXT: s_lshr_b32 s61, s27, 16
-; SI-NEXT: s_lshr_b32 s79, s27, 8
-; SI-NEXT: s_lshr_b32 s71, s25, 8
-; SI-NEXT: s_lshr_b32 s80, s23, 24
-; SI-NEXT: s_lshr_b32 s81, s23, 16
-; SI-NEXT: s_lshr_b32 s50, s23, 8
-; SI-NEXT: s_lshr_b32 s93, s21, 24
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 8
-; SI-NEXT: s_lshr_b32 s35, s19, 16
-; SI-NEXT: v_writelane_b32 v21, s56, 0
-; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24
+; SI-NEXT: s_lshr_b32 s56, s41, 24
+; SI-NEXT: s_lshr_b32 s57, s41, 16
+; SI-NEXT: s_lshr_b32 s58, s45, 24
+; SI-NEXT: s_lshr_b32 s36, s29, 24
+; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v22, s47, 1
+; SI-NEXT: s_lshr_b64 s[98:99], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
; SI-NEXT: s_mov_b32 s31, s34
-; SI-NEXT: s_mov_b32 s75, s47
-; SI-NEXT: s_mov_b32 s34, s36
+; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
+; SI-NEXT: s_lshr_b32 s69, s41, 8
+; SI-NEXT: s_lshr_b32 s71, s43, 24
+; SI-NEXT: s_lshr_b32 s81, s43, 16
+; SI-NEXT: s_lshr_b32 s83, s43, 8
+; SI-NEXT: s_lshr_b32 s87, s45, 16
+; SI-NEXT: s_lshr_b32 s97, s45, 8
+; SI-NEXT: s_lshr_b32 s86, s29, 16
+; SI-NEXT: s_lshr_b32 s52, s29, 8
+; SI-NEXT: s_lshr_b32 s54, s27, 24
+; SI-NEXT: s_lshr_b32 s64, s27, 16
+; SI-NEXT: s_lshr_b32 s96, s27, 8
+; SI-NEXT: s_lshr_b32 s66, s25, 24
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s25, 8
+; SI-NEXT: s_lshr_b32 s80, s23, 24
+; SI-NEXT: s_lshr_b32 s39, s23, 16
+; SI-NEXT: s_lshr_b32 s49, s23, 8
+; SI-NEXT: s_lshr_b32 s51, s21, 24
+; SI-NEXT: s_lshr_b32 s53, s21, 16
+; SI-NEXT: s_lshr_b32 s55, s21, 8
+; SI-NEXT: s_lshr_b32 s38, s19, 24
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_lshr_b32 s82, s19, 8
+; SI-NEXT: s_lshr_b32 s50, s17, 24
+; SI-NEXT: s_lshr_b32 s65, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s17, 8
+; SI-NEXT: s_mov_b32 s85, s58
+; SI-NEXT: s_mov_b32 s99, s57
+; SI-NEXT: s_mov_b32 s47, s56
+; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16
+; SI-NEXT: s_mov_b32 s35, s36
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB13_3
; SI-NEXT: .LBB13_2:
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s56, 0
-; SI-NEXT: v_writelane_b32 v22, s57, 1
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: v_writelane_b32 v22, s84, 0
+; SI-NEXT: v_writelane_b32 v22, s85, 1
+; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s56, 2
-; SI-NEXT: v_writelane_b32 v22, s57, 3
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; kill: killed $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: v_writelane_b32 v22, s84, 2
+; SI-NEXT: v_writelane_b32 v22, s85, 3
+; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $vcc_hi
-; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s84, 4
+; SI-NEXT: v_writelane_b32 v22, s85, 5
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr59
-; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr97
; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; kill: killed $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr47
-; SI-NEXT: v_writelane_b32 v22, s56, 4
-; SI-NEXT: v_writelane_b32 v22, s57, 5
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; kill: killed $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s84, 6
+; SI-NEXT: v_writelane_b32 v22, s85, 7
+; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: v_writelane_b32 v22, s84, 8
+; SI-NEXT: v_writelane_b32 v22, s85, 9
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 10
+; SI-NEXT: v_writelane_b32 v22, s85, 11
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 12
+; SI-NEXT: v_writelane_b32 v22, s85, 13
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 14
+; SI-NEXT: v_writelane_b32 v22, s85, 15
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 16
+; SI-NEXT: v_writelane_b32 v22, s85, 17
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 18
+; SI-NEXT: v_writelane_b32 v22, s85, 19
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 20
+; SI-NEXT: v_writelane_b32 v22, s85, 21
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 22
+; SI-NEXT: v_writelane_b32 v22, s85, 23
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 24
+; SI-NEXT: v_writelane_b32 v22, s85, 25
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 26
+; SI-NEXT: v_writelane_b32 v22, s85, 27
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 28
+; SI-NEXT: v_writelane_b32 v22, s85, 29
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 30
+; SI-NEXT: v_writelane_b32 v22, s85, 31
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 32
+; SI-NEXT: v_writelane_b32 v22, s85, 33
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 34
+; SI-NEXT: v_writelane_b32 v22, s85, 35
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 36
+; SI-NEXT: v_writelane_b32 v22, s85, 37
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 38
+; SI-NEXT: v_writelane_b32 v22, s85, 39
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 40
+; SI-NEXT: v_writelane_b32 v22, s85, 41
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 42
+; SI-NEXT: v_writelane_b32 v22, s85, 43
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 44
+; SI-NEXT: v_writelane_b32 v22, s85, 45
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 46
+; SI-NEXT: v_writelane_b32 v22, s85, 47
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 48
+; SI-NEXT: v_writelane_b32 v22, s85, 49
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 50
+; SI-NEXT: v_writelane_b32 v22, s85, 51
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 52
+; SI-NEXT: v_writelane_b32 v22, s85, 53
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 54
+; SI-NEXT: v_writelane_b32 v22, s85, 55
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 56
+; SI-NEXT: v_writelane_b32 v22, s85, 57
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v22, s84, 58
+; SI-NEXT: v_writelane_b32 v22, s85, 59
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: v_writelane_b32 v22, s56, 6
-; SI-NEXT: v_writelane_b32 v22, s57, 7
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 8
-; SI-NEXT: v_writelane_b32 v22, s57, 9
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 10
-; SI-NEXT: v_writelane_b32 v22, s57, 11
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 12
-; SI-NEXT: v_writelane_b32 v22, s57, 13
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 14
-; SI-NEXT: v_writelane_b32 v22, s57, 15
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 16
-; SI-NEXT: v_writelane_b32 v22, s57, 17
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 18
-; SI-NEXT: v_writelane_b32 v22, s57, 19
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 20
-; SI-NEXT: v_writelane_b32 v22, s57, 21
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 22
-; SI-NEXT: v_writelane_b32 v22, s57, 23
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 24
-; SI-NEXT: v_writelane_b32 v22, s57, 25
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 26
-; SI-NEXT: v_writelane_b32 v22, s57, 27
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 28
-; SI-NEXT: v_writelane_b32 v22, s57, 29
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 30
-; SI-NEXT: v_writelane_b32 v22, s57, 31
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 32
-; SI-NEXT: v_writelane_b32 v22, s57, 33
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 34
-; SI-NEXT: v_writelane_b32 v22, s57, 35
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 36
-; SI-NEXT: v_writelane_b32 v22, s57, 37
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 38
-; SI-NEXT: v_writelane_b32 v22, s57, 39
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 40
-; SI-NEXT: v_writelane_b32 v22, s57, 41
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 42
-; SI-NEXT: v_writelane_b32 v22, s57, 43
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 44
-; SI-NEXT: v_writelane_b32 v22, s57, 45
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 46
-; SI-NEXT: v_writelane_b32 v22, s57, 47
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 48
-; SI-NEXT: v_writelane_b32 v22, s57, 49
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 50
-; SI-NEXT: v_writelane_b32 v22, s57, 51
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 52
-; SI-NEXT: v_writelane_b32 v22, s57, 53
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 54
-; SI-NEXT: v_writelane_b32 v22, s57, 55
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: v_writelane_b32 v22, s56, 56
-; SI-NEXT: v_writelane_b32 v22, s57, 57
-; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: .LBB13_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
-; SI-NEXT: s_mov_b32 s36, s56
-; SI-NEXT: s_mov_b32 s56, s51
-; SI-NEXT: s_mov_b32 s37, s46
-; SI-NEXT: s_mov_b32 s46, s66
-; SI-NEXT: s_mov_b32 s51, s67
-; SI-NEXT: s_mov_b32 s66, s38
-; SI-NEXT: s_mov_b32 s38, s48
-; SI-NEXT: s_mov_b32 s48, s49
-; SI-NEXT: s_mov_b32 s49, s39
-; SI-NEXT: s_mov_b32 s39, s70
-; SI-NEXT: s_mov_b32 s67, s61
-; SI-NEXT: v_readlane_b32 s61, v22, 58
-; SI-NEXT: v_readlane_b32 s70, v22, 59
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
+; SI-NEXT: s_mov_b32 s36, s84
+; SI-NEXT: s_mov_b32 s84, s52
+; SI-NEXT: s_mov_b32 s52, s54
+; SI-NEXT: s_mov_b32 s54, s64
; SI-NEXT: s_cbranch_scc1 .LBB13_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s47, 59
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: v_writelane_b32 v22, s46, 56
; SI-NEXT: v_writelane_b32 v22, s47, 57
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 54
; SI-NEXT: v_writelane_b32 v22, s47, 55
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 52
; SI-NEXT: v_writelane_b32 v22, s47, 53
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: v_writelane_b32 v22, s46, 50
; SI-NEXT: v_writelane_b32 v22, s47, 51
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; SI-NEXT: v_writelane_b32 v22, s46, 48
; SI-NEXT: v_writelane_b32 v22, s47, 49
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
-; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: v_writelane_b32 v22, s46, 46
; SI-NEXT: v_writelane_b32 v22, s47, 47
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: v_writelane_b32 v22, s46, 44
; SI-NEXT: v_writelane_b32 v22, s47, 45
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; SI-NEXT: v_writelane_b32 v22, s46, 42
; SI-NEXT: v_writelane_b32 v22, s47, 43
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
-; SI-NEXT: s_add_i32 s41, s41, 3
-; SI-NEXT: s_add_i32 s40, s40, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: v_writelane_b32 v22, s46, 40
; SI-NEXT: v_writelane_b32 v22, s47, 41
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_add_i32 s13, s13, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: v_writelane_b32 v22, s46, 38
; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; SI-NEXT: v_writelane_b32 v22, s46, 36
; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
-; SI-NEXT: s_add_i32 s43, s43, 3
-; SI-NEXT: s_add_i32 s42, s42, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: v_writelane_b32 v22, s46, 34
; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: v_writelane_b32 v22, s46, 32
; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; SI-NEXT: v_writelane_b32 v22, s46, 30
; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8
-; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: s_add_i32 s44, s44, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
; SI-NEXT: v_writelane_b32 v22, s46, 28
; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: s_add_i32 s40, s40, 3
; SI-NEXT: v_writelane_b32 v22, s46, 26
; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
; SI-NEXT: v_writelane_b32 v22, s46, 24
; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8
-; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
; SI-NEXT: v_writelane_b32 v22, s46, 22
; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: s_add_i32 s42, s42, 3
; SI-NEXT: v_writelane_b32 v22, s46, 20
; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
; SI-NEXT: v_writelane_b32 v22, s46, 18
; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8
-; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
; SI-NEXT: v_writelane_b32 v22, s46, 16
; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8
+; SI-NEXT: s_add_i32 s45, s45, 3
+; SI-NEXT: s_add_i32 s44, s44, 3
; SI-NEXT: v_writelane_b32 v22, s46, 14
; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
-; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
; SI-NEXT: v_writelane_b32 v22, s46, 12
; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
; SI-NEXT: v_writelane_b32 v22, s46, 10
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8
+; SI-NEXT: s_add_i32 s29, s29, 3
+; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: v_writelane_b32 v22, s46, 8
; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 8
-; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8
+; SI-NEXT: s_add_i32 s27, s27, 3
+; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: v_writelane_b32 v22, s46, 2
; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 8
-; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
; SI-NEXT: v_writelane_b32 v22, s46, 0
; SI-NEXT: v_writelane_b32 v22, s47, 1
-; SI-NEXT: s_lshr_b32 s46, s5, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 60
-; SI-NEXT: s_lshr_b32 s46, s13, 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
+; SI-NEXT: s_lshr_b32 s47, s13, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 60
+; SI-NEXT: s_lshr_b32 s47, s13, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 61
+; SI-NEXT: s_lshr_b32 s47, s13, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 62
+; SI-NEXT: s_lshr_b32 s47, s15, 24
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 61
-; SI-NEXT: s_lshr_b32 s46, s15, 24
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 8
-; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 24
+; SI-NEXT: s_add_i32 s23, s23, 3
+; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_add_i32 s25, s25, 3
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_writelane_b32 v22, s47, 63
+; SI-NEXT: s_lshr_b32 s47, s15, 16
+; SI-NEXT: s_lshr_b64 s[98:99], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[58:59], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 24
+; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[16:17], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 62
-; SI-NEXT: s_lshr_b32 s46, s15, 8
-; SI-NEXT: s_lshr_b32 s60, s5, 16
-; SI-NEXT: s_lshr_b32 s55, s5, 8
-; SI-NEXT: s_lshr_b32 s53, s7, 24
-; SI-NEXT: s_lshr_b32 s83, s7, 16
-; SI-NEXT: s_lshr_b32 s77, s7, 8
-; SI-NEXT: s_lshr_b32 s78, s9, 24
-; SI-NEXT: s_lshr_b32 s89, s9, 16
-; SI-NEXT: s_lshr_b32 s91, s9, 8
-; SI-NEXT: s_lshr_b32 s92, s11, 24
-; SI-NEXT: s_lshr_b32 s95, s11, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8
-; SI-NEXT: s_lshr_b32 s31, s13, 24
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s65, s15, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 63
-; SI-NEXT: s_lshr_b32 s85, s41, 24
-; SI-NEXT: s_lshr_b32 s87, s41, 16
-; SI-NEXT: s_lshr_b32 s97, s41, 8
-; SI-NEXT: s_lshr_b32 s99, s43, 24
-; SI-NEXT: s_lshr_b32 s56, s43, 16
-; SI-NEXT: s_lshr_b32 s37, s43, 8
-; SI-NEXT: s_lshr_b32 s46, s45, 24
-; SI-NEXT: s_lshr_b32 s51, s45, 16
-; SI-NEXT: s_lshr_b32 s66, s45, 8
-; SI-NEXT: s_lshr_b32 s38, s29, 24
-; SI-NEXT: s_lshr_b32 s48, s29, 16
-; SI-NEXT: s_lshr_b32 s49, s29, 8
-; SI-NEXT: s_lshr_b32 s39, s27, 24
-; SI-NEXT: s_lshr_b32 s67, s27, 16
-; SI-NEXT: s_lshr_b32 s79, s27, 8
-; SI-NEXT: s_lshr_b32 s59, s25, 24
-; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s71, s25, 8
-; SI-NEXT: s_lshr_b32 s80, s23, 24
-; SI-NEXT: s_lshr_b32 s81, s23, 16
-; SI-NEXT: s_lshr_b32 s50, s23, 8
-; SI-NEXT: s_lshr_b32 s93, s21, 24
-; SI-NEXT: s_lshr_b32 s63, s21, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 8
-; SI-NEXT: s_lshr_b32 s73, s19, 24
-; SI-NEXT: s_lshr_b32 s35, s19, 16
-; SI-NEXT: s_lshr_b32 s75, s19, 8
-; SI-NEXT: s_lshr_b32 s61, s17, 24
-; SI-NEXT: s_lshr_b32 s70, s17, 16
-; SI-NEXT: s_lshr_b32 s47, s17, 8
+; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: v_writelane_b32 v21, s47, 0
+; SI-NEXT: s_lshr_b32 s47, s15, 8
+; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s61, s5, 24
+; SI-NEXT: s_lshr_b32 s63, s5, 16
+; SI-NEXT: s_lshr_b32 s73, s5, 8
+; SI-NEXT: s_lshr_b32 s75, s7, 24
+; SI-NEXT: s_lshr_b32 s77, s7, 16
+; SI-NEXT: s_lshr_b32 s79, s7, 8
+; SI-NEXT: s_lshr_b32 s89, s9, 24
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s93, s9, 8
+; SI-NEXT: s_lshr_b32 s95, s11, 24
+; SI-NEXT: s_lshr_b32 vcc_hi, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s11, 8
+; SI-NEXT: v_writelane_b32 v21, s47, 1
+; SI-NEXT: s_lshr_b32 s47, s41, 24
+; SI-NEXT: s_lshr_b32 s99, s41, 16
+; SI-NEXT: s_lshr_b32 s69, s41, 8
+; SI-NEXT: s_lshr_b32 s71, s43, 24
+; SI-NEXT: s_lshr_b32 s81, s43, 16
+; SI-NEXT: s_lshr_b32 s83, s43, 8
+; SI-NEXT: s_lshr_b32 s85, s45, 24
+; SI-NEXT: s_lshr_b32 s87, s45, 16
+; SI-NEXT: s_lshr_b32 s97, s45, 8
+; SI-NEXT: s_lshr_b32 s35, s29, 24
+; SI-NEXT: s_lshr_b32 s86, s29, 16
+; SI-NEXT: s_lshr_b32 s84, s29, 8
+; SI-NEXT: s_lshr_b32 s52, s27, 24
+; SI-NEXT: s_lshr_b32 s54, s27, 16
+; SI-NEXT: s_lshr_b32 s96, s27, 8
+; SI-NEXT: s_lshr_b32 s66, s25, 24
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s25, 8
+; SI-NEXT: s_lshr_b32 s80, s23, 24
+; SI-NEXT: s_lshr_b32 s39, s23, 16
+; SI-NEXT: s_lshr_b32 s49, s23, 8
+; SI-NEXT: s_lshr_b32 s51, s21, 24
+; SI-NEXT: s_lshr_b32 s53, s21, 16
+; SI-NEXT: s_lshr_b32 s55, s21, 8
+; SI-NEXT: s_lshr_b32 s38, s19, 24
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_lshr_b32 s82, s19, 8
+; SI-NEXT: s_lshr_b32 s50, s17, 24
+; SI-NEXT: s_lshr_b32 s65, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s17, 8
; SI-NEXT: .LBB13_5: ; %end
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s47, s74, 8
-; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s47, s30, 0xff
-; SI-NEXT: s_lshl_b32 s47, s47, 16
-; SI-NEXT: s_lshl_b32 s57, s72, 24
+; SI-NEXT: s_lshl_b32 s57, s34, 8
+; SI-NEXT: s_or_b32 s16, s16, s57
+; SI-NEXT: s_and_b32 s57, s30, 0xff
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_lshl_b32 s59, vcc_lo, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s47, s57, s47
-; SI-NEXT: s_or_b32 s16, s16, s47
+; SI-NEXT: s_or_b32 s57, s59, s57
+; SI-NEXT: s_or_b32 s16, s16, s57
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s17, 0xff
-; SI-NEXT: v_readlane_b32 s17, v21, 0
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s67, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s70, 0xff
+; SI-NEXT: s_and_b32 s17, s65, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s47, s61, 24
+; SI-NEXT: s_lshl_b32 s57, s50, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s47, s17
+; SI-NEXT: s_or_b32 s17, s57, s17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
@@ -8738,7 +8708,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s18, 0xff
; SI-NEXT: s_lshl_b32 s17, s94, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s62, 0xff
+; SI-NEXT: s_and_b32 s17, s92, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s90, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8748,11 +8718,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s19, 0xff
-; SI-NEXT: s_lshl_b32 s17, s75, 8
+; SI-NEXT: s_lshl_b32 s17, s82, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s35, 0xff
+; SI-NEXT: s_and_b32 s17, s48, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s73, 24
+; SI-NEXT: s_lshl_b32 s18, s38, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8762,7 +8732,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s20, 0xff
; SI-NEXT: s_lshl_b32 s17, s88, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s58, 0xff
+; SI-NEXT: s_and_b32 s17, s78, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s76, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8772,28 +8742,23 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s21, 0xff
-; SI-NEXT: s_lshl_b32 s17, vcc_hi, 8
+; SI-NEXT: s_lshl_b32 s17, s55, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s63, 0xff
+; SI-NEXT: s_and_b32 s17, s53, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s93, 24
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 0
+; SI-NEXT: s_lshl_b32 s18, s51, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 1
+; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s22, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 3
+; SI-NEXT: s_lshl_b32 s17, s74, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 4
+; SI-NEXT: s_and_b32 s17, s72, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s62, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8801,29 +8766,23 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s23, 0xff
-; SI-NEXT: s_lshl_b32 s17, s50, 8
+; SI-NEXT: s_lshl_b32 s17, s49, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s81, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 5
+; SI-NEXT: s_and_b32 s17, s39, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s80, 24
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 6
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 7
+; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 8
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s24, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 9
+; SI-NEXT: s_lshl_b32 s17, s60, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 10
+; SI-NEXT: s_and_b32 s17, s58, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s56, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8831,27 +8790,24 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s25, 0xff
-; SI-NEXT: s_lshl_b32 s17, s71, 8
+; SI-NEXT: s_lshl_b32 s17, s70, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s69, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 11
+; SI-NEXT: s_and_b32 s17, s68, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s59, 24
+; SI-NEXT: s_lshl_b32 s18, s66, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 12
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v22, 13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s26, 0xff
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 14
+; SI-NEXT: s_lshl_b32 s17, s46, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
+; SI-NEXT: s_and_b32 s17, s98, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 0
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s68, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8859,27 +8815,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s27, 0xff
-; SI-NEXT: s_lshl_b32 s17, s79, 8
+; SI-NEXT: s_lshl_b32 s17, s96, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s67, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 15
+; SI-NEXT: s_and_b32 s17, s54, 0xff
+; SI-NEXT: v_readlane_b32 s19, v22, 1
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s39, 24
+; SI-NEXT: s_lshl_b32 s18, s52, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 2
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 17
+; SI-NEXT: v_readlane_b32 s19, v22, 3
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 18
+; SI-NEXT: v_readlane_b32 s18, v22, 4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s28, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 19
+; SI-NEXT: v_readlane_b32 s19, v22, 5
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 20
+; SI-NEXT: v_readlane_b32 s18, v22, 6
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8889,27 +8845,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s29, 0xff
-; SI-NEXT: s_lshl_b32 s17, s49, 8
+; SI-NEXT: s_lshl_b32 s17, s84, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s48, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 21
+; SI-NEXT: s_and_b32 s17, s86, 0xff
+; SI-NEXT: v_readlane_b32 s19, v22, 7
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s38, 24
+; SI-NEXT: s_lshl_b32 s18, s35, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 22
+; SI-NEXT: v_readlane_b32 s18, v22, 8
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 23
+; SI-NEXT: v_readlane_b32 s19, v22, 9
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 24
+; SI-NEXT: v_readlane_b32 s18, v22, 10
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 25
+; SI-NEXT: v_readlane_b32 s19, v22, 11
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 26
+; SI-NEXT: v_readlane_b32 s18, v22, 12
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8919,27 +8875,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
-; SI-NEXT: s_lshl_b32 s17, s66, 8
+; SI-NEXT: s_lshl_b32 s17, s97, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s51, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 27
+; SI-NEXT: s_and_b32 s17, s87, 0xff
+; SI-NEXT: v_readlane_b32 s19, v22, 13
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s46, 24
+; SI-NEXT: s_lshl_b32 s18, s85, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 28
+; SI-NEXT: v_readlane_b32 s18, v22, 14
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 29
+; SI-NEXT: v_readlane_b32 s19, v22, 15
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 30
+; SI-NEXT: v_readlane_b32 s18, v22, 16
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 31
+; SI-NEXT: v_readlane_b32 s19, v22, 17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 32
+; SI-NEXT: v_readlane_b32 s18, v22, 18
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8949,27 +8905,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s37, 8
+; SI-NEXT: s_lshl_b32 s17, s83, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s56, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 33
+; SI-NEXT: s_and_b32 s17, s81, 0xff
+; SI-NEXT: v_readlane_b32 s19, v22, 19
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s99, 24
+; SI-NEXT: s_lshl_b32 s18, s71, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 34
+; SI-NEXT: v_readlane_b32 s18, v22, 20
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 35
+; SI-NEXT: v_readlane_b32 s19, v22, 21
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 36
+; SI-NEXT: v_readlane_b32 s18, v22, 22
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 37
+; SI-NEXT: v_readlane_b32 s19, v22, 23
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 38
+; SI-NEXT: v_readlane_b32 s18, v22, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -8979,27 +8935,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s97, 8
+; SI-NEXT: s_lshl_b32 s17, s69, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s87, 0xff
+; SI-NEXT: s_and_b32 s17, s99, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s85, 24
+; SI-NEXT: s_lshl_b32 s18, s47, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 40
+; SI-NEXT: v_readlane_b32 s16, v22, 26
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 41
+; SI-NEXT: v_readlane_b32 s17, v22, 27
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 39
+; SI-NEXT: v_readlane_b32 s19, v22, 25
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 42
-; SI-NEXT: v_readlane_b32 s17, v22, 43
+; SI-NEXT: v_readlane_b32 s16, v22, 28
+; SI-NEXT: v_readlane_b32 s17, v22, 29
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 44
+; SI-NEXT: v_readlane_b32 s18, v22, 30
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
@@ -9008,29 +8964,30 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 63
-; SI-NEXT: s_lshl_b32 s15, s15, 8
-; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_and_b32 s15, s65, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 62
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_lshl_b32 s16, s16, 24
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: v_readlane_b32 s14, v21, 1
+; SI-NEXT: s_and_b32 s15, s15, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 8
+; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: s_and_b32 s15, s14, 0xffff
+; SI-NEXT: v_readlane_b32 s14, v21, 0
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s16, s14, 16
+; SI-NEXT: v_readlane_b32 s14, v22, 63
+; SI-NEXT: s_lshl_b32 s14, s14, 24
+; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 46
+; SI-NEXT: v_readlane_b32 s14, v22, 32
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 47
+; SI-NEXT: v_readlane_b32 s15, v22, 33
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 48
-; SI-NEXT: v_readlane_b32 s15, v22, 49
+; SI-NEXT: v_readlane_b32 s14, v22, 34
+; SI-NEXT: v_readlane_b32 s15, v22, 35
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 50
+; SI-NEXT: v_readlane_b32 s16, v22, 36
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -9039,28 +8996,30 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 61
-; SI-NEXT: s_lshl_b32 s13, s13, 8
-; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_and_b32 s13, s34, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s31, 24
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: v_readlane_b32 s12, v22, 62
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 8
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s13, s12, 0xffff
+; SI-NEXT: v_readlane_b32 s12, v22, 61
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v22, 60
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s12, s12, s14
+; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 52
+; SI-NEXT: v_readlane_b32 s12, v22, 38
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 53
+; SI-NEXT: v_readlane_b32 s13, v22, 39
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 54
-; SI-NEXT: v_readlane_b32 s13, v22, 55
+; SI-NEXT: v_readlane_b32 s12, v22, 40
+; SI-NEXT: v_readlane_b32 s13, v22, 41
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 56
+; SI-NEXT: v_readlane_b32 s14, v22, 42
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
@@ -9070,23 +9029,28 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, vcc_lo, 8
+; SI-NEXT: s_lshl_b32 s11, s31, 8
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_and_b32 s11, s95, 0xff
+; SI-NEXT: s_and_b32 s11, vcc_hi, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_lshl_b32 s12, s92, 24
+; SI-NEXT: s_lshl_b32 s12, s95, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
+; SI-NEXT: v_readlane_b32 s10, v22, 44
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: s_lshl_b32 s10, s52, 8
+; SI-NEXT: v_readlane_b32 s11, v22, 45
+; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: s_and_b32 s10, s98, 0xff
+; SI-NEXT: v_readlane_b32 s10, v22, 46
+; SI-NEXT: v_readlane_b32 s11, v22, 47
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: v_readlane_b32 s12, v22, 48
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s96, 24
+; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_or_b32 s8, s8, s10
@@ -9094,23 +9058,28 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s91, 8
+; SI-NEXT: s_lshl_b32 s9, s93, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s89, 0xff
+; SI-NEXT: s_and_b32 s9, s91, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s78, 24
+; SI-NEXT: s_lshl_b32 s10, s89, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
+; SI-NEXT: v_readlane_b32 s8, v22, 50
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s8, s64, 8
+; SI-NEXT: v_readlane_b32 s9, v22, 51
+; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s54, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 52
+; SI-NEXT: v_readlane_b32 s9, v22, 53
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v22, 54
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s86, 24
+; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s6, s6, s8
@@ -9118,21 +9087,25 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s77, 8
+; SI-NEXT: s_lshl_b32 s7, s79, 8
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_and_b32 s7, s83, 0xff
+; SI-NEXT: s_and_b32 s7, s77, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s53, 24
+; SI-NEXT: s_lshl_b32 s8, s75, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
+; SI-NEXT: v_readlane_b32 s6, v22, 56
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s84, 8
+; SI-NEXT: v_readlane_b32 s7, v22, 57
+; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s82, 0xff
+; SI-NEXT: v_readlane_b32 s6, v22, 58
+; SI-NEXT: v_readlane_b32 s7, v22, 59
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s36, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -9142,12 +9115,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s55, 8
+; SI-NEXT: s_lshl_b32 s5, s73, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s60, 0xff
-; SI-NEXT: v_readlane_b32 s6, v22, 60
+; SI-NEXT: s_and_b32 s5, s63, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s61, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -9155,9 +9127,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v22, 45
-; SI-NEXT: v_readlane_b32 s17, v22, 51
-; SI-NEXT: v_readlane_b32 s15, v22, 57
+; SI-NEXT: v_readlane_b32 s19, v22, 31
+; SI-NEXT: v_readlane_b32 s17, v22, 37
+; SI-NEXT: v_readlane_b32 s15, v22, 43
+; SI-NEXT: v_readlane_b32 s13, v22, 49
+; SI-NEXT: v_readlane_b32 s11, v22, 55
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
@@ -9208,6 +9182,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v32, s34, 0
; VI-NEXT: v_writelane_b32 v32, s35, 1
@@ -9262,164 +9237,209 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_cmp_lg_u32 s44, 0
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
+; VI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB13_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 18
-; VI-NEXT: s_lshr_b32 s47, s4, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 19
-; VI-NEXT: s_lshr_b32 s47, s8, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 20
-; VI-NEXT: s_lshr_b32 s47, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: s_lshr_b32 s47, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 22
-; VI-NEXT: s_lshr_b32 s47, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 23
-; VI-NEXT: s_lshr_b32 s47, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 24
-; VI-NEXT: s_lshr_b32 s47, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 25
-; VI-NEXT: s_lshr_b32 s47, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 26
-; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: s_lshr_b32 s46, s5, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: s_lshr_b32 s46, s4, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s6, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s40, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s42, 16
; VI-NEXT: v_writelane_b32 v33, s46, 27
-; VI-NEXT: s_lshr_b32 s47, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 28
-; VI-NEXT: s_lshr_b32 s46, s28, 8
+; VI-NEXT: s_lshr_b32 s46, s42, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s45, 24
; VI-NEXT: v_writelane_b32 v33, s46, 29
-; VI-NEXT: s_lshr_b32 s47, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 30
-; VI-NEXT: s_lshr_b32 s47, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 31
-; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: s_lshr_b32 s46, s45, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s45, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s44, 16
; VI-NEXT: v_writelane_b32 v33, s46, 32
-; VI-NEXT: s_lshr_b32 s47, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 33
-; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: s_lshr_b32 s46, s44, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s29, 24
; VI-NEXT: v_writelane_b32 v33, s46, 34
-; VI-NEXT: s_lshr_b32 s47, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 35
-; VI-NEXT: s_lshr_b32 s47, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 36
-; VI-NEXT: s_lshr_b32 s46, s25, 8
+; VI-NEXT: s_lshr_b32 s46, s29, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s28, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s28, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: s_lshr_b32 s46, s27, 24
; VI-NEXT: v_writelane_b32 v33, s46, 37
-; VI-NEXT: s_lshr_b32 s47, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 38
-; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: s_lshr_b32 s46, s27, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s46, s26, 16
; VI-NEXT: v_writelane_b32 v33, s46, 39
-; VI-NEXT: s_lshr_b32 s47, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 40
-; VI-NEXT: s_lshr_b32 s47, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 41
-; VI-NEXT: s_lshr_b32 s46, s23, 8
+; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: s_lshr_b32 s46, s25, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: s_lshr_b32 s46, s24, 16
; VI-NEXT: v_writelane_b32 v33, s46, 42
-; VI-NEXT: s_lshr_b32 s47, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 43
-; VI-NEXT: s_lshr_b32 s46, s22, 8
+; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 60
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 44
-; VI-NEXT: s_lshr_b32 s47, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 45
-; VI-NEXT: s_lshr_b32 s47, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 46
-; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: s_lshr_b32 s46, s22, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 62
+; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: v_writelane_b32 v33, s46, 47
-; VI-NEXT: s_lshr_b32 s47, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 48
+; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: s_lshr_b32 s46, s20, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v34, s46, 0
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v34, s46, 1
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v34, s46, 2
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 55
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: v_writelane_b32 v33, s46, 53
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 59
-; VI-NEXT: s_lshr_b64 s[88:89], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s47, 21
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s47, 19
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s47, 17
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: v_writelane_b32 v33, s47, 11
-; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: v_writelane_b32 v33, s47, 9
-; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: v_writelane_b32 v33, s47, 7
-; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: v_writelane_b32 v33, s47, 5
-; VI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: v_writelane_b32 v33, s47, 3
-; VI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
; VI-NEXT: v_writelane_b32 v33, s46, 0
-; VI-NEXT: s_lshr_b32 s59, s5, 16
-; VI-NEXT: s_lshr_b32 s68, s5, 8
-; VI-NEXT: s_lshr_b32 s81, s4, 8
-; VI-NEXT: s_lshr_b32 s85, s7, 24
-; VI-NEXT: s_lshr_b32 s80, s7, 16
-; VI-NEXT: s_lshr_b32 s57, s7, 8
-; VI-NEXT: s_lshr_b32 s56, s6, 16
-; VI-NEXT: s_lshr_b32 s84, s6, 8
-; VI-NEXT: s_lshr_b32 s64, s9, 24
-; VI-NEXT: s_lshr_b32 s83, s9, 16
-; VI-NEXT: s_lshr_b32 s53, s9, 8
-; VI-NEXT: s_lshr_b32 s58, s8, 8
-; VI-NEXT: s_lshr_b32 s50, s11, 24
-; VI-NEXT: s_lshr_b32 s61, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s11, 8
-; VI-NEXT: s_lshr_b32 s63, s10, 16
-; VI-NEXT: s_lshr_b32 s51, s10, 8
-; VI-NEXT: s_lshr_b32 s73, s13, 24
-; VI-NEXT: s_lshr_b32 s62, s13, 16
-; VI-NEXT: s_lshr_b32 s52, s13, 8
-; VI-NEXT: s_lshr_b32 s72, s12, 8
-; VI-NEXT: s_lshr_b32 s54, s15, 24
-; VI-NEXT: s_lshr_b32 s75, s15, 16
-; VI-NEXT: s_lshr_b32 s74, s15, 8
-; VI-NEXT: s_lshr_b32 s55, s14, 16
-; VI-NEXT: s_lshr_b32 s76, s14, 8
-; VI-NEXT: s_lshr_b32 s71, s41, 24
-; VI-NEXT: s_lshr_b32 s77, s41, 16
-; VI-NEXT: s_lshr_b32 s69, s41, 8
-; VI-NEXT: s_lshr_b32 s67, s40, 16
-; VI-NEXT: s_lshr_b32 s82, s40, 8
-; VI-NEXT: s_lshr_b32 s65, s43, 24
-; VI-NEXT: s_lshr_b32 s70, s43, 16
-; VI-NEXT: s_lshr_b32 s78, s43, 8
-; VI-NEXT: s_lshr_b32 s86, s42, 16
-; VI-NEXT: s_lshr_b32 s79, s42, 8
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s87, s45, 16
+; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
; VI-NEXT: v_writelane_b32 v33, s47, 1
-; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
-; VI-NEXT: s_lshr_b64 vcc, s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB13_3
; VI-NEXT: .LBB13_2:
@@ -9428,51 +9448,86 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr79
-; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr67
-; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr77
-; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr75
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr73
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr63
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr61
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr57
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr59
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr90
-; VI-NEXT: ; implicit-def: $sgpr88
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -9580,487 +9635,539 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: v_writelane_b32 v33, s47, 17
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s47, 19
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s47, 21
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: .LBB13_3: ; %Flow
-; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
-; VI-NEXT: v_readlane_b32 s48, v33, 18
-; VI-NEXT: s_mov_b32 s49, s59
-; VI-NEXT: v_readlane_b32 s46, v33, 19
-; VI-NEXT: s_mov_b32 s47, s81
-; VI-NEXT: s_mov_b32 s81, s85
-; VI-NEXT: v_readlane_b32 s59, v33, 20
-; VI-NEXT: s_mov_b32 s85, s63
-; VI-NEXT: s_mov_b32 s63, s73
-; VI-NEXT: v_readlane_b32 s73, v33, 21
+; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
+; VI-NEXT: v_readlane_b32 s75, v33, 24
+; VI-NEXT: v_readlane_b32 s72, v33, 25
+; VI-NEXT: v_readlane_b32 s73, v33, 26
+; VI-NEXT: v_readlane_b32 s39, v33, 27
+; VI-NEXT: v_readlane_b32 s49, v33, 28
+; VI-NEXT: v_readlane_b32 s51, v33, 29
+; VI-NEXT: v_readlane_b32 s47, v33, 30
+; VI-NEXT: v_readlane_b32 s53, v33, 31
+; VI-NEXT: v_readlane_b32 s59, v33, 32
+; VI-NEXT: v_readlane_b32 s84, v33, 33
+; VI-NEXT: v_readlane_b32 s38, v33, 34
+; VI-NEXT: v_readlane_b32 s56, v33, 35
+; VI-NEXT: v_readlane_b32 s48, v33, 36
+; VI-NEXT: v_readlane_b32 s50, v33, 37
+; VI-NEXT: v_readlane_b32 s52, v33, 38
+; VI-NEXT: v_readlane_b32 s54, v33, 39
+; VI-NEXT: v_readlane_b32 s55, v33, 40
+; VI-NEXT: v_readlane_b32 s64, v33, 41
+; VI-NEXT: v_readlane_b32 s65, v33, 42
+; VI-NEXT: v_readlane_b32 s66, v33, 43
+; VI-NEXT: v_readlane_b32 s67, v33, 44
+; VI-NEXT: v_readlane_b32 s68, v33, 45
+; VI-NEXT: v_readlane_b32 s46, v33, 46
+; VI-NEXT: v_readlane_b32 s69, v33, 47
+; VI-NEXT: v_readlane_b32 s80, v33, 48
+; VI-NEXT: v_readlane_b32 s81, v33, 49
+; VI-NEXT: v_readlane_b32 s82, v33, 50
+; VI-NEXT: v_readlane_b32 s83, v33, 51
+; VI-NEXT: v_readlane_b32 s85, v33, 52
+; VI-NEXT: v_readlane_b32 s86, v33, 53
+; VI-NEXT: v_readlane_b32 s88, v33, 54
+; VI-NEXT: v_readlane_b32 s87, v33, 55
+; VI-NEXT: v_readlane_b32 s58, v33, 56
+; VI-NEXT: v_readlane_b32 s89, v33, 57
+; VI-NEXT: v_readlane_b32 s90, v33, 58
+; VI-NEXT: v_readlane_b32 s91, v33, 59
+; VI-NEXT: v_readlane_b32 s57, v33, 60
+; VI-NEXT: v_readlane_b32 s60, v33, 61
+; VI-NEXT: v_readlane_b32 s61, v33, 62
+; VI-NEXT: v_readlane_b32 vcc_lo, v33, 63
+; VI-NEXT: v_readlane_b32 vcc_hi, v34, 0
+; VI-NEXT: v_readlane_b32 s30, v34, 1
+; VI-NEXT: v_readlane_b32 s62, v34, 2
+; VI-NEXT: v_readlane_b32 s63, v34, 3
+; VI-NEXT: v_readlane_b32 s31, v34, 4
+; VI-NEXT: v_readlane_b32 s70, v33, 8
+; VI-NEXT: v_readlane_b32 s71, v33, 9
; VI-NEXT: s_cbranch_scc1 .LBB13_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: s_add_i32 s45, s45, 3
-; VI-NEXT: s_add_i32 s44, s44, 3
-; VI-NEXT: s_lshr_b32 s88, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 22
-; VI-NEXT: s_lshr_b32 s88, s44, 16
-; VI-NEXT: s_add_i32 s29, s29, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 23
-; VI-NEXT: s_lshr_b32 s88, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 24
-; VI-NEXT: s_lshr_b32 s88, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 25
-; VI-NEXT: s_lshr_b32 s88, s29, 16
-; VI-NEXT: s_add_i32 s28, s28, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 26
-; VI-NEXT: s_lshr_b32 s88, s29, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 27
-; VI-NEXT: s_lshr_b32 s88, s28, 16
-; VI-NEXT: s_add_i32 s27, s27, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 28
-; VI-NEXT: s_lshr_b32 s88, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 29
-; VI-NEXT: s_lshr_b32 s88, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 30
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_add_i32 s26, s26, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 31
-; VI-NEXT: s_lshr_b32 s88, s27, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 32
-; VI-NEXT: s_lshr_b32 s88, s26, 16
-; VI-NEXT: s_add_i32 s25, s25, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 33
-; VI-NEXT: s_lshr_b32 s88, s26, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 34
-; VI-NEXT: s_lshr_b32 s88, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 35
-; VI-NEXT: s_lshr_b32 s88, s25, 16
-; VI-NEXT: s_add_i32 s24, s24, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 36
-; VI-NEXT: s_lshr_b32 s88, s25, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 37
-; VI-NEXT: s_lshr_b32 s88, s24, 16
-; VI-NEXT: s_add_i32 s23, s23, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 38
-; VI-NEXT: s_lshr_b32 s88, s24, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 39
-; VI-NEXT: s_lshr_b32 s88, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 40
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_add_i32 s22, s22, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 41
-; VI-NEXT: s_lshr_b32 s88, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 42
-; VI-NEXT: s_lshr_b32 s88, s22, 16
-; VI-NEXT: s_add_i32 s21, s21, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 43
-; VI-NEXT: s_lshr_b32 s88, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 44
-; VI-NEXT: s_lshr_b32 s88, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 45
-; VI-NEXT: s_lshr_b32 s88, s21, 16
-; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 46
-; VI-NEXT: s_lshr_b32 s88, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 47
-; VI-NEXT: s_lshr_b32 s88, s20, 16
-; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 48
-; VI-NEXT: s_lshr_b32 s88, s20, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 49
-; VI-NEXT: s_lshr_b32 s88, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 50
-; VI-NEXT: s_lshr_b32 s88, s19, 16
-; VI-NEXT: s_add_i32 s18, s18, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 51
-; VI-NEXT: s_lshr_b32 s88, s19, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 52
-; VI-NEXT: s_lshr_b32 s88, s18, 16
-; VI-NEXT: s_add_i32 s17, s17, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 53
-; VI-NEXT: s_lshr_b32 s88, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 54
-; VI-NEXT: s_lshr_b32 s88, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 55
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 56
-; VI-NEXT: s_lshr_b32 s88, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 57
-; VI-NEXT: s_lshr_b32 s88, s16, 16
; VI-NEXT: s_add_i32 s5, s5, 3
+; VI-NEXT: s_lshr_b32 s46, s5, 24
; VI-NEXT: s_add_i32 s4, s4, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 58
-; VI-NEXT: s_lshr_b32 s88, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 59
-; VI-NEXT: s_lshr_b64 s[88:89], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: s_add_i32 s7, s7, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 17
-; VI-NEXT: s_lshr_b64 s[88:89], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 14
-; VI-NEXT: v_writelane_b32 v33, s89, 15
-; VI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: v_writelane_b32 v33, s72, 22
; VI-NEXT: s_add_i32 s10, s10, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 12
-; VI-NEXT: v_writelane_b32 v33, s89, 13
-; VI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: v_writelane_b32 v33, s73, 23
+; VI-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: v_writelane_b32 v33, s72, 20
; VI-NEXT: s_add_i32 s13, s13, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v33, s73, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v33, s74, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: v_writelane_b32 v33, s75, 19
+; VI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
; VI-NEXT: s_add_i32 s12, s12, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 10
-; VI-NEXT: v_writelane_b32 v33, s89, 11
-; VI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v33, s74, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: v_writelane_b32 v33, s75, 17
+; VI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s14, s14, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 8
-; VI-NEXT: v_writelane_b32 v33, s89, 9
-; VI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: v_writelane_b32 v33, s74, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v33, s75, 15
+; VI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; VI-NEXT: s_add_i32 s29, s29, 3
+; VI-NEXT: s_add_i32 s28, s28, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: v_writelane_b32 v33, s74, 12
+; VI-NEXT: s_add_i32 s43, s43, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: v_writelane_b32 v33, s75, 13
+; VI-NEXT: s_lshr_b64 s[70:71], s[28:29], 24
+; VI-NEXT: s_add_i32 s25, s25, 3
+; VI-NEXT: s_add_i32 s24, s24, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: s_lshr_b32 s37, s43, 8
+; VI-NEXT: v_writelane_b32 v33, s70, 10
; VI-NEXT: s_add_i32 s41, s41, 3
; VI-NEXT: s_add_i32 s40, s40, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 6
-; VI-NEXT: v_writelane_b32 v33, s89, 7
-; VI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24
-; VI-NEXT: s_add_i32 s43, s43, 3
-; VI-NEXT: s_add_i32 s42, s42, 3
-; VI-NEXT: v_writelane_b32 v33, s88, 4
-; VI-NEXT: v_writelane_b32 v33, s89, 5
-; VI-NEXT: s_lshr_b64 s[88:89], s[42:43], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 2
-; VI-NEXT: v_writelane_b32 v33, s89, 3
-; VI-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 0
-; VI-NEXT: s_lshr_b32 s48, s5, 24
-; VI-NEXT: s_lshr_b32 s49, s5, 16
-; VI-NEXT: s_lshr_b32 s68, s5, 8
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: s_lshr_b32 s47, s4, 8
-; VI-NEXT: s_lshr_b32 s81, s7, 24
-; VI-NEXT: s_lshr_b32 s80, s7, 16
-; VI-NEXT: s_lshr_b32 s57, s7, 8
-; VI-NEXT: s_lshr_b32 s56, s6, 16
-; VI-NEXT: s_lshr_b32 s84, s6, 8
-; VI-NEXT: s_lshr_b32 s64, s9, 24
-; VI-NEXT: s_lshr_b32 s83, s9, 16
-; VI-NEXT: s_lshr_b32 s53, s9, 8
-; VI-NEXT: s_lshr_b32 s59, s8, 16
-; VI-NEXT: s_lshr_b32 s58, s8, 8
-; VI-NEXT: s_lshr_b32 s50, s11, 24
-; VI-NEXT: s_lshr_b32 s61, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s11, 8
-; VI-NEXT: s_lshr_b32 s85, s10, 16
-; VI-NEXT: s_lshr_b32 s51, s10, 8
-; VI-NEXT: s_lshr_b32 s63, s13, 24
-; VI-NEXT: s_lshr_b32 s62, s13, 16
-; VI-NEXT: s_lshr_b32 s52, s13, 8
-; VI-NEXT: s_lshr_b32 s73, s12, 16
-; VI-NEXT: s_lshr_b32 s72, s12, 8
-; VI-NEXT: s_lshr_b32 s54, s15, 24
-; VI-NEXT: s_lshr_b32 s75, s15, 16
-; VI-NEXT: s_lshr_b32 s74, s15, 8
-; VI-NEXT: s_lshr_b32 s55, s14, 16
-; VI-NEXT: s_lshr_b32 s76, s14, 8
-; VI-NEXT: s_lshr_b32 s71, s41, 24
-; VI-NEXT: s_lshr_b32 s77, s41, 16
-; VI-NEXT: s_lshr_b32 s69, s41, 8
-; VI-NEXT: s_lshr_b32 s67, s40, 16
-; VI-NEXT: s_lshr_b32 s82, s40, 8
-; VI-NEXT: s_lshr_b32 s65, s43, 24
-; VI-NEXT: s_lshr_b32 s70, s43, 16
-; VI-NEXT: s_lshr_b32 s78, s43, 8
-; VI-NEXT: s_lshr_b32 s86, s42, 16
-; VI-NEXT: s_lshr_b32 s79, s42, 8
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s87, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 1
-; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
-; VI-NEXT: s_lshr_b64 vcc, s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: s_mov_b32 s73, s37
+; VI-NEXT: v_writelane_b32 v33, s71, 11
+; VI-NEXT: s_lshr_b64 s[36:37], s[24:25], 24
+; VI-NEXT: s_add_i32 s21, s21, 3
+; VI-NEXT: s_add_i32 s20, s20, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: s_lshr_b32 s34, s40, 8
+; VI-NEXT: v_writelane_b32 v33, s36, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: s_mov_b32 s72, s34
+; VI-NEXT: v_writelane_b32 v33, s37, 7
; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
+; VI-NEXT: s_add_i32 s19, s19, 3
+; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v33, s34, 4
+; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: v_writelane_b32 v33, s35, 5
+; VI-NEXT: s_lshr_b64 s[34:35], s[18:19], 24
+; VI-NEXT: s_add_i32 s17, s17, 3
+; VI-NEXT: s_add_i32 s16, s16, 3
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v33, s34, 2
+; VI-NEXT: s_add_i32 s23, s23, 3
+; VI-NEXT: s_add_i32 s22, s22, 3
+; VI-NEXT: s_add_i32 s27, s27, 3
+; VI-NEXT: s_add_i32 s26, s26, 3
+; VI-NEXT: s_add_i32 s45, s45, 3
+; VI-NEXT: s_add_i32 s44, s44, 3
+; VI-NEXT: s_add_i32 s42, s42, 3
+; VI-NEXT: s_lshr_b32 s76, s5, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; VI-NEXT: v_writelane_b32 v33, s35, 3
+; VI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: s_lshr_b32 s39, s42, 16
+; VI-NEXT: s_lshr_b32 s49, s42, 8
+; VI-NEXT: s_lshr_b32 s51, s45, 24
+; VI-NEXT: s_lshr_b32 s47, s45, 16
+; VI-NEXT: s_lshr_b32 s53, s45, 8
+; VI-NEXT: s_lshr_b32 s59, s44, 16
+; VI-NEXT: s_lshr_b32 s84, s44, 8
+; VI-NEXT: s_lshr_b32 s38, s29, 24
+; VI-NEXT: s_lshr_b32 s56, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s29, 8
+; VI-NEXT: s_lshr_b32 s48, s28, 16
+; VI-NEXT: s_lshr_b32 s58, s28, 8
+; VI-NEXT: s_lshr_b32 s50, s27, 24
+; VI-NEXT: s_lshr_b32 s52, s27, 16
+; VI-NEXT: s_lshr_b32 s89, s27, 8
+; VI-NEXT: s_lshr_b32 s54, s26, 16
+; VI-NEXT: s_lshr_b32 s90, s26, 8
+; VI-NEXT: s_lshr_b32 s55, s25, 24
+; VI-NEXT: s_lshr_b32 s64, s25, 16
+; VI-NEXT: s_lshr_b32 s91, s25, 8
+; VI-NEXT: s_lshr_b32 s65, s24, 16
+; VI-NEXT: s_lshr_b32 s57, s24, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 24
+; VI-NEXT: s_lshr_b32 s67, s23, 16
+; VI-NEXT: s_lshr_b32 s60, s23, 8
+; VI-NEXT: s_lshr_b32 s68, s22, 16
+; VI-NEXT: s_lshr_b32 s61, s22, 8
+; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: s_lshr_b32 s69, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 8
+; VI-NEXT: s_lshr_b32 s81, s19, 24
+; VI-NEXT: s_lshr_b32 s82, s19, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 8
+; VI-NEXT: s_lshr_b32 s83, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s18, 8
+; VI-NEXT: s_lshr_b32 s85, s17, 24
+; VI-NEXT: s_lshr_b32 s86, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s17, 8
+; VI-NEXT: s_lshr_b32 s87, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s16, 8
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v33, s34, 0
+; VI-NEXT: v_writelane_b32 v33, s35, 1
; VI-NEXT: .LBB13_5: ; %end
-; VI-NEXT: v_readlane_b32 s89, v33, 59
-; VI-NEXT: v_mov_b32_e32 v2, s89
-; VI-NEXT: v_readlane_b32 s89, v33, 57
+; VI-NEXT: v_readlane_b32 s34, v33, 0
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v4, s89
+; VI-NEXT: v_mov_b32_e32 v2, s31
+; VI-NEXT: v_perm_b32 v6, s87, v6, v1
+; VI-NEXT: v_mov_b32_e32 v4, s63
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 54
+; VI-NEXT: v_mov_b32_e32 v24, s85
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_mov_b32_e32 v4, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 52
-; VI-NEXT: v_mov_b32_e32 v6, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 49
+; VI-NEXT: v_readlane_b32 s16, v33, 2
+; VI-NEXT: v_perm_b32 v24, s86, v24, v1
+; VI-NEXT: v_or_b32_e32 v3, v3, v6
+; VI-NEXT: v_mov_b32_e32 v9, s16
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
+; VI-NEXT: v_mov_b32_e32 v4, s62
+; VI-NEXT: v_perm_b32 v9, s83, v9, v1
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: v_readlane_b32 s17, v33, 3
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_perm_b32 v4, s19, v6, v1
-; VI-NEXT: v_mov_b32_e32 v6, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 47
-; VI-NEXT: v_mov_b32_e32 v8, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 44
-; VI-NEXT: v_perm_b32 v7, s20, v6, v1
-; VI-NEXT: v_perm_b32 v6, s21, v8, v1
-; VI-NEXT: v_mov_b32_e32 v8, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 42
-; VI-NEXT: v_mov_b32_e32 v11, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 39
-; VI-NEXT: v_perm_b32 v10, s22, v8, v1
-; VI-NEXT: v_perm_b32 v8, s23, v11, v1
-; VI-NEXT: v_mov_b32_e32 v11, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 37
-; VI-NEXT: v_mov_b32_e32 v14, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 34
-; VI-NEXT: v_perm_b32 v12, s24, v11, v1
-; VI-NEXT: v_perm_b32 v11, s25, v14, v1
-; VI-NEXT: v_mov_b32_e32 v14, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 32
-; VI-NEXT: v_mov_b32_e32 v17, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 29
-; VI-NEXT: v_perm_b32 v15, s26, v14, v1
-; VI-NEXT: v_perm_b32 v14, s27, v17, v1
-; VI-NEXT: v_mov_b32_e32 v17, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 27
-; VI-NEXT: v_mov_b32_e32 v23, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 0
-; VI-NEXT: v_mov_b32_e32 v9, s38
-; VI-NEXT: v_perm_b32 v18, s28, v17, v1
-; VI-NEXT: v_perm_b32 v17, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 58
-; VI-NEXT: v_perm_b32 v9, s16, v9, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 55
-; VI-NEXT: v_mov_b32_e32 v24, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 56
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v24, s16, v24, v1
-; VI-NEXT: v_or_b32_e32 v3, v3, v9
-; VI-NEXT: v_mov_b32_e32 v13, s36
-; VI-NEXT: v_readlane_b32 s16, v33, 53
-; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_perm_b32 v13, s16, v13, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 50
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v25, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 51
+; VI-NEXT: v_mov_b32_e32 v25, s81
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_perm_b32 v25, s16, v25, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; VI-NEXT: v_mov_b32_e32 v7, s30
+; VI-NEXT: v_readlane_b32 s16, v33, 4
+; VI-NEXT: v_perm_b32 v25, s82, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
-; VI-NEXT: v_mov_b32_e32 v16, s34
-; VI-NEXT: v_readlane_b32 s16, v33, 48
+; VI-NEXT: v_perm_b32 v4, s19, v7, v1
+; VI-NEXT: v_mov_b32_e32 v14, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_perm_b32 v16, s16, v16, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 45
+; VI-NEXT: v_mov_b32_e32 v7, vcc_hi
+; VI-NEXT: v_perm_b32 v14, s80, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_mov_b32_e32 v26, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: v_perm_b32 v8, s20, v7, v1
+; VI-NEXT: v_mov_b32_e32 v26, s46
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; VI-NEXT: v_perm_b32 v26, s16, v26, v1
-; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_mov_b32_e32 v19, s30
-; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; VI-NEXT: v_mov_b32_e32 v10, vcc_lo
+; VI-NEXT: v_perm_b32 v26, s69, v26, v1
+; VI-NEXT: v_or_b32_e32 v2, v8, v2
+; VI-NEXT: v_perm_b32 v7, s21, v10, v1
+; VI-NEXT: v_mov_b32_e32 v17, s36
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_perm_b32 v19, s16, v19, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 40
-; VI-NEXT: v_or_b32_e32 v2, v6, v2
-; VI-NEXT: v_mov_b32_e32 v27, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 41
+; VI-NEXT: v_mov_b32_e32 v10, s61
+; VI-NEXT: v_perm_b32 v17, s68, v17, v1
+; VI-NEXT: v_or_b32_e32 v2, v7, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 5
+; VI-NEXT: v_perm_b32 v11, s22, v10, v1
+; VI-NEXT: v_mov_b32_e32 v27, s66
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; VI-NEXT: v_perm_b32 v27, s16, v27, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_mov_b32_e32 v20, vcc_lo
-; VI-NEXT: v_readlane_b32 s16, v33, 38
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; VI-NEXT: v_mov_b32_e32 v12, s60
+; VI-NEXT: v_readlane_b32 s16, v33, 6
+; VI-NEXT: v_perm_b32 v27, s67, v27, v1
+; VI-NEXT: v_or_b32_e32 v2, v11, v2
+; VI-NEXT: v_perm_b32 v10, s23, v12, v1
+; VI-NEXT: v_mov_b32_e32 v20, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_perm_b32 v20, s16, v20, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 35
-; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_mov_b32_e32 v28, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 36
+; VI-NEXT: v_mov_b32_e32 v12, s57
+; VI-NEXT: v_perm_b32 v20, s65, v20, v1
+; VI-NEXT: v_or_b32_e32 v2, v10, v2
+; VI-NEXT: v_perm_b32 v13, s24, v12, v1
+; VI-NEXT: v_mov_b32_e32 v28, s55
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_perm_b32 v28, s16, v28, v1
-; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_mov_b32_e32 v21, s90
-; VI-NEXT: v_readlane_b32 s16, v33, 33
+; VI-NEXT: v_mov_b32_e32 v15, s91
+; VI-NEXT: v_perm_b32 v28, s64, v28, v1
+; VI-NEXT: v_or_b32_e32 v2, v13, v2
+; VI-NEXT: v_perm_b32 v12, s25, v15, v1
+; VI-NEXT: v_mov_b32_e32 v21, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_perm_b32 v21, s16, v21, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 30
-; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_mov_b32_e32 v29, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 31
+; VI-NEXT: v_mov_b32_e32 v15, s90
+; VI-NEXT: v_perm_b32 v21, s54, v21, v1
+; VI-NEXT: v_or_b32_e32 v2, v12, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 7
+; VI-NEXT: v_perm_b32 v16, s26, v15, v1
+; VI-NEXT: v_mov_b32_e32 v29, s50
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_perm_b32 v29, s16, v29, v1
-; VI-NEXT: v_or_b32_e32 v2, v15, v2
-; VI-NEXT: v_mov_b32_e32 v22, s88
-; VI-NEXT: v_readlane_b32 s16, v33, 28
+; VI-NEXT: v_mov_b32_e32 v18, s89
+; VI-NEXT: v_readlane_b32 s16, v33, 10
+; VI-NEXT: v_perm_b32 v29, s52, v29, v1
+; VI-NEXT: v_or_b32_e32 v2, v16, v2
+; VI-NEXT: v_perm_b32 v15, s27, v18, v1
+; VI-NEXT: v_mov_b32_e32 v22, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_perm_b32 v22, s16, v22, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 25
-; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_mov_b32_e32 v30, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 26
+; VI-NEXT: v_mov_b32_e32 v18, s58
+; VI-NEXT: v_perm_b32 v22, s48, v22, v1
+; VI-NEXT: v_or_b32_e32 v2, v15, v2
+; VI-NEXT: v_perm_b32 v19, s28, v18, v1
+; VI-NEXT: v_mov_b32_e32 v30, s38
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_perm_b32 v30, s16, v30, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 24
-; VI-NEXT: v_or_b32_e32 v2, v18, v2
-; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 23
+; VI-NEXT: v_mov_b32_e32 v23, s88
+; VI-NEXT: v_perm_b32 v30, s56, v30, v1
+; VI-NEXT: v_or_b32_e32 v2, v19, v2
+; VI-NEXT: v_perm_b32 v18, s29, v23, v1
+; VI-NEXT: v_mov_b32_e32 v23, s78
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_perm_b32 v23, s16, v23, v1
-; VI-NEXT: v_or_b32_e32 v2, v17, v2
+; VI-NEXT: v_mov_b32_e32 v31, s84
+; VI-NEXT: v_perm_b32 v23, s59, v23, v1
+; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 22
-; VI-NEXT: v_mov_b32_e32 v3, s66
-; VI-NEXT: v_readlane_b32 s17, v33, 1
+; VI-NEXT: v_mov_b32_e32 v3, s51
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_perm_b32 v3, s87, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s53
+; VI-NEXT: v_perm_b32 v3, s47, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 2
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_mov_b32_e32 v3, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s79
-; VI-NEXT: v_perm_b32 v3, s86, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s49
+; VI-NEXT: v_perm_b32 v3, s39, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_readlane_b32 s16, v34, 38
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s65
-; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 39
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_mov_b32_e32 v2, s78
-; VI-NEXT: v_perm_b32 v3, s70, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s73
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 4
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: v_readlane_b32 s16, v34, 37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s82
-; VI-NEXT: v_perm_b32 v3, s67, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s71
-; VI-NEXT: v_readlane_b32 s17, v33, 5
+; VI-NEXT: v_readlane_b32 s16, v34, 36
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_mov_b32_e32 v2, s69
-; VI-NEXT: v_perm_b32 v3, s77, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 34
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 6
+; VI-NEXT: v_readlane_b32 s17, v33, 11
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 33
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: v_mov_b32_e32 v2, s76
-; VI-NEXT: v_perm_b32 v3, s55, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 12
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s14, v34, 32
+; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s54
+; VI-NEXT: v_readlane_b32 s14, v34, 31
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: v_mov_b32_e32 v2, s74
-; VI-NEXT: v_perm_b32 v3, s75, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 29
+; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 30
+; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s14, v33, 8
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: v_mov_b32_e32 v2, s72
-; VI-NEXT: v_perm_b32 v3, s73, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v33, 14
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s12, v34, 27
+; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s63
+; VI-NEXT: v_readlane_b32 s12, v34, 26
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: v_mov_b32_e32 v2, s52
-; VI-NEXT: v_perm_b32 v3, s62, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 24
+; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 25
+; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s12, v33, 10
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: v_mov_b32_e32 v2, s51
-; VI-NEXT: v_perm_b32 v3, s85, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v33, 16
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s10, v34, 22
+; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s50
+; VI-NEXT: v_readlane_b32 s10, v34, 21
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: v_mov_b32_e32 v2, s60
-; VI-NEXT: v_perm_b32 v3, s61, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 19
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 20
+; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s10, v33, 12
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: v_mov_b32_e32 v2, s58
-; VI-NEXT: v_perm_b32 v3, s59, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 18
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s8, v34, 17
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s64
+; VI-NEXT: v_readlane_b32 s8, v34, 16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: v_mov_b32_e32 v2, s53
-; VI-NEXT: v_perm_b32 v3, s83, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 14
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 15
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s8, v33, 14
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: v_mov_b32_e32 v2, s84
-; VI-NEXT: v_perm_b32 v3, s56, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v33, 20
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s6, v34, 12
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s81
+; VI-NEXT: v_readlane_b32 s6, v34, 11
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: v_mov_b32_e32 v2, s57
-; VI-NEXT: v_perm_b32 v3, s80, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 9
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 10
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s6, v33, 16
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 8
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: v_mov_b32_e32 v2, s47
-; VI-NEXT: v_perm_b32 v3, s46, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v33, 22
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s4, v34, 7
+; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: v_readlane_b32 s4, v34, 6
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: v_mov_b32_e32 v2, s68
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_readlane_b32 s4, v34, 5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s49, v3, v1
+; VI-NEXT: v_perm_b32 v1, s75, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_readlane_b32 s35, v33, 1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s17, v33, 7
-; VI-NEXT: v_readlane_b32 s15, v33, 9
-; VI-NEXT: v_readlane_b32 s13, v33, 11
-; VI-NEXT: v_readlane_b32 s11, v33, 13
-; VI-NEXT: v_readlane_b32 s9, v33, 15
-; VI-NEXT: v_readlane_b32 s7, v33, 17
+; VI-NEXT: v_readlane_b32 s17, v33, 13
+; VI-NEXT: v_readlane_b32 s15, v33, 15
+; VI-NEXT: v_readlane_b32 s13, v33, 17
+; VI-NEXT: v_readlane_b32 s11, v33, 19
+; VI-NEXT: v_readlane_b32 s9, v33, 21
+; VI-NEXT: v_readlane_b32 s7, v33, 23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -10096,6 +10203,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -10106,6 +10214,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: v_writelane_b32 v29, s34, 0
; GFX9-NEXT: v_writelane_b32 v29, s35, 1
@@ -10164,769 +10273,909 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_cmp_lg_u32 s44, 0
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
+; GFX9-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB13_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 20
-; GFX9-NEXT: s_lshr_b32 s47, s11, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 21
-; GFX9-NEXT: s_lshr_b32 s47, s10, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 22
-; GFX9-NEXT: s_lshr_b32 s47, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 23
-; GFX9-NEXT: s_lshr_b32 s47, s26, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 24
-; GFX9-NEXT: s_lshr_b32 s47, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 25
-; GFX9-NEXT: s_lshr_b32 s47, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 26
-; GFX9-NEXT: s_lshr_b32 s47, s25, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 27
-; GFX9-NEXT: s_lshr_b32 s47, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 28
-; GFX9-NEXT: s_lshr_b32 s47, s24, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 29
-; GFX9-NEXT: s_lshr_b32 s47, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 30
-; GFX9-NEXT: s_lshr_b32 s47, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 31
-; GFX9-NEXT: s_lshr_b32 s47, s23, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 32
-; GFX9-NEXT: s_lshr_b32 s47, s23, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 33
-; GFX9-NEXT: s_lshr_b32 s47, s22, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 34
-; GFX9-NEXT: s_lshr_b32 s47, s22, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 35
-; GFX9-NEXT: s_lshr_b32 s47, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 36
-; GFX9-NEXT: s_lshr_b32 s47, s21, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 37
-; GFX9-NEXT: s_lshr_b32 s47, s21, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 38
-; GFX9-NEXT: s_lshr_b32 s47, s20, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 39
-; GFX9-NEXT: s_lshr_b32 s47, s20, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 40
-; GFX9-NEXT: s_lshr_b32 s47, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 41
-; GFX9-NEXT: s_lshr_b32 s47, s19, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 42
-; GFX9-NEXT: s_lshr_b32 s47, s19, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 43
-; GFX9-NEXT: s_lshr_b32 s47, s18, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 44
-; GFX9-NEXT: s_lshr_b32 s47, s18, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 45
-; GFX9-NEXT: s_lshr_b32 s47, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 46
-; GFX9-NEXT: s_lshr_b32 s47, s17, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 47
-; GFX9-NEXT: s_lshr_b32 s47, s17, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 48
-; GFX9-NEXT: s_lshr_b32 s47, s16, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 49
-; GFX9-NEXT: s_lshr_b32 s47, s16, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 50
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[8:9], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 16
-; GFX9-NEXT: v_writelane_b32 v30, s93, 17
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[10:11], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 14
-; GFX9-NEXT: v_writelane_b32 v30, s93, 15
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 12
-; GFX9-NEXT: v_writelane_b32 v30, s93, 13
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 10
-; GFX9-NEXT: v_writelane_b32 v30, s93, 11
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 8
-; GFX9-NEXT: v_writelane_b32 v30, s93, 9
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[42:43], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 6
-; GFX9-NEXT: v_writelane_b32 v30, s93, 7
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[44:45], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 4
-; GFX9-NEXT: v_writelane_b32 v30, s93, 5
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[28:29], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 2
-; GFX9-NEXT: v_writelane_b32 v30, s93, 3
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[26:27], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 0
-; GFX9-NEXT: s_lshr_b32 s81, s5, 16
-; GFX9-NEXT: s_lshr_b32 s82, s5, 8
-; GFX9-NEXT: s_lshr_b32 s96, s4, 16
-; GFX9-NEXT: s_lshr_b32 s83, s4, 8
-; GFX9-NEXT: s_lshr_b32 s86, s7, 24
-; GFX9-NEXT: s_lshr_b32 s84, s7, 16
-; GFX9-NEXT: s_lshr_b32 s87, s7, 8
-; GFX9-NEXT: s_lshr_b32 s57, s6, 16
-; GFX9-NEXT: s_lshr_b32 s97, s6, 8
-; GFX9-NEXT: s_lshr_b32 s98, s9, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s5, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s5, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: s_lshr_b32 s46, s4, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: s_lshr_b32 s46, s4, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: s_lshr_b32 s46, s7, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: s_lshr_b32 s46, s7, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: s_lshr_b32 s46, s7, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: s_lshr_b32 s46, s6, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: s_lshr_b32 s46, s6, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: s_lshr_b32 s46, s9, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: s_lshr_b32 s48, s9, 8
-; GFX9-NEXT: s_lshr_b32 s39, s8, 16
-; GFX9-NEXT: s_lshr_b32 s38, s8, 8
-; GFX9-NEXT: s_lshr_b32 s56, s11, 16
-; GFX9-NEXT: s_lshr_b32 s49, s11, 8
-; GFX9-NEXT: s_lshr_b32 s50, s10, 8
-; GFX9-NEXT: s_lshr_b32 s51, s13, 24
-; GFX9-NEXT: s_lshr_b32 s52, s13, 16
-; GFX9-NEXT: s_lshr_b32 s59, s13, 8
-; GFX9-NEXT: s_lshr_b32 s58, s12, 16
-; GFX9-NEXT: s_lshr_b32 s67, s12, 8
-; GFX9-NEXT: s_lshr_b32 s60, s15, 24
-; GFX9-NEXT: s_lshr_b32 s65, s15, 16
-; GFX9-NEXT: s_lshr_b32 s61, s15, 8
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s55, s14, 8
-; GFX9-NEXT: s_lshr_b32 s63, s41, 24
-; GFX9-NEXT: s_lshr_b32 s72, s41, 16
-; GFX9-NEXT: s_lshr_b32 s66, s41, 8
-; GFX9-NEXT: s_lshr_b32 s73, s40, 16
-; GFX9-NEXT: s_lshr_b32 s64, s40, 8
-; GFX9-NEXT: s_lshr_b32 s74, s43, 24
-; GFX9-NEXT: s_lshr_b32 s80, s43, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 8
-; GFX9-NEXT: s_lshr_b32 s76, s42, 16
-; GFX9-NEXT: s_lshr_b32 s70, s42, 8
-; GFX9-NEXT: s_lshr_b32 s77, s45, 24
-; GFX9-NEXT: s_lshr_b32 s78, s45, 16
-; GFX9-NEXT: s_lshr_b32 s68, s45, 8
-; GFX9-NEXT: s_lshr_b32 s79, s44, 16
-; GFX9-NEXT: s_lshr_b32 s71, s44, 8
-; GFX9-NEXT: s_lshr_b32 s69, s29, 24
-; GFX9-NEXT: s_lshr_b32 s85, s29, 16
-; GFX9-NEXT: s_lshr_b32 s88, s29, 8
-; GFX9-NEXT: s_lshr_b32 s54, s28, 16
-; GFX9-NEXT: s_lshr_b32 s89, s28, 8
-; GFX9-NEXT: s_lshr_b32 s99, s27, 24
-; GFX9-NEXT: s_lshr_b32 s53, s27, 16
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v30, s93, 1
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 vcc, s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: s_lshr_b32 s46, s9, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: s_lshr_b32 s46, s8, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: s_lshr_b32 s46, s11, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: s_lshr_b32 s46, s11, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: s_lshr_b32 s46, s11, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s10, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s10, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s13, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s13, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s13, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s12, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s15, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s46, s40, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s40, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s43, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s43, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s42, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s42, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s45, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s45, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s45, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s44, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s44, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s29, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s29, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 33
+; GFX9-NEXT: s_lshr_b32 s46, s29, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 34
+; GFX9-NEXT: s_lshr_b32 s46, s28, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 35
+; GFX9-NEXT: s_lshr_b32 s46, s28, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 36
+; GFX9-NEXT: s_lshr_b32 s46, s27, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 37
+; GFX9-NEXT: s_lshr_b32 s46, s27, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 38
+; GFX9-NEXT: s_lshr_b32 s46, s27, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 54
+; GFX9-NEXT: s_lshr_b32 s46, s26, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 39
+; GFX9-NEXT: s_lshr_b32 s46, s26, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 56
+; GFX9-NEXT: s_lshr_b32 s46, s25, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 40
+; GFX9-NEXT: s_lshr_b32 s46, s25, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 41
+; GFX9-NEXT: s_lshr_b32 s46, s25, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 57
+; GFX9-NEXT: s_lshr_b32 s46, s24, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 42
+; GFX9-NEXT: s_lshr_b32 s46, s24, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 58
+; GFX9-NEXT: s_lshr_b32 s46, s23, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 43
+; GFX9-NEXT: s_lshr_b32 s46, s23, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 44
+; GFX9-NEXT: s_lshr_b32 s46, s23, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 59
+; GFX9-NEXT: s_lshr_b32 s46, s22, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 45
+; GFX9-NEXT: s_lshr_b32 s46, s22, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 60
+; GFX9-NEXT: s_lshr_b32 s46, s21, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 46
+; GFX9-NEXT: s_lshr_b32 s46, s21, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 47
+; GFX9-NEXT: s_lshr_b32 s46, s21, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 61
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 48
+; GFX9-NEXT: s_lshr_b32 s46, s20, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 62
+; GFX9-NEXT: s_lshr_b32 s46, s19, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 49
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 50
+; GFX9-NEXT: s_lshr_b32 s46, s19, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 63
+; GFX9-NEXT: s_lshr_b32 s46, s18, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 51
+; GFX9-NEXT: s_lshr_b32 s46, s18, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 0
+; GFX9-NEXT: s_lshr_b32 s46, s17, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 52
+; GFX9-NEXT: s_lshr_b32 s46, s17, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 53
+; GFX9-NEXT: s_lshr_b32 s46, s17, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 1
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 55
+; GFX9-NEXT: s_lshr_b32 s46, s16, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 2
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 16
+; GFX9-NEXT: v_writelane_b32 v30, s47, 17
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 14
+; GFX9-NEXT: v_writelane_b32 v30, s47, 15
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 12
+; GFX9-NEXT: v_writelane_b32 v30, s47, 13
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 10
+; GFX9-NEXT: v_writelane_b32 v30, s47, 11
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 8
+; GFX9-NEXT: v_writelane_b32 v30, s47, 9
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 6
+; GFX9-NEXT: v_writelane_b32 v30, s47, 7
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 4
+; GFX9-NEXT: v_writelane_b32 v30, s47, 5
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[22:23], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s47, 3
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 0
+; GFX9-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
+; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[20:21], 24
+; GFX9-NEXT: v_writelane_b32 v30, s47, 1
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[16:17], 24
; GFX9-NEXT: s_mov_b64 s[36:37], 0
; GFX9-NEXT: s_branch .LBB13_3
; GFX9-NEXT: .LBB13_2:
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 0
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 1
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr92
+; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr88
-; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr69
-; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr79
-; GFX9-NEXT: ; implicit-def: $sgpr68
; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr77
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr76
-; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr80
; GFX9-NEXT: ; implicit-def: $sgpr74
-; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr73
-; GFX9-NEXT: ; implicit-def: $sgpr66
-; GFX9-NEXT: ; implicit-def: $sgpr72
-; GFX9-NEXT: ; implicit-def: $sgpr63
-; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr61
-; GFX9-NEXT: ; implicit-def: $sgpr65
-; GFX9-NEXT: ; implicit-def: $sgpr60
-; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr58
-; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr51
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr56
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr57
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr84
-; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr83
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr81
-; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; kill: killed $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr30
-; GFX9-NEXT: ; implicit-def: $vcc_lo
-; GFX9-NEXT: ; implicit-def: $sgpr94
-; GFX9-NEXT: ; implicit-def: $sgpr92
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 2
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 4
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 5
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 6
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 7
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 8
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 9
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 10
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 11
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 12
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 13
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 14
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 15
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 16
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 17
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 0
+; GFX9-NEXT: v_writelane_b32 v30, s47, 1
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s47, 3
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 4
+; GFX9-NEXT: v_writelane_b32 v30, s47, 5
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 6
+; GFX9-NEXT: v_writelane_b32 v30, s47, 7
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 8
+; GFX9-NEXT: v_writelane_b32 v30, s47, 9
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 10
+; GFX9-NEXT: v_writelane_b32 v30, s47, 11
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 12
+; GFX9-NEXT: v_writelane_b32 v30, s47, 13
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 14
+; GFX9-NEXT: v_writelane_b32 v30, s47, 15
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 16
+; GFX9-NEXT: v_writelane_b32 v30, s47, 17
; GFX9-NEXT: .LBB13_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
-; GFX9-NEXT: v_readlane_b32 s36, v30, 20
-; GFX9-NEXT: s_mov_b32 s37, s81
-; GFX9-NEXT: s_mov_b32 s81, s96
-; GFX9-NEXT: s_mov_b32 s96, s57
-; GFX9-NEXT: s_mov_b32 s47, s48
-; GFX9-NEXT: v_readlane_b32 s57, v30, 21
-; GFX9-NEXT: v_readlane_b32 s48, v30, 22
+; GFX9-NEXT: s_and_b64 s[46:47], s[36:37], exec
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
+; GFX9-NEXT: v_readlane_b32 s72, v30, 18
+; GFX9-NEXT: v_readlane_b32 s99, v30, 19
+; GFX9-NEXT: v_readlane_b32 s62, v30, 20
+; GFX9-NEXT: v_readlane_b32 s90, v30, 21
+; GFX9-NEXT: v_readlane_b32 s63, v30, 22
+; GFX9-NEXT: v_readlane_b32 s91, v30, 23
+; GFX9-NEXT: v_readlane_b32 s73, v30, 24
+; GFX9-NEXT: v_readlane_b32 s94, v30, 25
+; GFX9-NEXT: v_readlane_b32 s95, v30, 26
+; GFX9-NEXT: v_readlane_b32 s30, v30, 27
+; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 28
+; GFX9-NEXT: v_readlane_b32 s31, v30, 29
+; GFX9-NEXT: v_readlane_b32 s35, v30, 30
+; GFX9-NEXT: v_readlane_b32 s47, v30, 31
+; GFX9-NEXT: v_readlane_b32 s48, v30, 32
+; GFX9-NEXT: v_readlane_b32 s39, v30, 33
+; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 34
+; GFX9-NEXT: v_readlane_b32 s59, v30, 35
+; GFX9-NEXT: v_readlane_b32 s34, v30, 36
+; GFX9-NEXT: v_readlane_b32 s36, v30, 37
+; GFX9-NEXT: v_readlane_b32 s37, v30, 38
+; GFX9-NEXT: v_readlane_b32 s38, v30, 39
+; GFX9-NEXT: v_readlane_b32 s49, v30, 40
+; GFX9-NEXT: v_readlane_b32 s50, v30, 41
+; GFX9-NEXT: v_readlane_b32 s51, v30, 42
+; GFX9-NEXT: v_readlane_b32 s52, v30, 43
+; GFX9-NEXT: v_readlane_b32 s53, v30, 44
+; GFX9-NEXT: v_readlane_b32 s54, v30, 45
+; GFX9-NEXT: v_readlane_b32 s55, v30, 46
+; GFX9-NEXT: v_readlane_b32 s64, v30, 47
+; GFX9-NEXT: v_readlane_b32 s46, v30, 48
+; GFX9-NEXT: v_readlane_b32 s65, v30, 49
+; GFX9-NEXT: v_readlane_b32 s68, v30, 50
+; GFX9-NEXT: v_readlane_b32 s69, v30, 51
+; GFX9-NEXT: v_readlane_b32 s70, v30, 52
+; GFX9-NEXT: v_readlane_b32 s71, v30, 53
+; GFX9-NEXT: v_readlane_b32 s80, v30, 54
+; GFX9-NEXT: v_readlane_b32 s56, v30, 55
+; GFX9-NEXT: v_readlane_b32 s81, v30, 56
+; GFX9-NEXT: v_readlane_b32 s82, v30, 57
+; GFX9-NEXT: v_readlane_b32 s83, v30, 58
+; GFX9-NEXT: v_readlane_b32 s84, v30, 59
+; GFX9-NEXT: v_readlane_b32 s85, v30, 60
+; GFX9-NEXT: v_readlane_b32 s86, v30, 61
+; GFX9-NEXT: v_readlane_b32 s58, v30, 62
+; GFX9-NEXT: v_readlane_b32 s87, v30, 63
+; GFX9-NEXT: v_readlane_b32 s57, v31, 0
+; GFX9-NEXT: v_readlane_b32 s60, v31, 1
+; GFX9-NEXT: v_readlane_b32 s61, v31, 2
+; GFX9-NEXT: v_readlane_b32 s66, v30, 4
+; GFX9-NEXT: v_readlane_b32 s67, v30, 5
; GFX9-NEXT: s_cbranch_scc1 .LBB13_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: s_add_i32 s27, s27, 3
-; GFX9-NEXT: s_add_i32 s26, s26, 3
-; GFX9-NEXT: s_lshr_b32 s90, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 23
-; GFX9-NEXT: s_lshr_b32 s90, s26, 16
-; GFX9-NEXT: s_add_i32 s25, s25, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 24
-; GFX9-NEXT: s_lshr_b32 s90, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 25
-; GFX9-NEXT: s_lshr_b32 s90, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 26
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_add_i32 s24, s24, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 27
-; GFX9-NEXT: s_lshr_b32 s90, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 28
-; GFX9-NEXT: s_lshr_b32 s90, s24, 16
-; GFX9-NEXT: s_add_i32 s23, s23, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 29
-; GFX9-NEXT: s_lshr_b32 s90, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 30
-; GFX9-NEXT: s_lshr_b32 s90, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 31
-; GFX9-NEXT: s_lshr_b32 s90, s23, 16
-; GFX9-NEXT: s_add_i32 s22, s22, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 32
-; GFX9-NEXT: s_lshr_b32 s90, s23, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 33
-; GFX9-NEXT: s_lshr_b32 s90, s22, 16
-; GFX9-NEXT: s_add_i32 s21, s21, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 34
-; GFX9-NEXT: s_lshr_b32 s90, s22, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 35
-; GFX9-NEXT: s_lshr_b32 s90, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 36
-; GFX9-NEXT: s_lshr_b32 s90, s21, 16
-; GFX9-NEXT: s_add_i32 s20, s20, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 37
-; GFX9-NEXT: s_lshr_b32 s90, s21, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 38
-; GFX9-NEXT: s_lshr_b32 s90, s20, 16
-; GFX9-NEXT: s_add_i32 s19, s19, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 39
-; GFX9-NEXT: s_lshr_b32 s90, s20, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 40
-; GFX9-NEXT: s_lshr_b32 s90, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 41
-; GFX9-NEXT: s_lshr_b32 s90, s19, 16
-; GFX9-NEXT: s_add_i32 s18, s18, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 42
-; GFX9-NEXT: s_lshr_b32 s90, s19, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 43
-; GFX9-NEXT: s_lshr_b32 s90, s18, 16
-; GFX9-NEXT: s_add_i32 s17, s17, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 44
-; GFX9-NEXT: s_lshr_b32 s90, s18, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 45
-; GFX9-NEXT: s_lshr_b32 s90, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 46
-; GFX9-NEXT: s_lshr_b32 s90, s17, 16
-; GFX9-NEXT: s_add_i32 s16, s16, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 47
-; GFX9-NEXT: s_lshr_b32 s90, s17, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 48
-; GFX9-NEXT: s_lshr_b32 s90, s16, 16
; GFX9-NEXT: s_add_i32 s5, s5, 3
; GFX9-NEXT: s_add_i32 s4, s4, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 49
-; GFX9-NEXT: s_lshr_b32 s90, s16, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 50
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s46, s5, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: s_lshr_b32 s46, s4, 16
+; GFX9-NEXT: s_add_i32 s7, s7, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: s_lshr_b32 s46, s4, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: s_lshr_b32 s46, s7, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: s_lshr_b32 s46, s7, 16
+; GFX9-NEXT: s_add_i32 s6, s6, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: s_lshr_b32 s46, s7, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: s_lshr_b32 s46, s6, 16
; GFX9-NEXT: s_add_i32 s9, s9, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: s_lshr_b32 s46, s6, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: s_lshr_b32 s46, s9, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: s_lshr_b32 s46, s9, 16
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: s_lshr_b32 s46, s9, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: s_lshr_b32 s46, s8, 16
; GFX9-NEXT: s_add_i32 s11, s11, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: s_lshr_b32 s46, s11, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: s_lshr_b32 s46, s11, 16
; GFX9-NEXT: s_add_i32 s10, s10, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 16
-; GFX9-NEXT: v_writelane_b32 v30, s93, 17
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: s_lshr_b32 s46, s11, 8
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s10, 16
+; GFX9-NEXT: v_writelane_b32 v30, s62, 16
; GFX9-NEXT: s_add_i32 s13, s13, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s10, 8
+; GFX9-NEXT: v_writelane_b32 v30, s63, 17
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s13, 24
+; GFX9-NEXT: v_writelane_b32 v30, s62, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s13, 16
+; GFX9-NEXT: v_writelane_b32 v30, s63, 15
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
; GFX9-NEXT: s_add_i32 s12, s12, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 14
-; GFX9-NEXT: v_writelane_b32 v30, s93, 15
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s13, 8
+; GFX9-NEXT: v_writelane_b32 v30, s76, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s12, 16
+; GFX9-NEXT: v_writelane_b32 v30, s77, 13
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
; GFX9-NEXT: s_add_i32 s15, s15, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: v_writelane_b32 v30, s76, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: v_writelane_b32 v30, s77, 11
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; GFX9-NEXT: s_add_i32 s27, s27, 3
+; GFX9-NEXT: s_add_i32 s26, s26, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s15, 16
+; GFX9-NEXT: v_writelane_b32 v30, s76, 8
+; GFX9-NEXT: s_add_i32 s43, s43, 3
; GFX9-NEXT: s_add_i32 s14, s14, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 12
-; GFX9-NEXT: v_writelane_b32 v30, s93, 13
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: v_writelane_b32 v30, s77, 9
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
+; GFX9-NEXT: s_add_i32 s23, s23, 3
+; GFX9-NEXT: s_add_i32 s22, s22, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: s_lshr_b32 s92, s43, 24
+; GFX9-NEXT: v_writelane_b32 v30, s66, 6
; GFX9-NEXT: s_add_i32 s41, s41, 3
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: s_mov_b32 s63, s92
+; GFX9-NEXT: v_writelane_b32 v30, s67, 7
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[22:23], 24
+; GFX9-NEXT: s_add_i32 s19, s19, 3
+; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_add_i32 s40, s40, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 10
-; GFX9-NEXT: v_writelane_b32 v30, s93, 11
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX9-NEXT: s_add_i32 s43, s43, 3
-; GFX9-NEXT: s_add_i32 s42, s42, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 8
-; GFX9-NEXT: v_writelane_b32 v30, s93, 9
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[42:43], 24
-; GFX9-NEXT: s_add_i32 s45, s45, 3
-; GFX9-NEXT: s_add_i32 s44, s44, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 6
-; GFX9-NEXT: v_writelane_b32 v30, s93, 7
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[44:45], 24
-; GFX9-NEXT: s_add_i32 s29, s29, 3
-; GFX9-NEXT: s_add_i32 s28, s28, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 4
-; GFX9-NEXT: v_writelane_b32 v30, s93, 5
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[28:29], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
; GFX9-NEXT: v_writelane_b32 v30, s92, 2
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 16
+; GFX9-NEXT: s_lshr_b32 s99, s40, 16
; GFX9-NEXT: v_writelane_b32 v30, s93, 3
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[26:27], 24
-; GFX9-NEXT: s_add_i32 s7, s7, 3
-; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: v_writelane_b32 v30, s92, 0
-; GFX9-NEXT: s_lshr_b32 s36, s5, 24
-; GFX9-NEXT: s_lshr_b32 s37, s5, 16
-; GFX9-NEXT: s_lshr_b32 s82, s5, 8
-; GFX9-NEXT: s_lshr_b32 s81, s4, 16
-; GFX9-NEXT: s_lshr_b32 s83, s4, 8
-; GFX9-NEXT: s_lshr_b32 s86, s7, 24
-; GFX9-NEXT: s_lshr_b32 s84, s7, 16
-; GFX9-NEXT: s_lshr_b32 s87, s7, 8
-; GFX9-NEXT: s_lshr_b32 s96, s6, 16
-; GFX9-NEXT: s_lshr_b32 s97, s6, 8
-; GFX9-NEXT: s_lshr_b32 s98, s9, 24
-; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: s_lshr_b32 s47, s9, 8
-; GFX9-NEXT: s_lshr_b32 s39, s8, 16
-; GFX9-NEXT: s_lshr_b32 s38, s8, 8
-; GFX9-NEXT: s_lshr_b32 s57, s11, 24
-; GFX9-NEXT: s_lshr_b32 s56, s11, 16
-; GFX9-NEXT: s_lshr_b32 s49, s11, 8
-; GFX9-NEXT: s_lshr_b32 s48, s10, 16
-; GFX9-NEXT: s_lshr_b32 s50, s10, 8
-; GFX9-NEXT: s_lshr_b32 s51, s13, 24
-; GFX9-NEXT: s_lshr_b32 s52, s13, 16
-; GFX9-NEXT: s_lshr_b32 s59, s13, 8
-; GFX9-NEXT: s_lshr_b32 s58, s12, 16
-; GFX9-NEXT: s_lshr_b32 s67, s12, 8
-; GFX9-NEXT: s_lshr_b32 s60, s15, 24
-; GFX9-NEXT: s_lshr_b32 s65, s15, 16
-; GFX9-NEXT: s_lshr_b32 s61, s15, 8
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s55, s14, 8
-; GFX9-NEXT: s_lshr_b32 s63, s41, 24
-; GFX9-NEXT: s_lshr_b32 s72, s41, 16
-; GFX9-NEXT: s_lshr_b32 s66, s41, 8
-; GFX9-NEXT: s_lshr_b32 s73, s40, 16
-; GFX9-NEXT: s_lshr_b32 s64, s40, 8
-; GFX9-NEXT: s_lshr_b32 s74, s43, 24
-; GFX9-NEXT: s_lshr_b32 s80, s43, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 8
-; GFX9-NEXT: s_lshr_b32 s76, s42, 16
-; GFX9-NEXT: s_lshr_b32 s70, s42, 8
-; GFX9-NEXT: s_lshr_b32 s77, s45, 24
-; GFX9-NEXT: s_lshr_b32 s78, s45, 16
-; GFX9-NEXT: s_lshr_b32 s68, s45, 8
-; GFX9-NEXT: s_lshr_b32 s79, s44, 16
-; GFX9-NEXT: s_lshr_b32 s71, s44, 8
-; GFX9-NEXT: s_lshr_b32 s69, s29, 24
-; GFX9-NEXT: s_lshr_b32 s85, s29, 16
-; GFX9-NEXT: s_lshr_b32 s88, s29, 8
-; GFX9-NEXT: s_lshr_b32 s54, s28, 16
-; GFX9-NEXT: s_lshr_b32 s89, s28, 8
-; GFX9-NEXT: s_lshr_b32 s99, s27, 24
-; GFX9-NEXT: s_lshr_b32 s53, s27, 16
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v30, s93, 1
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 vcc, s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[18:19], 24
+; GFX9-NEXT: s_add_i32 s17, s17, 3
+; GFX9-NEXT: s_add_i32 s16, s16, 3
+; GFX9-NEXT: s_add_i32 s21, s21, 3
+; GFX9-NEXT: s_add_i32 s20, s20, 3
+; GFX9-NEXT: s_add_i32 s25, s25, 3
+; GFX9-NEXT: s_add_i32 s24, s24, 3
+; GFX9-NEXT: s_add_i32 s29, s29, 3
+; GFX9-NEXT: s_add_i32 s28, s28, 3
+; GFX9-NEXT: s_add_i32 s45, s45, 3
+; GFX9-NEXT: s_add_i32 s44, s44, 3
+; GFX9-NEXT: s_add_i32 s42, s42, 3
+; GFX9-NEXT: s_lshr_b32 s74, s5, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: s_mov_b32 s62, s99
+; GFX9-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
+; GFX9-NEXT: v_writelane_b32 v30, s96, 0
+; GFX9-NEXT: s_lshr_b32 s72, s5, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s90, s40, 8
+; GFX9-NEXT: s_lshr_b32 s91, s43, 16
+; GFX9-NEXT: s_lshr_b32 s73, s43, 8
+; GFX9-NEXT: s_lshr_b32 s94, s42, 16
+; GFX9-NEXT: s_lshr_b32 s95, s42, 8
+; GFX9-NEXT: s_lshr_b32 s30, s45, 24
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s45, 16
+; GFX9-NEXT: s_lshr_b32 s31, s45, 8
+; GFX9-NEXT: s_lshr_b32 s35, s44, 16
+; GFX9-NEXT: s_lshr_b32 s47, s44, 8
+; GFX9-NEXT: s_lshr_b32 s48, s29, 24
+; GFX9-NEXT: s_lshr_b32 s39, s29, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s29, 8
+; GFX9-NEXT: s_lshr_b32 s59, s28, 16
+; GFX9-NEXT: s_lshr_b32 s34, s28, 8
+; GFX9-NEXT: s_lshr_b32 s36, s27, 24
+; GFX9-NEXT: s_lshr_b32 s37, s27, 16
+; GFX9-NEXT: s_lshr_b32 s80, s27, 8
+; GFX9-NEXT: s_lshr_b32 s38, s26, 16
+; GFX9-NEXT: s_lshr_b32 s81, s26, 8
+; GFX9-NEXT: s_lshr_b32 s49, s25, 24
+; GFX9-NEXT: s_lshr_b32 s50, s25, 16
+; GFX9-NEXT: s_lshr_b32 s82, s25, 8
+; GFX9-NEXT: s_lshr_b32 s51, s24, 16
+; GFX9-NEXT: s_lshr_b32 s83, s24, 8
+; GFX9-NEXT: s_lshr_b32 s52, s23, 24
+; GFX9-NEXT: s_lshr_b32 s53, s23, 16
+; GFX9-NEXT: s_lshr_b32 s84, s23, 8
+; GFX9-NEXT: s_lshr_b32 s54, s22, 16
+; GFX9-NEXT: s_lshr_b32 s85, s22, 8
+; GFX9-NEXT: s_lshr_b32 s55, s21, 24
+; GFX9-NEXT: s_lshr_b32 s64, s21, 16
+; GFX9-NEXT: s_lshr_b32 s86, s21, 8
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
+; GFX9-NEXT: s_lshr_b32 s58, s20, 8
+; GFX9-NEXT: s_lshr_b32 s65, s19, 24
+; GFX9-NEXT: s_lshr_b32 s68, s19, 16
+; GFX9-NEXT: s_lshr_b32 s87, s19, 8
+; GFX9-NEXT: s_lshr_b32 s69, s18, 16
+; GFX9-NEXT: s_lshr_b32 s57, s18, 8
+; GFX9-NEXT: s_lshr_b32 s70, s17, 24
+; GFX9-NEXT: s_lshr_b32 s71, s17, 16
+; GFX9-NEXT: s_lshr_b32 s60, s17, 8
+; GFX9-NEXT: s_lshr_b32 s56, s16, 16
+; GFX9-NEXT: s_lshr_b32 s61, s16, 8
+; GFX9-NEXT: s_mov_b32 s99, s74
+; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[20:21], 24
+; GFX9-NEXT: v_writelane_b32 v30, s97, 1
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[16:17], 24
; GFX9-NEXT: .LBB13_5: ; %end
-; GFX9-NEXT: v_readlane_b32 s91, v30, 50
-; GFX9-NEXT: v_mov_b32_e32 v2, s91
-; GFX9-NEXT: v_readlane_b32 s91, v30, 48
+; GFX9-NEXT: v_mov_b32_e32 v6, s96
; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v4, s91
+; GFX9-NEXT: v_mov_b32_e32 v2, s61
+; GFX9-NEXT: v_perm_b32 v6, s56, v6, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s60
; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 45
+; GFX9-NEXT: v_mov_b32_e32 v21, s70
+; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1
-; GFX9-NEXT: v_mov_b32_e32 v4, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 43
-; GFX9-NEXT: v_mov_b32_e32 v6, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 40
-; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
-; GFX9-NEXT: v_perm_b32 v4, s19, v6, v1
-; GFX9-NEXT: v_mov_b32_e32 v6, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 38
-; GFX9-NEXT: v_mov_b32_e32 v9, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 35
-; GFX9-NEXT: v_perm_b32 v7, s20, v6, v1
-; GFX9-NEXT: v_perm_b32 v6, s21, v9, v1
-; GFX9-NEXT: v_mov_b32_e32 v9, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 33
-; GFX9-NEXT: v_mov_b32_e32 v12, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 30
-; GFX9-NEXT: v_perm_b32 v10, s22, v9, v1
-; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v12, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 28
-; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: v_readlane_b32 s16, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v19, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 25
-; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
-; GFX9-NEXT: v_perm_b32 v12, s25, v15, v1
-; GFX9-NEXT: v_readlane_b32 s17, v30, 1
-; GFX9-NEXT: v_mov_b32_e32 v15, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 23
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 2
-; GFX9-NEXT: v_mov_b32_e32 v8, s34
-; GFX9-NEXT: v_perm_b32 v16, s26, v15, v1
-; GFX9-NEXT: v_perm_b32 v15, s27, v20, v1
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 49
-; GFX9-NEXT: v_perm_b32 v8, s16, v8, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 46
-; GFX9-NEXT: v_mov_b32_e32 v21, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 47
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_perm_b32 v21, s16, v21, v1
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX9-NEXT: v_mov_b32_e32 v11, s30
-; GFX9-NEXT: v_readlane_b32 s16, v30, 44
+; GFX9-NEXT: v_perm_b32 v21, s71, v21, v1
+; GFX9-NEXT: v_or_b32_e32 v3, v3, v6
+; GFX9-NEXT: v_mov_b32_e32 v10, s16
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21
-; GFX9-NEXT: v_perm_b32 v11, s16, v11, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 41
+; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_perm_b32 v10, s69, v10, v1
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v22, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 42
+; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
+; GFX9-NEXT: v_mov_b32_e32 v22, s65
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; GFX9-NEXT: v_perm_b32 v22, s16, v22, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; GFX9-NEXT: v_mov_b32_e32 v7, s87
+; GFX9-NEXT: v_perm_b32 v22, s68, v22, v1
; GFX9-NEXT: v_or_b32_e32 v2, v5, v2
-; GFX9-NEXT: v_mov_b32_e32 v14, vcc_lo
-; GFX9-NEXT: v_readlane_b32 s16, v30, 39
+; GFX9-NEXT: v_perm_b32 v4, s19, v7, v1
+; GFX9-NEXT: v_mov_b32_e32 v14, s92
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; GFX9-NEXT: v_perm_b32 v14, s16, v14, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 36
+; GFX9-NEXT: v_mov_b32_e32 v7, s58
+; GFX9-NEXT: v_perm_b32 v14, s46, v14, v1
; GFX9-NEXT: v_or_b32_e32 v2, v4, v2
-; GFX9-NEXT: v_mov_b32_e32 v23, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 37
+; GFX9-NEXT: v_readlane_b32 s17, v30, 1
+; GFX9-NEXT: v_perm_b32 v8, s20, v7, v1
+; GFX9-NEXT: v_mov_b32_e32 v23, s55
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; GFX9-NEXT: v_perm_b32 v23, s16, v23, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX9-NEXT: v_mov_b32_e32 v17, s94
-; GFX9-NEXT: v_readlane_b32 s16, v30, 34
+; GFX9-NEXT: v_mov_b32_e32 v9, s86
+; GFX9-NEXT: v_readlane_b32 s16, v30, 2
+; GFX9-NEXT: v_perm_b32 v23, s64, v23, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v8, v2
+; GFX9-NEXT: v_perm_b32 v7, s21, v9, v1
+; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; GFX9-NEXT: v_perm_b32 v17, s16, v17, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 31
-; GFX9-NEXT: v_or_b32_e32 v2, v6, v2
-; GFX9-NEXT: v_mov_b32_e32 v24, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 32
+; GFX9-NEXT: v_mov_b32_e32 v9, s85
+; GFX9-NEXT: v_perm_b32 v15, s54, v15, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX9-NEXT: v_perm_b32 v11, s22, v9, v1
+; GFX9-NEXT: v_mov_b32_e32 v24, s52
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; GFX9-NEXT: v_perm_b32 v24, s16, v24, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v10, v2
-; GFX9-NEXT: v_mov_b32_e32 v18, s92
-; GFX9-NEXT: v_readlane_b32 s16, v30, 29
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15
+; GFX9-NEXT: v_mov_b32_e32 v12, s84
+; GFX9-NEXT: v_perm_b32 v24, s53, v24, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v11, v2
+; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v16, s66
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; GFX9-NEXT: v_perm_b32 v18, s16, v18, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 26
+; GFX9-NEXT: v_mov_b32_e32 v12, s83
+; GFX9-NEXT: v_perm_b32 v16, s51, v16, v1
; GFX9-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX9-NEXT: v_mov_b32_e32 v25, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 27
+; GFX9-NEXT: v_readlane_b32 s17, v30, 3
+; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, s49
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v18
-; GFX9-NEXT: v_perm_b32 v25, s16, v25, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v17, s82
+; GFX9-NEXT: v_readlane_b32 s16, v30, 6
+; GFX9-NEXT: v_perm_b32 v25, s50, v25, v1
; GFX9-NEXT: v_or_b32_e32 v2, v13, v2
-; GFX9-NEXT: v_readlane_b32 s16, v30, 24
+; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1
+; GFX9-NEXT: v_mov_b32_e32 v17, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; GFX9-NEXT: v_perm_b32 v19, s16, v19, v1
+; GFX9-NEXT: v_mov_b32_e32 v18, s81
+; GFX9-NEXT: v_perm_b32 v17, s38, v17, v1
; GFX9-NEXT: v_or_b32_e32 v2, v12, v2
-; GFX9-NEXT: v_mov_b32_e32 v26, s99
+; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1
+; GFX9-NEXT: v_mov_b32_e32 v26, s36
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; GFX9-NEXT: v_perm_b32 v26, s53, v26, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; GFX9-NEXT: v_mov_b32_e32 v19, s80
+; GFX9-NEXT: v_perm_b32 v26, s37, v26, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v18, v2
+; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1
+; GFX9-NEXT: v_mov_b32_e32 v20, s76
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; GFX9-NEXT: v_mov_b32_e32 v27, s89
-; GFX9-NEXT: v_perm_b32 v20, s54, v20, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v15, v2
+; GFX9-NEXT: v_mov_b32_e32 v27, s34
+; GFX9-NEXT: v_perm_b32 v20, s59, v20, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v19, v2
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s69
-; GFX9-NEXT: v_readlane_b32 s17, v30, 3
-; GFX9-NEXT: v_mov_b32_e32 v28, s88
-; GFX9-NEXT: v_perm_b32 v3, s85, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s48
+; GFX9-NEXT: v_mov_b32_e32 v28, vcc_lo
+; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 4
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s88
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_mov_b32_e32 v2, s71
-; GFX9-NEXT: v_perm_b32 v3, s79, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s47
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s77
-; GFX9-NEXT: v_readlane_b32 s17, v30, 5
+; GFX9-NEXT: v_mov_b32_e32 v3, s30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_mov_b32_e32 v2, s68
-; GFX9-NEXT: v_perm_b32 v3, s78, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s31
+; GFX9-NEXT: v_perm_b32 v3, vcc_hi, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 6
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s78
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_mov_b32_e32 v2, s70
-; GFX9-NEXT: v_perm_b32 v3, s76, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s95
+; GFX9-NEXT: v_perm_b32 v3, s94, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s74
-; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_mov_b32_e32 v3, s63
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_mov_b32_e32 v2, s75
-; GFX9-NEXT: v_perm_b32 v3, s80, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s73
+; GFX9-NEXT: v_perm_b32 v3, s91, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 8
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s74
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_mov_b32_e32 v2, s64
-; GFX9-NEXT: v_perm_b32 v3, s73, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s90
+; GFX9-NEXT: v_perm_b32 v3, s62, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s63
-; GFX9-NEXT: v_readlane_b32 s17, v30, 9
+; GFX9-NEXT: v_readlane_b32 s16, v31, 33
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_mov_b32_e32 v2, s66
-; GFX9-NEXT: v_perm_b32 v3, s72, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 31
+; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 32
+; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 10
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: v_mov_b32_e32 v2, s55
-; GFX9-NEXT: v_perm_b32 v3, s62, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s98
+; GFX9-NEXT: v_readlane_b32 s14, v31, 29
+; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s60
+; GFX9-NEXT: v_readlane_b32 s14, v31, 28
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: v_mov_b32_e32 v2, s61
-; GFX9-NEXT: v_perm_b32 v3, s65, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 26
+; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 27
+; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s14, v30, 12
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 25
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: v_mov_b32_e32 v2, s67
-; GFX9-NEXT: v_perm_b32 v3, s58, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s14
+; GFX9-NEXT: v_readlane_b32 s14, v30, 8
; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s12, v31, 24
+; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s51
+; GFX9-NEXT: v_readlane_b32 s12, v31, 23
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: v_mov_b32_e32 v2, s59
-; GFX9-NEXT: v_perm_b32 v3, s52, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 21
+; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 22
+; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s12, v30, 14
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 20
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: v_mov_b32_e32 v2, s50
-; GFX9-NEXT: v_perm_b32 v3, s48, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s12
+; GFX9-NEXT: v_readlane_b32 s12, v30, 10
; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s10, v31, 19
+; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s57
+; GFX9-NEXT: v_readlane_b32 s10, v31, 18
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: v_mov_b32_e32 v2, s49
-; GFX9-NEXT: v_perm_b32 v3, s56, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 16
+; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 17
+; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s10, v30, 16
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 15
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: v_mov_b32_e32 v2, s38
-; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s10
+; GFX9-NEXT: v_readlane_b32 s10, v30, 12
; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s8, v31, 14
+; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s98
+; GFX9-NEXT: v_readlane_b32 s8, v31, 13
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: v_mov_b32_e32 v2, s47
-; GFX9-NEXT: v_perm_b32 v3, s46, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s8
+; GFX9-NEXT: v_readlane_b32 s8, v31, 11
+; GFX9-NEXT: v_mov_b32_e32 v3, s8
+; GFX9-NEXT: v_readlane_b32 s8, v31, 12
+; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s90
+; GFX9-NEXT: v_readlane_b32 s8, v31, 10
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: v_mov_b32_e32 v2, s97
-; GFX9-NEXT: v_perm_b32 v3, s96, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s8
+; GFX9-NEXT: v_readlane_b32 s8, v30, 14
; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s8
+; GFX9-NEXT: v_readlane_b32 s6, v31, 9
+; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s86
+; GFX9-NEXT: v_readlane_b32 s6, v31, 8
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: v_mov_b32_e32 v2, s87
-; GFX9-NEXT: v_perm_b32 v3, s84, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 6
+; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 7
+; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s6, v30, 18
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 5
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: v_mov_b32_e32 v2, s83
-; GFX9-NEXT: v_perm_b32 v3, s81, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s6
+; GFX9-NEXT: v_readlane_b32 s6, v30, 16
; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s4, v31, 4
+; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX9-NEXT: v_readlane_b32 s4, v31, 3
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: v_mov_b32_e32 v2, s82
-; GFX9-NEXT: v_mov_b32_e32 v3, s36
+; GFX9-NEXT: v_mov_b32_e32 v2, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s72
; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1
-; GFX9-NEXT: v_perm_b32 v1, s37, v3, v1
+; GFX9-NEXT: v_perm_b32 v1, s99, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: v_readlane_b32 s30, v29, 34
-; GFX9-NEXT: v_readlane_b32 s17, v30, 11
-; GFX9-NEXT: v_readlane_b32 s15, v30, 13
-; GFX9-NEXT: v_readlane_b32 s13, v30, 15
-; GFX9-NEXT: v_readlane_b32 s11, v30, 17
-; GFX9-NEXT: v_readlane_b32 s7, v30, 19
+; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_readlane_b32 s15, v30, 9
+; GFX9-NEXT: v_readlane_b32 s13, v30, 11
+; GFX9-NEXT: v_readlane_b32 s11, v30, 13
+; GFX9-NEXT: v_readlane_b32 s9, v30, 15
+; GFX9-NEXT: v_readlane_b32 s7, v30, 17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: v_readlane_b32 s31, v29, 35
; GFX9-NEXT: v_readlane_b32 s99, v29, 33
@@ -10966,6 +11215,7 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -11037,728 +11287,738 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX11-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s103, 0
+; GFX11-NEXT: s_mov_b32 s99, 0
; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB13_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 18
-; GFX11-NEXT: s_lshr_b32 s43, s12, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: s_lshr_b32 s31, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 19
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-NEXT: s_lshr_b32 s46, s25, 8
+; GFX11-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-NEXT: s_lshr_b32 s30, s27, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s5, 8
+; GFX11-NEXT: s_lshr_b32 s43, s27, 16
+; GFX11-NEXT: s_lshr_b32 s104, s27, 8
+; GFX11-NEXT: s_lshr_b32 s34, s26, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 4
; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 20
-; GFX11-NEXT: s_lshr_b32 s43, s20, 16
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 21
-; GFX11-NEXT: s_lshr_b32 s43, s20, 8
-; GFX11-NEXT: s_lshr_b32 s61, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s48, s9, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 22
-; GFX11-NEXT: s_lshr_b32 s43, s19, 8
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 23
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 24
-; GFX11-NEXT: s_lshr_b32 s43, s18, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 25
-; GFX11-NEXT: s_lshr_b32 s43, s17, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 26
-; GFX11-NEXT: s_lshr_b32 s43, s17, 16
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 27
-; GFX11-NEXT: s_lshr_b32 s43, s17, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 28
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 29
-; GFX11-NEXT: s_lshr_b32 s43, s16, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 30
-; GFX11-NEXT: s_lshr_b32 s43, s3, 24
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 31
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 0
-; GFX11-NEXT: s_lshr_b32 s43, s3, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 1
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 2
-; GFX11-NEXT: s_lshr_b32 s43, s2, 8
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 3
-; GFX11-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 4
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 5
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 6
-; GFX11-NEXT: s_lshr_b32 s43, s0, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 7
-; GFX11-NEXT: s_lshr_b32 s43, s0, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-NEXT: s_lshr_b32 s103, s26, 8
+; GFX11-NEXT: s_lshr_b32 s53, s25, 24
+; GFX11-NEXT: s_lshr_b32 s51, s25, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s4, 8
+; GFX11-NEXT: s_lshr_b32 s54, s24, 16
+; GFX11-NEXT: s_lshr_b32 s39, s24, 8
+; GFX11-NEXT: s_lshr_b32 s80, s23, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-NEXT: s_lshr_b32 s69, s23, 16
+; GFX11-NEXT: s_lshr_b32 s49, s23, 8
+; GFX11-NEXT: s_lshr_b32 s98, s22, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 8
+; GFX11-NEXT: s_lshr_b32 s86, s21, 24
+; GFX11-NEXT: s_lshr_b32 s85, s21, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-NEXT: s_lshr_b32 s96, s21, 8
+; GFX11-NEXT: s_lshr_b32 s97, s20, 16
+; GFX11-NEXT: s_lshr_b32 s87, s20, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 9
+; GFX11-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-NEXT: s_lshr_b32 s84, s19, 24
+; GFX11-NEXT: s_lshr_b32 s83, s19, 16
+; GFX11-NEXT: s_lshr_b32 s31, s19, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 10
+; GFX11-NEXT: s_lshr_b32 s42, s6, 8
+; GFX11-NEXT: s_lshr_b32 s35, s18, 16
+; GFX11-NEXT: s_lshr_b32 s36, s18, 8
+; GFX11-NEXT: s_lshr_b32 s81, s17, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 11
+; GFX11-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-NEXT: s_lshr_b32 s70, s17, 16
+; GFX11-NEXT: s_lshr_b32 s37, s17, 8
+; GFX11-NEXT: s_lshr_b32 s38, s16, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 12
+; GFX11-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-NEXT: s_lshr_b32 s67, s3, 24
+; GFX11-NEXT: s_lshr_b32 s66, s3, 16
+; GFX11-NEXT: s_lshr_b32 s48, s3, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 13
+; GFX11-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-NEXT: s_lshr_b32 s50, s2, 16
+; GFX11-NEXT: s_lshr_b32 s52, s2, 8
+; GFX11-NEXT: s_lshr_b32 s64, s1, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-NEXT: s_lshr_b32 s55, s1, 16
+; GFX11-NEXT: s_lshr_b32 s68, s1, 8
+; GFX11-NEXT: s_lshr_b32 s71, s0, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 15
+; GFX11-NEXT: s_lshr_b32 s42, s8, 8
+; GFX11-NEXT: s_lshr_b32 s82, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[100:101], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 16
+; GFX11-NEXT: s_lshr_b32 s42, s11, 24
+; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24
+; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 17
+; GFX11-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 18
+; GFX11-NEXT: s_lshr_b32 s42, s11, 8
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-NEXT: v_writelane_b32 v26, s42, 19
+; GFX11-NEXT: s_lshr_b32 s42, s10, 16
; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 20
+; GFX11-NEXT: s_lshr_b32 s42, s10, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 21
+; GFX11-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 22
+; GFX11-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 23
+; GFX11-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 24
+; GFX11-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 25
+; GFX11-NEXT: s_lshr_b32 s42, s12, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 26
+; GFX11-NEXT: s_lshr_b32 s42, s15, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 27
+; GFX11-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 28
+; GFX11-NEXT: s_lshr_b32 s42, s15, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 29
+; GFX11-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 30
+; GFX11-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 31
+; GFX11-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-NEXT: v_writelane_b32 v25, s42, 0
+; GFX11-NEXT: s_lshr_b32 s42, s41, 16
+; GFX11-NEXT: v_writelane_b32 v26, s44, 0
+; GFX11-NEXT: v_writelane_b32 v25, s42, 1
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v26, s45, 1
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24
+; GFX11-NEXT: s_mov_b32 s45, s46
+; GFX11-NEXT: v_writelane_b32 v25, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s40, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-NEXT: v_writelane_b32 v25, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-NEXT: s_branch .LBB13_3
; GFX11-NEXT: .LBB13_2:
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: s_mov_b32 s103, -1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: s_mov_b32 s99, -1
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: v_writelane_b32 v26, s46, 0
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr82
+; GFX11-NEXT: ; implicit-def: $sgpr71
; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr50
; GFX11-NEXT: ; implicit-def: $sgpr94
+; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr38
; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr37
; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr99
+; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr36
+; GFX11-NEXT: ; implicit-def: $sgpr35
+; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr83
+; GFX11-NEXT: ; implicit-def: $sgpr84
; GFX11-NEXT: ; implicit-def: $sgpr87
; GFX11-NEXT: ; implicit-def: $sgpr97
+; GFX11-NEXT: ; implicit-def: $sgpr88
; GFX11-NEXT: ; implicit-def: $sgpr96
; GFX11-NEXT: ; implicit-def: $sgpr85
; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr78
+; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr69
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr39
; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr72
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr51
; GFX11-NEXT: ; implicit-def: $sgpr53
+; GFX11-NEXT: ; implicit-def: $sgpr103
+; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr43
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr76
+; GFX11-NEXT: ; implicit-def: $sgpr74
+; GFX11-NEXT: ; implicit-def: $sgpr62
; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr100
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: v_writelane_b32 v26, s47, 1
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s42, 0
-; GFX11-NEXT: v_writelane_b32 v26, s43, 1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s72, 2
-; GFX11-NEXT: v_writelane_b32 v26, s73, 3
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 4
-; GFX11-NEXT: v_writelane_b32 v26, s73, 5
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 6
-; GFX11-NEXT: v_writelane_b32 v26, s73, 7
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 9
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 10
-; GFX11-NEXT: v_writelane_b32 v26, s73, 11
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 12
-; GFX11-NEXT: v_writelane_b32 v26, s73, 13
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 14
-; GFX11-NEXT: v_writelane_b32 v26, s73, 15
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: ; implicit-def: $sgpr72
; GFX11-NEXT: .LBB13_3: ; %Flow
-; GFX11-NEXT: s_and_b32 s43, s103, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_mov_b32 s103, s31
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_mov_b32 s31, s42
-; GFX11-NEXT: s_mov_b32 s42, s61
-; GFX11-NEXT: s_mov_b32 s43, s48
-; GFX11-NEXT: v_readlane_b32 s48, v26, 18
-; GFX11-NEXT: v_readlane_b32 s61, v26, 19
+; GFX11-NEXT: s_and_b32 s47, s99, exec_lo
+; GFX11-NEXT: s_cselect_b32 s47, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s47, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB13_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s20, s20, 3
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_add_i32 s19, s19, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 20
-; GFX11-NEXT: s_lshr_b32 s72, s20, 16
-; GFX11-NEXT: s_add_i32 s18, s18, 3
-; GFX11-NEXT: s_add_i32 s17, s17, 3
-; GFX11-NEXT: s_add_i32 s16, s16, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 21
-; GFX11-NEXT: s_lshr_b32 s72, s20, 8
-; GFX11-NEXT: s_add_i32 s3, s3, 3
-; GFX11-NEXT: s_add_i32 s2, s2, 3
-; GFX11-NEXT: s_add_i32 s1, s1, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 22
-; GFX11-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-NEXT: s_add_i32 s0, s0, 3
; GFX11-NEXT: s_add_i32 s5, s5, 3
; GFX11-NEXT: s_add_i32 s4, s4, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 23
-; GFX11-NEXT: s_lshr_b32 s72, s18, 16
+; GFX11-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-NEXT: s_add_i32 s7, s7, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-NEXT: s_add_i32 s6, s6, 3
; GFX11-NEXT: s_add_i32 s9, s9, 3
; GFX11-NEXT: s_add_i32 s8, s8, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s5, 8
; GFX11-NEXT: s_add_i32 s11, s11, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 24
-; GFX11-NEXT: s_lshr_b32 s72, s18, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
; GFX11-NEXT: s_add_i32 s10, s10, 3
; GFX11-NEXT: s_add_i32 s13, s13, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 25
-; GFX11-NEXT: s_lshr_b32 s72, s17, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s4, 16
; GFX11-NEXT: s_add_i32 s12, s12, 3
; GFX11-NEXT: s_add_i32 s15, s15, 3
; GFX11-NEXT: s_add_i32 s14, s14, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 26
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s4, 8
; GFX11-NEXT: s_add_i32 s41, s41, 3
; GFX11-NEXT: s_add_i32 s40, s40, 3
; GFX11-NEXT: s_add_i32 s29, s29, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 27
-; GFX11-NEXT: s_lshr_b32 s72, s17, 8
-; GFX11-NEXT: s_add_i32 s28, s28, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 28
-; GFX11-NEXT: s_lshr_b32 s72, s16, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
+; GFX11-NEXT: s_add_i32 s28, s28, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-NEXT: s_add_i32 s1, s1, 3
+; GFX11-NEXT: s_add_i32 s0, s0, 3
+; GFX11-NEXT: s_add_i32 s3, s3, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-NEXT: s_add_i32 s2, s2, 3
+; GFX11-NEXT: s_add_i32 s17, s17, 3
+; GFX11-NEXT: s_add_i32 s16, s16, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 9
+; GFX11-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-NEXT: s_add_i32 s19, s19, 3
+; GFX11-NEXT: s_add_i32 s18, s18, 3
; GFX11-NEXT: s_add_i32 s21, s21, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 29
-; GFX11-NEXT: s_lshr_b32 s72, s16, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 10
+; GFX11-NEXT: s_lshr_b32 s42, s6, 8
+; GFX11-NEXT: s_add_i32 s20, s20, 3
; GFX11-NEXT: s_add_i32 s23, s23, 3
-; GFX11-NEXT: s_add_i32 s7, s7, 3
-; GFX11-NEXT: s_add_i32 s6, s6, 3
-; GFX11-NEXT: v_writelane_b32 v26, s72, 30
-; GFX11-NEXT: s_lshr_b32 s72, s3, 24
-; GFX11-NEXT: s_lshr_b32 s103, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 31
-; GFX11-NEXT: s_lshr_b32 s72, s3, 16
-; GFX11-NEXT: s_lshr_b32 s31, s4, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 0
-; GFX11-NEXT: s_lshr_b32 s72, s3, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 1
-; GFX11-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 2
-; GFX11-NEXT: s_lshr_b32 s72, s2, 8
-; GFX11-NEXT: s_lshr_b32 s43, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 3
-; GFX11-NEXT: s_lshr_b32 s72, s1, 24
-; GFX11-NEXT: s_lshr_b32 s48, s8, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 4
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 5
-; GFX11-NEXT: s_lshr_b32 s72, s1, 8
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 6
-; GFX11-NEXT: s_lshr_b32 s72, s0, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s61, s12, 16
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 7
-; GFX11-NEXT: s_lshr_b32 s72, s0, 8
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-NEXT: s_add_i32 s22, s22, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 11
+; GFX11-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-NEXT: s_add_i32 s24, s24, 3
+; GFX11-NEXT: s_add_i32 s27, s27, 3
+; GFX11-NEXT: s_add_i32 s26, s26, 3
+; GFX11-NEXT: v_writelane_b32 v26, s42, 12
+; GFX11-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-NEXT: s_lshr_b32 s46, s25, 8
+; GFX11-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-NEXT: s_lshr_b32 s30, s27, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 13
+; GFX11-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-NEXT: s_lshr_b32 s43, s27, 16
+; GFX11-NEXT: s_lshr_b32 s104, s27, 8
+; GFX11-NEXT: s_lshr_b32 s34, s26, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-NEXT: s_lshr_b32 s103, s26, 8
+; GFX11-NEXT: s_lshr_b32 s53, s25, 24
+; GFX11-NEXT: s_lshr_b32 s51, s25, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 15
+; GFX11-NEXT: s_lshr_b32 s42, s8, 8
+; GFX11-NEXT: s_lshr_b32 s54, s24, 16
+; GFX11-NEXT: s_lshr_b32 s39, s24, 8
+; GFX11-NEXT: s_lshr_b32 s80, s23, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 16
+; GFX11-NEXT: s_lshr_b32 s42, s11, 24
+; GFX11-NEXT: s_lshr_b32 s69, s23, 16
+; GFX11-NEXT: s_lshr_b32 s49, s23, 8
+; GFX11-NEXT: s_lshr_b32 s98, s22, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 17
+; GFX11-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 8
+; GFX11-NEXT: s_lshr_b32 s86, s21, 24
+; GFX11-NEXT: s_lshr_b32 s85, s21, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 18
+; GFX11-NEXT: s_lshr_b32 s42, s11, 8
+; GFX11-NEXT: s_lshr_b32 s96, s21, 8
+; GFX11-NEXT: s_lshr_b32 s97, s20, 16
+; GFX11-NEXT: s_lshr_b32 s87, s20, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 19
+; GFX11-NEXT: s_lshr_b32 s42, s10, 16
+; GFX11-NEXT: s_lshr_b32 s84, s19, 24
+; GFX11-NEXT: s_lshr_b32 s83, s19, 16
+; GFX11-NEXT: s_lshr_b32 s31, s19, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 20
+; GFX11-NEXT: s_lshr_b32 s42, s10, 8
+; GFX11-NEXT: s_lshr_b32 s35, s18, 16
+; GFX11-NEXT: s_lshr_b32 s36, s18, 8
+; GFX11-NEXT: s_lshr_b32 s81, s17, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 21
+; GFX11-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-NEXT: s_lshr_b32 s70, s17, 16
+; GFX11-NEXT: s_lshr_b32 s37, s17, 8
+; GFX11-NEXT: s_lshr_b32 s38, s16, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 22
+; GFX11-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-NEXT: s_lshr_b32 s67, s3, 24
+; GFX11-NEXT: s_lshr_b32 s66, s3, 16
+; GFX11-NEXT: s_lshr_b32 s48, s3, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 23
+; GFX11-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-NEXT: s_lshr_b32 s50, s2, 16
+; GFX11-NEXT: s_lshr_b32 s52, s2, 8
+; GFX11-NEXT: s_lshr_b32 s64, s1, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 24
+; GFX11-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-NEXT: s_lshr_b32 s55, s1, 16
+; GFX11-NEXT: s_lshr_b32 s68, s1, 8
+; GFX11-NEXT: s_lshr_b32 s71, s0, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 25
+; GFX11-NEXT: s_lshr_b32 s42, s12, 8
+; GFX11-NEXT: s_lshr_b32 s82, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[100:101], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 26
+; GFX11-NEXT: s_lshr_b32 s42, s15, 24
+; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24
+; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 27
+; GFX11-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 28
+; GFX11-NEXT: s_lshr_b32 s42, s15, 8
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 29
+; GFX11-NEXT: s_lshr_b32 s42, s14, 16
; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 30
+; GFX11-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 31
+; GFX11-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-NEXT: v_writelane_b32 v25, s42, 0
+; GFX11-NEXT: s_lshr_b32 s42, s41, 16
+; GFX11-NEXT: v_writelane_b32 v26, s44, 0
+; GFX11-NEXT: v_writelane_b32 v25, s42, 1
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v26, s45, 1
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24
+; GFX11-NEXT: s_mov_b32 s45, s46
+; GFX11-NEXT: v_writelane_b32 v25, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s40, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-NEXT: v_writelane_b32 v25, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-NEXT: .LBB13_5: ; %end
; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s73, v25, 7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
-; GFX11-NEXT: v_readlane_b32 s73, v25, 8
+; GFX11-NEXT: v_readlane_b32 s101, v24, 3
+; GFX11-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_perm_b32 v2, s71, vcc_lo, v1
+; GFX11-NEXT: v_readlane_b32 s71, v23, 21
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v3, s0, s73, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 6
-; GFX11-NEXT: v_perm_b32 v21, s70, s79, v1
-; GFX11-NEXT: v_perm_b32 v22, s77, s78, v1
-; GFX11-NEXT: v_perm_b32 v17, s21, s68, v1
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
-; GFX11-NEXT: v_perm_b32 v4, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 2
-; GFX11-NEXT: v_readlane_b32 s1, v25, 5
-; GFX11-NEXT: v_readlane_b32 s70, v23, 20
-; GFX11-NEXT: v_readlane_b32 s68, v23, 18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s0, s94, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 3
-; GFX11-NEXT: v_perm_b32 v6, s2, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s3, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 29
-; GFX11-NEXT: v_perm_b32 v8, s0, s92, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v9, s16, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 28
-; GFX11-NEXT: v_perm_b32 v10, s17, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v11, s0, s90, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 25
-; GFX11-NEXT: v_perm_b32 v12, s18, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 23
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v13, s19, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 21
-; GFX11-NEXT: v_perm_b32 v14, s0, s88, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 20
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v15, s0, s74, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 22
-; GFX11-NEXT: v_perm_b32 v16, s20, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v18, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 31
-; GFX11-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-NEXT: v_perm_b32 v18, s55, s64, v1
+; GFX11-NEXT: v_perm_b32 v3, s0, s82, v1
+; GFX11-NEXT: v_perm_b32 v4, s1, s68, v1
+; GFX11-NEXT: v_perm_b32 v5, s50, s94, v1
+; GFX11-NEXT: v_perm_b32 v19, s66, s67, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v19, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 26
-; GFX11-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-NEXT: v_perm_b32 v6, s2, s52, v1
+; GFX11-NEXT: v_perm_b32 v7, s3, s48, v1
+; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-NEXT: v_perm_b32 v8, s38, s92, v1
; GFX11-NEXT: v_or_b32_e32 v3, v4, v18
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v20, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 0
+; GFX11-NEXT: v_perm_b32 v11, s35, s90, v1
+; GFX11-NEXT: v_perm_b32 v20, s70, s81, v1
+; GFX11-NEXT: v_perm_b32 v21, s83, s84, v1
; GFX11-NEXT: v_or_b32_e32 v4, v6, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX11-NEXT: v_perm_b32 v6, s102, s101, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; GFX11-NEXT: v_readlane_b32 s1, v26, 1
-; GFX11-NEXT: v_perm_b32 v14, s7, s36, v1
+; GFX11-NEXT: v_perm_b32 v9, s16, s42, v1
+; GFX11-NEXT: v_perm_b32 v10, s17, s37, v1
+; GFX11-NEXT: v_perm_b32 v12, s18, s36, v1
+; GFX11-NEXT: v_perm_b32 v13, s19, s31, v1
+; GFX11-NEXT: v_perm_b32 v14, s97, s88, v1
; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8
; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-NEXT: v_perm_b32 v15, s98, s78, v1
+; GFX11-NEXT: v_perm_b32 v16, s20, s87, v1
+; GFX11-NEXT: v_perm_b32 v22, s85, s86, v1
; GFX11-NEXT: v_or_b32_e32 v2, v9, v2
; GFX11-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX11-NEXT: v_perm_b32 v6, s69, s80, v1
; GFX11-NEXT: v_or_b32_e32 v4, v12, v4
; GFX11-NEXT: v_or_b32_e32 v5, v13, v5
-; GFX11-NEXT: v_perm_b32 v9, s22, s76, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX11-NEXT: v_perm_b32 v17, s21, s96, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-NEXT: v_perm_b32 v9, s22, s65, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v11, s25, s87, v1
; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
; GFX11-NEXT: v_or_b32_e32 v2, v16, v7
+; GFX11-NEXT: v_perm_b32 v5, s54, s72, v1
+; GFX11-NEXT: v_perm_b32 v7, s23, s49, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX11-NEXT: v_or_b32_e32 v3, v17, v8
-; GFX11-NEXT: v_perm_b32 v5, s99, s0, v1
-; GFX11-NEXT: v_perm_b32 v7, s23, s100, v1
-; GFX11-NEXT: v_perm_b32 v8, s97, s96, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 2
-; GFX11-NEXT: v_readlane_b32 s1, v26, 3
; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v9, s24, s98, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v12, s86, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 6
; GFX11-NEXT: v_or_b32_e32 v5, v7, v6
-; GFX11-NEXT: v_readlane_b32 s0, v26, 4
-; GFX11-NEXT: v_readlane_b32 s1, v26, 5
+; GFX11-NEXT: v_readlane_b32 s1, v25, 5
+; GFX11-NEXT: v_perm_b32 v8, s51, s53, v1
+; GFX11-NEXT: v_perm_b32 v9, s24, s39, v1
+; GFX11-NEXT: v_perm_b32 v11, s25, s45, v1
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
+; GFX11-NEXT: v_perm_b32 v2, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 8
+; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX11-NEXT: v_or_b32_e32 v6, v9, v10
+; GFX11-NEXT: v_perm_b32 v10, s43, s30, v1
+; GFX11-NEXT: v_perm_b32 v12, s34, s76, v1
+; GFX11-NEXT: v_perm_b32 v4, s28, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 7
; GFX11-NEXT: v_or_b32_e32 v7, v11, v8
-; GFX11-NEXT: v_perm_b32 v8, s26, s85, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s83, s82, v1
-; GFX11-NEXT: v_perm_b32 v11, s81, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
-; GFX11-NEXT: v_perm_b32 v2, s71, s69, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 6
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s27, s84, v1
+; GFX11-NEXT: v_perm_b32 v11, s102, s74, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s28, s80, v1
+; GFX11-NEXT: v_perm_b32 v8, s26, s103, v1
+; GFX11-NEXT: v_perm_b32 v10, s29, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 3
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s29, s67, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s66, s0, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 7
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-NEXT: v_perm_b32 v12, s0, s62, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 4
+; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-NEXT: v_perm_b32 v9, s27, s104, v1
; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_perm_b32 v4, s40, s65, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s55, s54, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 8
-; GFX11-NEXT: v_readlane_b32 s1, v26, 9
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s41, s64, v1
-; GFX11-NEXT: v_perm_b32 v11, s62, s0, v1
-; GFX11-NEXT: v_perm_b32 v6, s53, s60, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX11-NEXT: v_readlane_b32 s0, v26, 10
-; GFX11-NEXT: v_readlane_b32 s1, v26, 11
-; GFX11-NEXT: v_perm_b32 v8, s14, s63, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s15, s52, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s61, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX11-NEXT: v_readlane_b32 s0, v26, 12
-; GFX11-NEXT: v_readlane_b32 s1, v26, 13
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s12, s58, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s56, s57, v1
-; GFX11-NEXT: v_perm_b32 v11, s51, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
-; GFX11-NEXT: v_perm_b32 v2, s49, s47, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s13, s59, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s10, s50, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s11, s46, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s48, s0, v1
+; GFX11-NEXT: v_perm_b32 v4, s40, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 1
; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_perm_b32 v4, s8, s44, v1
; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s39, s43, v1
-; GFX11-NEXT: v_perm_b32 v11, s42, s72, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 15
-; GFX11-NEXT: v_perm_b32 v12, s6, s38, v1
+; GFX11-NEXT: v_readlane_b32 s2, v26, 0
; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s9, s45, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_readlane_b32 s0, v26, 16
-; GFX11-NEXT: v_readlane_b32 s1, v26, 17
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 2
+; GFX11-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
+; GFX11-NEXT: v_readlane_b32 s30, v24, 7
+; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; GFX11-NEXT: v_perm_b32 v5, s41, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 30
+; GFX11-NEXT: v_readlane_b32 s3, v26, 1
+; GFX11-NEXT: v_readlane_b32 s31, v24, 8
+; GFX11-NEXT: v_readlane_b32 s104, v24, 6
+; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
+; GFX11-NEXT: v_perm_b32 v11, s0, s60, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 28
+; GFX11-NEXT: v_readlane_b32 s103, v24, 5
; GFX11-NEXT: v_readlane_b32 s102, v24, 4
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
-; GFX11-NEXT: v_perm_b32 v10, s37, s35, v1
-; GFX11-NEXT: v_readlane_b32 s101, v24, 3
-; GFX11-NEXT: v_readlane_b32 s100, v24, 2
-; GFX11-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX11-NEXT: v_perm_b32 v6, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 31
+; GFX11-NEXT: v_readlane_b32 s1, v26, 22
; GFX11-NEXT: v_readlane_b32 s98, v24, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
-; GFX11-NEXT: v_perm_b32 v12, s31, s0, v1
; GFX11-NEXT: v_readlane_b32 s97, v23, 31
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-NEXT: v_perm_b32 v8, s14, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 29
; GFX11-NEXT: v_readlane_b32 s96, v23, 30
-; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
-; GFX11-NEXT: v_perm_b32 v13, s4, s34, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX11-NEXT: v_readlane_b32 s87, v23, 29
; GFX11-NEXT: v_readlane_b32 s86, v23, 28
+; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-NEXT: v_perm_b32 v10, s15, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 25
; GFX11-NEXT: v_readlane_b32 s85, v23, 27
; GFX11-NEXT: v_readlane_b32 s84, v23, 26
-; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX11-NEXT: v_perm_b32 v13, s104, s103, v1
-; GFX11-NEXT: v_perm_b32 v1, s5, s30, v1
-; GFX11-NEXT: v_readlane_b32 s30, v24, 7
-; GFX11-NEXT: v_readlane_b32 s31, v24, 8
-; GFX11-NEXT: v_readlane_b32 s104, v24, 6
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_readlane_b32 s103, v24, 5
; GFX11-NEXT: v_readlane_b32 s83, v23, 25
+; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-NEXT: v_perm_b32 v12, s0, s58, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 26
; GFX11-NEXT: v_readlane_b32 s82, v23, 24
; GFX11-NEXT: v_readlane_b32 s81, v23, 23
-; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
; GFX11-NEXT: v_readlane_b32 s80, v23, 22
-; GFX11-NEXT: v_readlane_b32 s71, v23, 21
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-NEXT: v_perm_b32 v8, s12, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 23
+; GFX11-NEXT: v_readlane_b32 s70, v23, 20
; GFX11-NEXT: v_readlane_b32 s69, v23, 19
+; GFX11-NEXT: v_readlane_b32 s68, v23, 18
+; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 24
+; GFX11-NEXT: v_readlane_b32 s1, v26, 17
; GFX11-NEXT: v_readlane_b32 s67, v23, 17
; GFX11-NEXT: v_readlane_b32 s66, v23, 16
+; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-NEXT: v_perm_b32 v9, s13, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 20
; GFX11-NEXT: v_readlane_b32 s65, v23, 15
; GFX11-NEXT: v_readlane_b32 s64, v23, 14
; GFX11-NEXT: v_readlane_b32 s55, v23, 13
+; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-NEXT: v_perm_b32 v11, s0, s56, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 18
; GFX11-NEXT: v_readlane_b32 s54, v23, 12
; GFX11-NEXT: v_readlane_b32 s53, v23, 11
; GFX11-NEXT: v_readlane_b32 s52, v23, 10
+; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-NEXT: v_perm_b32 v2, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 21
+; GFX11-NEXT: v_readlane_b32 s1, v26, 12
; GFX11-NEXT: v_readlane_b32 s51, v23, 9
; GFX11-NEXT: v_readlane_b32 s50, v23, 8
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-NEXT: v_perm_b32 v4, s10, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 19
; GFX11-NEXT: v_readlane_b32 s49, v23, 7
; GFX11-NEXT: v_readlane_b32 s48, v23, 6
; GFX11-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-NEXT: v_perm_b32 v10, s11, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 15
; GFX11-NEXT: v_readlane_b32 s38, v23, 4
; GFX11-NEXT: v_readlane_b32 s37, v23, 3
; GFX11-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-NEXT: v_perm_b32 v12, s0, s100, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 16
+; GFX11-NEXT: v_readlane_b32 s100, v24, 2
; GFX11-NEXT: v_readlane_b32 s35, v23, 1
; GFX11-NEXT: v_readlane_b32 s34, v23, 0
-; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
-; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-NEXT: scratch_load_b32 v23, off, s32
-; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4
-; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8
-; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12
-; GFX11-NEXT: s_mov_b32 exec_lo, s0
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: s_setpc_b64 s[30:31]
- %cmp = icmp eq i32 %b, 0
- br i1 %cmp, label %cmp.true, label %cmp.false
-
-cmp.true:
- %a1 = add <32 x i32> %a, splat (i32 3)
- %a2 = bitcast <32 x i32> %a1 to <128 x i8>
- br label %end
-
-cmp.false:
- %a3 = bitcast <32 x i32> %a to <128 x i8>
- br label %end
-
-end:
- %phi = phi <128 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
- ret <128 x i8> %phi
-}
-
+; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-NEXT: v_perm_b32 v4, s8, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 13
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 14
+; GFX11-NEXT: v_readlane_b32 s1, v26, 7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-NEXT: v_perm_b32 v5, s9, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 10
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
+; GFX11-NEXT: v_perm_b32 v11, s0, s44, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 8
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 11
+; GFX11-NEXT: v_readlane_b32 s1, v26, 2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
+; GFX11-NEXT: v_perm_b32 v12, s6, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
+; GFX11-NEXT: v_perm_b32 v14, s7, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 5
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
+; GFX11-NEXT: v_perm_b32 v12, s0, s2, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 6
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-NEXT: v_perm_b32 v13, s4, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
+; GFX11-NEXT: v_perm_b32 v13, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-NEXT: v_perm_b32 v1, s5, s0, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
+; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
+; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
+; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
+; GFX11-NEXT: scratch_load_b32 v23, off, s32
+; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4
+; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8
+; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12
+; GFX11-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %cmp = icmp eq i32 %b, 0
+ br i1 %cmp, label %cmp.true, label %cmp.false
+
+cmp.true:
+ %a1 = add <32 x i32> %a, splat (i32 3)
+ %a2 = bitcast <32 x i32> %a1 to <128 x i8>
+ br label %end
+
+cmp.false:
+ %a3 = bitcast <32 x i32> %a to <128 x i8>
+ br label %end
+
+end:
+ %phi = phi <128 x i8> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
+ ret <128 x i8> %phi
+}
+
define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v32i32:
; SI: ; %bb.0:
@@ -17612,8 +17872,16 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s58, v10
+; SI-NEXT: v_readfirstlane_b32 s59, v9
+; SI-NEXT: v_readfirstlane_b32 s60, v8
+; SI-NEXT: v_readfirstlane_b32 s61, v7
; SI-NEXT: v_readfirstlane_b32 s76, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
; SI-NEXT: v_readfirstlane_b32 s46, v30
; SI-NEXT: v_readfirstlane_b32 s6, v29
; SI-NEXT: v_readfirstlane_b32 s7, v28
@@ -17627,327 +17895,318 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s15, v20
; SI-NEXT: v_readfirstlane_b32 s40, v19
; SI-NEXT: v_readfirstlane_b32 s41, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:332
; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:64
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:104
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:112
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:120
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:128
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328
-; SI-NEXT: v_readfirstlane_b32 s75, v1
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:136
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:200
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:240
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:328
; SI-NEXT: v_readfirstlane_b32 s43, v16
-; SI-NEXT: v_readfirstlane_b32 s45, v14
-; SI-NEXT: v_readfirstlane_b32 s73, v3
-; SI-NEXT: v_readfirstlane_b32 s74, v2
-; SI-NEXT: v_readfirstlane_b32 s57, v11
-; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: v_readfirstlane_b32 s44, v15
+; SI-NEXT: v_readfirstlane_b32 s45, v14
; SI-NEXT: v_readfirstlane_b32 s47, v13
; SI-NEXT: v_readfirstlane_b32 s56, v12
-; SI-NEXT: v_readfirstlane_b32 s58, v10
-; SI-NEXT: v_readfirstlane_b32 s59, v9
-; SI-NEXT: v_readfirstlane_b32 s60, v8
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s57, v11
; SI-NEXT: v_readfirstlane_b32 s62, v6
; SI-NEXT: v_readfirstlane_b32 s63, v5
+; SI-NEXT: v_readfirstlane_b32 s72, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v3
+; SI-NEXT: v_readfirstlane_b32 s74, v2
+; SI-NEXT: v_readfirstlane_b32 s75, v1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40
-; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41
-; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42
-; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46
-; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45
-; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47
-; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v33
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v42
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v61
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v21
+; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v22
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29
-; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48
-; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204
-; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v55
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v54
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v36
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v44, 24, v57
+; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v37
+; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v32
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:284
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:276
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:252
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:156
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
+; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v31
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v40, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
-; SI-NEXT: v_or_b32_e32 v0, s4, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v11, v3
-; SI-NEXT: v_or_b32_e32 v11, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v13, v1
-; SI-NEXT: v_or_b32_e32 v13, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v14, v1
-; SI-NEXT: v_or_b32_e32 v14, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v42
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v15, v1
-; SI-NEXT: v_or_b32_e32 v15, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: v_or_b32_e32 v0, v0, v41
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v16, v1
-; SI-NEXT: v_or_b32_e32 v16, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_or_b32_e32 v0, v0, v40
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v55, v1
-; SI-NEXT: v_or_b32_e32 v17, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v44
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v54
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v53, v1
-; SI-NEXT: v_or_b32_e32 v18, v0, v1
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v12, v2, v3
-; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_or_b32_e32 v6, v15, v6
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v38, v38, v11
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v17
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v38
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v33, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v42, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v20, v0
; SI-NEXT: s_lshl_b32 s5, s17, 8
+; SI-NEXT: s_lshl_b32 s77, s19, 24
+; SI-NEXT: s_lshl_b32 s78, s23, 24
+; SI-NEXT: s_lshl_b32 s79, s27, 24
+; SI-NEXT: s_lshl_b32 s88, s75, 24
+; SI-NEXT: s_lshl_b32 s89, s63, 24
+; SI-NEXT: s_lshl_b32 s90, s59, 24
+; SI-NEXT: s_lshl_b32 s91, s47, 24
+; SI-NEXT: s_lshl_b32 s92, s42, 24
+; SI-NEXT: s_lshl_b32 s93, s14, 24
+; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_lshl_b32 s95, s6, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v7, s4, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v11, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v63
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v18, v7
+; SI-NEXT: v_mov_b32_e32 v6, v13
+; SI-NEXT: v_or_b32_e32 v13, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v62
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v19
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v14, v7
+; SI-NEXT: v_mov_b32_e32 v60, v14
+; SI-NEXT: v_or_b32_e32 v14, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v57
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s18, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s77, s19, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s77, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -17956,7 +18215,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s5, s5, s77
; SI-NEXT: s_and_b32 s77, s22, 0xff
; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s23, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s77, s78, s77
; SI-NEXT: s_or_b32 s5, s5, s77
@@ -17965,7 +18223,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s77, s77, s78
; SI-NEXT: s_and_b32 s78, s26, 0xff
; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s27, 24
; SI-NEXT: s_and_b32 s77, s77, 0xffff
; SI-NEXT: s_or_b32 s78, s79, s78
; SI-NEXT: s_or_b32 s77, s77, s78
@@ -17974,7 +18231,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s78, s78, s79
; SI-NEXT: s_and_b32 s79, s76, 0xff
; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s75, 24
; SI-NEXT: s_and_b32 s78, s78, 0xffff
; SI-NEXT: s_or_b32 s79, s88, s79
; SI-NEXT: s_or_b32 s78, s78, s79
@@ -17983,7 +18239,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s79, s79, s88
; SI-NEXT: s_and_b32 s88, s72, 0xff
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s89, s63, 24
; SI-NEXT: s_and_b32 s79, s79, 0xffff
; SI-NEXT: s_or_b32 s88, s89, s88
; SI-NEXT: s_or_b32 s79, s79, s88
@@ -17992,7 +18247,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s88, s88, s89
; SI-NEXT: s_and_b32 s89, s60, 0xff
; SI-NEXT: s_lshl_b32 s89, s89, 16
-; SI-NEXT: s_lshl_b32 s90, s59, 24
; SI-NEXT: s_and_b32 s88, s88, 0xffff
; SI-NEXT: s_or_b32 s89, s90, s89
; SI-NEXT: s_or_b32 s88, s88, s89
@@ -18001,7 +18255,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s89, s89, s90
; SI-NEXT: s_and_b32 s90, s56, 0xff
; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_lshl_b32 s91, s47, 24
; SI-NEXT: s_and_b32 s89, s89, 0xffff
; SI-NEXT: s_or_b32 s90, s91, s90
; SI-NEXT: s_or_b32 s89, s89, s90
@@ -18009,18 +18262,7 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_lshl_b32 s91, s44, 8
; SI-NEXT: s_or_b32 s90, s90, s91
; SI-NEXT: s_and_b32 s91, s43, 0xff
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v52
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
-; SI-NEXT: v_mov_b32_e32 v49, v48
; SI-NEXT: s_lshl_b32 s91, s91, 16
-; SI-NEXT: s_lshl_b32 s92, s42, 24
; SI-NEXT: s_and_b32 s90, s90, 0xffff
; SI-NEXT: s_or_b32 s91, s92, s91
; SI-NEXT: s_or_b32 s90, s90, s91
@@ -18029,7 +18271,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s91, s91, s92
; SI-NEXT: s_and_b32 s92, s15, 0xff
; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s93, s14, 24
; SI-NEXT: s_and_b32 s91, s91, 0xffff
; SI-NEXT: s_or_b32 s92, s93, s92
; SI-NEXT: s_or_b32 s91, s91, s92
@@ -18038,7 +18279,15 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s92, s92, s93
; SI-NEXT: s_and_b32 s93, s11, 0xff
; SI-NEXT: s_lshl_b32 s93, s93, 16
-; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v47
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v51, v7
+; SI-NEXT: v_or_b32_e32 v15, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v32
; SI-NEXT: s_and_b32 s92, s92, 0xffff
; SI-NEXT: s_or_b32 s93, s94, s93
; SI-NEXT: s_or_b32 s92, s92, s93
@@ -18047,134 +18296,126 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s93, s93, s94
; SI-NEXT: s_and_b32 s94, s7, 0xff
; SI-NEXT: s_lshl_b32 s94, s94, 16
-; SI-NEXT: s_lshl_b32 s95, s6, 24
; SI-NEXT: s_and_b32 s93, s93, 0xffff
; SI-NEXT: s_or_b32 s94, s95, s94
; SI-NEXT: s_or_b32 s93, s93, s94
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v3, s78
-; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v48, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v44, v7
+; SI-NEXT: v_or_b32_e32 v17, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v41
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v18, v5, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v5, s88
-; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: v_mov_b32_e32 v7, s90
-; SI-NEXT: v_mov_b32_e32 v8, s91
-; SI-NEXT: v_mov_b32_e32 v9, s92
-; SI-NEXT: v_mov_b32_e32 v10, s93
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v19, v3, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v3, s78
+; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v20, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v50
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v20, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v39, v1
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v21, v1
; SI-NEXT: v_or_b32_e32 v21, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
-; SI-NEXT: v_mov_b32_e32 v37, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v48
-; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
; SI-NEXT: v_or_b32_e32 v22, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v38
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v23, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v36
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
; SI-NEXT: v_or_b32_e32 v24, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v29, v1
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
; SI-NEXT: v_or_b32_e32 v25, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v29
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_or_b32_e32 v0, v0, v31
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v28, v1
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v56, v1
; SI-NEXT: v_or_b32_e32 v26, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v58
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v0, v0, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
-; SI-NEXT: v_mov_b32_e32 v57, v27
-; SI-NEXT: v_or_b32_e32 v27, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v45
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_or_b32_e32 v28, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v46
-; SI-NEXT: v_mov_b32_e32 v45, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v60, v32
+; SI-NEXT: v_or_b32_e32 v27, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v29, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v28, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
+; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -18183,56 +18424,46 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v29, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v46
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v30, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_or_b32_e32 v31, v0, v1
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s77
+; SI-NEXT: v_mov_b32_e32 v8, s91
+; SI-NEXT: v_mov_b32_e32 v9, s92
+; SI-NEXT: v_mov_b32_e32 v10, s93
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_mov_b32_e32 v49, v48
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: v_mov_b32_e32 v57, v27
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: v_mov_b32_e32 v60, v14
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB15_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v43, v58
-; SI-NEXT: v_mov_b32_e32 v58, v33
-; SI-NEXT: v_mov_b32_e32 v33, v37
-; SI-NEXT: v_mov_b32_e32 v34, v39
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB15_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; SI-NEXT: s_add_i32 s46, s46, 3
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_mov_b32_e32 v32, v35
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_lshl_b32 s5, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -18288,22 +18519,23 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: v_mov_b32_e32 v9, s10
; SI-NEXT: v_mov_b32_e32 v10, s6
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, s4, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s16, s18, 0xff
@@ -18379,16 +18611,15 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_or_b32 s21, s22, s21
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s22, s41, 0xff
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_lshl_b32 s23, s40, 8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v2, v2, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_addk_i32 s22, 0x300
; SI-NEXT: s_and_b32 s22, s22, 0xffff
@@ -18408,312 +18639,366 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v7, s21
; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v3, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v3, s17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v1, v38, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v63, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v37, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v60, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v42, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v41, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v51, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v34, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v57, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
@@ -18735,7 +19020,7 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v128i8_to_v32i32_scalar:
@@ -18757,15 +19042,17 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_readfirstlane_b32 s45, v15
-; VI-NEXT: v_readfirstlane_b32 s46, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
; VI-NEXT: v_readfirstlane_b32 s76, v0
-; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; VI-NEXT: v_readfirstlane_b32 s73, v3
+; VI-NEXT: v_readfirstlane_b32 s47, v13
+; VI-NEXT: v_readfirstlane_b32 s61, v7
+; VI-NEXT: v_readfirstlane_b32 s62, v6
+; VI-NEXT: v_readfirstlane_b32 s63, v5
+; VI-NEXT: v_readfirstlane_b32 s58, v10
+; VI-NEXT: v_readfirstlane_b32 s59, v9
+; VI-NEXT: v_readfirstlane_b32 s60, v8
; VI-NEXT: v_readfirstlane_b32 s6, v30
; VI-NEXT: v_readfirstlane_b32 s7, v29
; VI-NEXT: v_readfirstlane_b32 s8, v28
@@ -18781,448 +19068,424 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s42, v18
; VI-NEXT: v_readfirstlane_b32 s43, v17
; VI-NEXT: v_readfirstlane_b32 s44, v16
+; VI-NEXT: v_readfirstlane_b32 s45, v15
+; VI-NEXT: v_readfirstlane_b32 s46, v14
; VI-NEXT: v_readfirstlane_b32 s56, v12
; VI-NEXT: v_readfirstlane_b32 s57, v11
-; VI-NEXT: v_readfirstlane_b32 s58, v10
-; VI-NEXT: v_readfirstlane_b32 s59, v9
-; VI-NEXT: v_readfirstlane_b32 s60, v8
-; VI-NEXT: v_readfirstlane_b32 s61, v7
-; VI-NEXT: v_readfirstlane_b32 s62, v6
-; VI-NEXT: v_readfirstlane_b32 s63, v5
; VI-NEXT: v_readfirstlane_b32 s72, v4
-; VI-NEXT: v_readfirstlane_b32 s73, v3
; VI-NEXT: v_readfirstlane_b32 s74, v2
; VI-NEXT: v_readfirstlane_b32 s75, v1
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:180
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; VI-NEXT: s_and_b64 s[4:5], vcc, exec
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: v_mov_b32_e32 v2, s21
-; VI-NEXT: v_perm_b32 v3, s22, v3, v11
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_perm_b32 v2, s20, v2, v11
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v0, v0, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v3
+; VI-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v4, s23
+; VI-NEXT: v_mov_b32_e32 v2, s19
+; VI-NEXT: v_mov_b32_e32 v3, s21
+; VI-NEXT: v_perm_b32 v4, s22, v4, v20
+; VI-NEXT: v_mov_b32_e32 v13, s17
+; VI-NEXT: v_perm_b32 v2, s18, v2, v20
+; VI-NEXT: v_perm_b32 v3, s20, v3, v20
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_perm_b32 v13, s16, v13, v20
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_mov_b32_e32 v19, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v4
; VI-NEXT: v_mov_b32_e32 v3, s27
+; VI-NEXT: v_mov_b32_e32 v22, v0
+; VI-NEXT: v_or_b32_e32 v0, v13, v2
; VI-NEXT: v_mov_b32_e32 v2, s25
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
+; VI-NEXT: v_perm_b32 v3, s26, v3, v20
+; VI-NEXT: v_perm_b32 v2, s24, v2, v20
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_mov_b32_e32 v4, s75
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
+; VI-NEXT: v_perm_b32 v4, s76, v4, v20
+; VI-NEXT: v_mov_b32_e32 v44, v5
+; VI-NEXT: v_perm_b32 v3, s28, v3, v20
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_mov_b32_e32 v5, s63
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s73
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
+; VI-NEXT: v_perm_b32 v5, s72, v5, v20
+; VI-NEXT: v_mov_b32_e32 v46, v6
+; VI-NEXT: v_perm_b32 v4, s74, v4, v20
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_mov_b32_e32 v6, s59
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s61
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
+; VI-NEXT: v_perm_b32 v6, s60, v6, v20
+; VI-NEXT: v_mov_b32_e32 v45, v7
+; VI-NEXT: v_perm_b32 v5, s62, v5, v20
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_mov_b32_e32 v7, s47
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s57
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
+; VI-NEXT: v_perm_b32 v7, s56, v7, v20
+; VI-NEXT: v_mov_b32_e32 v47, v40
+; VI-NEXT: v_mov_b32_e32 v40, v8
+; VI-NEXT: v_perm_b32 v6, s58, v6, v20
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_mov_b32_e32 v8, s43
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s45
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
+; VI-NEXT: v_perm_b32 v8, s44, v8, v20
+; VI-NEXT: v_mov_b32_e32 v43, v9
+; VI-NEXT: v_perm_b32 v7, s46, v7, v20
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s41
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
+; VI-NEXT: v_perm_b32 v9, s40, v9, v20
+; VI-NEXT: v_mov_b32_e32 v56, v41
+; VI-NEXT: v_mov_b32_e32 v41, v10
+; VI-NEXT: v_perm_b32 v8, s42, v8, v20
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_mov_b32_e32 v10, s11
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s13
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
+; VI-NEXT: v_perm_b32 v10, s12, v10, v20
+; VI-NEXT: v_mov_b32_e32 v42, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v20
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v12, s7
+; VI-NEXT: v_mov_b32_e32 v11, s7
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s9
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v20
+; VI-NEXT: v_perm_b32 v10, s10, v10, v20
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_e32 v10, v10, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v14, v13, s4
-; VI-NEXT: v_perm_b32 v11, s6, v15, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v52, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v54, v53, s4
-; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v48, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v14, v50, v49, s4
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v36, v35, s4
+; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: v_perm_b32 v14, v52, v14, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v15, v38, v37, s4
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v32, v16, s4
+; VI-NEXT: v_perm_b32 v15, v48, v15, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v16, v34, v33, s4
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v60, v17, s4
+; VI-NEXT: v_perm_b32 v16, v50, v16, s4
+; VI-NEXT: v_perm_b32 v18, v42, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_perm_b32 v17, v62, v61, s4
-; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_perm_b32 v17, v59, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_perm_b32 v18, v41, v40, s4
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_perm_b32 v18, v57, v19, s4
+; VI-NEXT: v_perm_b32 v17, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v19, v42, v58, s4
+; VI-NEXT: v_perm_b32 v19, v63, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v45, v20, s4
+; VI-NEXT: v_perm_b32 v19, v23, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_perm_b32 v20, v56, v47, s4
+; VI-NEXT: v_perm_b32 v23, v34, v33, s4
+; VI-NEXT: v_perm_b32 v24, v41, v43, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, s6, v11, v20
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v20, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v11, v11, v13
+; VI-NEXT: v_perm_b32 v13, v21, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v12, v12, v13
+; VI-NEXT: v_perm_b32 v13, v27, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_perm_b32 v20, v57, v28, s4
+; VI-NEXT: v_or_b32_e32 v13, v20, v13
+; VI-NEXT: v_perm_b32 v20, v55, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v20, v14
+; VI-NEXT: v_perm_b32 v20, v54, v53, s4
+; VI-NEXT: v_or_b32_e32 v15, v20, v15
+; VI-NEXT: v_perm_b32 v20, v39, v36, s4
+; VI-NEXT: v_or_b32_e32 v16, v20, v16
+; VI-NEXT: v_perm_b32 v20, v49, v38, s4
+; VI-NEXT: v_or_b32_e32 v17, v20, v17
+; VI-NEXT: v_perm_b32 v20, v62, v22, s4
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v44, v21, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v25, v58, s4
+; VI-NEXT: v_perm_b32 v22, v30, v31, s4
+; VI-NEXT: v_perm_b32 v25, v45, v46, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v26, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_perm_b32 v21, v46, v26, s4
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v31, v22, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v21, v37, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_perm_b32 v22, v24, v43, s4
; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v28, v23, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v32, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_perm_b32 v23, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v25, v63, s4
-; VI-NEXT: v_mov_b32_e32 v44, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v40, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_perm_b32 v24, v27, v55, s4
; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v57, v56
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v25, v24, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v24, v44, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_or_b32_e32 v25, v25, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_e32 v26, v26, v28
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v27, v27, v29
+; VI-NEXT: v_perm_b32 v29, v47, v56, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v28, v59, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v46, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_perm_b32 v32, v33, v32, s4
+; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
-; VI-NEXT: v_mov_b32_e32 v57, v56
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v44, v24
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB15_3: ; %Flow
-; VI-NEXT: v_mov_b32_e32 v43, v44
-; VI-NEXT: v_mov_b32_e32 v44, v45
-; VI-NEXT: v_mov_b32_e32 v45, v47
-; VI-NEXT: v_mov_b32_e32 v46, v57
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
@@ -19230,11 +19493,11 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
+; VI-NEXT: v_perm_b32 v0, s16, v0, v12
+; VI-NEXT: v_perm_b32 v1, s18, v1, v12
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19242,8 +19505,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v1, s21
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: v_mov_b32_e32 v2, s23
-; VI-NEXT: v_perm_b32 v1, s20, v1, v11
-; VI-NEXT: v_perm_b32 v2, s22, v2, v11
+; VI-NEXT: v_perm_b32 v1, s20, v1, v12
+; VI-NEXT: v_perm_b32 v2, s22, v2, v12
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19251,8 +19514,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v2, s25
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: v_mov_b32_e32 v3, s27
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
+; VI-NEXT: v_perm_b32 v2, s24, v2, v12
+; VI-NEXT: v_perm_b32 v3, s26, v3, v12
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19260,8 +19523,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: s_add_i32 s76, s76, 3
; VI-NEXT: v_mov_b32_e32 v4, s75
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
+; VI-NEXT: v_perm_b32 v3, s28, v3, v12
+; VI-NEXT: v_perm_b32 v4, s76, v4, v12
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19269,8 +19532,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v4, s73
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: v_mov_b32_e32 v5, s63
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
+; VI-NEXT: v_perm_b32 v4, s74, v4, v12
+; VI-NEXT: v_perm_b32 v5, s72, v5, v12
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19278,8 +19541,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v5, s61
; VI-NEXT: s_add_i32 s60, s60, 3
; VI-NEXT: v_mov_b32_e32 v6, s59
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
+; VI-NEXT: v_perm_b32 v5, s62, v5, v12
+; VI-NEXT: v_perm_b32 v6, s60, v6, v12
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19287,8 +19550,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v6, s57
; VI-NEXT: s_add_i32 s56, s56, 3
; VI-NEXT: v_mov_b32_e32 v7, s47
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
+; VI-NEXT: v_perm_b32 v6, s58, v6, v12
+; VI-NEXT: v_perm_b32 v7, s56, v7, v12
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19296,8 +19559,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v7, s45
; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: v_mov_b32_e32 v8, s43
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
+; VI-NEXT: v_perm_b32 v7, s46, v7, v12
+; VI-NEXT: v_perm_b32 v8, s44, v8, v12
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19305,8 +19568,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v8, s41
; VI-NEXT: s_add_i32 s40, s40, 3
; VI-NEXT: v_mov_b32_e32 v9, s15
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
+; VI-NEXT: v_perm_b32 v8, s42, v8, v12
+; VI-NEXT: v_perm_b32 v9, s40, v9, v12
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -19314,37 +19577,23 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v9, s13
; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: v_mov_b32_e32 v10, s11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v12
+; VI-NEXT: v_perm_b32 v10, s12, v10, v12
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_add_i32 s10, s10, 3
; VI-NEXT: v_mov_b32_e32 v10, s9
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_mov_b32_e32 v12, s7
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
+; VI-NEXT: v_mov_b32_e32 v11, s7
+; VI-NEXT: v_perm_b32 v10, s10, v10, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v12
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v32
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v14, v14, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v15, v15, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -19356,254 +19605,337 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v11, s6, v12, v11
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11
-; VI-NEXT: v_perm_b32 v16, v16, v17, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60
-; VI-NEXT: v_perm_b32 v17, v17, v18, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v57
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v18, v18, v19, s4
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v19
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52
-; VI-NEXT: v_perm_b32 v12, v12, v53, s4
-; VI-NEXT: v_perm_b32 v13, v13, v51, s4
+; VI-NEXT: v_perm_b32 v12, s6, v11, v12
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50
-; VI-NEXT: v_perm_b32 v13, v13, v49, s4
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
-; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v14, v14, v37, s4
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
-; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v15, v15, v33, s4
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
-; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v16, v16, v61, s4
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
-; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41
-; VI-NEXT: v_perm_b32 v17, v17, v40, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
-; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42
-; VI-NEXT: v_perm_b32 v18, v18, v47, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v13, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v12, s4
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v14, v12, s4
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v15, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v14, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v16, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; VI-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v17, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v18, v16, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v19, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v19, v18, s4
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20
-; VI-NEXT: v_perm_b32 v20, v20, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45
-; VI-NEXT: v_perm_b32 v20, v20, v44, s4
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v20, v18, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v20, v19, s4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v21, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43
-; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v21, v20, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v20, v22, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v22, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x300, v23
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v24, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; VI-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v23, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v25, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v26, v24, s4
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v27, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v28, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v28, v27, s4
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v28, v29, v28, s4
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v30, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v29
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v31, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v30, v32, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
+; VI-NEXT: v_add_u32_e32 v33, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32
-; VI-NEXT: v_perm_b32 v32, v32, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v31, v33, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB15_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
@@ -19644,15 +19976,17 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_readfirstlane_b32 s45, v15
-; GFX9-NEXT: v_readfirstlane_b32 s46, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
; GFX9-NEXT: v_readfirstlane_b32 s76, v0
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s73, v3
+; GFX9-NEXT: v_readfirstlane_b32 s47, v13
+; GFX9-NEXT: v_readfirstlane_b32 s61, v7
+; GFX9-NEXT: v_readfirstlane_b32 s62, v6
+; GFX9-NEXT: v_readfirstlane_b32 s63, v5
+; GFX9-NEXT: v_readfirstlane_b32 s58, v10
+; GFX9-NEXT: v_readfirstlane_b32 s59, v9
+; GFX9-NEXT: v_readfirstlane_b32 s60, v8
; GFX9-NEXT: v_readfirstlane_b32 s6, v30
; GFX9-NEXT: v_readfirstlane_b32 s7, v29
; GFX9-NEXT: v_readfirstlane_b32 s8, v28
@@ -19668,487 +20002,447 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_readfirstlane_b32 s42, v18
; GFX9-NEXT: v_readfirstlane_b32 s43, v17
; GFX9-NEXT: v_readfirstlane_b32 s44, v16
+; GFX9-NEXT: v_readfirstlane_b32 s45, v15
+; GFX9-NEXT: v_readfirstlane_b32 s46, v14
; GFX9-NEXT: v_readfirstlane_b32 s56, v12
; GFX9-NEXT: v_readfirstlane_b32 s57, v11
-; GFX9-NEXT: v_readfirstlane_b32 s58, v10
-; GFX9-NEXT: v_readfirstlane_b32 s59, v9
-; GFX9-NEXT: v_readfirstlane_b32 s60, v8
-; GFX9-NEXT: v_readfirstlane_b32 s61, v7
-; GFX9-NEXT: v_readfirstlane_b32 s62, v6
-; GFX9-NEXT: v_readfirstlane_b32 s63, v5
; GFX9-NEXT: v_readfirstlane_b32 s72, v4
-; GFX9-NEXT: v_readfirstlane_b32 s73, v3
; GFX9-NEXT: v_readfirstlane_b32 s74, v2
; GFX9-NEXT: v_readfirstlane_b32 s75, v1
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
-; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(55)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(54)
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(49)
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(62)
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB15_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX9-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v4, s23
+; GFX9-NEXT: v_mov_b32_e32 v2, s19
+; GFX9-NEXT: v_mov_b32_e32 v3, s21
+; GFX9-NEXT: v_perm_b32 v4, s22, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v13, s17
+; GFX9-NEXT: v_perm_b32 v2, s18, v2, v20
+; GFX9-NEXT: v_perm_b32 v3, s20, v3, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_perm_b32 v13, s16, v13, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_mov_b32_e32 v19, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_mov_b32_e32 v22, v0
+; GFX9-NEXT: v_or_b32_e32 v0, v13, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v20
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v44, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s63
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v4, s73
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v20
+; GFX9-NEXT: v_mov_b32_e32 v46, v6
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s59
; GFX9-NEXT: v_or_b32_e32 v4, v4, v5
; GFX9-NEXT: v_mov_b32_e32 v5, s61
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v20
+; GFX9-NEXT: v_mov_b32_e32 v45, v7
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s47
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: v_mov_b32_e32 v6, s57
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v20
+; GFX9-NEXT: v_mov_b32_e32 v47, v40
+; GFX9-NEXT: v_mov_b32_e32 v40, v8
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s43
; GFX9-NEXT: v_or_b32_e32 v6, v6, v7
; GFX9-NEXT: v_mov_b32_e32 v7, s45
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v20
+; GFX9-NEXT: v_mov_b32_e32 v43, v9
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: v_mov_b32_e32 v8, s41
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v20
+; GFX9-NEXT: v_mov_b32_e32 v56, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v10
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_mov_b32_e32 v10, s11
; GFX9-NEXT: v_or_b32_e32 v8, v8, v9
; GFX9-NEXT: v_mov_b32_e32 v9, s13
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v20
+; GFX9-NEXT: v_mov_b32_e32 v42, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: v_mov_b32_e32 v10, s9
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v20
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_or_b32_e32 v10, v10, v12
-; GFX9-NEXT: v_perm_b32 v12, v14, v13, s4
-; GFX9-NEXT: v_perm_b32 v11, s6, v15, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX9-NEXT: v_perm_b32 v12, v52, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v54, v53, s4
-; GFX9-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX9-NEXT: v_perm_b32 v13, v48, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v50, v49, s4
-; GFX9-NEXT: v_or_b32_e32 v13, v14, v13
-; GFX9-NEXT: v_perm_b32 v14, v36, v35, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v61, s4
+; GFX9-NEXT: v_perm_b32 v14, v52, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v38, v37, s4
-; GFX9-NEXT: v_or_b32_e32 v14, v15, v14
-; GFX9-NEXT: v_perm_b32 v15, v32, v16, s4
+; GFX9-NEXT: v_perm_b32 v15, v32, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v34, v33, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v16, v15
-; GFX9-NEXT: v_perm_b32 v16, v60, v17, s4
+; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
+; GFX9-NEXT: v_perm_b32 v18, v42, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v17, v62, v61, s4
-; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
-; GFX9-NEXT: v_perm_b32 v17, v59, v18, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v18, v41, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v17, v18, v17
-; GFX9-NEXT: v_perm_b32 v18, v57, v19, s4
+; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v42, v58, s4
+; GFX9-NEXT: v_perm_b32 v19, v63, v19, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v18, v19, v18
-; GFX9-NEXT: v_perm_b32 v19, v45, v20, s4
+; GFX9-NEXT: v_perm_b32 v19, v23, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v56, v47, s4
+; GFX9-NEXT: v_perm_b32 v23, v34, v33, s4
+; GFX9-NEXT: v_perm_b32 v24, v41, v43, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, s6, v11, v20
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v20, v13, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
+; GFX9-NEXT: v_perm_b32 v13, v21, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX9-NEXT: v_perm_b32 v13, v27, v29, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_perm_b32 v20, v57, v28, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v20, v13
+; GFX9-NEXT: v_perm_b32 v20, v55, v48, s4
+; GFX9-NEXT: v_or_b32_e32 v14, v20, v14
+; GFX9-NEXT: v_perm_b32 v20, v54, v39, s4
+; GFX9-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX9-NEXT: v_perm_b32 v20, v36, v50, s4
+; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
+; GFX9-NEXT: v_perm_b32 v20, v49, v38, s4
+; GFX9-NEXT: v_or_b32_e32 v17, v20, v17
+; GFX9-NEXT: v_perm_b32 v20, v62, v22, s4
; GFX9-NEXT: v_or_b32_e32 v19, v20, v19
-; GFX9-NEXT: v_perm_b32 v20, v44, v21, s4
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v25, v58, s4
+; GFX9-NEXT: v_perm_b32 v22, v30, v31, s4
+; GFX9-NEXT: v_perm_b32 v25, v45, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v26, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v46, v26, s4
; GFX9-NEXT: v_or_b32_e32 v20, v21, v20
-; GFX9-NEXT: v_perm_b32 v21, v31, v22, s4
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v37, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v24, v43, s4
; GFX9-NEXT: v_or_b32_e32 v21, v22, v21
-; GFX9-NEXT: v_perm_b32 v22, v28, v23, s4
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v51, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v23, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v22, v23, v22
-; GFX9-NEXT: v_perm_b32 v23, v25, v63, s4
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v40, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_perm_b32 v24, v27, v55, s4
; GFX9-NEXT: v_or_b32_e32 v23, v24, v23
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
; GFX9-NEXT: v_or_b32_e32 v24, v25, v24
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_or_b32_e32 v25, v25, v27
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v26, v25
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v28
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: v_or_b32_e32 v26, v27, v26
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v29
+; GFX9-NEXT: v_perm_b32 v29, v47, v56, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_or_b32_e32 v27, v28, v27
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v28, v59, v28, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v28, v29, v28
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
; GFX9-NEXT: v_or_b32_e32 v29, v30, v29
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
; GFX9-NEXT: v_or_b32_e32 v30, v31, v30
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v43, v46, v43, s4
-; GFX9-NEXT: v_or_b32_e32 v31, v43, v31
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s4
+; GFX9-NEXT: v_or_b32_e32 v31, v32, v31
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB15_3
; GFX9-NEXT: .LBB15_2:
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB15_3: ; %Flow
-; GFX9-NEXT: v_mov_b32_e32 v43, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v47
-; GFX9-NEXT: v_mov_b32_e32 v46, v57
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
@@ -20156,18 +20450,18 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: v_mov_b32_e32 v2, s21
; GFX9-NEXT: s_add_i32 s22, s22, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
+; GFX9-NEXT: v_perm_b32 v0, s16, v0, v12
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
+; GFX9-NEXT: v_perm_b32 v1, s18, v1, v12
+; GFX9-NEXT: v_perm_b32 v2, s20, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s22, v3, v12
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
@@ -20178,8 +20472,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v12
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20187,8 +20481,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: s_add_i32 s76, s76, 3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v12
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v12
; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3
; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20196,8 +20490,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v4, s73
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: v_mov_b32_e32 v5, s63
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v12
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v12
; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4
; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20205,8 +20499,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v5, s61
; GFX9-NEXT: s_add_i32 s60, s60, 3
; GFX9-NEXT: v_mov_b32_e32 v6, s59
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v12
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v12
; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5
; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20214,8 +20508,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v6, s57
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: v_mov_b32_e32 v7, s47
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v12
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v12
; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6
; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20223,8 +20517,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v7, s45
; GFX9-NEXT: s_add_i32 s44, s44, 3
; GFX9-NEXT: v_mov_b32_e32 v8, s43
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v12
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v12
; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7
; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20232,8 +20526,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v8, s41
; GFX9-NEXT: s_add_i32 s40, s40, 3
; GFX9-NEXT: v_mov_b32_e32 v9, s15
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v12
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v12
; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -20241,267 +20535,334 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v9, s13
; GFX9-NEXT: s_add_i32 s12, s12, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v12
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v12
; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: s_add_i32 s10, s10, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s9
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v12
; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: s_waitcnt vmcnt(18)
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v32
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v48
-; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v36
-; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_perm_b32 v16, v16, v17, s5
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v60
-; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_perm_b32 v17, v17, v18, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v57
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v18, v18, v19, s5
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v11, s6, v12, v11
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11
-; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v19
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v12
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s5
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v54
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v52
-; GFX9-NEXT: v_perm_b32 v12, v12, v53, s5
-; GFX9-NEXT: v_perm_b32 v13, v13, v51, s5
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, s6, v11, v12
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12
-; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v50
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, v13, v11, s5
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v13, v12, s5
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v38
-; GFX9-NEXT: v_perm_b32 v14, v14, v37, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, v14, v12, s5
+; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v14, v13, s5
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v34
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v15, v13, s5
+; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v15, v14, s5
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v62
-; GFX9-NEXT: v_perm_b32 v16, v16, v61, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v16, v14, s5
+; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v15, s5
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v16
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v41
-; GFX9-NEXT: v_perm_b32 v17, v17, v40, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v17, v15, s5
+; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v42
-; GFX9-NEXT: v_perm_b32 v18, v18, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v18, v16, s5
+; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v18, v17, s5
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v18
-; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v46
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s5
+; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v19, v18, s5
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v19
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v20
-; GFX9-NEXT: v_perm_b32 v20, v20, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v45
-; GFX9-NEXT: v_perm_b32 v20, v20, v44, s5
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v20, v18, s5
+; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v20, v19, s5
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v20
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v21
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v43
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v19, v21, v19, s5
+; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v21, v20, s5
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v21
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v22, v20, s5
+; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v22, v21, s5
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v23, v21, s5
+; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v23, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v23
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v24, v22, s5
+; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v24, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v24
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v25, v23, s5
+; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v24, s5
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v26, v24, s5
+; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v25
; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
+; GFX9-NEXT: v_perm_b32 v25, v26, v25, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v27, v25, s5
+; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
-; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v26
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
+; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v26, v28, v26, s5
+; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v27
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v27
+; GFX9-NEXT: v_perm_b32 v27, v28, v27, s5
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v29, v27, s5
+; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v30, v28, s5
; GFX9-NEXT: v_add_u32_sdwa v28, v28, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
+; GFX9-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v28
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_perm_b32 v29, v30, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v29, v31, v29, s5
; GFX9-NEXT: v_add_u32_sdwa v29, v29, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v30
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
+; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v30, v32, v30, s5
; GFX9-NEXT: v_add_u32_sdwa v30, v30, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
+; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v30
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s5
+; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v31
+; GFX9-NEXT: v_add_u32_e32 v33, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
-; GFX9-NEXT: v_perm_b32 v32, v32, v33, s5
-; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v31, v33, v31, s5
+; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: .LBB15_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -22537,166 +22898,202 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: v_writelane_b32 v33, s96, 30
; SI-NEXT: v_writelane_b32 v33, s97, 31
; SI-NEXT: v_writelane_b32 v33, s98, 32
-; SI-NEXT: v_writelane_b32 v33, s99, 33
-; SI-NEXT: v_writelane_b32 v33, s30, 34
-; SI-NEXT: v_writelane_b32 v33, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_readfirstlane_b32 s68, v17
-; SI-NEXT: v_readfirstlane_b32 s69, v16
-; SI-NEXT: v_readfirstlane_b32 s70, v15
-; SI-NEXT: v_readfirstlane_b32 s71, v14
-; SI-NEXT: v_readfirstlane_b32 s80, v13
-; SI-NEXT: v_readfirstlane_b32 s81, v12
-; SI-NEXT: v_readfirstlane_b32 s82, v11
-; SI-NEXT: v_readfirstlane_b32 s83, v10
-; SI-NEXT: v_readfirstlane_b32 s84, v9
-; SI-NEXT: v_readfirstlane_b32 s85, v8
-; SI-NEXT: v_readfirstlane_b32 s86, v7
-; SI-NEXT: v_readfirstlane_b32 s87, v6
-; SI-NEXT: v_readfirstlane_b32 s96, v5
-; SI-NEXT: v_readfirstlane_b32 s97, v4
-; SI-NEXT: v_readfirstlane_b32 s98, v3
-; SI-NEXT: v_readfirstlane_b32 s99, v2
-; SI-NEXT: v_readfirstlane_b32 s6, v1
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s7, v0
+; SI-NEXT: v_writelane_b32 v33, s30, 33
+; SI-NEXT: v_writelane_b32 v33, s31, 34
+; SI-NEXT: v_readfirstlane_b32 s5, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v17
+; SI-NEXT: v_readfirstlane_b32 s30, v16
+; SI-NEXT: v_readfirstlane_b32 s31, v15
+; SI-NEXT: v_readfirstlane_b32 s34, v14
+; SI-NEXT: v_readfirstlane_b32 s35, v13
+; SI-NEXT: v_readfirstlane_b32 s36, v12
+; SI-NEXT: v_readfirstlane_b32 s37, v11
+; SI-NEXT: v_readfirstlane_b32 s38, v10
+; SI-NEXT: v_readfirstlane_b32 s39, v9
+; SI-NEXT: v_readfirstlane_b32 s48, v8
+; SI-NEXT: v_readfirstlane_b32 s49, v7
+; SI-NEXT: v_readfirstlane_b32 s50, v6
+; SI-NEXT: v_readfirstlane_b32 s51, v5
+; SI-NEXT: v_readfirstlane_b32 s52, v4
+; SI-NEXT: v_readfirstlane_b32 s53, v3
+; SI-NEXT: v_readfirstlane_b32 s54, v2
+; SI-NEXT: v_readfirstlane_b32 s55, v1
+; SI-NEXT: s_cmp_lg_u32 s5, 0
+; SI-NEXT: v_readfirstlane_b32 s64, v0
; SI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v34, s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB17_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff0000
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_and_b32 s8, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s4, 16
+; SI-NEXT: s_and_b32 s4, s50, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 2
+; SI-NEXT: s_lshl_b32 s4, s50, 16
; SI-NEXT: v_writelane_b32 v34, s4, 1
-; SI-NEXT: s_lshl_b32 s4, s16, 16
-; SI-NEXT: s_and_b32 s9, s68, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s68, 16
-; SI-NEXT: s_and_b32 s11, s69, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s69, 16
-; SI-NEXT: s_and_b32 s13, s70, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s70, 16
-; SI-NEXT: s_and_b32 s15, s71, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s71, 16
-; SI-NEXT: s_and_b32 s41, s80, 0xffff0000
-; SI-NEXT: s_lshl_b32 s40, s80, 16
-; SI-NEXT: s_and_b32 s43, s81, 0xffff0000
-; SI-NEXT: s_lshl_b32 s42, s81, 16
-; SI-NEXT: s_and_b32 s45, s82, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s82, 16
-; SI-NEXT: s_and_b32 s47, s83, 0xffff0000
-; SI-NEXT: s_lshl_b32 s46, s83, 16
-; SI-NEXT: s_and_b32 s57, s84, 0xffff0000
-; SI-NEXT: s_lshl_b32 s56, s84, 16
-; SI-NEXT: s_and_b32 s59, s85, 0xffff0000
-; SI-NEXT: s_lshl_b32 s58, s85, 16
-; SI-NEXT: s_and_b32 s61, s86, 0xffff0000
-; SI-NEXT: s_lshl_b32 s60, s86, 16
-; SI-NEXT: s_and_b32 s63, s87, 0xffff0000
-; SI-NEXT: s_lshl_b32 s62, s87, 16
-; SI-NEXT: s_and_b32 s73, s96, 0xffff0000
-; SI-NEXT: s_lshl_b32 s72, s96, 16
-; SI-NEXT: s_and_b32 s75, s97, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s97, 16
-; SI-NEXT: s_and_b32 s77, s98, 0xffff0000
-; SI-NEXT: s_lshl_b32 s76, s98, 16
-; SI-NEXT: s_and_b32 s79, s99, 0xffff0000
-; SI-NEXT: s_lshl_b32 s78, s99, 16
-; SI-NEXT: s_and_b32 s89, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s88, s6, 16
-; SI-NEXT: s_and_b32 s91, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s7, 16
-; SI-NEXT: s_and_b32 s93, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s29, 16
-; SI-NEXT: s_and_b32 s95, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s28, 16
-; SI-NEXT: s_and_b32 vcc_hi, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_lo, s27, 16
-; SI-NEXT: s_and_b32 s31, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s30, s26, 16
-; SI-NEXT: s_and_b32 s35, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s34, s25, 16
-; SI-NEXT: s_and_b32 s37, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s36, s24, 16
-; SI-NEXT: s_and_b32 s39, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s38, s23, 16
-; SI-NEXT: s_and_b32 s49, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s48, s22, 16
-; SI-NEXT: s_and_b32 s51, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s50, s21, 16
-; SI-NEXT: s_and_b32 s53, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s20, 16
-; SI-NEXT: s_and_b32 s55, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s54, s19, 16
-; SI-NEXT: s_and_b32 s65, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s64, s18, 16
-; SI-NEXT: s_and_b32 s67, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s17, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 0
+; SI-NEXT: s_and_b32 s4, s51, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 4
+; SI-NEXT: s_lshl_b32 s4, s51, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 3
+; SI-NEXT: s_and_b32 s4, s52, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 6
+; SI-NEXT: s_lshl_b32 s4, s52, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 5
+; SI-NEXT: s_and_b32 s4, s53, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 8
+; SI-NEXT: s_lshl_b32 s4, s53, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 7
+; SI-NEXT: s_and_b32 s4, s55, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 10
+; SI-NEXT: s_lshl_b32 s4, s55, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 9
+; SI-NEXT: s_and_b32 s4, s64, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 12
+; SI-NEXT: s_lshl_b32 s4, s64, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 11
+; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 14
+; SI-NEXT: s_lshl_b32 s4, s29, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 13
+; SI-NEXT: s_and_b32 s4, s28, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 16
+; SI-NEXT: s_lshl_b32 s4, s28, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 15
+; SI-NEXT: s_and_b32 s4, s27, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 18
+; SI-NEXT: s_lshl_b32 s4, s27, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 17
+; SI-NEXT: s_and_b32 s4, s26, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 20
+; SI-NEXT: s_lshl_b32 s4, s26, 16
+; SI-NEXT: s_and_b32 s10, s30, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s30, 16
+; SI-NEXT: s_and_b32 s12, s31, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s31, 16
+; SI-NEXT: s_and_b32 s14, s34, 0xffff0000
+; SI-NEXT: s_lshl_b32 s13, s34, 16
+; SI-NEXT: s_and_b32 s40, s35, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s35, 16
+; SI-NEXT: s_and_b32 s42, s36, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s36, 16
+; SI-NEXT: s_and_b32 s44, s37, 0xffff0000
+; SI-NEXT: s_lshl_b32 s43, s37, 16
+; SI-NEXT: s_and_b32 s46, s38, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s38, 16
+; SI-NEXT: s_and_b32 s56, s39, 0xffff0000
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_and_b32 s58, s48, 0xffff0000
+; SI-NEXT: s_lshl_b32 s57, s48, 16
+; SI-NEXT: s_and_b32 s60, s49, 0xffff0000
+; SI-NEXT: s_lshl_b32 s59, s49, 16
+; SI-NEXT: s_and_b32 s78, s54, 0xffff0000
+; SI-NEXT: s_lshl_b32 s77, s54, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 19
+; SI-NEXT: s_and_b32 s62, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s61, s25, 16
+; SI-NEXT: s_and_b32 s72, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s63, s24, 16
+; SI-NEXT: s_and_b32 s74, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s73, s23, 16
+; SI-NEXT: s_and_b32 s76, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s75, s22, 16
+; SI-NEXT: s_and_b32 s88, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s79, s21, 16
+; SI-NEXT: s_and_b32 s90, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s89, s20, 16
+; SI-NEXT: s_and_b32 s92, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s91, s19, 16
+; SI-NEXT: s_and_b32 s94, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s93, s18, 16
+; SI-NEXT: s_and_b32 vcc_lo, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s95, s17, 16
+; SI-NEXT: s_and_b32 s6, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_hi, s16, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB17_3
; SI-NEXT: .LBB17_2:
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $vcc_hi
-; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr13
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -22704,8 +23101,29 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_mov_b32 s4, s8
-; SI-NEXT: s_mov_b32 s5, s9
+; SI-NEXT: s_mov_b32 s65, s63
+; SI-NEXT: s_mov_b32 s66, s72
+; SI-NEXT: s_mov_b32 s67, s73
+; SI-NEXT: s_mov_b32 s68, s74
+; SI-NEXT: s_mov_b32 s69, s75
+; SI-NEXT: s_mov_b32 s70, s76
+; SI-NEXT: s_mov_b32 s71, s79
+; SI-NEXT: s_mov_b32 s80, s88
+; SI-NEXT: s_mov_b32 s81, s89
+; SI-NEXT: s_mov_b32 s82, s90
+; SI-NEXT: s_mov_b32 s83, s91
+; SI-NEXT: s_mov_b32 s84, s92
+; SI-NEXT: s_mov_b32 s85, s93
+; SI-NEXT: s_mov_b32 s86, s94
+; SI-NEXT: s_mov_b32 s87, s95
+; SI-NEXT: s_mov_b32 s96, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s61
+; SI-NEXT: s_mov_b32 s97, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s62
+; SI-NEXT: s_mov_b32 s98, s6
+; SI-NEXT: s_mov_b32 s4, s7
+; SI-NEXT: s_mov_b32 s5, s8
+; SI-NEXT: s_mov_b32 s7, s9
; SI-NEXT: s_mov_b32 s8, s10
; SI-NEXT: s_mov_b32 s9, s11
; SI-NEXT: s_mov_b32 s10, s12
@@ -22725,19 +23143,29 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_mov_b32 s56, s58
; SI-NEXT: s_mov_b32 s57, s59
; SI-NEXT: s_mov_b32 s58, s60
-; SI-NEXT: s_mov_b32 s59, s61
-; SI-NEXT: s_mov_b32 s60, s62
-; SI-NEXT: s_mov_b32 s61, s63
-; SI-NEXT: s_mov_b32 s62, s72
-; SI-NEXT: s_mov_b32 s63, s73
-; SI-NEXT: s_mov_b32 s72, s74
-; SI-NEXT: s_mov_b32 s73, s75
-; SI-NEXT: s_mov_b32 s74, s76
-; SI-NEXT: s_mov_b32 s75, s77
-; SI-NEXT: v_readlane_b32 s76, v34, 0
-; SI-NEXT: v_readlane_b32 s77, v34, 1
+; SI-NEXT: v_readlane_b32 s59, v34, 1
+; SI-NEXT: v_readlane_b32 s60, v34, 2
+; SI-NEXT: v_readlane_b32 s61, v34, 3
+; SI-NEXT: v_readlane_b32 s62, v34, 4
+; SI-NEXT: v_readlane_b32 s63, v34, 5
+; SI-NEXT: v_readlane_b32 s72, v34, 6
+; SI-NEXT: v_readlane_b32 s73, v34, 7
+; SI-NEXT: v_readlane_b32 s74, v34, 8
+; SI-NEXT: v_readlane_b32 s6, v34, 9
+; SI-NEXT: v_readlane_b32 s75, v34, 10
+; SI-NEXT: v_readlane_b32 s76, v34, 11
+; SI-NEXT: v_readlane_b32 s79, v34, 12
+; SI-NEXT: v_readlane_b32 s88, v34, 13
+; SI-NEXT: v_readlane_b32 s89, v34, 14
+; SI-NEXT: v_readlane_b32 s90, v34, 15
+; SI-NEXT: v_readlane_b32 s91, v34, 16
+; SI-NEXT: v_readlane_b32 s92, v34, 17
+; SI-NEXT: v_readlane_b32 s93, v34, 18
+; SI-NEXT: v_readlane_b32 s94, v34, 19
+; SI-NEXT: v_readlane_b32 s95, v34, 20
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: v_readlane_b32 s4, v34, 0
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -22752,220 +23180,219 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s99, s99, 3
-; SI-NEXT: s_add_i32 s98, s98, 3
-; SI-NEXT: s_add_i32 s97, s97, 3
-; SI-NEXT: s_add_i32 s96, s96, 3
-; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: s_add_i32 s86, s86, 3
-; SI-NEXT: s_add_i32 s85, s85, 3
-; SI-NEXT: s_add_i32 s84, s84, 3
-; SI-NEXT: s_add_i32 s83, s83, 3
-; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: s_add_i32 s81, s81, 3
-; SI-NEXT: s_add_i32 s80, s80, 3
-; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_add_i32 s70, s70, 3
-; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: s_and_b32 s5, s68, 0xffff0000
-; SI-NEXT: s_lshl_b32 s4, s68, 16
-; SI-NEXT: s_and_b32 s9, s69, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s69, 16
-; SI-NEXT: s_and_b32 s11, s70, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s70, 16
-; SI-NEXT: s_and_b32 s13, s71, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s71, 16
-; SI-NEXT: s_and_b32 s15, s80, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s80, 16
-; SI-NEXT: s_and_b32 s41, s81, 0xffff0000
-; SI-NEXT: s_lshl_b32 s40, s81, 16
-; SI-NEXT: s_and_b32 s43, s82, 0xffff0000
-; SI-NEXT: s_lshl_b32 s42, s82, 16
-; SI-NEXT: s_and_b32 s45, s83, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s83, 16
-; SI-NEXT: s_and_b32 s47, s84, 0xffff0000
-; SI-NEXT: s_lshl_b32 s46, s84, 16
-; SI-NEXT: s_and_b32 s57, s85, 0xffff0000
-; SI-NEXT: s_lshl_b32 s56, s85, 16
-; SI-NEXT: s_and_b32 s59, s86, 0xffff0000
-; SI-NEXT: s_lshl_b32 s58, s86, 16
-; SI-NEXT: s_and_b32 s61, s87, 0xffff0000
-; SI-NEXT: s_lshl_b32 s60, s87, 16
-; SI-NEXT: s_and_b32 s63, s96, 0xffff0000
-; SI-NEXT: s_lshl_b32 s62, s96, 16
-; SI-NEXT: s_and_b32 s73, s97, 0xffff0000
-; SI-NEXT: s_lshl_b32 s72, s97, 16
-; SI-NEXT: s_and_b32 s75, s98, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s98, 16
-; SI-NEXT: s_and_b32 s79, s99, 0xffff0000
-; SI-NEXT: s_lshl_b32 s78, s99, 16
-; SI-NEXT: s_and_b32 s89, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s88, s6, 16
-; SI-NEXT: s_and_b32 s91, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s7, 16
-; SI-NEXT: s_and_b32 s93, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s29, 16
-; SI-NEXT: s_and_b32 s95, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s28, 16
-; SI-NEXT: s_and_b32 vcc_hi, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_lo, s27, 16
-; SI-NEXT: s_and_b32 s31, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s30, s26, 16
-; SI-NEXT: s_and_b32 s35, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s34, s25, 16
-; SI-NEXT: s_and_b32 s37, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s36, s24, 16
-; SI-NEXT: s_and_b32 s39, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s38, s23, 16
-; SI-NEXT: s_and_b32 s49, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s48, s22, 16
-; SI-NEXT: s_and_b32 s51, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s50, s21, 16
-; SI-NEXT: s_and_b32 s53, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s20, 16
-; SI-NEXT: s_and_b32 s55, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s54, s19, 16
-; SI-NEXT: s_and_b32 s65, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s64, s18, 16
-; SI-NEXT: s_and_b32 s67, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s17, 16
-; SI-NEXT: s_and_b32 s77, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s76, s16, 16
+; SI-NEXT: s_add_i32 s64, s64, 3
+; SI-NEXT: s_add_i32 s55, s55, 3
+; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: s_add_i32 s52, s52, 3
+; SI-NEXT: s_add_i32 s51, s51, 3
+; SI-NEXT: s_add_i32 s50, s50, 3
+; SI-NEXT: s_add_i32 s49, s49, 3
+; SI-NEXT: s_add_i32 s48, s48, 3
+; SI-NEXT: s_add_i32 s39, s39, 3
+; SI-NEXT: s_add_i32 s38, s38, 3
+; SI-NEXT: s_add_i32 s37, s37, 3
+; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: s_add_i32 s35, s35, 3
+; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s31, s31, 3
+; SI-NEXT: s_add_i32 s30, s30, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_and_b32 s8, s30, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_and_b32 s10, s31, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s31, 16
+; SI-NEXT: s_and_b32 s12, s34, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s34, 16
+; SI-NEXT: s_and_b32 s14, s35, 0xffff0000
+; SI-NEXT: s_lshl_b32 s13, s35, 16
+; SI-NEXT: s_and_b32 s40, s36, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s36, 16
+; SI-NEXT: s_and_b32 s42, s37, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s37, 16
+; SI-NEXT: s_and_b32 s44, s38, 0xffff0000
+; SI-NEXT: s_lshl_b32 s43, s38, 16
+; SI-NEXT: s_and_b32 s46, s39, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s39, 16
+; SI-NEXT: s_and_b32 s56, s48, 0xffff0000
+; SI-NEXT: s_lshl_b32 s47, s48, 16
+; SI-NEXT: s_and_b32 s58, s49, 0xffff0000
+; SI-NEXT: s_lshl_b32 s57, s49, 16
+; SI-NEXT: s_and_b32 s60, s50, 0xffff0000
+; SI-NEXT: s_lshl_b32 s59, s50, 16
+; SI-NEXT: s_and_b32 s62, s51, 0xffff0000
+; SI-NEXT: s_lshl_b32 s61, s51, 16
+; SI-NEXT: s_and_b32 s72, s52, 0xffff0000
+; SI-NEXT: s_lshl_b32 s63, s52, 16
+; SI-NEXT: s_and_b32 s74, s53, 0xffff0000
+; SI-NEXT: s_lshl_b32 s73, s53, 16
+; SI-NEXT: s_and_b32 s78, s54, 0xffff0000
+; SI-NEXT: s_lshl_b32 s77, s54, 16
+; SI-NEXT: s_and_b32 s75, s55, 0xffff0000
+; SI-NEXT: s_lshl_b32 s6, s55, 16
+; SI-NEXT: s_and_b32 s79, s64, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s64, 16
+; SI-NEXT: s_and_b32 s89, s29, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s29, 16
+; SI-NEXT: s_and_b32 s91, s28, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s28, 16
+; SI-NEXT: s_and_b32 s93, s27, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s27, 16
+; SI-NEXT: s_and_b32 s95, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s26, 16
+; SI-NEXT: s_and_b32 vcc_hi, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_lo, s25, 16
+; SI-NEXT: s_and_b32 s66, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s65, s24, 16
+; SI-NEXT: s_and_b32 s68, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s67, s23, 16
+; SI-NEXT: s_and_b32 s70, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s22, 16
+; SI-NEXT: s_and_b32 s80, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s71, s21, 16
+; SI-NEXT: s_and_b32 s82, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s81, s20, 16
+; SI-NEXT: s_and_b32 s84, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s83, s19, 16
+; SI-NEXT: s_and_b32 s86, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s85, s18, 16
+; SI-NEXT: s_and_b32 s96, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s87, s17, 16
+; SI-NEXT: s_and_b32 s98, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s97, s16, 16
; SI-NEXT: .LBB17_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s98
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s97
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s96
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s87
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s65
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s86
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s64
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s85
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s55
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s84
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s54
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s83
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s53
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s81
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s80
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s50
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s71
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s49
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s70
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s48
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s69
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s39
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s68
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s38
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s67
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s37
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s66
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s36
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s65
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, vcc_hi
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, vcc_lo
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s94
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s93
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s92
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s91
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s90
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s89
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s88
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s79
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s76
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s75
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s79
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s78
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s77
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s75
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s74
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s73
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s73
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
; SI-NEXT: v_mul_f32_e64 v18, 1.0, s72
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s63
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s63
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
; SI-NEXT: v_mul_f32_e64 v19, 1.0, s62
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s61
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s61
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
; SI-NEXT: v_mul_f32_e64 v20, 1.0, s60
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s59
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s59
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
; SI-NEXT: v_mul_f32_e64 v21, 1.0, s58
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s57
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s57
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
; SI-NEXT: v_mul_f32_e64 v22, 1.0, s56
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s47
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s47
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s46
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s45
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s45
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
; SI-NEXT: v_mul_f32_e64 v24, 1.0, s44
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s43
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s43
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
; SI-NEXT: v_mul_f32_e64 v25, 1.0, s42
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s41
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s41
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
; SI-NEXT: v_mul_f32_e64 v26, 1.0, s40
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s15
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s15
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
; SI-NEXT: v_mul_f32_e64 v27, 1.0, s14
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s13
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s13
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
; SI-NEXT: v_mul_f32_e64 v28, 1.0, s12
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s11
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s11
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
; SI-NEXT: v_mul_f32_e64 v29, 1.0, s10
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s9
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s9
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
; SI-NEXT: v_mul_f32_e64 v30, 1.0, s8
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s7
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
; SI-NEXT: v_mul_f32_e64 v31, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
; SI-NEXT: v_mul_f32_e64 v31, 1.0, s4
-; SI-NEXT: v_readlane_b32 s30, v33, 34
+; SI-NEXT: v_readlane_b32 s30, v33, 33
; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
-; SI-NEXT: v_readlane_b32 s31, v33, 35
-; SI-NEXT: v_readlane_b32 s99, v33, 33
+; SI-NEXT: v_readlane_b32 s31, v33, 34
; SI-NEXT: v_readlane_b32 s98, v33, 32
; SI-NEXT: v_readlane_b32 s97, v33, 31
; SI-NEXT: v_readlane_b32 s96, v33, 30
@@ -23001,7 +23428,6 @@ define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a
; SI-NEXT: v_readlane_b32 s34, v33, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -26259,7 +26685,7 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -26281,98 +26707,85 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31
-; SI-NEXT: v_readfirstlane_b32 s90, v5
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi
-; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95
; SI-NEXT: v_readfirstlane_b32 s78, v7
-; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89
; SI-NEXT: v_readfirstlane_b32 s74, v9
-; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s72, v10
; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
; SI-NEXT: v_readfirstlane_b32 s62, v11
; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75
; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73
; SI-NEXT: v_readfirstlane_b32 s58, v13
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63
; SI-NEXT: v_readfirstlane_b32 s56, v14
; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61
-; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s92, v4
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92
+; SI-NEXT: v_readfirstlane_b32 s90, v5
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: v_readfirstlane_b32 s88, v6
+; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: v_readfirstlane_b32 s76, v8
+; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
; SI-NEXT: s_lshl_b32 s15, s24, 16
@@ -26394,490 +26807,427 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s62, 16
; SI-NEXT: s_lshl_b32 s72, s72, 16
; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
; SI-NEXT: s_lshl_b32 s30, s30, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s10
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s42
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, v1
-; SI-NEXT: v_mov_b32_e32 v43, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: v_mov_b32_e32 v36, v47
-; SI-NEXT: v_mov_b32_e32 v50, v49
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v40, v41
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v48, v37
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v48
+; SI-NEXT: v_mov_b32_e32 v62, v35
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; SI-NEXT: v_mov_b32_e32 v29, v54
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v30, v46
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v2, v34
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v39, v33
; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v3, v17
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v4, v20
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v5, v19
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v39
+; SI-NEXT: v_lshr_b64 v[3:4], v[32:33], 16
+; SI-NEXT: v_mov_b32_e32 v4, v41
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[4:5], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v5, v26
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16
-; SI-NEXT: v_mov_b32_e32 v6, v13
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16
-; SI-NEXT: v_mov_b32_e32 v7, v31
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[6:7], v[25:26], 16
+; SI-NEXT: v_mov_b32_e32 v7, v24
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v8, v23
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v44, v45
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; SI-NEXT: v_mov_b32_e32 v9, v25
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16
-; SI-NEXT: v_mov_b32_e32 v10, v30
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v61
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v33
+; SI-NEXT: v_lshr_b64 v[10:11], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v13, v60
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshr_b64 v[11:12], v[59:60], 16
+; SI-NEXT: v_mov_b32_e32 v14, v59
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v15
+; SI-NEXT: v_mov_b32_e32 v60, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[58:59], 16
+; SI-NEXT: v_mov_b32_e32 v15, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v16
+; SI-NEXT: v_mov_b32_e32 v59, v14
+; SI-NEXT: v_lshr_b64 v[13:14], v[57:58], 16
+; SI-NEXT: v_mov_b32_e32 v16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
+; SI-NEXT: v_mov_b32_e32 v58, v15
+; SI-NEXT: v_lshr_b64 v[14:15], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v17, v56
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
+; SI-NEXT: v_mov_b32_e32 v57, v16
+; SI-NEXT: v_lshr_b64 v[15:16], v[55:56], 16
+; SI-NEXT: v_mov_b32_e32 v56, v17
+; SI-NEXT: v_lshr_b64 v[16:17], v[51:52], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v20
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v49
+; SI-NEXT: v_mov_b32_e32 v49, v44
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v11, v27
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v54
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12
-; SI-NEXT: v_mov_b32_e32 v12, v61
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v21
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16
-; SI-NEXT: v_mov_b32_e32 v13, v29
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v14, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v62, v39
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15
-; SI-NEXT: v_mov_b32_e32 v15, v60
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16
-; SI-NEXT: v_mov_b32_e32 v16, v33
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v50
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16
-; SI-NEXT: v_mov_b32_e32 v17, v57
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47
-; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
-; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16
-; SI-NEXT: v_mov_b32_e32 v20, v38
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
+; SI-NEXT: v_mov_b32_e32 v24, v53
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; SI-NEXT: v_mov_b32_e32 v39, v62
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
-; SI-NEXT: v_mov_b32_e32 v21, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53
-; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v45, v44
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v47, v36
-; SI-NEXT: v_mov_b32_e32 v36, v37
-; SI-NEXT: v_mov_b32_e32 v49, v50
-; SI-NEXT: v_mov_b32_e32 v51, v33
+; SI-NEXT: v_lshr_b64 v[24:25], v[53:54], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v54, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v31
+; SI-NEXT: v_mov_b32_e32 v31, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v26, v43
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[43:44], 16
+; SI-NEXT: v_mov_b32_e32 v27, v28
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16
-; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; SI-NEXT: v_mov_b32_e32 v37, v48
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v35
+; SI-NEXT: v_mov_b32_e32 v35, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[47:48], 16
+; SI-NEXT: v_mov_b32_e32 v44, v49
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[45:46], 16
+; SI-NEXT: v_mov_b32_e32 v46, v30
+; SI-NEXT: v_lshr_b64 v[29:30], v[49:50], 16
+; SI-NEXT: v_mov_b32_e32 v50, v31
+; SI-NEXT: v_lshr_b64 v[30:31], v[42:43], 16
; SI-NEXT: v_mov_b32_e32 v31, v61
-; SI-NEXT: v_mov_b32_e32 v41, v40
+; SI-NEXT: v_mov_b32_e32 v61, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v49, v42
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v58, v56
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB19_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v37, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v33, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v38, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v50, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v40, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_cbranch_scc1 .LBB19_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v34, v56
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v61
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -26886,12 +27236,20 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
@@ -26900,9 +27258,9 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
@@ -26911,9 +27269,9 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
@@ -26922,71 +27280,30 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v60
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v59
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
@@ -26995,15 +27312,29 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v54
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
@@ -27012,9 +27343,9 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
@@ -27023,31 +27354,69 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v50
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
; SI-NEXT: v_mov_b32_e32 v31, v32
@@ -27062,6 +27431,7 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
@@ -27073,7 +27443,7 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -30521,12 +30891,8 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: v_writelane_b32 v32, s55, 13
; SI-NEXT: v_writelane_b32 v32, s64, 14
; SI-NEXT: v_writelane_b32 v32, s65, 15
-; SI-NEXT: v_writelane_b32 v32, s66, 16
-; SI-NEXT: v_writelane_b32 v32, s67, 17
-; SI-NEXT: v_writelane_b32 v32, s68, 18
-; SI-NEXT: v_writelane_b32 v32, s69, 19
-; SI-NEXT: v_writelane_b32 v32, s30, 20
-; SI-NEXT: v_writelane_b32 v32, s31, 21
+; SI-NEXT: v_writelane_b32 v32, s30, 16
+; SI-NEXT: v_writelane_b32 v32, s31, 17
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -30549,26 +30915,30 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_cbranch_scc0 .LBB21_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
+; SI-NEXT: s_lshr_b32 s56, s5, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s58, s45, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s38, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s48, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s50, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s52, s43, 16
+; SI-NEXT: s_lshr_b32 s53, s29, 16
+; SI-NEXT: s_lshr_b32 s54, s27, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 16
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s21, 16
+; SI-NEXT: s_mov_b32 s61, s63
+; SI-NEXT: s_mov_b32 s59, s62
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
@@ -30586,43 +30956,51 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: .LBB21_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: .LBB21_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s63, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s63, 1
; SI-NEXT: s_cbranch_scc1 .LBB21_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -30647,14 +31025,6 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
@@ -30665,22 +31035,22 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
+; SI-NEXT: s_lshr_b32 s47, s5, 16
+; SI-NEXT: s_lshr_b32 s38, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s48, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s50, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s52, s43, 16
+; SI-NEXT: s_lshr_b32 s57, s45, 16
+; SI-NEXT: s_lshr_b32 s53, s29, 16
+; SI-NEXT: s_lshr_b32 s54, s27, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 16
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s21, 16
+; SI-NEXT: s_lshr_b32 s59, s19, 16
+; SI-NEXT: s_lshr_b32 s61, s17, 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -30688,103 +31058,103 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB21_5: ; %end
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s69, 16
-; SI-NEXT: s_or_b32 s17, s17, s47
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s47
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s68, 16
-; SI-NEXT: s_or_b32 s19, s19, s47
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s47
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s67, 16
-; SI-NEXT: s_or_b32 s21, s21, s47
-; SI-NEXT: s_lshl_b32 s47, s94, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s47
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s66, 16
-; SI-NEXT: s_or_b32 s23, s23, s47
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s47
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s25, s25, s47
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s90, 16
-; SI-NEXT: s_or_b32 s26, s26, s47
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_or_b32 s27, s27, s47
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s28, s28, s47
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s78, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_or_b32 s45, s45, s57
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s76, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s57, s76, 16
+; SI-NEXT: s_or_b32 s19, s19, s59
+; SI-NEXT: s_lshl_b32 s59, vcc_lo, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s42, s42, s57
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s57, s52, 16
+; SI-NEXT: s_or_b32 s20, s20, s59
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s65, 16
+; SI-NEXT: s_or_b32 s43, s43, s57
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s57, s74, 16
+; SI-NEXT: s_or_b32 s21, s21, s59
+; SI-NEXT: s_lshl_b32 s59, s94, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s57
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s57, s51, 16
+; SI-NEXT: s_or_b32 s22, s22, s59
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s64, 16
+; SI-NEXT: s_or_b32 s41, s41, s57
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s72, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s57, s72, 16
+; SI-NEXT: s_or_b32 s23, s23, s59
+; SI-NEXT: s_lshl_b32 s59, s92, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s57
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s57, s50, 16
+; SI-NEXT: s_or_b32 s24, s24, s59
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s55, 16
+; SI-NEXT: s_or_b32 s15, s15, s57
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s62, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s57, s62, 16
+; SI-NEXT: s_or_b32 s25, s25, s59
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s90, 16
+; SI-NEXT: s_or_b32 s12, s12, s57
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
+; SI-NEXT: s_lshl_b32 s57, s49, 16
+; SI-NEXT: s_or_b32 s26, s26, s59
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s54, 16
+; SI-NEXT: s_or_b32 s13, s13, s57
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s57, s58, 16
+; SI-NEXT: s_or_b32 s27, s27, s59
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s88, 16
+; SI-NEXT: s_or_b32 s10, s10, s57
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
+; SI-NEXT: s_lshl_b32 s57, s48, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_or_b32 s28, s28, s59
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s53, 16
+; SI-NEXT: s_or_b32 s11, s11, s57
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_lshl_b32 s57, s60, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s56, 16
+; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
+; SI-NEXT: s_lshl_b32 s63, s34, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s61
+; SI-NEXT: s_lshl_b32 s61, s30, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s29, s29, s59
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s78, 16
+; SI-NEXT: s_or_b32 s8, s8, s57
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s39, 16
+; SI-NEXT: s_or_b32 s6, s6, s56
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_lshl_b32 s56, s38, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s46, s47, 16
+; SI-NEXT: s_or_b32 s16, s16, s63
+; SI-NEXT: s_or_b32 s18, s18, s61
+; SI-NEXT: s_or_b32 s44, s44, s59
+; SI-NEXT: s_or_b32 s9, s9, s57
+; SI-NEXT: s_or_b32 s7, s7, s56
; SI-NEXT: s_or_b32 s5, s5, s46
-; SI-NEXT: v_readlane_b32 s30, v32, 20
+; SI-NEXT: v_readlane_b32 s30, v32, 16
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -30817,11 +31187,7 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_readlane_b32 s31, v32, 21
-; SI-NEXT: v_readlane_b32 s69, v32, 19
-; SI-NEXT: v_readlane_b32 s68, v32, 18
-; SI-NEXT: v_readlane_b32 s67, v32, 17
-; SI-NEXT: v_readlane_b32 s66, v32, 16
+; SI-NEXT: v_readlane_b32 s31, v32, 17
; SI-NEXT: v_readlane_b32 s65, v32, 15
; SI-NEXT: v_readlane_b32 s64, v32, 14
; SI-NEXT: v_readlane_b32 s55, v32, 13
@@ -32163,14 +32529,14 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s92, v6
; SI-NEXT: v_readfirstlane_b32 s94, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: v_readfirstlane_b32 s30, v3
-; SI-NEXT: v_readfirstlane_b32 s34, v2
-; SI-NEXT: v_readfirstlane_b32 s70, v1
-; SI-NEXT: v_readfirstlane_b32 s81, v0
-; SI-NEXT: s_lshr_b32 s35, s29, 16
-; SI-NEXT: s_lshr_b32 s69, s28, 16
-; SI-NEXT: s_lshr_b32 s80, s27, 16
-; SI-NEXT: s_lshr_b32 s83, s26, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_readfirstlane_b32 s69, v1
+; SI-NEXT: v_readfirstlane_b32 s80, v0
+; SI-NEXT: s_lshr_b32 s34, s29, 16
+; SI-NEXT: s_lshr_b32 s68, s28, 16
+; SI-NEXT: s_lshr_b32 s71, s27, 16
+; SI-NEXT: s_lshr_b32 s82, s26, 16
; SI-NEXT: s_lshr_b32 s84, s25, 16
; SI-NEXT: s_lshr_b32 s85, s24, 16
; SI-NEXT: s_lshr_b32 s86, s23, 16
@@ -32179,7 +32545,7 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s97, s20, 16
; SI-NEXT: s_lshr_b32 s98, s19, 16
; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s7, s17, 16
+; SI-NEXT: s_lshr_b32 s83, s17, 16
; SI-NEXT: s_lshr_b32 s9, s16, 16
; SI-NEXT: s_lshr_b32 s67, s6, 16
; SI-NEXT: s_lshr_b32 s66, s8, 16
@@ -32195,71 +32561,72 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s31, s30, 16
-; SI-NEXT: s_lshr_b32 s68, s34, 16
-; SI-NEXT: s_lshr_b32 s71, s70, 16
-; SI-NEXT: s_lshr_b32 s82, s81, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s4, 16
+; SI-NEXT: s_lshr_b32 s35, s31, 16
+; SI-NEXT: s_lshr_b32 s70, s69, 16
+; SI-NEXT: s_lshr_b32 s81, s80, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v35, s67, 0
; SI-NEXT: v_writelane_b32 v35, s66, 1
; SI-NEXT: s_cbranch_scc0 .LBB23_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s9, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s99, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s98, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s7, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s83, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s96, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s52, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s53, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -32306,6 +32673,7 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB23_3
; SI-NEXT: .LBB23_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB23_3: ; %Flow
@@ -32316,7 +32684,7 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s83
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -32388,7 +32756,7 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s83
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s82
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
@@ -32399,7 +32767,7 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s71
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
@@ -32408,11 +32776,11 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v13, v11
; SI-NEXT: v_cvt_f32_f16_e32 v13, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
@@ -32423,8 +32791,8 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v15, s29
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s82
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s80
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -32432,11 +32800,11 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s70
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s35
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -32444,11 +32812,11 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v18, s31
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v19, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v19, s7
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -33737,12 +34105,8 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: v_writelane_b32 v32, s55, 13
; SI-NEXT: v_writelane_b32 v32, s64, 14
; SI-NEXT: v_writelane_b32 v32, s65, 15
-; SI-NEXT: v_writelane_b32 v32, s66, 16
-; SI-NEXT: v_writelane_b32 v32, s67, 17
-; SI-NEXT: v_writelane_b32 v32, s68, 18
-; SI-NEXT: v_writelane_b32 v32, s69, 19
-; SI-NEXT: v_writelane_b32 v32, s30, 20
-; SI-NEXT: v_writelane_b32 v32, s31, 21
+; SI-NEXT: v_writelane_b32 v32, s30, 16
+; SI-NEXT: v_writelane_b32 v32, s31, 17
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -33765,26 +34129,30 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_cbranch_scc0 .LBB25_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
+; SI-NEXT: s_lshr_b32 s56, s5, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s58, s45, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s38, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s48, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s50, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s52, s43, 16
+; SI-NEXT: s_lshr_b32 s53, s29, 16
+; SI-NEXT: s_lshr_b32 s54, s27, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 16
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s21, 16
+; SI-NEXT: s_mov_b32 s61, s63
+; SI-NEXT: s_mov_b32 s59, s62
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
@@ -33802,43 +34170,51 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: .LBB25_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: .LBB25_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s63, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s63, 1
; SI-NEXT: s_cbranch_scc1 .LBB25_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -33863,14 +34239,6 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
@@ -33881,22 +34249,22 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
+; SI-NEXT: s_lshr_b32 s47, s5, 16
+; SI-NEXT: s_lshr_b32 s38, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s48, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s50, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s52, s43, 16
+; SI-NEXT: s_lshr_b32 s57, s45, 16
+; SI-NEXT: s_lshr_b32 s53, s29, 16
+; SI-NEXT: s_lshr_b32 s54, s27, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 16
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s21, 16
+; SI-NEXT: s_lshr_b32 s59, s19, 16
+; SI-NEXT: s_lshr_b32 s61, s17, 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -33904,103 +34272,103 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB25_5: ; %end
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s69, 16
-; SI-NEXT: s_or_b32 s17, s17, s47
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s47
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s68, 16
-; SI-NEXT: s_or_b32 s19, s19, s47
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s47
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s67, 16
-; SI-NEXT: s_or_b32 s21, s21, s47
-; SI-NEXT: s_lshl_b32 s47, s94, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s47
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s66, 16
-; SI-NEXT: s_or_b32 s23, s23, s47
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s47
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s25, s25, s47
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s90, 16
-; SI-NEXT: s_or_b32 s26, s26, s47
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_or_b32 s27, s27, s47
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s28, s28, s47
-; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s78, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_or_b32 s45, s45, s57
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s76, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s57, s76, 16
+; SI-NEXT: s_or_b32 s19, s19, s59
+; SI-NEXT: s_lshl_b32 s59, vcc_lo, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s42, s42, s57
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s57, s52, 16
+; SI-NEXT: s_or_b32 s20, s20, s59
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s65, 16
+; SI-NEXT: s_or_b32 s43, s43, s57
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s57, s74, 16
+; SI-NEXT: s_or_b32 s21, s21, s59
+; SI-NEXT: s_lshl_b32 s59, s94, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s57
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s57, s51, 16
+; SI-NEXT: s_or_b32 s22, s22, s59
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s64, 16
+; SI-NEXT: s_or_b32 s41, s41, s57
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s72, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s57, s72, 16
+; SI-NEXT: s_or_b32 s23, s23, s59
+; SI-NEXT: s_lshl_b32 s59, s92, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s57
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s57, s50, 16
+; SI-NEXT: s_or_b32 s24, s24, s59
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s55, 16
+; SI-NEXT: s_or_b32 s15, s15, s57
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s62, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s57, s62, 16
+; SI-NEXT: s_or_b32 s25, s25, s59
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s90, 16
+; SI-NEXT: s_or_b32 s12, s12, s57
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
+; SI-NEXT: s_lshl_b32 s57, s49, 16
+; SI-NEXT: s_or_b32 s26, s26, s59
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s54, 16
+; SI-NEXT: s_or_b32 s13, s13, s57
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s57, s58, 16
+; SI-NEXT: s_or_b32 s27, s27, s59
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s88, 16
+; SI-NEXT: s_or_b32 s10, s10, s57
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
+; SI-NEXT: s_lshl_b32 s57, s48, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_or_b32 s28, s28, s59
+; SI-NEXT: s_and_b32 s29, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s53, 16
+; SI-NEXT: s_or_b32 s11, s11, s57
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_lshl_b32 s57, s60, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s56, 16
+; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
+; SI-NEXT: s_lshl_b32 s63, s34, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s61
+; SI-NEXT: s_lshl_b32 s61, s30, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s29, s29, s59
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s78, 16
+; SI-NEXT: s_or_b32 s8, s8, s57
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s39, 16
+; SI-NEXT: s_or_b32 s6, s6, s56
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_lshl_b32 s56, s38, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s46, s47, 16
+; SI-NEXT: s_or_b32 s16, s16, s63
+; SI-NEXT: s_or_b32 s18, s18, s61
+; SI-NEXT: s_or_b32 s44, s44, s59
+; SI-NEXT: s_or_b32 s9, s9, s57
+; SI-NEXT: s_or_b32 s7, s7, s56
; SI-NEXT: s_or_b32 s5, s5, s46
-; SI-NEXT: v_readlane_b32 s30, v32, 20
+; SI-NEXT: v_readlane_b32 s30, v32, 16
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -34033,11 +34401,7 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_readlane_b32 s31, v32, 21
-; SI-NEXT: v_readlane_b32 s69, v32, 19
-; SI-NEXT: v_readlane_b32 s68, v32, 18
-; SI-NEXT: v_readlane_b32 s67, v32, 17
-; SI-NEXT: v_readlane_b32 s66, v32, 16
+; SI-NEXT: v_readlane_b32 s31, v32, 17
; SI-NEXT: v_readlane_b32 s65, v32, 15
; SI-NEXT: v_readlane_b32 s64, v32, 14
; SI-NEXT: v_readlane_b32 s55, v32, 13
@@ -35208,25 +35572,25 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s91, v7
; SI-NEXT: v_readfirstlane_b32 s94, v6
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v5
-; SI-NEXT: v_readfirstlane_b32 s34, v4
-; SI-NEXT: v_readfirstlane_b32 s70, v3
-; SI-NEXT: v_readfirstlane_b32 s81, v2
-; SI-NEXT: v_readfirstlane_b32 s84, v1
-; SI-NEXT: v_readfirstlane_b32 s87, v0
+; SI-NEXT: v_readfirstlane_b32 s31, v4
+; SI-NEXT: v_readfirstlane_b32 s69, v3
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: v_readfirstlane_b32 s83, v1
+; SI-NEXT: v_readfirstlane_b32 s86, v0
; SI-NEXT: s_lshr_b32 s92, s29, 16
; SI-NEXT: s_lshr_b32 s95, s28, 16
-; SI-NEXT: s_lshr_b32 s30, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s71, s24, 16
-; SI-NEXT: s_lshr_b32 s82, s23, 16
-; SI-NEXT: s_lshr_b32 s85, s22, 16
-; SI-NEXT: s_lshr_b32 s96, s21, 16
-; SI-NEXT: s_lshr_b32 s97, s20, 16
-; SI-NEXT: s_lshr_b32 s98, s19, 16
-; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: s_lshr_b32 s8, s16, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s24, 16
+; SI-NEXT: s_lshr_b32 s81, s23, 16
+; SI-NEXT: s_lshr_b32 s84, s22, 16
+; SI-NEXT: s_lshr_b32 s87, s21, 16
+; SI-NEXT: s_lshr_b32 s96, s20, 16
+; SI-NEXT: s_lshr_b32 s97, s19, 16
+; SI-NEXT: s_lshr_b32 s98, s18, 16
+; SI-NEXT: s_lshr_b32 s99, s17, 16
+; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
; SI-NEXT: s_lshr_b32 s12, s11, 16
@@ -35240,75 +35604,76 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s34, 16
-; SI-NEXT: s_lshr_b32 s68, s70, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s35, s69, 16
+; SI-NEXT: s_lshr_b32 s71, s80, 16
+; SI-NEXT: s_lshr_b32 s82, s83, 16
+; SI-NEXT: s_lshr_b32 s85, s86, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v33, s14, 0
; SI-NEXT: v_writelane_b32 v33, s63, 1
; SI-NEXT: s_cbranch_scc0 .LBB27_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: s_or_b32 s36, s5, s8
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s98, 16
+; SI-NEXT: s_or_b32 s38, s5, s8
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s97, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s6, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s99, 16
+; SI-NEXT: s_or_b32 s39, s5, s8
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s96, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s8
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s87, 16
+; SI-NEXT: s_or_b32 s41, s5, s8
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s84, 16
+; SI-NEXT: s_or_b32 s42, s5, s8
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s81, 16
+; SI-NEXT: s_or_b32 s43, s5, s8
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s70, 16
+; SI-NEXT: s_or_b32 s44, s5, s8
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s68, 16
+; SI-NEXT: s_or_b32 s45, s5, s8
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s8
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_mov_b32 s8, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s47, s5, s4
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s53, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s54, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -35364,6 +35729,7 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s14, s12
; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
+; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB27_3: ; %Flow
@@ -35374,62 +35740,62 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s99, 16
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_add_i32 s37, s5, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s98, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s96, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -35441,30 +35807,30 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_add_i32 s86, s86, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s83, s83, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
@@ -40400,331 +40766,330 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB36_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_mov_b32_e32 v42, v35
; VI-NEXT: .LBB36_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB36_4
@@ -40777,280 +41142,281 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_add_f32_e32 v12, 1.0, v12
-; VI-NEXT: v_add_f32_e32 v11, 1.0, v11
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v12, 1.0, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_add_f32_e32 v6, 1.0, v6
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_add_f32_e32 v11, 1.0, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_add_f32_e32 v4, 1.0, v4
; VI-NEXT: v_add_f32_e32 v3, 1.0, v3
-; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
; VI-NEXT: v_add_f32_e32 v9, 1.0, v9
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_add_f32_e32 v2, 1.0, v2
; VI-NEXT: v_add_f32_e32 v1, 1.0, v1
; VI-NEXT: v_add_f32_e32 v7, 1.0, v7
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
; VI-NEXT: .LBB36_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v7, v7, v38, s4
-; VI-NEXT: v_perm_b32 v10, v10, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v13, v13, v35, s4
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v8, v8, v33, s4
-; VI-NEXT: v_perm_b32 v33, v49, v53, s4
-; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v34, s4
-; VI-NEXT: v_perm_b32 v34, v47, v39, s4
-; VI-NEXT: v_perm_b32 v39, v50, v54, s4
-; VI-NEXT: v_perm_b32 v55, v59, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v52, s4
-; VI-NEXT: v_perm_b32 v2, v2, v58, s4
-; VI-NEXT: v_perm_b32 v51, v51, v40, s4
-; VI-NEXT: v_perm_b32 v4, v4, v57, s4
-; VI-NEXT: v_perm_b32 v5, v5, v56, s4
-; VI-NEXT: v_perm_b32 v6, v6, v46, s4
-; VI-NEXT: v_perm_b32 v9, v9, v45, s4
-; VI-NEXT: v_perm_b32 v12, v12, v63, s4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v36, v36, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: v_perm_b32 v12, v12, v34, s4
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v36, s4
+; VI-NEXT: v_perm_b32 v1, v1, v33, s4
+; VI-NEXT: v_perm_b32 v33, v51, v40, s4
+; VI-NEXT: v_perm_b32 v51, v46, v53, s4
+; VI-NEXT: v_perm_b32 v9, v9, v38, s4
+; VI-NEXT: v_perm_b32 v38, v43, v52, s4
+; VI-NEXT: v_perm_b32 v11, v11, v37, s4
+; VI-NEXT: v_perm_b32 v41, v63, v41, s4
+; VI-NEXT: v_perm_b32 v10, v10, v49, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
+; VI-NEXT: v_perm_b32 v3, v3, v61, s4
+; VI-NEXT: v_perm_b32 v4, v4, v60, s4
+; VI-NEXT: v_perm_b32 v39, v58, v39, s4
+; VI-NEXT: v_perm_b32 v5, v5, v59, s4
+; VI-NEXT: v_perm_b32 v6, v6, v57, s4
+; VI-NEXT: v_perm_b32 v50, v50, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v8, v8, v47, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v34, v35, v34, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v14, v14, v35, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v36, v35, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v35, v48, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v36, v52, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v17, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v18, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v49, s4
-; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v49
+; VI-NEXT: v_perm_b32 v49, v36, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v44, v43, s4
+; VI-NEXT: v_perm_b32 v1, v45, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v62, v61, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v20, v42, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v48, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -41059,157 +41425,159 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v21, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v22, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v23, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v24, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v26, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v28, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v29, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v30, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -41315,321 +41683,324 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB36_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(24)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: s_waitcnt vmcnt(22)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; GFX9-NEXT: v_mov_b32_e32 v55, v39
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; GFX9-NEXT: .LBB36_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v42, v35
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB36_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_f32_e32 v32, 1.0, v32
@@ -41699,426 +42070,412 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5
-; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
; GFX9-NEXT: .LBB36_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
-; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4
-; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4
-; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v38, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v5, v5, v52, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
+; GFX9-NEXT: v_perm_b32 v36, v51, v54, s4
+; GFX9-NEXT: v_perm_b32 v51, v44, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v50, s4
+; GFX9-NEXT: v_perm_b32 v41, v59, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v63, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v48, s4
; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4
-; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v48, v58, v40, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v62, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v57, s4
+; GFX9-NEXT: v_perm_b32 v39, v46, v39, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v60, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v13, v13, v38, s4
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4
+; GFX9-NEXT: v_perm_b32 v14, v14, v38, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v35, v35, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v38, v38, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v52, v52, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v17, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v18, v18, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4
+; GFX9-NEXT: v_perm_b32 v53, v53, v44, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4
+; GFX9-NEXT: v_perm_b32 v1, v43, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4
+; GFX9-NEXT: v_perm_b32 v1, v49, v37, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v20, v55, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v42, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v61, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -42142,74 +42499,70 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v32f32_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
@@ -42289,19 +42642,25 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB36_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v48.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -42363,28 +42722,24 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-TRUE16-NEXT: .LBB36_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -42483,50 +42838,50 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: .LBB36_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v59, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v73, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v67, 16, v2
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -42535,9 +42890,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -42613,101 +42967,95 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v32f32_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
@@ -42787,19 +43135,25 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB36_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v55, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -42861,28 +43215,24 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-FAKE16-NEXT: .LBB36_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -42981,50 +43331,51 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: .LBB36_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v63, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v60, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -43033,9 +43384,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -43111,27 +43461,25 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -43210,568 +43558,569 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_writelane_b32 v63, s30, 34
; SI-NEXT: v_writelane_b32 v63, s31, 35
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_readfirstlane_b32 s43, v18
-; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: v_readfirstlane_b32 s45, v16
-; SI-NEXT: v_readfirstlane_b32 s44, v15
-; SI-NEXT: v_readfirstlane_b32 s47, v14
-; SI-NEXT: v_readfirstlane_b32 s46, v13
-; SI-NEXT: v_readfirstlane_b32 s57, v12
-; SI-NEXT: v_readfirstlane_b32 s56, v11
-; SI-NEXT: v_readfirstlane_b32 s59, v10
-; SI-NEXT: v_readfirstlane_b32 s58, v9
-; SI-NEXT: v_readfirstlane_b32 s61, v8
-; SI-NEXT: v_readfirstlane_b32 s60, v7
-; SI-NEXT: v_readfirstlane_b32 s63, v6
-; SI-NEXT: v_readfirstlane_b32 s62, v5
-; SI-NEXT: v_readfirstlane_b32 s73, v4
-; SI-NEXT: v_readfirstlane_b32 s72, v3
-; SI-NEXT: v_readfirstlane_b32 s75, v2
+; SI-NEXT: v_readfirstlane_b32 s9, v18
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: v_readfirstlane_b32 s31, v16
+; SI-NEXT: v_readfirstlane_b32 s30, v15
+; SI-NEXT: v_readfirstlane_b32 s35, v14
+; SI-NEXT: v_readfirstlane_b32 s34, v13
+; SI-NEXT: v_readfirstlane_b32 s37, v12
+; SI-NEXT: v_readfirstlane_b32 s36, v11
+; SI-NEXT: v_readfirstlane_b32 s39, v10
+; SI-NEXT: v_readfirstlane_b32 s38, v9
+; SI-NEXT: v_readfirstlane_b32 s49, v8
+; SI-NEXT: v_readfirstlane_b32 s48, v7
+; SI-NEXT: v_readfirstlane_b32 s51, v6
+; SI-NEXT: v_readfirstlane_b32 s50, v5
+; SI-NEXT: v_readfirstlane_b32 s53, v4
+; SI-NEXT: v_readfirstlane_b32 s52, v3
+; SI-NEXT: v_readfirstlane_b32 s55, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s74, v1
+; SI-NEXT: v_readfirstlane_b32 s54, v1
; SI-NEXT: ; implicit-def: $vgpr61 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB37_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s4, s43, 24
+; SI-NEXT: s_lshr_b32 s4, s53, 24
+; SI-NEXT: v_writelane_b32 v62, s4, 18
+; SI-NEXT: s_lshr_b32 s4, s53, 16
; SI-NEXT: v_writelane_b32 v62, s4, 17
-; SI-NEXT: s_lshr_b32 s4, s43, 8
+; SI-NEXT: s_lshr_b32 s4, s55, 24
; SI-NEXT: v_writelane_b32 v62, s4, 16
-; SI-NEXT: s_lshr_b32 s4, s45, 24
+; SI-NEXT: s_lshr_b32 s4, s55, 16
; SI-NEXT: v_writelane_b32 v62, s4, 15
-; SI-NEXT: s_lshr_b32 s4, s45, 16
+; SI-NEXT: s_lshr_b32 s4, s55, 8
; SI-NEXT: v_writelane_b32 v62, s4, 14
-; SI-NEXT: s_lshr_b32 s4, s45, 8
+; SI-NEXT: s_lshr_b32 s4, s29, 24
; SI-NEXT: v_writelane_b32 v62, s4, 13
-; SI-NEXT: s_lshr_b32 s4, s47, 24
+; SI-NEXT: s_lshr_b32 s4, s29, 16
; SI-NEXT: v_writelane_b32 v62, s4, 12
-; SI-NEXT: s_lshr_b32 s4, s47, 16
+; SI-NEXT: s_lshr_b32 s4, s29, 8
; SI-NEXT: v_writelane_b32 v62, s4, 11
-; SI-NEXT: s_lshr_b32 s4, s47, 8
+; SI-NEXT: s_lshr_b32 s4, s27, 24
; SI-NEXT: v_writelane_b32 v62, s4, 10
-; SI-NEXT: s_lshr_b32 s4, s57, 24
+; SI-NEXT: s_lshr_b32 s4, s27, 16
; SI-NEXT: v_writelane_b32 v62, s4, 9
-; SI-NEXT: s_lshr_b32 s4, s57, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 8
; SI-NEXT: v_writelane_b32 v62, s4, 8
-; SI-NEXT: s_lshr_b32 s4, s57, 8
+; SI-NEXT: s_lshr_b32 s4, s25, 24
; SI-NEXT: v_writelane_b32 v62, s4, 7
-; SI-NEXT: s_lshr_b32 s4, s59, 24
+; SI-NEXT: s_lshr_b32 s4, s25, 16
; SI-NEXT: v_writelane_b32 v62, s4, 6
-; SI-NEXT: s_lshr_b32 s4, s59, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 8
; SI-NEXT: v_writelane_b32 v62, s4, 5
-; SI-NEXT: s_lshr_b32 s4, s59, 8
+; SI-NEXT: s_lshr_b32 s4, s23, 24
; SI-NEXT: v_writelane_b32 v62, s4, 4
-; SI-NEXT: s_lshr_b32 s4, s61, 24
+; SI-NEXT: s_lshr_b32 s4, s23, 16
; SI-NEXT: v_writelane_b32 v62, s4, 3
-; SI-NEXT: s_lshr_b32 s4, s61, 16
+; SI-NEXT: s_lshr_b32 s4, s23, 8
; SI-NEXT: v_writelane_b32 v62, s4, 2
-; SI-NEXT: s_lshr_b32 s4, s61, 8
+; SI-NEXT: s_lshr_b32 s4, s21, 24
; SI-NEXT: v_writelane_b32 v62, s4, 1
-; SI-NEXT: s_lshr_b32 s4, s63, 24
+; SI-NEXT: s_lshr_b32 s4, s21, 16
; SI-NEXT: v_writelane_b32 v62, s4, 0
-; SI-NEXT: s_lshr_b32 s4, s63, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 8
; SI-NEXT: v_writelane_b32 v61, s4, 63
-; SI-NEXT: s_lshr_b32 s4, s63, 8
+; SI-NEXT: s_lshr_b32 s4, s19, 24
; SI-NEXT: v_writelane_b32 v61, s4, 62
-; SI-NEXT: s_lshr_b32 s4, s73, 24
+; SI-NEXT: s_lshr_b32 s4, s19, 16
; SI-NEXT: v_writelane_b32 v61, s4, 61
-; SI-NEXT: s_lshr_b32 s4, s73, 16
+; SI-NEXT: s_lshr_b32 s4, s19, 8
; SI-NEXT: v_writelane_b32 v61, s4, 60
-; SI-NEXT: s_lshr_b32 s4, s73, 8
+; SI-NEXT: s_lshr_b32 s4, s17, 16
; SI-NEXT: v_writelane_b32 v61, s4, 59
-; SI-NEXT: s_lshr_b32 s4, s75, 24
+; SI-NEXT: s_lshr_b32 s4, s17, 8
; SI-NEXT: v_writelane_b32 v61, s4, 58
-; SI-NEXT: s_lshr_b32 s4, s75, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 57
-; SI-NEXT: s_lshr_b32 s4, s75, 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
; SI-NEXT: v_writelane_b32 v61, s4, 56
-; SI-NEXT: s_lshr_b32 s4, s29, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 55
-; SI-NEXT: s_lshr_b32 s4, s29, 16
+; SI-NEXT: v_writelane_b32 v61, s5, 57
+; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16
; SI-NEXT: v_writelane_b32 v61, s4, 54
-; SI-NEXT: s_lshr_b32 s4, s29, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 53
-; SI-NEXT: s_lshr_b32 s4, s27, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 52
-; SI-NEXT: s_lshr_b32 s4, s27, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 51
-; SI-NEXT: s_lshr_b32 s4, s27, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 50
-; SI-NEXT: s_lshr_b32 s4, s25, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 49
-; SI-NEXT: s_lshr_b32 s4, s25, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 48
-; SI-NEXT: s_lshr_b32 s4, s25, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 47
-; SI-NEXT: s_lshr_b32 s4, s23, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 46
-; SI-NEXT: s_lshr_b32 s4, s23, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 45
-; SI-NEXT: s_lshr_b32 s4, s23, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 44
-; SI-NEXT: s_lshr_b32 s4, s21, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 43
-; SI-NEXT: s_lshr_b32 s4, s21, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 42
-; SI-NEXT: s_lshr_b32 s4, s21, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 41
-; SI-NEXT: s_lshr_b32 s4, s19, 24
-; SI-NEXT: v_writelane_b32 v61, s4, 40
-; SI-NEXT: s_lshr_b32 s4, s19, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 39
-; SI-NEXT: s_lshr_b32 s4, s19, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 38
-; SI-NEXT: s_lshr_b32 s4, s17, 16
-; SI-NEXT: v_writelane_b32 v61, s4, 37
-; SI-NEXT: s_lshr_b32 s4, s17, 8
-; SI-NEXT: v_writelane_b32 v61, s4, 36
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v61, s4, 34
-; SI-NEXT: v_writelane_b32 v61, s5, 35
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v61, s4, 32
-; SI-NEXT: v_writelane_b32 v61, s5, 33
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 30
-; SI-NEXT: v_writelane_b32 v61, s5, 31
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v61, s4, 28
-; SI-NEXT: v_writelane_b32 v61, s5, 29
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v61, s4, 26
-; SI-NEXT: v_writelane_b32 v61, s5, 27
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 24
-; SI-NEXT: v_writelane_b32 v61, s5, 25
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v61, s4, 22
-; SI-NEXT: v_writelane_b32 v61, s5, 23
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v61, s4, 20
-; SI-NEXT: v_writelane_b32 v61, s5, 21
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 18
-; SI-NEXT: v_writelane_b32 v61, s5, 19
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v61, s4, 16
-; SI-NEXT: v_writelane_b32 v61, s5, 17
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v61, s4, 14
-; SI-NEXT: v_writelane_b32 v61, s5, 15
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 12
-; SI-NEXT: v_writelane_b32 v61, s5, 13
-; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 10
-; SI-NEXT: v_writelane_b32 v61, s5, 11
-; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v61, s4, 8
-; SI-NEXT: v_writelane_b32 v61, s5, 9
-; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 6
-; SI-NEXT: v_writelane_b32 v61, s5, 7
-; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 4
-; SI-NEXT: v_writelane_b32 v61, s5, 5
-; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 2
-; SI-NEXT: v_writelane_b32 v61, s5, 3
-; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8
-; SI-NEXT: v_writelane_b32 v61, s4, 0
-; SI-NEXT: s_lshr_b32 s79, s43, 16
-; SI-NEXT: s_lshr_b32 s78, s17, 24
-; SI-NEXT: s_lshr_b64 s[88:89], s[58:59], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 24
-; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 24
-; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[74:75], 16
-; SI-NEXT: v_writelane_b32 v61, s5, 1
-; SI-NEXT: s_lshr_b64 s[48:49], s[28:29], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[28:29], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[64:65], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[70:71], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[82:83], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[84:85], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[86:87], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[8:9], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 8
-; SI-NEXT: s_mov_b64 s[76:77], 0
+; SI-NEXT: v_writelane_b32 v61, s5, 55
+; SI-NEXT: s_lshr_b64 s[12:13], s[30:31], 24
+; SI-NEXT: v_writelane_b32 v61, s12, 52
+; SI-NEXT: v_writelane_b32 v61, s13, 53
+; SI-NEXT: s_lshr_b64 s[40:41], s[30:31], 8
+; SI-NEXT: v_writelane_b32 v61, s40, 50
+; SI-NEXT: v_writelane_b32 v61, s41, 51
+; SI-NEXT: s_lshr_b64 s[40:41], s[34:35], 24
+; SI-NEXT: v_writelane_b32 v61, s40, 48
+; SI-NEXT: v_writelane_b32 v61, s41, 49
+; SI-NEXT: s_lshr_b64 s[40:41], s[34:35], 16
+; SI-NEXT: v_writelane_b32 v61, s40, 46
+; SI-NEXT: v_writelane_b32 v61, s41, 47
+; SI-NEXT: s_lshr_b64 s[40:41], s[34:35], 8
+; SI-NEXT: v_writelane_b32 v61, s40, 44
+; SI-NEXT: v_writelane_b32 v61, s41, 45
+; SI-NEXT: s_lshr_b64 s[40:41], s[36:37], 24
+; SI-NEXT: v_writelane_b32 v61, s40, 42
+; SI-NEXT: v_writelane_b32 v61, s41, 43
+; SI-NEXT: s_lshr_b64 s[40:41], s[36:37], 16
+; SI-NEXT: v_writelane_b32 v61, s40, 40
+; SI-NEXT: v_writelane_b32 v61, s41, 41
+; SI-NEXT: s_lshr_b64 s[40:41], s[36:37], 8
+; SI-NEXT: v_writelane_b32 v61, s40, 38
+; SI-NEXT: v_writelane_b32 v61, s41, 39
+; SI-NEXT: s_lshr_b64 s[40:41], s[38:39], 24
+; SI-NEXT: v_writelane_b32 v61, s40, 36
+; SI-NEXT: v_writelane_b32 v61, s41, 37
+; SI-NEXT: s_lshr_b64 s[42:43], s[50:51], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 34
+; SI-NEXT: v_writelane_b32 v61, s43, 35
+; SI-NEXT: s_lshr_b64 s[42:43], s[50:51], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 32
+; SI-NEXT: v_writelane_b32 v61, s43, 33
+; SI-NEXT: s_lshr_b64 s[42:43], s[50:51], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 30
+; SI-NEXT: v_writelane_b32 v61, s43, 31
+; SI-NEXT: s_lshr_b64 s[42:43], s[52:53], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 28
+; SI-NEXT: v_writelane_b32 v61, s43, 29
+; SI-NEXT: s_lshr_b64 s[42:43], s[52:53], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 26
+; SI-NEXT: v_writelane_b32 v61, s43, 27
+; SI-NEXT: s_lshr_b64 s[42:43], s[52:53], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 24
+; SI-NEXT: v_writelane_b32 v61, s43, 25
+; SI-NEXT: s_lshr_b64 s[42:43], s[54:55], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 22
+; SI-NEXT: v_writelane_b32 v61, s43, 23
+; SI-NEXT: s_lshr_b64 s[42:43], s[54:55], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 20
+; SI-NEXT: v_writelane_b32 v61, s43, 21
+; SI-NEXT: s_lshr_b64 s[42:43], s[54:55], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 18
+; SI-NEXT: v_writelane_b32 v61, s43, 19
+; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 16
+; SI-NEXT: v_writelane_b32 v61, s43, 17
+; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 14
+; SI-NEXT: v_writelane_b32 v61, s43, 15
+; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 12
+; SI-NEXT: v_writelane_b32 v61, s43, 13
+; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 10
+; SI-NEXT: v_writelane_b32 v61, s43, 11
+; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 8
+; SI-NEXT: v_writelane_b32 v61, s43, 9
+; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 6
+; SI-NEXT: v_writelane_b32 v61, s43, 7
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v61, s42, 4
+; SI-NEXT: v_writelane_b32 v61, s43, 5
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v61, s42, 2
+; SI-NEXT: v_writelane_b32 v61, s43, 3
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v61, s42, 0
+; SI-NEXT: s_lshr_b32 s15, s9, 24
+; SI-NEXT: s_lshr_b32 s69, s9, 16
+; SI-NEXT: s_lshr_b32 s70, s9, 8
+; SI-NEXT: s_lshr_b32 s10, s31, 24
+; SI-NEXT: s_lshr_b32 s14, s31, 16
+; SI-NEXT: s_lshr_b32 s68, s31, 8
+; SI-NEXT: s_lshr_b32 s98, s35, 24
+; SI-NEXT: s_lshr_b32 s7, s35, 16
+; SI-NEXT: s_lshr_b32 s11, s35, 8
+; SI-NEXT: s_lshr_b32 s96, s37, 24
+; SI-NEXT: s_lshr_b32 s67, s37, 16
+; SI-NEXT: s_lshr_b32 s99, s37, 8
+; SI-NEXT: s_lshr_b32 s85, s39, 24
+; SI-NEXT: s_lshr_b32 s87, s39, 16
+; SI-NEXT: s_lshr_b32 s97, s39, 8
+; SI-NEXT: s_lshr_b32 s82, s49, 24
+; SI-NEXT: s_lshr_b32 s84, s49, 16
+; SI-NEXT: s_lshr_b32 s86, s49, 8
+; SI-NEXT: s_lshr_b32 s71, s51, 24
+; SI-NEXT: s_lshr_b32 s81, s51, 16
+; SI-NEXT: s_lshr_b32 s83, s51, 8
+; SI-NEXT: s_lshr_b32 s80, s53, 8
+; SI-NEXT: s_lshr_b32 s66, s17, 24
+; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
+; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[12:13], s[30:31], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[38:39], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[38:39], 8
+; SI-NEXT: s_lshr_b64 s[44:45], s[48:49], 24
+; SI-NEXT: s_lshr_b64 s[56:57], s[48:49], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[48:49], 8
+; SI-NEXT: v_writelane_b32 v61, s43, 1
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
+; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 24
+; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[16:17], 8
+; SI-NEXT: s_mov_b64 s[64:65], 0
; SI-NEXT: s_branch .LBB37_3
; SI-NEXT: .LBB37_2:
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: s_mov_b64 s[76:77], -1
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 0
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 1
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b64 s[64:65], -1
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr97
+; SI-NEXT: ; implicit-def: $sgpr87
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 2
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 3
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 5
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 6
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 7
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 8
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 9
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 10
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 11
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 12
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 13
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 14
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 15
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 16
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 17
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 18
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s79, 19
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 20
-; SI-NEXT: v_writelane_b32 v61, s79, 21
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 22
-; SI-NEXT: v_writelane_b32 v61, s79, 23
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 24
-; SI-NEXT: v_writelane_b32 v61, s79, 25
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 26
-; SI-NEXT: v_writelane_b32 v61, s79, 27
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 28
-; SI-NEXT: v_writelane_b32 v61, s79, 29
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 30
-; SI-NEXT: v_writelane_b32 v61, s79, 31
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 32
-; SI-NEXT: v_writelane_b32 v61, s79, 33
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s78, 34
-; SI-NEXT: v_writelane_b32 v61, s79, 35
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 0
+; SI-NEXT: v_writelane_b32 v61, s7, 1
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 2
+; SI-NEXT: v_writelane_b32 v61, s7, 3
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 4
+; SI-NEXT: v_writelane_b32 v61, s7, 5
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 6
+; SI-NEXT: v_writelane_b32 v61, s7, 7
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 8
+; SI-NEXT: v_writelane_b32 v61, s7, 9
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 10
+; SI-NEXT: v_writelane_b32 v61, s7, 11
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 12
+; SI-NEXT: v_writelane_b32 v61, s7, 13
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 14
+; SI-NEXT: v_writelane_b32 v61, s7, 15
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 16
+; SI-NEXT: v_writelane_b32 v61, s7, 17
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 18
+; SI-NEXT: v_writelane_b32 v61, s7, 19
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 20
+; SI-NEXT: v_writelane_b32 v61, s7, 21
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 22
+; SI-NEXT: v_writelane_b32 v61, s7, 23
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 24
+; SI-NEXT: v_writelane_b32 v61, s7, 25
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 26
+; SI-NEXT: v_writelane_b32 v61, s7, 27
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 28
+; SI-NEXT: v_writelane_b32 v61, s7, 29
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 30
+; SI-NEXT: v_writelane_b32 v61, s7, 31
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 32
+; SI-NEXT: v_writelane_b32 v61, s7, 33
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 34
+; SI-NEXT: v_writelane_b32 v61, s7, 35
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 36
+; SI-NEXT: v_writelane_b32 v61, s7, 37
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 38
+; SI-NEXT: v_writelane_b32 v61, s7, 39
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 40
+; SI-NEXT: v_writelane_b32 v61, s7, 41
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 42
+; SI-NEXT: v_writelane_b32 v61, s7, 43
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 44
+; SI-NEXT: v_writelane_b32 v61, s7, 45
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 46
+; SI-NEXT: v_writelane_b32 v61, s7, 47
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 48
+; SI-NEXT: v_writelane_b32 v61, s7, 49
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 50
+; SI-NEXT: v_writelane_b32 v61, s7, 51
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 52
+; SI-NEXT: v_writelane_b32 v61, s7, 53
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: v_writelane_b32 v61, s6, 54
+; SI-NEXT: v_writelane_b32 v61, s7, 55
+; SI-NEXT: v_writelane_b32 v61, s66, 56
+; SI-NEXT: v_writelane_b32 v61, s67, 57
+; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: .LBB37_3: ; %Flow
-; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
-; SI-NEXT: s_cselect_b32 s5, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s5, 1
+; SI-NEXT: s_and_b64 s[64:65], s[64:65], exec
+; SI-NEXT: s_cselect_b32 s6, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s6, 1
; SI-NEXT: s_cbranch_scc1 .LBB37_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_add_f32_e64 v1, s58, 1.0
-; SI-NEXT: v_add_f32_e64 v22, s26, 1.0
+; SI-NEXT: v_add_f32_e64 v1, s38, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s26, v1
+; SI-NEXT: v_readfirstlane_b32 s44, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e64 v1, s56, 1.0
-; SI-NEXT: v_add_f32_e64 v20, s28, 1.0
+; SI-NEXT: v_add_f32_e64 v1, s36, 1.0
+; SI-NEXT: v_add_f32_e64 v22, s26, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s28, v1
+; SI-NEXT: v_readfirstlane_b32 s26, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e64 v1, s46, 1.0
+; SI-NEXT: v_add_f32_e64 v1, s34, 1.0
+; SI-NEXT: v_add_f32_e64 v29, s20, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s40, v1
+; SI-NEXT: v_readfirstlane_b32 s20, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e64 v1, s44, 1.0
+; SI-NEXT: v_add_f32_e64 v1, s30, 1.0
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s44, v1
+; SI-NEXT: v_readfirstlane_b32 s14, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_f32_e64 v1, s43, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s42, 1.0
-; SI-NEXT: v_add_f32_e64 v13, s63, 1.0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s42, v2
+; SI-NEXT: v_add_f32_e64 v1, s5, 1.0
+; SI-NEXT: v_add_f32_e64 v3, s4, 1.0
+; SI-NEXT: v_add_f32_e64 v15, s53, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v1
-; SI-NEXT: v_add_f32_e64 v15, s73, 1.0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v1
+; SI-NEXT: v_add_f32_e64 v17, s55, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v15
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v17
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
-; SI-NEXT: v_add_f32_e64 v17, s75, 1.0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17
+; SI-NEXT: v_add_f32_e64 v19, s29, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v15
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v17
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v19
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17
-; SI-NEXT: v_add_f32_e64 v19, s29, 1.0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v19
+; SI-NEXT: v_add_f32_e64 v21, s27, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v19
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v19
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v21
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
-; SI-NEXT: v_add_f32_e64 v21, s27, 1.0
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21
+; SI-NEXT: v_add_f32_e64 v23, s25, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v19
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v21
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v21
-; SI-NEXT: v_readfirstlane_b32 s43, v1
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v23
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: v_add_f32_e64 v31, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v35, s16, 1.0
-; SI-NEXT: v_add_f32_e64 v29, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v30, s18, 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23
+; SI-NEXT: v_add_f32_e64 v34, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v38, s16, 1.0
+; SI-NEXT: v_add_f32_e64 v31, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v33, s18, 1.0
; SI-NEXT: v_add_f32_e64 v27, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v28, s20, 1.0
; SI-NEXT: v_add_f32_e64 v25, s23, 1.0
; SI-NEXT: v_add_f32_e64 v26, s22, 1.0
-; SI-NEXT: v_add_f32_e64 v23, s25, 1.0
; SI-NEXT: v_add_f32_e64 v24, s24, 1.0
-; SI-NEXT: v_add_f32_e64 v18, s74, 1.0
-; SI-NEXT: v_add_f32_e64 v16, s72, 1.0
-; SI-NEXT: v_add_f32_e64 v14, s62, 1.0
-; SI-NEXT: v_add_f32_e64 v11, s61, 1.0
-; SI-NEXT: v_add_f32_e64 v12, s60, 1.0
-; SI-NEXT: v_add_f32_e64 v9, s59, 1.0
-; SI-NEXT: v_add_f32_e64 v7, s57, 1.0
-; SI-NEXT: v_add_f32_e64 v5, s47, 1.0
-; SI-NEXT: v_add_f32_e64 v3, s45, 1.0
-; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 8
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
-; SI-NEXT: v_readfirstlane_b32 s16, v35
-; SI-NEXT: v_readfirstlane_b32 s17, v31
-; SI-NEXT: v_readfirstlane_b32 s10, v30
-; SI-NEXT: v_readfirstlane_b32 s11, v29
-; SI-NEXT: v_readfirstlane_b32 s4, v28
-; SI-NEXT: v_readfirstlane_b32 s5, v27
-; SI-NEXT: v_readfirstlane_b32 s6, v26
-; SI-NEXT: v_readfirstlane_b32 s7, v25
-; SI-NEXT: v_readfirstlane_b32 s8, v24
-; SI-NEXT: v_readfirstlane_b32 s9, v23
-; SI-NEXT: v_readfirstlane_b32 s12, v22
-; SI-NEXT: v_readfirstlane_b32 s13, v21
-; SI-NEXT: v_readfirstlane_b32 s14, v20
-; SI-NEXT: v_readfirstlane_b32 s15, v19
-; SI-NEXT: v_readfirstlane_b32 s18, v18
-; SI-NEXT: v_readfirstlane_b32 s19, v17
-; SI-NEXT: v_readfirstlane_b32 s20, v16
-; SI-NEXT: v_readfirstlane_b32 s21, v15
-; SI-NEXT: v_readfirstlane_b32 s22, v14
-; SI-NEXT: v_readfirstlane_b32 s23, v13
-; SI-NEXT: v_readfirstlane_b32 s24, v12
-; SI-NEXT: v_readfirstlane_b32 s25, v11
-; SI-NEXT: v_readfirstlane_b32 s27, v9
-; SI-NEXT: v_readfirstlane_b32 s29, v7
-; SI-NEXT: v_readfirstlane_b32 s41, v5
-; SI-NEXT: v_readfirstlane_b32 s45, v3
-; SI-NEXT: v_writelane_b32 v61, s42, 30
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e64 v20, s28, 1.0
+; SI-NEXT: v_add_f32_e64 v18, s54, 1.0
+; SI-NEXT: v_add_f32_e64 v16, s52, 1.0
+; SI-NEXT: v_add_f32_e64 v13, s51, 1.0
+; SI-NEXT: v_add_f32_e64 v14, s50, 1.0
+; SI-NEXT: v_add_f32_e64 v11, s49, 1.0
+; SI-NEXT: v_add_f32_e64 v12, s48, 1.0
+; SI-NEXT: v_add_f32_e64 v9, s39, 1.0
+; SI-NEXT: v_add_f32_e64 v7, s37, 1.0
+; SI-NEXT: v_add_f32_e64 v5, s35, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s31, 1.0
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v23
-; SI-NEXT: v_writelane_b32 v61, s43, 31
-; SI-NEXT: s_lshr_b64 s[42:43], s[44:45], 24
-; SI-NEXT: s_lshr_b64 s[60:61], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
-; SI-NEXT: s_lshr_b64 s[78:79], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[28:29], s[28:29], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[26:27], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
-; SI-NEXT: s_lshr_b64 vcc, s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[22:23], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[34:35], s[20:21], 16
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v23
+; SI-NEXT: v_readfirstlane_b32 s98, v38
+; SI-NEXT: v_readfirstlane_b32 s99, v34
+; SI-NEXT: v_readfirstlane_b32 s84, v33
+; SI-NEXT: v_readfirstlane_b32 s85, v31
+; SI-NEXT: v_readfirstlane_b32 s70, v29
+; SI-NEXT: v_readfirstlane_b32 s71, v27
+; SI-NEXT: v_readfirstlane_b32 s64, v26
+; SI-NEXT: v_readfirstlane_b32 s65, v25
+; SI-NEXT: v_readfirstlane_b32 s92, v24
+; SI-NEXT: v_readfirstlane_b32 s93, v23
+; SI-NEXT: v_readfirstlane_b32 s78, v22
+; SI-NEXT: v_readfirstlane_b32 s79, v21
+; SI-NEXT: v_readfirstlane_b32 s76, v20
+; SI-NEXT: v_readfirstlane_b32 s77, v19
+; SI-NEXT: v_readfirstlane_b32 s88, v18
+; SI-NEXT: v_readfirstlane_b32 s89, v17
+; SI-NEXT: v_readfirstlane_b32 s90, v16
+; SI-NEXT: v_readfirstlane_b32 s91, v15
+; SI-NEXT: v_readfirstlane_b32 s58, v14
+; SI-NEXT: v_readfirstlane_b32 s59, v13
+; SI-NEXT: v_readfirstlane_b32 s42, v12
+; SI-NEXT: v_readfirstlane_b32 s43, v11
+; SI-NEXT: v_readfirstlane_b32 s45, v9
+; SI-NEXT: v_readfirstlane_b32 s27, v7
+; SI-NEXT: v_readfirstlane_b32 s21, v5
+; SI-NEXT: v_readfirstlane_b32 s15, v2
+; SI-NEXT: v_readfirstlane_b32 s9, v1
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v25
+; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[10:11], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[12:13], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[18:19], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[20:21], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[18:19], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[12:13], 24
-; SI-NEXT: s_lshr_b64 s[64:65], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[70:71], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[8:9], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[10:11], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 8
-; SI-NEXT: s_mov_b32 s16, s58
+; SI-NEXT: s_lshr_b64 s[22:23], s[26:27], 24
+; SI-NEXT: s_lshr_b64 s[24:25], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[26:27], s[26:27], 8
+; SI-NEXT: s_lshr_b64 s[28:29], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[40:41], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[42:43], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[60:61], s[90:91], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[90:91], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[90:91], 8
+; SI-NEXT: s_lshr_b64 s[34:35], s[88:89], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[88:89], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[88:89], 8
+; SI-NEXT: s_lshr_b64 s[48:49], s[76:77], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[76:77], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[76:77], 8
+; SI-NEXT: s_lshr_b64 s[54:55], s[78:79], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[78:79], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[92:93], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[92:93], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[92:93], 8
+; SI-NEXT: s_lshr_b64 s[94:95], s[64:65], 24
+; SI-NEXT: s_lshr_b64 vcc, s[64:65], 16
+; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 8
+; SI-NEXT: s_lshr_b64 s[66:67], s[70:71], 24
+; SI-NEXT: s_lshr_b64 s[68:69], s[70:71], 16
+; SI-NEXT: s_lshr_b64 s[70:71], s[70:71], 8
+; SI-NEXT: s_lshr_b64 s[80:81], s[84:85], 24
+; SI-NEXT: s_lshr_b64 s[82:83], s[84:85], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[84:85], 8
+; SI-NEXT: s_lshr_b64 s[86:87], s[98:99], 24
+; SI-NEXT: s_lshr_b64 s[96:97], s[98:99], 16
+; SI-NEXT: s_lshr_b64 s[98:99], s[98:99], 8
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1
; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v1
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v3
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v2
; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v5
; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v47, 8, v5
@@ -43780,342 +44129,347 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v7
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v9
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v32, 8, v9
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v13
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
+; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v11
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v11
+; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v39, 8, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v15
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v15
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v23
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v25
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v25
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v27
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v27
-; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v29
-; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v29
-; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v31
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v25
+; SI-NEXT: v_lshrrev_b32_e32 v4, 24, v27
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v52, 8, v27
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v31
+; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v34
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v34
; SI-NEXT: s_branch .LBB37_6
; SI-NEXT: .LBB37_5:
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_readlane_b32 s5, v61, 36
-; SI-NEXT: v_mov_b32_e32 v55, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 37
-; SI-NEXT: v_mov_b32_e32 v54, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 38
-; SI-NEXT: v_mov_b32_e32 v10, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 39
-; SI-NEXT: v_mov_b32_e32 v52, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 40
-; SI-NEXT: v_mov_b32_e32 v8, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 41
-; SI-NEXT: v_mov_b32_e32 v51, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 42
-; SI-NEXT: v_mov_b32_e32 v50, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 43
-; SI-NEXT: v_mov_b32_e32 v6, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 44
-; SI-NEXT: v_mov_b32_e32 v49, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 45
-; SI-NEXT: v_mov_b32_e32 v48, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 46
-; SI-NEXT: v_mov_b32_e32 v39, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 47
-; SI-NEXT: v_mov_b32_e32 v4, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 48
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 49
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 50
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s38
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s36
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s34
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s30
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 58
+; SI-NEXT: v_mov_b32_e32 v10, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 59
+; SI-NEXT: v_mov_b32_e32 v55, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 60
+; SI-NEXT: v_mov_b32_e32 v53, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 61
+; SI-NEXT: v_mov_b32_e32 v8, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 62
+; SI-NEXT: v_mov_b32_e32 v6, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 63
+; SI-NEXT: v_mov_b32_e32 v52, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 0
+; SI-NEXT: v_mov_b32_e32 v51, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 1
+; SI-NEXT: v_mov_b32_e32 v4, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 2
+; SI-NEXT: v_mov_b32_e32 v50, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 3
+; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 4
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 5
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 51
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 6
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 52
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 7
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 53
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 8
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 54
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 9
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 55
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 10
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 56
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 11
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 57
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 12
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 58
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 13
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 59
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 14
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 60
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 15
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 61
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 16
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 62
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 63
-; SI-NEXT: v_mov_b32_e32 v38, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 0
-; SI-NEXT: v_mov_b32_e32 v37, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 1
-; SI-NEXT: v_mov_b32_e32 v36, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 2
-; SI-NEXT: v_mov_b32_e32 v34, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 3
-; SI-NEXT: v_mov_b32_e32 v33, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 4
-; SI-NEXT: v_mov_b32_e32 v32, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 5
-; SI-NEXT: v_mov_b32_e32 v60, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 6
-; SI-NEXT: v_mov_b32_e32 v59, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 7
-; SI-NEXT: v_mov_b32_e32 v58, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 8
-; SI-NEXT: v_mov_b32_e32 v57, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 9
-; SI-NEXT: v_mov_b32_e32 v56, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 10
-; SI-NEXT: v_mov_b32_e32 v47, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 11
-; SI-NEXT: v_mov_b32_e32 v46, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 12
-; SI-NEXT: v_mov_b32_e32 v45, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 13
-; SI-NEXT: v_mov_b32_e32 v1, s58
-; SI-NEXT: v_mov_b32_e32 v44, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 14
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s56
-; SI-NEXT: v_mov_b32_e32 v43, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s46
-; SI-NEXT: v_mov_b32_e32 v42, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v12, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 17
+; SI-NEXT: v_mov_b32_e32 v49, s4
+; SI-NEXT: v_readlane_b32 s4, v62, 18
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s44
-; SI-NEXT: v_mov_b32_e32 v41, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 17
-; SI-NEXT: v_mov_b32_e32 v5, s47
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: v_mov_b32_e32 v48, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 8
+; SI-NEXT: v_readlane_b32 s5, v61, 9
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 6
+; SI-NEXT: v_readlane_b32 s5, v61, 7
+; SI-NEXT: v_mov_b32_e32 v42, s10
+; SI-NEXT: s_mov_b32 s10, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 4
+; SI-NEXT: v_readlane_b32 s5, v61, 5
+; SI-NEXT: v_mov_b32_e32 v43, s14
+; SI-NEXT: s_mov_b32 s14, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 2
+; SI-NEXT: v_readlane_b32 s5, v61, 3
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s42
+; SI-NEXT: v_mov_b32_e32 v12, s80
+; SI-NEXT: s_mov_b32 s16, s4
+; SI-NEXT: v_readlane_b32 s4, v61, 0
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s46, v61, 34
-; SI-NEXT: v_mov_b32_e32 v29, s19
+; SI-NEXT: v_mov_b32_e32 v12, s15
+; SI-NEXT: v_readlane_b32 s5, v61, 1
+; SI-NEXT: v_mov_b32_e32 v34, s17
+; SI-NEXT: v_mov_b32_e32 v31, s19
; SI-NEXT: v_mov_b32_e32 v27, s21
; SI-NEXT: v_mov_b32_e32 v25, s23
; SI-NEXT: v_mov_b32_e32 v23, s25
; SI-NEXT: v_mov_b32_e32 v21, s27
; SI-NEXT: v_mov_b32_e32 v19, s29
-; SI-NEXT: v_mov_b32_e32 v17, s75
-; SI-NEXT: v_mov_b32_e32 v15, s73
-; SI-NEXT: v_mov_b32_e32 v13, s63
-; SI-NEXT: v_mov_b32_e32 v11, s61
-; SI-NEXT: v_mov_b32_e32 v7, s57
-; SI-NEXT: v_mov_b32_e32 v3, s45
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s43
-; SI-NEXT: v_mov_b32_e32 v53, s78
-; SI-NEXT: v_mov_b32_e32 v40, s79
+; SI-NEXT: v_mov_b32_e32 v17, s55
+; SI-NEXT: v_mov_b32_e32 v15, s53
+; SI-NEXT: v_mov_b32_e32 v13, s51
+; SI-NEXT: v_mov_b32_e32 v11, s49
+; SI-NEXT: v_mov_b32_e32 v9, s39
+; SI-NEXT: v_mov_b32_e32 v7, s37
+; SI-NEXT: v_mov_b32_e32 v5, s35
+; SI-NEXT: v_mov_b32_e32 v2, s31
+; SI-NEXT: v_mov_b32_e32 v54, s66
+; SI-NEXT: v_mov_b32_e32 v35, s86
+; SI-NEXT: v_mov_b32_e32 v32, s84
+; SI-NEXT: v_mov_b32_e32 v30, s82
+; SI-NEXT: v_mov_b32_e32 v56, s96
+; SI-NEXT: v_mov_b32_e32 v47, s11
+; SI-NEXT: v_mov_b32_e32 v46, s7
+; SI-NEXT: v_mov_b32_e32 v45, s98
+; SI-NEXT: v_mov_b32_e32 v44, s68
+; SI-NEXT: v_mov_b32_e32 v41, s70
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s60
-; SI-NEXT: v_mov_b32_e32 v14, s62
-; SI-NEXT: v_mov_b32_e32 v16, s72
-; SI-NEXT: v_mov_b32_e32 v18, s74
+; SI-NEXT: v_mov_b32_e32 v12, s48
+; SI-NEXT: v_mov_b32_e32 v14, s50
+; SI-NEXT: v_mov_b32_e32 v16, s52
+; SI-NEXT: v_mov_b32_e32 v18, s54
; SI-NEXT: v_mov_b32_e32 v20, s28
; SI-NEXT: v_mov_b32_e32 v22, s26
; SI-NEXT: v_mov_b32_e32 v24, s24
; SI-NEXT: v_mov_b32_e32 v26, s22
-; SI-NEXT: v_mov_b32_e32 v28, s20
-; SI-NEXT: v_mov_b32_e32 v30, s18
-; SI-NEXT: s_mov_b32 s16, s46
-; SI-NEXT: v_readlane_b32 s56, v61, 32
-; SI-NEXT: v_readlane_b32 s42, v61, 28
-; SI-NEXT: v_readlane_b32 s60, v61, 26
-; SI-NEXT: v_readlane_b32 s44, v61, 24
-; SI-NEXT: v_readlane_b32 s62, v61, 22
-; SI-NEXT: v_readlane_b32 s72, v61, 20
-; SI-NEXT: v_readlane_b32 s74, v61, 18
-; SI-NEXT: v_readlane_b32 s76, v61, 16
-; SI-NEXT: v_readlane_b32 s78, v61, 14
-; SI-NEXT: v_readlane_b32 s28, v61, 12
-; SI-NEXT: v_readlane_b32 s26, v61, 10
-; SI-NEXT: s_mov_b32 s46, s92
-; SI-NEXT: v_readlane_b32 s92, v61, 8
-; SI-NEXT: v_readlane_b32 s24, v61, 6
-; SI-NEXT: v_readlane_b32 s22, v61, 4
-; SI-NEXT: v_readlane_b32 s20, v61, 2
-; SI-NEXT: v_readlane_b32 s18, v61, 0
-; SI-NEXT: v_mov_b32_e32 v31, s17
-; SI-NEXT: v_mov_b32_e32 v9, s59
-; SI-NEXT: v_readlane_b32 s47, v61, 35
-; SI-NEXT: v_readlane_b32 s57, v61, 33
-; SI-NEXT: v_readlane_b32 s43, v61, 29
-; SI-NEXT: v_readlane_b32 s61, v61, 27
-; SI-NEXT: v_readlane_b32 s45, v61, 25
-; SI-NEXT: v_readlane_b32 s63, v61, 23
-; SI-NEXT: v_readlane_b32 s73, v61, 21
-; SI-NEXT: v_readlane_b32 s75, v61, 19
-; SI-NEXT: v_readlane_b32 s77, v61, 17
-; SI-NEXT: v_readlane_b32 s79, v61, 15
-; SI-NEXT: v_readlane_b32 s29, v61, 13
-; SI-NEXT: v_readlane_b32 s27, v61, 11
-; SI-NEXT: v_readlane_b32 s93, v61, 9
-; SI-NEXT: v_readlane_b32 s25, v61, 7
-; SI-NEXT: v_readlane_b32 s23, v61, 5
-; SI-NEXT: v_readlane_b32 s21, v61, 3
-; SI-NEXT: v_readlane_b32 s19, v61, 1
+; SI-NEXT: v_mov_b32_e32 v29, s20
+; SI-NEXT: v_mov_b32_e32 v33, s18
+; SI-NEXT: v_readlane_b32 s30, v61, 24
+; SI-NEXT: v_readlane_b32 s34, v61, 22
+; SI-NEXT: v_readlane_b32 s36, v61, 20
+; SI-NEXT: v_readlane_b32 s38, v61, 18
+; SI-NEXT: v_readlane_b32 s48, v61, 16
+; SI-NEXT: v_readlane_b32 s50, v61, 14
+; SI-NEXT: v_readlane_b32 s52, v61, 12
+; SI-NEXT: v_readlane_b32 s54, v61, 10
+; SI-NEXT: s_mov_b32 s64, s76
+; SI-NEXT: s_mov_b32 s76, s6
+; SI-NEXT: s_mov_b32 s66, s58
+; SI-NEXT: s_mov_b32 s68, s60
+; SI-NEXT: s_mov_b32 s70, s78
+; SI-NEXT: s_mov_b32 s78, s10
+; SI-NEXT: s_mov_b32 s80, s88
+; SI-NEXT: s_mov_b32 s88, s14
+; SI-NEXT: s_mov_b32 s82, s90
+; SI-NEXT: s_mov_b32 s90, s16
+; SI-NEXT: s_mov_b32 s84, s92
+; SI-NEXT: s_mov_b32 s92, s4
+; SI-NEXT: s_mov_b32 s86, s94
+; SI-NEXT: s_mov_b32 s94, s74
+; SI-NEXT: s_mov_b32 s96, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s46
+; SI-NEXT: s_mov_b32 s98, s42
+; SI-NEXT: v_readlane_b32 s4, v61, 56
+; SI-NEXT: v_readlane_b32 s6, v61, 54
+; SI-NEXT: v_readlane_b32 s10, v61, 52
+; SI-NEXT: v_readlane_b32 s14, v61, 50
+; SI-NEXT: v_readlane_b32 s16, v61, 48
+; SI-NEXT: v_readlane_b32 s18, v61, 46
+; SI-NEXT: v_readlane_b32 s20, v61, 44
+; SI-NEXT: v_readlane_b32 s22, v61, 42
+; SI-NEXT: v_readlane_b32 s24, v61, 40
+; SI-NEXT: v_readlane_b32 s26, v61, 38
+; SI-NEXT: v_readlane_b32 s28, v61, 36
+; SI-NEXT: v_readlane_b32 s42, v61, 34
+; SI-NEXT: v_readlane_b32 s46, v61, 32
+; SI-NEXT: v_readlane_b32 s58, v61, 30
+; SI-NEXT: v_readlane_b32 s60, v61, 28
+; SI-NEXT: v_readlane_b32 s74, v61, 26
+; SI-NEXT: v_mov_b32_e32 v39, s83
+; SI-NEXT: v_mov_b32_e32 v37, s81
+; SI-NEXT: v_mov_b32_e32 v36, s71
+; SI-NEXT: v_mov_b32_e32 v28, s97
+; SI-NEXT: v_mov_b32_e32 v60, s87
+; SI-NEXT: v_mov_b32_e32 v59, s85
+; SI-NEXT: v_mov_b32_e32 v58, s99
+; SI-NEXT: v_mov_b32_e32 v57, s67
+; SI-NEXT: v_mov_b32_e32 v40, s69
+; SI-NEXT: v_readlane_b32 s31, v61, 25
+; SI-NEXT: v_readlane_b32 s35, v61, 23
+; SI-NEXT: v_readlane_b32 s37, v61, 21
+; SI-NEXT: v_readlane_b32 s39, v61, 19
+; SI-NEXT: v_readlane_b32 s49, v61, 17
+; SI-NEXT: v_readlane_b32 s51, v61, 15
+; SI-NEXT: v_readlane_b32 s53, v61, 13
+; SI-NEXT: v_readlane_b32 s55, v61, 11
+; SI-NEXT: v_readlane_b32 s5, v61, 57
+; SI-NEXT: v_readlane_b32 s7, v61, 55
+; SI-NEXT: v_readlane_b32 s11, v61, 53
+; SI-NEXT: v_readlane_b32 s15, v61, 51
+; SI-NEXT: v_readlane_b32 s17, v61, 49
+; SI-NEXT: v_readlane_b32 s19, v61, 47
+; SI-NEXT: v_readlane_b32 s21, v61, 45
+; SI-NEXT: v_readlane_b32 s23, v61, 43
+; SI-NEXT: v_readlane_b32 s25, v61, 41
+; SI-NEXT: v_readlane_b32 s27, v61, 39
+; SI-NEXT: v_readlane_b32 s29, v61, 37
+; SI-NEXT: v_readlane_b32 s43, v61, 35
+; SI-NEXT: v_readlane_b32 s47, v61, 33
+; SI-NEXT: v_readlane_b32 s59, v61, 31
+; SI-NEXT: v_readlane_b32 s61, v61, 29
+; SI-NEXT: v_readlane_b32 s75, v61, 27
; SI-NEXT: .LBB37_6: ; %end
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v35, 0xff, v35
-; SI-NEXT: s_lshl_b32 s5, s6, 8
-; SI-NEXT: v_or_b32_e32 v35, s5, v35
-; SI-NEXT: s_and_b32 s5, s14, 0xff
-; SI-NEXT: v_and_b32_e32 v29, 0xff, v29
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_and_b32_e32 v38, 0xff, v38
+; SI-NEXT: s_lshl_b32 s5, s98, 8
+; SI-NEXT: v_or_b32_e32 v38, s5, v38
+; SI-NEXT: s_and_b32 s5, s96, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s12, 24
-; SI-NEXT: v_or_b32_e32 v10, v29, v10
-; SI-NEXT: v_and_b32_e32 v29, 0xff, v52
-; SI-NEXT: v_and_b32_e32 v35, 0xffff, v35
+; SI-NEXT: s_lshl_b32 s7, s86, 24
+; SI-NEXT: v_and_b32_e32 v38, 0xffff, v38
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8
-; SI-NEXT: v_or_b32_e32 v35, s5, v35
-; SI-NEXT: v_and_b32_e32 v30, 0xff, v30
-; SI-NEXT: s_lshl_b32 s5, s10, 8
-; SI-NEXT: v_or_b32_e32 v8, v8, v29
+; SI-NEXT: v_and_b32_e32 v34, 0xff, v34
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v38, s5, v38
+; SI-NEXT: v_or_b32_e32 v10, v34, v10
+; SI-NEXT: v_and_b32_e32 v34, 0xff, v55
+; SI-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v54
+; SI-NEXT: v_or_b32_e32 v34, v38, v34
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v30, s5, v30
-; SI-NEXT: s_and_b32 s5, s8, 0xff
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s40, 24
-; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: v_or_b32_e32 v10, v10, v34
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v28
-; SI-NEXT: s_lshl_b32 s4, s4, 8
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_or_b32_e32 v8, s4, v8
-; SI-NEXT: s_and_b32 s4, s98, 0xff
-; SI-NEXT: v_or_b32_e32 v30, s5, v30
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s96, 24
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v8, s4, v8
-; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v33
+; SI-NEXT: s_lshl_b32 s5, s84, 8
+; SI-NEXT: v_or_b32_e32 v10, s5, v10
+; SI-NEXT: s_and_b32 s5, s82, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s80, 24
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v10, s5, v10
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v51
-; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v50
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v53
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
+; SI-NEXT: v_or_b32_e32 v10, v10, v31
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v26
-; SI-NEXT: s_lshl_b32 s4, s86, 8
-; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: s_and_b32 s4, s84, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s82, 24
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v29
+; SI-NEXT: s_lshl_b32 s5, s70, 8
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
+; SI-NEXT: s_and_b32 s5, s68, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s66, 24
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v49
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v52
; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v48
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v51
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v39
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
+; SI-NEXT: v_or_b32_e32 v4, v4, v8
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: buffer_store_dword v35, v0, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v31, 0xff, v31
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v55
-; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v24
-; SI-NEXT: s_lshl_b32 s4, s80, 8
-; SI-NEXT: v_or_b32_e32 v31, v31, v35
-; SI-NEXT: v_and_b32_e32 v35, 0xff, v54
-; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: s_and_b32 s4, s70, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v53
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s68, 24
-; SI-NEXT: v_or_b32_e32 v35, v53, v35
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v31, v31, v35
-; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4
-; SI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:8
-; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v26
+; SI-NEXT: s_lshl_b32 s5, s64, 8
+; SI-NEXT: v_or_b32_e32 v4, s5, v4
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s94, 24
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v4, s5, v4
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v50
+; SI-NEXT: v_or_b32_e32 v4, v4, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: s_lshl_b32 s4, s66, 8
-; SI-NEXT: s_lshl_b32 s5, s54, 24
+; SI-NEXT: s_lshl_b32 s5, s92, 8
+; SI-NEXT: s_lshl_b32 s7, s88, 24
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_readlane_b32 s99, v63, 33
; SI-NEXT: v_readlane_b32 s98, v63, 32
@@ -44136,8 +44490,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s67, v63, 17
; SI-NEXT: v_readlane_b32 s66, v63, 16
; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
-; SI-NEXT: v_readlane_b32 s54, v63, 12
; SI-NEXT: v_readlane_b32 s53, v63, 11
; SI-NEXT: v_readlane_b32 s51, v63, 9
; SI-NEXT: v_readlane_b32 s49, v63, 7
@@ -44146,262 +44500,283 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v2, v6, v2
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: v_or_b32_e32 v3, v6, v3
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v22
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s64, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v24
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s90, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
-; SI-NEXT: s_lshl_b32 s4, s52, 8
-; SI-NEXT: s_lshl_b32 s5, s48, 24
-; SI-NEXT: v_readlane_b32 s64, v63, 14
-; SI-NEXT: v_readlane_b32 s52, v63, 10
-; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v23
+; SI-NEXT: s_lshl_b32 s5, s78, 8
+; SI-NEXT: s_lshl_b32 s7, s54, 24
+; SI-NEXT: v_readlane_b32 s54, v63, 12
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v20
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s50, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v22
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s76, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
-; SI-NEXT: s_lshl_b32 s4, s18, 8
-; SI-NEXT: s_lshl_b32 s5, s36, 24
-; SI-NEXT: v_readlane_b32 s50, v63, 8
-; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v21
+; SI-NEXT: s_lshl_b32 s5, s52, 8
+; SI-NEXT: s_lshl_b32 s7, s48, 24
+; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: v_readlane_b32 s48, v63, 6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s38, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v20
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s50, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v17
-; SI-NEXT: s_lshl_b32 s4, s20, 8
-; SI-NEXT: s_lshl_b32 s5, s30, 24
-; SI-NEXT: v_readlane_b32 s30, v63, 34
-; SI-NEXT: v_readlane_b32 s31, v63, 35
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v19
+; SI-NEXT: s_lshl_b32 s5, s38, 8
+; SI-NEXT: s_lshl_b32 s7, s34, 24
+; SI-NEXT: v_readlane_b32 s50, v63, 8
; SI-NEXT: v_readlane_b32 s38, v63, 4
+; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v16
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s34, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v18
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s36, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:56
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
-; SI-NEXT: s_lshl_b32 s4, s22, 8
-; SI-NEXT: s_lshl_b32 s5, s94, 24
-; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v17
+; SI-NEXT: s_lshl_b32 s5, s30, 8
+; SI-NEXT: s_lshl_b32 s7, s60, 24
+; SI-NEXT: v_readlane_b32 s30, v63, 34
+; SI-NEXT: v_readlane_b32 s31, v63, 35
+; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v14
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v16
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s74, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:64
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v37
-; SI-NEXT: s_lshl_b32 s4, s24, 8
-; SI-NEXT: s_lshl_b32 s5, s92, 24
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v48
+; SI-NEXT: s_lshl_b32 s5, s58, 8
+; SI-NEXT: s_lshl_b32 s7, s42, 24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v38
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v49
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v12
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v14
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s46, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v36
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v34
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v39
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v37
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v33
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s4, s26, 8
-; SI-NEXT: s_lshl_b32 s5, s88, 24
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v32
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
+; SI-NEXT: s_lshl_b32 s5, s62, 8
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s56, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s44, 24
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v35
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v30
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:84
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_lshl_b32 s5, s72, 8
+; SI-NEXT: s_lshl_b32 s7, s28, 24
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v28
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v59
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s90, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s40, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v60
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s4, s28, 8
-; SI-NEXT: s_lshl_b32 s5, s76, 24
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_lshl_b32 s5, s26, 8
+; SI-NEXT: s_lshl_b32 s7, s22, 24
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v58
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v56
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s78, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s24, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v7
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v57
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s4, s74, 8
-; SI-NEXT: s_lshl_b32 s5, s62, 24
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: s_lshl_b32 s5, s20, 8
+; SI-NEXT: s_lshl_b32 s7, s16, 24
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v47
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s72, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s18, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v5
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v46
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v45
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s4, s44, 8
-; SI-NEXT: s_lshl_b32 s5, s42, 24
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_lshl_b32 s7, s10, 24
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v42
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s60, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: s_and_b32 s5, s12, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v3, s5, v3
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v44
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v43
@@ -44412,17 +44787,14 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: v_readlane_b32 s4, v61, 30
-; SI-NEXT: s_lshl_b32 s4, s4, 8
-; SI-NEXT: v_readlane_b32 s5, v61, 31
-; SI-NEXT: s_lshl_b32 s5, s16, 24
+; SI-NEXT: s_lshl_b32 s5, s8, 8
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s56, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: v_or_b32_e32 v2, s5, v2
+; SI-NEXT: s_and_b32 s5, s6, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_or_b32_e32 v2, s4, v2
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
@@ -44462,8 +44834,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -44534,145 +44906,145 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB37_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 57
-; VI-NEXT: s_lshr_b32 s46, s5, 16
+; VI-NEXT: s_lshr_b32 s46, s12, 16
; VI-NEXT: v_writelane_b32 v62, s46, 56
-; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: s_lshr_b32 s46, s12, 8
; VI-NEXT: v_writelane_b32 v62, s46, 55
-; VI-NEXT: s_lshr_b32 s46, s4, 16
+; VI-NEXT: s_lshr_b32 s46, s15, 24
; VI-NEXT: v_writelane_b32 v62, s46, 54
-; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: s_lshr_b32 s46, s15, 16
; VI-NEXT: v_writelane_b32 v62, s46, 53
-; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: s_lshr_b32 s46, s15, 8
; VI-NEXT: v_writelane_b32 v62, s46, 52
-; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s46, s14, 16
; VI-NEXT: v_writelane_b32 v62, s46, 51
-; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: s_lshr_b32 s46, s14, 8
; VI-NEXT: v_writelane_b32 v62, s46, 50
-; VI-NEXT: s_lshr_b32 s46, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s41, 24
; VI-NEXT: v_writelane_b32 v62, s46, 49
-; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: s_lshr_b32 s46, s41, 16
; VI-NEXT: v_writelane_b32 v62, s46, 48
-; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: s_lshr_b32 s46, s41, 8
; VI-NEXT: v_writelane_b32 v62, s46, 47
-; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: s_lshr_b32 s46, s40, 16
; VI-NEXT: v_writelane_b32 v62, s46, 46
-; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: s_lshr_b32 s46, s40, 8
; VI-NEXT: v_writelane_b32 v62, s46, 45
-; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: s_lshr_b32 s46, s43, 24
; VI-NEXT: v_writelane_b32 v62, s46, 44
-; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: s_lshr_b32 s46, s43, 16
; VI-NEXT: v_writelane_b32 v62, s46, 43
-; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: s_lshr_b32 s46, s43, 8
; VI-NEXT: v_writelane_b32 v62, s46, 42
-; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: s_lshr_b32 s46, s42, 16
; VI-NEXT: v_writelane_b32 v62, s46, 41
-; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: s_lshr_b32 s46, s42, 8
; VI-NEXT: v_writelane_b32 v62, s46, 40
-; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: s_lshr_b32 s46, s45, 24
; VI-NEXT: v_writelane_b32 v62, s46, 39
-; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: s_lshr_b32 s46, s45, 16
; VI-NEXT: v_writelane_b32 v62, s46, 38
-; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: s_lshr_b32 s46, s45, 8
; VI-NEXT: v_writelane_b32 v62, s46, 37
-; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: s_lshr_b32 s46, s44, 16
; VI-NEXT: v_writelane_b32 v62, s46, 36
-; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: s_lshr_b32 s46, s44, 8
; VI-NEXT: v_writelane_b32 v62, s46, 35
-; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: s_lshr_b32 s46, s29, 24
; VI-NEXT: v_writelane_b32 v62, s46, 34
-; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: s_lshr_b32 s46, s29, 16
; VI-NEXT: v_writelane_b32 v62, s46, 33
-; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: s_lshr_b32 s46, s29, 8
; VI-NEXT: v_writelane_b32 v62, s46, 32
-; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s46, s28, 16
; VI-NEXT: v_writelane_b32 v62, s46, 31
-; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: s_lshr_b32 s46, s28, 8
; VI-NEXT: v_writelane_b32 v62, s46, 30
-; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: s_lshr_b32 s46, s27, 24
; VI-NEXT: v_writelane_b32 v62, s46, 29
-; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: s_lshr_b32 s46, s27, 16
; VI-NEXT: v_writelane_b32 v62, s46, 28
-; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: s_lshr_b32 s46, s27, 8
; VI-NEXT: v_writelane_b32 v62, s46, 27
-; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: s_lshr_b32 s46, s26, 16
; VI-NEXT: v_writelane_b32 v62, s46, 26
-; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: s_lshr_b32 s46, s26, 8
; VI-NEXT: v_writelane_b32 v62, s46, 25
-; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 24
; VI-NEXT: v_writelane_b32 v62, s46, 24
-; VI-NEXT: s_lshr_b32 s46, s40, 8
+; VI-NEXT: s_lshr_b32 s46, s25, 16
; VI-NEXT: v_writelane_b32 v62, s46, 23
-; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: s_lshr_b32 s46, s25, 8
; VI-NEXT: v_writelane_b32 v62, s46, 22
-; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: s_lshr_b32 s46, s24, 16
; VI-NEXT: v_writelane_b32 v62, s46, 21
-; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: s_lshr_b32 s46, s24, 8
; VI-NEXT: v_writelane_b32 v62, s46, 20
-; VI-NEXT: s_lshr_b32 s46, s42, 16
+; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: v_writelane_b32 v62, s46, 19
-; VI-NEXT: s_lshr_b32 s46, s42, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v62, s46, 18
-; VI-NEXT: s_lshr_b32 s46, s45, 24
+; VI-NEXT: s_lshr_b32 s46, s23, 8
; VI-NEXT: v_writelane_b32 v62, s46, 17
-; VI-NEXT: s_lshr_b32 s46, s45, 16
+; VI-NEXT: s_lshr_b32 s46, s22, 16
; VI-NEXT: v_writelane_b32 v62, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s45, 8
+; VI-NEXT: s_lshr_b32 s46, s22, 8
; VI-NEXT: v_writelane_b32 v62, s46, 15
-; VI-NEXT: s_lshr_b32 s46, s44, 16
+; VI-NEXT: s_lshr_b32 s46, s21, 24
; VI-NEXT: v_writelane_b32 v62, s46, 14
-; VI-NEXT: s_lshr_b32 s46, s44, 8
+; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: v_writelane_b32 v62, s46, 13
-; VI-NEXT: s_lshr_b32 s46, s29, 24
+; VI-NEXT: s_lshr_b32 s46, s21, 8
; VI-NEXT: v_writelane_b32 v62, s46, 12
-; VI-NEXT: s_lshr_b32 s46, s29, 16
+; VI-NEXT: s_lshr_b32 s46, s20, 16
; VI-NEXT: v_writelane_b32 v62, s46, 11
-; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: s_lshr_b32 s46, s20, 8
; VI-NEXT: v_writelane_b32 v62, s46, 10
-; VI-NEXT: s_lshr_b32 s46, s28, 16
+; VI-NEXT: s_lshr_b32 s46, s19, 24
; VI-NEXT: v_writelane_b32 v62, s46, 9
-; VI-NEXT: s_lshr_b32 s46, s28, 8
+; VI-NEXT: s_lshr_b32 s46, s19, 16
; VI-NEXT: v_writelane_b32 v62, s46, 8
-; VI-NEXT: s_lshr_b32 s46, s27, 24
+; VI-NEXT: s_lshr_b32 s46, s19, 8
; VI-NEXT: v_writelane_b32 v62, s46, 7
-; VI-NEXT: s_lshr_b32 s46, s27, 16
+; VI-NEXT: s_lshr_b32 s46, s18, 16
; VI-NEXT: v_writelane_b32 v62, s46, 6
-; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: s_lshr_b32 s46, s18, 8
; VI-NEXT: v_writelane_b32 v62, s46, 5
-; VI-NEXT: s_lshr_b32 s46, s26, 16
+; VI-NEXT: s_lshr_b32 s46, s17, 24
; VI-NEXT: v_writelane_b32 v62, s46, 4
-; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: s_lshr_b32 s46, s17, 16
; VI-NEXT: v_writelane_b32 v62, s46, 3
-; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: s_lshr_b32 s46, s17, 8
; VI-NEXT: v_writelane_b32 v62, s46, 2
-; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: v_writelane_b32 v62, s46, 1
-; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: s_lshr_b32 s80, s25, 8
+; VI-NEXT: s_lshr_b32 s46, s16, 8
+; VI-NEXT: s_lshr_b32 s56, s9, 8
; VI-NEXT: v_writelane_b32 v62, s46, 0
-; VI-NEXT: s_lshr_b32 s81, s24, 8
-; VI-NEXT: s_lshr_b32 s82, s23, 24
-; VI-NEXT: s_lshr_b32 s83, s23, 16
-; VI-NEXT: s_lshr_b32 s85, s23, 8
-; VI-NEXT: s_lshr_b32 s84, s22, 16
-; VI-NEXT: s_lshr_b32 s86, s22, 8
-; VI-NEXT: s_lshr_b32 s87, s21, 24
-; VI-NEXT: s_lshr_b32 s50, s21, 16
-; VI-NEXT: s_lshr_b32 s52, s21, 8
-; VI-NEXT: s_lshr_b32 s51, s20, 16
-; VI-NEXT: s_lshr_b32 s53, s20, 8
-; VI-NEXT: s_lshr_b32 s54, s19, 24
-; VI-NEXT: s_lshr_b32 s55, s19, 16
-; VI-NEXT: s_lshr_b32 s65, s19, 8
-; VI-NEXT: s_lshr_b32 s64, s18, 16
-; VI-NEXT: s_lshr_b32 s66, s18, 8
-; VI-NEXT: s_lshr_b32 s67, s17, 24
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s70, s17, 8
-; VI-NEXT: s_lshr_b32 s69, s16, 16
-; VI-NEXT: s_lshr_b32 s71, s16, 8
; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; VI-NEXT: s_lshr_b32 s67, s5, 24
+; VI-NEXT: s_lshr_b32 s65, s5, 16
+; VI-NEXT: s_lshr_b32 s66, s5, 8
+; VI-NEXT: s_lshr_b32 s55, s4, 16
+; VI-NEXT: s_lshr_b32 s64, s4, 8
+; VI-NEXT: s_lshr_b32 s52, s7, 24
+; VI-NEXT: s_lshr_b32 s53, s7, 16
+; VI-NEXT: s_lshr_b32 s54, s7, 8
+; VI-NEXT: s_lshr_b32 s50, s6, 16
+; VI-NEXT: s_lshr_b32 s51, s6, 8
+; VI-NEXT: s_lshr_b32 s87, s9, 24
+; VI-NEXT: s_lshr_b32 s86, s9, 16
+; VI-NEXT: s_lshr_b32 s84, s8, 16
+; VI-NEXT: s_lshr_b32 s85, s8, 8
+; VI-NEXT: s_lshr_b32 s81, s11, 24
+; VI-NEXT: s_lshr_b32 s82, s11, 16
+; VI-NEXT: s_lshr_b32 s83, s11, 8
+; VI-NEXT: s_lshr_b32 s71, s10, 16
+; VI-NEXT: s_lshr_b32 s80, s10, 8
+; VI-NEXT: s_lshr_b32 s70, s13, 24
+; VI-NEXT: s_lshr_b32 s68, s13, 16
+; VI-NEXT: s_lshr_b32 s69, s13, 8
+; VI-NEXT: s_mov_b32 s47, s56
; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -44696,38 +45068,39 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr70
; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr67
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr86
-; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr85
+; VI-NEXT: ; implicit-def: $sgpr70
+; VI-NEXT: ; implicit-def: $sgpr80
+; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr83
; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr90
-; VI-NEXT: ; implicit-def: $sgpr88
-; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr74
+; VI-NEXT: ; implicit-def: $sgpr85
+; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr87
+; VI-NEXT: ; implicit-def: $sgpr51
+; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr54
+; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr66
+; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr36
+; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $vcc_lo
+; VI-NEXT: ; implicit-def: $sgpr90
+; VI-NEXT: ; implicit-def: $sgpr88
+; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr76
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr72
; VI-NEXT: ; implicit-def: $sgpr62
; VI-NEXT: ; implicit-def: $sgpr60
@@ -44844,12 +45217,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: .LBB37_3: ; %Flow
; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
+; VI-NEXT: s_cselect_b32 s57, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s57, 1
; VI-NEXT: s_cbranch_scc1 .LBB37_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_add_f32_e64 v2, s5, 1.0
@@ -44887,67 +45258,72 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
; VI-NEXT: v_add_f32_e64 v22, s43, 1.0
; VI-NEXT: v_add_f32_e64 v21, s42, 1.0
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22]
; VI-NEXT: v_add_f32_e64 v24, s45, 1.0
; VI-NEXT: v_add_f32_e64 v23, s44, 1.0
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24]
; VI-NEXT: v_add_f32_e64 v26, s29, 1.0
; VI-NEXT: v_add_f32_e64 v25, s28, 1.0
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26]
+; VI-NEXT: v_add_f32_e64 v28, s27, 1.0
+; VI-NEXT: v_add_f32_e64 v27, s26, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28]
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v2
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v2
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v2
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v1
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v1
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v4
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v4
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v4
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v3
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v3
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v6
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v6
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v5
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v5
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v5
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v8
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v8
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v8
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v8
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v7
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v7
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v7
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v10
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v9
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v9
@@ -44969,7 +45345,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v22
@@ -44977,279 +45353,293 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v22
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v22
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v21
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v21
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v21
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v24
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v24
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v24
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v26
-; VI-NEXT: v_add_f32_e64 v34, s21, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v26
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v28
; VI-NEXT: v_add_f32_e64 v32, s23, 1.0
; VI-NEXT: v_add_f32_e64 v31, s22, 1.0
-; VI-NEXT: v_add_f32_e64 v28, s27, 1.0
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v26
+; VI-NEXT: v_add_f32_e64 v30, s25, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v28
+; VI-NEXT: v_add_f32_e64 v34, s21, 1.0
; VI-NEXT: v_add_f32_e64 v33, s20, 1.0
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v28
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v34
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v30
; VI-NEXT: v_add_f32_e64 v38, s17, 1.0
; VI-NEXT: v_add_f32_e64 v36, s19, 1.0
; VI-NEXT: v_add_f32_e64 v35, s18, 1.0
-; VI-NEXT: v_add_f32_e64 v30, s25, 1.0
-; VI-NEXT: v_add_f32_e64 v27, s26, 1.0
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v28
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v34
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v30
; VI-NEXT: v_add_f32_e64 v37, s16, 1.0
; VI-NEXT: v_add_f32_e64 v29, s24, 1.0
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[35:36]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v30
-; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v32
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v34
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v36
-; VI-NEXT: v_lshrrev_b32_e32 v19, 24, v38
+; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v38
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[37:38]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v30
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v32
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v32
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v34
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v36
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v38
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v26
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v27
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v29
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v31
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v31
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v34
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v38
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v23
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v25
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v27
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v30
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v29
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v31
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v31
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v34
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v33
; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v33
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v36
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v35
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v35
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v38
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v37
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v36
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v35
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v37
; VI-NEXT: s_branch .LBB37_6
; VI-NEXT: .LBB37_5:
-; VI-NEXT: v_mov_b32_e32 v53, s46
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s56
-; VI-NEXT: v_mov_b32_e32 v15, s68
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s67
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s55
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s54
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s50
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s87
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s83
; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s82
; VI-NEXT: v_readlane_b32 s4, v62, 0
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v15, s4
+; VI-NEXT: v_mov_b32_e32 v19, s4
; VI-NEXT: v_readlane_b32 s4, v62, 1
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v20, s4
; VI-NEXT: v_readlane_b32 s4, v62, 2
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 3
-; VI-NEXT: v_mov_b32_e32 v57, s4
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 4
-; VI-NEXT: v_mov_b32_e32 v58, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 5
-; VI-NEXT: v_mov_b32_e32 v56, s4
+; VI-NEXT: v_mov_b32_e32 v53, s4
; VI-NEXT: v_readlane_b32 s4, v62, 6
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 7
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v52, s4
; VI-NEXT: v_readlane_b32 s4, v62, 8
-; VI-NEXT: v_mov_b32_e32 v46, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 9
-; VI-NEXT: v_mov_b32_e32 v47, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 10
-; VI-NEXT: v_mov_b32_e32 v45, s4
+; VI-NEXT: v_mov_b32_e32 v50, s4
; VI-NEXT: v_readlane_b32 s4, v62, 11
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v51, s4
; VI-NEXT: v_readlane_b32 s4, v62, 12
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: v_readlane_b32 s4, v62, 13
-; VI-NEXT: v_mov_b32_e32 v43, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 14
-; VI-NEXT: v_mov_b32_e32 v44, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 15
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v61, s4
; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v60, s4
; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v48, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v59, s4
; VI-NEXT: v_readlane_b32 s4, v62, 22
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v58, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s58
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v56, s4
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v57, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v47, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v45, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v46, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v44, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v49, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v55, s4
+; VI-NEXT: v_mov_b32_e32 v54, s46
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s56
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s58
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 47
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s60
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s60
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 57
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s69
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s68
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s70
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s80
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s71
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s83
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s82
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s81
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s85
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s62
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s84
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s47
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s86
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s87
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s51
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s50
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s54
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s53
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s52
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s64
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s55
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s66
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s72
+; VI-NEXT: v_mov_b32_e32 v39, s65
; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v39, s67
; VI-NEXT: v_mov_b32_e32 v37, s16
; VI-NEXT: v_mov_b32_e32 v38, s17
; VI-NEXT: v_mov_b32_e32 v35, s18
@@ -45272,6 +45662,9 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_mov_b32_e32 v14, s41
; VI-NEXT: v_mov_b32_e32 v11, s14
; VI-NEXT: v_mov_b32_e32 v12, s15
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s74
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_mov_b32_e32 v10, s13
; VI-NEXT: v_mov_b32_e32 v7, s10
@@ -45281,75 +45674,55 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_mov_b32_e32 v3, s6
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_mov_b32_e32 v2, s5
-; VI-NEXT: v_mov_b32_e32 v20, s71
-; VI-NEXT: v_mov_b32_e32 v55, s69
-; VI-NEXT: v_mov_b32_e32 v19, s70
-; VI-NEXT: v_mov_b32_e32 v18, s66
-; VI-NEXT: v_mov_b32_e32 v52, s64
-; VI-NEXT: v_mov_b32_e32 v17, s65
-; VI-NEXT: v_mov_b32_e32 v50, s53
-; VI-NEXT: v_mov_b32_e32 v51, s51
-; VI-NEXT: v_mov_b32_e32 v61, s52
-; VI-NEXT: v_mov_b32_e32 v60, s86
-; VI-NEXT: v_mov_b32_e32 v16, s84
-; VI-NEXT: v_mov_b32_e32 v49, s85
-; VI-NEXT: v_mov_b32_e32 v59, s81
-; VI-NEXT: v_mov_b32_e32 v48, s80
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s30
; VI-NEXT: v_mov_b32_e32 v40, s34
; VI-NEXT: v_mov_b32_e32 v41, s36
; VI-NEXT: v_mov_b32_e32 v42, s38
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s62
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s72
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s74
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s76
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s78
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s88
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s90
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s76
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s78
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s88
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, s90
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v54, vcc_lo
; VI-NEXT: .LBB37_6: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v17, v36, v17, s4
-; VI-NEXT: v_perm_b32 v32, v32, v49, s4
-; VI-NEXT: v_perm_b32 v36, v15, v54, s4
-; VI-NEXT: v_perm_b32 v30, v30, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v16, v16, v39, s4
+; VI-NEXT: v_perm_b32 v19, v37, v19, s4
+; VI-NEXT: v_perm_b32 v37, v51, v40, s4
; VI-NEXT: v_perm_b32 v33, v33, v50, s4
-; VI-NEXT: v_perm_b32 v18, v35, v18, s4
-; VI-NEXT: v_perm_b32 v35, v51, v40, s4
-; VI-NEXT: v_perm_b32 v55, v55, v42, s4
-; VI-NEXT: v_perm_b32 v20, v37, v20, s4
-; VI-NEXT: v_perm_b32 v19, v38, v19, s4
-; VI-NEXT: v_perm_b32 v37, v52, v41, s4
-; VI-NEXT: v_perm_b32 v34, v34, v61, s4
-; VI-NEXT: v_perm_b32 v31, v31, v60, s4
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v16, v31, v16
-; VI-NEXT: v_perm_b32 v29, v29, v59, s4
-; VI-NEXT: v_perm_b32 v38, v58, v53, s4
-; VI-NEXT: v_perm_b32 v27, v27, v57, s4
-; VI-NEXT: v_perm_b32 v28, v28, v56, s4
-; VI-NEXT: v_perm_b32 v25, v25, v46, s4
-; VI-NEXT: v_perm_b32 v26, v26, v45, s4
-; VI-NEXT: v_perm_b32 v23, v23, v43, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v34, v16, s4
+; VI-NEXT: v_perm_b32 v34, v61, v39, s4
+; VI-NEXT: v_perm_b32 v29, v29, v48, s4
+; VI-NEXT: v_perm_b32 v36, v36, v52, s4
+; VI-NEXT: v_perm_b32 v31, v31, v15, s4
+; VI-NEXT: v_perm_b32 v23, v23, v49, s4
+; VI-NEXT: v_perm_b32 v20, v20, v42, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_e32 v19, v19, v20
+; VI-NEXT: v_perm_b32 v17, v17, v41, s4
+; VI-NEXT: v_perm_b32 v18, v38, v18, s4
+; VI-NEXT: v_perm_b32 v35, v35, v53, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v35, v17
+; VI-NEXT: v_perm_b32 v32, v32, v60, s4
+; VI-NEXT: v_perm_b32 v38, v59, v54, s4
+; VI-NEXT: v_perm_b32 v30, v30, v58, s4
+; VI-NEXT: v_perm_b32 v27, v27, v56, s4
+; VI-NEXT: v_perm_b32 v28, v28, v47, s4
+; VI-NEXT: v_perm_b32 v25, v25, v45, s4
+; VI-NEXT: v_perm_b32 v26, v26, v44, s4
+; VI-NEXT: v_perm_b32 v24, v24, v55, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -45382,100 +45755,100 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v39, v47, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v24, v24, v15, s4
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v39, v57, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v46, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_perm_b32 v48, v44, v48, s4
+; VI-NEXT: v_perm_b32 v50, v43, v50, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v49, v15, v49, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v49, v15, v51, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v21, v21, v15, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v22, v22, v15, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v55
-; VI-NEXT: v_or_b32_e32 v20, v20, v50
-; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v15, v15, v51, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v20, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_e32 v19, v19, v20
-; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v37
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v19, v19, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; VI-NEXT: v_or_b32_e32 v18, v18, v19
-; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v19, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_or_b32_e32 v17, v17, v18
+; VI-NEXT: v_perm_b32 v17, v17, v18, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v36, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v35
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v37
; VI-NEXT: v_or_b32_e32 v17, v33, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v17, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_or_b32_e32 v17, v34, v17
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v16, v16, v17
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v34
+; VI-NEXT: v_or_b32_e32 v16, v31, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; VI-NEXT: v_or_b32_e32 v16, v32, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v38
; VI-NEXT: v_or_b32_e32 v16, v29, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; VI-NEXT: v_or_b32_e32 v16, v30, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
; VI-NEXT: v_or_b32_e32 v16, v27, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; VI-NEXT: v_or_b32_e32 v16, v28, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
; VI-NEXT: v_or_b32_e32 v16, v25, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; VI-NEXT: v_or_b32_e32 v16, v26, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v50
; VI-NEXT: v_or_b32_e32 v16, v23, v16
; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
@@ -45542,95 +45915,95 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; VI-NEXT: v_or_b32_e32 v9, v9, v11
; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v10, v9, s4
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v10, v11, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v7, v9, s4
; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v10, v9, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v8, v7, s4
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v8, v8, v9, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v5, v7, s4
; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v8, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v6, v5, s4
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v6, v6, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v3, v5, s4
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v6, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v4, v4, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -45651,8 +46024,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -45661,8 +46034,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -45737,137 +46110,137 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB37_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 49
-; GFX9-NEXT: s_lshr_b32 s46, s5, 16
+; GFX9-NEXT: s_lshr_b32 s46, s41, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 48
-; GFX9-NEXT: s_lshr_b32 s46, s5, 8
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 47
-; GFX9-NEXT: s_lshr_b32 s46, s4, 16
+; GFX9-NEXT: s_lshr_b32 s46, s40, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 46
-; GFX9-NEXT: s_lshr_b32 s46, s4, 8
+; GFX9-NEXT: s_lshr_b32 s46, s40, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 45
-; GFX9-NEXT: s_lshr_b32 s46, s7, 24
+; GFX9-NEXT: s_lshr_b32 s46, s43, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 44
-; GFX9-NEXT: s_lshr_b32 s46, s7, 16
+; GFX9-NEXT: s_lshr_b32 s46, s43, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 43
-; GFX9-NEXT: s_lshr_b32 s46, s7, 8
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 42
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
+; GFX9-NEXT: s_lshr_b32 s46, s42, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 41
-; GFX9-NEXT: s_lshr_b32 s46, s6, 8
+; GFX9-NEXT: s_lshr_b32 s46, s42, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 40
-; GFX9-NEXT: s_lshr_b32 s46, s9, 24
+; GFX9-NEXT: s_lshr_b32 s46, s45, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 39
-; GFX9-NEXT: s_lshr_b32 s46, s9, 16
+; GFX9-NEXT: s_lshr_b32 s46, s45, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 38
-; GFX9-NEXT: s_lshr_b32 s46, s9, 8
+; GFX9-NEXT: s_lshr_b32 s46, s45, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 37
-; GFX9-NEXT: s_lshr_b32 s46, s8, 16
+; GFX9-NEXT: s_lshr_b32 s46, s44, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 36
-; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: s_lshr_b32 s46, s44, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 35
-; GFX9-NEXT: s_lshr_b32 s46, s11, 24
+; GFX9-NEXT: s_lshr_b32 s46, s29, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 34
-; GFX9-NEXT: s_lshr_b32 s46, s11, 16
+; GFX9-NEXT: s_lshr_b32 s46, s29, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 33
-; GFX9-NEXT: s_lshr_b32 s46, s11, 8
+; GFX9-NEXT: s_lshr_b32 s46, s29, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 32
-; GFX9-NEXT: s_lshr_b32 s46, s10, 16
+; GFX9-NEXT: s_lshr_b32 s46, s28, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 31
-; GFX9-NEXT: s_lshr_b32 s46, s10, 8
+; GFX9-NEXT: s_lshr_b32 s46, s28, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 30
-; GFX9-NEXT: s_lshr_b32 s46, s13, 24
+; GFX9-NEXT: s_lshr_b32 s46, s27, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 29
-; GFX9-NEXT: s_lshr_b32 s46, s13, 16
+; GFX9-NEXT: s_lshr_b32 s46, s27, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 28
-; GFX9-NEXT: s_lshr_b32 s46, s13, 8
+; GFX9-NEXT: s_lshr_b32 s46, s27, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 27
-; GFX9-NEXT: s_lshr_b32 s46, s12, 16
+; GFX9-NEXT: s_lshr_b32 s46, s26, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 26
-; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: s_lshr_b32 s46, s26, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 25
-; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: s_lshr_b32 s46, s25, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 24
-; GFX9-NEXT: s_lshr_b32 s46, s15, 16
+; GFX9-NEXT: s_lshr_b32 s46, s25, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 23
-; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: s_lshr_b32 s46, s25, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 22
-; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: s_lshr_b32 s46, s24, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 21
-; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: s_lshr_b32 s46, s24, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 20
-; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: s_lshr_b32 s46, s23, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 19
-; GFX9-NEXT: s_lshr_b32 s46, s41, 16
+; GFX9-NEXT: s_lshr_b32 s46, s23, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 18
-; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: s_lshr_b32 s46, s23, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 17
-; GFX9-NEXT: s_lshr_b32 s46, s40, 16
+; GFX9-NEXT: s_lshr_b32 s46, s22, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 16
-; GFX9-NEXT: s_lshr_b32 s46, s40, 8
+; GFX9-NEXT: s_lshr_b32 s46, s22, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 15
-; GFX9-NEXT: s_lshr_b32 s46, s43, 24
+; GFX9-NEXT: s_lshr_b32 s46, s21, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 14
-; GFX9-NEXT: s_lshr_b32 s46, s43, 16
+; GFX9-NEXT: s_lshr_b32 s46, s21, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 13
-; GFX9-NEXT: s_lshr_b32 s46, s43, 8
+; GFX9-NEXT: s_lshr_b32 s46, s21, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 12
-; GFX9-NEXT: s_lshr_b32 s46, s42, 16
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 11
-; GFX9-NEXT: s_lshr_b32 s46, s42, 8
+; GFX9-NEXT: s_lshr_b32 s46, s20, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 10
-; GFX9-NEXT: s_lshr_b32 s46, s45, 24
+; GFX9-NEXT: s_lshr_b32 s46, s19, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 9
-; GFX9-NEXT: s_lshr_b32 s46, s45, 16
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 8
-; GFX9-NEXT: s_lshr_b32 s46, s45, 8
+; GFX9-NEXT: s_lshr_b32 s46, s19, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 7
-; GFX9-NEXT: s_lshr_b32 s46, s44, 16
+; GFX9-NEXT: s_lshr_b32 s46, s18, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 6
-; GFX9-NEXT: s_lshr_b32 s46, s44, 8
+; GFX9-NEXT: s_lshr_b32 s46, s18, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 5
-; GFX9-NEXT: s_lshr_b32 s46, s29, 24
+; GFX9-NEXT: s_lshr_b32 s46, s17, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 4
-; GFX9-NEXT: s_lshr_b32 s46, s29, 16
+; GFX9-NEXT: s_lshr_b32 s46, s17, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 3
-; GFX9-NEXT: s_lshr_b32 s46, s29, 8
+; GFX9-NEXT: s_lshr_b32 s46, s17, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 2
-; GFX9-NEXT: s_lshr_b32 s46, s28, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 1
-; GFX9-NEXT: s_lshr_b32 s46, s28, 8
+; GFX9-NEXT: s_lshr_b32 s46, s16, 8
+; GFX9-NEXT: s_lshr_b32 s56, s10, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 0
-; GFX9-NEXT: s_lshr_b32 s82, s27, 24
-; GFX9-NEXT: s_lshr_b32 s83, s27, 16
-; GFX9-NEXT: s_lshr_b32 s85, s27, 8
-; GFX9-NEXT: s_lshr_b32 s84, s26, 16
-; GFX9-NEXT: s_lshr_b32 s86, s26, 8
-; GFX9-NEXT: s_lshr_b32 s87, s25, 24
-; GFX9-NEXT: s_lshr_b32 s96, s25, 16
-; GFX9-NEXT: s_lshr_b32 s98, s25, 8
-; GFX9-NEXT: s_lshr_b32 s97, s24, 16
-; GFX9-NEXT: s_lshr_b32 s99, s24, 8
-; GFX9-NEXT: s_lshr_b32 s38, s23, 24
-; GFX9-NEXT: s_lshr_b32 s39, s23, 16
-; GFX9-NEXT: s_lshr_b32 s49, s23, 8
-; GFX9-NEXT: s_lshr_b32 s48, s22, 16
-; GFX9-NEXT: s_lshr_b32 s50, s22, 8
-; GFX9-NEXT: s_lshr_b32 s51, s21, 24
-; GFX9-NEXT: s_lshr_b32 s52, s21, 16
-; GFX9-NEXT: s_lshr_b32 s54, s21, 8
-; GFX9-NEXT: s_lshr_b32 s53, s20, 16
-; GFX9-NEXT: s_lshr_b32 s55, s20, 8
-; GFX9-NEXT: s_lshr_b32 s64, s19, 24
-; GFX9-NEXT: s_lshr_b32 s65, s19, 16
-; GFX9-NEXT: s_lshr_b32 s67, s19, 8
-; GFX9-NEXT: s_lshr_b32 s66, s18, 16
-; GFX9-NEXT: s_lshr_b32 s68, s18, 8
-; GFX9-NEXT: s_lshr_b32 s69, s17, 24
-; GFX9-NEXT: s_lshr_b32 s70, s17, 16
-; GFX9-NEXT: s_lshr_b32 s80, s17, 8
-; GFX9-NEXT: s_lshr_b32 s71, s16, 16
-; GFX9-NEXT: s_lshr_b32 s81, s16, 8
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s70, s5, 24
+; GFX9-NEXT: s_lshr_b32 s68, s5, 16
+; GFX9-NEXT: s_lshr_b32 s69, s5, 8
+; GFX9-NEXT: s_lshr_b32 s66, s4, 16
+; GFX9-NEXT: s_lshr_b32 s67, s4, 8
+; GFX9-NEXT: s_lshr_b32 s55, s7, 24
+; GFX9-NEXT: s_lshr_b32 s64, s7, 16
+; GFX9-NEXT: s_lshr_b32 s65, s7, 8
+; GFX9-NEXT: s_lshr_b32 s53, s6, 16
+; GFX9-NEXT: s_lshr_b32 s54, s6, 8
+; GFX9-NEXT: s_lshr_b32 s52, s9, 24
+; GFX9-NEXT: s_lshr_b32 s50, s9, 16
+; GFX9-NEXT: s_lshr_b32 s51, s9, 8
+; GFX9-NEXT: s_lshr_b32 s48, s8, 16
+; GFX9-NEXT: s_lshr_b32 s49, s8, 8
+; GFX9-NEXT: s_lshr_b32 s99, s11, 24
+; GFX9-NEXT: s_lshr_b32 s38, s11, 16
+; GFX9-NEXT: s_lshr_b32 s39, s11, 8
+; GFX9-NEXT: s_lshr_b32 s98, s10, 16
+; GFX9-NEXT: s_lshr_b32 s97, s13, 24
+; GFX9-NEXT: s_lshr_b32 s87, s13, 16
+; GFX9-NEXT: s_lshr_b32 s96, s13, 8
+; GFX9-NEXT: s_lshr_b32 s85, s12, 16
+; GFX9-NEXT: s_lshr_b32 s86, s12, 8
+; GFX9-NEXT: s_lshr_b32 s82, s15, 24
+; GFX9-NEXT: s_lshr_b32 s83, s15, 16
+; GFX9-NEXT: s_lshr_b32 s84, s15, 8
+; GFX9-NEXT: s_lshr_b32 s80, s14, 16
+; GFX9-NEXT: s_lshr_b32 s81, s14, 8
+; GFX9-NEXT: s_lshr_b32 s71, s41, 24
+; GFX9-NEXT: s_mov_b32 s47, s56
; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -45891,36 +46264,37 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr81
; GFX9-NEXT: ; implicit-def: $sgpr71
+; GFX9-NEXT: ; implicit-def: $sgpr81
; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr69
-; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr66
-; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr65
-; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr51
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr86
; GFX9-NEXT: ; implicit-def: $sgpr84
-; GFX9-NEXT: ; implicit-def: $sgpr85
; GFX9-NEXT: ; implicit-def: $sgpr83
; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr86
+; GFX9-NEXT: ; implicit-def: $sgpr85
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr97
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr98
+; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr99
+; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr53
+; GFX9-NEXT: ; implicit-def: $sgpr65
+; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr67
+; GFX9-NEXT: ; implicit-def: $sgpr66
+; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr68
+; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $vcc_lo
@@ -46031,12 +46405,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB37_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
+; GFX9-NEXT: s_cselect_b32 s57, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s57, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB37_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_add_f32_e64 v2, s5, 1.0
@@ -46044,402 +46416,459 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
; GFX9-NEXT: v_add_f32_e64 v4, s7, 1.0
; GFX9-NEXT: v_add_f32_e64 v3, s6, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
; GFX9-NEXT: v_add_f32_e64 v6, s9, 1.0
; GFX9-NEXT: v_add_f32_e64 v5, s8, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6]
; GFX9-NEXT: v_add_f32_e64 v8, s11, 1.0
; GFX9-NEXT: v_add_f32_e64 v7, s10, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
; GFX9-NEXT: v_add_f32_e64 v10, s13, 1.0
; GFX9-NEXT: v_add_f32_e64 v9, s12, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
; GFX9-NEXT: v_add_f32_e64 v12, s15, 1.0
; GFX9-NEXT: v_add_f32_e64 v11, s14, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
; GFX9-NEXT: v_add_f32_e64 v14, s41, 1.0
; GFX9-NEXT: v_add_f32_e64 v13, s40, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
; GFX9-NEXT: v_add_f32_e64 v22, s43, 1.0
; GFX9-NEXT: v_add_f32_e64 v21, s42, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22]
; GFX9-NEXT: v_add_f32_e64 v24, s45, 1.0
; GFX9-NEXT: v_add_f32_e64 v23, s44, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24]
; GFX9-NEXT: v_add_f32_e64 v26, s29, 1.0
; GFX9-NEXT: v_add_f32_e64 v25, s28, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26]
+; GFX9-NEXT: v_add_f32_e64 v28, s27, 1.0
+; GFX9-NEXT: v_add_f32_e64 v27, s26, 1.0
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28]
+; GFX9-NEXT: v_add_f32_e64 v30, s25, 1.0
+; GFX9-NEXT: v_add_f32_e64 v29, s24, 1.0
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v1
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v1
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v3
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v5
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v5
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v5
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v9
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v22
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v22
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v21
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v21
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26
-; GFX9-NEXT: v_add_f32_e64 v28, s27, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28
+; GFX9-NEXT: v_add_f32_e64 v38, s19, 1.0
; GFX9-NEXT: v_add_f32_e64 v32, s23, 1.0
; GFX9-NEXT: v_add_f32_e64 v31, s22, 1.0
-; GFX9-NEXT: v_add_f32_e64 v30, s25, 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28
; GFX9-NEXT: v_add_f32_e64 v34, s21, 1.0
; GFX9-NEXT: v_add_f32_e64 v33, s20, 1.0
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v38
; GFX9-NEXT: v_add_f32_e64 v49, s17, 1.0
-; GFX9-NEXT: v_add_f32_e64 v36, s19, 1.0
-; GFX9-NEXT: v_add_f32_e64 v35, s18, 1.0
-; GFX9-NEXT: v_add_f32_e64 v27, s26, 1.0
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e64 v37, s18, 1.0
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[33:34]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
; GFX9-NEXT: v_add_f32_e64 v48, s16, 1.0
-; GFX9-NEXT: v_add_f32_e64 v29, s24, 1.0
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[35:36]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[37:38]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 24, v49
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
-; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[48:49]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v49
+; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v34
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v36
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v28
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v29
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v31
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v29
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v31
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v31
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v33
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v35
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v37
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v48
; GFX9-NEXT: s_branch .LBB37_6
; GFX9-NEXT: .LBB37_5:
-; GFX9-NEXT: v_mov_b32_e32 v53, s46
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s56
; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: v_mov_b32_e32 v39, s96
; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s87
-; GFX9-NEXT: v_mov_b32_e32 v46, s4
+; GFX9-NEXT: v_mov_b32_e32 v50, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s83
-; GFX9-NEXT: v_mov_b32_e32 v47, s4
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s82
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: v_mov_b32_e32 v43, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: v_mov_b32_e32 v44, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 7
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v61, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v52, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v60, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v35, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v57, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s58
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v56, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v36, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: v_mov_b32_e32 v15, s70
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s69
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s65
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s64
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s60
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s52
-; GFX9-NEXT: v_mov_b32_e32 v37, s39
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s51
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v37, s38
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s71
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s81
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s80
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s84
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s83
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s82
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s86
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s85
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s96
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s87
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s97
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s47
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s98
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s39
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s38
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s99
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s49
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s48
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s51
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s50
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s52
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s54
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s53
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s65
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s64
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s55
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s67
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s66
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s69
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s68
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s70
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s46
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s56
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s58
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s60
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s62
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s72
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s74
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s76
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s78
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s88
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s90
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v40, s92
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v48, s16
; GFX9-NEXT: v_mov_b32_e32 v49, s17
-; GFX9-NEXT: v_mov_b32_e32 v35, s18
-; GFX9-NEXT: v_mov_b32_e32 v36, s19
+; GFX9-NEXT: v_mov_b32_e32 v37, s18
+; GFX9-NEXT: v_mov_b32_e32 v38, s19
; GFX9-NEXT: v_mov_b32_e32 v33, s20
; GFX9-NEXT: v_mov_b32_e32 v34, s21
; GFX9-NEXT: v_mov_b32_e32 v31, s22
@@ -46467,88 +46896,38 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v3, s6
; GFX9-NEXT: v_mov_b32_e32 v4, s7
; GFX9-NEXT: v_mov_b32_e32 v2, s5
-; GFX9-NEXT: v_mov_b32_e32 v20, s81
-; GFX9-NEXT: v_mov_b32_e32 v55, s71
-; GFX9-NEXT: v_mov_b32_e32 v19, s80
-; GFX9-NEXT: v_mov_b32_e32 v18, s68
-; GFX9-NEXT: v_mov_b32_e32 v52, s66
-; GFX9-NEXT: v_mov_b32_e32 v17, s67
-; GFX9-NEXT: v_mov_b32_e32 v61, s55
-; GFX9-NEXT: v_mov_b32_e32 v51, s53
-; GFX9-NEXT: v_mov_b32_e32 v16, s54
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v60, s50
-; GFX9-NEXT: v_mov_b32_e32 v50, s48
-; GFX9-NEXT: v_mov_b32_e32 v15, s49
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v37, s99
-; GFX9-NEXT: v_mov_b32_e32 v59, s97
-; GFX9-NEXT: v_mov_b32_e32 v38, s98
-; GFX9-NEXT: v_mov_b32_e32 v57, s86
-; GFX9-NEXT: v_mov_b32_e32 v58, s84
-; GFX9-NEXT: v_mov_b32_e32 v56, s85
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v39, s94
-; GFX9-NEXT: v_mov_b32_e32 v40, vcc_lo
-; GFX9-NEXT: v_mov_b32_e32 v41, s30
-; GFX9-NEXT: v_mov_b32_e32 v42, s34
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s62
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s72
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s74
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s76
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s78
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s88
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v53, s90
-; GFX9-NEXT: v_mov_b32_e32 v54, s92
+; GFX9-NEXT: v_mov_b32_e32 v40, s94
+; GFX9-NEXT: v_mov_b32_e32 v41, vcc_lo
+; GFX9-NEXT: v_mov_b32_e32 v42, s30
+; GFX9-NEXT: v_mov_b32_e32 v43, s34
; GFX9-NEXT: .LBB37_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v19, v49, v19, s4
-; GFX9-NEXT: v_perm_b32 v16, v34, v16, s4
-; GFX9-NEXT: v_perm_b32 v34, v50, v39, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v30, v30, v38, s4
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v18, v35, v18, s4
-; GFX9-NEXT: v_perm_b32 v35, v51, v40, s4
-; GFX9-NEXT: v_perm_b32 v55, v55, v42, s4
-; GFX9-NEXT: v_perm_b32 v20, v48, v20, s4
-; GFX9-NEXT: v_perm_b32 v48, v52, v41, s4
-; GFX9-NEXT: v_perm_b32 v17, v36, v17, s4
+; GFX9-NEXT: v_perm_b32 v48, v48, v50, s4
+; GFX9-NEXT: v_perm_b32 v34, v34, v16, s4
+; GFX9-NEXT: v_perm_b32 v50, v15, v40, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v49, v17, s4
+; GFX9-NEXT: v_perm_b32 v38, v38, v53, s4
+; GFX9-NEXT: v_perm_b32 v49, v52, v41, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v51, s4
+; GFX9-NEXT: v_perm_b32 v37, v37, v54, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v43, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX9-NEXT: v_or_b32_e32 v18, v48, v18
+; GFX9-NEXT: v_perm_b32 v20, v24, v20, s4
+; GFX9-NEXT: v_perm_b32 v39, v39, v42, s4
; GFX9-NEXT: v_perm_b32 v33, v33, v61, s4
; GFX9-NEXT: v_perm_b32 v31, v31, v60, s4
-; GFX9-NEXT: v_perm_b32 v36, v59, v54, s4
-; GFX9-NEXT: v_perm_b32 v29, v29, v37, s4
-; GFX9-NEXT: v_perm_b32 v37, v58, v53, s4
-; GFX9-NEXT: v_perm_b32 v27, v27, v57, s4
-; GFX9-NEXT: v_perm_b32 v28, v28, v56, s4
-; GFX9-NEXT: v_perm_b32 v25, v25, v46, s4
-; GFX9-NEXT: v_perm_b32 v26, v26, v45, s4
-; GFX9-NEXT: v_perm_b32 v23, v23, v43, s4
+; GFX9-NEXT: v_perm_b32 v32, v32, v59, s4
+; GFX9-NEXT: v_perm_b32 v29, v29, v58, s4
+; GFX9-NEXT: v_perm_b32 v30, v30, v57, s4
+; GFX9-NEXT: v_perm_b32 v28, v28, v47, s4
+; GFX9-NEXT: v_perm_b32 v25, v25, v45, s4
+; GFX9-NEXT: v_perm_b32 v26, v26, v44, s4
+; GFX9-NEXT: v_perm_b32 v23, v23, v36, s4
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -46585,263 +46964,267 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: v_readlane_b32 s36, v63, 2
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v24, v24, v15, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v39, v44, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v38, v47, v38, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v49, v15, v49, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v16, v35, v15, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v29, v16
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v35, v56, v52, s4
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_perm_b32 v21, v21, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v51, v46, v51, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v52, v55, v52, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v19, v19, v53, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v22, v22, v15, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v50, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v55
-; GFX9-NEXT: v_or_b32_e32 v20, v20, v50
-; GFX9-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v53, s4
+; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v20, v20, v50, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_or_b32_e32 v19, v19, v20
-; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v48
-; GFX9-NEXT: v_or_b32_e32 v18, v18, v19
-; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v19, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX9-NEXT: v_or_b32_e32 v17, v17, v18
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v39
+; GFX9-NEXT: v_or_b32_e32 v17, v37, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v18, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v38, v17
; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v35
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v49
; GFX9-NEXT: v_or_b32_e32 v17, v33, v17
; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v17, v17, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_or_b32_e32 v16, v16, v17
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34
-; GFX9-NEXT: v_or_b32_e32 v16, v31, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_e32 v17, v34, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v17, v31, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v32, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36
-; GFX9-NEXT: v_or_b32_e32 v16, v29, v16
+; GFX9-NEXT: v_perm_b32 v17, v17, v18, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v32, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v30, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v37
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v35
; GFX9-NEXT: v_or_b32_e32 v16, v27, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v28, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v51
; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v26, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v52
; GFX9-NEXT: v_or_b32_e32 v16, v23, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v49
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v19
; GFX9-NEXT: v_or_b32_e32 v16, v21, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v22, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4
; GFX9-NEXT: v_or_b32_e32 v13, v13, v15
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_or_b32_e32 v13, v13, v14
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX9-NEXT: v_or_b32_e32 v9, v9, v11
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_or_b32_e32 v7, v7, v9
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_or_b32_e32 v3, v3, v5
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -46862,8 +47245,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -46956,8 +47339,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_writelane_b32 v75, s30, 7
; GFX11-NEXT: v_writelane_b32 v75, s31, 8
; GFX11-NEXT: v_readfirstlane_b32 s42, v15
-; GFX11-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-NEXT: v_readfirstlane_b32 s4, v13
+; GFX11-NEXT: v_readfirstlane_b32 s63, v14
+; GFX11-NEXT: v_readfirstlane_b32 s62, v13
; GFX11-NEXT: v_readfirstlane_b32 s7, v12
; GFX11-NEXT: v_readfirstlane_b32 s6, v11
; GFX11-NEXT: v_readfirstlane_b32 s9, v10
@@ -46971,391 +47354,391 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s30, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB37_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s5, 24
-; GFX11-NEXT: s_lshr_b32 s31, s27, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-NEXT: s_lshr_b32 s34, s27, 16
-; GFX11-NEXT: s_lshr_b32 s36, s27, 8
-; GFX11-NEXT: s_lshr_b32 s35, s26, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s5, 8
-; GFX11-NEXT: s_lshr_b32 s37, s26, 8
-; GFX11-NEXT: s_lshr_b32 s38, s25, 24
-; GFX11-NEXT: s_lshr_b32 s39, s25, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s49, s25, 8
-; GFX11-NEXT: s_lshr_b32 s48, s24, 16
-; GFX11-NEXT: s_lshr_b32 s50, s24, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s4, 8
-; GFX11-NEXT: s_lshr_b32 s51, s23, 24
-; GFX11-NEXT: s_lshr_b32 s52, s23, 16
-; GFX11-NEXT: s_lshr_b32 s54, s23, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s7, 24
-; GFX11-NEXT: s_lshr_b32 s53, s22, 16
-; GFX11-NEXT: s_lshr_b32 s55, s22, 8
-; GFX11-NEXT: s_lshr_b32 s64, s21, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-NEXT: s_lshr_b32 s65, s21, 16
-; GFX11-NEXT: s_lshr_b32 s67, s21, 8
-; GFX11-NEXT: s_lshr_b32 s66, s20, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s7, 8
-; GFX11-NEXT: s_lshr_b32 s68, s20, 8
-; GFX11-NEXT: s_lshr_b32 s69, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: s_lshr_b32 s80, s19, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s6, 8
-; GFX11-NEXT: s_lshr_b32 s71, s18, 16
-; GFX11-NEXT: s_lshr_b32 s81, s18, 8
-; GFX11-NEXT: s_lshr_b32 s82, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s9, 24
-; GFX11-NEXT: s_lshr_b32 s83, s17, 16
-; GFX11-NEXT: s_lshr_b32 s85, s17, 8
-; GFX11-NEXT: s_lshr_b32 s84, s16, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-NEXT: s_lshr_b32 s86, s16, 8
-; GFX11-NEXT: s_lshr_b32 s87, s3, 24
-; GFX11-NEXT: s_lshr_b32 s96, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s9, 8
-; GFX11-NEXT: s_lshr_b32 s98, s3, 8
-; GFX11-NEXT: s_lshr_b32 s97, s2, 16
-; GFX11-NEXT: s_lshr_b32 s99, s2, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s8, 16
-; GFX11-NEXT: s_lshr_b32 s100, s1, 24
-; GFX11-NEXT: s_lshr_b32 s101, s1, 16
-; GFX11-NEXT: s_lshr_b32 s103, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s8, 8
-; GFX11-NEXT: s_lshr_b32 s102, s0, 16
-; GFX11-NEXT: s_lshr_b32 s104, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s11, 24
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s11, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[14:15], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s11, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s10, 16
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s10, 8
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s13, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s13, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s13, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s12, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s12, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s15, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s15, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s14, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s14, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s41, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s41, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s40, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s40, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s29, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s29, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s28, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s28, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-NEXT: s_lshr_b32 s4, s63, 24
+; GFX11-NEXT: s_lshr_b32 s61, s3, 8
+; GFX11-NEXT: v_writelane_b32 v76, s4, 9
+; GFX11-NEXT: s_lshr_b32 s4, s63, 16
+; GFX11-NEXT: s_lshr_b32 s73, s29, 24
+; GFX11-NEXT: s_lshr_b32 s75, s63, 8
+; GFX11-NEXT: s_lshr_b32 s35, s62, 16
+; GFX11-NEXT: v_writelane_b32 v76, s4, 10
+; GFX11-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-NEXT: s_lshr_b32 s36, s62, 8
+; GFX11-NEXT: s_lshr_b32 s37, s7, 24
+; GFX11-NEXT: s_lshr_b32 s38, s7, 16
+; GFX11-NEXT: v_writelane_b32 v76, s4, 8
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[62:63], 24
+; GFX11-NEXT: s_lshr_b32 s39, s7, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 30
+; GFX11-NEXT: s_lshr_b32 s48, s6, 16
+; GFX11-NEXT: v_writelane_b32 v76, s61, 7
+; GFX11-NEXT: s_lshr_b32 s61, s2, 16
+; GFX11-NEXT: s_lshr_b32 s49, s6, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 31
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[6:7], 24
+; GFX11-NEXT: v_writelane_b32 v76, s61, 6
+; GFX11-NEXT: s_lshr_b32 s61, s2, 8
+; GFX11-NEXT: s_lshr_b32 s50, s9, 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 28
+; GFX11-NEXT: s_lshr_b32 s51, s9, 16
+; GFX11-NEXT: v_writelane_b32 v76, s61, 5
+; GFX11-NEXT: s_lshr_b32 s61, s1, 24
+; GFX11-NEXT: s_lshr_b32 s52, s9, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 29
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
+; GFX11-NEXT: v_writelane_b32 v76, s61, 4
+; GFX11-NEXT: s_lshr_b32 s61, s1, 16
+; GFX11-NEXT: s_lshr_b32 s53, s8, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 26
+; GFX11-NEXT: s_lshr_b32 s54, s8, 8
+; GFX11-NEXT: v_writelane_b32 v76, s61, 3
+; GFX11-NEXT: s_lshr_b32 s61, s1, 8
+; GFX11-NEXT: s_lshr_b32 s55, s11, 24
+; GFX11-NEXT: v_writelane_b32 v77, s5, 27
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v76, s61, 2
+; GFX11-NEXT: s_lshr_b32 s61, s0, 16
+; GFX11-NEXT: s_lshr_b32 s64, s11, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 24
+; GFX11-NEXT: s_lshr_b32 s65, s11, 8
+; GFX11-NEXT: v_writelane_b32 v76, s61, 1
+; GFX11-NEXT: s_lshr_b32 s61, s0, 8
+; GFX11-NEXT: s_lshr_b32 s66, s10, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 25
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[12:13], 24
+; GFX11-NEXT: v_writelane_b32 v76, s61, 0
+; GFX11-NEXT: s_lshr_b32 s67, s10, 8
+; GFX11-NEXT: s_lshr_b32 s68, s13, 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 22
+; GFX11-NEXT: s_lshr_b32 s69, s13, 16
+; GFX11-NEXT: s_lshr_b32 s70, s13, 8
+; GFX11-NEXT: s_lshr_b32 s71, s12, 16
+; GFX11-NEXT: s_lshr_b32 s80, s12, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 23
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[14:15], 24
+; GFX11-NEXT: s_lshr_b32 s81, s15, 24
+; GFX11-NEXT: s_lshr_b32 s82, s15, 16
+; GFX11-NEXT: s_lshr_b32 s83, s15, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 20
+; GFX11-NEXT: s_lshr_b32 s84, s14, 16
+; GFX11-NEXT: s_lshr_b32 s86, s14, 8
+; GFX11-NEXT: s_lshr_b32 s97, s41, 24
+; GFX11-NEXT: s_lshr_b32 s100, s41, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 21
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
+; GFX11-NEXT: s_lshr_b32 s102, s41, 8
+; GFX11-NEXT: s_lshr_b32 s44, s40, 16
+; GFX11-NEXT: s_lshr_b32 s56, s40, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 18
+; GFX11-NEXT: s_lshr_b32 s76, s29, 16
+; GFX11-NEXT: s_lshr_b32 s90, s29, 8
+; GFX11-NEXT: s_lshr_b32 s94, s28, 16
+; GFX11-NEXT: s_lshr_b32 s45, s28, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 19
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[28:29], 24
+; GFX11-NEXT: s_lshr_b32 s57, s27, 24
+; GFX11-NEXT: s_lshr_b32 s59, s27, 16
+; GFX11-NEXT: s_lshr_b32 s31, s27, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 16
+; GFX11-NEXT: s_lshr_b32 s47, s26, 16
+; GFX11-NEXT: s_lshr_b32 s30, s26, 8
+; GFX11-NEXT: s_lshr_b32 s43, s25, 24
+; GFX11-NEXT: s_lshr_b32 vcc_lo, s25, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 17
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-NEXT: s_lshr_b32 s92, s25, 8
+; GFX11-NEXT: s_lshr_b32 s88, s24, 16
+; GFX11-NEXT: s_lshr_b32 s78, s24, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 14
+; GFX11-NEXT: s_lshr_b32 s74, s23, 24
+; GFX11-NEXT: s_lshr_b32 s72, s23, 16
+; GFX11-NEXT: s_lshr_b32 s60, s23, 8
+; GFX11-NEXT: s_lshr_b32 s58, s22, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 15
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[24:25], 24
+; GFX11-NEXT: s_lshr_b32 s46, s22, 8
+; GFX11-NEXT: s_lshr_b32 s42, s21, 24
+; GFX11-NEXT: s_lshr_b32 s104, s21, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 12
+; GFX11-NEXT: s_lshr_b32 s103, s21, 8
+; GFX11-NEXT: s_lshr_b32 s101, s20, 16
+; GFX11-NEXT: s_lshr_b32 s99, s20, 8
+; GFX11-NEXT: s_lshr_b32 s98, s19, 24
+; GFX11-NEXT: v_writelane_b32 v77, s5, 13
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[22:23], 24
+; GFX11-NEXT: s_lshr_b32 s96, s19, 16
+; GFX11-NEXT: s_lshr_b32 s87, s19, 8
+; GFX11-NEXT: s_lshr_b32 s85, s18, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 10
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s18, 8
+; GFX11-NEXT: s_lshr_b32 s95, s17, 24
+; GFX11-NEXT: s_lshr_b32 s93, s17, 16
+; GFX11-NEXT: s_lshr_b32 s91, s17, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 11
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-NEXT: s_lshr_b32 s89, s16, 16
+; GFX11-NEXT: s_lshr_b32 s79, s16, 8
+; GFX11-NEXT: s_lshr_b32 s77, s3, 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 8
+; GFX11-NEXT: v_readlane_b32 s61, v76, 10
+; GFX11-NEXT: s_mov_b32 s34, 0
+; GFX11-NEXT: v_writelane_b32 v77, s5, 9
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 6
+; GFX11-NEXT: v_writelane_b32 v77, s5, 7
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 4
+; GFX11-NEXT: v_writelane_b32 v77, s5, 5
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 2
+; GFX11-NEXT: v_writelane_b32 v77, s5, 3
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 0
+; GFX11-NEXT: v_writelane_b32 v77, s5, 1
+; GFX11-NEXT: s_mov_b32 s5, s73
+; GFX11-NEXT: v_readlane_b32 s73, v76, 9
; GFX11-NEXT: s_branch .LBB37_3
; GFX11-NEXT: .LBB37_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s30, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr103
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: s_mov_b32 s34, -1
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr77
+; GFX11-NEXT: ; implicit-def: $sgpr79
+; GFX11-NEXT: ; implicit-def: $sgpr89
+; GFX11-NEXT: ; implicit-def: $sgpr91
+; GFX11-NEXT: ; implicit-def: $sgpr93
+; GFX11-NEXT: ; implicit-def: $sgpr95
+; GFX11-NEXT: ; implicit-def: $vcc_hi
+; GFX11-NEXT: ; implicit-def: $sgpr85
+; GFX11-NEXT: ; implicit-def: $sgpr87
+; GFX11-NEXT: ; implicit-def: $sgpr96
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr99
; GFX11-NEXT: ; implicit-def: $sgpr101
+; GFX11-NEXT: ; implicit-def: $sgpr103
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: ; implicit-def: $sgpr58
+; GFX11-NEXT: ; implicit-def: $sgpr60
+; GFX11-NEXT: ; implicit-def: $sgpr72
+; GFX11-NEXT: ; implicit-def: $sgpr74
+; GFX11-NEXT: ; implicit-def: $sgpr78
+; GFX11-NEXT: ; implicit-def: $sgpr88
+; GFX11-NEXT: ; implicit-def: $sgpr92
+; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr59
+; GFX11-NEXT: ; implicit-def: $sgpr57
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr94
+; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr76
+; GFX11-NEXT: ; implicit-def: $sgpr56
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr102
; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr99
; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr87
; GFX11-NEXT: ; implicit-def: $sgpr86
; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr85
; GFX11-NEXT: ; implicit-def: $sgpr83
; GFX11-NEXT: ; implicit-def: $sgpr82
; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr56
; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr71
; GFX11-NEXT: ; implicit-def: $sgpr70
; GFX11-NEXT: ; implicit-def: $sgpr69
; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr58
; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr66
; GFX11-NEXT: ; implicit-def: $sgpr65
; GFX11-NEXT: ; implicit-def: $sgpr64
; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr54
+; GFX11-NEXT: ; implicit-def: $sgpr53
; GFX11-NEXT: ; implicit-def: $sgpr52
; GFX11-NEXT: ; implicit-def: $sgpr51
; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr62
; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr48
; GFX11-NEXT: ; implicit-def: $sgpr39
; GFX11-NEXT: ; implicit-def: $sgpr38
; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
+; GFX11-NEXT: ; implicit-def: $sgpr35
+; GFX11-NEXT: ; implicit-def: $sgpr75
+; GFX11-NEXT: ; implicit-def: $sgpr61
+; GFX11-NEXT: ; implicit-def: $sgpr73
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-NEXT: v_writelane_b32 v77, s43, 1
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s4, 2
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
+; GFX11-NEXT: v_writelane_b32 v77, s5, 3
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: ; kill: killed $sgpr4
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 4
+; GFX11-NEXT: v_writelane_b32 v77, s5, 5
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 6
+; GFX11-NEXT: v_writelane_b32 v77, s5, 7
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 9
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 10
+; GFX11-NEXT: v_writelane_b32 v77, s5, 11
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 12
+; GFX11-NEXT: v_writelane_b32 v77, s5, 13
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 14
+; GFX11-NEXT: v_writelane_b32 v77, s5, 15
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 17
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 18
+; GFX11-NEXT: v_writelane_b32 v77, s5, 19
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 20
+; GFX11-NEXT: v_writelane_b32 v77, s5, 21
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 22
+; GFX11-NEXT: v_writelane_b32 v77, s5, 23
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 24
+; GFX11-NEXT: v_writelane_b32 v77, s5, 25
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 26
+; GFX11-NEXT: v_writelane_b32 v77, s5, 27
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 28
+; GFX11-NEXT: v_writelane_b32 v77, s5, 29
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 30
+; GFX11-NEXT: v_writelane_b32 v77, s5, 31
; GFX11-NEXT: .LBB37_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s30, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-NEXT: s_and_b32 s34, s34, exec_lo
+; GFX11-NEXT: s_cselect_b32 s34, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s34, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB37_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-NEXT: v_add_f32_e64 v10, s13, 1.0
+; GFX11-NEXT: v_add_f32_e64 v9, s12, 1.0
; GFX11-NEXT: v_add_f32_e64 v12, s15, 1.0
; GFX11-NEXT: v_add_f32_e64 v11, s14, 1.0
+; GFX11-NEXT: v_add_f32_e64 v30, s17, 1.0
+; GFX11-NEXT: v_add_f32_e64 v24, s21, 1.0
+; GFX11-NEXT: v_add_f32_e64 v23, s20, 1.0
; GFX11-NEXT: v_add_f32_e64 v14, s41, 1.0
; GFX11-NEXT: v_add_f32_e64 v13, s40, 1.0
+; GFX11-NEXT: v_add_f32_e64 v28, s19, 1.0
+; GFX11-NEXT: v_add_f32_e64 v27, s18, 1.0
; GFX11-NEXT: v_add_f32_e64 v16, s29, 1.0
; GFX11-NEXT: v_add_f32_e64 v15, s28, 1.0
-; GFX11-NEXT: v_add_f32_e64 v26, s19, 1.0
-; GFX11-NEXT: v_add_f32_e64 v25, s18, 1.0
+; GFX11-NEXT: v_add_f32_e64 v29, s16, 1.0
; GFX11-NEXT: v_add_f32_e64 v18, s27, 1.0
; GFX11-NEXT: v_add_f32_e64 v17, s26, 1.0
-; GFX11-NEXT: v_add_f32_e64 v4, s7, 1.0
-; GFX11-NEXT: v_add_f32_e64 v3, s6, 1.0
-; GFX11-NEXT: v_add_f32_e64 v28, s17, 1.0
-; GFX11-NEXT: v_add_f32_e64 v27, s16, 1.0
+; GFX11-NEXT: v_add_f32_e64 v34, s3, 1.0
+; GFX11-NEXT: v_add_f32_e64 v33, s2, 1.0
; GFX11-NEXT: v_add_f32_e64 v20, s25, 1.0
; GFX11-NEXT: v_add_f32_e64 v19, s24, 1.0
; GFX11-NEXT: v_add_f32_e64 v6, s9, 1.0
; GFX11-NEXT: v_add_f32_e64 v5, s8, 1.0
-; GFX11-NEXT: v_add_f32_e64 v32, s3, 1.0
-; GFX11-NEXT: v_add_f32_e64 v31, s2, 1.0
+; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
+; GFX11-NEXT: v_add_f32_e64 v36, s1, 1.0
+; GFX11-NEXT: v_add_f32_e64 v35, s0, 1.0
; GFX11-NEXT: v_add_f32_e64 v22, s23, 1.0
; GFX11-NEXT: v_add_f32_e64 v21, s22, 1.0
; GFX11-NEXT: v_add_f32_e64 v8, s11, 1.0
+; GFX11-NEXT: v_add_f32_e64 v4, s7, 1.0
+; GFX11-NEXT: v_add_f32_e64 v2, s63, 1.0
+; GFX11-NEXT: v_add_f32_e64 v1, s62, 1.0
+; GFX11-NEXT: v_add_f32_e64 v3, s6, 1.0
; GFX11-NEXT: v_add_f32_e64 v7, s10, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[11:12]
-; GFX11-NEXT: v_add_f32_e64 v34, s1, 1.0
-; GFX11-NEXT: v_add_f32_e64 v33, s0, 1.0
-; GFX11-NEXT: v_add_f32_e64 v24, s21, 1.0
-; GFX11-NEXT: v_add_f32_e64 v23, s20, 1.0
-; GFX11-NEXT: v_add_f32_e64 v10, s13, 1.0
-; GFX11-NEXT: v_add_f32_e64 v2, s5, 1.0
-; GFX11-NEXT: v_add_f32_e64 v1, s4, 1.0
-; GFX11-NEXT: v_add_f32_e64 v9, s12, 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b64 v[35:36], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[25:26]
-; GFX11-NEXT: v_lshrrev_b64 v[36:37], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
+; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
+; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[23:24]
+; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v30
+; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[15:16]
; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[31:32]
-; GFX11-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[29:30]
+; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
+; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[33:34]
-; GFX11-NEXT: v_lshrrev_b32_e32 v70, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v69, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v2
+; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
+; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8]
+; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
+; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[35:36]
+; GFX11-NEXT: v_lshrrev_b32_e32 v55, 24, v2
+; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v1
-; GFX11-NEXT: v_lshrrev_b32_e32 v83, 24, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v81, 16, v4
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v1
+; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4
+; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4
+; GFX11-NEXT: v_lshrrev_b32_e32 v70, 8, v4
; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3
; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3
; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6
; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v80, 8, v6
-; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v5
-; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v5
+; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v6
+; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5
+; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5
; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8
; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v8
+; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v8
; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7
-; GFX11-NEXT: v_lshrrev_b32_e32 v97, 8, v7
+; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v7
; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10
; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10
; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v9
+; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9
+; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9
; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12
; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v12
+; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v12
; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v11
+; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v11
; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14
; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14
; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v13
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v13
+; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13
; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16
; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v16
+; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16
; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v15
+; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15
; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
@@ -47376,308 +47759,293 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v26
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v25
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v25
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 8, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v42, 16, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v46, 16, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v44, 8, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v63, 16, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v61, 24, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v58, 8, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v35
+; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v35
+; GFX11-NEXT: v_mov_b32_e32 v69, v73
; GFX11-NEXT: s_branch .LBB37_6
; GFX11-NEXT: .LBB37_5:
-; GFX11-NEXT: v_dual_mov_b32 v33, s0 :: v_dual_mov_b32 v34, s1
+; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_dual_mov_b32 v31, s2 :: v_dual_mov_b32 v32, s3
-; GFX11-NEXT: v_dual_mov_b32 v27, s16 :: v_dual_mov_b32 v28, s17
+; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
+; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v133, s0
+; GFX11-NEXT: v_mov_b32_e32 v57, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_dual_mov_b32 v25, s18 :: v_dual_mov_b32 v26, s19
+; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v145, s0
+; GFX11-NEXT: v_mov_b32_e32 v59, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 2
; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v131, s0
+; GFX11-NEXT: v_mov_b32_e32 v58, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 3
; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_mov_b32_e32 v135, s0
+; GFX11-NEXT: v_mov_b32_e32 v60, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 4
; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v144, s0
+; GFX11-NEXT: v_mov_b32_e32 v61, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 5
; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
-; GFX11-NEXT: v_mov_b32_e32 v132, s0
+; GFX11-NEXT: v_mov_b32_e32 v47, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 6
; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v134, s0
+; GFX11-NEXT: v_dual_mov_b32 v63, s0 :: v_dual_mov_b32 v72, s77
; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_dual_mov_b32 v72, s104 :: v_dual_mov_b32 v73, s102
-; GFX11-NEXT: v_mov_b32_e32 v128, s0
+; GFX11-NEXT: v_dual_mov_b32 v1, s62 :: v_dual_mov_b32 v2, s63
+; GFX11-NEXT: v_dual_mov_b32 v44, s79 :: v_dual_mov_b32 v69, s91
+; GFX11-NEXT: v_mov_b32_e32 v56, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v63, s103 :: v_dual_mov_b32 v62, s100
-; GFX11-NEXT: v_dual_mov_b32 v61, s101 :: v_dual_mov_b32 v60, s97
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v57, s99 :: v_dual_mov_b32 v56, s98
-; GFX11-NEXT: v_dual_mov_b32 v58, s96 :: v_dual_mov_b32 v59, s87
-; GFX11-NEXT: v_mov_b32_e32 v130, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v46, s86 :: v_dual_mov_b32 v47, s84
-; GFX11-NEXT: v_dual_mov_b32 v42, s85 :: v_dual_mov_b32 v45, s82
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v115, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v44, s83 :: v_dual_mov_b32 v183, s81
-; GFX11-NEXT: v_dual_mov_b32 v43, s71 :: v_dual_mov_b32 v182, s80
-; GFX11-NEXT: v_mov_b32_e32 v119, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v40, s70 :: v_dual_mov_b32 v41, s69
-; GFX11-NEXT: v_dual_mov_b32 v178, s68 :: v_dual_mov_b32 v181, s66
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v113, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v176, s67 :: v_dual_mov_b32 v179, s65
-; GFX11-NEXT: v_dual_mov_b32 v180, s64 :: v_dual_mov_b32 v167, s55
-; GFX11-NEXT: v_mov_b32_e32 v117, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v177, s53 :: v_dual_mov_b32 v164, s54
-; GFX11-NEXT: v_dual_mov_b32 v165, s52 :: v_dual_mov_b32 v166, s51
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v118, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v160, s50 :: v_dual_mov_b32 v163, s48
-; GFX11-NEXT: v_dual_mov_b32 v150, s49 :: v_dual_mov_b32 v161, s39
-; GFX11-NEXT: v_mov_b32_e32 v114, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v162, s38 :: v_dual_mov_b32 v149, s37
-; GFX11-NEXT: v_dual_mov_b32 v151, s35 :: v_dual_mov_b32 v146, s36
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v116, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v147, s34 :: v_dual_mov_b32 v148, s31
-; GFX11-NEXT: v_dual_mov_b32 v29, s72 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_mov_b32_e32 v102, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v35, s74 :: v_dual_mov_b32 v50, s94
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v52, s62
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v103, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v49, s92 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v51, vcc_lo :: v_dual_mov_b32 v64, s56
-; GFX11-NEXT: v_mov_b32_e32 v112, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v66, s44
-; GFX11-NEXT: v_mov_b32_e32 v65, s46
-; GFX11-NEXT: v_mov_b32_e32 v67, s42
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_mov_b32_e32 v97, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v36, s76
-; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v101, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v87, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v99, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v100, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v96, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v98, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v80, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v85, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v86, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v82, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v84, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v55, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v81, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v83, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v30, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v71, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v39, s0
+; GFX11-NEXT: v_dual_mov_b32 v46, s89 :: v_dual_mov_b32 v43, s93
+; GFX11-NEXT: v_dual_mov_b32 v45, s95 :: v_dual_mov_b32 v42, s85
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 30
+; GFX11-NEXT: v_readlane_b32 s1, v77, 31
+; GFX11-NEXT: v_dual_mov_b32 v183, vcc_hi :: v_dual_mov_b32 v182, s87
+; GFX11-NEXT: v_dual_mov_b32 v40, s96 :: v_dual_mov_b32 v41, s98
+; GFX11-NEXT: v_mov_b32_e32 v25, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 28
+; GFX11-NEXT: v_readlane_b32 s1, v77, 29
+; GFX11-NEXT: v_dual_mov_b32 v178, s99 :: v_dual_mov_b32 v181, s101
+; GFX11-NEXT: v_dual_mov_b32 v176, s103 :: v_dual_mov_b32 v179, s104
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v31, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 26
+; GFX11-NEXT: v_readlane_b32 s1, v77, 27
+; GFX11-NEXT: v_dual_mov_b32 v180, s42 :: v_dual_mov_b32 v167, s46
+; GFX11-NEXT: v_dual_mov_b32 v177, s58 :: v_dual_mov_b32 v164, s60
+; GFX11-NEXT: v_mov_b32_e32 v37, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 24
+; GFX11-NEXT: v_readlane_b32 s1, v77, 25
+; GFX11-NEXT: v_dual_mov_b32 v165, s72 :: v_dual_mov_b32 v166, s74
+; GFX11-NEXT: v_dual_mov_b32 v160, s78 :: v_dual_mov_b32 v163, s88
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v38, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 22
+; GFX11-NEXT: v_readlane_b32 s1, v77, 23
+; GFX11-NEXT: v_dual_mov_b32 v150, s92 :: v_dual_mov_b32 v161, vcc_lo
+; GFX11-NEXT: v_dual_mov_b32 v162, s43 :: v_dual_mov_b32 v149, s30
+; GFX11-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 20
+; GFX11-NEXT: v_readlane_b32 s1, v77, 21
+; GFX11-NEXT: v_dual_mov_b32 v151, s47 :: v_dual_mov_b32 v146, s31
+; GFX11-NEXT: v_dual_mov_b32 v147, s59 :: v_dual_mov_b32 v148, s57
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 18
+; GFX11-NEXT: v_readlane_b32 s1, v77, 19
+; GFX11-NEXT: v_dual_mov_b32 v134, s45 :: v_dual_mov_b32 v145, s94
+; GFX11-NEXT: v_dual_mov_b32 v132, s90 :: v_dual_mov_b32 v135, s76
+; GFX11-NEXT: v_mov_b32_e32 v50, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 16
+; GFX11-NEXT: v_readlane_b32 s1, v77, 17
+; GFX11-NEXT: v_dual_mov_b32 v144, s5 :: v_dual_mov_b32 v131, s56
+; GFX11-NEXT: v_dual_mov_b32 v133, s44 :: v_dual_mov_b32 v128, s102
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v51, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 14
+; GFX11-NEXT: v_readlane_b32 s1, v77, 15
+; GFX11-NEXT: v_dual_mov_b32 v129, s100 :: v_dual_mov_b32 v130, s97
+; GFX11-NEXT: v_dual_mov_b32 v116, s86 :: v_dual_mov_b32 v119, s84
+; GFX11-NEXT: v_mov_b32_e32 v52, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 12
+; GFX11-NEXT: v_readlane_b32 s1, v77, 13
+; GFX11-NEXT: v_dual_mov_b32 v114, s83 :: v_dual_mov_b32 v117, s82
+; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v53, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 10
+; GFX11-NEXT: v_readlane_b32 s1, v77, 11
+; GFX11-NEXT: v_dual_mov_b32 v115, s71 :: v_dual_mov_b32 v102, s70
+; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
+; GFX11-NEXT: v_mov_b32_e32 v54, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 8
+; GFX11-NEXT: v_readlane_b32 s1, v77, 9
+; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s66
+; GFX11-NEXT: v_dual_mov_b32 v96, s65 :: v_dual_mov_b32 v99, s64
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v64, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v69, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v70, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 7
+; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
+; GFX11-NEXT: v_dual_mov_b32 v97, s53 :: v_dual_mov_b32 v86, s50
+; GFX11-NEXT: v_mov_b32_e32 v65, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-NEXT: v_readlane_b32 s1, v77, 5
+; GFX11-NEXT: v_dual_mov_b32 v83, s52 :: v_dual_mov_b32 v82, s49
+; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s48
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v66, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-NEXT: v_readlane_b32 s1, v77, 3
+; GFX11-NEXT: v_dual_mov_b32 v70, s39 :: v_dual_mov_b32 v81, s37
+; GFX11-NEXT: v_dual_mov_b32 v80, s38 :: v_dual_mov_b32 v71, s35
+; GFX11-NEXT: v_mov_b32_e32 v67, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-NEXT: v_dual_mov_b32 v32, s36 :: v_dual_mov_b32 v39, s61
+; GFX11-NEXT: v_dual_mov_b32 v26, s75 :: v_dual_mov_b32 v55, s73
+; GFX11-NEXT: v_readlane_b32 s1, v77, 1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v68, s0
; GFX11-NEXT: .LBB37_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v67, v73, v67, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v66, v60, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v33, v33, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v68, v61, v62, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v31, v57, 0xc0c0004
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_perm_b32 v68, v59, v68, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v67, v63, v67, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v66, v46, v66, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v65, v42, v65, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v35, v35, v57, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-NEXT: v_perm_b32 v47, v33, v47, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
+; GFX11-NEXT: v_perm_b32 v36, v36, v58, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v57, v60, v61, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v58, v62, v72, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v29, v29, v44, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v34, v34, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_or_b32_e32 v31, v33, v67
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v33, v57, v66
-; GFX11-NEXT: v_perm_b32 v66, v44, v45, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v67, v40, v41, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v56, v32, v56, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
-; GFX11-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v32, v34, v68
-; GFX11-NEXT: v_perm_b32 v27, v27, v46, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v30, v69, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v69, v27, v183, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
-; GFX11-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66
-; GFX11-NEXT: v_perm_b32 v68, v25, v183, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_perm_b32 v182, v26, v182, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v33, v35, v68
+; GFX11-NEXT: v_or_b32_e32 v35, v47, v67
+; GFX11-NEXT: v_perm_b32 v67, v43, v45, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v68, v40, v41, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57
+; GFX11-NEXT: v_perm_b32 v56, v34, v56, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
+; GFX11-NEXT: v_or_b32_e32 v27, v29, v66
+; GFX11-NEXT: v_or_b32_e32 v29, v69, v65
+; GFX11-NEXT: v_perm_b32 v64, v181, v64, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v65, v179, v180, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v54, v177, v54, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
-; GFX11-NEXT: v_or_b32_e32 v34, v56, v58
+; GFX11-NEXT: v_perm_b32 v182, v28, v182, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-NEXT: v_or_b32_e32 v34, v36, v57
+; GFX11-NEXT: v_or_b32_e32 v36, v56, v58
+; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
+; GFX11-NEXT: v_perm_b32 v24, v24, v176, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
; GFX11-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v25, v27, v65
-; GFX11-NEXT: v_or_b32_e32 v26, v28, v66
-; GFX11-NEXT: v_or_b32_e32 v27, v68, v64
-; GFX11-NEXT: v_or_b32_e32 v28, v182, v67
+; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; GFX11-NEXT: v_or_b32_e32 v28, v30, v67
+; GFX11-NEXT: v_or_b32_e32 v30, v182, v68
; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[31:34], off
-; GFX11-NEXT: scratch_store_b128 v0, v[25:28], off offset:16
-; GFX11-NEXT: v_perm_b32 v26, v165, v166, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v25, v21, v53
+; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off
+; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
+; GFX11-NEXT: v_or_b32_e32 v27, v23, v64
+; GFX11-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v28, v24, v65
+; GFX11-NEXT: v_or_b32_e32 v29, v21, v54
; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v151, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-NEXT: v_perm_b32 v22, v163, v53, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v151, v52, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX11-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v26, v21, v26
+; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30
+; GFX11-NEXT: v_or_b32_e32 v30, v21, v23
; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v21, v17, v28
+; GFX11-NEXT: v_or_b32_e32 v20, v20, v24
+; GFX11-NEXT: v_or_b32_e32 v21, v17, v33
; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v145, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v134, v49, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v20, v20, v27
-; GFX11-NEXT: v_perm_b32 v27, v135, v144, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v18, v145, v51, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v133, v50, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v13, v13, v132, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v17, v13, v28
-; GFX11-NEXT: v_perm_b32 v28, v116, v38, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v16, v16, v27
+; GFX11-NEXT: v_or_b32_e32 v17, v13, v24
+; GFX11-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v16, v16, v23
; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v119, v48, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v117, v118, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v114, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
-; GFX11-NEXT: v_or_b32_e32 v13, v9, v28
+; GFX11-NEXT: v_or_b32_e32 v13, v9, v24
; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v101, v37, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v12, v12, v27
-; GFX11-NEXT: v_perm_b32 v27, v99, v100, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v98, v36, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v12, v12, v23
+; GFX11-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v5, v5, v96, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX11-NEXT: v_or_b32_e32 v7, v7, v10
; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
-; GFX11-NEXT: v_perm_b32 v24, v24, v176, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
; GFX11-NEXT: v_or_b32_e32 v14, v9, v14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v27
-; GFX11-NEXT: v_or_b32_e32 v9, v5, v28
-; GFX11-NEXT: v_perm_b32 v5, v84, v35, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v81, v83, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v71, v29, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v29, v69, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v6, v6, v80, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v8, v8, v23
+; GFX11-NEXT: v_or_b32_e32 v9, v5, v24
+; GFX11-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v25, v39, v55, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v23, v23, v54
-; GFX11-NEXT: v_or_b32_e32 v24, v24, v64
; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v30, v1, v30, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v31, v2, v39, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-NEXT: v_perm_b32 v4, v4, v70, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-NEXT: v_perm_b32 v26, v2, v26, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v27
-; GFX11-NEXT: v_or_b32_e32 v3, v30, v28
-; GFX11-NEXT: v_or_b32_e32 v4, v31, v29
+; GFX11-NEXT: v_or_b32_e32 v2, v4, v23
+; GFX11-NEXT: v_or_b32_e32 v3, v31, v24
+; GFX11-NEXT: v_or_b32_e32 v4, v26, v25
; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[23:26], off offset:32
+; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:32
; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
@@ -53622,8 +53990,16 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s58, v10
+; SI-NEXT: v_readfirstlane_b32 s59, v9
+; SI-NEXT: v_readfirstlane_b32 s60, v8
+; SI-NEXT: v_readfirstlane_b32 s61, v7
; SI-NEXT: v_readfirstlane_b32 s76, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
; SI-NEXT: v_readfirstlane_b32 s46, v30
; SI-NEXT: v_readfirstlane_b32 s6, v29
; SI-NEXT: v_readfirstlane_b32 s7, v28
@@ -53637,327 +54013,318 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s15, v20
; SI-NEXT: v_readfirstlane_b32 s40, v19
; SI-NEXT: v_readfirstlane_b32 s41, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:332
; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:64
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:104
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:112
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:120
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:128
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328
-; SI-NEXT: v_readfirstlane_b32 s75, v1
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:136
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:200
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:240
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:328
; SI-NEXT: v_readfirstlane_b32 s43, v16
-; SI-NEXT: v_readfirstlane_b32 s45, v14
-; SI-NEXT: v_readfirstlane_b32 s73, v3
-; SI-NEXT: v_readfirstlane_b32 s74, v2
-; SI-NEXT: v_readfirstlane_b32 s57, v11
-; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: v_readfirstlane_b32 s44, v15
+; SI-NEXT: v_readfirstlane_b32 s45, v14
; SI-NEXT: v_readfirstlane_b32 s47, v13
; SI-NEXT: v_readfirstlane_b32 s56, v12
-; SI-NEXT: v_readfirstlane_b32 s58, v10
-; SI-NEXT: v_readfirstlane_b32 s59, v9
-; SI-NEXT: v_readfirstlane_b32 s60, v8
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s57, v11
; SI-NEXT: v_readfirstlane_b32 s62, v6
; SI-NEXT: v_readfirstlane_b32 s63, v5
+; SI-NEXT: v_readfirstlane_b32 s72, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v3
+; SI-NEXT: v_readfirstlane_b32 s74, v2
+; SI-NEXT: v_readfirstlane_b32 s75, v1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40
-; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41
-; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42
-; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46
-; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45
-; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47
-; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v33
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v42
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v61
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v21
+; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v22
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29
-; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48
-; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204
-; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v55
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v54
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v36
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v44, 24, v57
+; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v37
+; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v32
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:284
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:276
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:252
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:156
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
+; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v31
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB39_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v40, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
-; SI-NEXT: v_or_b32_e32 v0, s4, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v11, v3
-; SI-NEXT: v_or_b32_e32 v11, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v13, v1
-; SI-NEXT: v_or_b32_e32 v13, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v14, v1
-; SI-NEXT: v_or_b32_e32 v14, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v42
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v15, v1
-; SI-NEXT: v_or_b32_e32 v15, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: v_or_b32_e32 v0, v0, v41
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v16, v1
-; SI-NEXT: v_or_b32_e32 v16, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_or_b32_e32 v0, v0, v40
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v55, v1
-; SI-NEXT: v_or_b32_e32 v17, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v44
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v54
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v53, v1
-; SI-NEXT: v_or_b32_e32 v18, v0, v1
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v12, v2, v3
-; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_or_b32_e32 v6, v15, v6
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v38, v38, v11
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v17
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v38
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v33, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v42, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v20, v0
; SI-NEXT: s_lshl_b32 s5, s17, 8
+; SI-NEXT: s_lshl_b32 s77, s19, 24
+; SI-NEXT: s_lshl_b32 s78, s23, 24
+; SI-NEXT: s_lshl_b32 s79, s27, 24
+; SI-NEXT: s_lshl_b32 s88, s75, 24
+; SI-NEXT: s_lshl_b32 s89, s63, 24
+; SI-NEXT: s_lshl_b32 s90, s59, 24
+; SI-NEXT: s_lshl_b32 s91, s47, 24
+; SI-NEXT: s_lshl_b32 s92, s42, 24
+; SI-NEXT: s_lshl_b32 s93, s14, 24
+; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_lshl_b32 s95, s6, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v7, s4, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v11, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v63
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v18, v7
+; SI-NEXT: v_mov_b32_e32 v6, v13
+; SI-NEXT: v_or_b32_e32 v13, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v62
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v19
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v14, v7
+; SI-NEXT: v_mov_b32_e32 v60, v14
+; SI-NEXT: v_or_b32_e32 v14, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v57
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s18, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s77, s19, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s77, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -53966,7 +54333,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s5, s5, s77
; SI-NEXT: s_and_b32 s77, s22, 0xff
; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s23, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s77, s78, s77
; SI-NEXT: s_or_b32 s5, s5, s77
@@ -53975,7 +54341,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s77, s77, s78
; SI-NEXT: s_and_b32 s78, s26, 0xff
; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s27, 24
; SI-NEXT: s_and_b32 s77, s77, 0xffff
; SI-NEXT: s_or_b32 s78, s79, s78
; SI-NEXT: s_or_b32 s77, s77, s78
@@ -53984,7 +54349,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s78, s78, s79
; SI-NEXT: s_and_b32 s79, s76, 0xff
; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s75, 24
; SI-NEXT: s_and_b32 s78, s78, 0xffff
; SI-NEXT: s_or_b32 s79, s88, s79
; SI-NEXT: s_or_b32 s78, s78, s79
@@ -53993,7 +54357,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s79, s79, s88
; SI-NEXT: s_and_b32 s88, s72, 0xff
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s89, s63, 24
; SI-NEXT: s_and_b32 s79, s79, 0xffff
; SI-NEXT: s_or_b32 s88, s89, s88
; SI-NEXT: s_or_b32 s79, s79, s88
@@ -54002,7 +54365,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s88, s88, s89
; SI-NEXT: s_and_b32 s89, s60, 0xff
; SI-NEXT: s_lshl_b32 s89, s89, 16
-; SI-NEXT: s_lshl_b32 s90, s59, 24
; SI-NEXT: s_and_b32 s88, s88, 0xffff
; SI-NEXT: s_or_b32 s89, s90, s89
; SI-NEXT: s_or_b32 s88, s88, s89
@@ -54011,7 +54373,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s89, s89, s90
; SI-NEXT: s_and_b32 s90, s56, 0xff
; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_lshl_b32 s91, s47, 24
; SI-NEXT: s_and_b32 s89, s89, 0xffff
; SI-NEXT: s_or_b32 s90, s91, s90
; SI-NEXT: s_or_b32 s89, s89, s90
@@ -54019,18 +54380,7 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_lshl_b32 s91, s44, 8
; SI-NEXT: s_or_b32 s90, s90, s91
; SI-NEXT: s_and_b32 s91, s43, 0xff
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v52
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
-; SI-NEXT: v_mov_b32_e32 v49, v48
; SI-NEXT: s_lshl_b32 s91, s91, 16
-; SI-NEXT: s_lshl_b32 s92, s42, 24
; SI-NEXT: s_and_b32 s90, s90, 0xffff
; SI-NEXT: s_or_b32 s91, s92, s91
; SI-NEXT: s_or_b32 s90, s90, s91
@@ -54039,7 +54389,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s91, s91, s92
; SI-NEXT: s_and_b32 s92, s15, 0xff
; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s93, s14, 24
; SI-NEXT: s_and_b32 s91, s91, 0xffff
; SI-NEXT: s_or_b32 s92, s93, s92
; SI-NEXT: s_or_b32 s91, s91, s92
@@ -54048,7 +54397,15 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s92, s92, s93
; SI-NEXT: s_and_b32 s93, s11, 0xff
; SI-NEXT: s_lshl_b32 s93, s93, 16
-; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v47
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v51, v7
+; SI-NEXT: v_or_b32_e32 v15, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v32
; SI-NEXT: s_and_b32 s92, s92, 0xffff
; SI-NEXT: s_or_b32 s93, s94, s93
; SI-NEXT: s_or_b32 s92, s92, s93
@@ -54057,134 +54414,126 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s93, s93, s94
; SI-NEXT: s_and_b32 s94, s7, 0xff
; SI-NEXT: s_lshl_b32 s94, s94, 16
-; SI-NEXT: s_lshl_b32 s95, s6, 24
; SI-NEXT: s_and_b32 s93, s93, 0xffff
; SI-NEXT: s_or_b32 s94, s95, s94
; SI-NEXT: s_or_b32 s93, s93, s94
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v3, s78
-; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v48, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v44, v7
+; SI-NEXT: v_or_b32_e32 v17, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v41
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v18, v5, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v5, s88
-; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: v_mov_b32_e32 v7, s90
-; SI-NEXT: v_mov_b32_e32 v8, s91
-; SI-NEXT: v_mov_b32_e32 v9, s92
-; SI-NEXT: v_mov_b32_e32 v10, s93
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v19, v3, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v3, s78
+; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v20, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v50
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v20, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v39, v1
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v21, v1
; SI-NEXT: v_or_b32_e32 v21, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
-; SI-NEXT: v_mov_b32_e32 v37, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v48
-; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
; SI-NEXT: v_or_b32_e32 v22, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v38
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v23, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v36
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
; SI-NEXT: v_or_b32_e32 v24, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v29, v1
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
; SI-NEXT: v_or_b32_e32 v25, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v29
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_or_b32_e32 v0, v0, v31
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v28, v1
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v56, v1
; SI-NEXT: v_or_b32_e32 v26, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v58
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v0, v0, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
-; SI-NEXT: v_mov_b32_e32 v57, v27
-; SI-NEXT: v_or_b32_e32 v27, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v45
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_or_b32_e32 v28, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v46
-; SI-NEXT: v_mov_b32_e32 v45, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v60, v32
+; SI-NEXT: v_or_b32_e32 v27, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v29, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v28, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
+; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -54193,56 +54542,46 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v29, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v46
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v30, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_or_b32_e32 v31, v0, v1
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s77
+; SI-NEXT: v_mov_b32_e32 v8, s91
+; SI-NEXT: v_mov_b32_e32 v9, s92
+; SI-NEXT: v_mov_b32_e32 v10, s93
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB39_3
; SI-NEXT: .LBB39_2:
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_mov_b32_e32 v49, v48
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: v_mov_b32_e32 v57, v27
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: v_mov_b32_e32 v60, v14
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB39_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v43, v58
-; SI-NEXT: v_mov_b32_e32 v58, v33
-; SI-NEXT: v_mov_b32_e32 v33, v37
-; SI-NEXT: v_mov_b32_e32 v34, v39
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB39_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; SI-NEXT: s_add_i32 s46, s46, 3
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_mov_b32_e32 v32, v35
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_lshl_b32 s5, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -54298,22 +54637,23 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: v_mov_b32_e32 v9, s10
; SI-NEXT: v_mov_b32_e32 v10, s6
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, s4, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s16, s18, 0xff
@@ -54389,16 +54729,15 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_or_b32 s21, s22, s21
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s22, s41, 0xff
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_lshl_b32 s23, s40, 8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v2, v2, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_addk_i32 s22, 0x300
; SI-NEXT: s_and_b32 s22, s22, 0xffff
@@ -54418,312 +54757,366 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_mov_b32_e32 v7, s21
; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v3, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v3, s17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v1, v38, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v63, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v37, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v60, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v42, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v41, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v51, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v34, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v57, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
@@ -54745,7 +55138,7 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v128i8_to_v32f32_scalar:
@@ -54767,15 +55160,17 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_readfirstlane_b32 s45, v15
-; VI-NEXT: v_readfirstlane_b32 s46, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
; VI-NEXT: v_readfirstlane_b32 s76, v0
-; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; VI-NEXT: v_readfirstlane_b32 s73, v3
+; VI-NEXT: v_readfirstlane_b32 s47, v13
+; VI-NEXT: v_readfirstlane_b32 s61, v7
+; VI-NEXT: v_readfirstlane_b32 s62, v6
+; VI-NEXT: v_readfirstlane_b32 s63, v5
+; VI-NEXT: v_readfirstlane_b32 s58, v10
+; VI-NEXT: v_readfirstlane_b32 s59, v9
+; VI-NEXT: v_readfirstlane_b32 s60, v8
; VI-NEXT: v_readfirstlane_b32 s6, v30
; VI-NEXT: v_readfirstlane_b32 s7, v29
; VI-NEXT: v_readfirstlane_b32 s8, v28
@@ -54791,448 +55186,424 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s42, v18
; VI-NEXT: v_readfirstlane_b32 s43, v17
; VI-NEXT: v_readfirstlane_b32 s44, v16
+; VI-NEXT: v_readfirstlane_b32 s45, v15
+; VI-NEXT: v_readfirstlane_b32 s46, v14
; VI-NEXT: v_readfirstlane_b32 s56, v12
; VI-NEXT: v_readfirstlane_b32 s57, v11
-; VI-NEXT: v_readfirstlane_b32 s58, v10
-; VI-NEXT: v_readfirstlane_b32 s59, v9
-; VI-NEXT: v_readfirstlane_b32 s60, v8
-; VI-NEXT: v_readfirstlane_b32 s61, v7
-; VI-NEXT: v_readfirstlane_b32 s62, v6
-; VI-NEXT: v_readfirstlane_b32 s63, v5
; VI-NEXT: v_readfirstlane_b32 s72, v4
-; VI-NEXT: v_readfirstlane_b32 s73, v3
; VI-NEXT: v_readfirstlane_b32 s74, v2
; VI-NEXT: v_readfirstlane_b32 s75, v1
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:180
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; VI-NEXT: s_and_b64 s[4:5], vcc, exec
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB39_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: v_mov_b32_e32 v2, s21
-; VI-NEXT: v_perm_b32 v3, s22, v3, v11
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_perm_b32 v2, s20, v2, v11
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v0, v0, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v3
+; VI-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v4, s23
+; VI-NEXT: v_mov_b32_e32 v2, s19
+; VI-NEXT: v_mov_b32_e32 v3, s21
+; VI-NEXT: v_perm_b32 v4, s22, v4, v20
+; VI-NEXT: v_mov_b32_e32 v13, s17
+; VI-NEXT: v_perm_b32 v2, s18, v2, v20
+; VI-NEXT: v_perm_b32 v3, s20, v3, v20
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_perm_b32 v13, s16, v13, v20
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_mov_b32_e32 v19, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v4
; VI-NEXT: v_mov_b32_e32 v3, s27
+; VI-NEXT: v_mov_b32_e32 v22, v0
+; VI-NEXT: v_or_b32_e32 v0, v13, v2
; VI-NEXT: v_mov_b32_e32 v2, s25
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
+; VI-NEXT: v_perm_b32 v3, s26, v3, v20
+; VI-NEXT: v_perm_b32 v2, s24, v2, v20
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_mov_b32_e32 v4, s75
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
+; VI-NEXT: v_perm_b32 v4, s76, v4, v20
+; VI-NEXT: v_mov_b32_e32 v44, v5
+; VI-NEXT: v_perm_b32 v3, s28, v3, v20
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_mov_b32_e32 v5, s63
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s73
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
+; VI-NEXT: v_perm_b32 v5, s72, v5, v20
+; VI-NEXT: v_mov_b32_e32 v46, v6
+; VI-NEXT: v_perm_b32 v4, s74, v4, v20
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_mov_b32_e32 v6, s59
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s61
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
+; VI-NEXT: v_perm_b32 v6, s60, v6, v20
+; VI-NEXT: v_mov_b32_e32 v45, v7
+; VI-NEXT: v_perm_b32 v5, s62, v5, v20
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_mov_b32_e32 v7, s47
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s57
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
+; VI-NEXT: v_perm_b32 v7, s56, v7, v20
+; VI-NEXT: v_mov_b32_e32 v47, v40
+; VI-NEXT: v_mov_b32_e32 v40, v8
+; VI-NEXT: v_perm_b32 v6, s58, v6, v20
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_mov_b32_e32 v8, s43
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s45
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
+; VI-NEXT: v_perm_b32 v8, s44, v8, v20
+; VI-NEXT: v_mov_b32_e32 v43, v9
+; VI-NEXT: v_perm_b32 v7, s46, v7, v20
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s41
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
+; VI-NEXT: v_perm_b32 v9, s40, v9, v20
+; VI-NEXT: v_mov_b32_e32 v56, v41
+; VI-NEXT: v_mov_b32_e32 v41, v10
+; VI-NEXT: v_perm_b32 v8, s42, v8, v20
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_mov_b32_e32 v10, s11
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s13
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
+; VI-NEXT: v_perm_b32 v10, s12, v10, v20
+; VI-NEXT: v_mov_b32_e32 v42, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v20
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v12, s7
+; VI-NEXT: v_mov_b32_e32 v11, s7
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s9
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v20
+; VI-NEXT: v_perm_b32 v10, s10, v10, v20
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_e32 v10, v10, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v14, v13, s4
-; VI-NEXT: v_perm_b32 v11, s6, v15, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v52, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v54, v53, s4
-; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v48, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v14, v50, v49, s4
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v36, v35, s4
+; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: v_perm_b32 v14, v52, v14, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v15, v38, v37, s4
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v32, v16, s4
+; VI-NEXT: v_perm_b32 v15, v48, v15, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v16, v34, v33, s4
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v60, v17, s4
+; VI-NEXT: v_perm_b32 v16, v50, v16, s4
+; VI-NEXT: v_perm_b32 v18, v42, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_perm_b32 v17, v62, v61, s4
-; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_perm_b32 v17, v59, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_perm_b32 v18, v41, v40, s4
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_perm_b32 v18, v57, v19, s4
+; VI-NEXT: v_perm_b32 v17, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v19, v42, v58, s4
+; VI-NEXT: v_perm_b32 v19, v63, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v45, v20, s4
+; VI-NEXT: v_perm_b32 v19, v23, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_perm_b32 v20, v56, v47, s4
+; VI-NEXT: v_perm_b32 v23, v34, v33, s4
+; VI-NEXT: v_perm_b32 v24, v41, v43, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, s6, v11, v20
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v20, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v11, v11, v13
+; VI-NEXT: v_perm_b32 v13, v21, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v12, v12, v13
+; VI-NEXT: v_perm_b32 v13, v27, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_perm_b32 v20, v57, v28, s4
+; VI-NEXT: v_or_b32_e32 v13, v20, v13
+; VI-NEXT: v_perm_b32 v20, v55, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v20, v14
+; VI-NEXT: v_perm_b32 v20, v54, v53, s4
+; VI-NEXT: v_or_b32_e32 v15, v20, v15
+; VI-NEXT: v_perm_b32 v20, v39, v36, s4
+; VI-NEXT: v_or_b32_e32 v16, v20, v16
+; VI-NEXT: v_perm_b32 v20, v49, v38, s4
+; VI-NEXT: v_or_b32_e32 v17, v20, v17
+; VI-NEXT: v_perm_b32 v20, v62, v22, s4
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v44, v21, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v25, v58, s4
+; VI-NEXT: v_perm_b32 v22, v30, v31, s4
+; VI-NEXT: v_perm_b32 v25, v45, v46, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v26, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_perm_b32 v21, v46, v26, s4
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v31, v22, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v21, v37, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_perm_b32 v22, v24, v43, s4
; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v28, v23, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v32, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_perm_b32 v23, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v25, v63, s4
-; VI-NEXT: v_mov_b32_e32 v44, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v40, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_perm_b32 v24, v27, v55, s4
; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v57, v56
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v25, v24, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v24, v44, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_or_b32_e32 v25, v25, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_e32 v26, v26, v28
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v27, v27, v29
+; VI-NEXT: v_perm_b32 v29, v47, v56, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v28, v59, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v46, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_perm_b32 v32, v33, v32, s4
+; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB39_3
; VI-NEXT: .LBB39_2:
-; VI-NEXT: v_mov_b32_e32 v57, v56
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v44, v24
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB39_3: ; %Flow
-; VI-NEXT: v_mov_b32_e32 v43, v44
-; VI-NEXT: v_mov_b32_e32 v44, v45
-; VI-NEXT: v_mov_b32_e32 v45, v47
-; VI-NEXT: v_mov_b32_e32 v46, v57
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
@@ -55240,11 +55611,11 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
+; VI-NEXT: v_perm_b32 v0, s16, v0, v12
+; VI-NEXT: v_perm_b32 v1, s18, v1, v12
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55252,8 +55623,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v1, s21
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: v_mov_b32_e32 v2, s23
-; VI-NEXT: v_perm_b32 v1, s20, v1, v11
-; VI-NEXT: v_perm_b32 v2, s22, v2, v11
+; VI-NEXT: v_perm_b32 v1, s20, v1, v12
+; VI-NEXT: v_perm_b32 v2, s22, v2, v12
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55261,8 +55632,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v2, s25
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: v_mov_b32_e32 v3, s27
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
+; VI-NEXT: v_perm_b32 v2, s24, v2, v12
+; VI-NEXT: v_perm_b32 v3, s26, v3, v12
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55270,8 +55641,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: s_add_i32 s76, s76, 3
; VI-NEXT: v_mov_b32_e32 v4, s75
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
+; VI-NEXT: v_perm_b32 v3, s28, v3, v12
+; VI-NEXT: v_perm_b32 v4, s76, v4, v12
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55279,8 +55650,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v4, s73
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: v_mov_b32_e32 v5, s63
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
+; VI-NEXT: v_perm_b32 v4, s74, v4, v12
+; VI-NEXT: v_perm_b32 v5, s72, v5, v12
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55288,8 +55659,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v5, s61
; VI-NEXT: s_add_i32 s60, s60, 3
; VI-NEXT: v_mov_b32_e32 v6, s59
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
+; VI-NEXT: v_perm_b32 v5, s62, v5, v12
+; VI-NEXT: v_perm_b32 v6, s60, v6, v12
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55297,8 +55668,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v6, s57
; VI-NEXT: s_add_i32 s56, s56, 3
; VI-NEXT: v_mov_b32_e32 v7, s47
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
+; VI-NEXT: v_perm_b32 v6, s58, v6, v12
+; VI-NEXT: v_perm_b32 v7, s56, v7, v12
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55306,8 +55677,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v7, s45
; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: v_mov_b32_e32 v8, s43
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
+; VI-NEXT: v_perm_b32 v7, s46, v7, v12
+; VI-NEXT: v_perm_b32 v8, s44, v8, v12
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55315,8 +55686,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v8, s41
; VI-NEXT: s_add_i32 s40, s40, 3
; VI-NEXT: v_mov_b32_e32 v9, s15
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
+; VI-NEXT: v_perm_b32 v8, s42, v8, v12
+; VI-NEXT: v_perm_b32 v9, s40, v9, v12
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -55324,37 +55695,23 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v9, s13
; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: v_mov_b32_e32 v10, s11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v12
+; VI-NEXT: v_perm_b32 v10, s12, v10, v12
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_add_i32 s10, s10, 3
; VI-NEXT: v_mov_b32_e32 v10, s9
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_mov_b32_e32 v12, s7
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
+; VI-NEXT: v_mov_b32_e32 v11, s7
+; VI-NEXT: v_perm_b32 v10, s10, v10, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v12
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v32
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v14, v14, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v15, v15, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -55366,254 +55723,337 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v11, s6, v12, v11
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11
-; VI-NEXT: v_perm_b32 v16, v16, v17, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60
-; VI-NEXT: v_perm_b32 v17, v17, v18, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v57
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v18, v18, v19, s4
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v19
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52
-; VI-NEXT: v_perm_b32 v12, v12, v53, s4
-; VI-NEXT: v_perm_b32 v13, v13, v51, s4
+; VI-NEXT: v_perm_b32 v12, s6, v11, v12
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50
-; VI-NEXT: v_perm_b32 v13, v13, v49, s4
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
-; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v14, v14, v37, s4
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
-; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v15, v15, v33, s4
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
-; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v16, v16, v61, s4
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
-; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41
-; VI-NEXT: v_perm_b32 v17, v17, v40, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
-; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42
-; VI-NEXT: v_perm_b32 v18, v18, v47, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v13, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v12, s4
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v14, v12, s4
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v15, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v14, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v16, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; VI-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v17, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v18, v16, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v19, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v19, v18, s4
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20
-; VI-NEXT: v_perm_b32 v20, v20, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45
-; VI-NEXT: v_perm_b32 v20, v20, v44, s4
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v20, v18, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v20, v19, s4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v21, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43
-; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v21, v20, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v20, v22, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v22, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x300, v23
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v24, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; VI-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v23, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v25, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v26, v24, s4
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v27, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v28, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v28, v27, s4
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v28, v29, v28, s4
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v30, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v29
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v31, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v30, v32, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
+; VI-NEXT: v_add_u32_e32 v33, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32
-; VI-NEXT: v_perm_b32 v32, v32, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v31, v33, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB39_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
@@ -55654,15 +56094,17 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_readfirstlane_b32 s45, v15
-; GFX9-NEXT: v_readfirstlane_b32 s46, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
; GFX9-NEXT: v_readfirstlane_b32 s76, v0
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s73, v3
+; GFX9-NEXT: v_readfirstlane_b32 s47, v13
+; GFX9-NEXT: v_readfirstlane_b32 s61, v7
+; GFX9-NEXT: v_readfirstlane_b32 s62, v6
+; GFX9-NEXT: v_readfirstlane_b32 s63, v5
+; GFX9-NEXT: v_readfirstlane_b32 s58, v10
+; GFX9-NEXT: v_readfirstlane_b32 s59, v9
+; GFX9-NEXT: v_readfirstlane_b32 s60, v8
; GFX9-NEXT: v_readfirstlane_b32 s6, v30
; GFX9-NEXT: v_readfirstlane_b32 s7, v29
; GFX9-NEXT: v_readfirstlane_b32 s8, v28
@@ -55678,487 +56120,447 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_readfirstlane_b32 s42, v18
; GFX9-NEXT: v_readfirstlane_b32 s43, v17
; GFX9-NEXT: v_readfirstlane_b32 s44, v16
+; GFX9-NEXT: v_readfirstlane_b32 s45, v15
+; GFX9-NEXT: v_readfirstlane_b32 s46, v14
; GFX9-NEXT: v_readfirstlane_b32 s56, v12
; GFX9-NEXT: v_readfirstlane_b32 s57, v11
-; GFX9-NEXT: v_readfirstlane_b32 s58, v10
-; GFX9-NEXT: v_readfirstlane_b32 s59, v9
-; GFX9-NEXT: v_readfirstlane_b32 s60, v8
-; GFX9-NEXT: v_readfirstlane_b32 s61, v7
-; GFX9-NEXT: v_readfirstlane_b32 s62, v6
-; GFX9-NEXT: v_readfirstlane_b32 s63, v5
; GFX9-NEXT: v_readfirstlane_b32 s72, v4
-; GFX9-NEXT: v_readfirstlane_b32 s73, v3
; GFX9-NEXT: v_readfirstlane_b32 s74, v2
; GFX9-NEXT: v_readfirstlane_b32 s75, v1
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
-; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(55)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(54)
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(49)
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(62)
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB39_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX9-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v4, s23
+; GFX9-NEXT: v_mov_b32_e32 v2, s19
+; GFX9-NEXT: v_mov_b32_e32 v3, s21
+; GFX9-NEXT: v_perm_b32 v4, s22, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v13, s17
+; GFX9-NEXT: v_perm_b32 v2, s18, v2, v20
+; GFX9-NEXT: v_perm_b32 v3, s20, v3, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_perm_b32 v13, s16, v13, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_mov_b32_e32 v19, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_mov_b32_e32 v22, v0
+; GFX9-NEXT: v_or_b32_e32 v0, v13, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v20
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v44, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s63
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v4, s73
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v20
+; GFX9-NEXT: v_mov_b32_e32 v46, v6
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s59
; GFX9-NEXT: v_or_b32_e32 v4, v4, v5
; GFX9-NEXT: v_mov_b32_e32 v5, s61
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v20
+; GFX9-NEXT: v_mov_b32_e32 v45, v7
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s47
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: v_mov_b32_e32 v6, s57
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v20
+; GFX9-NEXT: v_mov_b32_e32 v47, v40
+; GFX9-NEXT: v_mov_b32_e32 v40, v8
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s43
; GFX9-NEXT: v_or_b32_e32 v6, v6, v7
; GFX9-NEXT: v_mov_b32_e32 v7, s45
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v20
+; GFX9-NEXT: v_mov_b32_e32 v43, v9
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: v_mov_b32_e32 v8, s41
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v20
+; GFX9-NEXT: v_mov_b32_e32 v56, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v10
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_mov_b32_e32 v10, s11
; GFX9-NEXT: v_or_b32_e32 v8, v8, v9
; GFX9-NEXT: v_mov_b32_e32 v9, s13
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v20
+; GFX9-NEXT: v_mov_b32_e32 v42, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: v_mov_b32_e32 v10, s9
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v20
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_or_b32_e32 v10, v10, v12
-; GFX9-NEXT: v_perm_b32 v12, v14, v13, s4
-; GFX9-NEXT: v_perm_b32 v11, s6, v15, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX9-NEXT: v_perm_b32 v12, v52, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v54, v53, s4
-; GFX9-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX9-NEXT: v_perm_b32 v13, v48, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v50, v49, s4
-; GFX9-NEXT: v_or_b32_e32 v13, v14, v13
-; GFX9-NEXT: v_perm_b32 v14, v36, v35, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v61, s4
+; GFX9-NEXT: v_perm_b32 v14, v52, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v38, v37, s4
-; GFX9-NEXT: v_or_b32_e32 v14, v15, v14
-; GFX9-NEXT: v_perm_b32 v15, v32, v16, s4
+; GFX9-NEXT: v_perm_b32 v15, v32, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v34, v33, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v16, v15
-; GFX9-NEXT: v_perm_b32 v16, v60, v17, s4
+; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
+; GFX9-NEXT: v_perm_b32 v18, v42, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v17, v62, v61, s4
-; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
-; GFX9-NEXT: v_perm_b32 v17, v59, v18, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v18, v41, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v17, v18, v17
-; GFX9-NEXT: v_perm_b32 v18, v57, v19, s4
+; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v42, v58, s4
+; GFX9-NEXT: v_perm_b32 v19, v63, v19, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v18, v19, v18
-; GFX9-NEXT: v_perm_b32 v19, v45, v20, s4
+; GFX9-NEXT: v_perm_b32 v19, v23, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v56, v47, s4
+; GFX9-NEXT: v_perm_b32 v23, v34, v33, s4
+; GFX9-NEXT: v_perm_b32 v24, v41, v43, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, s6, v11, v20
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v20, v13, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
+; GFX9-NEXT: v_perm_b32 v13, v21, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX9-NEXT: v_perm_b32 v13, v27, v29, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_perm_b32 v20, v57, v28, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v20, v13
+; GFX9-NEXT: v_perm_b32 v20, v55, v48, s4
+; GFX9-NEXT: v_or_b32_e32 v14, v20, v14
+; GFX9-NEXT: v_perm_b32 v20, v54, v39, s4
+; GFX9-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX9-NEXT: v_perm_b32 v20, v36, v50, s4
+; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
+; GFX9-NEXT: v_perm_b32 v20, v49, v38, s4
+; GFX9-NEXT: v_or_b32_e32 v17, v20, v17
+; GFX9-NEXT: v_perm_b32 v20, v62, v22, s4
; GFX9-NEXT: v_or_b32_e32 v19, v20, v19
-; GFX9-NEXT: v_perm_b32 v20, v44, v21, s4
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v25, v58, s4
+; GFX9-NEXT: v_perm_b32 v22, v30, v31, s4
+; GFX9-NEXT: v_perm_b32 v25, v45, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v26, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v46, v26, s4
; GFX9-NEXT: v_or_b32_e32 v20, v21, v20
-; GFX9-NEXT: v_perm_b32 v21, v31, v22, s4
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v37, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v24, v43, s4
; GFX9-NEXT: v_or_b32_e32 v21, v22, v21
-; GFX9-NEXT: v_perm_b32 v22, v28, v23, s4
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v51, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v23, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v22, v23, v22
-; GFX9-NEXT: v_perm_b32 v23, v25, v63, s4
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v40, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_perm_b32 v24, v27, v55, s4
; GFX9-NEXT: v_or_b32_e32 v23, v24, v23
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
; GFX9-NEXT: v_or_b32_e32 v24, v25, v24
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_or_b32_e32 v25, v25, v27
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v26, v25
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v28
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: v_or_b32_e32 v26, v27, v26
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v29
+; GFX9-NEXT: v_perm_b32 v29, v47, v56, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_or_b32_e32 v27, v28, v27
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v28, v59, v28, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v28, v29, v28
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
; GFX9-NEXT: v_or_b32_e32 v29, v30, v29
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
; GFX9-NEXT: v_or_b32_e32 v30, v31, v30
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v43, v46, v43, s4
-; GFX9-NEXT: v_or_b32_e32 v31, v43, v31
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s4
+; GFX9-NEXT: v_or_b32_e32 v31, v32, v31
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB39_3
; GFX9-NEXT: .LBB39_2:
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB39_3: ; %Flow
-; GFX9-NEXT: v_mov_b32_e32 v43, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v47
-; GFX9-NEXT: v_mov_b32_e32 v46, v57
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
@@ -56166,18 +56568,18 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: v_mov_b32_e32 v2, s21
; GFX9-NEXT: s_add_i32 s22, s22, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
+; GFX9-NEXT: v_perm_b32 v0, s16, v0, v12
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
+; GFX9-NEXT: v_perm_b32 v1, s18, v1, v12
+; GFX9-NEXT: v_perm_b32 v2, s20, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s22, v3, v12
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
@@ -56188,8 +56590,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v12
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56197,8 +56599,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: s_add_i32 s76, s76, 3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v12
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v12
; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3
; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56206,8 +56608,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v4, s73
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: v_mov_b32_e32 v5, s63
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v12
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v12
; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4
; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56215,8 +56617,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v5, s61
; GFX9-NEXT: s_add_i32 s60, s60, 3
; GFX9-NEXT: v_mov_b32_e32 v6, s59
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v12
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v12
; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5
; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56224,8 +56626,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v6, s57
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: v_mov_b32_e32 v7, s47
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v12
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v12
; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6
; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56233,8 +56635,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v7, s45
; GFX9-NEXT: s_add_i32 s44, s44, 3
; GFX9-NEXT: v_mov_b32_e32 v8, s43
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v12
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v12
; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7
; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56242,8 +56644,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v8, s41
; GFX9-NEXT: s_add_i32 s40, s40, 3
; GFX9-NEXT: v_mov_b32_e32 v9, s15
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v12
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v12
; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -56251,267 +56653,334 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v9, s13
; GFX9-NEXT: s_add_i32 s12, s12, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v12
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v12
; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: s_add_i32 s10, s10, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s9
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v12
; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: s_waitcnt vmcnt(18)
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v32
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v48
-; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v36
-; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_perm_b32 v16, v16, v17, s5
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v60
-; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_perm_b32 v17, v17, v18, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v57
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v18, v18, v19, s5
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v11, s6, v12, v11
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11
-; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v19
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v12
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s5
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v54
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v52
-; GFX9-NEXT: v_perm_b32 v12, v12, v53, s5
-; GFX9-NEXT: v_perm_b32 v13, v13, v51, s5
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, s6, v11, v12
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12
-; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v50
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, v13, v11, s5
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v13, v12, s5
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v38
-; GFX9-NEXT: v_perm_b32 v14, v14, v37, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, v14, v12, s5
+; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v14, v13, s5
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v34
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v15, v13, s5
+; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v15, v14, s5
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v62
-; GFX9-NEXT: v_perm_b32 v16, v16, v61, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v16, v14, s5
+; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v15, s5
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v16
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v41
-; GFX9-NEXT: v_perm_b32 v17, v17, v40, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v17, v15, s5
+; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v42
-; GFX9-NEXT: v_perm_b32 v18, v18, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v18, v16, s5
+; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v18, v17, s5
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v18
-; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v46
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s5
+; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v19, v18, s5
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v19
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v20
-; GFX9-NEXT: v_perm_b32 v20, v20, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v45
-; GFX9-NEXT: v_perm_b32 v20, v20, v44, s5
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v20, v18, s5
+; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v20, v19, s5
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v20
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v21
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v43
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v21, v19, s5
+; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v21, v20, s5
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v21
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v22, v20, s5
+; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v22, v21, s5
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v23, v21, s5
+; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v23, v23, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v23
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v24, v22, s5
+; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v24, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v24
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v25, v23, s5
+; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v24, s5
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v26, v24, s5
+; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v25
; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
+; GFX9-NEXT: v_perm_b32 v25, v26, v25, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v27, v25, s5
+; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
-; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v26
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
+; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v26, v28, v26, s5
+; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v27
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v27
+; GFX9-NEXT: v_perm_b32 v27, v28, v27, s5
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v29, v27, s5
+; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v30, v28, s5
; GFX9-NEXT: v_add_u32_sdwa v28, v28, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
+; GFX9-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v28
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_perm_b32 v29, v30, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v29, v31, v29, s5
; GFX9-NEXT: v_add_u32_sdwa v29, v29, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v30
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
+; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v30, v32, v30, s5
; GFX9-NEXT: v_add_u32_sdwa v30, v30, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
+; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v30
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s5
+; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v31
+; GFX9-NEXT: v_add_u32_e32 v33, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
-; GFX9-NEXT: v_perm_b32 v32, v32, v33, s5
-; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v31, v33, v31, s5
+; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: .LBB39_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -59140,109 +59609,112 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB41_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB41_3
; VI-NEXT: .LBB41_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB41_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB41_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f32_e64 v15, s31, 1.0
-; VI-NEXT: v_add_f32_e64 v14, s30, 1.0
-; VI-NEXT: v_add_f32_e64 v13, s29, 1.0
-; VI-NEXT: v_add_f32_e64 v12, s28, 1.0
-; VI-NEXT: v_add_f32_e64 v11, s27, 1.0
-; VI-NEXT: v_add_f32_e64 v10, s26, 1.0
-; VI-NEXT: v_add_f32_e64 v9, s25, 1.0
-; VI-NEXT: v_add_f32_e64 v8, s24, 1.0
-; VI-NEXT: v_add_f32_e64 v7, s23, 1.0
-; VI-NEXT: v_add_f32_e64 v6, s22, 1.0
-; VI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; VI-NEXT: v_add_f32_e64 v4, s20, 1.0
-; VI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; VI-NEXT: v_add_f32_e64 v2, s18, 1.0
-; VI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; VI-NEXT: v_add_f32_e64 v0, s16, 1.0
-; VI-NEXT: v_add_f32_e64 v31, s51, 1.0
-; VI-NEXT: v_add_f32_e64 v30, s50, 1.0
-; VI-NEXT: v_add_f32_e64 v29, s49, 1.0
-; VI-NEXT: v_add_f32_e64 v28, s48, 1.0
-; VI-NEXT: v_add_f32_e64 v27, s47, 1.0
-; VI-NEXT: v_add_f32_e64 v26, s46, 1.0
-; VI-NEXT: v_add_f32_e64 v25, s45, 1.0
-; VI-NEXT: v_add_f32_e64 v24, s44, 1.0
-; VI-NEXT: v_add_f32_e64 v23, s43, 1.0
-; VI-NEXT: v_add_f32_e64 v22, s42, 1.0
-; VI-NEXT: v_add_f32_e64 v21, s41, 1.0
-; VI-NEXT: v_add_f32_e64 v20, s40, 1.0
-; VI-NEXT: v_add_f32_e64 v19, s39, 1.0
-; VI-NEXT: v_add_f32_e64 v18, s38, 1.0
-; VI-NEXT: v_add_f32_e64 v17, s37, 1.0
-; VI-NEXT: v_add_f32_e64 v16, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v15, s51, 1.0
+; VI-NEXT: v_add_f32_e64 v14, s50, 1.0
+; VI-NEXT: v_add_f32_e64 v13, s49, 1.0
+; VI-NEXT: v_add_f32_e64 v12, s48, 1.0
+; VI-NEXT: v_add_f32_e64 v11, s47, 1.0
+; VI-NEXT: v_add_f32_e64 v10, s46, 1.0
+; VI-NEXT: v_add_f32_e64 v9, s45, 1.0
+; VI-NEXT: v_add_f32_e64 v8, s44, 1.0
+; VI-NEXT: v_add_f32_e64 v7, s43, 1.0
+; VI-NEXT: v_add_f32_e64 v6, s42, 1.0
+; VI-NEXT: v_add_f32_e64 v5, s41, 1.0
+; VI-NEXT: v_add_f32_e64 v4, s40, 1.0
+; VI-NEXT: v_add_f32_e64 v3, s39, 1.0
+; VI-NEXT: v_add_f32_e64 v2, s38, 1.0
+; VI-NEXT: v_add_f32_e64 v1, s37, 1.0
+; VI-NEXT: v_add_f32_e64 v0, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v31, s19, 1.0
+; VI-NEXT: v_add_f32_e64 v30, s18, 1.0
+; VI-NEXT: v_add_f32_e64 v29, s17, 1.0
+; VI-NEXT: v_add_f32_e64 v28, s16, 1.0
+; VI-NEXT: v_add_f32_e64 v27, s15, 1.0
+; VI-NEXT: v_add_f32_e64 v26, s14, 1.0
+; VI-NEXT: v_add_f32_e64 v25, s13, 1.0
+; VI-NEXT: v_add_f32_e64 v24, s12, 1.0
+; VI-NEXT: v_add_f32_e64 v23, s11, 1.0
+; VI-NEXT: v_add_f32_e64 v22, s10, 1.0
+; VI-NEXT: v_add_f32_e64 v21, s9, 1.0
+; VI-NEXT: v_add_f32_e64 v20, s8, 1.0
+; VI-NEXT: v_add_f32_e64 v19, s7, 1.0
+; VI-NEXT: v_add_f32_e64 v18, s6, 1.0
+; VI-NEXT: v_add_f32_e64 v17, s5, 1.0
+; VI-NEXT: v_add_f32_e64 v16, s4, 1.0
; VI-NEXT: s_branch .LBB41_6
; VI-NEXT: .LBB41_5:
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: .LBB41_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -59271,109 +59743,112 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB41_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB41_3
; GFX9-NEXT: .LBB41_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB41_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB41_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f32_e64 v15, s31, 1.0
-; GFX9-NEXT: v_add_f32_e64 v14, s30, 1.0
-; GFX9-NEXT: v_add_f32_e64 v13, s29, 1.0
-; GFX9-NEXT: v_add_f32_e64 v12, s28, 1.0
-; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.0
-; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.0
-; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.0
-; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.0
-; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.0
-; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.0
-; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.0
-; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.0
-; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.0
-; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.0
-; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0
-; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0
-; GFX9-NEXT: v_add_f32_e64 v31, s51, 1.0
-; GFX9-NEXT: v_add_f32_e64 v30, s50, 1.0
-; GFX9-NEXT: v_add_f32_e64 v29, s49, 1.0
-; GFX9-NEXT: v_add_f32_e64 v28, s48, 1.0
-; GFX9-NEXT: v_add_f32_e64 v27, s47, 1.0
-; GFX9-NEXT: v_add_f32_e64 v26, s46, 1.0
-; GFX9-NEXT: v_add_f32_e64 v25, s45, 1.0
-; GFX9-NEXT: v_add_f32_e64 v24, s44, 1.0
-; GFX9-NEXT: v_add_f32_e64 v23, s43, 1.0
-; GFX9-NEXT: v_add_f32_e64 v22, s42, 1.0
-; GFX9-NEXT: v_add_f32_e64 v21, s41, 1.0
-; GFX9-NEXT: v_add_f32_e64 v20, s40, 1.0
-; GFX9-NEXT: v_add_f32_e64 v19, s39, 1.0
-; GFX9-NEXT: v_add_f32_e64 v18, s38, 1.0
-; GFX9-NEXT: v_add_f32_e64 v17, s37, 1.0
-; GFX9-NEXT: v_add_f32_e64 v16, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v15, s51, 1.0
+; GFX9-NEXT: v_add_f32_e64 v14, s50, 1.0
+; GFX9-NEXT: v_add_f32_e64 v13, s49, 1.0
+; GFX9-NEXT: v_add_f32_e64 v12, s48, 1.0
+; GFX9-NEXT: v_add_f32_e64 v11, s47, 1.0
+; GFX9-NEXT: v_add_f32_e64 v10, s46, 1.0
+; GFX9-NEXT: v_add_f32_e64 v9, s45, 1.0
+; GFX9-NEXT: v_add_f32_e64 v8, s44, 1.0
+; GFX9-NEXT: v_add_f32_e64 v7, s43, 1.0
+; GFX9-NEXT: v_add_f32_e64 v6, s42, 1.0
+; GFX9-NEXT: v_add_f32_e64 v5, s41, 1.0
+; GFX9-NEXT: v_add_f32_e64 v4, s40, 1.0
+; GFX9-NEXT: v_add_f32_e64 v3, s39, 1.0
+; GFX9-NEXT: v_add_f32_e64 v2, s38, 1.0
+; GFX9-NEXT: v_add_f32_e64 v1, s37, 1.0
+; GFX9-NEXT: v_add_f32_e64 v0, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v31, s19, 1.0
+; GFX9-NEXT: v_add_f32_e64 v30, s18, 1.0
+; GFX9-NEXT: v_add_f32_e64 v29, s17, 1.0
+; GFX9-NEXT: v_add_f32_e64 v28, s16, 1.0
+; GFX9-NEXT: v_add_f32_e64 v27, s15, 1.0
+; GFX9-NEXT: v_add_f32_e64 v26, s14, 1.0
+; GFX9-NEXT: v_add_f32_e64 v25, s13, 1.0
+; GFX9-NEXT: v_add_f32_e64 v24, s12, 1.0
+; GFX9-NEXT: v_add_f32_e64 v23, s11, 1.0
+; GFX9-NEXT: v_add_f32_e64 v22, s10, 1.0
+; GFX9-NEXT: v_add_f32_e64 v21, s9, 1.0
+; GFX9-NEXT: v_add_f32_e64 v20, s8, 1.0
+; GFX9-NEXT: v_add_f32_e64 v19, s7, 1.0
+; GFX9-NEXT: v_add_f32_e64 v18, s6, 1.0
+; GFX9-NEXT: v_add_f32_e64 v17, s5, 1.0
+; GFX9-NEXT: v_add_f32_e64 v16, s4, 1.0
; GFX9-NEXT: s_branch .LBB41_6
; GFX9-NEXT: .LBB41_5:
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: .LBB41_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -62467,7 +62942,7 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -62489,98 +62964,85 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31
-; SI-NEXT: v_readfirstlane_b32 s90, v5
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi
-; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95
; SI-NEXT: v_readfirstlane_b32 s78, v7
-; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89
; SI-NEXT: v_readfirstlane_b32 s74, v9
-; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s72, v10
; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
; SI-NEXT: v_readfirstlane_b32 s62, v11
; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75
; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73
; SI-NEXT: v_readfirstlane_b32 s58, v13
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63
; SI-NEXT: v_readfirstlane_b32 s56, v14
; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61
-; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s92, v4
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92
+; SI-NEXT: v_readfirstlane_b32 s90, v5
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: v_readfirstlane_b32 s88, v6
+; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: v_readfirstlane_b32 s76, v8
+; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
; SI-NEXT: s_lshl_b32 s15, s24, 16
@@ -62602,490 +63064,427 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s62, 16
; SI-NEXT: s_lshl_b32 s72, s72, 16
; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
; SI-NEXT: s_lshl_b32 s30, s30, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s10
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s42
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, v1
-; SI-NEXT: v_mov_b32_e32 v43, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: v_mov_b32_e32 v36, v47
-; SI-NEXT: v_mov_b32_e32 v50, v49
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v40, v41
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v48, v37
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v48
+; SI-NEXT: v_mov_b32_e32 v62, v35
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; SI-NEXT: v_mov_b32_e32 v29, v54
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v30, v46
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v2, v34
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v39, v33
; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v3, v17
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v4, v20
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v5, v19
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v39
+; SI-NEXT: v_lshr_b64 v[3:4], v[32:33], 16
+; SI-NEXT: v_mov_b32_e32 v4, v41
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[4:5], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v5, v26
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16
-; SI-NEXT: v_mov_b32_e32 v6, v13
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16
-; SI-NEXT: v_mov_b32_e32 v7, v31
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[6:7], v[25:26], 16
+; SI-NEXT: v_mov_b32_e32 v7, v24
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v8, v23
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v44, v45
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; SI-NEXT: v_mov_b32_e32 v9, v25
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16
-; SI-NEXT: v_mov_b32_e32 v10, v30
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v61
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v33
+; SI-NEXT: v_lshr_b64 v[10:11], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v13, v60
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshr_b64 v[11:12], v[59:60], 16
+; SI-NEXT: v_mov_b32_e32 v14, v59
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v15
+; SI-NEXT: v_mov_b32_e32 v60, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[58:59], 16
+; SI-NEXT: v_mov_b32_e32 v15, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v16
+; SI-NEXT: v_mov_b32_e32 v59, v14
+; SI-NEXT: v_lshr_b64 v[13:14], v[57:58], 16
+; SI-NEXT: v_mov_b32_e32 v16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
+; SI-NEXT: v_mov_b32_e32 v58, v15
+; SI-NEXT: v_lshr_b64 v[14:15], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v17, v56
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
+; SI-NEXT: v_mov_b32_e32 v57, v16
+; SI-NEXT: v_lshr_b64 v[15:16], v[55:56], 16
+; SI-NEXT: v_mov_b32_e32 v56, v17
+; SI-NEXT: v_lshr_b64 v[16:17], v[51:52], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v20
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v49
+; SI-NEXT: v_mov_b32_e32 v49, v44
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v11, v27
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v54
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12
-; SI-NEXT: v_mov_b32_e32 v12, v61
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v21
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16
-; SI-NEXT: v_mov_b32_e32 v13, v29
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v14, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v62, v39
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15
-; SI-NEXT: v_mov_b32_e32 v15, v60
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16
-; SI-NEXT: v_mov_b32_e32 v16, v33
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v50
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16
-; SI-NEXT: v_mov_b32_e32 v17, v57
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47
-; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
-; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16
-; SI-NEXT: v_mov_b32_e32 v20, v38
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
+; SI-NEXT: v_mov_b32_e32 v24, v53
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; SI-NEXT: v_mov_b32_e32 v39, v62
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
-; SI-NEXT: v_mov_b32_e32 v21, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53
-; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v45, v44
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v47, v36
-; SI-NEXT: v_mov_b32_e32 v36, v37
-; SI-NEXT: v_mov_b32_e32 v49, v50
-; SI-NEXT: v_mov_b32_e32 v51, v33
+; SI-NEXT: v_lshr_b64 v[24:25], v[53:54], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v54, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v31
+; SI-NEXT: v_mov_b32_e32 v31, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v26, v43
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[43:44], 16
+; SI-NEXT: v_mov_b32_e32 v27, v28
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16
-; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; SI-NEXT: v_mov_b32_e32 v37, v48
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v35
+; SI-NEXT: v_mov_b32_e32 v35, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[47:48], 16
+; SI-NEXT: v_mov_b32_e32 v44, v49
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[45:46], 16
+; SI-NEXT: v_mov_b32_e32 v46, v30
+; SI-NEXT: v_lshr_b64 v[29:30], v[49:50], 16
+; SI-NEXT: v_mov_b32_e32 v50, v31
+; SI-NEXT: v_lshr_b64 v[30:31], v[42:43], 16
; SI-NEXT: v_mov_b32_e32 v31, v61
-; SI-NEXT: v_mov_b32_e32 v41, v40
+; SI-NEXT: v_mov_b32_e32 v61, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v49, v42
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v58, v56
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB43_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v37, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v33, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v38, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v50, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v40, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_cbranch_scc1 .LBB43_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v34, v56
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v61
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -63094,12 +63493,20 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
@@ -63108,9 +63515,9 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
@@ -63119,9 +63526,9 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
@@ -63130,71 +63537,30 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v60
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v59
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
@@ -63203,15 +63569,29 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v54
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
@@ -63220,9 +63600,9 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
@@ -63231,31 +63611,69 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v50
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
; SI-NEXT: v_mov_b32_e32 v31, v32
@@ -63270,6 +63688,7 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
@@ -63281,7 +63700,7 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -66727,12 +67146,8 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_writelane_b32 v63, s55, 13
; SI-NEXT: v_writelane_b32 v63, s64, 14
; SI-NEXT: v_writelane_b32 v63, s65, 15
-; SI-NEXT: v_writelane_b32 v63, s66, 16
-; SI-NEXT: v_writelane_b32 v63, s67, 17
-; SI-NEXT: v_writelane_b32 v63, s68, 18
-; SI-NEXT: v_writelane_b32 v63, s69, 19
-; SI-NEXT: v_writelane_b32 v63, s30, 20
-; SI-NEXT: v_writelane_b32 v63, s31, 21
+; SI-NEXT: v_writelane_b32 v63, s30, 16
+; SI-NEXT: v_writelane_b32 v63, s31, 17
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -66755,26 +67170,30 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_cbranch_scc0 .LBB45_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s69, s5, 16
-; SI-NEXT: s_lshr_b32 s68, s7, 16
-; SI-NEXT: s_lshr_b32 s67, s9, 16
-; SI-NEXT: s_lshr_b32 s66, s11, 16
-; SI-NEXT: s_lshr_b32 s65, s13, 16
-; SI-NEXT: s_lshr_b32 s64, s15, 16
-; SI-NEXT: s_lshr_b32 s55, s41, 16
-; SI-NEXT: s_lshr_b32 s54, s43, 16
-; SI-NEXT: s_lshr_b32 s53, s45, 16
-; SI-NEXT: s_lshr_b32 s52, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s50, s25, 16
-; SI-NEXT: s_lshr_b32 s49, s23, 16
-; SI-NEXT: s_lshr_b32 s48, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s56, s23, 16
+; SI-NEXT: s_lshr_b32 s57, s21, 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
+; SI-NEXT: s_lshr_b32 s59, s17, 16
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s65, s5, 16
+; SI-NEXT: s_lshr_b32 s64, s7, 16
+; SI-NEXT: s_lshr_b32 s55, s9, 16
+; SI-NEXT: s_lshr_b32 s54, s11, 16
+; SI-NEXT: s_lshr_b32 s53, s13, 16
+; SI-NEXT: s_lshr_b32 s52, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s50, s43, 16
+; SI-NEXT: s_lshr_b32 s49, s45, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s39, s27, 16
+; SI-NEXT: s_lshr_b32 s38, s25, 16
+; SI-NEXT: s_mov_b32 s35, s56
+; SI-NEXT: s_mov_b32 s31, s57
+; SI-NEXT: s_mov_b32 vcc_hi, s58
+; SI-NEXT: s_mov_b32 s47, s59
; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
@@ -66792,41 +67211,41 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; SI-NEXT: .LBB45_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v31, s5, 1.0
@@ -66933,23 +67352,23 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_mov_b32_e32 v32, s38
+; SI-NEXT: v_mov_b32_e32 v32, s47
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v62, s39
-; SI-NEXT: v_mov_b32_e32 v61, s48
-; SI-NEXT: v_mov_b32_e32 v60, s49
-; SI-NEXT: v_mov_b32_e32 v59, s50
-; SI-NEXT: v_mov_b32_e32 v58, s51
-; SI-NEXT: v_mov_b32_e32 v57, s52
-; SI-NEXT: v_mov_b32_e32 v56, s53
-; SI-NEXT: v_mov_b32_e32 v47, s54
-; SI-NEXT: v_mov_b32_e32 v46, s55
-; SI-NEXT: v_mov_b32_e32 v45, s64
-; SI-NEXT: v_mov_b32_e32 v44, s65
-; SI-NEXT: v_mov_b32_e32 v43, s66
-; SI-NEXT: v_mov_b32_e32 v42, s67
-; SI-NEXT: v_mov_b32_e32 v41, s68
-; SI-NEXT: v_mov_b32_e32 v55, s69
+; SI-NEXT: v_mov_b32_e32 v62, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v61, s31
+; SI-NEXT: v_mov_b32_e32 v60, s35
+; SI-NEXT: v_mov_b32_e32 v59, s38
+; SI-NEXT: v_mov_b32_e32 v58, s39
+; SI-NEXT: v_mov_b32_e32 v57, s48
+; SI-NEXT: v_mov_b32_e32 v56, s49
+; SI-NEXT: v_mov_b32_e32 v47, s50
+; SI-NEXT: v_mov_b32_e32 v46, s51
+; SI-NEXT: v_mov_b32_e32 v45, s52
+; SI-NEXT: v_mov_b32_e32 v44, s53
+; SI-NEXT: v_mov_b32_e32 v43, s54
+; SI-NEXT: v_mov_b32_e32 v42, s55
+; SI-NEXT: v_mov_b32_e32 v41, s64
+; SI-NEXT: v_mov_b32_e32 v55, s65
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mov_b32_e32 v33, s30
; SI-NEXT: s_waitcnt expcnt(0)
@@ -67077,12 +67496,8 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; SI-NEXT: v_readlane_b32 s30, v63, 20
-; SI-NEXT: v_readlane_b32 s31, v63, 21
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s30, v63, 16
+; SI-NEXT: v_readlane_b32 s31, v63, 17
; SI-NEXT: v_readlane_b32 s65, v63, 15
; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
@@ -67124,109 +67539,112 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB45_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB45_3
; VI-NEXT: .LBB45_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB45_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB45_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f32_e64 v15, s31, 1.0
-; VI-NEXT: v_add_f32_e64 v14, s30, 1.0
-; VI-NEXT: v_add_f32_e64 v13, s29, 1.0
-; VI-NEXT: v_add_f32_e64 v12, s28, 1.0
-; VI-NEXT: v_add_f32_e64 v11, s27, 1.0
-; VI-NEXT: v_add_f32_e64 v10, s26, 1.0
-; VI-NEXT: v_add_f32_e64 v9, s25, 1.0
-; VI-NEXT: v_add_f32_e64 v8, s24, 1.0
-; VI-NEXT: v_add_f32_e64 v7, s23, 1.0
-; VI-NEXT: v_add_f32_e64 v6, s22, 1.0
-; VI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; VI-NEXT: v_add_f32_e64 v4, s20, 1.0
-; VI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; VI-NEXT: v_add_f32_e64 v2, s18, 1.0
-; VI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; VI-NEXT: v_add_f32_e64 v0, s16, 1.0
-; VI-NEXT: v_add_f32_e64 v31, s51, 1.0
-; VI-NEXT: v_add_f32_e64 v30, s50, 1.0
-; VI-NEXT: v_add_f32_e64 v29, s49, 1.0
-; VI-NEXT: v_add_f32_e64 v28, s48, 1.0
-; VI-NEXT: v_add_f32_e64 v27, s47, 1.0
-; VI-NEXT: v_add_f32_e64 v26, s46, 1.0
-; VI-NEXT: v_add_f32_e64 v25, s45, 1.0
-; VI-NEXT: v_add_f32_e64 v24, s44, 1.0
-; VI-NEXT: v_add_f32_e64 v23, s43, 1.0
-; VI-NEXT: v_add_f32_e64 v22, s42, 1.0
-; VI-NEXT: v_add_f32_e64 v21, s41, 1.0
-; VI-NEXT: v_add_f32_e64 v20, s40, 1.0
-; VI-NEXT: v_add_f32_e64 v19, s39, 1.0
-; VI-NEXT: v_add_f32_e64 v18, s38, 1.0
-; VI-NEXT: v_add_f32_e64 v17, s37, 1.0
-; VI-NEXT: v_add_f32_e64 v16, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v15, s51, 1.0
+; VI-NEXT: v_add_f32_e64 v14, s50, 1.0
+; VI-NEXT: v_add_f32_e64 v13, s49, 1.0
+; VI-NEXT: v_add_f32_e64 v12, s48, 1.0
+; VI-NEXT: v_add_f32_e64 v11, s47, 1.0
+; VI-NEXT: v_add_f32_e64 v10, s46, 1.0
+; VI-NEXT: v_add_f32_e64 v9, s45, 1.0
+; VI-NEXT: v_add_f32_e64 v8, s44, 1.0
+; VI-NEXT: v_add_f32_e64 v7, s43, 1.0
+; VI-NEXT: v_add_f32_e64 v6, s42, 1.0
+; VI-NEXT: v_add_f32_e64 v5, s41, 1.0
+; VI-NEXT: v_add_f32_e64 v4, s40, 1.0
+; VI-NEXT: v_add_f32_e64 v3, s39, 1.0
+; VI-NEXT: v_add_f32_e64 v2, s38, 1.0
+; VI-NEXT: v_add_f32_e64 v1, s37, 1.0
+; VI-NEXT: v_add_f32_e64 v0, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v31, s19, 1.0
+; VI-NEXT: v_add_f32_e64 v30, s18, 1.0
+; VI-NEXT: v_add_f32_e64 v29, s17, 1.0
+; VI-NEXT: v_add_f32_e64 v28, s16, 1.0
+; VI-NEXT: v_add_f32_e64 v27, s15, 1.0
+; VI-NEXT: v_add_f32_e64 v26, s14, 1.0
+; VI-NEXT: v_add_f32_e64 v25, s13, 1.0
+; VI-NEXT: v_add_f32_e64 v24, s12, 1.0
+; VI-NEXT: v_add_f32_e64 v23, s11, 1.0
+; VI-NEXT: v_add_f32_e64 v22, s10, 1.0
+; VI-NEXT: v_add_f32_e64 v21, s9, 1.0
+; VI-NEXT: v_add_f32_e64 v20, s8, 1.0
+; VI-NEXT: v_add_f32_e64 v19, s7, 1.0
+; VI-NEXT: v_add_f32_e64 v18, s6, 1.0
+; VI-NEXT: v_add_f32_e64 v17, s5, 1.0
+; VI-NEXT: v_add_f32_e64 v16, s4, 1.0
; VI-NEXT: s_branch .LBB45_6
; VI-NEXT: .LBB45_5:
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: .LBB45_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -67255,109 +67673,112 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a,
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB45_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB45_3
; GFX9-NEXT: .LBB45_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB45_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB45_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f32_e64 v15, s31, 1.0
-; GFX9-NEXT: v_add_f32_e64 v14, s30, 1.0
-; GFX9-NEXT: v_add_f32_e64 v13, s29, 1.0
-; GFX9-NEXT: v_add_f32_e64 v12, s28, 1.0
-; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.0
-; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.0
-; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.0
-; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.0
-; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.0
-; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.0
-; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.0
-; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.0
-; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.0
-; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.0
-; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0
-; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0
-; GFX9-NEXT: v_add_f32_e64 v31, s51, 1.0
-; GFX9-NEXT: v_add_f32_e64 v30, s50, 1.0
-; GFX9-NEXT: v_add_f32_e64 v29, s49, 1.0
-; GFX9-NEXT: v_add_f32_e64 v28, s48, 1.0
-; GFX9-NEXT: v_add_f32_e64 v27, s47, 1.0
-; GFX9-NEXT: v_add_f32_e64 v26, s46, 1.0
-; GFX9-NEXT: v_add_f32_e64 v25, s45, 1.0
-; GFX9-NEXT: v_add_f32_e64 v24, s44, 1.0
-; GFX9-NEXT: v_add_f32_e64 v23, s43, 1.0
-; GFX9-NEXT: v_add_f32_e64 v22, s42, 1.0
-; GFX9-NEXT: v_add_f32_e64 v21, s41, 1.0
-; GFX9-NEXT: v_add_f32_e64 v20, s40, 1.0
-; GFX9-NEXT: v_add_f32_e64 v19, s39, 1.0
-; GFX9-NEXT: v_add_f32_e64 v18, s38, 1.0
-; GFX9-NEXT: v_add_f32_e64 v17, s37, 1.0
-; GFX9-NEXT: v_add_f32_e64 v16, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v15, s51, 1.0
+; GFX9-NEXT: v_add_f32_e64 v14, s50, 1.0
+; GFX9-NEXT: v_add_f32_e64 v13, s49, 1.0
+; GFX9-NEXT: v_add_f32_e64 v12, s48, 1.0
+; GFX9-NEXT: v_add_f32_e64 v11, s47, 1.0
+; GFX9-NEXT: v_add_f32_e64 v10, s46, 1.0
+; GFX9-NEXT: v_add_f32_e64 v9, s45, 1.0
+; GFX9-NEXT: v_add_f32_e64 v8, s44, 1.0
+; GFX9-NEXT: v_add_f32_e64 v7, s43, 1.0
+; GFX9-NEXT: v_add_f32_e64 v6, s42, 1.0
+; GFX9-NEXT: v_add_f32_e64 v5, s41, 1.0
+; GFX9-NEXT: v_add_f32_e64 v4, s40, 1.0
+; GFX9-NEXT: v_add_f32_e64 v3, s39, 1.0
+; GFX9-NEXT: v_add_f32_e64 v2, s38, 1.0
+; GFX9-NEXT: v_add_f32_e64 v1, s37, 1.0
+; GFX9-NEXT: v_add_f32_e64 v0, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v31, s19, 1.0
+; GFX9-NEXT: v_add_f32_e64 v30, s18, 1.0
+; GFX9-NEXT: v_add_f32_e64 v29, s17, 1.0
+; GFX9-NEXT: v_add_f32_e64 v28, s16, 1.0
+; GFX9-NEXT: v_add_f32_e64 v27, s15, 1.0
+; GFX9-NEXT: v_add_f32_e64 v26, s14, 1.0
+; GFX9-NEXT: v_add_f32_e64 v25, s13, 1.0
+; GFX9-NEXT: v_add_f32_e64 v24, s12, 1.0
+; GFX9-NEXT: v_add_f32_e64 v23, s11, 1.0
+; GFX9-NEXT: v_add_f32_e64 v22, s10, 1.0
+; GFX9-NEXT: v_add_f32_e64 v21, s9, 1.0
+; GFX9-NEXT: v_add_f32_e64 v20, s8, 1.0
+; GFX9-NEXT: v_add_f32_e64 v19, s7, 1.0
+; GFX9-NEXT: v_add_f32_e64 v18, s6, 1.0
+; GFX9-NEXT: v_add_f32_e64 v17, s5, 1.0
+; GFX9-NEXT: v_add_f32_e64 v16, s4, 1.0
; GFX9-NEXT: s_branch .LBB45_6
; GFX9-NEXT: .LBB45_5:
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: .LBB45_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -68518,14 +68939,14 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s92, v6
; SI-NEXT: v_readfirstlane_b32 s94, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: v_readfirstlane_b32 s30, v3
-; SI-NEXT: v_readfirstlane_b32 s34, v2
-; SI-NEXT: v_readfirstlane_b32 s70, v1
-; SI-NEXT: v_readfirstlane_b32 s81, v0
-; SI-NEXT: s_lshr_b32 s35, s29, 16
-; SI-NEXT: s_lshr_b32 s69, s28, 16
-; SI-NEXT: s_lshr_b32 s80, s27, 16
-; SI-NEXT: s_lshr_b32 s83, s26, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_readfirstlane_b32 s69, v1
+; SI-NEXT: v_readfirstlane_b32 s80, v0
+; SI-NEXT: s_lshr_b32 s34, s29, 16
+; SI-NEXT: s_lshr_b32 s68, s28, 16
+; SI-NEXT: s_lshr_b32 s71, s27, 16
+; SI-NEXT: s_lshr_b32 s82, s26, 16
; SI-NEXT: s_lshr_b32 s84, s25, 16
; SI-NEXT: s_lshr_b32 s85, s24, 16
; SI-NEXT: s_lshr_b32 s86, s23, 16
@@ -68534,7 +68955,7 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s97, s20, 16
; SI-NEXT: s_lshr_b32 s98, s19, 16
; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s7, s17, 16
+; SI-NEXT: s_lshr_b32 s83, s17, 16
; SI-NEXT: s_lshr_b32 s9, s16, 16
; SI-NEXT: s_lshr_b32 s67, s6, 16
; SI-NEXT: s_lshr_b32 s66, s8, 16
@@ -68550,71 +68971,72 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s31, s30, 16
-; SI-NEXT: s_lshr_b32 s68, s34, 16
-; SI-NEXT: s_lshr_b32 s71, s70, 16
-; SI-NEXT: s_lshr_b32 s82, s81, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s4, 16
+; SI-NEXT: s_lshr_b32 s35, s31, 16
+; SI-NEXT: s_lshr_b32 s70, s69, 16
+; SI-NEXT: s_lshr_b32 s81, s80, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v35, s67, 0
; SI-NEXT: v_writelane_b32 v35, s66, 1
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s9, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s99, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s98, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s7, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s83, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s96, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s52, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s53, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -68661,6 +69083,7 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB47_3: ; %Flow
@@ -68671,7 +69094,7 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s83
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -68743,7 +69166,7 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s83
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s82
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
@@ -68754,7 +69177,7 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s71
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
@@ -68763,11 +69186,11 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v13, v11
; SI-NEXT: v_cvt_f32_f16_e32 v13, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
@@ -68778,8 +69201,8 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v15, s29
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s82
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s80
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -68787,11 +69210,11 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s70
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s35
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -68799,11 +69222,11 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a,
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v18, s31
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v19, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v19, s7
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -70090,12 +70513,8 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_writelane_b32 v63, s55, 13
; SI-NEXT: v_writelane_b32 v63, s64, 14
; SI-NEXT: v_writelane_b32 v63, s65, 15
-; SI-NEXT: v_writelane_b32 v63, s66, 16
-; SI-NEXT: v_writelane_b32 v63, s67, 17
-; SI-NEXT: v_writelane_b32 v63, s68, 18
-; SI-NEXT: v_writelane_b32 v63, s69, 19
-; SI-NEXT: v_writelane_b32 v63, s30, 20
-; SI-NEXT: v_writelane_b32 v63, s31, 21
+; SI-NEXT: v_writelane_b32 v63, s30, 16
+; SI-NEXT: v_writelane_b32 v63, s31, 17
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -70118,26 +70537,30 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s69, s5, 16
-; SI-NEXT: s_lshr_b32 s68, s7, 16
-; SI-NEXT: s_lshr_b32 s67, s9, 16
-; SI-NEXT: s_lshr_b32 s66, s11, 16
-; SI-NEXT: s_lshr_b32 s65, s13, 16
-; SI-NEXT: s_lshr_b32 s64, s15, 16
-; SI-NEXT: s_lshr_b32 s55, s41, 16
-; SI-NEXT: s_lshr_b32 s54, s43, 16
-; SI-NEXT: s_lshr_b32 s53, s45, 16
-; SI-NEXT: s_lshr_b32 s52, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s50, s25, 16
-; SI-NEXT: s_lshr_b32 s49, s23, 16
-; SI-NEXT: s_lshr_b32 s48, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s56, s23, 16
+; SI-NEXT: s_lshr_b32 s57, s21, 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
+; SI-NEXT: s_lshr_b32 s59, s17, 16
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s65, s5, 16
+; SI-NEXT: s_lshr_b32 s64, s7, 16
+; SI-NEXT: s_lshr_b32 s55, s9, 16
+; SI-NEXT: s_lshr_b32 s54, s11, 16
+; SI-NEXT: s_lshr_b32 s53, s13, 16
+; SI-NEXT: s_lshr_b32 s52, s15, 16
+; SI-NEXT: s_lshr_b32 s51, s41, 16
+; SI-NEXT: s_lshr_b32 s50, s43, 16
+; SI-NEXT: s_lshr_b32 s49, s45, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s39, s27, 16
+; SI-NEXT: s_lshr_b32 s38, s25, 16
+; SI-NEXT: s_mov_b32 s35, s56
+; SI-NEXT: s_mov_b32 s31, s57
+; SI-NEXT: s_mov_b32 vcc_hi, s58
+; SI-NEXT: s_mov_b32 s47, s59
; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
@@ -70155,41 +70578,41 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; SI-NEXT: .LBB49_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v31, s5, 1.0
@@ -70296,23 +70719,23 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_mov_b32_e32 v32, s38
+; SI-NEXT: v_mov_b32_e32 v32, s47
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v62, s39
-; SI-NEXT: v_mov_b32_e32 v61, s48
-; SI-NEXT: v_mov_b32_e32 v60, s49
-; SI-NEXT: v_mov_b32_e32 v59, s50
-; SI-NEXT: v_mov_b32_e32 v58, s51
-; SI-NEXT: v_mov_b32_e32 v57, s52
-; SI-NEXT: v_mov_b32_e32 v56, s53
-; SI-NEXT: v_mov_b32_e32 v47, s54
-; SI-NEXT: v_mov_b32_e32 v46, s55
-; SI-NEXT: v_mov_b32_e32 v45, s64
-; SI-NEXT: v_mov_b32_e32 v44, s65
-; SI-NEXT: v_mov_b32_e32 v43, s66
-; SI-NEXT: v_mov_b32_e32 v42, s67
-; SI-NEXT: v_mov_b32_e32 v41, s68
-; SI-NEXT: v_mov_b32_e32 v55, s69
+; SI-NEXT: v_mov_b32_e32 v62, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v61, s31
+; SI-NEXT: v_mov_b32_e32 v60, s35
+; SI-NEXT: v_mov_b32_e32 v59, s38
+; SI-NEXT: v_mov_b32_e32 v58, s39
+; SI-NEXT: v_mov_b32_e32 v57, s48
+; SI-NEXT: v_mov_b32_e32 v56, s49
+; SI-NEXT: v_mov_b32_e32 v47, s50
+; SI-NEXT: v_mov_b32_e32 v46, s51
+; SI-NEXT: v_mov_b32_e32 v45, s52
+; SI-NEXT: v_mov_b32_e32 v44, s53
+; SI-NEXT: v_mov_b32_e32 v43, s54
+; SI-NEXT: v_mov_b32_e32 v42, s55
+; SI-NEXT: v_mov_b32_e32 v41, s64
+; SI-NEXT: v_mov_b32_e32 v55, s65
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mov_b32_e32 v33, s30
; SI-NEXT: s_waitcnt expcnt(0)
@@ -70440,12 +70863,8 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; SI-NEXT: v_readlane_b32 s30, v63, 20
-; SI-NEXT: v_readlane_b32 s31, v63, 21
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s30, v63, 16
+; SI-NEXT: v_readlane_b32 s31, v63, 17
; SI-NEXT: v_readlane_b32 s65, v63, 15
; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
@@ -70487,109 +70906,112 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB49_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB49_3
; VI-NEXT: .LBB49_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB49_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB49_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f32_e64 v15, s31, 1.0
-; VI-NEXT: v_add_f32_e64 v14, s30, 1.0
-; VI-NEXT: v_add_f32_e64 v13, s29, 1.0
-; VI-NEXT: v_add_f32_e64 v12, s28, 1.0
-; VI-NEXT: v_add_f32_e64 v11, s27, 1.0
-; VI-NEXT: v_add_f32_e64 v10, s26, 1.0
-; VI-NEXT: v_add_f32_e64 v9, s25, 1.0
-; VI-NEXT: v_add_f32_e64 v8, s24, 1.0
-; VI-NEXT: v_add_f32_e64 v7, s23, 1.0
-; VI-NEXT: v_add_f32_e64 v6, s22, 1.0
-; VI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; VI-NEXT: v_add_f32_e64 v4, s20, 1.0
-; VI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; VI-NEXT: v_add_f32_e64 v2, s18, 1.0
-; VI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; VI-NEXT: v_add_f32_e64 v0, s16, 1.0
-; VI-NEXT: v_add_f32_e64 v31, s51, 1.0
-; VI-NEXT: v_add_f32_e64 v30, s50, 1.0
-; VI-NEXT: v_add_f32_e64 v29, s49, 1.0
-; VI-NEXT: v_add_f32_e64 v28, s48, 1.0
-; VI-NEXT: v_add_f32_e64 v27, s47, 1.0
-; VI-NEXT: v_add_f32_e64 v26, s46, 1.0
-; VI-NEXT: v_add_f32_e64 v25, s45, 1.0
-; VI-NEXT: v_add_f32_e64 v24, s44, 1.0
-; VI-NEXT: v_add_f32_e64 v23, s43, 1.0
-; VI-NEXT: v_add_f32_e64 v22, s42, 1.0
-; VI-NEXT: v_add_f32_e64 v21, s41, 1.0
-; VI-NEXT: v_add_f32_e64 v20, s40, 1.0
-; VI-NEXT: v_add_f32_e64 v19, s39, 1.0
-; VI-NEXT: v_add_f32_e64 v18, s38, 1.0
-; VI-NEXT: v_add_f32_e64 v17, s37, 1.0
-; VI-NEXT: v_add_f32_e64 v16, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v15, s51, 1.0
+; VI-NEXT: v_add_f32_e64 v14, s50, 1.0
+; VI-NEXT: v_add_f32_e64 v13, s49, 1.0
+; VI-NEXT: v_add_f32_e64 v12, s48, 1.0
+; VI-NEXT: v_add_f32_e64 v11, s47, 1.0
+; VI-NEXT: v_add_f32_e64 v10, s46, 1.0
+; VI-NEXT: v_add_f32_e64 v9, s45, 1.0
+; VI-NEXT: v_add_f32_e64 v8, s44, 1.0
+; VI-NEXT: v_add_f32_e64 v7, s43, 1.0
+; VI-NEXT: v_add_f32_e64 v6, s42, 1.0
+; VI-NEXT: v_add_f32_e64 v5, s41, 1.0
+; VI-NEXT: v_add_f32_e64 v4, s40, 1.0
+; VI-NEXT: v_add_f32_e64 v3, s39, 1.0
+; VI-NEXT: v_add_f32_e64 v2, s38, 1.0
+; VI-NEXT: v_add_f32_e64 v1, s37, 1.0
+; VI-NEXT: v_add_f32_e64 v0, s36, 1.0
+; VI-NEXT: v_add_f32_e64 v31, s19, 1.0
+; VI-NEXT: v_add_f32_e64 v30, s18, 1.0
+; VI-NEXT: v_add_f32_e64 v29, s17, 1.0
+; VI-NEXT: v_add_f32_e64 v28, s16, 1.0
+; VI-NEXT: v_add_f32_e64 v27, s15, 1.0
+; VI-NEXT: v_add_f32_e64 v26, s14, 1.0
+; VI-NEXT: v_add_f32_e64 v25, s13, 1.0
+; VI-NEXT: v_add_f32_e64 v24, s12, 1.0
+; VI-NEXT: v_add_f32_e64 v23, s11, 1.0
+; VI-NEXT: v_add_f32_e64 v22, s10, 1.0
+; VI-NEXT: v_add_f32_e64 v21, s9, 1.0
+; VI-NEXT: v_add_f32_e64 v20, s8, 1.0
+; VI-NEXT: v_add_f32_e64 v19, s7, 1.0
+; VI-NEXT: v_add_f32_e64 v18, s6, 1.0
+; VI-NEXT: v_add_f32_e64 v17, s5, 1.0
+; VI-NEXT: v_add_f32_e64 v16, s4, 1.0
; VI-NEXT: s_branch .LBB49_6
; VI-NEXT: .LBB49_5:
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: .LBB49_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -70618,109 +71040,112 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a,
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB49_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB49_3
; GFX9-NEXT: .LBB49_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB49_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB49_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f32_e64 v15, s31, 1.0
-; GFX9-NEXT: v_add_f32_e64 v14, s30, 1.0
-; GFX9-NEXT: v_add_f32_e64 v13, s29, 1.0
-; GFX9-NEXT: v_add_f32_e64 v12, s28, 1.0
-; GFX9-NEXT: v_add_f32_e64 v11, s27, 1.0
-; GFX9-NEXT: v_add_f32_e64 v10, s26, 1.0
-; GFX9-NEXT: v_add_f32_e64 v9, s25, 1.0
-; GFX9-NEXT: v_add_f32_e64 v8, s24, 1.0
-; GFX9-NEXT: v_add_f32_e64 v7, s23, 1.0
-; GFX9-NEXT: v_add_f32_e64 v6, s22, 1.0
-; GFX9-NEXT: v_add_f32_e64 v5, s21, 1.0
-; GFX9-NEXT: v_add_f32_e64 v4, s20, 1.0
-; GFX9-NEXT: v_add_f32_e64 v3, s19, 1.0
-; GFX9-NEXT: v_add_f32_e64 v2, s18, 1.0
-; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0
-; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0
-; GFX9-NEXT: v_add_f32_e64 v31, s51, 1.0
-; GFX9-NEXT: v_add_f32_e64 v30, s50, 1.0
-; GFX9-NEXT: v_add_f32_e64 v29, s49, 1.0
-; GFX9-NEXT: v_add_f32_e64 v28, s48, 1.0
-; GFX9-NEXT: v_add_f32_e64 v27, s47, 1.0
-; GFX9-NEXT: v_add_f32_e64 v26, s46, 1.0
-; GFX9-NEXT: v_add_f32_e64 v25, s45, 1.0
-; GFX9-NEXT: v_add_f32_e64 v24, s44, 1.0
-; GFX9-NEXT: v_add_f32_e64 v23, s43, 1.0
-; GFX9-NEXT: v_add_f32_e64 v22, s42, 1.0
-; GFX9-NEXT: v_add_f32_e64 v21, s41, 1.0
-; GFX9-NEXT: v_add_f32_e64 v20, s40, 1.0
-; GFX9-NEXT: v_add_f32_e64 v19, s39, 1.0
-; GFX9-NEXT: v_add_f32_e64 v18, s38, 1.0
-; GFX9-NEXT: v_add_f32_e64 v17, s37, 1.0
-; GFX9-NEXT: v_add_f32_e64 v16, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v15, s51, 1.0
+; GFX9-NEXT: v_add_f32_e64 v14, s50, 1.0
+; GFX9-NEXT: v_add_f32_e64 v13, s49, 1.0
+; GFX9-NEXT: v_add_f32_e64 v12, s48, 1.0
+; GFX9-NEXT: v_add_f32_e64 v11, s47, 1.0
+; GFX9-NEXT: v_add_f32_e64 v10, s46, 1.0
+; GFX9-NEXT: v_add_f32_e64 v9, s45, 1.0
+; GFX9-NEXT: v_add_f32_e64 v8, s44, 1.0
+; GFX9-NEXT: v_add_f32_e64 v7, s43, 1.0
+; GFX9-NEXT: v_add_f32_e64 v6, s42, 1.0
+; GFX9-NEXT: v_add_f32_e64 v5, s41, 1.0
+; GFX9-NEXT: v_add_f32_e64 v4, s40, 1.0
+; GFX9-NEXT: v_add_f32_e64 v3, s39, 1.0
+; GFX9-NEXT: v_add_f32_e64 v2, s38, 1.0
+; GFX9-NEXT: v_add_f32_e64 v1, s37, 1.0
+; GFX9-NEXT: v_add_f32_e64 v0, s36, 1.0
+; GFX9-NEXT: v_add_f32_e64 v31, s19, 1.0
+; GFX9-NEXT: v_add_f32_e64 v30, s18, 1.0
+; GFX9-NEXT: v_add_f32_e64 v29, s17, 1.0
+; GFX9-NEXT: v_add_f32_e64 v28, s16, 1.0
+; GFX9-NEXT: v_add_f32_e64 v27, s15, 1.0
+; GFX9-NEXT: v_add_f32_e64 v26, s14, 1.0
+; GFX9-NEXT: v_add_f32_e64 v25, s13, 1.0
+; GFX9-NEXT: v_add_f32_e64 v24, s12, 1.0
+; GFX9-NEXT: v_add_f32_e64 v23, s11, 1.0
+; GFX9-NEXT: v_add_f32_e64 v22, s10, 1.0
+; GFX9-NEXT: v_add_f32_e64 v21, s9, 1.0
+; GFX9-NEXT: v_add_f32_e64 v20, s8, 1.0
+; GFX9-NEXT: v_add_f32_e64 v19, s7, 1.0
+; GFX9-NEXT: v_add_f32_e64 v18, s6, 1.0
+; GFX9-NEXT: v_add_f32_e64 v17, s5, 1.0
+; GFX9-NEXT: v_add_f32_e64 v16, s4, 1.0
; GFX9-NEXT: s_branch .LBB49_6
; GFX9-NEXT: .LBB49_5:
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: .LBB49_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -71710,25 +72135,25 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s91, v7
; SI-NEXT: v_readfirstlane_b32 s94, v6
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v5
-; SI-NEXT: v_readfirstlane_b32 s34, v4
-; SI-NEXT: v_readfirstlane_b32 s70, v3
-; SI-NEXT: v_readfirstlane_b32 s81, v2
-; SI-NEXT: v_readfirstlane_b32 s84, v1
-; SI-NEXT: v_readfirstlane_b32 s87, v0
+; SI-NEXT: v_readfirstlane_b32 s31, v4
+; SI-NEXT: v_readfirstlane_b32 s69, v3
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: v_readfirstlane_b32 s83, v1
+; SI-NEXT: v_readfirstlane_b32 s86, v0
; SI-NEXT: s_lshr_b32 s92, s29, 16
; SI-NEXT: s_lshr_b32 s95, s28, 16
-; SI-NEXT: s_lshr_b32 s30, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s71, s24, 16
-; SI-NEXT: s_lshr_b32 s82, s23, 16
-; SI-NEXT: s_lshr_b32 s85, s22, 16
-; SI-NEXT: s_lshr_b32 s96, s21, 16
-; SI-NEXT: s_lshr_b32 s97, s20, 16
-; SI-NEXT: s_lshr_b32 s98, s19, 16
-; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: s_lshr_b32 s8, s16, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s24, 16
+; SI-NEXT: s_lshr_b32 s81, s23, 16
+; SI-NEXT: s_lshr_b32 s84, s22, 16
+; SI-NEXT: s_lshr_b32 s87, s21, 16
+; SI-NEXT: s_lshr_b32 s96, s20, 16
+; SI-NEXT: s_lshr_b32 s97, s19, 16
+; SI-NEXT: s_lshr_b32 s98, s18, 16
+; SI-NEXT: s_lshr_b32 s99, s17, 16
+; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
; SI-NEXT: s_lshr_b32 s12, s11, 16
@@ -71742,75 +72167,76 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s34, 16
-; SI-NEXT: s_lshr_b32 s68, s70, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s35, s69, 16
+; SI-NEXT: s_lshr_b32 s71, s80, 16
+; SI-NEXT: s_lshr_b32 s82, s83, 16
+; SI-NEXT: s_lshr_b32 s85, s86, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v33, s14, 0
; SI-NEXT: v_writelane_b32 v33, s63, 1
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: s_or_b32 s36, s5, s8
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s98, 16
+; SI-NEXT: s_or_b32 s38, s5, s8
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s97, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s6, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s99, 16
+; SI-NEXT: s_or_b32 s39, s5, s8
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s96, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s8
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s87, 16
+; SI-NEXT: s_or_b32 s41, s5, s8
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s84, 16
+; SI-NEXT: s_or_b32 s42, s5, s8
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s81, 16
+; SI-NEXT: s_or_b32 s43, s5, s8
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s70, 16
+; SI-NEXT: s_or_b32 s44, s5, s8
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s68, 16
+; SI-NEXT: s_or_b32 s45, s5, s8
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s8
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_mov_b32 s8, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s47, s5, s4
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s53, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s54, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -71866,6 +72292,7 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s14, s12
; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
+; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB51_3: ; %Flow
@@ -71876,62 +72303,62 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s99, 16
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_add_i32 s37, s5, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s98, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s96, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -71943,30 +72370,30 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_add_i32 s86, s86, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s83, s83, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
@@ -75237,331 +75664,330 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; kill: killed $vgpr34
; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; kill: killed $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_mov_b32_e32 v42, v35
; VI-NEXT: .LBB56_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_4
@@ -75628,266 +76054,267 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
; VI-NEXT: .LBB56_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v7, v7, v38, s4
-; VI-NEXT: v_perm_b32 v10, v10, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v13, v13, v35, s4
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v8, v8, v33, s4
-; VI-NEXT: v_perm_b32 v33, v49, v53, s4
-; VI-NEXT: v_perm_b32 v11, v11, v48, s4
-; VI-NEXT: v_perm_b32 v3, v3, v34, s4
-; VI-NEXT: v_perm_b32 v34, v47, v39, s4
-; VI-NEXT: v_perm_b32 v39, v50, v54, s4
-; VI-NEXT: v_perm_b32 v55, v59, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v52, s4
-; VI-NEXT: v_perm_b32 v2, v2, v58, s4
-; VI-NEXT: v_perm_b32 v51, v51, v40, s4
-; VI-NEXT: v_perm_b32 v4, v4, v57, s4
-; VI-NEXT: v_perm_b32 v5, v5, v56, s4
-; VI-NEXT: v_perm_b32 v6, v6, v46, s4
-; VI-NEXT: v_perm_b32 v9, v9, v45, s4
-; VI-NEXT: v_perm_b32 v12, v12, v63, s4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v36, v36, v37, s4
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: v_perm_b32 v12, v12, v34, s4
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v36, s4
+; VI-NEXT: v_perm_b32 v1, v1, v33, s4
+; VI-NEXT: v_perm_b32 v33, v51, v40, s4
+; VI-NEXT: v_perm_b32 v51, v46, v53, s4
+; VI-NEXT: v_perm_b32 v9, v9, v38, s4
+; VI-NEXT: v_perm_b32 v38, v43, v52, s4
+; VI-NEXT: v_perm_b32 v11, v11, v37, s4
+; VI-NEXT: v_perm_b32 v41, v63, v41, s4
+; VI-NEXT: v_perm_b32 v10, v10, v49, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
+; VI-NEXT: v_perm_b32 v3, v3, v61, s4
+; VI-NEXT: v_perm_b32 v4, v4, v60, s4
+; VI-NEXT: v_perm_b32 v39, v58, v39, s4
+; VI-NEXT: v_perm_b32 v5, v5, v59, s4
+; VI-NEXT: v_perm_b32 v6, v6, v57, s4
+; VI-NEXT: v_perm_b32 v50, v50, v54, s4
+; VI-NEXT: v_perm_b32 v7, v7, v56, s4
+; VI-NEXT: v_perm_b32 v8, v8, v47, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v34, v35, v34, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v38, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v14, v14, v35, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v36, v35, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v35, v48, s4
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v38, v38, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v36, v52, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v17, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v48, s4
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v18, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v48, v49, s4
-; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v49
+; VI-NEXT: v_perm_b32 v49, v36, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v41
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v44, v43, s4
+; VI-NEXT: v_perm_b32 v1, v45, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v62, v61, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v20, v42, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v48, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -75896,157 +76323,159 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v21, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v22, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v23, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v24, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v26, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v28, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v29, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v30, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -76152,321 +76581,324 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; kill: killed $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(24)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: s_waitcnt vmcnt(22)
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; GFX9-NEXT: v_mov_b32_e32 v55, v39
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
; GFX9-NEXT: .LBB56_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v42, v35
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, 3, v1
@@ -76546,416 +76978,402 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v16
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v15
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v13
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v12
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
; GFX9-NEXT: .LBB56_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
-; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4
-; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4
-; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v38, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v5, v5, v52, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v36, s4
+; GFX9-NEXT: v_perm_b32 v36, v51, v54, s4
+; GFX9-NEXT: v_perm_b32 v51, v44, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v50, s4
+; GFX9-NEXT: v_perm_b32 v41, v59, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v63, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v48, s4
; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4
-; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v48, v58, v40, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v62, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v57, s4
+; GFX9-NEXT: v_perm_b32 v39, v46, v39, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v60, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v13, v13, v38, s4
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v50, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4
+; GFX9-NEXT: v_perm_b32 v14, v14, v38, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v35, v35, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v38, v38, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v52, v52, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v17, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v18, v18, v53, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4
+; GFX9-NEXT: v_perm_b32 v53, v53, v44, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4
+; GFX9-NEXT: v_perm_b32 v1, v43, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4
+; GFX9-NEXT: v_perm_b32 v1, v49, v37, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v20, v55, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v42, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v61, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -76979,74 +77397,70 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v16i64_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
@@ -77126,19 +77540,25 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB56_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v48.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -77200,28 +77620,24 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-TRUE16-NEXT: .LBB56_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -77345,50 +77761,50 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: .LBB56_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v59, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v73, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v67, 16, v2
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -77397,9 +77813,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -77475,101 +77890,95 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v16i64_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
@@ -77649,19 +78058,25 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB56_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v55, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -77723,28 +78138,24 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-FAKE16-NEXT: .LBB56_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -77868,50 +78279,51 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: .LBB56_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v63, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v60, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -77920,9 +78332,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -77998,27 +78409,25 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -78104,180 +78513,180 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s45, v2
; SI-NEXT: s_cmp_lg_u32 s44, 0
; SI-NEXT: v_readfirstlane_b32 s44, v1
-; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s46, s27, 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_writelane_b32 v21, s46, 2
-; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 3
-; SI-NEXT: s_lshr_b32 s46, s25, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 4
-; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 5
-; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 6
-; SI-NEXT: s_lshr_b32 s46, s23, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 7
-; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 8
-; SI-NEXT: s_lshr_b32 s46, s21, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 9
-; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 10
-; SI-NEXT: s_lshr_b32 s46, s21, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 11
-; SI-NEXT: s_lshr_b32 s46, s19, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 12
-; SI-NEXT: s_lshr_b32 s46, s19, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 13
-; SI-NEXT: s_lshr_b32 s46, s19, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 14
-; SI-NEXT: s_lshr_b32 s46, s17, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 15
-; SI-NEXT: s_lshr_b32 s46, s17, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 16
-; SI-NEXT: s_lshr_b32 s46, s17, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; SI-NEXT: s_lshr_b32 s47, s45, 24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s46, 62
-; SI-NEXT: v_writelane_b32 v22, s47, 63
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v21, s46, 0
-; SI-NEXT: v_writelane_b32 v21, s47, 1
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 60
-; SI-NEXT: v_writelane_b32 v22, s47, 61
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 58
-; SI-NEXT: v_writelane_b32 v22, s47, 59
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 56
-; SI-NEXT: v_writelane_b32 v22, s47, 57
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 54
-; SI-NEXT: v_writelane_b32 v22, s47, 55
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 52
-; SI-NEXT: v_writelane_b32 v22, s47, 53
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 50
-; SI-NEXT: v_writelane_b32 v22, s47, 51
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 48
-; SI-NEXT: v_writelane_b32 v22, s47, 49
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 46
-; SI-NEXT: v_writelane_b32 v22, s47, 47
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 44
-; SI-NEXT: v_writelane_b32 v22, s47, 45
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 42
-; SI-NEXT: v_writelane_b32 v22, s47, 43
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 40
-; SI-NEXT: v_writelane_b32 v22, s47, 41
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 36
-; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 34
-; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 32
-; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 30
-; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 28
-; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 26
-; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 22
-; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 20
-; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 18
-; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 14
-; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 12
-; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 10
+; SI-NEXT: v_writelane_b32 v22, s47, 10
+; SI-NEXT: s_lshr_b32 s47, s45, 16
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v22, s74, 8
-; SI-NEXT: v_writelane_b32 v22, s75, 9
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s47, s45, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 12
+; SI-NEXT: s_lshr_b32 s47, s29, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 13
+; SI-NEXT: s_lshr_b32 s47, s29, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 14
+; SI-NEXT: s_lshr_b32 s47, s29, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 15
+; SI-NEXT: s_lshr_b32 s47, s27, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 16
+; SI-NEXT: s_lshr_b32 s47, s27, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 17
+; SI-NEXT: s_lshr_b32 s47, s27, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v22, s72, 8
+; SI-NEXT: v_writelane_b32 v22, s73, 9
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s74, 6
; SI-NEXT: v_writelane_b32 v22, s75, 7
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s74, 4
; SI-NEXT: v_writelane_b32 v22, s75, 5
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s74, 2
; SI-NEXT: v_writelane_b32 v22, s75, 3
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 8
; SI-NEXT: v_writelane_b32 v22, s74, 0
-; SI-NEXT: s_lshr_b32 s49, s5, 24
-; SI-NEXT: s_lshr_b32 s64, s5, 16
-; SI-NEXT: s_lshr_b32 s66, s5, 8
-; SI-NEXT: s_lshr_b32 s65, s7, 24
-; SI-NEXT: s_lshr_b32 s38, s7, 16
-; SI-NEXT: s_lshr_b32 s67, s7, 8
-; SI-NEXT: s_lshr_b32 s50, s9, 24
-; SI-NEXT: s_lshr_b32 s51, s9, 16
-; SI-NEXT: s_lshr_b32 s68, s9, 8
-; SI-NEXT: s_lshr_b32 s70, s11, 24
-; SI-NEXT: s_lshr_b32 s69, s11, 16
-; SI-NEXT: s_lshr_b32 s52, s11, 8
-; SI-NEXT: s_lshr_b32 s71, s13, 24
-; SI-NEXT: s_lshr_b32 s53, s13, 16
-; SI-NEXT: s_lshr_b32 s80, s13, 8
-; SI-NEXT: s_lshr_b32 s39, s15, 24
-; SI-NEXT: s_lshr_b32 s81, s15, 16
-; SI-NEXT: s_lshr_b32 s82, s15, 8
-; SI-NEXT: s_lshr_b32 s48, s41, 24
-; SI-NEXT: s_lshr_b32 s83, s41, 16
-; SI-NEXT: s_lshr_b32 s54, s41, 8
-; SI-NEXT: s_lshr_b32 s84, s43, 24
-; SI-NEXT: s_lshr_b32 s55, s43, 16
-; SI-NEXT: s_lshr_b32 s85, s43, 8
-; SI-NEXT: s_lshr_b32 s87, s45, 24
-; SI-NEXT: s_lshr_b32 s86, s45, 16
-; SI-NEXT: s_lshr_b32 s56, s45, 8
-; SI-NEXT: s_lshr_b32 s57, s29, 24
-; SI-NEXT: s_lshr_b32 s62, s29, 16
-; SI-NEXT: s_lshr_b32 s72, s29, 8
-; SI-NEXT: s_lshr_b32 s63, s27, 24
-; SI-NEXT: s_lshr_b32 s73, s27, 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
; SI-NEXT: v_writelane_b32 v22, s75, 1
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 62
+; SI-NEXT: v_writelane_b32 v21, s75, 63
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 60
+; SI-NEXT: v_writelane_b32 v21, s75, 61
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 58
+; SI-NEXT: v_writelane_b32 v21, s75, 59
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 56
+; SI-NEXT: v_writelane_b32 v21, s75, 57
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 54
+; SI-NEXT: v_writelane_b32 v21, s75, 55
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 52
+; SI-NEXT: v_writelane_b32 v21, s75, 53
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 50
+; SI-NEXT: v_writelane_b32 v21, s75, 51
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 48
+; SI-NEXT: v_writelane_b32 v21, s75, 49
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 46
+; SI-NEXT: v_writelane_b32 v21, s75, 47
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 44
+; SI-NEXT: v_writelane_b32 v21, s75, 45
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 42
+; SI-NEXT: v_writelane_b32 v21, s75, 43
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 40
+; SI-NEXT: v_writelane_b32 v21, s75, 41
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 38
+; SI-NEXT: v_writelane_b32 v21, s75, 39
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 36
+; SI-NEXT: v_writelane_b32 v21, s75, 37
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 34
+; SI-NEXT: v_writelane_b32 v21, s75, 35
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 32
+; SI-NEXT: v_writelane_b32 v21, s75, 33
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 30
+; SI-NEXT: v_writelane_b32 v21, s75, 31
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 28
+; SI-NEXT: v_writelane_b32 v21, s75, 29
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 26
+; SI-NEXT: v_writelane_b32 v21, s75, 27
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 24
+; SI-NEXT: v_writelane_b32 v21, s75, 25
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 22
+; SI-NEXT: v_writelane_b32 v21, s75, 23
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 20
+; SI-NEXT: v_writelane_b32 v21, s75, 21
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 18
+; SI-NEXT: v_writelane_b32 v21, s75, 19
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 16
+; SI-NEXT: v_writelane_b32 v21, s75, 17
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 14
+; SI-NEXT: v_writelane_b32 v21, s75, 15
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 12
+; SI-NEXT: v_writelane_b32 v21, s75, 13
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 10
+; SI-NEXT: v_writelane_b32 v21, s75, 11
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 8
+; SI-NEXT: v_writelane_b32 v21, s75, 9
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 6
+; SI-NEXT: v_writelane_b32 v21, s75, 7
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 4
+; SI-NEXT: v_writelane_b32 v21, s75, 5
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 2
+; SI-NEXT: v_writelane_b32 v21, s75, 3
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 0
+; SI-NEXT: s_lshr_b32 s49, s5, 24
+; SI-NEXT: s_lshr_b32 s39, s5, 16
+; SI-NEXT: s_lshr_b32 s53, s5, 8
+; SI-NEXT: s_lshr_b32 s51, s7, 24
+; SI-NEXT: s_lshr_b32 s65, s7, 16
+; SI-NEXT: s_lshr_b32 s55, s7, 8
+; SI-NEXT: s_lshr_b32 s69, s9, 24
+; SI-NEXT: s_lshr_b32 s67, s9, 16
+; SI-NEXT: s_lshr_b32 s81, s9, 8
+; SI-NEXT: s_lshr_b32 s71, s11, 24
+; SI-NEXT: s_lshr_b32 s85, s11, 16
+; SI-NEXT: s_lshr_b32 s83, s11, 8
+; SI-NEXT: s_lshr_b32 s97, s13, 24
+; SI-NEXT: s_lshr_b32 s99, s13, 16
+; SI-NEXT: s_lshr_b32 s46, s13, 8
+; SI-NEXT: s_lshr_b32 s87, s15, 24
+; SI-NEXT: s_lshr_b32 s56, s15, 16
+; SI-NEXT: s_lshr_b32 s57, s15, 8
+; SI-NEXT: s_lshr_b32 s58, s41, 24
+; SI-NEXT: s_lshr_b32 s60, s41, 16
+; SI-NEXT: s_lshr_b32 s59, s41, 8
+; SI-NEXT: s_lshr_b32 s62, s43, 24
+; SI-NEXT: s_lshr_b32 s61, s43, 16
+; SI-NEXT: s_lshr_b32 s63, s43, 8
+; SI-NEXT: s_lshr_b32 s82, s25, 24
+; SI-NEXT: s_lshr_b32 s98, s25, 16
+; SI-NEXT: s_lshr_b32 s96, s25, 8
+; SI-NEXT: s_lshr_b32 s86, s23, 24
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s80, s23, 8
+; SI-NEXT: s_lshr_b32 s70, s21, 24
+; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s66, s21, 8
+; SI-NEXT: s_lshr_b32 s64, s19, 24
+; SI-NEXT: s_lshr_b32 s54, s19, 16
+; SI-NEXT: s_lshr_b32 s52, s19, 8
+; SI-NEXT: s_lshr_b32 s50, s17, 24
+; SI-NEXT: s_lshr_b32 s48, s17, 16
+; SI-NEXT: s_lshr_b32 s38, s17, 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16
+; SI-NEXT: v_writelane_b32 v21, s75, 1
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
@@ -78291,43 +78700,80 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: s_mov_b64 s[36:37], -1
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v21, s72, 0
+; SI-NEXT: v_writelane_b32 v21, s73, 1
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s72, 2
+; SI-NEXT: v_writelane_b32 v21, s73, 3
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s72, 4
+; SI-NEXT: v_writelane_b32 v21, s73, 5
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s72, 6
+; SI-NEXT: v_writelane_b32 v21, s73, 7
; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s72, 8
+; SI-NEXT: v_writelane_b32 v21, s73, 9
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr87
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr97
; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr85
; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
@@ -78339,172 +78785,125 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v21, s72, 10
+; SI-NEXT: v_writelane_b32 v21, s73, 11
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 12
+; SI-NEXT: v_writelane_b32 v21, s73, 13
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 14
+; SI-NEXT: v_writelane_b32 v21, s73, 15
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 16
+; SI-NEXT: v_writelane_b32 v21, s73, 17
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 18
+; SI-NEXT: v_writelane_b32 v21, s73, 19
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 20
+; SI-NEXT: v_writelane_b32 v21, s73, 21
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 22
+; SI-NEXT: v_writelane_b32 v21, s73, 23
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 24
+; SI-NEXT: v_writelane_b32 v21, s73, 25
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 26
+; SI-NEXT: v_writelane_b32 v21, s73, 27
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 28
+; SI-NEXT: v_writelane_b32 v21, s73, 29
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 30
+; SI-NEXT: v_writelane_b32 v21, s73, 31
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 32
+; SI-NEXT: v_writelane_b32 v21, s73, 33
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 34
+; SI-NEXT: v_writelane_b32 v21, s73, 35
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 36
+; SI-NEXT: v_writelane_b32 v21, s73, 37
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 38
+; SI-NEXT: v_writelane_b32 v21, s73, 39
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 40
+; SI-NEXT: v_writelane_b32 v21, s73, 41
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 42
+; SI-NEXT: v_writelane_b32 v21, s73, 43
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 44
+; SI-NEXT: v_writelane_b32 v21, s73, 45
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 46
+; SI-NEXT: v_writelane_b32 v21, s73, 47
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 48
+; SI-NEXT: v_writelane_b32 v21, s73, 49
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 50
+; SI-NEXT: v_writelane_b32 v21, s73, 51
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 52
+; SI-NEXT: v_writelane_b32 v21, s73, 53
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 54
+; SI-NEXT: v_writelane_b32 v21, s73, 55
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 56
+; SI-NEXT: v_writelane_b32 v21, s73, 57
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 58
+; SI-NEXT: v_writelane_b32 v21, s73, 59
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 60
+; SI-NEXT: v_writelane_b32 v21, s73, 61
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v21, s72, 62
+; SI-NEXT: v_writelane_b32 v21, s73, 63
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s46, 0
-; SI-NEXT: v_writelane_b32 v22, s47, 1
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s46, 2
-; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s46, 4
-; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s46, 6
-; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s46, 8
-; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: v_writelane_b32 v22, s58, 10
-; SI-NEXT: v_writelane_b32 v22, s59, 11
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s58, 12
-; SI-NEXT: v_writelane_b32 v22, s59, 13
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 14
-; SI-NEXT: v_writelane_b32 v22, s59, 15
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 16
-; SI-NEXT: v_writelane_b32 v22, s59, 17
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 18
-; SI-NEXT: v_writelane_b32 v22, s59, 19
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 20
-; SI-NEXT: v_writelane_b32 v22, s59, 21
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 22
-; SI-NEXT: v_writelane_b32 v22, s59, 23
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 24
-; SI-NEXT: v_writelane_b32 v22, s59, 25
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 26
-; SI-NEXT: v_writelane_b32 v22, s59, 27
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 28
-; SI-NEXT: v_writelane_b32 v22, s59, 29
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 30
-; SI-NEXT: v_writelane_b32 v22, s59, 31
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 32
-; SI-NEXT: v_writelane_b32 v22, s59, 33
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 34
-; SI-NEXT: v_writelane_b32 v22, s59, 35
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 36
-; SI-NEXT: v_writelane_b32 v22, s59, 37
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 38
-; SI-NEXT: v_writelane_b32 v22, s59, 39
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 40
-; SI-NEXT: v_writelane_b32 v22, s59, 41
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 42
-; SI-NEXT: v_writelane_b32 v22, s59, 43
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 44
-; SI-NEXT: v_writelane_b32 v22, s59, 45
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 46
-; SI-NEXT: v_writelane_b32 v22, s59, 47
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 48
-; SI-NEXT: v_writelane_b32 v22, s59, 49
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s58, 50
-; SI-NEXT: v_writelane_b32 v22, s59, 51
-; SI-NEXT: v_writelane_b32 v22, s86, 52
-; SI-NEXT: v_writelane_b32 v22, s87, 53
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: v_writelane_b32 v22, s86, 54
-; SI-NEXT: v_writelane_b32 v22, s87, 55
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: v_writelane_b32 v22, s86, 56
-; SI-NEXT: v_writelane_b32 v22, s87, 57
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: v_writelane_b32 v22, s86, 58
-; SI-NEXT: v_writelane_b32 v22, s87, 59
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: v_writelane_b32 v22, s86, 60
-; SI-NEXT: v_writelane_b32 v22, s87, 61
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: v_writelane_b32 v22, s86, 62
-; SI-NEXT: v_writelane_b32 v22, s87, 63
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: v_writelane_b32 v21, s86, 0
-; SI-NEXT: v_writelane_b32 v21, s87, 1
-; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: v_writelane_b32 v22, s72, 0
+; SI-NEXT: v_writelane_b32 v22, s73, 1
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v22, s72, 2
+; SI-NEXT: v_writelane_b32 v22, s73, 3
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v22, s72, 4
+; SI-NEXT: v_writelane_b32 v22, s73, 5
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v22, s72, 6
+; SI-NEXT: v_writelane_b32 v22, s73, 7
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: v_writelane_b32 v22, s72, 8
+; SI-NEXT: v_writelane_b32 v22, s73, 9
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
; SI-NEXT: s_cmp_lg_u32 s47, 1
-; SI-NEXT: s_mov_b32 s36, s49
-; SI-NEXT: s_mov_b32 s37, s64
-; SI-NEXT: s_mov_b32 s49, s65
-; SI-NEXT: s_mov_b32 s64, s66
-; SI-NEXT: s_mov_b32 s65, s67
-; SI-NEXT: s_mov_b32 s66, s38
-; SI-NEXT: s_mov_b32 s38, s50
-; SI-NEXT: s_mov_b32 s50, s51
-; SI-NEXT: s_mov_b32 s51, s68
-; SI-NEXT: s_mov_b32 s67, s69
-; SI-NEXT: s_mov_b32 s68, s70
-; SI-NEXT: s_mov_b32 s69, s71
-; SI-NEXT: s_mov_b32 s70, s52
-; SI-NEXT: s_mov_b32 s52, s53
-; SI-NEXT: s_mov_b32 s53, s80
-; SI-NEXT: s_mov_b32 s71, s81
-; SI-NEXT: s_mov_b32 s80, s39
-; SI-NEXT: s_mov_b32 s39, s82
-; SI-NEXT: s_mov_b32 s81, s83
-; SI-NEXT: s_mov_b32 s82, s48
-; SI-NEXT: s_mov_b32 s48, s54
-; SI-NEXT: s_mov_b32 s54, s84
-; SI-NEXT: s_mov_b32 s83, s85
-; SI-NEXT: s_mov_b32 s84, s55
-; SI-NEXT: s_mov_b32 s55, s87
-; SI-NEXT: s_mov_b32 s85, s56
+; SI-NEXT: s_mov_b32 s36, s87
+; SI-NEXT: s_mov_b32 s37, s49
+; SI-NEXT: s_mov_b32 s49, s53
+; SI-NEXT: s_mov_b32 s53, s65
+; SI-NEXT: s_mov_b32 s65, s69
+; SI-NEXT: s_mov_b32 s69, s81
+; SI-NEXT: s_mov_b32 s81, s85
+; SI-NEXT: s_mov_b32 s85, s97
+; SI-NEXT: s_mov_b32 s87, s99
+; SI-NEXT: s_mov_b32 s97, s46
+; SI-NEXT: s_mov_b32 s46, s56
; SI-NEXT: s_mov_b32 s56, s57
-; SI-NEXT: s_mov_b32 s87, s62
-; SI-NEXT: s_mov_b32 s62, s72
-; SI-NEXT: v_readlane_b32 s72, v21, 2
+; SI-NEXT: s_mov_b32 s99, s58
+; SI-NEXT: s_mov_b32 s58, s59
+; SI-NEXT: s_mov_b32 s59, s60
+; SI-NEXT: s_mov_b32 s60, s61
+; SI-NEXT: s_mov_b32 s61, s62
+; SI-NEXT: v_readlane_b32 s62, v22, 10
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -78539,173 +78938,174 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 3
-; SI-NEXT: s_lshr_b32 s46, s25, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 4
-; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 5
-; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 6
-; SI-NEXT: s_lshr_b32 s46, s23, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 7
-; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 8
-; SI-NEXT: s_lshr_b32 s46, s21, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 9
-; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 10
-; SI-NEXT: s_lshr_b32 s46, s21, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 11
-; SI-NEXT: s_lshr_b32 s46, s19, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 12
-; SI-NEXT: s_lshr_b32 s46, s19, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 13
-; SI-NEXT: s_lshr_b32 s46, s19, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 14
-; SI-NEXT: s_lshr_b32 s46, s17, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 15
-; SI-NEXT: s_lshr_b32 s46, s17, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 16
-; SI-NEXT: s_lshr_b32 s46, s17, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 62
-; SI-NEXT: v_writelane_b32 v22, s47, 63
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v21, s46, 0
-; SI-NEXT: v_writelane_b32 v21, s47, 1
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 60
-; SI-NEXT: v_writelane_b32 v22, s47, 61
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 58
-; SI-NEXT: v_writelane_b32 v22, s47, 59
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 56
-; SI-NEXT: v_writelane_b32 v22, s47, 57
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 54
-; SI-NEXT: v_writelane_b32 v22, s47, 55
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 52
-; SI-NEXT: v_writelane_b32 v22, s47, 53
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 50
-; SI-NEXT: v_writelane_b32 v22, s47, 51
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 48
-; SI-NEXT: v_writelane_b32 v22, s47, 49
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 46
-; SI-NEXT: v_writelane_b32 v22, s47, 47
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 44
-; SI-NEXT: v_writelane_b32 v22, s47, 45
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 42
-; SI-NEXT: v_writelane_b32 v22, s47, 43
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 40
-; SI-NEXT: v_writelane_b32 v22, s47, 41
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 36
-; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 34
-; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 32
-; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 30
-; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 28
-; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 26
-; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 24
-; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 22
-; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 20
-; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 18
-; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 16
-; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 14
-; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 12
-; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 10
+; SI-NEXT: s_lshr_b32 s47, s45, 16
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; SI-NEXT: v_writelane_b32 v22, s74, 8
-; SI-NEXT: v_writelane_b32 v22, s75, 9
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s47, s45, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 12
+; SI-NEXT: s_lshr_b32 s47, s29, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 13
+; SI-NEXT: s_lshr_b32 s47, s29, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 14
+; SI-NEXT: s_lshr_b32 s47, s29, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 15
+; SI-NEXT: s_lshr_b32 s47, s27, 24
+; SI-NEXT: v_writelane_b32 v22, s47, 16
+; SI-NEXT: s_lshr_b32 s47, s27, 16
+; SI-NEXT: v_writelane_b32 v22, s47, 17
+; SI-NEXT: s_lshr_b32 s47, s27, 8
+; SI-NEXT: v_writelane_b32 v22, s47, 18
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v22, s72, 8
+; SI-NEXT: v_writelane_b32 v22, s73, 9
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s74, 6
; SI-NEXT: v_writelane_b32 v22, s75, 7
-; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s74, 4
; SI-NEXT: v_writelane_b32 v22, s75, 5
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s74, 2
; SI-NEXT: v_writelane_b32 v22, s75, 3
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 8
; SI-NEXT: v_writelane_b32 v22, s74, 0
-; SI-NEXT: s_lshr_b32 s36, s5, 24
-; SI-NEXT: s_lshr_b32 s37, s5, 16
-; SI-NEXT: s_lshr_b32 s64, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s7, 24
-; SI-NEXT: s_lshr_b32 s66, s7, 16
-; SI-NEXT: s_lshr_b32 s65, s7, 8
-; SI-NEXT: s_lshr_b32 s38, s9, 24
-; SI-NEXT: s_lshr_b32 s50, s9, 16
-; SI-NEXT: s_lshr_b32 s51, s9, 8
-; SI-NEXT: s_lshr_b32 s68, s11, 24
-; SI-NEXT: s_lshr_b32 s67, s11, 16
-; SI-NEXT: s_lshr_b32 s70, s11, 8
-; SI-NEXT: s_lshr_b32 s69, s13, 24
-; SI-NEXT: s_lshr_b32 s52, s13, 16
-; SI-NEXT: s_lshr_b32 s53, s13, 8
-; SI-NEXT: s_lshr_b32 s80, s15, 24
-; SI-NEXT: s_lshr_b32 s71, s15, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 8
-; SI-NEXT: s_lshr_b32 s82, s41, 24
-; SI-NEXT: s_lshr_b32 s81, s41, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 8
-; SI-NEXT: s_lshr_b32 s54, s43, 24
-; SI-NEXT: s_lshr_b32 s84, s43, 16
-; SI-NEXT: s_lshr_b32 s83, s43, 8
-; SI-NEXT: s_lshr_b32 s55, s45, 24
-; SI-NEXT: s_lshr_b32 s86, s45, 16
-; SI-NEXT: s_lshr_b32 s85, s45, 8
-; SI-NEXT: s_lshr_b32 s56, s29, 24
-; SI-NEXT: s_lshr_b32 s87, s29, 16
-; SI-NEXT: s_lshr_b32 s62, s29, 8
-; SI-NEXT: s_lshr_b32 s63, s27, 24
-; SI-NEXT: s_lshr_b32 s72, s27, 16
-; SI-NEXT: s_lshr_b32 s73, s27, 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
; SI-NEXT: v_writelane_b32 v22, s75, 1
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 62
+; SI-NEXT: v_writelane_b32 v21, s75, 63
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 60
+; SI-NEXT: v_writelane_b32 v21, s75, 61
+; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 58
+; SI-NEXT: v_writelane_b32 v21, s75, 59
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 56
+; SI-NEXT: v_writelane_b32 v21, s75, 57
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 54
+; SI-NEXT: v_writelane_b32 v21, s75, 55
+; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 52
+; SI-NEXT: v_writelane_b32 v21, s75, 53
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 50
+; SI-NEXT: v_writelane_b32 v21, s75, 51
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 48
+; SI-NEXT: v_writelane_b32 v21, s75, 49
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 46
+; SI-NEXT: v_writelane_b32 v21, s75, 47
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 44
+; SI-NEXT: v_writelane_b32 v21, s75, 45
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 42
+; SI-NEXT: v_writelane_b32 v21, s75, 43
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 40
+; SI-NEXT: v_writelane_b32 v21, s75, 41
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 38
+; SI-NEXT: v_writelane_b32 v21, s75, 39
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 36
+; SI-NEXT: v_writelane_b32 v21, s75, 37
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 34
+; SI-NEXT: v_writelane_b32 v21, s75, 35
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 32
+; SI-NEXT: v_writelane_b32 v21, s75, 33
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 30
+; SI-NEXT: v_writelane_b32 v21, s75, 31
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 28
+; SI-NEXT: v_writelane_b32 v21, s75, 29
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 26
+; SI-NEXT: v_writelane_b32 v21, s75, 27
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 24
+; SI-NEXT: v_writelane_b32 v21, s75, 25
+; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 22
+; SI-NEXT: v_writelane_b32 v21, s75, 23
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 20
+; SI-NEXT: v_writelane_b32 v21, s75, 21
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 18
+; SI-NEXT: v_writelane_b32 v21, s75, 19
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 16
+; SI-NEXT: v_writelane_b32 v21, s75, 17
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 14
+; SI-NEXT: v_writelane_b32 v21, s75, 15
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 12
+; SI-NEXT: v_writelane_b32 v21, s75, 13
+; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 10
+; SI-NEXT: v_writelane_b32 v21, s75, 11
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 8
+; SI-NEXT: v_writelane_b32 v21, s75, 9
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 6
+; SI-NEXT: v_writelane_b32 v21, s75, 7
+; SI-NEXT: s_lshr_b64 s[74:75], s[24:25], 8
+; SI-NEXT: v_writelane_b32 v21, s74, 4
+; SI-NEXT: v_writelane_b32 v21, s75, 5
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; SI-NEXT: v_writelane_b32 v21, s74, 2
+; SI-NEXT: v_writelane_b32 v21, s75, 3
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: v_writelane_b32 v21, s74, 0
+; SI-NEXT: s_lshr_b32 s37, s5, 24
+; SI-NEXT: s_lshr_b32 s39, s5, 16
+; SI-NEXT: s_lshr_b32 s49, s5, 8
+; SI-NEXT: s_lshr_b32 s51, s7, 24
+; SI-NEXT: s_lshr_b32 s53, s7, 16
+; SI-NEXT: s_lshr_b32 s55, s7, 8
+; SI-NEXT: s_lshr_b32 s65, s9, 24
+; SI-NEXT: s_lshr_b32 s67, s9, 16
+; SI-NEXT: s_lshr_b32 s69, s9, 8
+; SI-NEXT: s_lshr_b32 s71, s11, 24
+; SI-NEXT: s_lshr_b32 s81, s11, 16
+; SI-NEXT: s_lshr_b32 s83, s11, 8
+; SI-NEXT: s_lshr_b32 s85, s13, 24
+; SI-NEXT: s_lshr_b32 s87, s13, 16
+; SI-NEXT: s_lshr_b32 s97, s13, 8
+; SI-NEXT: s_lshr_b32 s36, s15, 24
+; SI-NEXT: s_lshr_b32 s46, s15, 16
+; SI-NEXT: s_lshr_b32 s56, s15, 8
+; SI-NEXT: s_lshr_b32 s99, s41, 24
+; SI-NEXT: s_lshr_b32 s59, s41, 16
+; SI-NEXT: s_lshr_b32 s58, s41, 8
+; SI-NEXT: s_lshr_b32 s61, s43, 24
+; SI-NEXT: s_lshr_b32 s60, s43, 16
+; SI-NEXT: s_lshr_b32 s63, s43, 8
+; SI-NEXT: s_lshr_b32 s62, s45, 24
+; SI-NEXT: s_lshr_b32 s82, s25, 24
+; SI-NEXT: s_lshr_b32 s98, s25, 16
+; SI-NEXT: s_lshr_b32 s96, s25, 8
+; SI-NEXT: s_lshr_b32 s86, s23, 24
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s80, s23, 8
+; SI-NEXT: s_lshr_b32 s70, s21, 24
+; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s66, s21, 8
+; SI-NEXT: s_lshr_b32 s64, s19, 24
+; SI-NEXT: s_lshr_b32 s54, s19, 16
+; SI-NEXT: s_lshr_b32 s52, s19, 8
+; SI-NEXT: s_lshr_b32 s50, s17, 24
+; SI-NEXT: s_lshr_b32 s48, s17, 16
+; SI-NEXT: s_lshr_b32 s38, s17, 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16
+; SI-NEXT: v_writelane_b32 v21, s75, 1
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
@@ -78728,14 +79128,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s47
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s17, 0xff
-; SI-NEXT: v_readlane_b32 s17, v21, 17
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s38, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 16
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s47, v21, 15
+; SI-NEXT: s_and_b32 s17, s48, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s47, s47, 24
+; SI-NEXT: s_lshl_b32 s47, s50, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s47, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -78751,18 +79148,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 14
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s19, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s52, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 13
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 12
+; SI-NEXT: s_and_b32 s17, s54, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s64, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -78778,185 +79172,186 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s21, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s66, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 10
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 9
+; SI-NEXT: s_and_b32 s17, s68, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s70, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 0
+; SI-NEXT: v_readlane_b32 s18, v21, 0
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s22, 0xff
; SI-NEXT: s_lshl_b32 s17, s74, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 1
+; SI-NEXT: v_readlane_b32 s19, v21, 1
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 2
+; SI-NEXT: v_readlane_b32 s18, v21, 2
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 8
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s23, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s80, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 7
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 6
-; SI-NEXT: v_readlane_b32 s19, v22, 3
+; SI-NEXT: s_and_b32 s17, s84, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 3
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s86, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 4
+; SI-NEXT: v_readlane_b32 s18, v21, 4
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 5
+; SI-NEXT: v_readlane_b32 s19, v21, 5
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 6
+; SI-NEXT: v_readlane_b32 s18, v21, 6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s24, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 7
+; SI-NEXT: v_readlane_b32 s19, v21, 7
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 8
+; SI-NEXT: v_readlane_b32 s18, v21, 8
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 5
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s25, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s96, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 4
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 3
+; SI-NEXT: s_and_b32 s17, s98, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 9
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: v_readlane_b32 s19, v22, 9
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s18, s82, 24
; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: v_readlane_b32 s18, v21, 10
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s19, v21, 11
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 10
+; SI-NEXT: s_lshl_b32 s17, s18, 8
+; SI-NEXT: v_readlane_b32 s18, v21, 12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s26, 0xff
-; SI-NEXT: s_lshl_b32 s17, s46, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 11
+; SI-NEXT: v_readlane_b32 s19, v21, 13
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 12
+; SI-NEXT: v_readlane_b32 s18, v21, 14
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v22, 18
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s27, 0xff
-; SI-NEXT: s_lshl_b32 s17, s73, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s72, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 13
+; SI-NEXT: v_readlane_b32 s17, v22, 17
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 16
+; SI-NEXT: v_readlane_b32 s19, v21, 15
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s63, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 14
+; SI-NEXT: v_readlane_b32 s18, v21, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 15
+; SI-NEXT: v_readlane_b32 s19, v21, 17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 16
+; SI-NEXT: v_readlane_b32 s18, v21, 18
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s28, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 17
+; SI-NEXT: v_readlane_b32 s19, v21, 19
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 18
+; SI-NEXT: v_readlane_b32 s18, v21, 20
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v22, 15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s29, 0xff
-; SI-NEXT: s_lshl_b32 s17, s62, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s87, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 19
+; SI-NEXT: v_readlane_b32 s17, v22, 14
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 13
+; SI-NEXT: v_readlane_b32 s19, v21, 21
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s56, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 20
+; SI-NEXT: v_readlane_b32 s18, v21, 22
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 21
+; SI-NEXT: v_readlane_b32 s19, v21, 23
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 22
+; SI-NEXT: v_readlane_b32 s18, v21, 24
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 23
+; SI-NEXT: v_readlane_b32 s19, v21, 25
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 24
+; SI-NEXT: v_readlane_b32 s18, v21, 26
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v22, 12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
-; SI-NEXT: s_lshl_b32 s17, s85, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s86, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 25
+; SI-NEXT: v_readlane_b32 s17, v22, 11
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 27
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s55, 24
+; SI-NEXT: s_lshl_b32 s18, s62, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 26
+; SI-NEXT: v_readlane_b32 s18, v21, 28
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 27
+; SI-NEXT: v_readlane_b32 s19, v21, 29
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 28
+; SI-NEXT: v_readlane_b32 s18, v21, 30
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 29
+; SI-NEXT: v_readlane_b32 s19, v21, 31
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 30
+; SI-NEXT: v_readlane_b32 s18, v21, 32
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -78966,27 +79361,27 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s83, 8
+; SI-NEXT: s_lshl_b32 s17, s63, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s84, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 31
+; SI-NEXT: s_and_b32 s17, s60, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 33
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s54, 24
+; SI-NEXT: s_lshl_b32 s18, s61, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 32
+; SI-NEXT: v_readlane_b32 s18, v21, 34
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 33
+; SI-NEXT: v_readlane_b32 s19, v21, 35
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 34
+; SI-NEXT: v_readlane_b32 s18, v21, 36
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 35
+; SI-NEXT: v_readlane_b32 s19, v21, 37
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 36
+; SI-NEXT: v_readlane_b32 s18, v21, 38
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -78996,27 +79391,27 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s48, 8
+; SI-NEXT: s_lshl_b32 s17, s58, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s81, 0xff
+; SI-NEXT: s_and_b32 s17, s59, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s82, 24
+; SI-NEXT: s_lshl_b32 s18, s99, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 38
+; SI-NEXT: v_readlane_b32 s16, v21, 40
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 39
+; SI-NEXT: v_readlane_b32 s17, v21, 41
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 37
+; SI-NEXT: v_readlane_b32 s19, v21, 39
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 40
-; SI-NEXT: v_readlane_b32 s17, v22, 41
+; SI-NEXT: v_readlane_b32 s16, v21, 42
+; SI-NEXT: v_readlane_b32 s17, v21, 43
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 42
+; SI-NEXT: v_readlane_b32 s18, v21, 44
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
@@ -79026,26 +79421,26 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: s_lshl_b32 s15, s39, 8
+; SI-NEXT: s_lshl_b32 s15, s56, 8
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_and_b32 s15, s71, 0xff
+; SI-NEXT: s_and_b32 s15, s46, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_lshl_b32 s16, s80, 24
+; SI-NEXT: s_lshl_b32 s16, s36, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 44
+; SI-NEXT: v_readlane_b32 s14, v21, 46
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 45
+; SI-NEXT: v_readlane_b32 s15, v21, 47
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 46
-; SI-NEXT: v_readlane_b32 s15, v22, 47
+; SI-NEXT: v_readlane_b32 s14, v21, 48
+; SI-NEXT: v_readlane_b32 s15, v21, 49
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 48
+; SI-NEXT: v_readlane_b32 s16, v21, 50
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -79055,25 +79450,28 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s53, 8
+; SI-NEXT: s_lshl_b32 s13, s97, 8
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_and_b32 s13, s52, 0xff
+; SI-NEXT: s_and_b32 s13, s87, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s69, 24
+; SI-NEXT: s_lshl_b32 s14, s85, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 50
+; SI-NEXT: v_readlane_b32 s12, v21, 52
; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: v_readlane_b32 s13, v21, 53
; SI-NEXT: s_lshl_b32 s12, s12, 8
-; SI-NEXT: v_readlane_b32 s13, v22, 51
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: s_and_b32 s12, s60, 0xff
+; SI-NEXT: v_readlane_b32 s12, v21, 54
+; SI-NEXT: v_readlane_b32 s13, v21, 55
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: v_readlane_b32 s14, v21, 56
; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s13, s58, 24
+; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_or_b32 s10, s10, s12
@@ -79081,26 +79479,26 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s70, 8
+; SI-NEXT: s_lshl_b32 s11, s83, 8
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_and_b32 s11, s67, 0xff
+; SI-NEXT: s_and_b32 s11, s81, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_lshl_b32 s12, s68, 24
+; SI-NEXT: s_lshl_b32 s12, s71, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 52
+; SI-NEXT: v_readlane_b32 s10, v21, 58
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 53
+; SI-NEXT: v_readlane_b32 s11, v21, 59
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 54
-; SI-NEXT: v_readlane_b32 s11, v22, 55
+; SI-NEXT: v_readlane_b32 s10, v21, 60
+; SI-NEXT: v_readlane_b32 s11, v21, 61
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 56
+; SI-NEXT: v_readlane_b32 s12, v21, 62
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
@@ -79110,25 +79508,28 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s51, 8
+; SI-NEXT: s_lshl_b32 s9, s69, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s50, 0xff
+; SI-NEXT: s_and_b32 s9, s67, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s38, 24
+; SI-NEXT: s_lshl_b32 s10, s65, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 58
+; SI-NEXT: v_readlane_b32 s8, v22, 0
; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s9, v22, 1
; SI-NEXT: s_lshl_b32 s8, s8, 8
-; SI-NEXT: v_readlane_b32 s9, v22, 59
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s98, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 2
+; SI-NEXT: v_readlane_b32 s9, v22, 3
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s10, v22, 4
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s96, 24
+; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s6, s6, s8
@@ -79136,26 +79537,24 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s65, 8
+; SI-NEXT: s_lshl_b32 s7, s55, 8
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_and_b32 s7, s66, 0xff
+; SI-NEXT: s_and_b32 s7, s53, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s49, 24
+; SI-NEXT: s_lshl_b32 s8, s51, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 60
+; SI-NEXT: v_readlane_b32 s6, v22, 6
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 61
; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: v_readlane_b32 s7, v22, 7
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v21, 0
-; SI-NEXT: v_readlane_b32 s7, v21, 1
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 62
+; SI-NEXT: s_and_b32 s6, s72, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 8
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -79165,11 +79564,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s64, 8
+; SI-NEXT: s_lshl_b32 s5, s49, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s37, 0xff
+; SI-NEXT: s_and_b32 s5, s39, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s36, 24
+; SI-NEXT: s_lshl_b32 s6, s37, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -79177,10 +79576,12 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v22, 43
-; SI-NEXT: v_readlane_b32 s17, v22, 49
-; SI-NEXT: v_readlane_b32 s13, v22, 57
-; SI-NEXT: v_readlane_b32 s9, v22, 63
+; SI-NEXT: v_readlane_b32 s19, v21, 45
+; SI-NEXT: v_readlane_b32 s17, v21, 51
+; SI-NEXT: v_readlane_b32 s15, v21, 57
+; SI-NEXT: v_readlane_b32 s13, v21, 63
+; SI-NEXT: v_readlane_b32 s11, v22, 5
+; SI-NEXT: v_readlane_b32 s9, v22, 9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
@@ -79231,6 +79632,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v32, s34, 0
; VI-NEXT: v_writelane_b32 v32, s35, 1
@@ -79285,164 +79687,209 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_cmp_lg_u32 s44, 0
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
+; VI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB57_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 18
-; VI-NEXT: s_lshr_b32 s47, s4, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 19
-; VI-NEXT: s_lshr_b32 s47, s8, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 20
-; VI-NEXT: s_lshr_b32 s47, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 21
-; VI-NEXT: s_lshr_b32 s47, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 22
-; VI-NEXT: s_lshr_b32 s47, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 23
-; VI-NEXT: s_lshr_b32 s47, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 24
-; VI-NEXT: s_lshr_b32 s47, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 25
-; VI-NEXT: s_lshr_b32 s47, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 26
-; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: s_lshr_b32 s46, s5, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: s_lshr_b32 s46, s4, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s6, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s40, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s42, 16
; VI-NEXT: v_writelane_b32 v33, s46, 27
-; VI-NEXT: s_lshr_b32 s47, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 28
-; VI-NEXT: s_lshr_b32 s46, s28, 8
+; VI-NEXT: s_lshr_b32 s46, s42, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s45, 24
; VI-NEXT: v_writelane_b32 v33, s46, 29
-; VI-NEXT: s_lshr_b32 s47, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 30
-; VI-NEXT: s_lshr_b32 s47, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 31
-; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: s_lshr_b32 s46, s45, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s45, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s44, 16
; VI-NEXT: v_writelane_b32 v33, s46, 32
-; VI-NEXT: s_lshr_b32 s47, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 33
-; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: s_lshr_b32 s46, s44, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s29, 24
; VI-NEXT: v_writelane_b32 v33, s46, 34
-; VI-NEXT: s_lshr_b32 s47, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 35
-; VI-NEXT: s_lshr_b32 s47, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 36
-; VI-NEXT: s_lshr_b32 s46, s25, 8
+; VI-NEXT: s_lshr_b32 s46, s29, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s28, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s28, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: s_lshr_b32 s46, s27, 24
; VI-NEXT: v_writelane_b32 v33, s46, 37
-; VI-NEXT: s_lshr_b32 s47, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 38
-; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: s_lshr_b32 s46, s27, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s46, s26, 16
; VI-NEXT: v_writelane_b32 v33, s46, 39
-; VI-NEXT: s_lshr_b32 s47, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 40
-; VI-NEXT: s_lshr_b32 s47, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 41
-; VI-NEXT: s_lshr_b32 s46, s23, 8
+; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: s_lshr_b32 s46, s25, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 59
+; VI-NEXT: s_lshr_b32 s46, s24, 16
; VI-NEXT: v_writelane_b32 v33, s46, 42
-; VI-NEXT: s_lshr_b32 s47, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 43
-; VI-NEXT: s_lshr_b32 s46, s22, 8
+; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 60
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 44
-; VI-NEXT: s_lshr_b32 s47, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 45
-; VI-NEXT: s_lshr_b32 s47, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 46
-; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 61
+; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: s_lshr_b32 s46, s22, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 62
+; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: v_writelane_b32 v33, s46, 47
-; VI-NEXT: s_lshr_b32 s47, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 48
+; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 63
+; VI-NEXT: s_lshr_b32 s46, s20, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v34, s46, 0
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v34, s46, 1
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v34, s46, 2
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 55
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: v_writelane_b32 v33, s46, 53
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: v_writelane_b32 v34, s46, 3
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 58
+; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 59
-; VI-NEXT: s_lshr_b64 s[88:89], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 17
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s47, 21
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s47, 19
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s47, 17
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: v_writelane_b32 v33, s47, 15
-; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: v_writelane_b32 v33, s47, 13
-; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24
; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: v_writelane_b32 v33, s47, 11
-; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: v_writelane_b32 v33, s47, 9
-; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: v_writelane_b32 v33, s47, 7
-; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24
; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: v_writelane_b32 v33, s47, 5
-; VI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: v_writelane_b32 v33, s47, 3
-; VI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
; VI-NEXT: v_writelane_b32 v33, s46, 0
-; VI-NEXT: s_lshr_b32 s59, s5, 16
-; VI-NEXT: s_lshr_b32 s68, s5, 8
-; VI-NEXT: s_lshr_b32 s81, s4, 8
-; VI-NEXT: s_lshr_b32 s85, s7, 24
-; VI-NEXT: s_lshr_b32 s80, s7, 16
-; VI-NEXT: s_lshr_b32 s57, s7, 8
-; VI-NEXT: s_lshr_b32 s56, s6, 16
-; VI-NEXT: s_lshr_b32 s84, s6, 8
-; VI-NEXT: s_lshr_b32 s64, s9, 24
-; VI-NEXT: s_lshr_b32 s83, s9, 16
-; VI-NEXT: s_lshr_b32 s53, s9, 8
-; VI-NEXT: s_lshr_b32 s58, s8, 8
-; VI-NEXT: s_lshr_b32 s50, s11, 24
-; VI-NEXT: s_lshr_b32 s61, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s11, 8
-; VI-NEXT: s_lshr_b32 s63, s10, 16
-; VI-NEXT: s_lshr_b32 s51, s10, 8
-; VI-NEXT: s_lshr_b32 s73, s13, 24
-; VI-NEXT: s_lshr_b32 s62, s13, 16
-; VI-NEXT: s_lshr_b32 s52, s13, 8
-; VI-NEXT: s_lshr_b32 s72, s12, 8
-; VI-NEXT: s_lshr_b32 s54, s15, 24
-; VI-NEXT: s_lshr_b32 s75, s15, 16
-; VI-NEXT: s_lshr_b32 s74, s15, 8
-; VI-NEXT: s_lshr_b32 s55, s14, 16
-; VI-NEXT: s_lshr_b32 s76, s14, 8
-; VI-NEXT: s_lshr_b32 s71, s41, 24
-; VI-NEXT: s_lshr_b32 s77, s41, 16
-; VI-NEXT: s_lshr_b32 s69, s41, 8
-; VI-NEXT: s_lshr_b32 s67, s40, 16
-; VI-NEXT: s_lshr_b32 s82, s40, 8
-; VI-NEXT: s_lshr_b32 s65, s43, 24
-; VI-NEXT: s_lshr_b32 s70, s43, 16
-; VI-NEXT: s_lshr_b32 s78, s43, 8
-; VI-NEXT: s_lshr_b32 s86, s42, 16
-; VI-NEXT: s_lshr_b32 s79, s42, 8
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s87, s45, 16
+; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
; VI-NEXT: v_writelane_b32 v33, s47, 1
-; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
-; VI-NEXT: s_lshr_b64 vcc, s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB57_3
; VI-NEXT: .LBB57_2:
@@ -79451,51 +79898,86 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr79
-; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr67
-; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr77
-; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr75
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr73
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr63
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr61
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr57
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr59
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr90
-; VI-NEXT: ; implicit-def: $sgpr88
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -79603,19 +80085,66 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: v_writelane_b32 v33, s47, 17
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s47, 19
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s47, 21
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s47, 23
; VI-NEXT: .LBB57_3: ; %Flow
-; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
-; VI-NEXT: v_readlane_b32 s48, v33, 18
-; VI-NEXT: s_mov_b32 s49, s59
-; VI-NEXT: v_readlane_b32 s46, v33, 19
-; VI-NEXT: s_mov_b32 s47, s81
-; VI-NEXT: s_mov_b32 s81, s85
-; VI-NEXT: v_readlane_b32 s59, v33, 20
-; VI-NEXT: s_mov_b32 s85, s63
-; VI-NEXT: s_mov_b32 s63, s73
-; VI-NEXT: v_readlane_b32 s73, v33, 21
+; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
+; VI-NEXT: v_readlane_b32 s75, v33, 24
+; VI-NEXT: v_readlane_b32 s72, v33, 25
+; VI-NEXT: v_readlane_b32 s73, v33, 26
+; VI-NEXT: v_readlane_b32 s39, v33, 27
+; VI-NEXT: v_readlane_b32 s49, v33, 28
+; VI-NEXT: v_readlane_b32 s51, v33, 29
+; VI-NEXT: v_readlane_b32 s47, v33, 30
+; VI-NEXT: v_readlane_b32 s53, v33, 31
+; VI-NEXT: v_readlane_b32 s59, v33, 32
+; VI-NEXT: v_readlane_b32 s84, v33, 33
+; VI-NEXT: v_readlane_b32 s38, v33, 34
+; VI-NEXT: v_readlane_b32 s56, v33, 35
+; VI-NEXT: v_readlane_b32 s48, v33, 36
+; VI-NEXT: v_readlane_b32 s50, v33, 37
+; VI-NEXT: v_readlane_b32 s52, v33, 38
+; VI-NEXT: v_readlane_b32 s54, v33, 39
+; VI-NEXT: v_readlane_b32 s55, v33, 40
+; VI-NEXT: v_readlane_b32 s64, v33, 41
+; VI-NEXT: v_readlane_b32 s65, v33, 42
+; VI-NEXT: v_readlane_b32 s66, v33, 43
+; VI-NEXT: v_readlane_b32 s67, v33, 44
+; VI-NEXT: v_readlane_b32 s68, v33, 45
+; VI-NEXT: v_readlane_b32 s46, v33, 46
+; VI-NEXT: v_readlane_b32 s69, v33, 47
+; VI-NEXT: v_readlane_b32 s80, v33, 48
+; VI-NEXT: v_readlane_b32 s81, v33, 49
+; VI-NEXT: v_readlane_b32 s82, v33, 50
+; VI-NEXT: v_readlane_b32 s83, v33, 51
+; VI-NEXT: v_readlane_b32 s85, v33, 52
+; VI-NEXT: v_readlane_b32 s86, v33, 53
+; VI-NEXT: v_readlane_b32 s88, v33, 54
+; VI-NEXT: v_readlane_b32 s87, v33, 55
+; VI-NEXT: v_readlane_b32 s58, v33, 56
+; VI-NEXT: v_readlane_b32 s89, v33, 57
+; VI-NEXT: v_readlane_b32 s90, v33, 58
+; VI-NEXT: v_readlane_b32 s91, v33, 59
+; VI-NEXT: v_readlane_b32 s57, v33, 60
+; VI-NEXT: v_readlane_b32 s60, v33, 61
+; VI-NEXT: v_readlane_b32 s61, v33, 62
+; VI-NEXT: v_readlane_b32 vcc_lo, v33, 63
+; VI-NEXT: v_readlane_b32 vcc_hi, v34, 0
+; VI-NEXT: v_readlane_b32 s30, v34, 1
+; VI-NEXT: v_readlane_b32 s62, v34, 2
+; VI-NEXT: v_readlane_b32 s63, v34, 3
+; VI-NEXT: v_readlane_b32 s31, v34, 4
+; VI-NEXT: v_readlane_b32 s70, v33, 8
+; VI-NEXT: v_readlane_b32 s71, v33, 9
; VI-NEXT: s_cbranch_scc1 .LBB57_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s16, s16, 3
@@ -79650,440 +80179,445 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_addc_u32 s7, s7, 0
; VI-NEXT: s_add_u32 s4, s4, 3
; VI-NEXT: s_addc_u32 s5, s5, 0
-; VI-NEXT: s_lshr_b32 s88, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 22
-; VI-NEXT: s_lshr_b32 s88, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 23
-; VI-NEXT: s_lshr_b32 s88, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 24
-; VI-NEXT: s_lshr_b32 s88, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 25
-; VI-NEXT: s_lshr_b32 s88, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 26
-; VI-NEXT: s_lshr_b32 s88, s29, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 27
-; VI-NEXT: s_lshr_b32 s88, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 28
-; VI-NEXT: s_lshr_b32 s88, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 29
-; VI-NEXT: s_lshr_b32 s88, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 30
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 31
-; VI-NEXT: s_lshr_b32 s88, s27, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 32
-; VI-NEXT: s_lshr_b32 s88, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 33
-; VI-NEXT: s_lshr_b32 s88, s26, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 34
-; VI-NEXT: s_lshr_b32 s88, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 35
-; VI-NEXT: s_lshr_b32 s88, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 36
-; VI-NEXT: s_lshr_b32 s88, s25, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 37
-; VI-NEXT: s_lshr_b32 s88, s24, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 38
-; VI-NEXT: s_lshr_b32 s88, s24, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 39
-; VI-NEXT: s_lshr_b32 s88, s23, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 40
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 41
-; VI-NEXT: s_lshr_b32 s88, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 42
-; VI-NEXT: s_lshr_b32 s88, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 43
-; VI-NEXT: s_lshr_b32 s88, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 44
-; VI-NEXT: s_lshr_b32 s88, s21, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 45
-; VI-NEXT: s_lshr_b32 s88, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 46
-; VI-NEXT: s_lshr_b32 s88, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 47
-; VI-NEXT: s_lshr_b32 s88, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 48
-; VI-NEXT: s_lshr_b32 s88, s20, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 49
-; VI-NEXT: s_lshr_b32 s88, s19, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 50
-; VI-NEXT: s_lshr_b32 s88, s19, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 51
-; VI-NEXT: s_lshr_b32 s88, s19, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 52
-; VI-NEXT: s_lshr_b32 s88, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 53
-; VI-NEXT: s_lshr_b32 s88, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 54
-; VI-NEXT: s_lshr_b32 s88, s17, 24
-; VI-NEXT: v_writelane_b32 v33, s88, 55
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 56
-; VI-NEXT: s_lshr_b32 s88, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 57
-; VI-NEXT: s_lshr_b32 s88, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s88, 58
-; VI-NEXT: s_lshr_b32 s88, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s88, 59
-; VI-NEXT: s_lshr_b64 s[88:89], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 17
-; VI-NEXT: s_lshr_b64 s[88:89], s[6:7], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 14
-; VI-NEXT: v_writelane_b32 v33, s89, 15
-; VI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 12
-; VI-NEXT: v_writelane_b32 v33, s89, 13
-; VI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 10
-; VI-NEXT: v_writelane_b32 v33, s89, 11
-; VI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 8
-; VI-NEXT: v_writelane_b32 v33, s89, 9
-; VI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 6
-; VI-NEXT: v_writelane_b32 v33, s89, 7
-; VI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 4
-; VI-NEXT: v_writelane_b32 v33, s89, 5
-; VI-NEXT: s_lshr_b64 s[88:89], s[42:43], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 2
-; VI-NEXT: v_writelane_b32 v33, s89, 3
-; VI-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
-; VI-NEXT: v_writelane_b32 v33, s88, 0
-; VI-NEXT: s_lshr_b32 s48, s5, 24
-; VI-NEXT: s_lshr_b32 s49, s5, 16
-; VI-NEXT: s_lshr_b32 s68, s5, 8
+; VI-NEXT: s_lshr_b32 s46, s5, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 5
+; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 6
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: s_lshr_b32 s47, s4, 8
-; VI-NEXT: s_lshr_b32 s81, s7, 24
-; VI-NEXT: s_lshr_b32 s80, s7, 16
-; VI-NEXT: s_lshr_b32 s57, s7, 8
-; VI-NEXT: s_lshr_b32 s56, s6, 16
-; VI-NEXT: s_lshr_b32 s84, s6, 8
-; VI-NEXT: s_lshr_b32 s64, s9, 24
-; VI-NEXT: s_lshr_b32 s83, s9, 16
-; VI-NEXT: s_lshr_b32 s53, s9, 8
-; VI-NEXT: s_lshr_b32 s59, s8, 16
-; VI-NEXT: s_lshr_b32 s58, s8, 8
-; VI-NEXT: s_lshr_b32 s50, s11, 24
-; VI-NEXT: s_lshr_b32 s61, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s11, 8
-; VI-NEXT: s_lshr_b32 s85, s10, 16
-; VI-NEXT: s_lshr_b32 s51, s10, 8
-; VI-NEXT: s_lshr_b32 s63, s13, 24
-; VI-NEXT: s_lshr_b32 s62, s13, 16
-; VI-NEXT: s_lshr_b32 s52, s13, 8
-; VI-NEXT: s_lshr_b32 s73, s12, 16
-; VI-NEXT: s_lshr_b32 s72, s12, 8
-; VI-NEXT: s_lshr_b32 s54, s15, 24
-; VI-NEXT: s_lshr_b32 s75, s15, 16
-; VI-NEXT: s_lshr_b32 s74, s15, 8
-; VI-NEXT: s_lshr_b32 s55, s14, 16
-; VI-NEXT: s_lshr_b32 s76, s14, 8
-; VI-NEXT: s_lshr_b32 s71, s41, 24
-; VI-NEXT: s_lshr_b32 s77, s41, 16
-; VI-NEXT: s_lshr_b32 s69, s41, 8
-; VI-NEXT: s_lshr_b32 s67, s40, 16
-; VI-NEXT: s_lshr_b32 s82, s40, 8
-; VI-NEXT: s_lshr_b32 s65, s43, 24
-; VI-NEXT: s_lshr_b32 s70, s43, 16
-; VI-NEXT: s_lshr_b32 s78, s43, 8
-; VI-NEXT: s_lshr_b32 s86, s42, 16
-; VI-NEXT: s_lshr_b32 s79, s42, 8
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s87, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s89, 1
-; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
-; VI-NEXT: s_lshr_b64 vcc, s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 7
+; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 9
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s6, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: v_writelane_b32 v33, s72, 22
+; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: v_writelane_b32 v33, s73, 23
+; VI-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: v_writelane_b32 v33, s72, 20
+; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v33, s73, 21
+; VI-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v33, s74, 18
+; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: v_writelane_b32 v33, s75, 19
+; VI-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v33, s74, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: v_writelane_b32 v33, s75, 17
+; VI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: v_writelane_b32 v33, s74, 14
+; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v33, s75, 15
+; VI-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: v_writelane_b32 v33, s74, 12
+; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: v_writelane_b32 v33, s75, 13
+; VI-NEXT: s_lshr_b64 s[70:71], s[28:29], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: s_lshr_b32 s37, s43, 8
+; VI-NEXT: v_writelane_b32 v33, s70, 10
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: s_mov_b32 s73, s37
+; VI-NEXT: v_writelane_b32 v33, s71, 11
+; VI-NEXT: s_lshr_b64 s[36:37], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: s_lshr_b32 s34, s40, 8
+; VI-NEXT: v_writelane_b32 v33, s36, 6
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: s_mov_b32 s72, s34
+; VI-NEXT: v_writelane_b32 v33, s37, 7
; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 35
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v33, s34, 4
+; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: v_writelane_b32 v33, s35, 5
+; VI-NEXT: s_lshr_b64 s[34:35], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v33, s34, 2
+; VI-NEXT: s_lshr_b32 s76, s5, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 38
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; VI-NEXT: v_writelane_b32 v33, s35, 3
+; VI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: s_lshr_b32 s39, s42, 16
+; VI-NEXT: s_lshr_b32 s49, s42, 8
+; VI-NEXT: s_lshr_b32 s51, s45, 24
+; VI-NEXT: s_lshr_b32 s47, s45, 16
+; VI-NEXT: s_lshr_b32 s53, s45, 8
+; VI-NEXT: s_lshr_b32 s59, s44, 16
+; VI-NEXT: s_lshr_b32 s84, s44, 8
+; VI-NEXT: s_lshr_b32 s38, s29, 24
+; VI-NEXT: s_lshr_b32 s56, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s29, 8
+; VI-NEXT: s_lshr_b32 s48, s28, 16
+; VI-NEXT: s_lshr_b32 s58, s28, 8
+; VI-NEXT: s_lshr_b32 s50, s27, 24
+; VI-NEXT: s_lshr_b32 s52, s27, 16
+; VI-NEXT: s_lshr_b32 s89, s27, 8
+; VI-NEXT: s_lshr_b32 s54, s26, 16
+; VI-NEXT: s_lshr_b32 s90, s26, 8
+; VI-NEXT: s_lshr_b32 s55, s25, 24
+; VI-NEXT: s_lshr_b32 s64, s25, 16
+; VI-NEXT: s_lshr_b32 s91, s25, 8
+; VI-NEXT: s_lshr_b32 s65, s24, 16
+; VI-NEXT: s_lshr_b32 s57, s24, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 24
+; VI-NEXT: s_lshr_b32 s67, s23, 16
+; VI-NEXT: s_lshr_b32 s60, s23, 8
+; VI-NEXT: s_lshr_b32 s68, s22, 16
+; VI-NEXT: s_lshr_b32 s61, s22, 8
+; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: s_lshr_b32 s69, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 8
+; VI-NEXT: s_lshr_b32 s81, s19, 24
+; VI-NEXT: s_lshr_b32 s82, s19, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 8
+; VI-NEXT: s_lshr_b32 s83, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s18, 8
+; VI-NEXT: s_lshr_b32 s85, s17, 24
+; VI-NEXT: s_lshr_b32 s86, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s17, 8
+; VI-NEXT: s_lshr_b32 s87, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s16, 8
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[36:37], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v33, s34, 0
+; VI-NEXT: v_writelane_b32 v33, s35, 1
; VI-NEXT: .LBB57_5: ; %end
-; VI-NEXT: v_readlane_b32 s89, v33, 59
-; VI-NEXT: v_mov_b32_e32 v2, s89
-; VI-NEXT: v_readlane_b32 s89, v33, 57
+; VI-NEXT: v_readlane_b32 s34, v33, 0
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v4, s89
+; VI-NEXT: v_mov_b32_e32 v2, s31
+; VI-NEXT: v_perm_b32 v6, s87, v6, v1
+; VI-NEXT: v_mov_b32_e32 v4, s63
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 54
+; VI-NEXT: v_mov_b32_e32 v24, s85
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_mov_b32_e32 v4, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 52
-; VI-NEXT: v_mov_b32_e32 v6, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 49
-; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_perm_b32 v4, s19, v6, v1
-; VI-NEXT: v_mov_b32_e32 v6, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 47
-; VI-NEXT: v_mov_b32_e32 v8, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 44
-; VI-NEXT: v_perm_b32 v7, s20, v6, v1
-; VI-NEXT: v_perm_b32 v6, s21, v8, v1
-; VI-NEXT: v_mov_b32_e32 v8, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 42
-; VI-NEXT: v_mov_b32_e32 v11, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 39
-; VI-NEXT: v_perm_b32 v10, s22, v8, v1
-; VI-NEXT: v_perm_b32 v8, s23, v11, v1
-; VI-NEXT: v_mov_b32_e32 v11, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 37
-; VI-NEXT: v_mov_b32_e32 v14, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 34
-; VI-NEXT: v_perm_b32 v12, s24, v11, v1
-; VI-NEXT: v_perm_b32 v11, s25, v14, v1
-; VI-NEXT: v_mov_b32_e32 v14, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 32
-; VI-NEXT: v_mov_b32_e32 v17, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 29
-; VI-NEXT: v_perm_b32 v15, s26, v14, v1
-; VI-NEXT: v_perm_b32 v14, s27, v17, v1
-; VI-NEXT: v_mov_b32_e32 v17, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 27
-; VI-NEXT: v_mov_b32_e32 v23, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 0
-; VI-NEXT: v_mov_b32_e32 v9, s38
-; VI-NEXT: v_perm_b32 v18, s28, v17, v1
-; VI-NEXT: v_perm_b32 v17, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 58
-; VI-NEXT: v_perm_b32 v9, s16, v9, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 55
-; VI-NEXT: v_mov_b32_e32 v24, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 56
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_perm_b32 v24, s16, v24, v1
-; VI-NEXT: v_or_b32_e32 v3, v3, v9
-; VI-NEXT: v_mov_b32_e32 v13, s36
-; VI-NEXT: v_readlane_b32 s16, v33, 53
+; VI-NEXT: v_readlane_b32 s16, v33, 2
+; VI-NEXT: v_perm_b32 v24, s86, v24, v1
+; VI-NEXT: v_or_b32_e32 v3, v3, v6
+; VI-NEXT: v_mov_b32_e32 v9, s16
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_perm_b32 v13, s16, v13, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: v_mov_b32_e32 v4, s62
+; VI-NEXT: v_perm_b32 v9, s83, v9, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v25, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 51
+; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_perm_b32 v5, s18, v4, v1
+; VI-NEXT: v_mov_b32_e32 v25, s81
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_perm_b32 v25, s16, v25, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; VI-NEXT: v_mov_b32_e32 v7, s30
+; VI-NEXT: v_readlane_b32 s16, v33, 4
+; VI-NEXT: v_perm_b32 v25, s82, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
-; VI-NEXT: v_mov_b32_e32 v16, s34
-; VI-NEXT: v_readlane_b32 s16, v33, 48
+; VI-NEXT: v_perm_b32 v4, s19, v7, v1
+; VI-NEXT: v_mov_b32_e32 v14, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_perm_b32 v16, s16, v16, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 45
+; VI-NEXT: v_mov_b32_e32 v7, vcc_hi
+; VI-NEXT: v_perm_b32 v14, s80, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_mov_b32_e32 v26, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: v_perm_b32 v8, s20, v7, v1
+; VI-NEXT: v_mov_b32_e32 v26, s46
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; VI-NEXT: v_perm_b32 v26, s16, v26, v1
-; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_mov_b32_e32 v19, s30
-; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; VI-NEXT: v_mov_b32_e32 v10, vcc_lo
+; VI-NEXT: v_perm_b32 v26, s69, v26, v1
+; VI-NEXT: v_or_b32_e32 v2, v8, v2
+; VI-NEXT: v_perm_b32 v7, s21, v10, v1
+; VI-NEXT: v_mov_b32_e32 v17, s36
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_perm_b32 v19, s16, v19, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 40
-; VI-NEXT: v_or_b32_e32 v2, v6, v2
-; VI-NEXT: v_mov_b32_e32 v27, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 41
+; VI-NEXT: v_mov_b32_e32 v10, s61
+; VI-NEXT: v_perm_b32 v17, s68, v17, v1
+; VI-NEXT: v_or_b32_e32 v2, v7, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 5
+; VI-NEXT: v_perm_b32 v11, s22, v10, v1
+; VI-NEXT: v_mov_b32_e32 v27, s66
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; VI-NEXT: v_perm_b32 v27, s16, v27, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_mov_b32_e32 v20, vcc_lo
-; VI-NEXT: v_readlane_b32 s16, v33, 38
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; VI-NEXT: v_mov_b32_e32 v12, s60
+; VI-NEXT: v_readlane_b32 s16, v33, 6
+; VI-NEXT: v_perm_b32 v27, s67, v27, v1
+; VI-NEXT: v_or_b32_e32 v2, v11, v2
+; VI-NEXT: v_perm_b32 v10, s23, v12, v1
+; VI-NEXT: v_mov_b32_e32 v20, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_perm_b32 v20, s16, v20, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 35
-; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_mov_b32_e32 v28, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 36
+; VI-NEXT: v_mov_b32_e32 v12, s57
+; VI-NEXT: v_perm_b32 v20, s65, v20, v1
+; VI-NEXT: v_or_b32_e32 v2, v10, v2
+; VI-NEXT: v_perm_b32 v13, s24, v12, v1
+; VI-NEXT: v_mov_b32_e32 v28, s55
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_perm_b32 v28, s16, v28, v1
-; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_mov_b32_e32 v21, s90
-; VI-NEXT: v_readlane_b32 s16, v33, 33
+; VI-NEXT: v_mov_b32_e32 v15, s91
+; VI-NEXT: v_perm_b32 v28, s64, v28, v1
+; VI-NEXT: v_or_b32_e32 v2, v13, v2
+; VI-NEXT: v_perm_b32 v12, s25, v15, v1
+; VI-NEXT: v_mov_b32_e32 v21, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_perm_b32 v21, s16, v21, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 30
-; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_mov_b32_e32 v29, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 31
+; VI-NEXT: v_mov_b32_e32 v15, s90
+; VI-NEXT: v_perm_b32 v21, s54, v21, v1
+; VI-NEXT: v_or_b32_e32 v2, v12, v2
+; VI-NEXT: v_readlane_b32 s17, v33, 7
+; VI-NEXT: v_perm_b32 v16, s26, v15, v1
+; VI-NEXT: v_mov_b32_e32 v29, s50
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_perm_b32 v29, s16, v29, v1
-; VI-NEXT: v_or_b32_e32 v2, v15, v2
-; VI-NEXT: v_mov_b32_e32 v22, s88
-; VI-NEXT: v_readlane_b32 s16, v33, 28
+; VI-NEXT: v_mov_b32_e32 v18, s89
+; VI-NEXT: v_readlane_b32 s16, v33, 10
+; VI-NEXT: v_perm_b32 v29, s52, v29, v1
+; VI-NEXT: v_or_b32_e32 v2, v16, v2
+; VI-NEXT: v_perm_b32 v15, s27, v18, v1
+; VI-NEXT: v_mov_b32_e32 v22, s16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_perm_b32 v22, s16, v22, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 25
-; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_mov_b32_e32 v30, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 26
+; VI-NEXT: v_mov_b32_e32 v18, s58
+; VI-NEXT: v_perm_b32 v22, s48, v22, v1
+; VI-NEXT: v_or_b32_e32 v2, v15, v2
+; VI-NEXT: v_perm_b32 v19, s28, v18, v1
+; VI-NEXT: v_mov_b32_e32 v30, s38
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_perm_b32 v30, s16, v30, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 24
-; VI-NEXT: v_or_b32_e32 v2, v18, v2
-; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 23
+; VI-NEXT: v_mov_b32_e32 v23, s88
+; VI-NEXT: v_perm_b32 v30, s56, v30, v1
+; VI-NEXT: v_or_b32_e32 v2, v19, v2
+; VI-NEXT: v_perm_b32 v18, s29, v23, v1
+; VI-NEXT: v_mov_b32_e32 v23, s78
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_perm_b32 v23, s16, v23, v1
-; VI-NEXT: v_or_b32_e32 v2, v17, v2
+; VI-NEXT: v_mov_b32_e32 v31, s84
+; VI-NEXT: v_perm_b32 v23, s59, v23, v1
+; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 22
-; VI-NEXT: v_mov_b32_e32 v3, s66
-; VI-NEXT: v_readlane_b32 s17, v33, 1
+; VI-NEXT: v_mov_b32_e32 v3, s51
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_perm_b32 v3, s87, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s53
+; VI-NEXT: v_perm_b32 v3, s47, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 2
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_mov_b32_e32 v3, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s79
-; VI-NEXT: v_perm_b32 v3, s86, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s49
+; VI-NEXT: v_perm_b32 v3, s39, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_readlane_b32 s16, v34, 38
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s65
-; VI-NEXT: v_readlane_b32 s17, v33, 3
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 39
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_mov_b32_e32 v2, s78
-; VI-NEXT: v_perm_b32 v3, s70, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s73
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 4
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: v_readlane_b32 s16, v34, 37
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s82
-; VI-NEXT: v_perm_b32 v3, s67, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s71
-; VI-NEXT: v_readlane_b32 s17, v33, 5
+; VI-NEXT: v_readlane_b32 s16, v34, 36
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_mov_b32_e32 v2, s69
-; VI-NEXT: v_perm_b32 v3, s77, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 34
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 35
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 6
+; VI-NEXT: v_readlane_b32 s17, v33, 11
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v34, 33
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: v_mov_b32_e32 v2, s76
-; VI-NEXT: v_perm_b32 v3, s55, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 12
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s14, v34, 32
+; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s54
+; VI-NEXT: v_readlane_b32 s14, v34, 31
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: v_mov_b32_e32 v2, s74
-; VI-NEXT: v_perm_b32 v3, s75, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 29
+; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 30
+; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s14, v33, 8
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s14, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: v_mov_b32_e32 v2, s72
-; VI-NEXT: v_perm_b32 v3, s73, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v33, 14
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: v_readlane_b32 s12, v34, 27
+; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s63
+; VI-NEXT: v_readlane_b32 s12, v34, 26
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: v_mov_b32_e32 v2, s52
-; VI-NEXT: v_perm_b32 v3, s62, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 24
+; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 25
+; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s12, v33, 10
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s12, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: v_mov_b32_e32 v2, s51
-; VI-NEXT: v_perm_b32 v3, s85, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v33, 16
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: v_readlane_b32 s10, v34, 22
+; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s50
+; VI-NEXT: v_readlane_b32 s10, v34, 21
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: v_mov_b32_e32 v2, s60
-; VI-NEXT: v_perm_b32 v3, s61, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 19
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 20
+; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s10, v33, 12
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: v_mov_b32_e32 v2, s58
-; VI-NEXT: v_perm_b32 v3, s59, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 18
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s8, v34, 17
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s64
+; VI-NEXT: v_readlane_b32 s8, v34, 16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: v_mov_b32_e32 v2, s53
-; VI-NEXT: v_perm_b32 v3, s83, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 14
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 15
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s8, v33, 14
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: v_mov_b32_e32 v2, s84
-; VI-NEXT: v_perm_b32 v3, s56, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v33, 20
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s6, v34, 12
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s81
+; VI-NEXT: v_readlane_b32 s6, v34, 11
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: v_mov_b32_e32 v2, s57
-; VI-NEXT: v_perm_b32 v3, s80, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 9
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 10
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s6, v33, 16
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 8
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: v_mov_b32_e32 v2, s47
-; VI-NEXT: v_perm_b32 v3, s46, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v33, 22
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s4, v34, 7
+; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: v_readlane_b32 s4, v34, 6
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: v_mov_b32_e32 v2, s68
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_readlane_b32 s4, v34, 5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s49, v3, v1
+; VI-NEXT: v_perm_b32 v1, s75, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_readlane_b32 s35, v33, 1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s17, v33, 7
-; VI-NEXT: v_readlane_b32 s15, v33, 9
-; VI-NEXT: v_readlane_b32 s13, v33, 11
-; VI-NEXT: v_readlane_b32 s11, v33, 13
-; VI-NEXT: v_readlane_b32 s9, v33, 15
-; VI-NEXT: v_readlane_b32 s7, v33, 17
+; VI-NEXT: v_readlane_b32 s17, v33, 13
+; VI-NEXT: v_readlane_b32 s15, v33, 15
+; VI-NEXT: v_readlane_b32 s13, v33, 17
+; VI-NEXT: v_readlane_b32 s11, v33, 19
+; VI-NEXT: v_readlane_b32 s9, v33, 21
+; VI-NEXT: v_readlane_b32 s7, v33, 23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -80119,6 +80653,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -80129,6 +80664,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: v_writelane_b32 v29, s34, 0
; GFX9-NEXT: v_writelane_b32 v29, s35, 1
@@ -80187,317 +80723,456 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_cmp_lg_u32 s44, 0
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
+; GFX9-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB57_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v30, s46, 20
-; GFX9-NEXT: s_lshr_b32 s47, s11, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 21
-; GFX9-NEXT: s_lshr_b32 s47, s10, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 22
-; GFX9-NEXT: s_lshr_b32 s47, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 23
-; GFX9-NEXT: s_lshr_b32 s47, s26, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 24
-; GFX9-NEXT: s_lshr_b32 s47, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 25
-; GFX9-NEXT: s_lshr_b32 s47, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 26
-; GFX9-NEXT: s_lshr_b32 s47, s25, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 27
-; GFX9-NEXT: s_lshr_b32 s47, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 28
-; GFX9-NEXT: s_lshr_b32 s47, s24, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 29
-; GFX9-NEXT: s_lshr_b32 s47, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 30
-; GFX9-NEXT: s_lshr_b32 s47, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 31
-; GFX9-NEXT: s_lshr_b32 s47, s23, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 32
-; GFX9-NEXT: s_lshr_b32 s47, s23, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 33
-; GFX9-NEXT: s_lshr_b32 s47, s22, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 34
-; GFX9-NEXT: s_lshr_b32 s47, s22, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 35
-; GFX9-NEXT: s_lshr_b32 s47, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 36
-; GFX9-NEXT: s_lshr_b32 s47, s21, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 37
-; GFX9-NEXT: s_lshr_b32 s47, s21, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 38
-; GFX9-NEXT: s_lshr_b32 s47, s20, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 39
-; GFX9-NEXT: s_lshr_b32 s47, s20, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 40
-; GFX9-NEXT: s_lshr_b32 s47, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 41
-; GFX9-NEXT: s_lshr_b32 s47, s19, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 42
-; GFX9-NEXT: s_lshr_b32 s47, s19, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 43
-; GFX9-NEXT: s_lshr_b32 s47, s18, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 44
-; GFX9-NEXT: s_lshr_b32 s47, s18, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 45
-; GFX9-NEXT: s_lshr_b32 s47, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s47, 46
-; GFX9-NEXT: s_lshr_b32 s47, s17, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 47
-; GFX9-NEXT: s_lshr_b32 s47, s17, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 48
-; GFX9-NEXT: s_lshr_b32 s47, s16, 16
-; GFX9-NEXT: v_writelane_b32 v30, s47, 49
-; GFX9-NEXT: s_lshr_b32 s47, s16, 8
-; GFX9-NEXT: v_writelane_b32 v30, s47, 50
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[8:9], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 16
-; GFX9-NEXT: v_writelane_b32 v30, s93, 17
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[10:11], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 14
-; GFX9-NEXT: v_writelane_b32 v30, s93, 15
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 12
-; GFX9-NEXT: v_writelane_b32 v30, s93, 13
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 10
-; GFX9-NEXT: v_writelane_b32 v30, s93, 11
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 8
-; GFX9-NEXT: v_writelane_b32 v30, s93, 9
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[42:43], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 6
-; GFX9-NEXT: v_writelane_b32 v30, s93, 7
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[44:45], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 4
-; GFX9-NEXT: v_writelane_b32 v30, s93, 5
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[28:29], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 2
-; GFX9-NEXT: v_writelane_b32 v30, s93, 3
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[26:27], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 0
-; GFX9-NEXT: s_lshr_b32 s81, s5, 16
-; GFX9-NEXT: s_lshr_b32 s82, s5, 8
-; GFX9-NEXT: s_lshr_b32 s96, s4, 16
-; GFX9-NEXT: s_lshr_b32 s83, s4, 8
-; GFX9-NEXT: s_lshr_b32 s86, s7, 24
-; GFX9-NEXT: s_lshr_b32 s84, s7, 16
-; GFX9-NEXT: s_lshr_b32 s87, s7, 8
-; GFX9-NEXT: s_lshr_b32 s57, s6, 16
-; GFX9-NEXT: s_lshr_b32 s97, s6, 8
-; GFX9-NEXT: s_lshr_b32 s98, s9, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s5, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s5, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: s_lshr_b32 s46, s4, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: s_lshr_b32 s46, s4, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: s_lshr_b32 s46, s7, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: s_lshr_b32 s46, s7, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: s_lshr_b32 s46, s7, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: s_lshr_b32 s46, s6, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: s_lshr_b32 s46, s6, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: s_lshr_b32 s46, s9, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: s_lshr_b32 s48, s9, 8
-; GFX9-NEXT: s_lshr_b32 s39, s8, 16
-; GFX9-NEXT: s_lshr_b32 s38, s8, 8
-; GFX9-NEXT: s_lshr_b32 s56, s11, 16
-; GFX9-NEXT: s_lshr_b32 s49, s11, 8
-; GFX9-NEXT: s_lshr_b32 s50, s10, 8
-; GFX9-NEXT: s_lshr_b32 s51, s13, 24
-; GFX9-NEXT: s_lshr_b32 s52, s13, 16
-; GFX9-NEXT: s_lshr_b32 s59, s13, 8
-; GFX9-NEXT: s_lshr_b32 s58, s12, 16
-; GFX9-NEXT: s_lshr_b32 s67, s12, 8
-; GFX9-NEXT: s_lshr_b32 s60, s15, 24
-; GFX9-NEXT: s_lshr_b32 s65, s15, 16
-; GFX9-NEXT: s_lshr_b32 s61, s15, 8
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s55, s14, 8
-; GFX9-NEXT: s_lshr_b32 s63, s41, 24
-; GFX9-NEXT: s_lshr_b32 s72, s41, 16
-; GFX9-NEXT: s_lshr_b32 s66, s41, 8
-; GFX9-NEXT: s_lshr_b32 s73, s40, 16
-; GFX9-NEXT: s_lshr_b32 s64, s40, 8
-; GFX9-NEXT: s_lshr_b32 s74, s43, 24
-; GFX9-NEXT: s_lshr_b32 s80, s43, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 8
-; GFX9-NEXT: s_lshr_b32 s76, s42, 16
-; GFX9-NEXT: s_lshr_b32 s70, s42, 8
-; GFX9-NEXT: s_lshr_b32 s77, s45, 24
-; GFX9-NEXT: s_lshr_b32 s78, s45, 16
-; GFX9-NEXT: s_lshr_b32 s68, s45, 8
-; GFX9-NEXT: s_lshr_b32 s79, s44, 16
-; GFX9-NEXT: s_lshr_b32 s71, s44, 8
-; GFX9-NEXT: s_lshr_b32 s69, s29, 24
-; GFX9-NEXT: s_lshr_b32 s85, s29, 16
-; GFX9-NEXT: s_lshr_b32 s88, s29, 8
-; GFX9-NEXT: s_lshr_b32 s54, s28, 16
-; GFX9-NEXT: s_lshr_b32 s89, s28, 8
-; GFX9-NEXT: s_lshr_b32 s99, s27, 24
-; GFX9-NEXT: s_lshr_b32 s53, s27, 16
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v30, s93, 1
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 vcc, s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: s_lshr_b32 s46, s9, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: s_lshr_b32 s46, s8, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: s_lshr_b32 s46, s11, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: s_lshr_b32 s46, s11, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: s_lshr_b32 s46, s11, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s10, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s10, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s13, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s13, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s13, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s12, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s15, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s46, s40, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s40, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s43, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s43, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s42, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s42, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s45, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s45, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s45, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s44, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s44, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s29, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s29, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 33
+; GFX9-NEXT: s_lshr_b32 s46, s29, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 34
+; GFX9-NEXT: s_lshr_b32 s46, s28, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 35
+; GFX9-NEXT: s_lshr_b32 s46, s28, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 36
+; GFX9-NEXT: s_lshr_b32 s46, s27, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 37
+; GFX9-NEXT: s_lshr_b32 s46, s27, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 38
+; GFX9-NEXT: s_lshr_b32 s46, s27, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 54
+; GFX9-NEXT: s_lshr_b32 s46, s26, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 39
+; GFX9-NEXT: s_lshr_b32 s46, s26, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 56
+; GFX9-NEXT: s_lshr_b32 s46, s25, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 40
+; GFX9-NEXT: s_lshr_b32 s46, s25, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 41
+; GFX9-NEXT: s_lshr_b32 s46, s25, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 57
+; GFX9-NEXT: s_lshr_b32 s46, s24, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 42
+; GFX9-NEXT: s_lshr_b32 s46, s24, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 58
+; GFX9-NEXT: s_lshr_b32 s46, s23, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 43
+; GFX9-NEXT: s_lshr_b32 s46, s23, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 44
+; GFX9-NEXT: s_lshr_b32 s46, s23, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 59
+; GFX9-NEXT: s_lshr_b32 s46, s22, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 45
+; GFX9-NEXT: s_lshr_b32 s46, s22, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 60
+; GFX9-NEXT: s_lshr_b32 s46, s21, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 46
+; GFX9-NEXT: s_lshr_b32 s46, s21, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 47
+; GFX9-NEXT: s_lshr_b32 s46, s21, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 61
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 48
+; GFX9-NEXT: s_lshr_b32 s46, s20, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 62
+; GFX9-NEXT: s_lshr_b32 s46, s19, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 49
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 50
+; GFX9-NEXT: s_lshr_b32 s46, s19, 8
+; GFX9-NEXT: v_writelane_b32 v30, s46, 63
+; GFX9-NEXT: s_lshr_b32 s46, s18, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 51
+; GFX9-NEXT: s_lshr_b32 s46, s18, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 0
+; GFX9-NEXT: s_lshr_b32 s46, s17, 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 52
+; GFX9-NEXT: s_lshr_b32 s46, s17, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 53
+; GFX9-NEXT: s_lshr_b32 s46, s17, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 1
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
+; GFX9-NEXT: v_writelane_b32 v30, s46, 55
+; GFX9-NEXT: s_lshr_b32 s46, s16, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 2
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 16
+; GFX9-NEXT: v_writelane_b32 v30, s47, 17
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 14
+; GFX9-NEXT: v_writelane_b32 v30, s47, 15
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 12
+; GFX9-NEXT: v_writelane_b32 v30, s47, 13
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 10
+; GFX9-NEXT: v_writelane_b32 v30, s47, 11
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 8
+; GFX9-NEXT: v_writelane_b32 v30, s47, 9
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 6
+; GFX9-NEXT: v_writelane_b32 v30, s47, 7
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 4
+; GFX9-NEXT: v_writelane_b32 v30, s47, 5
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[22:23], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s47, 3
+; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; GFX9-NEXT: v_writelane_b32 v30, s46, 0
+; GFX9-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
+; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[20:21], 24
+; GFX9-NEXT: v_writelane_b32 v30, s47, 1
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[16:17], 24
; GFX9-NEXT: s_mov_b64 s[36:37], 0
; GFX9-NEXT: s_branch .LBB57_3
; GFX9-NEXT: .LBB57_2:
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 0
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 1
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr92
+; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr88
-; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr69
-; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr79
-; GFX9-NEXT: ; implicit-def: $sgpr68
; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr77
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr76
-; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr80
; GFX9-NEXT: ; implicit-def: $sgpr74
-; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr73
-; GFX9-NEXT: ; implicit-def: $sgpr66
-; GFX9-NEXT: ; implicit-def: $sgpr72
-; GFX9-NEXT: ; implicit-def: $sgpr63
-; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr61
-; GFX9-NEXT: ; implicit-def: $sgpr65
-; GFX9-NEXT: ; implicit-def: $sgpr60
-; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr58
-; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr51
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr56
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr57
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr84
-; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr83
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr81
-; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; kill: killed $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr30
-; GFX9-NEXT: ; implicit-def: $vcc_lo
-; GFX9-NEXT: ; implicit-def: $sgpr94
-; GFX9-NEXT: ; implicit-def: $sgpr92
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 2
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 4
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 5
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 6
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 7
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 8
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 9
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 10
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 11
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 12
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 13
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 14
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 15
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 16
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 17
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr90
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 0
+; GFX9-NEXT: v_writelane_b32 v30, s47, 1
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 2
+; GFX9-NEXT: v_writelane_b32 v30, s47, 3
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 4
+; GFX9-NEXT: v_writelane_b32 v30, s47, 5
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 6
+; GFX9-NEXT: v_writelane_b32 v30, s47, 7
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 8
+; GFX9-NEXT: v_writelane_b32 v30, s47, 9
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 10
+; GFX9-NEXT: v_writelane_b32 v30, s47, 11
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 12
+; GFX9-NEXT: v_writelane_b32 v30, s47, 13
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 14
+; GFX9-NEXT: v_writelane_b32 v30, s47, 15
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: v_writelane_b32 v30, s46, 16
+; GFX9-NEXT: v_writelane_b32 v30, s47, 17
; GFX9-NEXT: .LBB57_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
-; GFX9-NEXT: v_readlane_b32 s36, v30, 20
-; GFX9-NEXT: s_mov_b32 s37, s81
-; GFX9-NEXT: s_mov_b32 s81, s96
-; GFX9-NEXT: s_mov_b32 s96, s57
-; GFX9-NEXT: s_mov_b32 s47, s48
-; GFX9-NEXT: v_readlane_b32 s57, v30, 21
-; GFX9-NEXT: v_readlane_b32 s48, v30, 22
+; GFX9-NEXT: s_and_b64 s[46:47], s[36:37], exec
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
+; GFX9-NEXT: v_readlane_b32 s72, v30, 18
+; GFX9-NEXT: v_readlane_b32 s99, v30, 19
+; GFX9-NEXT: v_readlane_b32 s62, v30, 20
+; GFX9-NEXT: v_readlane_b32 s90, v30, 21
+; GFX9-NEXT: v_readlane_b32 s63, v30, 22
+; GFX9-NEXT: v_readlane_b32 s91, v30, 23
+; GFX9-NEXT: v_readlane_b32 s73, v30, 24
+; GFX9-NEXT: v_readlane_b32 s94, v30, 25
+; GFX9-NEXT: v_readlane_b32 s95, v30, 26
+; GFX9-NEXT: v_readlane_b32 s30, v30, 27
+; GFX9-NEXT: v_readlane_b32 vcc_hi, v30, 28
+; GFX9-NEXT: v_readlane_b32 s31, v30, 29
+; GFX9-NEXT: v_readlane_b32 s35, v30, 30
+; GFX9-NEXT: v_readlane_b32 s47, v30, 31
+; GFX9-NEXT: v_readlane_b32 s48, v30, 32
+; GFX9-NEXT: v_readlane_b32 s39, v30, 33
+; GFX9-NEXT: v_readlane_b32 vcc_lo, v30, 34
+; GFX9-NEXT: v_readlane_b32 s59, v30, 35
+; GFX9-NEXT: v_readlane_b32 s34, v30, 36
+; GFX9-NEXT: v_readlane_b32 s36, v30, 37
+; GFX9-NEXT: v_readlane_b32 s37, v30, 38
+; GFX9-NEXT: v_readlane_b32 s38, v30, 39
+; GFX9-NEXT: v_readlane_b32 s49, v30, 40
+; GFX9-NEXT: v_readlane_b32 s50, v30, 41
+; GFX9-NEXT: v_readlane_b32 s51, v30, 42
+; GFX9-NEXT: v_readlane_b32 s52, v30, 43
+; GFX9-NEXT: v_readlane_b32 s53, v30, 44
+; GFX9-NEXT: v_readlane_b32 s54, v30, 45
+; GFX9-NEXT: v_readlane_b32 s55, v30, 46
+; GFX9-NEXT: v_readlane_b32 s64, v30, 47
+; GFX9-NEXT: v_readlane_b32 s46, v30, 48
+; GFX9-NEXT: v_readlane_b32 s65, v30, 49
+; GFX9-NEXT: v_readlane_b32 s68, v30, 50
+; GFX9-NEXT: v_readlane_b32 s69, v30, 51
+; GFX9-NEXT: v_readlane_b32 s70, v30, 52
+; GFX9-NEXT: v_readlane_b32 s71, v30, 53
+; GFX9-NEXT: v_readlane_b32 s80, v30, 54
+; GFX9-NEXT: v_readlane_b32 s56, v30, 55
+; GFX9-NEXT: v_readlane_b32 s81, v30, 56
+; GFX9-NEXT: v_readlane_b32 s82, v30, 57
+; GFX9-NEXT: v_readlane_b32 s83, v30, 58
+; GFX9-NEXT: v_readlane_b32 s84, v30, 59
+; GFX9-NEXT: v_readlane_b32 s85, v30, 60
+; GFX9-NEXT: v_readlane_b32 s86, v30, 61
+; GFX9-NEXT: v_readlane_b32 s58, v30, 62
+; GFX9-NEXT: v_readlane_b32 s87, v30, 63
+; GFX9-NEXT: v_readlane_b32 s57, v31, 0
+; GFX9-NEXT: v_readlane_b32 s60, v31, 1
+; GFX9-NEXT: v_readlane_b32 s61, v31, 2
+; GFX9-NEXT: v_readlane_b32 s66, v30, 4
+; GFX9-NEXT: v_readlane_b32 s67, v30, 5
; GFX9-NEXT: s_cbranch_scc1 .LBB57_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_u32 s16, s16, 3
@@ -80532,424 +81207,425 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_addc_u32 s7, s7, 0
; GFX9-NEXT: s_add_u32 s4, s4, 3
; GFX9-NEXT: s_addc_u32 s5, s5, 0
-; GFX9-NEXT: s_lshr_b32 s90, s27, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 23
-; GFX9-NEXT: s_lshr_b32 s90, s26, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 24
-; GFX9-NEXT: s_lshr_b32 s90, s26, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 25
-; GFX9-NEXT: s_lshr_b32 s90, s25, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 26
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 27
-; GFX9-NEXT: s_lshr_b32 s90, s25, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 28
-; GFX9-NEXT: s_lshr_b32 s90, s24, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 29
-; GFX9-NEXT: s_lshr_b32 s90, s24, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 30
-; GFX9-NEXT: s_lshr_b32 s90, s23, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 31
-; GFX9-NEXT: s_lshr_b32 s90, s23, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 32
-; GFX9-NEXT: s_lshr_b32 s90, s23, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 33
-; GFX9-NEXT: s_lshr_b32 s90, s22, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 34
-; GFX9-NEXT: s_lshr_b32 s90, s22, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 35
-; GFX9-NEXT: s_lshr_b32 s90, s21, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 36
-; GFX9-NEXT: s_lshr_b32 s90, s21, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 37
-; GFX9-NEXT: s_lshr_b32 s90, s21, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 38
-; GFX9-NEXT: s_lshr_b32 s90, s20, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 39
-; GFX9-NEXT: s_lshr_b32 s90, s20, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 40
-; GFX9-NEXT: s_lshr_b32 s90, s19, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 41
-; GFX9-NEXT: s_lshr_b32 s90, s19, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 42
-; GFX9-NEXT: s_lshr_b32 s90, s19, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 43
-; GFX9-NEXT: s_lshr_b32 s90, s18, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 44
-; GFX9-NEXT: s_lshr_b32 s90, s18, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 45
-; GFX9-NEXT: s_lshr_b32 s90, s17, 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 46
-; GFX9-NEXT: s_lshr_b32 s90, s17, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 47
-; GFX9-NEXT: s_lshr_b32 s90, s17, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 48
-; GFX9-NEXT: s_lshr_b32 s90, s16, 16
-; GFX9-NEXT: v_writelane_b32 v30, s90, 49
-; GFX9-NEXT: s_lshr_b32 s90, s16, 8
-; GFX9-NEXT: v_writelane_b32 v30, s90, 50
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
-; GFX9-NEXT: v_writelane_b32 v30, s90, 18
-; GFX9-NEXT: v_writelane_b32 v30, s91, 19
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[8:9], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 16
-; GFX9-NEXT: v_writelane_b32 v30, s93, 17
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[10:11], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 14
-; GFX9-NEXT: v_writelane_b32 v30, s93, 15
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 12
-; GFX9-NEXT: v_writelane_b32 v30, s93, 13
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 10
-; GFX9-NEXT: v_writelane_b32 v30, s93, 11
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 8
-; GFX9-NEXT: v_writelane_b32 v30, s93, 9
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[42:43], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 6
-; GFX9-NEXT: v_writelane_b32 v30, s93, 7
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[44:45], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 4
-; GFX9-NEXT: v_writelane_b32 v30, s93, 5
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[28:29], 24
+; GFX9-NEXT: s_lshr_b32 s46, s5, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 3
+; GFX9-NEXT: s_lshr_b32 s46, s4, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 4
+; GFX9-NEXT: s_lshr_b32 s46, s4, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 5
+; GFX9-NEXT: s_lshr_b32 s46, s7, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 6
+; GFX9-NEXT: s_lshr_b32 s46, s7, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 7
+; GFX9-NEXT: s_lshr_b32 s46, s7, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 8
+; GFX9-NEXT: s_lshr_b32 s46, s6, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 9
+; GFX9-NEXT: s_lshr_b32 s46, s6, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 10
+; GFX9-NEXT: s_lshr_b32 s46, s9, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 11
+; GFX9-NEXT: s_lshr_b32 s46, s9, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 12
+; GFX9-NEXT: s_lshr_b32 s46, s9, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 13
+; GFX9-NEXT: s_lshr_b32 s46, s8, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 14
+; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 15
+; GFX9-NEXT: s_lshr_b32 s46, s11, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 16
+; GFX9-NEXT: s_lshr_b32 s46, s11, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 17
+; GFX9-NEXT: s_lshr_b32 s46, s11, 8
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 18
+; GFX9-NEXT: s_lshr_b32 s46, s10, 16
+; GFX9-NEXT: v_writelane_b32 v30, s62, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 19
+; GFX9-NEXT: s_lshr_b32 s46, s10, 8
+; GFX9-NEXT: v_writelane_b32 v30, s63, 17
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 20
+; GFX9-NEXT: s_lshr_b32 s46, s13, 24
+; GFX9-NEXT: v_writelane_b32 v30, s62, 14
+; GFX9-NEXT: v_writelane_b32 v31, s46, 21
+; GFX9-NEXT: s_lshr_b32 s46, s13, 16
+; GFX9-NEXT: v_writelane_b32 v30, s63, 15
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s13, 8
+; GFX9-NEXT: v_writelane_b32 v30, s76, 12
+; GFX9-NEXT: v_writelane_b32 v31, s46, 23
+; GFX9-NEXT: s_lshr_b32 s46, s12, 16
+; GFX9-NEXT: v_writelane_b32 v30, s77, 13
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 24
+; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: v_writelane_b32 v30, s76, 10
+; GFX9-NEXT: v_writelane_b32 v31, s46, 25
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
+; GFX9-NEXT: v_writelane_b32 v30, s77, 11
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 26
+; GFX9-NEXT: s_lshr_b32 s46, s15, 16
+; GFX9-NEXT: v_writelane_b32 v30, s76, 8
+; GFX9-NEXT: v_writelane_b32 v31, s46, 27
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: v_writelane_b32 v30, s77, 9
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 28
+; GFX9-NEXT: s_lshr_b32 s46, s14, 16
+; GFX9-NEXT: s_lshr_b32 s92, s43, 24
+; GFX9-NEXT: v_writelane_b32 v30, s66, 6
+; GFX9-NEXT: v_writelane_b32 v31, s46, 29
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: s_mov_b32 s63, s92
+; GFX9-NEXT: v_writelane_b32 v30, s67, 7
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[22:23], 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 30
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
; GFX9-NEXT: v_writelane_b32 v30, s92, 2
+; GFX9-NEXT: v_writelane_b32 v31, s46, 31
+; GFX9-NEXT: s_lshr_b32 s46, s41, 16
+; GFX9-NEXT: s_lshr_b32 s99, s40, 16
; GFX9-NEXT: v_writelane_b32 v30, s93, 3
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[26:27], 24
-; GFX9-NEXT: v_writelane_b32 v30, s92, 0
-; GFX9-NEXT: s_lshr_b32 s36, s5, 24
-; GFX9-NEXT: s_lshr_b32 s37, s5, 16
-; GFX9-NEXT: s_lshr_b32 s82, s5, 8
-; GFX9-NEXT: s_lshr_b32 s81, s4, 16
-; GFX9-NEXT: s_lshr_b32 s83, s4, 8
-; GFX9-NEXT: s_lshr_b32 s86, s7, 24
-; GFX9-NEXT: s_lshr_b32 s84, s7, 16
-; GFX9-NEXT: s_lshr_b32 s87, s7, 8
-; GFX9-NEXT: s_lshr_b32 s96, s6, 16
-; GFX9-NEXT: s_lshr_b32 s97, s6, 8
-; GFX9-NEXT: s_lshr_b32 s98, s9, 24
-; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: s_lshr_b32 s47, s9, 8
-; GFX9-NEXT: s_lshr_b32 s39, s8, 16
-; GFX9-NEXT: s_lshr_b32 s38, s8, 8
-; GFX9-NEXT: s_lshr_b32 s57, s11, 24
-; GFX9-NEXT: s_lshr_b32 s56, s11, 16
-; GFX9-NEXT: s_lshr_b32 s49, s11, 8
-; GFX9-NEXT: s_lshr_b32 s48, s10, 16
-; GFX9-NEXT: s_lshr_b32 s50, s10, 8
-; GFX9-NEXT: s_lshr_b32 s51, s13, 24
-; GFX9-NEXT: s_lshr_b32 s52, s13, 16
-; GFX9-NEXT: s_lshr_b32 s59, s13, 8
-; GFX9-NEXT: s_lshr_b32 s58, s12, 16
-; GFX9-NEXT: s_lshr_b32 s67, s12, 8
-; GFX9-NEXT: s_lshr_b32 s60, s15, 24
-; GFX9-NEXT: s_lshr_b32 s65, s15, 16
-; GFX9-NEXT: s_lshr_b32 s61, s15, 8
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s55, s14, 8
-; GFX9-NEXT: s_lshr_b32 s63, s41, 24
-; GFX9-NEXT: s_lshr_b32 s72, s41, 16
-; GFX9-NEXT: s_lshr_b32 s66, s41, 8
-; GFX9-NEXT: s_lshr_b32 s73, s40, 16
-; GFX9-NEXT: s_lshr_b32 s64, s40, 8
-; GFX9-NEXT: s_lshr_b32 s74, s43, 24
-; GFX9-NEXT: s_lshr_b32 s80, s43, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 8
-; GFX9-NEXT: s_lshr_b32 s76, s42, 16
-; GFX9-NEXT: s_lshr_b32 s70, s42, 8
-; GFX9-NEXT: s_lshr_b32 s77, s45, 24
-; GFX9-NEXT: s_lshr_b32 s78, s45, 16
-; GFX9-NEXT: s_lshr_b32 s68, s45, 8
-; GFX9-NEXT: s_lshr_b32 s79, s44, 16
-; GFX9-NEXT: s_lshr_b32 s71, s44, 8
-; GFX9-NEXT: s_lshr_b32 s69, s29, 24
-; GFX9-NEXT: s_lshr_b32 s85, s29, 16
-; GFX9-NEXT: s_lshr_b32 s88, s29, 8
-; GFX9-NEXT: s_lshr_b32 s54, s28, 16
-; GFX9-NEXT: s_lshr_b32 s89, s28, 8
-; GFX9-NEXT: s_lshr_b32 s99, s27, 24
-; GFX9-NEXT: s_lshr_b32 s53, s27, 16
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24
-; GFX9-NEXT: v_writelane_b32 v30, s93, 1
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 vcc, s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[16:17], 24
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[18:19], 24
+; GFX9-NEXT: s_lshr_b32 s74, s5, 16
+; GFX9-NEXT: v_writelane_b32 v31, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: s_mov_b32 s62, s99
+; GFX9-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
+; GFX9-NEXT: v_writelane_b32 v30, s96, 0
+; GFX9-NEXT: s_lshr_b32 s72, s5, 24
+; GFX9-NEXT: v_writelane_b32 v31, s46, 33
+; GFX9-NEXT: s_lshr_b32 s90, s40, 8
+; GFX9-NEXT: s_lshr_b32 s91, s43, 16
+; GFX9-NEXT: s_lshr_b32 s73, s43, 8
+; GFX9-NEXT: s_lshr_b32 s94, s42, 16
+; GFX9-NEXT: s_lshr_b32 s95, s42, 8
+; GFX9-NEXT: s_lshr_b32 s30, s45, 24
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s45, 16
+; GFX9-NEXT: s_lshr_b32 s31, s45, 8
+; GFX9-NEXT: s_lshr_b32 s35, s44, 16
+; GFX9-NEXT: s_lshr_b32 s47, s44, 8
+; GFX9-NEXT: s_lshr_b32 s48, s29, 24
+; GFX9-NEXT: s_lshr_b32 s39, s29, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s29, 8
+; GFX9-NEXT: s_lshr_b32 s59, s28, 16
+; GFX9-NEXT: s_lshr_b32 s34, s28, 8
+; GFX9-NEXT: s_lshr_b32 s36, s27, 24
+; GFX9-NEXT: s_lshr_b32 s37, s27, 16
+; GFX9-NEXT: s_lshr_b32 s80, s27, 8
+; GFX9-NEXT: s_lshr_b32 s38, s26, 16
+; GFX9-NEXT: s_lshr_b32 s81, s26, 8
+; GFX9-NEXT: s_lshr_b32 s49, s25, 24
+; GFX9-NEXT: s_lshr_b32 s50, s25, 16
+; GFX9-NEXT: s_lshr_b32 s82, s25, 8
+; GFX9-NEXT: s_lshr_b32 s51, s24, 16
+; GFX9-NEXT: s_lshr_b32 s83, s24, 8
+; GFX9-NEXT: s_lshr_b32 s52, s23, 24
+; GFX9-NEXT: s_lshr_b32 s53, s23, 16
+; GFX9-NEXT: s_lshr_b32 s84, s23, 8
+; GFX9-NEXT: s_lshr_b32 s54, s22, 16
+; GFX9-NEXT: s_lshr_b32 s85, s22, 8
+; GFX9-NEXT: s_lshr_b32 s55, s21, 24
+; GFX9-NEXT: s_lshr_b32 s64, s21, 16
+; GFX9-NEXT: s_lshr_b32 s86, s21, 8
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
+; GFX9-NEXT: s_lshr_b32 s58, s20, 8
+; GFX9-NEXT: s_lshr_b32 s65, s19, 24
+; GFX9-NEXT: s_lshr_b32 s68, s19, 16
+; GFX9-NEXT: s_lshr_b32 s87, s19, 8
+; GFX9-NEXT: s_lshr_b32 s69, s18, 16
+; GFX9-NEXT: s_lshr_b32 s57, s18, 8
+; GFX9-NEXT: s_lshr_b32 s70, s17, 24
+; GFX9-NEXT: s_lshr_b32 s71, s17, 16
+; GFX9-NEXT: s_lshr_b32 s60, s17, 8
+; GFX9-NEXT: s_lshr_b32 s56, s16, 16
+; GFX9-NEXT: s_lshr_b32 s61, s16, 8
+; GFX9-NEXT: s_mov_b32 s99, s74
+; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[88:89], s[44:45], 24
+; GFX9-NEXT: s_lshr_b64 s[76:77], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[66:67], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[20:21], 24
+; GFX9-NEXT: v_writelane_b32 v30, s97, 1
+; GFX9-NEXT: s_lshr_b64 s[96:97], s[16:17], 24
; GFX9-NEXT: .LBB57_5: ; %end
-; GFX9-NEXT: v_readlane_b32 s91, v30, 50
-; GFX9-NEXT: v_mov_b32_e32 v2, s91
-; GFX9-NEXT: v_readlane_b32 s91, v30, 48
+; GFX9-NEXT: v_mov_b32_e32 v6, s96
; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v4, s91
+; GFX9-NEXT: v_mov_b32_e32 v2, s61
+; GFX9-NEXT: v_perm_b32 v6, s56, v6, v1
+; GFX9-NEXT: v_mov_b32_e32 v4, s60
; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 45
+; GFX9-NEXT: v_mov_b32_e32 v21, s70
+; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1
-; GFX9-NEXT: v_mov_b32_e32 v4, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 43
-; GFX9-NEXT: v_mov_b32_e32 v6, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 40
-; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
-; GFX9-NEXT: v_perm_b32 v4, s19, v6, v1
-; GFX9-NEXT: v_mov_b32_e32 v6, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 38
-; GFX9-NEXT: v_mov_b32_e32 v9, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 35
-; GFX9-NEXT: v_perm_b32 v7, s20, v6, v1
-; GFX9-NEXT: v_perm_b32 v6, s21, v9, v1
-; GFX9-NEXT: v_mov_b32_e32 v9, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 33
-; GFX9-NEXT: v_mov_b32_e32 v12, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 30
-; GFX9-NEXT: v_perm_b32 v10, s22, v9, v1
-; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
-; GFX9-NEXT: v_mov_b32_e32 v12, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 28
-; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: v_readlane_b32 s16, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v19, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 25
-; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
-; GFX9-NEXT: v_perm_b32 v12, s25, v15, v1
-; GFX9-NEXT: v_readlane_b32 s17, v30, 1
-; GFX9-NEXT: v_mov_b32_e32 v15, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 23
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 2
-; GFX9-NEXT: v_mov_b32_e32 v8, s34
-; GFX9-NEXT: v_perm_b32 v16, s26, v15, v1
-; GFX9-NEXT: v_perm_b32 v15, s27, v20, v1
-; GFX9-NEXT: v_mov_b32_e32 v20, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 49
-; GFX9-NEXT: v_perm_b32 v8, s16, v8, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 46
-; GFX9-NEXT: v_mov_b32_e32 v21, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 47
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_perm_b32 v21, s16, v21, v1
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX9-NEXT: v_mov_b32_e32 v11, s30
-; GFX9-NEXT: v_readlane_b32 s16, v30, 44
+; GFX9-NEXT: v_perm_b32 v21, s71, v21, v1
+; GFX9-NEXT: v_or_b32_e32 v3, v3, v6
+; GFX9-NEXT: v_mov_b32_e32 v10, s16
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21
-; GFX9-NEXT: v_perm_b32 v11, s16, v11, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 41
+; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_perm_b32 v10, s69, v10, v1
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v22, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 42
+; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1
+; GFX9-NEXT: v_mov_b32_e32 v22, s65
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; GFX9-NEXT: v_perm_b32 v22, s16, v22, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; GFX9-NEXT: v_mov_b32_e32 v7, s87
+; GFX9-NEXT: v_perm_b32 v22, s68, v22, v1
; GFX9-NEXT: v_or_b32_e32 v2, v5, v2
-; GFX9-NEXT: v_mov_b32_e32 v14, vcc_lo
-; GFX9-NEXT: v_readlane_b32 s16, v30, 39
+; GFX9-NEXT: v_perm_b32 v4, s19, v7, v1
+; GFX9-NEXT: v_mov_b32_e32 v14, s92
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; GFX9-NEXT: v_perm_b32 v14, s16, v14, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 36
+; GFX9-NEXT: v_mov_b32_e32 v7, s58
+; GFX9-NEXT: v_perm_b32 v14, s46, v14, v1
; GFX9-NEXT: v_or_b32_e32 v2, v4, v2
-; GFX9-NEXT: v_mov_b32_e32 v23, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 37
+; GFX9-NEXT: v_readlane_b32 s17, v30, 1
+; GFX9-NEXT: v_perm_b32 v8, s20, v7, v1
+; GFX9-NEXT: v_mov_b32_e32 v23, s55
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; GFX9-NEXT: v_perm_b32 v23, s16, v23, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX9-NEXT: v_mov_b32_e32 v17, s94
-; GFX9-NEXT: v_readlane_b32 s16, v30, 34
+; GFX9-NEXT: v_mov_b32_e32 v9, s86
+; GFX9-NEXT: v_readlane_b32 s16, v30, 2
+; GFX9-NEXT: v_perm_b32 v23, s64, v23, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v8, v2
+; GFX9-NEXT: v_perm_b32 v7, s21, v9, v1
+; GFX9-NEXT: v_mov_b32_e32 v15, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; GFX9-NEXT: v_perm_b32 v17, s16, v17, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 31
-; GFX9-NEXT: v_or_b32_e32 v2, v6, v2
-; GFX9-NEXT: v_mov_b32_e32 v24, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 32
+; GFX9-NEXT: v_mov_b32_e32 v9, s85
+; GFX9-NEXT: v_perm_b32 v15, s54, v15, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v7, v2
+; GFX9-NEXT: v_perm_b32 v11, s22, v9, v1
+; GFX9-NEXT: v_mov_b32_e32 v24, s52
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; GFX9-NEXT: v_perm_b32 v24, s16, v24, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v10, v2
-; GFX9-NEXT: v_mov_b32_e32 v18, s92
-; GFX9-NEXT: v_readlane_b32 s16, v30, 29
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15
+; GFX9-NEXT: v_mov_b32_e32 v12, s84
+; GFX9-NEXT: v_perm_b32 v24, s53, v24, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v11, v2
+; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v16, s66
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; GFX9-NEXT: v_perm_b32 v18, s16, v18, v1
-; GFX9-NEXT: v_readlane_b32 s16, v30, 26
+; GFX9-NEXT: v_mov_b32_e32 v12, s83
+; GFX9-NEXT: v_perm_b32 v16, s51, v16, v1
; GFX9-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX9-NEXT: v_mov_b32_e32 v25, s16
-; GFX9-NEXT: v_readlane_b32 s16, v30, 27
+; GFX9-NEXT: v_readlane_b32 s17, v30, 3
+; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, s49
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v18
-; GFX9-NEXT: v_perm_b32 v25, s16, v25, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; GFX9-NEXT: v_mov_b32_e32 v17, s82
+; GFX9-NEXT: v_readlane_b32 s16, v30, 6
+; GFX9-NEXT: v_perm_b32 v25, s50, v25, v1
; GFX9-NEXT: v_or_b32_e32 v2, v13, v2
-; GFX9-NEXT: v_readlane_b32 s16, v30, 24
+; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1
+; GFX9-NEXT: v_mov_b32_e32 v17, s16
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; GFX9-NEXT: v_perm_b32 v19, s16, v19, v1
+; GFX9-NEXT: v_mov_b32_e32 v18, s81
+; GFX9-NEXT: v_perm_b32 v17, s38, v17, v1
; GFX9-NEXT: v_or_b32_e32 v2, v12, v2
-; GFX9-NEXT: v_mov_b32_e32 v26, s99
+; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1
+; GFX9-NEXT: v_mov_b32_e32 v26, s36
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; GFX9-NEXT: v_perm_b32 v26, s53, v26, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; GFX9-NEXT: v_mov_b32_e32 v19, s80
+; GFX9-NEXT: v_perm_b32 v26, s37, v26, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v18, v2
+; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1
+; GFX9-NEXT: v_mov_b32_e32 v20, s76
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; GFX9-NEXT: v_mov_b32_e32 v27, s89
-; GFX9-NEXT: v_perm_b32 v20, s54, v20, v1
-; GFX9-NEXT: v_or_b32_e32 v2, v15, v2
+; GFX9-NEXT: v_mov_b32_e32 v27, s34
+; GFX9-NEXT: v_perm_b32 v20, s59, v20, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v19, v2
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s69
-; GFX9-NEXT: v_readlane_b32 s17, v30, 3
-; GFX9-NEXT: v_mov_b32_e32 v28, s88
-; GFX9-NEXT: v_perm_b32 v3, s85, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s48
+; GFX9-NEXT: v_mov_b32_e32 v28, vcc_lo
+; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 4
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s88
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_mov_b32_e32 v2, s71
-; GFX9-NEXT: v_perm_b32 v3, s79, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s47
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s77
-; GFX9-NEXT: v_readlane_b32 s17, v30, 5
+; GFX9-NEXT: v_mov_b32_e32 v3, s30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_mov_b32_e32 v2, s68
-; GFX9-NEXT: v_perm_b32 v3, s78, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s31
+; GFX9-NEXT: v_perm_b32 v3, vcc_hi, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 6
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s78
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_mov_b32_e32 v2, s70
-; GFX9-NEXT: v_perm_b32 v3, s76, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s95
+; GFX9-NEXT: v_perm_b32 v3, s94, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s74
-; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_mov_b32_e32 v3, s63
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_mov_b32_e32 v2, s75
-; GFX9-NEXT: v_perm_b32 v3, s80, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s73
+; GFX9-NEXT: v_perm_b32 v3, s91, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 8
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_mov_b32_e32 v3, s74
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_mov_b32_e32 v2, s64
-; GFX9-NEXT: v_perm_b32 v3, s73, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s90
+; GFX9-NEXT: v_perm_b32 v3, s62, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s63
-; GFX9-NEXT: v_readlane_b32 s17, v30, 9
+; GFX9-NEXT: v_readlane_b32 s16, v31, 33
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_mov_b32_e32 v2, s66
-; GFX9-NEXT: v_perm_b32 v3, s72, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 31
+; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 32
+; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s16, v30, 10
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s16
+; GFX9-NEXT: v_readlane_b32 s16, v31, 30
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: v_mov_b32_e32 v2, s55
-; GFX9-NEXT: v_perm_b32 v3, s62, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s98
+; GFX9-NEXT: v_readlane_b32 s14, v31, 29
+; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s60
+; GFX9-NEXT: v_readlane_b32 s14, v31, 28
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: v_mov_b32_e32 v2, s61
-; GFX9-NEXT: v_perm_b32 v3, s65, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 26
+; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 27
+; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s14, v30, 12
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s14, v31, 25
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: v_mov_b32_e32 v2, s67
-; GFX9-NEXT: v_perm_b32 v3, s58, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s14
+; GFX9-NEXT: v_readlane_b32 s14, v30, 8
; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s14
+; GFX9-NEXT: v_readlane_b32 s12, v31, 24
+; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s51
+; GFX9-NEXT: v_readlane_b32 s12, v31, 23
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: v_mov_b32_e32 v2, s59
-; GFX9-NEXT: v_perm_b32 v3, s52, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 21
+; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 22
+; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s12, v30, 14
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s12, v31, 20
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: v_mov_b32_e32 v2, s50
-; GFX9-NEXT: v_perm_b32 v3, s48, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s12
+; GFX9-NEXT: v_readlane_b32 s12, v30, 10
; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s12
+; GFX9-NEXT: v_readlane_b32 s10, v31, 19
+; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s57
+; GFX9-NEXT: v_readlane_b32 s10, v31, 18
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: v_mov_b32_e32 v2, s49
-; GFX9-NEXT: v_perm_b32 v3, s56, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 16
+; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 17
+; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s10, v30, 16
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s10, v31, 15
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: v_mov_b32_e32 v2, s38
-; GFX9-NEXT: v_perm_b32 v3, s39, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s10
+; GFX9-NEXT: v_readlane_b32 s10, v30, 12
; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s10
+; GFX9-NEXT: v_readlane_b32 s8, v31, 14
+; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s98
+; GFX9-NEXT: v_readlane_b32 s8, v31, 13
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: v_mov_b32_e32 v2, s47
-; GFX9-NEXT: v_perm_b32 v3, s46, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s8
+; GFX9-NEXT: v_readlane_b32 s8, v31, 11
+; GFX9-NEXT: v_mov_b32_e32 v3, s8
+; GFX9-NEXT: v_readlane_b32 s8, v31, 12
+; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s90
+; GFX9-NEXT: v_readlane_b32 s8, v31, 10
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: v_mov_b32_e32 v2, s97
-; GFX9-NEXT: v_perm_b32 v3, s96, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s8
+; GFX9-NEXT: v_readlane_b32 s8, v30, 14
; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s8
+; GFX9-NEXT: v_readlane_b32 s6, v31, 9
+; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s86
+; GFX9-NEXT: v_readlane_b32 s6, v31, 8
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: v_mov_b32_e32 v2, s87
-; GFX9-NEXT: v_perm_b32 v3, s84, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 6
+; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 7
+; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1
; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_readlane_b32 s6, v30, 18
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s6, v31, 5
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: v_mov_b32_e32 v2, s83
-; GFX9-NEXT: v_perm_b32 v3, s81, v3, v1
+; GFX9-NEXT: v_mov_b32_e32 v2, s6
+; GFX9-NEXT: v_readlane_b32 s6, v30, 16
; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, s6
+; GFX9-NEXT: v_readlane_b32 s4, v31, 4
+; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX9-NEXT: v_readlane_b32 s4, v31, 3
; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: v_mov_b32_e32 v2, s82
-; GFX9-NEXT: v_mov_b32_e32 v3, s36
+; GFX9-NEXT: v_mov_b32_e32 v2, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s72
; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1
-; GFX9-NEXT: v_perm_b32 v1, s37, v3, v1
+; GFX9-NEXT: v_perm_b32 v1, s99, v3, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: v_readlane_b32 s30, v29, 34
-; GFX9-NEXT: v_readlane_b32 s17, v30, 11
-; GFX9-NEXT: v_readlane_b32 s15, v30, 13
-; GFX9-NEXT: v_readlane_b32 s13, v30, 15
-; GFX9-NEXT: v_readlane_b32 s11, v30, 17
-; GFX9-NEXT: v_readlane_b32 s7, v30, 19
+; GFX9-NEXT: v_readlane_b32 s17, v30, 7
+; GFX9-NEXT: v_readlane_b32 s15, v30, 9
+; GFX9-NEXT: v_readlane_b32 s13, v30, 11
+; GFX9-NEXT: v_readlane_b32 s11, v30, 13
+; GFX9-NEXT: v_readlane_b32 s9, v30, 15
+; GFX9-NEXT: v_readlane_b32 s7, v30, 17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: v_readlane_b32 s31, v29, 35
; GFX9-NEXT: v_readlane_b32 s99, v29, 33
@@ -80989,6 +81665,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -81060,300 +81737,303 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX11-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s103, 0
+; GFX11-NEXT: s_mov_b32 s99, 0
; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB57_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s43, s8, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 18
-; GFX11-NEXT: s_lshr_b32 s43, s12, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: s_lshr_b32 s31, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 19
-; GFX11-NEXT: s_lshr_b32 s43, s22, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
+; GFX11-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-NEXT: s_lshr_b32 s46, s25, 8
+; GFX11-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-NEXT: s_lshr_b32 s30, s27, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s5, 8
+; GFX11-NEXT: s_lshr_b32 s43, s27, 16
+; GFX11-NEXT: s_lshr_b32 s104, s27, 8
+; GFX11-NEXT: s_lshr_b32 s34, s26, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 4
; GFX11-NEXT: s_lshr_b32 s42, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 20
-; GFX11-NEXT: s_lshr_b32 s43, s20, 16
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 21
-; GFX11-NEXT: s_lshr_b32 s43, s20, 8
-; GFX11-NEXT: s_lshr_b32 s61, s6, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s48, s9, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 22
-; GFX11-NEXT: s_lshr_b32 s43, s19, 8
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 23
-; GFX11-NEXT: s_lshr_b32 s43, s18, 16
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 24
-; GFX11-NEXT: s_lshr_b32 s43, s18, 8
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 25
-; GFX11-NEXT: s_lshr_b32 s43, s17, 24
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 26
-; GFX11-NEXT: s_lshr_b32 s43, s17, 16
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 27
-; GFX11-NEXT: s_lshr_b32 s43, s17, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: v_writelane_b32 v26, s43, 28
-; GFX11-NEXT: s_lshr_b32 s43, s16, 16
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 29
-; GFX11-NEXT: s_lshr_b32 s43, s16, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v26, s43, 30
-; GFX11-NEXT: s_lshr_b32 s43, s3, 24
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v26, s43, 31
-; GFX11-NEXT: s_lshr_b32 s43, s3, 16
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 0
-; GFX11-NEXT: s_lshr_b32 s43, s3, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 1
-; GFX11-NEXT: s_lshr_b32 s43, s2, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 2
-; GFX11-NEXT: s_lshr_b32 s43, s2, 8
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 3
-; GFX11-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 4
-; GFX11-NEXT: s_lshr_b32 s43, s1, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 5
-; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: v_writelane_b32 v25, s43, 6
-; GFX11-NEXT: s_lshr_b32 s43, s0, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: v_writelane_b32 v25, s43, 7
-; GFX11-NEXT: s_lshr_b32 s43, s0, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v25, s43, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
+; GFX11-NEXT: s_lshr_b32 s103, s26, 8
+; GFX11-NEXT: s_lshr_b32 s53, s25, 24
+; GFX11-NEXT: s_lshr_b32 s51, s25, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s4, 8
+; GFX11-NEXT: s_lshr_b32 s54, s24, 16
+; GFX11-NEXT: s_lshr_b32 s39, s24, 8
+; GFX11-NEXT: s_lshr_b32 s80, s23, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-NEXT: s_lshr_b32 s69, s23, 16
+; GFX11-NEXT: s_lshr_b32 s49, s23, 8
+; GFX11-NEXT: s_lshr_b32 s98, s22, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 8
+; GFX11-NEXT: s_lshr_b32 s86, s21, 24
+; GFX11-NEXT: s_lshr_b32 s85, s21, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-NEXT: s_lshr_b32 s96, s21, 8
+; GFX11-NEXT: s_lshr_b32 s97, s20, 16
+; GFX11-NEXT: s_lshr_b32 s87, s20, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 9
+; GFX11-NEXT: s_lshr_b32 s42, s6, 16
+; GFX11-NEXT: s_lshr_b32 s84, s19, 24
+; GFX11-NEXT: s_lshr_b32 s83, s19, 16
+; GFX11-NEXT: s_lshr_b32 s31, s19, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 10
+; GFX11-NEXT: s_lshr_b32 s42, s6, 8
+; GFX11-NEXT: s_lshr_b32 s35, s18, 16
+; GFX11-NEXT: s_lshr_b32 s36, s18, 8
+; GFX11-NEXT: s_lshr_b32 s81, s17, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 11
+; GFX11-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-NEXT: s_lshr_b32 s70, s17, 16
+; GFX11-NEXT: s_lshr_b32 s37, s17, 8
+; GFX11-NEXT: s_lshr_b32 s38, s16, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 12
+; GFX11-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-NEXT: s_lshr_b32 s67, s3, 24
+; GFX11-NEXT: s_lshr_b32 s66, s3, 16
+; GFX11-NEXT: s_lshr_b32 s48, s3, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 13
+; GFX11-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-NEXT: s_lshr_b32 s50, s2, 16
+; GFX11-NEXT: s_lshr_b32 s52, s2, 8
+; GFX11-NEXT: s_lshr_b32 s64, s1, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-NEXT: s_lshr_b32 s55, s1, 16
+; GFX11-NEXT: s_lshr_b32 s68, s1, 8
+; GFX11-NEXT: s_lshr_b32 s71, s0, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 15
+; GFX11-NEXT: s_lshr_b32 s42, s8, 8
+; GFX11-NEXT: s_lshr_b32 s82, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[100:101], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 16
+; GFX11-NEXT: s_lshr_b32 s42, s11, 24
+; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24
+; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 17
+; GFX11-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 18
+; GFX11-NEXT: s_lshr_b32 s42, s11, 8
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
+; GFX11-NEXT: v_writelane_b32 v26, s42, 19
+; GFX11-NEXT: s_lshr_b32 s42, s10, 16
; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 20
+; GFX11-NEXT: s_lshr_b32 s42, s10, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 21
+; GFX11-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 22
+; GFX11-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 23
+; GFX11-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 24
+; GFX11-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 25
+; GFX11-NEXT: s_lshr_b32 s42, s12, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 26
+; GFX11-NEXT: s_lshr_b32 s42, s15, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 27
+; GFX11-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 28
+; GFX11-NEXT: s_lshr_b32 s42, s15, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 29
+; GFX11-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 30
+; GFX11-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 31
+; GFX11-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-NEXT: v_writelane_b32 v25, s42, 0
+; GFX11-NEXT: s_lshr_b32 s42, s41, 16
+; GFX11-NEXT: v_writelane_b32 v26, s44, 0
+; GFX11-NEXT: v_writelane_b32 v25, s42, 1
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v26, s45, 1
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24
+; GFX11-NEXT: s_mov_b32 s45, s46
+; GFX11-NEXT: v_writelane_b32 v25, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s40, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-NEXT: v_writelane_b32 v25, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-NEXT: s_branch .LBB57_3
; GFX11-NEXT: .LBB57_2:
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: s_mov_b32 s103, -1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: s_mov_b32 s99, -1
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: v_writelane_b32 v26, s46, 0
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr82
+; GFX11-NEXT: ; implicit-def: $sgpr71
; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr50
; GFX11-NEXT: ; implicit-def: $sgpr94
+; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr38
; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr37
; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr79
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr77
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
-; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr99
+; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr36
+; GFX11-NEXT: ; implicit-def: $sgpr35
+; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr83
+; GFX11-NEXT: ; implicit-def: $sgpr84
; GFX11-NEXT: ; implicit-def: $sgpr87
; GFX11-NEXT: ; implicit-def: $sgpr97
+; GFX11-NEXT: ; implicit-def: $sgpr88
; GFX11-NEXT: ; implicit-def: $sgpr96
; GFX11-NEXT: ; implicit-def: $sgpr85
; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr78
+; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr69
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr39
; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr63
-; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr72
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr51
; GFX11-NEXT: ; implicit-def: $sgpr53
+; GFX11-NEXT: ; implicit-def: $sgpr103
+; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr43
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr76
+; GFX11-NEXT: ; implicit-def: $sgpr74
+; GFX11-NEXT: ; implicit-def: $sgpr62
; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr59
; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr57
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr100
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: v_writelane_b32 v26, s47, 1
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; kill: killed $sgpr44
; GFX11-NEXT: ; implicit-def: $sgpr44
-; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr61
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr30
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s42, 0
-; GFX11-NEXT: v_writelane_b32 v26, s43, 1
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: v_writelane_b32 v26, s72, 2
-; GFX11-NEXT: v_writelane_b32 v26, s73, 3
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 4
-; GFX11-NEXT: v_writelane_b32 v26, s73, 5
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 6
-; GFX11-NEXT: v_writelane_b32 v26, s73, 7
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 8
-; GFX11-NEXT: v_writelane_b32 v26, s73, 9
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 10
-; GFX11-NEXT: v_writelane_b32 v26, s73, 11
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 12
-; GFX11-NEXT: v_writelane_b32 v26, s73, 13
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 14
-; GFX11-NEXT: v_writelane_b32 v26, s73, 15
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: ; implicit-def: $sgpr72
; GFX11-NEXT: .LBB57_3: ; %Flow
-; GFX11-NEXT: s_and_b32 s43, s103, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_mov_b32 s103, s31
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
-; GFX11-NEXT: s_mov_b32 s31, s42
-; GFX11-NEXT: s_mov_b32 s42, s61
-; GFX11-NEXT: s_mov_b32 s43, s48
-; GFX11-NEXT: v_readlane_b32 s48, v26, 18
-; GFX11-NEXT: v_readlane_b32 s61, v26, 19
+; GFX11-NEXT: s_and_b32 s47, s99, exec_lo
+; GFX11-NEXT: s_cselect_b32 s47, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s47, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB57_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: s_add_u32 s0, s0, 3
@@ -81388,376 +82068,386 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX11-NEXT: s_addc_u32 s7, s7, 0
; GFX11-NEXT: s_add_u32 s4, s4, 3
; GFX11-NEXT: s_addc_u32 s5, s5, 0
-; GFX11-NEXT: s_lshr_b32 s72, s22, 16
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 20
-; GFX11-NEXT: s_lshr_b32 s72, s20, 16
-; GFX11-NEXT: s_lshr_b32 s103, s5, 24
-; GFX11-NEXT: s_lshr_b32 s104, s5, 16
-; GFX11-NEXT: s_lshr_b32 s30, s5, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 21
-; GFX11-NEXT: s_lshr_b32 s72, s20, 8
-; GFX11-NEXT: s_lshr_b32 s31, s4, 16
-; GFX11-NEXT: s_lshr_b32 s34, s4, 8
-; GFX11-NEXT: s_lshr_b32 s35, s7, 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 22
-; GFX11-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 16
-; GFX11-NEXT: s_lshr_b32 s36, s7, 8
+; GFX11-NEXT: s_lshr_b32 s46, s25, 8
+; GFX11-NEXT: s_lshr_b32 s42, s5, 24
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s5, 16
+; GFX11-NEXT: s_lshr_b32 s102, s28, 16
+; GFX11-NEXT: s_lshr_b32 s30, s27, 24
+; GFX11-NEXT: s_lshr_b32 s43, s27, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s5, 8
+; GFX11-NEXT: s_lshr_b32 s104, s27, 8
+; GFX11-NEXT: s_lshr_b32 s34, s26, 16
+; GFX11-NEXT: s_lshr_b32 s103, s26, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-NEXT: s_lshr_b32 s53, s25, 24
+; GFX11-NEXT: s_lshr_b32 s51, s25, 16
+; GFX11-NEXT: s_lshr_b32 s54, s24, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s4, 8
+; GFX11-NEXT: s_lshr_b32 s39, s24, 8
+; GFX11-NEXT: s_lshr_b32 s80, s23, 24
+; GFX11-NEXT: s_lshr_b32 s69, s23, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s7, 24
+; GFX11-NEXT: s_lshr_b32 s49, s23, 8
+; GFX11-NEXT: s_lshr_b32 s98, s22, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s7, 16
+; GFX11-NEXT: s_lshr_b32 s86, s21, 24
+; GFX11-NEXT: s_lshr_b32 s85, s21, 16
+; GFX11-NEXT: s_lshr_b32 s96, s21, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s7, 8
+; GFX11-NEXT: s_lshr_b32 s97, s20, 16
+; GFX11-NEXT: s_lshr_b32 s87, s20, 8
+; GFX11-NEXT: s_lshr_b32 s84, s19, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 9
; GFX11-NEXT: s_lshr_b32 s42, s6, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 23
-; GFX11-NEXT: s_lshr_b32 s72, s18, 16
-; GFX11-NEXT: s_lshr_b32 s38, s6, 8
-; GFX11-NEXT: s_lshr_b32 s43, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s9, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 24
-; GFX11-NEXT: s_lshr_b32 s72, s18, 8
-; GFX11-NEXT: s_lshr_b32 s45, s9, 8
-; GFX11-NEXT: s_lshr_b32 s48, s8, 16
-; GFX11-NEXT: s_lshr_b32 s44, s8, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 25
-; GFX11-NEXT: s_lshr_b32 s72, s17, 24
-; GFX11-NEXT: s_lshr_b32 s47, s11, 24
-; GFX11-NEXT: s_lshr_b32 s49, s11, 16
-; GFX11-NEXT: s_lshr_b32 s46, s11, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 26
-; GFX11-NEXT: s_lshr_b32 s72, s17, 16
-; GFX11-NEXT: s_lshr_b32 s51, s10, 16
-; GFX11-NEXT: s_lshr_b32 s50, s10, 8
-; GFX11-NEXT: s_lshr_b32 s57, s13, 24
-; GFX11-NEXT: v_writelane_b32 v26, s72, 27
-; GFX11-NEXT: s_lshr_b32 s72, s17, 8
-; GFX11-NEXT: s_lshr_b32 s56, s13, 16
-; GFX11-NEXT: s_lshr_b32 s59, s13, 8
-; GFX11-NEXT: s_lshr_b32 s61, s12, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 28
-; GFX11-NEXT: s_lshr_b32 s72, s16, 16
-; GFX11-NEXT: s_lshr_b32 s58, s12, 8
-; GFX11-NEXT: s_lshr_b32 s60, s15, 24
-; GFX11-NEXT: s_lshr_b32 s53, s15, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 29
-; GFX11-NEXT: s_lshr_b32 s72, s16, 8
-; GFX11-NEXT: s_lshr_b32 s52, s15, 8
-; GFX11-NEXT: s_lshr_b32 s62, s14, 16
-; GFX11-NEXT: s_lshr_b32 s63, s14, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 30
-; GFX11-NEXT: s_lshr_b32 s72, s3, 24
-; GFX11-NEXT: s_lshr_b32 s54, s41, 24
-; GFX11-NEXT: s_lshr_b32 s55, s41, 16
-; GFX11-NEXT: s_lshr_b32 s64, s41, 8
-; GFX11-NEXT: v_writelane_b32 v26, s72, 31
-; GFX11-NEXT: s_lshr_b32 s72, s3, 16
-; GFX11-NEXT: s_lshr_b32 s66, s40, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 0
-; GFX11-NEXT: s_lshr_b32 s72, s3, 8
-; GFX11-NEXT: s_lshr_b32 s65, s40, 8
-; GFX11-NEXT: s_lshr_b32 s69, s29, 24
-; GFX11-NEXT: s_lshr_b32 s71, s29, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 1
-; GFX11-NEXT: s_lshr_b32 s72, s2, 16
-; GFX11-NEXT: s_lshr_b32 s67, s29, 8
-; GFX11-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 2
-; GFX11-NEXT: s_lshr_b32 s72, s2, 8
-; GFX11-NEXT: s_lshr_b32 s82, s27, 24
-; GFX11-NEXT: s_lshr_b32 s83, s27, 16
-; GFX11-NEXT: s_lshr_b32 s84, s27, 8
-; GFX11-NEXT: v_writelane_b32 v25, s72, 3
-; GFX11-NEXT: s_lshr_b32 s72, s1, 24
-; GFX11-NEXT: s_lshr_b32 s86, s26, 16
-; GFX11-NEXT: s_lshr_b32 s85, s26, 8
-; GFX11-NEXT: s_lshr_b32 s96, s25, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 4
-; GFX11-NEXT: s_lshr_b32 s72, s1, 16
-; GFX11-NEXT: s_lshr_b32 s97, s25, 16
-; GFX11-NEXT: s_lshr_b32 s87, s25, 8
-; GFX11-NEXT: s_lshr_b32 s99, s24, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 5
-; GFX11-NEXT: s_lshr_b32 s72, s1, 8
-; GFX11-NEXT: s_lshr_b32 s98, s24, 8
-; GFX11-NEXT: s_lshr_b32 s101, s23, 24
-; GFX11-NEXT: s_lshr_b32 s102, s23, 16
-; GFX11-NEXT: v_writelane_b32 v25, s72, 6
-; GFX11-NEXT: s_lshr_b32 s72, s0, 16
-; GFX11-NEXT: s_lshr_b32 s100, s23, 8
-; GFX11-NEXT: s_lshr_b32 s76, s22, 8
-; GFX11-NEXT: s_lshr_b32 s78, s21, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 7
-; GFX11-NEXT: s_lshr_b32 s72, s0, 8
-; GFX11-NEXT: s_lshr_b32 s77, s21, 16
-; GFX11-NEXT: s_lshr_b32 s68, s21, 8
-; GFX11-NEXT: s_lshr_b32 s79, s19, 24
-; GFX11-NEXT: v_writelane_b32 v25, s72, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
-; GFX11-NEXT: s_lshr_b32 s70, s19, 16
-; GFX11-NEXT: v_writelane_b32 v26, s72, 16
+; GFX11-NEXT: s_lshr_b32 s83, s19, 16
+; GFX11-NEXT: s_lshr_b32 s31, s19, 8
+; GFX11-NEXT: s_lshr_b32 s35, s18, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 10
+; GFX11-NEXT: s_lshr_b32 s42, s6, 8
+; GFX11-NEXT: s_lshr_b32 s36, s18, 8
+; GFX11-NEXT: s_lshr_b32 s81, s17, 24
+; GFX11-NEXT: s_lshr_b32 s70, s17, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 11
+; GFX11-NEXT: s_lshr_b32 s42, s9, 24
+; GFX11-NEXT: s_lshr_b32 s37, s17, 8
+; GFX11-NEXT: s_lshr_b32 s38, s16, 16
+; GFX11-NEXT: s_lshr_b32 s67, s3, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 12
+; GFX11-NEXT: s_lshr_b32 s42, s9, 16
+; GFX11-NEXT: s_lshr_b32 s66, s3, 16
+; GFX11-NEXT: s_lshr_b32 s48, s3, 8
+; GFX11-NEXT: s_lshr_b32 s50, s2, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 13
+; GFX11-NEXT: s_lshr_b32 s42, s9, 8
+; GFX11-NEXT: s_lshr_b32 s52, s2, 8
+; GFX11-NEXT: s_lshr_b32 s64, s1, 24
+; GFX11-NEXT: s_lshr_b32 s55, s1, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s8, 16
+; GFX11-NEXT: s_lshr_b32 s68, s1, 8
+; GFX11-NEXT: s_lshr_b32 s71, s0, 16
+; GFX11-NEXT: s_lshr_b32 s82, s0, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 15
+; GFX11-NEXT: s_lshr_b32 s42, s8, 8
+; GFX11-NEXT: s_lshr_b64 s[100:101], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24
+; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 16
+; GFX11-NEXT: s_lshr_b32 s42, s11, 24
+; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 17
+; GFX11-NEXT: s_lshr_b32 s42, s11, 16
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 18
+; GFX11-NEXT: s_lshr_b32 s42, s11, 8
; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 19
+; GFX11-NEXT: s_lshr_b32 s42, s10, 16
; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v26, s73, 17
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
; GFX11-NEXT: s_lshr_b64 vcc, s[0:1], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 14
-; GFX11-NEXT: v_writelane_b32 v26, s75, 15
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 12
-; GFX11-NEXT: v_writelane_b32 v26, s75, 13
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 10
-; GFX11-NEXT: v_writelane_b32 v26, s75, 11
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 8
-; GFX11-NEXT: v_writelane_b32 v26, s75, 9
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 6
-; GFX11-NEXT: v_writelane_b32 v26, s75, 7
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 4
-; GFX11-NEXT: v_writelane_b32 v26, s75, 5
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v26, s74, 2
-; GFX11-NEXT: v_writelane_b32 v26, s75, 3
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v26, s74, 0
-; GFX11-NEXT: v_writelane_b32 v26, s75, 1
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 20
+; GFX11-NEXT: s_lshr_b32 s42, s10, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 21
+; GFX11-NEXT: s_lshr_b32 s42, s13, 24
+; GFX11-NEXT: v_writelane_b32 v26, s42, 22
+; GFX11-NEXT: s_lshr_b32 s42, s13, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 23
+; GFX11-NEXT: s_lshr_b32 s42, s13, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 24
+; GFX11-NEXT: s_lshr_b32 s42, s12, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 25
+; GFX11-NEXT: s_lshr_b32 s42, s12, 8
+; GFX11-NEXT: v_writelane_b32 v26, s42, 26
+; GFX11-NEXT: s_lshr_b32 s42, s15, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 27
+; GFX11-NEXT: s_lshr_b32 s42, s15, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 28
+; GFX11-NEXT: s_lshr_b32 s42, s15, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 29
+; GFX11-NEXT: s_lshr_b32 s42, s14, 16
+; GFX11-NEXT: v_writelane_b32 v26, s42, 30
+; GFX11-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v26, s42, 31
+; GFX11-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-NEXT: v_writelane_b32 v25, s42, 0
+; GFX11-NEXT: s_lshr_b32 s42, s41, 16
+; GFX11-NEXT: v_writelane_b32 v26, s44, 0
+; GFX11-NEXT: v_writelane_b32 v25, s42, 1
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v26, s45, 1
+; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24
+; GFX11-NEXT: s_mov_b32 s45, s46
+; GFX11-NEXT: v_writelane_b32 v25, s42, 2
+; GFX11-NEXT: s_lshr_b32 s42, s40, 16
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 3
+; GFX11-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 4
+; GFX11-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 5
+; GFX11-NEXT: s_lshr_b32 s42, s29, 16
+; GFX11-NEXT: v_writelane_b32 v25, s42, 6
+; GFX11-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v25, s42, 7
+; GFX11-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-NEXT: v_writelane_b32 v25, s42, 8
+; GFX11-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-NEXT: .LBB57_5: ; %end
; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s73, v25, 7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v2, s73, vcc_lo, v1
-; GFX11-NEXT: v_readlane_b32 s73, v25, 8
+; GFX11-NEXT: v_readlane_b32 s101, v24, 3
+; GFX11-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_perm_b32 v2, s71, vcc_lo, v1
+; GFX11-NEXT: v_readlane_b32 s71, v23, 21
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v3, s0, s73, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 6
-; GFX11-NEXT: v_perm_b32 v21, s70, s79, v1
-; GFX11-NEXT: v_perm_b32 v22, s77, s78, v1
-; GFX11-NEXT: v_perm_b32 v17, s21, s68, v1
-; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
-; GFX11-NEXT: v_perm_b32 v4, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 2
-; GFX11-NEXT: v_readlane_b32 s1, v25, 5
-; GFX11-NEXT: v_readlane_b32 s70, v23, 20
-; GFX11-NEXT: v_readlane_b32 s68, v23, 18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s0, s94, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 3
-; GFX11-NEXT: v_perm_b32 v6, s2, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v7, s3, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 29
-; GFX11-NEXT: v_perm_b32 v8, s0, s92, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v9, s16, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 28
-; GFX11-NEXT: v_perm_b32 v10, s17, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v11, s0, s90, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 25
-; GFX11-NEXT: v_perm_b32 v12, s18, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 23
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v13, s19, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 21
-; GFX11-NEXT: v_perm_b32 v14, s0, s88, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 20
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v15, s0, s74, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 22
-; GFX11-NEXT: v_perm_b32 v16, s20, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v25, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_perm_b32 v18, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 31
-; GFX11-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-NEXT: v_perm_b32 v18, s55, s64, v1
+; GFX11-NEXT: v_perm_b32 v3, s0, s82, v1
+; GFX11-NEXT: v_perm_b32 v4, s1, s68, v1
+; GFX11-NEXT: v_perm_b32 v5, s50, s94, v1
+; GFX11-NEXT: v_perm_b32 v19, s66, s67, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v19, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 26
-; GFX11-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-NEXT: v_perm_b32 v6, s2, s52, v1
+; GFX11-NEXT: v_perm_b32 v7, s3, s48, v1
+; GFX11-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-NEXT: v_perm_b32 v8, s38, s92, v1
; GFX11-NEXT: v_or_b32_e32 v3, v4, v18
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_perm_b32 v20, s1, s0, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 0
+; GFX11-NEXT: v_perm_b32 v11, s35, s90, v1
+; GFX11-NEXT: v_perm_b32 v20, s70, s81, v1
+; GFX11-NEXT: v_perm_b32 v21, s83, s84, v1
; GFX11-NEXT: v_or_b32_e32 v4, v6, v4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX11-NEXT: v_perm_b32 v6, s102, s101, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; GFX11-NEXT: v_readlane_b32 s1, v26, 1
-; GFX11-NEXT: v_perm_b32 v14, s7, s36, v1
+; GFX11-NEXT: v_perm_b32 v9, s16, s42, v1
+; GFX11-NEXT: v_perm_b32 v10, s17, s37, v1
+; GFX11-NEXT: v_perm_b32 v12, s18, s36, v1
+; GFX11-NEXT: v_perm_b32 v13, s19, s31, v1
+; GFX11-NEXT: v_perm_b32 v14, s97, s88, v1
; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8
; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-NEXT: v_perm_b32 v15, s98, s78, v1
+; GFX11-NEXT: v_perm_b32 v16, s20, s87, v1
+; GFX11-NEXT: v_perm_b32 v22, s85, s86, v1
; GFX11-NEXT: v_or_b32_e32 v2, v9, v2
; GFX11-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX11-NEXT: v_perm_b32 v6, s69, s80, v1
; GFX11-NEXT: v_or_b32_e32 v4, v12, v4
; GFX11-NEXT: v_or_b32_e32 v5, v13, v5
-; GFX11-NEXT: v_perm_b32 v9, s22, s76, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX11-NEXT: v_perm_b32 v17, s21, s96, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22
+; GFX11-NEXT: v_perm_b32 v9, s22, s65, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15
-; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-NEXT: v_perm_b32 v11, s25, s87, v1
; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16
; GFX11-NEXT: v_or_b32_e32 v2, v16, v7
+; GFX11-NEXT: v_perm_b32 v5, s54, s72, v1
+; GFX11-NEXT: v_perm_b32 v7, s23, s49, v1
+; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX11-NEXT: v_or_b32_e32 v3, v17, v8
-; GFX11-NEXT: v_perm_b32 v5, s99, s0, v1
-; GFX11-NEXT: v_perm_b32 v7, s23, s100, v1
-; GFX11-NEXT: v_perm_b32 v8, s97, s96, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 2
-; GFX11-NEXT: v_readlane_b32 s1, v26, 3
; GFX11-NEXT: v_or_b32_e32 v4, v9, v10
-; GFX11-NEXT: v_perm_b32 v9, s24, s98, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5
-; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-NEXT: v_perm_b32 v12, s86, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 6
; GFX11-NEXT: v_or_b32_e32 v5, v7, v6
-; GFX11-NEXT: v_readlane_b32 s0, v26, 4
-; GFX11-NEXT: v_readlane_b32 s1, v26, 5
+; GFX11-NEXT: v_readlane_b32 s1, v25, 5
+; GFX11-NEXT: v_perm_b32 v8, s51, s53, v1
+; GFX11-NEXT: v_perm_b32 v9, s24, s39, v1
+; GFX11-NEXT: v_perm_b32 v11, s25, s45, v1
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
+; GFX11-NEXT: v_perm_b32 v2, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 8
+; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX11-NEXT: v_or_b32_e32 v6, v9, v10
+; GFX11-NEXT: v_perm_b32 v10, s43, s30, v1
+; GFX11-NEXT: v_perm_b32 v12, s34, s76, v1
+; GFX11-NEXT: v_perm_b32 v4, s28, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 7
; GFX11-NEXT: v_or_b32_e32 v7, v11, v8
-; GFX11-NEXT: v_perm_b32 v8, s26, s85, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s83, s82, v1
-; GFX11-NEXT: v_perm_b32 v11, s81, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32
-; GFX11-NEXT: v_perm_b32 v2, s71, s69, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 6
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s27, s84, v1
+; GFX11-NEXT: v_perm_b32 v11, s102, s74, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s28, s80, v1
+; GFX11-NEXT: v_perm_b32 v8, s26, s103, v1
+; GFX11-NEXT: v_perm_b32 v10, s29, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 3
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s29, s67, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s66, s0, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 7
-; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-NEXT: v_readlane_b32 s1, v25, 0
+; GFX11-NEXT: v_perm_b32 v12, s0, s62, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 4
+; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-NEXT: v_perm_b32 v9, s27, s104, v1
; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_perm_b32 v4, s40, s65, v1
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s55, s54, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 8
-; GFX11-NEXT: v_readlane_b32 s1, v26, 9
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
-; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s41, s64, v1
-; GFX11-NEXT: v_perm_b32 v11, s62, s0, v1
-; GFX11-NEXT: v_perm_b32 v6, s53, s60, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX11-NEXT: v_readlane_b32 s0, v26, 10
-; GFX11-NEXT: v_readlane_b32 s1, v26, 11
-; GFX11-NEXT: v_perm_b32 v8, s14, s63, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s15, s52, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
-; GFX11-NEXT: v_perm_b32 v12, s61, s0, v1
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX11-NEXT: v_readlane_b32 s0, v26, 12
-; GFX11-NEXT: v_readlane_b32 s1, v26, 13
-; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
-; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-NEXT: v_perm_b32 v8, s12, s58, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s56, s57, v1
-; GFX11-NEXT: v_perm_b32 v11, s51, s0, v1
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
-; GFX11-NEXT: v_perm_b32 v2, s49, s47, v1
-; GFX11-NEXT: v_readlane_b32 s0, v26, 14
-; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX11-NEXT: v_perm_b32 v9, s13, s59, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
-; GFX11-NEXT: v_perm_b32 v4, s10, s50, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
-; GFX11-NEXT: v_perm_b32 v10, s11, s46, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
-; GFX11-NEXT: v_perm_b32 v12, s48, s0, v1
+; GFX11-NEXT: v_perm_b32 v4, s40, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 1
; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
-; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
-; GFX11-NEXT: v_perm_b32 v4, s8, s44, v1
; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
-; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; GFX11-NEXT: v_perm_b32 v10, s39, s43, v1
-; GFX11-NEXT: v_perm_b32 v11, s42, s72, v1
-; GFX11-NEXT: v_readlane_b32 s1, v26, 15
-; GFX11-NEXT: v_perm_b32 v12, s6, s38, v1
+; GFX11-NEXT: v_readlane_b32 s2, v26, 0
; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
-; GFX11-NEXT: v_perm_b32 v5, s9, s45, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-NEXT: v_readlane_b32 s0, v26, 16
-; GFX11-NEXT: v_readlane_b32 s1, v26, 17
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v25, 2
+; GFX11-NEXT: v_readlane_b32 s1, v26, 27
+; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48
+; GFX11-NEXT: v_readlane_b32 s30, v24, 7
+; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; GFX11-NEXT: v_perm_b32 v5, s41, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 30
+; GFX11-NEXT: v_readlane_b32 s3, v26, 1
+; GFX11-NEXT: v_readlane_b32 s31, v24, 8
+; GFX11-NEXT: v_readlane_b32 s104, v24, 6
+; GFX11-NEXT: v_or_b32_e32 v5, v5, v7
+; GFX11-NEXT: v_perm_b32 v11, s0, s60, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 28
+; GFX11-NEXT: v_readlane_b32 s103, v24, 5
; GFX11-NEXT: v_readlane_b32 s102, v24, 4
-; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
-; GFX11-NEXT: v_perm_b32 v10, s37, s35, v1
-; GFX11-NEXT: v_readlane_b32 s101, v24, 3
-; GFX11-NEXT: v_readlane_b32 s100, v24, 2
-; GFX11-NEXT: v_readlane_b32 s99, v24, 1
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX11-NEXT: v_perm_b32 v6, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 31
+; GFX11-NEXT: v_readlane_b32 s1, v26, 22
; GFX11-NEXT: v_readlane_b32 s98, v24, 0
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
-; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
-; GFX11-NEXT: v_perm_b32 v12, s31, s0, v1
; GFX11-NEXT: v_readlane_b32 s97, v23, 31
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6
+; GFX11-NEXT: v_perm_b32 v8, s14, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 29
; GFX11-NEXT: v_readlane_b32 s96, v23, 30
-; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
-; GFX11-NEXT: v_perm_b32 v13, s4, s34, v1
-; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX11-NEXT: v_readlane_b32 s87, v23, 29
; GFX11-NEXT: v_readlane_b32 s86, v23, 28
+; GFX11-NEXT: v_or_b32_e32 v6, v8, v9
+; GFX11-NEXT: v_perm_b32 v10, s15, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 25
; GFX11-NEXT: v_readlane_b32 s85, v23, 27
; GFX11-NEXT: v_readlane_b32 s84, v23, 26
-; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX11-NEXT: v_perm_b32 v13, s104, s103, v1
-; GFX11-NEXT: v_perm_b32 v1, s5, s30, v1
-; GFX11-NEXT: v_readlane_b32 s30, v24, 7
-; GFX11-NEXT: v_readlane_b32 s31, v24, 8
-; GFX11-NEXT: v_readlane_b32 s104, v24, 6
-; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX11-NEXT: v_readlane_b32 s103, v24, 5
; GFX11-NEXT: v_readlane_b32 s83, v23, 25
+; GFX11-NEXT: v_or_b32_e32 v7, v10, v11
+; GFX11-NEXT: v_perm_b32 v12, s0, s58, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 26
; GFX11-NEXT: v_readlane_b32 s82, v23, 24
; GFX11-NEXT: v_readlane_b32 s81, v23, 23
-; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
-; GFX11-NEXT: s_clause 0x2
-; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
-; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
-; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
; GFX11-NEXT: v_readlane_b32 s80, v23, 22
-; GFX11-NEXT: v_readlane_b32 s71, v23, 21
+; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX11-NEXT: v_perm_b32 v8, s12, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 23
+; GFX11-NEXT: v_readlane_b32 s70, v23, 20
; GFX11-NEXT: v_readlane_b32 s69, v23, 19
+; GFX11-NEXT: v_readlane_b32 s68, v23, 18
+; GFX11-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 24
+; GFX11-NEXT: v_readlane_b32 s1, v26, 17
; GFX11-NEXT: v_readlane_b32 s67, v23, 17
; GFX11-NEXT: v_readlane_b32 s66, v23, 16
+; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10
+; GFX11-NEXT: v_perm_b32 v9, s13, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 20
; GFX11-NEXT: v_readlane_b32 s65, v23, 15
; GFX11-NEXT: v_readlane_b32 s64, v23, 14
; GFX11-NEXT: v_readlane_b32 s55, v23, 13
+; GFX11-NEXT: v_or_b32_e32 v9, v9, v3
+; GFX11-NEXT: v_perm_b32 v11, s0, s56, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 18
; GFX11-NEXT: v_readlane_b32 s54, v23, 12
; GFX11-NEXT: v_readlane_b32 s53, v23, 11
; GFX11-NEXT: v_readlane_b32 s52, v23, 10
+; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; GFX11-NEXT: v_perm_b32 v2, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 21
+; GFX11-NEXT: v_readlane_b32 s1, v26, 12
; GFX11-NEXT: v_readlane_b32 s51, v23, 9
; GFX11-NEXT: v_readlane_b32 s50, v23, 8
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2
+; GFX11-NEXT: v_perm_b32 v4, s10, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 19
; GFX11-NEXT: v_readlane_b32 s49, v23, 7
; GFX11-NEXT: v_readlane_b32 s48, v23, 6
; GFX11-NEXT: v_readlane_b32 s39, v23, 5
+; GFX11-NEXT: v_or_b32_e32 v2, v4, v5
+; GFX11-NEXT: v_perm_b32 v10, s11, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 15
; GFX11-NEXT: v_readlane_b32 s38, v23, 4
; GFX11-NEXT: v_readlane_b32 s37, v23, 3
; GFX11-NEXT: v_readlane_b32 s36, v23, 2
+; GFX11-NEXT: v_or_b32_e32 v3, v10, v11
+; GFX11-NEXT: v_perm_b32 v12, s0, s100, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 16
+; GFX11-NEXT: v_readlane_b32 s100, v24, 2
; GFX11-NEXT: v_readlane_b32 s35, v23, 1
; GFX11-NEXT: v_readlane_b32 s34, v23, 0
+; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-NEXT: v_perm_b32 v4, s8, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 13
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 14
+; GFX11-NEXT: v_readlane_b32 s1, v26, 7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-NEXT: v_perm_b32 v5, s9, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 10
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v5, v5, v10
+; GFX11-NEXT: v_perm_b32 v11, s0, s44, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 8
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-NEXT: v_perm_b32 v10, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 11
+; GFX11-NEXT: v_readlane_b32 s1, v26, 2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10
+; GFX11-NEXT: v_perm_b32 v12, s6, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v10, v12, v11
+; GFX11-NEXT: v_perm_b32 v14, s7, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 5
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v11, v14, v13
+; GFX11-NEXT: v_perm_b32 v12, s0, s2, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 6
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-NEXT: v_perm_b32 v13, s4, s0, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_or_b32_e32 v12, v13, v12
+; GFX11-NEXT: v_perm_b32 v13, s0, s1, v1
+; GFX11-NEXT: v_readlane_b32 s0, v26, 4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-NEXT: v_perm_b32 v1, s5, s0, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_or_b32_e32 v13, v1, v13
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96
+; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112
; GFX11-NEXT: s_xor_saveexec_b32 s0, -1
; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload
; GFX11-NEXT: scratch_load_b32 v23, off, s32
@@ -87637,8 +88327,16 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s58, v10
+; SI-NEXT: v_readfirstlane_b32 s59, v9
+; SI-NEXT: v_readfirstlane_b32 s60, v8
+; SI-NEXT: v_readfirstlane_b32 s61, v7
; SI-NEXT: v_readfirstlane_b32 s76, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
; SI-NEXT: v_readfirstlane_b32 s46, v30
; SI-NEXT: v_readfirstlane_b32 s6, v29
; SI-NEXT: v_readfirstlane_b32 s7, v28
@@ -87652,327 +88350,318 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s15, v20
; SI-NEXT: v_readfirstlane_b32 s40, v19
; SI-NEXT: v_readfirstlane_b32 s41, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:332
; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:64
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:104
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:112
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:120
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:128
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328
-; SI-NEXT: v_readfirstlane_b32 s75, v1
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:136
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:200
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:240
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:328
; SI-NEXT: v_readfirstlane_b32 s43, v16
-; SI-NEXT: v_readfirstlane_b32 s45, v14
-; SI-NEXT: v_readfirstlane_b32 s73, v3
-; SI-NEXT: v_readfirstlane_b32 s74, v2
-; SI-NEXT: v_readfirstlane_b32 s57, v11
-; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: v_readfirstlane_b32 s44, v15
+; SI-NEXT: v_readfirstlane_b32 s45, v14
; SI-NEXT: v_readfirstlane_b32 s47, v13
; SI-NEXT: v_readfirstlane_b32 s56, v12
-; SI-NEXT: v_readfirstlane_b32 s58, v10
-; SI-NEXT: v_readfirstlane_b32 s59, v9
-; SI-NEXT: v_readfirstlane_b32 s60, v8
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s57, v11
; SI-NEXT: v_readfirstlane_b32 s62, v6
; SI-NEXT: v_readfirstlane_b32 s63, v5
+; SI-NEXT: v_readfirstlane_b32 s72, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v3
+; SI-NEXT: v_readfirstlane_b32 s74, v2
+; SI-NEXT: v_readfirstlane_b32 s75, v1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40
-; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41
-; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42
-; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46
-; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45
-; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47
-; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v33
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v42
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v61
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v21
+; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v22
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29
-; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48
-; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204
-; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v55
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v54
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v36
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v44, 24, v57
+; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v37
+; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v32
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:284
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:276
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:252
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:156
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
+; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v31
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB59_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v40, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
-; SI-NEXT: v_or_b32_e32 v0, s4, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v11, v3
-; SI-NEXT: v_or_b32_e32 v11, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v13, v1
-; SI-NEXT: v_or_b32_e32 v13, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v14, v1
-; SI-NEXT: v_or_b32_e32 v14, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v42
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v15, v1
-; SI-NEXT: v_or_b32_e32 v15, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: v_or_b32_e32 v0, v0, v41
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v16, v1
-; SI-NEXT: v_or_b32_e32 v16, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_or_b32_e32 v0, v0, v40
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v55, v1
-; SI-NEXT: v_or_b32_e32 v17, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v44
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v54
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v53, v1
-; SI-NEXT: v_or_b32_e32 v18, v0, v1
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v12, v2, v3
-; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_or_b32_e32 v6, v15, v6
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v38, v38, v11
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v17
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v38
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v33, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v42, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v20, v0
; SI-NEXT: s_lshl_b32 s5, s17, 8
+; SI-NEXT: s_lshl_b32 s77, s19, 24
+; SI-NEXT: s_lshl_b32 s78, s23, 24
+; SI-NEXT: s_lshl_b32 s79, s27, 24
+; SI-NEXT: s_lshl_b32 s88, s75, 24
+; SI-NEXT: s_lshl_b32 s89, s63, 24
+; SI-NEXT: s_lshl_b32 s90, s59, 24
+; SI-NEXT: s_lshl_b32 s91, s47, 24
+; SI-NEXT: s_lshl_b32 s92, s42, 24
+; SI-NEXT: s_lshl_b32 s93, s14, 24
+; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_lshl_b32 s95, s6, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v7, s4, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v11, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v63
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v18, v7
+; SI-NEXT: v_mov_b32_e32 v6, v13
+; SI-NEXT: v_or_b32_e32 v13, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v62
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v19
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v14, v7
+; SI-NEXT: v_mov_b32_e32 v60, v14
+; SI-NEXT: v_or_b32_e32 v14, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v57
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s18, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s77, s19, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s77, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -87981,7 +88670,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s5, s5, s77
; SI-NEXT: s_and_b32 s77, s22, 0xff
; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s23, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s77, s78, s77
; SI-NEXT: s_or_b32 s5, s5, s77
@@ -87990,7 +88678,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s77, s77, s78
; SI-NEXT: s_and_b32 s78, s26, 0xff
; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s27, 24
; SI-NEXT: s_and_b32 s77, s77, 0xffff
; SI-NEXT: s_or_b32 s78, s79, s78
; SI-NEXT: s_or_b32 s77, s77, s78
@@ -87999,7 +88686,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s78, s78, s79
; SI-NEXT: s_and_b32 s79, s76, 0xff
; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s75, 24
; SI-NEXT: s_and_b32 s78, s78, 0xffff
; SI-NEXT: s_or_b32 s79, s88, s79
; SI-NEXT: s_or_b32 s78, s78, s79
@@ -88008,7 +88694,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s79, s79, s88
; SI-NEXT: s_and_b32 s88, s72, 0xff
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s89, s63, 24
; SI-NEXT: s_and_b32 s79, s79, 0xffff
; SI-NEXT: s_or_b32 s88, s89, s88
; SI-NEXT: s_or_b32 s79, s79, s88
@@ -88017,7 +88702,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s88, s88, s89
; SI-NEXT: s_and_b32 s89, s60, 0xff
; SI-NEXT: s_lshl_b32 s89, s89, 16
-; SI-NEXT: s_lshl_b32 s90, s59, 24
; SI-NEXT: s_and_b32 s88, s88, 0xffff
; SI-NEXT: s_or_b32 s89, s90, s89
; SI-NEXT: s_or_b32 s88, s88, s89
@@ -88026,7 +88710,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s89, s89, s90
; SI-NEXT: s_and_b32 s90, s56, 0xff
; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_lshl_b32 s91, s47, 24
; SI-NEXT: s_and_b32 s89, s89, 0xffff
; SI-NEXT: s_or_b32 s90, s91, s90
; SI-NEXT: s_or_b32 s89, s89, s90
@@ -88034,18 +88717,7 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_lshl_b32 s91, s44, 8
; SI-NEXT: s_or_b32 s90, s90, s91
; SI-NEXT: s_and_b32 s91, s43, 0xff
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v52
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
-; SI-NEXT: v_mov_b32_e32 v49, v48
; SI-NEXT: s_lshl_b32 s91, s91, 16
-; SI-NEXT: s_lshl_b32 s92, s42, 24
; SI-NEXT: s_and_b32 s90, s90, 0xffff
; SI-NEXT: s_or_b32 s91, s92, s91
; SI-NEXT: s_or_b32 s90, s90, s91
@@ -88054,7 +88726,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s91, s91, s92
; SI-NEXT: s_and_b32 s92, s15, 0xff
; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s93, s14, 24
; SI-NEXT: s_and_b32 s91, s91, 0xffff
; SI-NEXT: s_or_b32 s92, s93, s92
; SI-NEXT: s_or_b32 s91, s91, s92
@@ -88063,7 +88734,15 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s92, s92, s93
; SI-NEXT: s_and_b32 s93, s11, 0xff
; SI-NEXT: s_lshl_b32 s93, s93, 16
-; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v47
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v51, v7
+; SI-NEXT: v_or_b32_e32 v15, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v32
; SI-NEXT: s_and_b32 s92, s92, 0xffff
; SI-NEXT: s_or_b32 s93, s94, s93
; SI-NEXT: s_or_b32 s92, s92, s93
@@ -88072,134 +88751,126 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s93, s93, s94
; SI-NEXT: s_and_b32 s94, s7, 0xff
; SI-NEXT: s_lshl_b32 s94, s94, 16
-; SI-NEXT: s_lshl_b32 s95, s6, 24
; SI-NEXT: s_and_b32 s93, s93, 0xffff
; SI-NEXT: s_or_b32 s94, s95, s94
; SI-NEXT: s_or_b32 s93, s93, s94
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v3, s78
-; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v48, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v44, v7
+; SI-NEXT: v_or_b32_e32 v17, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v41
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v18, v5, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v5, s88
-; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: v_mov_b32_e32 v7, s90
-; SI-NEXT: v_mov_b32_e32 v8, s91
-; SI-NEXT: v_mov_b32_e32 v9, s92
-; SI-NEXT: v_mov_b32_e32 v10, s93
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v19, v3, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v3, s78
+; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v20, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v50
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v20, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v39, v1
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v21, v1
; SI-NEXT: v_or_b32_e32 v21, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
-; SI-NEXT: v_mov_b32_e32 v37, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v48
-; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
; SI-NEXT: v_or_b32_e32 v22, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v38
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v23, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v36
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
; SI-NEXT: v_or_b32_e32 v24, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v29, v1
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
; SI-NEXT: v_or_b32_e32 v25, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v29
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_or_b32_e32 v0, v0, v31
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v28, v1
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v56, v1
; SI-NEXT: v_or_b32_e32 v26, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v58
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v0, v0, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
-; SI-NEXT: v_mov_b32_e32 v57, v27
-; SI-NEXT: v_or_b32_e32 v27, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v45
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_or_b32_e32 v28, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v46
-; SI-NEXT: v_mov_b32_e32 v45, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v60, v32
+; SI-NEXT: v_or_b32_e32 v27, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v29, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v28, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
+; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -88208,56 +88879,46 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v29, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v46
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v30, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_or_b32_e32 v31, v0, v1
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s77
+; SI-NEXT: v_mov_b32_e32 v8, s91
+; SI-NEXT: v_mov_b32_e32 v9, s92
+; SI-NEXT: v_mov_b32_e32 v10, s93
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB59_3
; SI-NEXT: .LBB59_2:
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_mov_b32_e32 v49, v48
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: v_mov_b32_e32 v57, v27
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: v_mov_b32_e32 v60, v14
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB59_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v43, v58
-; SI-NEXT: v_mov_b32_e32 v58, v33
-; SI-NEXT: v_mov_b32_e32 v33, v37
-; SI-NEXT: v_mov_b32_e32 v34, v39
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB59_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; SI-NEXT: s_add_i32 s46, s46, 3
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_mov_b32_e32 v32, v35
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_lshl_b32 s5, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -88313,22 +88974,23 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: v_mov_b32_e32 v9, s10
; SI-NEXT: v_mov_b32_e32 v10, s6
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, s4, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s16, s18, 0xff
@@ -88404,16 +89066,15 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_or_b32 s21, s22, s21
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s22, s41, 0xff
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_lshl_b32 s23, s40, 8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v2, v2, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_addk_i32 s22, 0x300
; SI-NEXT: s_and_b32 s22, s22, 0xffff
@@ -88433,312 +89094,366 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v7, s21
; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v3, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v3, s17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v1, v38, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v63, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v37, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v60, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v42, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v41, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v51, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v34, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v57, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
@@ -88760,7 +89475,7 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v128i8_to_v16i64_scalar:
@@ -88782,15 +89497,17 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_readfirstlane_b32 s45, v15
-; VI-NEXT: v_readfirstlane_b32 s46, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
; VI-NEXT: v_readfirstlane_b32 s76, v0
-; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; VI-NEXT: v_readfirstlane_b32 s73, v3
+; VI-NEXT: v_readfirstlane_b32 s47, v13
+; VI-NEXT: v_readfirstlane_b32 s61, v7
+; VI-NEXT: v_readfirstlane_b32 s62, v6
+; VI-NEXT: v_readfirstlane_b32 s63, v5
+; VI-NEXT: v_readfirstlane_b32 s58, v10
+; VI-NEXT: v_readfirstlane_b32 s59, v9
+; VI-NEXT: v_readfirstlane_b32 s60, v8
; VI-NEXT: v_readfirstlane_b32 s6, v30
; VI-NEXT: v_readfirstlane_b32 s7, v29
; VI-NEXT: v_readfirstlane_b32 s8, v28
@@ -88806,448 +89523,424 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s42, v18
; VI-NEXT: v_readfirstlane_b32 s43, v17
; VI-NEXT: v_readfirstlane_b32 s44, v16
+; VI-NEXT: v_readfirstlane_b32 s45, v15
+; VI-NEXT: v_readfirstlane_b32 s46, v14
; VI-NEXT: v_readfirstlane_b32 s56, v12
; VI-NEXT: v_readfirstlane_b32 s57, v11
-; VI-NEXT: v_readfirstlane_b32 s58, v10
-; VI-NEXT: v_readfirstlane_b32 s59, v9
-; VI-NEXT: v_readfirstlane_b32 s60, v8
-; VI-NEXT: v_readfirstlane_b32 s61, v7
-; VI-NEXT: v_readfirstlane_b32 s62, v6
-; VI-NEXT: v_readfirstlane_b32 s63, v5
; VI-NEXT: v_readfirstlane_b32 s72, v4
-; VI-NEXT: v_readfirstlane_b32 s73, v3
; VI-NEXT: v_readfirstlane_b32 s74, v2
; VI-NEXT: v_readfirstlane_b32 s75, v1
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:180
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; VI-NEXT: s_and_b64 s[4:5], vcc, exec
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB59_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: v_mov_b32_e32 v2, s21
-; VI-NEXT: v_perm_b32 v3, s22, v3, v11
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_perm_b32 v2, s20, v2, v11
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v0, v0, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v3
+; VI-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v4, s23
+; VI-NEXT: v_mov_b32_e32 v2, s19
+; VI-NEXT: v_mov_b32_e32 v3, s21
+; VI-NEXT: v_perm_b32 v4, s22, v4, v20
+; VI-NEXT: v_mov_b32_e32 v13, s17
+; VI-NEXT: v_perm_b32 v2, s18, v2, v20
+; VI-NEXT: v_perm_b32 v3, s20, v3, v20
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_perm_b32 v13, s16, v13, v20
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_mov_b32_e32 v19, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v4
; VI-NEXT: v_mov_b32_e32 v3, s27
+; VI-NEXT: v_mov_b32_e32 v22, v0
+; VI-NEXT: v_or_b32_e32 v0, v13, v2
; VI-NEXT: v_mov_b32_e32 v2, s25
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
+; VI-NEXT: v_perm_b32 v3, s26, v3, v20
+; VI-NEXT: v_perm_b32 v2, s24, v2, v20
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_mov_b32_e32 v4, s75
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
+; VI-NEXT: v_perm_b32 v4, s76, v4, v20
+; VI-NEXT: v_mov_b32_e32 v44, v5
+; VI-NEXT: v_perm_b32 v3, s28, v3, v20
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_mov_b32_e32 v5, s63
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s73
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
+; VI-NEXT: v_perm_b32 v5, s72, v5, v20
+; VI-NEXT: v_mov_b32_e32 v46, v6
+; VI-NEXT: v_perm_b32 v4, s74, v4, v20
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_mov_b32_e32 v6, s59
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s61
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
+; VI-NEXT: v_perm_b32 v6, s60, v6, v20
+; VI-NEXT: v_mov_b32_e32 v45, v7
+; VI-NEXT: v_perm_b32 v5, s62, v5, v20
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_mov_b32_e32 v7, s47
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s57
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
+; VI-NEXT: v_perm_b32 v7, s56, v7, v20
+; VI-NEXT: v_mov_b32_e32 v47, v40
+; VI-NEXT: v_mov_b32_e32 v40, v8
+; VI-NEXT: v_perm_b32 v6, s58, v6, v20
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_mov_b32_e32 v8, s43
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s45
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
+; VI-NEXT: v_perm_b32 v8, s44, v8, v20
+; VI-NEXT: v_mov_b32_e32 v43, v9
+; VI-NEXT: v_perm_b32 v7, s46, v7, v20
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s41
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
+; VI-NEXT: v_perm_b32 v9, s40, v9, v20
+; VI-NEXT: v_mov_b32_e32 v56, v41
+; VI-NEXT: v_mov_b32_e32 v41, v10
+; VI-NEXT: v_perm_b32 v8, s42, v8, v20
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_mov_b32_e32 v10, s11
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s13
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
+; VI-NEXT: v_perm_b32 v10, s12, v10, v20
+; VI-NEXT: v_mov_b32_e32 v42, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v20
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v12, s7
+; VI-NEXT: v_mov_b32_e32 v11, s7
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s9
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v20
+; VI-NEXT: v_perm_b32 v10, s10, v10, v20
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_e32 v10, v10, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v14, v13, s4
-; VI-NEXT: v_perm_b32 v11, s6, v15, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v52, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v54, v53, s4
-; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v48, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v14, v50, v49, s4
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v36, v35, s4
+; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: v_perm_b32 v14, v52, v14, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v15, v38, v37, s4
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v32, v16, s4
+; VI-NEXT: v_perm_b32 v15, v48, v15, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v16, v34, v33, s4
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v60, v17, s4
+; VI-NEXT: v_perm_b32 v16, v50, v16, s4
+; VI-NEXT: v_perm_b32 v18, v42, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_perm_b32 v17, v62, v61, s4
-; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_perm_b32 v17, v59, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_perm_b32 v18, v41, v40, s4
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_perm_b32 v18, v57, v19, s4
+; VI-NEXT: v_perm_b32 v17, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v19, v42, v58, s4
+; VI-NEXT: v_perm_b32 v19, v63, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v45, v20, s4
+; VI-NEXT: v_perm_b32 v19, v23, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_perm_b32 v20, v56, v47, s4
+; VI-NEXT: v_perm_b32 v23, v34, v33, s4
+; VI-NEXT: v_perm_b32 v24, v41, v43, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, s6, v11, v20
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v20, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v11, v11, v13
+; VI-NEXT: v_perm_b32 v13, v21, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v12, v12, v13
+; VI-NEXT: v_perm_b32 v13, v27, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_perm_b32 v20, v57, v28, s4
+; VI-NEXT: v_or_b32_e32 v13, v20, v13
+; VI-NEXT: v_perm_b32 v20, v55, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v20, v14
+; VI-NEXT: v_perm_b32 v20, v54, v53, s4
+; VI-NEXT: v_or_b32_e32 v15, v20, v15
+; VI-NEXT: v_perm_b32 v20, v39, v36, s4
+; VI-NEXT: v_or_b32_e32 v16, v20, v16
+; VI-NEXT: v_perm_b32 v20, v49, v38, s4
+; VI-NEXT: v_or_b32_e32 v17, v20, v17
+; VI-NEXT: v_perm_b32 v20, v62, v22, s4
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v44, v21, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v25, v58, s4
+; VI-NEXT: v_perm_b32 v22, v30, v31, s4
+; VI-NEXT: v_perm_b32 v25, v45, v46, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v26, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_perm_b32 v21, v46, v26, s4
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v31, v22, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v21, v37, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_perm_b32 v22, v24, v43, s4
; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v28, v23, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v32, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_perm_b32 v23, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v25, v63, s4
-; VI-NEXT: v_mov_b32_e32 v44, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v40, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_perm_b32 v24, v27, v55, s4
; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v57, v56
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v25, v24, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v24, v44, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_or_b32_e32 v25, v25, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_e32 v26, v26, v28
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v27, v27, v29
+; VI-NEXT: v_perm_b32 v29, v47, v56, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v28, v59, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v46, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_perm_b32 v32, v33, v32, s4
+; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB59_3
; VI-NEXT: .LBB59_2:
-; VI-NEXT: v_mov_b32_e32 v57, v56
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v44, v24
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB59_3: ; %Flow
-; VI-NEXT: v_mov_b32_e32 v43, v44
-; VI-NEXT: v_mov_b32_e32 v44, v45
-; VI-NEXT: v_mov_b32_e32 v45, v47
-; VI-NEXT: v_mov_b32_e32 v46, v57
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
@@ -89255,11 +89948,11 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
+; VI-NEXT: v_perm_b32 v0, s16, v0, v12
+; VI-NEXT: v_perm_b32 v1, s18, v1, v12
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89267,8 +89960,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v1, s21
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: v_mov_b32_e32 v2, s23
-; VI-NEXT: v_perm_b32 v1, s20, v1, v11
-; VI-NEXT: v_perm_b32 v2, s22, v2, v11
+; VI-NEXT: v_perm_b32 v1, s20, v1, v12
+; VI-NEXT: v_perm_b32 v2, s22, v2, v12
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89276,8 +89969,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v2, s25
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: v_mov_b32_e32 v3, s27
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
+; VI-NEXT: v_perm_b32 v2, s24, v2, v12
+; VI-NEXT: v_perm_b32 v3, s26, v3, v12
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89285,8 +89978,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: s_add_i32 s76, s76, 3
; VI-NEXT: v_mov_b32_e32 v4, s75
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
+; VI-NEXT: v_perm_b32 v3, s28, v3, v12
+; VI-NEXT: v_perm_b32 v4, s76, v4, v12
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89294,8 +89987,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v4, s73
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: v_mov_b32_e32 v5, s63
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
+; VI-NEXT: v_perm_b32 v4, s74, v4, v12
+; VI-NEXT: v_perm_b32 v5, s72, v5, v12
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89303,8 +89996,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v5, s61
; VI-NEXT: s_add_i32 s60, s60, 3
; VI-NEXT: v_mov_b32_e32 v6, s59
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
+; VI-NEXT: v_perm_b32 v5, s62, v5, v12
+; VI-NEXT: v_perm_b32 v6, s60, v6, v12
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89312,8 +90005,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v6, s57
; VI-NEXT: s_add_i32 s56, s56, 3
; VI-NEXT: v_mov_b32_e32 v7, s47
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
+; VI-NEXT: v_perm_b32 v6, s58, v6, v12
+; VI-NEXT: v_perm_b32 v7, s56, v7, v12
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89321,8 +90014,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v7, s45
; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: v_mov_b32_e32 v8, s43
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
+; VI-NEXT: v_perm_b32 v7, s46, v7, v12
+; VI-NEXT: v_perm_b32 v8, s44, v8, v12
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89330,8 +90023,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v8, s41
; VI-NEXT: s_add_i32 s40, s40, 3
; VI-NEXT: v_mov_b32_e32 v9, s15
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
+; VI-NEXT: v_perm_b32 v8, s42, v8, v12
+; VI-NEXT: v_perm_b32 v9, s40, v9, v12
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -89339,37 +90032,23 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v9, s13
; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: v_mov_b32_e32 v10, s11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v12
+; VI-NEXT: v_perm_b32 v10, s12, v10, v12
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_add_i32 s10, s10, 3
; VI-NEXT: v_mov_b32_e32 v10, s9
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_mov_b32_e32 v12, s7
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
+; VI-NEXT: v_mov_b32_e32 v11, s7
+; VI-NEXT: v_perm_b32 v10, s10, v10, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v12
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v32
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v14, v14, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v15, v15, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -89381,254 +90060,337 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v11, s6, v12, v11
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11
-; VI-NEXT: v_perm_b32 v16, v16, v17, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60
-; VI-NEXT: v_perm_b32 v17, v17, v18, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v57
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v18, v18, v19, s4
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v19
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52
-; VI-NEXT: v_perm_b32 v12, v12, v53, s4
-; VI-NEXT: v_perm_b32 v13, v13, v51, s4
+; VI-NEXT: v_perm_b32 v12, s6, v11, v12
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50
-; VI-NEXT: v_perm_b32 v13, v13, v49, s4
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
-; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v14, v14, v37, s4
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
-; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v15, v15, v33, s4
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
-; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v16, v16, v61, s4
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
-; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41
-; VI-NEXT: v_perm_b32 v17, v17, v40, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
-; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42
-; VI-NEXT: v_perm_b32 v18, v18, v47, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v13, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v12, s4
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v14, v12, s4
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v15, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v14, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v16, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; VI-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v17, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v18, v16, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v19, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v19, v18, s4
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20
-; VI-NEXT: v_perm_b32 v20, v20, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45
-; VI-NEXT: v_perm_b32 v20, v20, v44, s4
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v20, v18, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v20, v19, s4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v21, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43
-; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v21, v20, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v20, v22, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v22, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x300, v23
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v24, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; VI-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v23, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v25, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v26, v24, s4
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v27, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v28, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v28, v27, s4
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v28, v29, v28, s4
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v30, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v29
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v31, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v30, v32, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
+; VI-NEXT: v_add_u32_e32 v33, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32
-; VI-NEXT: v_perm_b32 v32, v32, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v31, v33, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB59_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
@@ -89669,15 +90431,17 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_readfirstlane_b32 s45, v15
-; GFX9-NEXT: v_readfirstlane_b32 s46, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
; GFX9-NEXT: v_readfirstlane_b32 s76, v0
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s73, v3
+; GFX9-NEXT: v_readfirstlane_b32 s47, v13
+; GFX9-NEXT: v_readfirstlane_b32 s61, v7
+; GFX9-NEXT: v_readfirstlane_b32 s62, v6
+; GFX9-NEXT: v_readfirstlane_b32 s63, v5
+; GFX9-NEXT: v_readfirstlane_b32 s58, v10
+; GFX9-NEXT: v_readfirstlane_b32 s59, v9
+; GFX9-NEXT: v_readfirstlane_b32 s60, v8
; GFX9-NEXT: v_readfirstlane_b32 s6, v30
; GFX9-NEXT: v_readfirstlane_b32 s7, v29
; GFX9-NEXT: v_readfirstlane_b32 s8, v28
@@ -89693,487 +90457,447 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_readfirstlane_b32 s42, v18
; GFX9-NEXT: v_readfirstlane_b32 s43, v17
; GFX9-NEXT: v_readfirstlane_b32 s44, v16
+; GFX9-NEXT: v_readfirstlane_b32 s45, v15
+; GFX9-NEXT: v_readfirstlane_b32 s46, v14
; GFX9-NEXT: v_readfirstlane_b32 s56, v12
; GFX9-NEXT: v_readfirstlane_b32 s57, v11
-; GFX9-NEXT: v_readfirstlane_b32 s58, v10
-; GFX9-NEXT: v_readfirstlane_b32 s59, v9
-; GFX9-NEXT: v_readfirstlane_b32 s60, v8
-; GFX9-NEXT: v_readfirstlane_b32 s61, v7
-; GFX9-NEXT: v_readfirstlane_b32 s62, v6
-; GFX9-NEXT: v_readfirstlane_b32 s63, v5
; GFX9-NEXT: v_readfirstlane_b32 s72, v4
-; GFX9-NEXT: v_readfirstlane_b32 s73, v3
; GFX9-NEXT: v_readfirstlane_b32 s74, v2
; GFX9-NEXT: v_readfirstlane_b32 s75, v1
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
-; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(55)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(54)
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(49)
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(62)
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB59_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX9-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v4, s23
+; GFX9-NEXT: v_mov_b32_e32 v2, s19
+; GFX9-NEXT: v_mov_b32_e32 v3, s21
+; GFX9-NEXT: v_perm_b32 v4, s22, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v13, s17
+; GFX9-NEXT: v_perm_b32 v2, s18, v2, v20
+; GFX9-NEXT: v_perm_b32 v3, s20, v3, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_perm_b32 v13, s16, v13, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_mov_b32_e32 v19, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_mov_b32_e32 v22, v0
+; GFX9-NEXT: v_or_b32_e32 v0, v13, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v20
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v44, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s63
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v4, s73
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v20
+; GFX9-NEXT: v_mov_b32_e32 v46, v6
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s59
; GFX9-NEXT: v_or_b32_e32 v4, v4, v5
; GFX9-NEXT: v_mov_b32_e32 v5, s61
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v20
+; GFX9-NEXT: v_mov_b32_e32 v45, v7
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s47
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: v_mov_b32_e32 v6, s57
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v20
+; GFX9-NEXT: v_mov_b32_e32 v47, v40
+; GFX9-NEXT: v_mov_b32_e32 v40, v8
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s43
; GFX9-NEXT: v_or_b32_e32 v6, v6, v7
; GFX9-NEXT: v_mov_b32_e32 v7, s45
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v20
+; GFX9-NEXT: v_mov_b32_e32 v43, v9
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: v_mov_b32_e32 v8, s41
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v20
+; GFX9-NEXT: v_mov_b32_e32 v56, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v10
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_mov_b32_e32 v10, s11
; GFX9-NEXT: v_or_b32_e32 v8, v8, v9
; GFX9-NEXT: v_mov_b32_e32 v9, s13
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v20
+; GFX9-NEXT: v_mov_b32_e32 v42, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: v_mov_b32_e32 v10, s9
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v20
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_or_b32_e32 v10, v10, v12
-; GFX9-NEXT: v_perm_b32 v12, v14, v13, s4
-; GFX9-NEXT: v_perm_b32 v11, s6, v15, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX9-NEXT: v_perm_b32 v12, v52, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v54, v53, s4
-; GFX9-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX9-NEXT: v_perm_b32 v13, v48, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v50, v49, s4
-; GFX9-NEXT: v_or_b32_e32 v13, v14, v13
-; GFX9-NEXT: v_perm_b32 v14, v36, v35, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v61, s4
+; GFX9-NEXT: v_perm_b32 v14, v52, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v38, v37, s4
-; GFX9-NEXT: v_or_b32_e32 v14, v15, v14
-; GFX9-NEXT: v_perm_b32 v15, v32, v16, s4
+; GFX9-NEXT: v_perm_b32 v15, v32, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v34, v33, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v16, v15
-; GFX9-NEXT: v_perm_b32 v16, v60, v17, s4
+; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
+; GFX9-NEXT: v_perm_b32 v18, v42, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v17, v62, v61, s4
-; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
-; GFX9-NEXT: v_perm_b32 v17, v59, v18, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v18, v41, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v17, v18, v17
-; GFX9-NEXT: v_perm_b32 v18, v57, v19, s4
+; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v42, v58, s4
+; GFX9-NEXT: v_perm_b32 v19, v63, v19, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v18, v19, v18
-; GFX9-NEXT: v_perm_b32 v19, v45, v20, s4
+; GFX9-NEXT: v_perm_b32 v19, v23, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v56, v47, s4
+; GFX9-NEXT: v_perm_b32 v23, v34, v33, s4
+; GFX9-NEXT: v_perm_b32 v24, v41, v43, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, s6, v11, v20
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v20, v13, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
+; GFX9-NEXT: v_perm_b32 v13, v21, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX9-NEXT: v_perm_b32 v13, v27, v29, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_perm_b32 v20, v57, v28, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v20, v13
+; GFX9-NEXT: v_perm_b32 v20, v55, v48, s4
+; GFX9-NEXT: v_or_b32_e32 v14, v20, v14
+; GFX9-NEXT: v_perm_b32 v20, v54, v39, s4
+; GFX9-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX9-NEXT: v_perm_b32 v20, v36, v50, s4
+; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
+; GFX9-NEXT: v_perm_b32 v20, v49, v38, s4
+; GFX9-NEXT: v_or_b32_e32 v17, v20, v17
+; GFX9-NEXT: v_perm_b32 v20, v62, v22, s4
; GFX9-NEXT: v_or_b32_e32 v19, v20, v19
-; GFX9-NEXT: v_perm_b32 v20, v44, v21, s4
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v25, v58, s4
+; GFX9-NEXT: v_perm_b32 v22, v30, v31, s4
+; GFX9-NEXT: v_perm_b32 v25, v45, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v26, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v46, v26, s4
; GFX9-NEXT: v_or_b32_e32 v20, v21, v20
-; GFX9-NEXT: v_perm_b32 v21, v31, v22, s4
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v37, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v24, v43, s4
; GFX9-NEXT: v_or_b32_e32 v21, v22, v21
-; GFX9-NEXT: v_perm_b32 v22, v28, v23, s4
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v51, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v23, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v22, v23, v22
-; GFX9-NEXT: v_perm_b32 v23, v25, v63, s4
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v40, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_perm_b32 v24, v27, v55, s4
; GFX9-NEXT: v_or_b32_e32 v23, v24, v23
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
; GFX9-NEXT: v_or_b32_e32 v24, v25, v24
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_or_b32_e32 v25, v25, v27
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v26, v25
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v28
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: v_or_b32_e32 v26, v27, v26
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v29
+; GFX9-NEXT: v_perm_b32 v29, v47, v56, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_or_b32_e32 v27, v28, v27
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v28, v59, v28, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v28, v29, v28
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
; GFX9-NEXT: v_or_b32_e32 v29, v30, v29
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
; GFX9-NEXT: v_or_b32_e32 v30, v31, v30
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v43, v46, v43, s4
-; GFX9-NEXT: v_or_b32_e32 v31, v43, v31
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s4
+; GFX9-NEXT: v_or_b32_e32 v31, v32, v31
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB59_3
; GFX9-NEXT: .LBB59_2:
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB59_3: ; %Flow
-; GFX9-NEXT: v_mov_b32_e32 v43, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v47
-; GFX9-NEXT: v_mov_b32_e32 v46, v57
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
@@ -90181,18 +90905,18 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: v_mov_b32_e32 v2, s21
; GFX9-NEXT: s_add_i32 s22, s22, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
+; GFX9-NEXT: v_perm_b32 v0, s16, v0, v12
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
+; GFX9-NEXT: v_perm_b32 v1, s18, v1, v12
+; GFX9-NEXT: v_perm_b32 v2, s20, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s22, v3, v12
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
@@ -90203,8 +90927,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v12
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90212,8 +90936,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: s_add_i32 s76, s76, 3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v12
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v12
; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3
; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90221,8 +90945,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v4, s73
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: v_mov_b32_e32 v5, s63
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v12
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v12
; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4
; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90230,8 +90954,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v5, s61
; GFX9-NEXT: s_add_i32 s60, s60, 3
; GFX9-NEXT: v_mov_b32_e32 v6, s59
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v12
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v12
; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5
; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90239,8 +90963,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v6, s57
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: v_mov_b32_e32 v7, s47
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v12
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v12
; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6
; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90248,8 +90972,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v7, s45
; GFX9-NEXT: s_add_i32 s44, s44, 3
; GFX9-NEXT: v_mov_b32_e32 v8, s43
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v12
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v12
; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7
; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90257,8 +90981,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v8, s41
; GFX9-NEXT: s_add_i32 s40, s40, 3
; GFX9-NEXT: v_mov_b32_e32 v9, s15
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v12
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v12
; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -90266,267 +90990,334 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v9, s13
; GFX9-NEXT: s_add_i32 s12, s12, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v12
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v12
; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: s_add_i32 s10, s10, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s9
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v12
; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: s_waitcnt vmcnt(18)
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v32
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v48
-; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v36
-; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_perm_b32 v16, v16, v17, s5
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v60
-; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_perm_b32 v17, v17, v18, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v57
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v18, v18, v19, s5
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v11, s6, v12, v11
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11
-; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v19
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v12
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s5
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v54
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v52
-; GFX9-NEXT: v_perm_b32 v12, v12, v53, s5
-; GFX9-NEXT: v_perm_b32 v13, v13, v51, s5
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, s6, v11, v12
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12
-; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v50
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, v13, v11, s5
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v13, v12, s5
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v38
-; GFX9-NEXT: v_perm_b32 v14, v14, v37, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, v14, v12, s5
+; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v14, v13, s5
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v34
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v15, v13, s5
+; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v15, v14, s5
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v62
-; GFX9-NEXT: v_perm_b32 v16, v16, v61, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v16, v14, s5
+; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v15, s5
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v16
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v41
-; GFX9-NEXT: v_perm_b32 v17, v17, v40, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v17, v15, s5
+; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v42
-; GFX9-NEXT: v_perm_b32 v18, v18, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v18, v16, s5
+; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v18, v17, s5
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v18
-; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v46
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s5
+; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v19, v18, s5
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v19
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v20
-; GFX9-NEXT: v_perm_b32 v20, v20, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v45
-; GFX9-NEXT: v_perm_b32 v20, v20, v44, s5
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v20, v18, s5
+; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v20, v19, s5
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v20
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v21
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v43
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v21, v19, s5
+; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v21, v20, s5
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v21
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v22, v20, s5
+; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v22, v21, s5
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v23, v21, s5
+; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v23, v23, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v23
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v24, v22, s5
+; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v24, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v24
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v25, v23, s5
+; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v24, s5
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v26, v24, s5
+; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v25
; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
+; GFX9-NEXT: v_perm_b32 v25, v26, v25, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v27, v25, s5
+; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
-; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v26
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
+; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v26, v28, v26, s5
+; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v27
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v27
+; GFX9-NEXT: v_perm_b32 v27, v28, v27, s5
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v29, v27, s5
+; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v30, v28, s5
; GFX9-NEXT: v_add_u32_sdwa v28, v28, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
+; GFX9-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v28
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_perm_b32 v29, v30, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v29, v31, v29, s5
; GFX9-NEXT: v_add_u32_sdwa v29, v29, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v30
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
+; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v30, v32, v30, s5
; GFX9-NEXT: v_add_u32_sdwa v30, v30, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
+; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v30
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s5
+; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v31
+; GFX9-NEXT: v_add_u32_e32 v33, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
-; GFX9-NEXT: v_perm_b32 v32, v32, v33, s5
-; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v31, v33, v31, s5
+; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: .LBB59_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -92570,166 +93361,202 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: v_writelane_b32 v33, s96, 30
; SI-NEXT: v_writelane_b32 v33, s97, 31
; SI-NEXT: v_writelane_b32 v33, s98, 32
-; SI-NEXT: v_writelane_b32 v33, s99, 33
-; SI-NEXT: v_writelane_b32 v33, s30, 34
-; SI-NEXT: v_writelane_b32 v33, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_readfirstlane_b32 s68, v17
-; SI-NEXT: v_readfirstlane_b32 s69, v16
-; SI-NEXT: v_readfirstlane_b32 s70, v15
-; SI-NEXT: v_readfirstlane_b32 s71, v14
-; SI-NEXT: v_readfirstlane_b32 s80, v13
-; SI-NEXT: v_readfirstlane_b32 s81, v12
-; SI-NEXT: v_readfirstlane_b32 s82, v11
-; SI-NEXT: v_readfirstlane_b32 s83, v10
-; SI-NEXT: v_readfirstlane_b32 s84, v9
-; SI-NEXT: v_readfirstlane_b32 s85, v8
-; SI-NEXT: v_readfirstlane_b32 s86, v7
-; SI-NEXT: v_readfirstlane_b32 s87, v6
-; SI-NEXT: v_readfirstlane_b32 s96, v5
-; SI-NEXT: v_readfirstlane_b32 s97, v4
-; SI-NEXT: v_readfirstlane_b32 s98, v3
-; SI-NEXT: v_readfirstlane_b32 s99, v2
-; SI-NEXT: v_readfirstlane_b32 s6, v1
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s7, v0
+; SI-NEXT: v_writelane_b32 v33, s30, 33
+; SI-NEXT: v_writelane_b32 v33, s31, 34
+; SI-NEXT: v_readfirstlane_b32 s5, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v17
+; SI-NEXT: v_readfirstlane_b32 s30, v16
+; SI-NEXT: v_readfirstlane_b32 s31, v15
+; SI-NEXT: v_readfirstlane_b32 s34, v14
+; SI-NEXT: v_readfirstlane_b32 s35, v13
+; SI-NEXT: v_readfirstlane_b32 s36, v12
+; SI-NEXT: v_readfirstlane_b32 s37, v11
+; SI-NEXT: v_readfirstlane_b32 s38, v10
+; SI-NEXT: v_readfirstlane_b32 s39, v9
+; SI-NEXT: v_readfirstlane_b32 s48, v8
+; SI-NEXT: v_readfirstlane_b32 s49, v7
+; SI-NEXT: v_readfirstlane_b32 s50, v6
+; SI-NEXT: v_readfirstlane_b32 s51, v5
+; SI-NEXT: v_readfirstlane_b32 s52, v4
+; SI-NEXT: v_readfirstlane_b32 s53, v3
+; SI-NEXT: v_readfirstlane_b32 s54, v2
+; SI-NEXT: v_readfirstlane_b32 s55, v1
+; SI-NEXT: s_cmp_lg_u32 s5, 0
+; SI-NEXT: v_readfirstlane_b32 s64, v0
; SI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
-; SI-NEXT: s_cbranch_scc0 .LBB61_2
-; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s68, 0xffff0000
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v34, s4, 0
-; SI-NEXT: s_lshl_b32 s4, s68, 16
+; SI-NEXT: s_cbranch_scc0 .LBB61_2
+; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_and_b32 s8, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s4, 16
+; SI-NEXT: s_and_b32 s4, s50, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 2
+; SI-NEXT: s_lshl_b32 s4, s50, 16
; SI-NEXT: v_writelane_b32 v34, s4, 1
-; SI-NEXT: s_and_b32 s9, s69, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s69, 16
-; SI-NEXT: s_and_b32 s11, s70, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s70, 16
-; SI-NEXT: s_and_b32 s13, s71, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s71, 16
-; SI-NEXT: s_and_b32 s15, s80, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s80, 16
-; SI-NEXT: s_and_b32 s41, s81, 0xffff0000
-; SI-NEXT: s_lshl_b32 s40, s81, 16
-; SI-NEXT: s_and_b32 s43, s82, 0xffff0000
-; SI-NEXT: s_lshl_b32 s42, s82, 16
-; SI-NEXT: s_and_b32 s45, s83, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s83, 16
-; SI-NEXT: s_and_b32 s47, s84, 0xffff0000
-; SI-NEXT: s_lshl_b32 s46, s84, 16
-; SI-NEXT: s_and_b32 s57, s85, 0xffff0000
-; SI-NEXT: s_lshl_b32 s56, s85, 16
-; SI-NEXT: s_and_b32 s59, s86, 0xffff0000
-; SI-NEXT: s_lshl_b32 s58, s86, 16
-; SI-NEXT: s_and_b32 s61, s87, 0xffff0000
-; SI-NEXT: s_lshl_b32 s60, s87, 16
-; SI-NEXT: s_and_b32 s63, s96, 0xffff0000
-; SI-NEXT: s_lshl_b32 s62, s96, 16
-; SI-NEXT: s_and_b32 s73, s97, 0xffff0000
-; SI-NEXT: s_lshl_b32 s72, s97, 16
-; SI-NEXT: s_and_b32 s75, s98, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s98, 16
-; SI-NEXT: s_and_b32 s77, s99, 0xffff0000
-; SI-NEXT: s_lshl_b32 s76, s99, 16
-; SI-NEXT: s_and_b32 s79, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s78, s6, 16
-; SI-NEXT: s_and_b32 s89, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s88, s7, 16
-; SI-NEXT: s_and_b32 s91, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s29, 16
-; SI-NEXT: s_and_b32 s93, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s28, 16
-; SI-NEXT: s_and_b32 s95, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s27, 16
-; SI-NEXT: s_and_b32 vcc_hi, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_lo, s26, 16
-; SI-NEXT: s_and_b32 s31, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s30, s25, 16
-; SI-NEXT: s_and_b32 s35, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s34, s24, 16
-; SI-NEXT: s_and_b32 s37, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s36, s23, 16
-; SI-NEXT: s_and_b32 s39, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s38, s22, 16
-; SI-NEXT: s_and_b32 s49, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s48, s21, 16
-; SI-NEXT: s_and_b32 s51, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s50, s20, 16
-; SI-NEXT: s_and_b32 s53, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s19, 16
-; SI-NEXT: s_and_b32 s55, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s54, s18, 16
-; SI-NEXT: s_and_b32 s65, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s64, s17, 16
-; SI-NEXT: s_and_b32 s67, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s16, 16
+; SI-NEXT: s_and_b32 s4, s51, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 4
+; SI-NEXT: s_lshl_b32 s4, s51, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 3
+; SI-NEXT: s_and_b32 s4, s52, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 6
+; SI-NEXT: s_lshl_b32 s4, s52, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 5
+; SI-NEXT: s_and_b32 s4, s53, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 8
+; SI-NEXT: s_lshl_b32 s4, s53, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 7
+; SI-NEXT: s_and_b32 s4, s55, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 10
+; SI-NEXT: s_lshl_b32 s4, s55, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 9
+; SI-NEXT: s_and_b32 s4, s64, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 12
+; SI-NEXT: s_lshl_b32 s4, s64, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 11
+; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 14
+; SI-NEXT: s_lshl_b32 s4, s29, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 13
+; SI-NEXT: s_and_b32 s4, s28, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 16
+; SI-NEXT: s_lshl_b32 s4, s28, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 15
+; SI-NEXT: s_and_b32 s4, s27, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 18
+; SI-NEXT: s_lshl_b32 s4, s27, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 17
+; SI-NEXT: s_and_b32 s4, s26, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s4, 20
+; SI-NEXT: s_lshl_b32 s4, s26, 16
+; SI-NEXT: s_and_b32 s10, s30, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s30, 16
+; SI-NEXT: s_and_b32 s12, s31, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s31, 16
+; SI-NEXT: s_and_b32 s14, s34, 0xffff0000
+; SI-NEXT: s_lshl_b32 s13, s34, 16
+; SI-NEXT: s_and_b32 s40, s35, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s35, 16
+; SI-NEXT: s_and_b32 s42, s36, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s36, 16
+; SI-NEXT: s_and_b32 s44, s37, 0xffff0000
+; SI-NEXT: s_lshl_b32 s43, s37, 16
+; SI-NEXT: s_and_b32 s46, s38, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s38, 16
+; SI-NEXT: s_and_b32 s56, s39, 0xffff0000
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_and_b32 s58, s48, 0xffff0000
+; SI-NEXT: s_lshl_b32 s57, s48, 16
+; SI-NEXT: s_and_b32 s60, s49, 0xffff0000
+; SI-NEXT: s_lshl_b32 s59, s49, 16
+; SI-NEXT: s_and_b32 s78, s54, 0xffff0000
+; SI-NEXT: s_lshl_b32 s77, s54, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 19
+; SI-NEXT: s_and_b32 s62, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s61, s25, 16
+; SI-NEXT: s_and_b32 s72, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s63, s24, 16
+; SI-NEXT: s_and_b32 s74, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s73, s23, 16
+; SI-NEXT: s_and_b32 s76, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s75, s22, 16
+; SI-NEXT: s_and_b32 s88, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s79, s21, 16
+; SI-NEXT: s_and_b32 s90, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s89, s20, 16
+; SI-NEXT: s_and_b32 s92, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s91, s19, 16
+; SI-NEXT: s_and_b32 s94, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s93, s18, 16
+; SI-NEXT: s_and_b32 vcc_lo, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s95, s17, 16
+; SI-NEXT: s_and_b32 s6, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_hi, s16, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB61_3
; SI-NEXT: .LBB61_2:
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $vcc_hi
-; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr13
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: s_mov_b64 s[4:5], -1
@@ -92737,241 +93564,298 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
+; SI-NEXT: s_mov_b32 s65, s63
+; SI-NEXT: s_mov_b32 s66, s72
+; SI-NEXT: s_mov_b32 s67, s73
+; SI-NEXT: s_mov_b32 s68, s74
+; SI-NEXT: s_mov_b32 s69, s75
+; SI-NEXT: s_mov_b32 s70, s76
+; SI-NEXT: s_mov_b32 s71, s79
+; SI-NEXT: s_mov_b32 s80, s88
+; SI-NEXT: s_mov_b32 s81, s89
+; SI-NEXT: s_mov_b32 s82, s90
+; SI-NEXT: s_mov_b32 s83, s91
+; SI-NEXT: s_mov_b32 s84, s92
+; SI-NEXT: s_mov_b32 s85, s93
+; SI-NEXT: s_mov_b32 s86, s94
+; SI-NEXT: s_mov_b32 s87, s95
+; SI-NEXT: s_mov_b32 s96, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s61
+; SI-NEXT: s_mov_b32 s97, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s62
+; SI-NEXT: s_mov_b32 s98, s6
+; SI-NEXT: s_mov_b32 s4, s7
+; SI-NEXT: s_mov_b32 s5, s8
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s13, s15
+; SI-NEXT: s_mov_b32 s14, s40
+; SI-NEXT: s_mov_b32 s15, s41
+; SI-NEXT: s_mov_b32 s40, s42
+; SI-NEXT: s_mov_b32 s41, s43
+; SI-NEXT: s_mov_b32 s42, s44
+; SI-NEXT: s_mov_b32 s43, s45
+; SI-NEXT: s_mov_b32 s44, s46
+; SI-NEXT: s_mov_b32 s45, s47
+; SI-NEXT: s_mov_b32 s46, s56
+; SI-NEXT: s_mov_b32 s47, s57
+; SI-NEXT: s_mov_b32 s56, s58
+; SI-NEXT: s_mov_b32 s57, s59
+; SI-NEXT: s_mov_b32 s58, s60
+; SI-NEXT: v_readlane_b32 s59, v34, 1
+; SI-NEXT: v_readlane_b32 s60, v34, 2
+; SI-NEXT: v_readlane_b32 s61, v34, 3
+; SI-NEXT: v_readlane_b32 s62, v34, 4
+; SI-NEXT: v_readlane_b32 s63, v34, 5
+; SI-NEXT: v_readlane_b32 s72, v34, 6
+; SI-NEXT: v_readlane_b32 s73, v34, 7
+; SI-NEXT: v_readlane_b32 s74, v34, 8
+; SI-NEXT: v_readlane_b32 s6, v34, 9
+; SI-NEXT: v_readlane_b32 s75, v34, 10
+; SI-NEXT: v_readlane_b32 s76, v34, 11
+; SI-NEXT: v_readlane_b32 s79, v34, 12
+; SI-NEXT: v_readlane_b32 s88, v34, 13
+; SI-NEXT: v_readlane_b32 s89, v34, 14
+; SI-NEXT: v_readlane_b32 s90, v34, 15
+; SI-NEXT: v_readlane_b32 s91, v34, 16
+; SI-NEXT: v_readlane_b32 s92, v34, 17
+; SI-NEXT: v_readlane_b32 s93, v34, 18
+; SI-NEXT: v_readlane_b32 s94, v34, 19
+; SI-NEXT: v_readlane_b32 s95, v34, 20
; SI-NEXT: s_cbranch_scc1 .LBB61_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_u32 s4, s16, 3
-; SI-NEXT: s_addc_u32 s5, s17, 0
-; SI-NEXT: s_add_u32 s16, s18, 3
-; SI-NEXT: s_addc_u32 s17, s19, 0
-; SI-NEXT: s_add_u32 s18, s20, 3
-; SI-NEXT: s_addc_u32 s19, s21, 0
-; SI-NEXT: s_add_u32 s20, s22, 3
-; SI-NEXT: s_addc_u32 s21, s23, 0
-; SI-NEXT: s_add_u32 s22, s24, 3
-; SI-NEXT: s_addc_u32 s23, s25, 0
-; SI-NEXT: s_add_u32 s24, s26, 3
-; SI-NEXT: s_addc_u32 s25, s27, 0
-; SI-NEXT: s_add_u32 s26, s28, 3
-; SI-NEXT: s_addc_u32 s27, s29, 0
-; SI-NEXT: s_add_u32 s7, s7, 3
-; SI-NEXT: s_addc_u32 s6, s6, 0
-; SI-NEXT: s_add_u32 s28, s99, 3
-; SI-NEXT: s_addc_u32 s29, s98, 0
-; SI-NEXT: s_add_u32 s72, s97, 3
-; SI-NEXT: s_addc_u32 s62, s96, 0
-; SI-NEXT: s_add_u32 s60, s87, 3
-; SI-NEXT: s_addc_u32 s58, s86, 0
-; SI-NEXT: s_add_u32 s56, s85, 3
-; SI-NEXT: s_addc_u32 s46, s84, 0
-; SI-NEXT: s_add_u32 s44, s83, 3
-; SI-NEXT: s_addc_u32 s42, s82, 0
-; SI-NEXT: s_add_u32 s40, s81, 3
-; SI-NEXT: s_addc_u32 s14, s80, 0
-; SI-NEXT: s_add_u32 s12, s71, 3
-; SI-NEXT: s_addc_u32 s10, s70, 0
-; SI-NEXT: s_add_u32 s8, s69, 3
-; SI-NEXT: s_addc_u32 s9, s68, 0
-; SI-NEXT: s_and_b32 s11, s9, 0xffff0000
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v34, s11, 0
+; SI-NEXT: s_add_u32 s16, s16, 3
+; SI-NEXT: s_addc_u32 s17, s17, 0
+; SI-NEXT: s_add_u32 s18, s18, 3
+; SI-NEXT: s_addc_u32 s19, s19, 0
+; SI-NEXT: s_add_u32 s20, s20, 3
+; SI-NEXT: s_addc_u32 s21, s21, 0
+; SI-NEXT: s_add_u32 s22, s22, 3
+; SI-NEXT: s_addc_u32 s23, s23, 0
+; SI-NEXT: s_add_u32 s24, s24, 3
+; SI-NEXT: s_addc_u32 s25, s25, 0
+; SI-NEXT: s_add_u32 s26, s26, 3
+; SI-NEXT: s_addc_u32 s27, s27, 0
+; SI-NEXT: s_add_u32 s28, s28, 3
+; SI-NEXT: s_addc_u32 s29, s29, 0
+; SI-NEXT: s_add_u32 s76, s64, 3
+; SI-NEXT: s_addc_u32 s6, s55, 0
+; SI-NEXT: s_add_u32 s75, s54, 3
+; SI-NEXT: s_addc_u32 s73, s53, 0
+; SI-NEXT: s_add_u32 s63, s52, 3
+; SI-NEXT: s_addc_u32 s61, s51, 0
+; SI-NEXT: s_add_u32 s59, s50, 3
+; SI-NEXT: s_addc_u32 s57, s49, 0
+; SI-NEXT: s_add_u32 s47, s48, 3
+; SI-NEXT: s_addc_u32 s45, s39, 0
+; SI-NEXT: s_add_u32 s43, s38, 3
+; SI-NEXT: s_addc_u32 s41, s37, 0
+; SI-NEXT: s_add_u32 s15, s36, 3
+; SI-NEXT: s_addc_u32 s13, s35, 0
+; SI-NEXT: s_add_u32 s11, s34, 3
+; SI-NEXT: s_addc_u32 s9, s31, 0
+; SI-NEXT: s_add_u32 s7, s30, 3
+; SI-NEXT: v_readlane_b32 s4, v34, 0
+; SI-NEXT: s_addc_u32 s4, s4, 0
+; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_and_b32 s8, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_and_b32 s10, s9, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: v_writelane_b32 v34, s9, 1
-; SI-NEXT: s_and_b32 s9, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s11, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_and_b32 s13, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_and_b32 s15, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_and_b32 s41, s40, 0xffff0000
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: s_lshl_b32 s56, s56, 16
-; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: s_lshl_b32 s58, s58, 16
-; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: s_lshl_b32 s60, s60, 16
-; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_and_b32 s75, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s29, 16
-; SI-NEXT: s_and_b32 s77, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s76, s28, 16
-; SI-NEXT: s_and_b32 s79, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s78, s6, 16
-; SI-NEXT: s_and_b32 s89, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s88, s7, 16
-; SI-NEXT: s_and_b32 s91, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s27, 16
-; SI-NEXT: s_and_b32 s93, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s26, 16
-; SI-NEXT: s_and_b32 s95, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s25, 16
-; SI-NEXT: s_and_b32 vcc_hi, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_lo, s24, 16
-; SI-NEXT: s_and_b32 s31, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s30, s23, 16
-; SI-NEXT: s_and_b32 s35, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s34, s22, 16
-; SI-NEXT: s_and_b32 s37, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s36, s21, 16
-; SI-NEXT: s_and_b32 s39, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s38, s20, 16
-; SI-NEXT: s_and_b32 s49, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s48, s19, 16
-; SI-NEXT: s_and_b32 s51, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s50, s18, 16
-; SI-NEXT: s_and_b32 s53, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s17, 16
-; SI-NEXT: s_and_b32 s55, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s54, s16, 16
-; SI-NEXT: s_and_b32 s65, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s64, s5, 16
-; SI-NEXT: s_and_b32 s67, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s66, s4, 16
+; SI-NEXT: s_and_b32 s12, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_and_b32 s14, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_and_b32 s40, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_and_b32 s42, s41, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_and_b32 s44, s43, 0xffff0000
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_and_b32 s46, s45, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: s_and_b32 s56, s47, 0xffff0000
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_and_b32 s58, s57, 0xffff0000
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_and_b32 s60, s59, 0xffff0000
+; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_and_b32 s62, s61, 0xffff0000
+; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_and_b32 s72, s63, 0xffff0000
+; SI-NEXT: s_lshl_b32 s63, s63, 16
+; SI-NEXT: s_and_b32 s74, s73, 0xffff0000
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_and_b32 s78, s75, 0xffff0000
+; SI-NEXT: s_lshl_b32 s77, s75, 16
+; SI-NEXT: s_and_b32 s75, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_and_b32 s79, s76, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_and_b32 s89, s29, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s29, 16
+; SI-NEXT: s_and_b32 s91, s28, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s28, 16
+; SI-NEXT: s_and_b32 s93, s27, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s27, 16
+; SI-NEXT: s_and_b32 s95, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s26, 16
+; SI-NEXT: s_and_b32 vcc_hi, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_lo, s25, 16
+; SI-NEXT: s_and_b32 s66, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s65, s24, 16
+; SI-NEXT: s_and_b32 s68, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s67, s23, 16
+; SI-NEXT: s_and_b32 s70, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s22, 16
+; SI-NEXT: s_and_b32 s80, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s71, s21, 16
+; SI-NEXT: s_and_b32 s82, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s81, s20, 16
+; SI-NEXT: s_and_b32 s84, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s83, s19, 16
+; SI-NEXT: s_and_b32 s86, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s85, s18, 16
+; SI-NEXT: s_and_b32 s96, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s87, s17, 16
+; SI-NEXT: s_and_b32 s98, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s97, s16, 16
; SI-NEXT: .LBB61_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s98
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s97
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s65
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s96
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s64
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s87
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s55
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s86
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s54
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s85
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s53
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s84
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s83
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s50
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s81
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s49
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s80
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s48
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s71
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s39
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s70
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s38
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s69
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s37
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s68
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s36
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s67
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s66
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s65
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, vcc_hi
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, vcc_lo
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s94
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s93
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s92
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s91
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s90
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s89
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s88
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s79
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s76
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s75
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s78
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s77
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s75
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s74
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s73
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s73
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
; SI-NEXT: v_mul_f32_e64 v18, 1.0, s72
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s63
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s63
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
; SI-NEXT: v_mul_f32_e64 v19, 1.0, s62
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s61
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s61
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
; SI-NEXT: v_mul_f32_e64 v20, 1.0, s60
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s59
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s59
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
; SI-NEXT: v_mul_f32_e64 v21, 1.0, s58
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s57
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s57
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
; SI-NEXT: v_mul_f32_e64 v22, 1.0, s56
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s47
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s47
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s46
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s45
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s45
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
; SI-NEXT: v_mul_f32_e64 v24, 1.0, s44
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s43
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s43
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
; SI-NEXT: v_mul_f32_e64 v25, 1.0, s42
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s41
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s41
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
; SI-NEXT: v_mul_f32_e64 v26, 1.0, s40
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s15
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s15
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
; SI-NEXT: v_mul_f32_e64 v27, 1.0, s14
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s13
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s13
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
; SI-NEXT: v_mul_f32_e64 v28, 1.0, s12
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s11
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s11
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
; SI-NEXT: v_mul_f32_e64 v29, 1.0, s10
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s9
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s9
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
; SI-NEXT: v_mul_f32_e64 v30, 1.0, s8
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s7
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
-; SI-NEXT: v_readlane_b32 s4, v34, 0
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s4
-; SI-NEXT: v_readlane_b32 s4, v34, 1
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
; SI-NEXT: v_mul_f32_e64 v31, 1.0, s4
-; SI-NEXT: v_readlane_b32 s30, v33, 34
+; SI-NEXT: v_readlane_b32 s30, v33, 33
; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
-; SI-NEXT: v_readlane_b32 s31, v33, 35
-; SI-NEXT: v_readlane_b32 s99, v33, 33
+; SI-NEXT: v_readlane_b32 s31, v33, 34
; SI-NEXT: v_readlane_b32 s98, v33, 32
; SI-NEXT: v_readlane_b32 s97, v33, 31
; SI-NEXT: v_readlane_b32 s96, v33, 30
@@ -93007,7 +93891,6 @@ define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a
; SI-NEXT: v_readlane_b32 s34, v33, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -96265,7 +97148,7 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -96287,98 +97170,85 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31
-; SI-NEXT: v_readfirstlane_b32 s90, v5
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi
-; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95
; SI-NEXT: v_readfirstlane_b32 s78, v7
-; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89
; SI-NEXT: v_readfirstlane_b32 s74, v9
-; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s72, v10
; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
; SI-NEXT: v_readfirstlane_b32 s62, v11
; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75
; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73
; SI-NEXT: v_readfirstlane_b32 s58, v13
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63
; SI-NEXT: v_readfirstlane_b32 s56, v14
; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61
-; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s92, v4
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92
+; SI-NEXT: v_readfirstlane_b32 s90, v5
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: v_readfirstlane_b32 s88, v6
+; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: v_readfirstlane_b32 s76, v8
+; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
; SI-NEXT: s_lshl_b32 s15, s24, 16
@@ -96400,490 +97270,427 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s62, 16
; SI-NEXT: s_lshl_b32 s72, s72, 16
; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
; SI-NEXT: s_lshl_b32 s30, s30, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s10
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s42
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB63_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, v1
-; SI-NEXT: v_mov_b32_e32 v43, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: v_mov_b32_e32 v36, v47
-; SI-NEXT: v_mov_b32_e32 v50, v49
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v40, v41
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v48, v37
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v48
+; SI-NEXT: v_mov_b32_e32 v62, v35
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; SI-NEXT: v_mov_b32_e32 v29, v54
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v30, v46
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v2, v34
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v39, v33
; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v3, v17
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v4, v20
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v5, v19
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v39
+; SI-NEXT: v_lshr_b64 v[3:4], v[32:33], 16
+; SI-NEXT: v_mov_b32_e32 v4, v41
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[4:5], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v5, v26
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16
-; SI-NEXT: v_mov_b32_e32 v6, v13
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16
-; SI-NEXT: v_mov_b32_e32 v7, v31
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[6:7], v[25:26], 16
+; SI-NEXT: v_mov_b32_e32 v7, v24
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v8, v23
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v44, v45
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; SI-NEXT: v_mov_b32_e32 v9, v25
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16
-; SI-NEXT: v_mov_b32_e32 v10, v30
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v61
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v33
+; SI-NEXT: v_lshr_b64 v[10:11], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v13, v60
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshr_b64 v[11:12], v[59:60], 16
+; SI-NEXT: v_mov_b32_e32 v14, v59
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v15
+; SI-NEXT: v_mov_b32_e32 v60, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[58:59], 16
+; SI-NEXT: v_mov_b32_e32 v15, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v16
+; SI-NEXT: v_mov_b32_e32 v59, v14
+; SI-NEXT: v_lshr_b64 v[13:14], v[57:58], 16
+; SI-NEXT: v_mov_b32_e32 v16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
+; SI-NEXT: v_mov_b32_e32 v58, v15
+; SI-NEXT: v_lshr_b64 v[14:15], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v17, v56
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
+; SI-NEXT: v_mov_b32_e32 v57, v16
+; SI-NEXT: v_lshr_b64 v[15:16], v[55:56], 16
+; SI-NEXT: v_mov_b32_e32 v56, v17
+; SI-NEXT: v_lshr_b64 v[16:17], v[51:52], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v20
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v49
+; SI-NEXT: v_mov_b32_e32 v49, v44
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v11, v27
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v54
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12
-; SI-NEXT: v_mov_b32_e32 v12, v61
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v21
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16
-; SI-NEXT: v_mov_b32_e32 v13, v29
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v14, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v62, v39
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15
-; SI-NEXT: v_mov_b32_e32 v15, v60
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16
-; SI-NEXT: v_mov_b32_e32 v16, v33
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v50
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16
-; SI-NEXT: v_mov_b32_e32 v17, v57
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47
-; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
-; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16
-; SI-NEXT: v_mov_b32_e32 v20, v38
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
+; SI-NEXT: v_mov_b32_e32 v24, v53
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; SI-NEXT: v_mov_b32_e32 v39, v62
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
-; SI-NEXT: v_mov_b32_e32 v21, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53
-; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v45, v44
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v47, v36
-; SI-NEXT: v_mov_b32_e32 v36, v37
-; SI-NEXT: v_mov_b32_e32 v49, v50
-; SI-NEXT: v_mov_b32_e32 v51, v33
+; SI-NEXT: v_lshr_b64 v[24:25], v[53:54], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v54, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v31
+; SI-NEXT: v_mov_b32_e32 v31, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v26, v43
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[43:44], 16
+; SI-NEXT: v_mov_b32_e32 v27, v28
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16
-; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; SI-NEXT: v_mov_b32_e32 v37, v48
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v35
+; SI-NEXT: v_mov_b32_e32 v35, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[47:48], 16
+; SI-NEXT: v_mov_b32_e32 v44, v49
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[45:46], 16
+; SI-NEXT: v_mov_b32_e32 v46, v30
+; SI-NEXT: v_lshr_b64 v[29:30], v[49:50], 16
+; SI-NEXT: v_mov_b32_e32 v50, v31
+; SI-NEXT: v_lshr_b64 v[30:31], v[42:43], 16
; SI-NEXT: v_mov_b32_e32 v31, v61
-; SI-NEXT: v_mov_b32_e32 v41, v40
+; SI-NEXT: v_mov_b32_e32 v61, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v49, v42
; SI-NEXT: s_branch .LBB63_3
; SI-NEXT: .LBB63_2:
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v58, v56
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB63_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v37, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v33, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v38, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v50, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v40, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_cbranch_scc1 .LBB63_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v34, v56
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v61
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -96892,12 +97699,20 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
@@ -96906,9 +97721,9 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
@@ -96917,9 +97732,9 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
@@ -96928,71 +97743,30 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v60
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v59
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
@@ -97001,15 +97775,29 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v54
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
@@ -97018,9 +97806,9 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
@@ -97029,31 +97817,69 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v50
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
; SI-NEXT: v_mov_b32_e32 v31, v32
@@ -97068,6 +97894,7 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
@@ -97079,7 +97906,7 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -100517,8 +101344,9 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v32, s34, 0
; SI-NEXT: v_writelane_b32 v32, s35, 1
; SI-NEXT: v_writelane_b32 v32, s36, 2
@@ -100529,18 +101357,8 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: v_writelane_b32 v32, s49, 7
; SI-NEXT: v_writelane_b32 v32, s50, 8
; SI-NEXT: v_writelane_b32 v32, s51, 9
-; SI-NEXT: v_writelane_b32 v32, s52, 10
-; SI-NEXT: v_writelane_b32 v32, s53, 11
-; SI-NEXT: v_writelane_b32 v32, s54, 12
-; SI-NEXT: v_writelane_b32 v32, s55, 13
-; SI-NEXT: v_writelane_b32 v32, s64, 14
-; SI-NEXT: v_writelane_b32 v32, s65, 15
-; SI-NEXT: v_writelane_b32 v32, s66, 16
-; SI-NEXT: v_writelane_b32 v32, s67, 17
-; SI-NEXT: v_writelane_b32 v32, s68, 18
-; SI-NEXT: v_writelane_b32 v32, s69, 19
-; SI-NEXT: v_writelane_b32 v32, s30, 20
-; SI-NEXT: v_writelane_b32 v32, s31, 21
+; SI-NEXT: v_writelane_b32 v32, s30, 10
+; SI-NEXT: v_writelane_b32 v32, s31, 11
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -100561,34 +101379,52 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s45, v1
; SI-NEXT: s_cmp_lg_u32 s44, 0
; SI-NEXT: v_readfirstlane_b32 s44, v0
+; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB65_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v33, s46, 0
+; SI-NEXT: s_lshr_b32 s46, s7, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 1
+; SI-NEXT: s_lshr_b32 s46, s9, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 2
+; SI-NEXT: s_lshr_b32 s46, s11, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 3
+; SI-NEXT: s_lshr_b32 s46, s13, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 4
+; SI-NEXT: s_lshr_b32 s46, s15, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 5
+; SI-NEXT: s_lshr_b32 s46, s41, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 6
+; SI-NEXT: s_lshr_b32 s46, s43, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 7
+; SI-NEXT: s_lshr_b32 s46, s45, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 8
+; SI-NEXT: s_lshr_b32 s46, s29, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 9
+; SI-NEXT: s_lshr_b32 s46, s27, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 10
+; SI-NEXT: s_lshr_b32 s46, s25, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 11
+; SI-NEXT: s_lshr_b32 s46, s23, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 12
+; SI-NEXT: s_lshr_b32 s46, s21, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s17, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 15
+; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -100598,43 +101434,75 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB65_3
; SI-NEXT: .LBB65_2:
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: s_mov_b64 s[36:37], -1
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: .LBB65_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: v_readlane_b32 s36, v33, 0
+; SI-NEXT: v_readlane_b32 s37, v33, 1
+; SI-NEXT: v_readlane_b32 s47, v33, 2
+; SI-NEXT: v_readlane_b32 s57, v33, 3
+; SI-NEXT: v_readlane_b32 s59, v33, 4
+; SI-NEXT: v_readlane_b32 s61, v33, 5
+; SI-NEXT: v_readlane_b32 s38, v33, 6
+; SI-NEXT: v_readlane_b32 s39, v33, 7
+; SI-NEXT: v_readlane_b32 s63, v33, 8
+; SI-NEXT: v_readlane_b32 s48, v33, 9
+; SI-NEXT: v_readlane_b32 s73, v33, 10
+; SI-NEXT: v_readlane_b32 s49, v33, 11
+; SI-NEXT: v_readlane_b32 s75, v33, 12
+; SI-NEXT: v_readlane_b32 s50, v33, 13
+; SI-NEXT: v_readlane_b32 s77, v33, 14
+; SI-NEXT: v_readlane_b32 s51, v33, 15
; SI-NEXT: s_cbranch_scc1 .LBB65_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -100669,32 +101537,40 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s46, s45, 16
+; SI-NEXT: s_lshr_b32 s47, s27, 16
+; SI-NEXT: s_lshr_b32 s76, s23, 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s90, s9, 16
+; SI-NEXT: s_lshr_b32 s91, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s13, 16
+; SI-NEXT: s_lshr_b32 s93, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s19, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s46
+; SI-NEXT: s_mov_b32 s73, s47
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s36, s5, 16
+; SI-NEXT: s_lshr_b32 s37, s7, 16
+; SI-NEXT: s_lshr_b32 s38, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s49, s25, 16
+; SI-NEXT: s_lshr_b32 s50, s21, 16
+; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_mov_b32 s77, s78
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_mov_b32 s61, s93
+; SI-NEXT: s_mov_b32 s59, s92
+; SI-NEXT: s_mov_b32 s57, s91
+; SI-NEXT: s_mov_b32 s47, s90
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -100702,103 +101578,103 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB65_5: ; %end
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s69, 16
-; SI-NEXT: s_or_b32 s17, s17, s47
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s47
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s68, 16
-; SI-NEXT: s_or_b32 s19, s19, s47
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s47
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s67, 16
-; SI-NEXT: s_or_b32 s21, s21, s47
-; SI-NEXT: s_lshl_b32 s47, s94, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s47
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s66, 16
-; SI-NEXT: s_or_b32 s23, s23, s47
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s47
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s25, s25, s47
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s90, 16
-; SI-NEXT: s_or_b32 s26, s26, s47
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_or_b32 s27, s27, s47
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s28, s28, s47
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_or_b32 s28, s28, s46
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
+; SI-NEXT: s_lshl_b32 s46, s48, 16
+; SI-NEXT: s_or_b32 s29, s29, s46
; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s78, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
+; SI-NEXT: s_lshl_b32 s46, s88, 16
+; SI-NEXT: s_or_b32 s44, s44, s46
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s46, s63, 16
+; SI-NEXT: s_or_b32 s45, s45, s46
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s76, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s46, s78, 16
+; SI-NEXT: s_or_b32 s42, s42, s46
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s46, s39, 16
+; SI-NEXT: s_or_b32 s43, s43, s46
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s46, s76, 16
+; SI-NEXT: s_or_b32 s40, s40, s46
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_or_b32 s41, s41, s46
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s72, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s46, s74, 16
+; SI-NEXT: s_or_b32 s14, s14, s46
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s46, s61, 16
+; SI-NEXT: s_or_b32 s15, s15, s46
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s62, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s46, s72, 16
+; SI-NEXT: s_or_b32 s12, s12, s46
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
+; SI-NEXT: s_lshl_b32 s46, s59, 16
+; SI-NEXT: s_or_b32 s13, s13, s46
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s46, s60, 16
+; SI-NEXT: s_or_b32 s10, s10, s46
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
+; SI-NEXT: s_lshl_b32 s46, s57, 16
+; SI-NEXT: s_or_b32 s11, s11, s46
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
+; SI-NEXT: s_lshl_b32 s46, s62, 16
+; SI-NEXT: s_or_b32 s8, s8, s46
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_lshl_b32 s46, s47, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_or_b32 s9, s9, s46
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s56, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
+; SI-NEXT: s_lshl_b32 s46, s58, 16
+; SI-NEXT: s_lshl_b32 s79, s34, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, vcc_lo, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_lshl_b32 s46, s37, 16
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s79, s51, 16
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s50, 16
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s49, 16
+; SI-NEXT: s_or_b32 s7, s7, s46
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s56, 16
+; SI-NEXT: s_or_b32 s17, s17, s79
+; SI-NEXT: s_lshl_b32 s79, s30, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s75
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s46, s36, 16
+; SI-NEXT: s_or_b32 s18, s18, s79
+; SI-NEXT: s_or_b32 s22, s22, s77
+; SI-NEXT: s_or_b32 s26, s26, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s46
-; SI-NEXT: v_readlane_b32 s30, v32, 20
+; SI-NEXT: v_readlane_b32 s30, v32, 10
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -100831,17 +101707,7 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_readlane_b32 s31, v32, 21
-; SI-NEXT: v_readlane_b32 s69, v32, 19
-; SI-NEXT: v_readlane_b32 s68, v32, 18
-; SI-NEXT: v_readlane_b32 s67, v32, 17
-; SI-NEXT: v_readlane_b32 s66, v32, 16
-; SI-NEXT: v_readlane_b32 s65, v32, 15
-; SI-NEXT: v_readlane_b32 s64, v32, 14
-; SI-NEXT: v_readlane_b32 s55, v32, 13
-; SI-NEXT: v_readlane_b32 s54, v32, 12
-; SI-NEXT: v_readlane_b32 s53, v32, 11
-; SI-NEXT: v_readlane_b32 s52, v32, 10
+; SI-NEXT: v_readlane_b32 s31, v32, 11
; SI-NEXT: v_readlane_b32 s51, v32, 9
; SI-NEXT: v_readlane_b32 s50, v32, 8
; SI-NEXT: v_readlane_b32 s49, v32, 7
@@ -100854,6 +101720,8 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v32, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -102177,14 +103045,14 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s92, v6
; SI-NEXT: v_readfirstlane_b32 s94, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: v_readfirstlane_b32 s30, v3
-; SI-NEXT: v_readfirstlane_b32 s34, v2
-; SI-NEXT: v_readfirstlane_b32 s70, v1
-; SI-NEXT: v_readfirstlane_b32 s81, v0
-; SI-NEXT: s_lshr_b32 s35, s29, 16
-; SI-NEXT: s_lshr_b32 s69, s28, 16
-; SI-NEXT: s_lshr_b32 s80, s27, 16
-; SI-NEXT: s_lshr_b32 s83, s26, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_readfirstlane_b32 s69, v1
+; SI-NEXT: v_readfirstlane_b32 s80, v0
+; SI-NEXT: s_lshr_b32 s34, s29, 16
+; SI-NEXT: s_lshr_b32 s68, s28, 16
+; SI-NEXT: s_lshr_b32 s71, s27, 16
+; SI-NEXT: s_lshr_b32 s82, s26, 16
; SI-NEXT: s_lshr_b32 s84, s25, 16
; SI-NEXT: s_lshr_b32 s85, s24, 16
; SI-NEXT: s_lshr_b32 s86, s23, 16
@@ -102193,7 +103061,7 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s97, s20, 16
; SI-NEXT: s_lshr_b32 s98, s19, 16
; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s7, s17, 16
+; SI-NEXT: s_lshr_b32 s83, s17, 16
; SI-NEXT: s_lshr_b32 s9, s16, 16
; SI-NEXT: s_lshr_b32 s67, s6, 16
; SI-NEXT: s_lshr_b32 s66, s8, 16
@@ -102209,71 +103077,72 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s31, s30, 16
-; SI-NEXT: s_lshr_b32 s68, s34, 16
-; SI-NEXT: s_lshr_b32 s71, s70, 16
-; SI-NEXT: s_lshr_b32 s82, s81, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s4, 16
+; SI-NEXT: s_lshr_b32 s35, s31, 16
+; SI-NEXT: s_lshr_b32 s70, s69, 16
+; SI-NEXT: s_lshr_b32 s81, s80, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v35, s67, 0
; SI-NEXT: v_writelane_b32 v35, s66, 1
; SI-NEXT: s_cbranch_scc0 .LBB67_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s9, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s99, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s98, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s7, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s83, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s96, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s52, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s53, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -102320,6 +103189,7 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB67_3
; SI-NEXT: .LBB67_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB67_3: ; %Flow
@@ -102330,7 +103200,7 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s83
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -102402,7 +103272,7 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s83
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s82
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
@@ -102413,7 +103283,7 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s71
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
@@ -102422,11 +103292,11 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v13, v11
; SI-NEXT: v_cvt_f32_f16_e32 v13, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
@@ -102437,8 +103307,8 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v15, s29
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s82
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s80
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -102446,11 +103316,11 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s70
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s35
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -102458,11 +103328,11 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v18, s31
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v19, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v19, s7
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -103741,8 +104611,9 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v32, s34, 0
; SI-NEXT: v_writelane_b32 v32, s35, 1
; SI-NEXT: v_writelane_b32 v32, s36, 2
@@ -103753,18 +104624,8 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_writelane_b32 v32, s49, 7
; SI-NEXT: v_writelane_b32 v32, s50, 8
; SI-NEXT: v_writelane_b32 v32, s51, 9
-; SI-NEXT: v_writelane_b32 v32, s52, 10
-; SI-NEXT: v_writelane_b32 v32, s53, 11
-; SI-NEXT: v_writelane_b32 v32, s54, 12
-; SI-NEXT: v_writelane_b32 v32, s55, 13
-; SI-NEXT: v_writelane_b32 v32, s64, 14
-; SI-NEXT: v_writelane_b32 v32, s65, 15
-; SI-NEXT: v_writelane_b32 v32, s66, 16
-; SI-NEXT: v_writelane_b32 v32, s67, 17
-; SI-NEXT: v_writelane_b32 v32, s68, 18
-; SI-NEXT: v_writelane_b32 v32, s69, 19
-; SI-NEXT: v_writelane_b32 v32, s30, 20
-; SI-NEXT: v_writelane_b32 v32, s31, 21
+; SI-NEXT: v_writelane_b32 v32, s30, 10
+; SI-NEXT: v_writelane_b32 v32, s31, 11
; SI-NEXT: v_readfirstlane_b32 s44, v18
; SI-NEXT: v_readfirstlane_b32 s5, v17
; SI-NEXT: v_readfirstlane_b32 s4, v16
@@ -103785,34 +104646,52 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s45, v1
; SI-NEXT: s_cmp_lg_u32 s44, 0
; SI-NEXT: v_readfirstlane_b32 s44, v0
+; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB69_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v33, s46, 0
+; SI-NEXT: s_lshr_b32 s46, s7, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 1
+; SI-NEXT: s_lshr_b32 s46, s9, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 2
+; SI-NEXT: s_lshr_b32 s46, s11, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 3
+; SI-NEXT: s_lshr_b32 s46, s13, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 4
+; SI-NEXT: s_lshr_b32 s46, s15, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 5
+; SI-NEXT: s_lshr_b32 s46, s41, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 6
+; SI-NEXT: s_lshr_b32 s46, s43, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 7
+; SI-NEXT: s_lshr_b32 s46, s45, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 8
+; SI-NEXT: s_lshr_b32 s46, s29, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 9
+; SI-NEXT: s_lshr_b32 s46, s27, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 10
+; SI-NEXT: s_lshr_b32 s46, s25, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 11
+; SI-NEXT: s_lshr_b32 s46, s23, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 12
+; SI-NEXT: s_lshr_b32 s46, s21, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s17, 16
+; SI-NEXT: v_writelane_b32 v33, s46, 15
+; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -103822,43 +104701,75 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB69_3
; SI-NEXT: .LBB69_2:
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: s_mov_b64 s[36:37], -1
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; kill: killed $sgpr47
; SI-NEXT: .LBB69_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
; SI-NEXT: s_cselect_b32 s47, 1, 0
; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: v_readlane_b32 s36, v33, 0
+; SI-NEXT: v_readlane_b32 s37, v33, 1
+; SI-NEXT: v_readlane_b32 s47, v33, 2
+; SI-NEXT: v_readlane_b32 s57, v33, 3
+; SI-NEXT: v_readlane_b32 s59, v33, 4
+; SI-NEXT: v_readlane_b32 s61, v33, 5
+; SI-NEXT: v_readlane_b32 s38, v33, 6
+; SI-NEXT: v_readlane_b32 s39, v33, 7
+; SI-NEXT: v_readlane_b32 s63, v33, 8
+; SI-NEXT: v_readlane_b32 s48, v33, 9
+; SI-NEXT: v_readlane_b32 s73, v33, 10
+; SI-NEXT: v_readlane_b32 s49, v33, 11
+; SI-NEXT: v_readlane_b32 s75, v33, 12
+; SI-NEXT: v_readlane_b32 s50, v33, 13
+; SI-NEXT: v_readlane_b32 s77, v33, 14
+; SI-NEXT: v_readlane_b32 s51, v33, 15
; SI-NEXT: s_cbranch_scc1 .LBB69_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -103893,32 +104804,40 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s39, s7, 16
-; SI-NEXT: s_lshr_b32 s48, s9, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s52, s41, 16
-; SI-NEXT: s_lshr_b32 s53, s43, 16
-; SI-NEXT: s_lshr_b32 s54, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s29, 16
-; SI-NEXT: s_lshr_b32 s64, s27, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s21, 16
-; SI-NEXT: s_lshr_b32 s68, s19, 16
-; SI-NEXT: s_lshr_b32 s69, s17, 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s46, s45, 16
+; SI-NEXT: s_lshr_b32 s47, s27, 16
+; SI-NEXT: s_lshr_b32 s76, s23, 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s90, s9, 16
+; SI-NEXT: s_lshr_b32 s91, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s13, 16
+; SI-NEXT: s_lshr_b32 s93, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s19, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s46
+; SI-NEXT: s_mov_b32 s73, s47
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s36, s5, 16
+; SI-NEXT: s_lshr_b32 s37, s7, 16
+; SI-NEXT: s_lshr_b32 s38, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s49, s25, 16
+; SI-NEXT: s_lshr_b32 s50, s21, 16
+; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_mov_b32 s77, s78
+; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_mov_b32 s61, s93
+; SI-NEXT: s_mov_b32 s59, s92
+; SI-NEXT: s_mov_b32 s57, s91
+; SI-NEXT: s_mov_b32 s47, s90
; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16
@@ -103926,103 +104845,103 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16
; SI-NEXT: .LBB69_5: ; %end
-; SI-NEXT: s_lshl_b32 s47, s34, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s47
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s69, 16
-; SI-NEXT: s_or_b32 s17, s17, s47
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s47
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s68, 16
-; SI-NEXT: s_or_b32 s19, s19, s47
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s47
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s67, 16
-; SI-NEXT: s_or_b32 s21, s21, s47
-; SI-NEXT: s_lshl_b32 s47, s94, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s47
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s66, 16
-; SI-NEXT: s_or_b32 s23, s23, s47
-; SI-NEXT: s_lshl_b32 s47, s92, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s47
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s65, 16
-; SI-NEXT: s_or_b32 s25, s25, s47
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s90, 16
-; SI-NEXT: s_or_b32 s26, s26, s47
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_or_b32 s27, s27, s47
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s28, s28, s47
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_or_b32 s28, s28, s46
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s29, s29, s47
+; SI-NEXT: s_lshl_b32 s46, s48, 16
+; SI-NEXT: s_or_b32 s29, s29, s46
; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s78, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
+; SI-NEXT: s_lshl_b32 s46, s88, 16
+; SI-NEXT: s_or_b32 s44, s44, s46
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s46, s63, 16
+; SI-NEXT: s_or_b32 s45, s45, s46
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s76, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s46, s78, 16
+; SI-NEXT: s_or_b32 s42, s42, s46
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s46, s39, 16
+; SI-NEXT: s_or_b32 s43, s43, s46
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s74, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s46, s76, 16
+; SI-NEXT: s_or_b32 s40, s40, s46
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s46, s38, 16
+; SI-NEXT: s_or_b32 s41, s41, s46
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s72, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s46, s74, 16
+; SI-NEXT: s_or_b32 s14, s14, s46
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s46, s61, 16
+; SI-NEXT: s_or_b32 s15, s15, s46
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s62, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s46, s72, 16
+; SI-NEXT: s_or_b32 s12, s12, s46
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
+; SI-NEXT: s_lshl_b32 s46, s59, 16
+; SI-NEXT: s_or_b32 s13, s13, s46
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
+; SI-NEXT: s_lshl_b32 s46, s60, 16
+; SI-NEXT: s_or_b32 s10, s10, s46
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
+; SI-NEXT: s_lshl_b32 s46, s57, 16
+; SI-NEXT: s_or_b32 s11, s11, s46
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s60, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
+; SI-NEXT: s_lshl_b32 s46, s62, 16
+; SI-NEXT: s_or_b32 s8, s8, s46
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_lshl_b32 s46, s47, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_or_b32 s9, s9, s46
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s56, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
+; SI-NEXT: s_lshl_b32 s46, s58, 16
+; SI-NEXT: s_lshl_b32 s79, s34, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, vcc_lo, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_lshl_b32 s46, s37, 16
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s79, s51, 16
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s50, 16
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s49, 16
+; SI-NEXT: s_or_b32 s7, s7, s46
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s56, 16
+; SI-NEXT: s_or_b32 s17, s17, s79
+; SI-NEXT: s_lshl_b32 s79, s30, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s75
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s38, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
+; SI-NEXT: s_lshl_b32 s46, s36, 16
+; SI-NEXT: s_or_b32 s18, s18, s79
+; SI-NEXT: s_or_b32 s22, s22, s77
+; SI-NEXT: s_or_b32 s26, s26, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s46
-; SI-NEXT: v_readlane_b32 s30, v32, 20
+; SI-NEXT: v_readlane_b32 s30, v32, 10
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -104055,17 +104974,7 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v29, s7
; SI-NEXT: v_mov_b32_e32 v30, s4
; SI-NEXT: v_mov_b32_e32 v31, s5
-; SI-NEXT: v_readlane_b32 s31, v32, 21
-; SI-NEXT: v_readlane_b32 s69, v32, 19
-; SI-NEXT: v_readlane_b32 s68, v32, 18
-; SI-NEXT: v_readlane_b32 s67, v32, 17
-; SI-NEXT: v_readlane_b32 s66, v32, 16
-; SI-NEXT: v_readlane_b32 s65, v32, 15
-; SI-NEXT: v_readlane_b32 s64, v32, 14
-; SI-NEXT: v_readlane_b32 s55, v32, 13
-; SI-NEXT: v_readlane_b32 s54, v32, 12
-; SI-NEXT: v_readlane_b32 s53, v32, 11
-; SI-NEXT: v_readlane_b32 s52, v32, 10
+; SI-NEXT: v_readlane_b32 s31, v32, 11
; SI-NEXT: v_readlane_b32 s51, v32, 9
; SI-NEXT: v_readlane_b32 s50, v32, 8
; SI-NEXT: v_readlane_b32 s49, v32, 7
@@ -104078,6 +104987,8 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: v_readlane_b32 s34, v32, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -105230,25 +106141,25 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s91, v7
; SI-NEXT: v_readfirstlane_b32 s94, v6
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v5
-; SI-NEXT: v_readfirstlane_b32 s34, v4
-; SI-NEXT: v_readfirstlane_b32 s70, v3
-; SI-NEXT: v_readfirstlane_b32 s81, v2
-; SI-NEXT: v_readfirstlane_b32 s84, v1
-; SI-NEXT: v_readfirstlane_b32 s87, v0
+; SI-NEXT: v_readfirstlane_b32 s31, v4
+; SI-NEXT: v_readfirstlane_b32 s69, v3
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: v_readfirstlane_b32 s83, v1
+; SI-NEXT: v_readfirstlane_b32 s86, v0
; SI-NEXT: s_lshr_b32 s92, s29, 16
; SI-NEXT: s_lshr_b32 s95, s28, 16
-; SI-NEXT: s_lshr_b32 s30, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s71, s24, 16
-; SI-NEXT: s_lshr_b32 s82, s23, 16
-; SI-NEXT: s_lshr_b32 s85, s22, 16
-; SI-NEXT: s_lshr_b32 s96, s21, 16
-; SI-NEXT: s_lshr_b32 s97, s20, 16
-; SI-NEXT: s_lshr_b32 s98, s19, 16
-; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: s_lshr_b32 s8, s16, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s24, 16
+; SI-NEXT: s_lshr_b32 s81, s23, 16
+; SI-NEXT: s_lshr_b32 s84, s22, 16
+; SI-NEXT: s_lshr_b32 s87, s21, 16
+; SI-NEXT: s_lshr_b32 s96, s20, 16
+; SI-NEXT: s_lshr_b32 s97, s19, 16
+; SI-NEXT: s_lshr_b32 s98, s18, 16
+; SI-NEXT: s_lshr_b32 s99, s17, 16
+; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
; SI-NEXT: s_lshr_b32 s12, s11, 16
@@ -105262,75 +106173,76 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s34, 16
-; SI-NEXT: s_lshr_b32 s68, s70, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s35, s69, 16
+; SI-NEXT: s_lshr_b32 s71, s80, 16
+; SI-NEXT: s_lshr_b32 s82, s83, 16
+; SI-NEXT: s_lshr_b32 s85, s86, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v33, s14, 0
; SI-NEXT: v_writelane_b32 v33, s63, 1
; SI-NEXT: s_cbranch_scc0 .LBB71_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: s_or_b32 s36, s5, s8
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s98, 16
+; SI-NEXT: s_or_b32 s38, s5, s8
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s97, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s6, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s99, 16
+; SI-NEXT: s_or_b32 s39, s5, s8
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s96, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s8
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s87, 16
+; SI-NEXT: s_or_b32 s41, s5, s8
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s84, 16
+; SI-NEXT: s_or_b32 s42, s5, s8
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s81, 16
+; SI-NEXT: s_or_b32 s43, s5, s8
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s70, 16
+; SI-NEXT: s_or_b32 s44, s5, s8
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s68, 16
+; SI-NEXT: s_or_b32 s45, s5, s8
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s8
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_mov_b32 s8, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s47, s5, s4
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s53, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s54, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -105386,6 +106298,7 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 s14, s12
; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
+; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB71_3: ; %Flow
@@ -105396,62 +106309,62 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s99, 16
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_add_i32 s37, s5, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s98, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s96, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -105463,30 +106376,30 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_add_i32 s86, s86, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s83, s83, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
@@ -107440,281 +108353,283 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; kill: killed $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB72_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v10
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v8
; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v3
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
; VI-NEXT: .LBB72_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB72_4
@@ -107740,11 +108655,11 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
-; VI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0
+; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
-; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
+; VI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
@@ -107760,242 +108675,246 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v10
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v8
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v12
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v3
; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v1
; VI-NEXT: .LBB72_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v7, v7, v51, s4
-; VI-NEXT: v_perm_b32 v10, v10, v50, s4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v13, v13, v36, s4
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v3, v52, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v11, v11, v37, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v8, v8, v38, s4
-; VI-NEXT: v_perm_b32 v38, v63, v53, s4
-; VI-NEXT: v_perm_b32 v55, v57, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v58, s4
-; VI-NEXT: v_perm_b32 v2, v2, v56, s4
-; VI-NEXT: v_perm_b32 v35, v35, v40, s4
-; VI-NEXT: v_perm_b32 v4, v4, v47, s4
-; VI-NEXT: v_perm_b32 v39, v45, v39, s4
-; VI-NEXT: v_perm_b32 v5, v5, v46, s4
-; VI-NEXT: v_perm_b32 v6, v6, v34, s4
-; VI-NEXT: v_perm_b32 v34, v44, v54, s4
-; VI-NEXT: v_perm_b32 v9, v9, v43, s4
-; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: v_perm_b32 v38, v45, v54, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v12, v12, v49, s4
+; VI-NEXT: v_perm_b32 v13, v13, v33, s4
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v7, v7, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v41, v62, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v63, s4
+; VI-NEXT: v_perm_b32 v2, v2, v61, s4
+; VI-NEXT: v_perm_b32 v40, v60, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v59, s4
+; VI-NEXT: v_perm_b32 v39, v57, v39, s4
+; VI-NEXT: v_perm_b32 v5, v5, v58, s4
+; VI-NEXT: v_perm_b32 v6, v6, v56, s4
+; VI-NEXT: v_perm_b32 v9, v9, v46, s4
+; VI-NEXT: v_perm_b32 v10, v10, v44, s4
+; VI-NEXT: v_perm_b32 v11, v11, v43, s4
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_perm_b32 v52, v47, v52, s4
; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_perm_b32 v50, v62, v50, s4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v14, v14, v36, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v37, v59, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v36, v36, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v16, v51, s4
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v51, v52, v51, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v34, v34, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v15, v15, v49, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v33, s4
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v17, v17, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v48, v48, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v16, v16, v49, s4
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v18, v18, v51, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v52, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v33, v33, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v52, s4
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v49, v49, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v53, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v55
+; VI-NEXT: v_perm_b32 v51, v51, v53, s4
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v41
; VI-NEXT: v_or_b32_e32 v1, v1, v53
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v33, v49, s4
+; VI-NEXT: v_perm_b32 v1, v50, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v48, v60, s4
+; VI-NEXT: v_perm_b32 v1, v36, v35, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v20, v42, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
@@ -108004,188 +108923,189 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_perm_b32 v1, v19, v55, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v21, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v22, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v23, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v24, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v26, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v28, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v29, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v30, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -108321,94 +109241,89 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; kill: killed $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; kill: killed $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr39
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(25)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
@@ -108416,199 +109331,208 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB72_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(25)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: s_waitcnt vmcnt(27)
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v20
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v55, v39
; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v1
; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v32
; GFX9-NEXT: .LBB72_2: ; %Flow
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v42, v49
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB72_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: s_waitcnt vmcnt(24)
@@ -108646,12 +109570,12 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
+; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
+; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
@@ -108680,72 +109604,72 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18
@@ -108769,131 +109693,135 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v10
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v1
; GFX9-NEXT: .LBB72_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v5, v5, v52, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v10, v10, v50, s4
-; GFX9-NEXT: v_perm_b32 v34, v34, v39, s4
-; GFX9-NEXT: v_perm_b32 v12, v12, v36, s4
-; GFX9-NEXT: v_perm_b32 v35, v35, v41, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v57, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v53, s4
-; GFX9-NEXT: v_perm_b32 v53, v47, v40, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v56, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v46, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v45, s4
-; GFX9-NEXT: v_perm_b32 v38, v38, v54, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v43, s4
-; GFX9-NEXT: v_perm_b32 v11, v11, v62, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v33, v33, v51, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v39, v49, v50, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v36, v36, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v49, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v49, v50, v49, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v4, v4, v48, s4
+; GFX9-NEXT: v_perm_b32 v39, v53, v39, s4
+; GFX9-NEXT: v_perm_b32 v48, v45, v54, s4
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v38, s4
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v44, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v41, v62, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v36, s4
+; GFX9-NEXT: v_perm_b32 v36, v56, v40, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v60, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v61, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v57, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v47, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v53, v43, v53, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v13, v13, v38, s4
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v15, v15, v49, s4
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v17, v17, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v37, v37, v43, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v14, v14, v38, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v16, v16, v49, s4
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v18, v18, v52, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v50, v51, v50, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v33, v33, v43, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v38, v38, v43, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v49, v49, v43, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v51, v52, v51, s4
+; GFX9-NEXT: v_perm_b32 v52, v52, v43, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v63, v37, s4
+; GFX9-NEXT: v_perm_b32 v1, v34, v51, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v61, v60, s4
+; GFX9-NEXT: v_perm_b32 v1, v50, v35, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v48, v59, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v20, v55, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v63, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -108902,7 +109830,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -108911,7 +109839,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -108920,7 +109848,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v13
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -108929,7 +109857,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
@@ -108938,149 +109866,136 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v59, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v21, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v58, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v42, v55, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -109104,74 +110019,70 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v16f64_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
@@ -109251,19 +110162,25 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB72_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v48.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -109325,28 +110242,24 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-TRUE16-NEXT: .LBB72_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -109445,50 +110358,50 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: .LBB72_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v59, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v73, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v67, v62, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v67, 16, v2
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -109497,9 +110410,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -109575,101 +110487,95 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v16f64_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
@@ -109749,19 +110655,25 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB72_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v55, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v32
@@ -109823,28 +110735,24 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2]
; GFX11-FAKE16-NEXT: .LBB72_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -109943,50 +110851,51 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v1
; GFX11-FAKE16-NEXT: .LBB72_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v61, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v59, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v54, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v63, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v60, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v58, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v54, v42, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v40, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v65, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v57, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v55, v56, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v46, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v42, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v41, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v47, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v45, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v66, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v55, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v54, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v39, 16, v8
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v39, v182, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v181, 0xc0c0004
@@ -109995,9 +110904,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v177, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v176, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v54, v167, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v65, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -110073,27 +110981,25 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
+; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:80
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -110118,9 +111024,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
@@ -110561,64 +111467,165 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_cmp_lg_u32 s47, 1
; SI-NEXT: s_cbranch_scc1 .LBB73_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_add_f64 v[15:16], s[6:7], 1.0
-; SI-NEXT: v_add_f64 v[33:34], s[4:5], 1.0
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[17:18], v[33:34], 24
-; SI-NEXT: v_add_f64 v[44:45], s[12:13], 1.0
-; SI-NEXT: v_add_f64 v[47:48], s[40:41], 1.0
-; SI-NEXT: v_add_f64 v[10:11], s[42:43], 1.0
-; SI-NEXT: v_add_f64 v[36:37], s[24:25], 1.0
+; SI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0
+; SI-NEXT: v_add_f64 v[3:4], s[6:7], 1.0
+; SI-NEXT: v_lshr_b64 v[17:18], v[1:2], 24
+; SI-NEXT: v_add_f64 v[5:6], s[8:9], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[1:2], 16
+; SI-NEXT: v_add_f64 v[7:8], s[10:11], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[1:2], 8
+; SI-NEXT: v_add_f64 v[9:10], s[12:13], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 24
+; SI-NEXT: v_add_f64 v[11:12], s[14:15], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 16
+; SI-NEXT: v_add_f64 v[13:14], s[40:41], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 8
+; SI-NEXT: v_add_f64 v[15:16], s[42:43], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 24
+; SI-NEXT: v_add_f64 v[21:22], s[44:45], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 16
+; SI-NEXT: v_add_f64 v[28:29], s[28:29], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 8
+; SI-NEXT: v_lshr_b64 v[55:56], v[21:22], 16
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[7:8], 24
+; SI-NEXT: v_add_f64 v[51:52], s[24:25], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[7:8], 16
+; SI-NEXT: v_lshr_b64 v[56:57], v[21:22], 8
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[7:8], 8
+; SI-NEXT: v_add_f64 v[36:37], s[26:27], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[9:10], 24
+; SI-NEXT: v_add_f64 v[26:27], s[22:23], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[9:10], 16
+; SI-NEXT: v_add_f64 v[40:41], s[16:17], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[9:10], 8
+; SI-NEXT: v_readfirstlane_b32 s43, v16
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[11:12], 24
+; SI-NEXT: v_lshr_b64 v[57:58], v[28:29], 24
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[11:12], 16
+; SI-NEXT: v_add_f64 v[33:34], s[20:21], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[11:12], 8
+; SI-NEXT: v_add_f64 v[49:50], s[18:19], 1.0
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[13:14], 24
+; SI-NEXT: v_readfirstlane_b32 s45, v22
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s5, v34
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[33:34], 16
-; SI-NEXT: v_lshr_b64 v[34:35], v[33:34], 8
-; SI-NEXT: v_lshr_b64 v[55:56], v[44:45], 16
-; SI-NEXT: v_readfirstlane_b32 s13, v45
-; SI-NEXT: v_lshr_b64 v[58:59], v[44:45], 24
-; SI-NEXT: v_lshr_b64 v[56:57], v[44:45], 8
-; SI-NEXT: v_lshr_b64 v[45:46], v[47:48], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[10:11], 24
-; SI-NEXT: v_mov_b32_e32 v35, v36
-; SI-NEXT: v_mov_b32_e32 v36, v37
-; SI-NEXT: v_add_f64 v[1:2], s[22:23], 1.0
-; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
-; SI-NEXT: v_add_f64 v[41:42], s[20:21], 1.0
-; SI-NEXT: v_add_f64 v[28:29], s[10:11], 1.0
-; SI-NEXT: v_add_f64 v[3:4], s[26:27], 1.0
-; SI-NEXT: v_add_f64 v[5:6], s[44:45], 1.0
-; SI-NEXT: v_readfirstlane_b32 s9, v21
+; SI-NEXT: v_lshr_b64 v[17:18], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[46:47], v[21:22], 24
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[17:18], v[13:14], 8
+; SI-NEXT: v_lshr_b64 v[58:59], v[28:29], 16
; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f64 v[52:53], s[14:15], 1.0
-; SI-NEXT: v_add_f64 v[49:50], s[18:19], 1.0
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[47:48], 8
-; SI-NEXT: v_add_f64 v[13:14], s[28:29], 1.0
-; SI-NEXT: v_add_f64 v[7:8], s[16:17], 1.0
-; SI-NEXT: v_readfirstlane_b32 s15, v53
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: v_readfirstlane_b32 s19, v50
-; SI-NEXT: v_readfirstlane_b32 s21, v42
-; SI-NEXT: v_readfirstlane_b32 s25, v37
+; SI-NEXT: v_lshr_b64 v[17:18], v[15:16], 24
+; SI-NEXT: v_lshr_b64 v[22:23], v[51:52], 24
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[13:14], 16
-; SI-NEXT: v_readfirstlane_b32 s17, v8
-; SI-NEXT: v_readfirstlane_b32 s23, v2
-; SI-NEXT: v_readfirstlane_b32 s45, v6
-; SI-NEXT: v_readfirstlane_b32 s11, v29
-; SI-NEXT: v_readfirstlane_b32 s41, v48
-; SI-NEXT: v_lshr_b64 v[59:60], v[47:48], 24
-; SI-NEXT: v_readfirstlane_b32 s29, v14
-; SI-NEXT: v_readfirstlane_b32 s43, v11
-; SI-NEXT: v_readfirstlane_b32 s27, v4
+; SI-NEXT: v_lshr_b64 v[17:18], v[15:16], 16
+; SI-NEXT: v_readfirstlane_b32 s29, v29
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshr_b64 v[16:17], v[15:16], 8
+; SI-NEXT: v_lshr_b64 v[59:60], v[28:29], 8
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshr_b64 v[18:19], v[36:37], 24
+; SI-NEXT: v_lshr_b64 v[23:24], v[51:52], 16
+; SI-NEXT: v_lshr_b64 v[29:30], v[26:27], 24
+; SI-NEXT: v_lshr_b64 v[42:43], v[40:41], 24
+; SI-NEXT: v_readfirstlane_b32 s25, v52
+; SI-NEXT: v_readfirstlane_b32 s27, v37
+; SI-NEXT: v_lshr_b64 v[19:20], v[36:37], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[16:17], v[36:37], 8
+; SI-NEXT: v_lshr_b64 v[24:25], v[51:52], 8
+; SI-NEXT: v_lshr_b64 v[30:31], v[26:27], 16
+; SI-NEXT: v_lshr_b64 v[37:38], v[33:34], 24
+; SI-NEXT: v_lshr_b64 v[52:53], v[49:50], 24
+; SI-NEXT: v_lshr_b64 v[43:44], v[40:41], 16
+; SI-NEXT: v_readfirstlane_b32 s17, v41
+; SI-NEXT: v_readfirstlane_b32 s19, v50
+; SI-NEXT: v_readfirstlane_b32 s21, v34
+; SI-NEXT: v_readfirstlane_b32 s23, v27
+; SI-NEXT: v_readfirstlane_b32 s41, v14
+; SI-NEXT: v_readfirstlane_b32 s15, v12
+; SI-NEXT: v_readfirstlane_b32 s13, v10
+; SI-NEXT: v_readfirstlane_b32 s11, v8
+; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 s7, v4
+; SI-NEXT: v_readfirstlane_b32 s5, v2
+; SI-NEXT: v_lshr_b64 v[31:32], v[26:27], 8
+; SI-NEXT: v_lshr_b64 v[47:48], v[33:34], 16
+; SI-NEXT: v_lshr_b64 v[34:35], v[33:34], 8
+; SI-NEXT: v_lshr_b64 v[53:54], v[49:50], 16
+; SI-NEXT: v_lshr_b64 v[38:39], v[49:50], 8
+; SI-NEXT: v_lshr_b64 v[44:45], v[40:41], 8
; SI-NEXT: s_lshr_b32 s10, s5, 24
; SI-NEXT: s_lshr_b32 s12, s5, 16
; SI-NEXT: s_lshr_b32 s14, s5, 8
+; SI-NEXT: s_lshr_b32 s16, s7, 24
+; SI-NEXT: s_lshr_b32 s18, s7, 16
+; SI-NEXT: s_lshr_b32 s20, s7, 8
; SI-NEXT: s_lshr_b32 s22, s9, 24
; SI-NEXT: s_lshr_b32 s24, s9, 16
; SI-NEXT: s_lshr_b32 s26, s9, 8
@@ -110649,132 +111656,6 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s25, 24
; SI-NEXT: s_lshr_b32 s91, s25, 16
; SI-NEXT: s_lshr_b32 s92, s25, 8
-; SI-NEXT: v_lshr_b64 v[25:26], v[15:16], 8
-; SI-NEXT: v_readfirstlane_b32 s7, v16
-; SI-NEXT: v_mov_b32_e32 v46, v25
-; SI-NEXT: v_lshr_b64 v[24:25], v[35:36], 24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[24:25], v[35:36], 16
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[24:25], v[35:36], 8
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[24:25], v[1:2], 24
-; SI-NEXT: v_lshr_b64 v[38:39], v[15:16], 24
-; SI-NEXT: v_lshr_b64 v[30:31], v[15:16], 16
-; SI-NEXT: v_lshr_b64 v[15:16], v[20:21], 24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[24:25], v[1:2], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[20:21], 16
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[24:25], v[1:2], 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[20:21], 8
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[24:25], v[41:42], 24
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[24:25], v[41:42], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[21:22], v[3:4], 24
-; SI-NEXT: v_lshr_b64 v[31:32], v[5:6], 24
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshr_b64 v[24:25], v[41:42], 8
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 8
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[21:22], v[3:4], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[31:32], v[5:6], 16
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[39:40], v[52:53], 24
-; SI-NEXT: v_lshr_b64 v[26:27], v[52:53], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[52:53], 8
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshr_b64 v[24:25], v[49:50], 24
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[16:17], v[10:11], 16
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[21:22], v[3:4], 8
-; SI-NEXT: v_mov_b32_e32 v54, v38
-; SI-NEXT: v_lshr_b64 v[37:38], v[49:50], 16
-; SI-NEXT: v_mov_b32_e32 v40, v49
-; SI-NEXT: v_lshr_b64 v[42:43], v[49:50], 8
-; SI-NEXT: v_lshr_b64 v[49:50], v[7:8], 24
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[31:32], v[5:6], 8
-; SI-NEXT: v_mov_b32_e32 v19, v30
-; SI-NEXT: v_mov_b32_e32 v22, v35
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[29:30], v[7:8], 16
-; SI-NEXT: v_mov_b32_e32 v35, v39
-; SI-NEXT: v_mov_b32_e32 v6, v7
-; SI-NEXT: v_mov_b32_e32 v7, v8
-; SI-NEXT: v_mov_b32_e32 v50, v1
-; SI-NEXT: v_mov_b32_e32 v39, v56
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v48, v16
-; SI-NEXT: v_mov_b32_e32 v16, v3
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[31:32], v[13:14], 24
-; SI-NEXT: v_lshr_b64 v[14:15], v[13:14], 8
-; SI-NEXT: v_lshr_b64 v[11:12], v[10:11], 8
-; SI-NEXT: s_lshr_b32 s16, s7, 24
-; SI-NEXT: s_lshr_b32 s18, s7, 16
-; SI-NEXT: s_lshr_b32 s20, s7, 8
; SI-NEXT: s_lshr_b32 s93, s23, 24
; SI-NEXT: s_lshr_b32 s94, s23, 16
; SI-NEXT: s_lshr_b32 s95, s23, 8
@@ -110787,85 +111668,55 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_lshr_b32 s8, s17, 24
; SI-NEXT: s_lshr_b32 s36, s17, 16
; SI-NEXT: s_lshr_b32 s6, s17, 8
-; SI-NEXT: v_mov_b32_e32 v12, v11
-; SI-NEXT: v_mov_b32_e32 v36, v5
-; SI-NEXT: v_mov_b32_e32 v51, v33
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_mov_b32_e32 v15, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_mov_b32_e32 v30, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mov_b32_e32 v38, v24
-; SI-NEXT: v_mov_b32_e32 v24, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v20, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v3, v31
-; SI-NEXT: v_lshr_b64 v[31:32], v[6:7], 8
-; SI-NEXT: v_mov_b32_e32 v33, v2
; SI-NEXT: s_branch .LBB73_6
; SI-NEXT: .LBB73_5:
-; SI-NEXT: v_mov_b32_e32 v1, s90
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, s6
+; SI-NEXT: v_mov_b32_e32 v2, s66
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s88
-; SI-NEXT: v_mov_b32_e32 v21, s46
+; SI-NEXT: v_mov_b32_e32 v2, s64
+; SI-NEXT: v_mov_b32_e32 v16, s46
; SI-NEXT: v_readlane_b32 s46, v62, 0
; SI-NEXT: v_readlane_b32 s47, v62, 1
-; SI-NEXT: v_mov_b32_e32 v53, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 2
-; SI-NEXT: v_readlane_b32 s47, v62, 3
-; SI-NEXT: v_mov_b32_e32 v26, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 4
-; SI-NEXT: v_readlane_b32 s47, v62, 5
-; SI-NEXT: v_mov_b32_e32 v35, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 6
-; SI-NEXT: v_readlane_b32 s47, v62, 7
-; SI-NEXT: v_mov_b32_e32 v39, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 8
-; SI-NEXT: v_readlane_b32 s47, v62, 9
-; SI-NEXT: v_mov_b32_e32 v55, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 10
-; SI-NEXT: v_readlane_b32 s47, v62, 11
-; SI-NEXT: v_mov_b32_e32 v58, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 12
-; SI-NEXT: v_readlane_b32 s47, v62, 13
-; SI-NEXT: v_mov_b32_e32 v3, s82
-; SI-NEXT: v_mov_b32_e32 v31, s34
-; SI-NEXT: v_mov_b32_e32 v29, s30
-; SI-NEXT: v_mov_b32_e32 v49, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v42, s94
-; SI-NEXT: v_mov_b32_e32 v37, s92
-; SI-NEXT: v_mov_b32_e32 v6, s16
-; SI-NEXT: v_mov_b32_e32 v40, s18
-; SI-NEXT: v_mov_b32_e32 v41, s20
-; SI-NEXT: v_mov_b32_e32 v50, s22
-; SI-NEXT: v_mov_b32_e32 v22, s24
-; SI-NEXT: v_mov_b32_e32 v16, s26
-; SI-NEXT: v_mov_b32_e32 v13, s28
-; SI-NEXT: v_mov_b32_e32 v36, s44
-; SI-NEXT: v_mov_b32_e32 v10, s42
-; SI-NEXT: v_mov_b32_e32 v47, s40
-; SI-NEXT: v_mov_b32_e32 v52, s14
-; SI-NEXT: v_mov_b32_e32 v44, s12
-; SI-NEXT: v_mov_b32_e32 v28, s10
-; SI-NEXT: v_mov_b32_e32 v24, s8
-; SI-NEXT: v_mov_b32_e32 v51, s4
-; SI-NEXT: v_mov_b32_e32 v14, s86
-; SI-NEXT: v_mov_b32_e32 v18, s84
-; SI-NEXT: v_mov_b32_e32 v12, s66
-; SI-NEXT: v_mov_b32_e32 v48, s64
-; SI-NEXT: v_mov_b32_e32 v23, s54
-; SI-NEXT: v_mov_b32_e32 v45, s50
-; SI-NEXT: v_mov_b32_e32 v59, s48
-; SI-NEXT: v_mov_b32_e32 v15, s38
+; SI-NEXT: v_mov_b32_e32 v44, s34
+; SI-NEXT: v_mov_b32_e32 v43, s30
+; SI-NEXT: v_mov_b32_e32 v42, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v38, s94
+; SI-NEXT: v_mov_b32_e32 v53, s92
+; SI-NEXT: v_mov_b32_e32 v52, s90
+; SI-NEXT: v_mov_b32_e32 v34, s88
+; SI-NEXT: v_mov_b32_e32 v47, s78
+; SI-NEXT: v_mov_b32_e32 v37, s76
+; SI-NEXT: v_mov_b32_e32 v31, s74
+; SI-NEXT: v_mov_b32_e32 v30, s72
+; SI-NEXT: v_mov_b32_e32 v29, s62
+; SI-NEXT: v_mov_b32_e32 v24, s60
+; SI-NEXT: v_mov_b32_e32 v23, s58
+; SI-NEXT: v_mov_b32_e32 v22, s56
+; SI-NEXT: v_mov_b32_e32 v40, s16
+; SI-NEXT: v_mov_b32_e32 v49, s18
+; SI-NEXT: v_mov_b32_e32 v33, s20
+; SI-NEXT: v_mov_b32_e32 v26, s22
+; SI-NEXT: v_mov_b32_e32 v51, s24
+; SI-NEXT: v_mov_b32_e32 v36, s26
+; SI-NEXT: v_mov_b32_e32 v28, s28
+; SI-NEXT: v_mov_b32_e32 v21, s44
+; SI-NEXT: v_mov_b32_e32 v15, s42
+; SI-NEXT: v_mov_b32_e32 v13, s40
+; SI-NEXT: v_mov_b32_e32 v11, s14
+; SI-NEXT: v_mov_b32_e32 v9, s12
+; SI-NEXT: v_mov_b32_e32 v7, s10
+; SI-NEXT: v_mov_b32_e32 v5, s8
+; SI-NEXT: v_mov_b32_e32 v1, s4
+; SI-NEXT: v_mov_b32_e32 v19, s98
+; SI-NEXT: v_mov_b32_e32 v18, s96
+; SI-NEXT: v_mov_b32_e32 v59, s86
+; SI-NEXT: v_mov_b32_e32 v58, s84
+; SI-NEXT: v_mov_b32_e32 v57, s82
+; SI-NEXT: v_mov_b32_e32 v56, s80
+; SI-NEXT: v_mov_b32_e32 v55, s70
+; SI-NEXT: v_mov_b32_e32 v46, s68
; SI-NEXT: v_readlane_b32 s10, v62, 34
; SI-NEXT: v_readlane_b32 s12, v62, 35
; SI-NEXT: v_readlane_b32 s14, v62, 36
@@ -110879,13 +111730,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readlane_b32 s40, v62, 44
; SI-NEXT: v_readlane_b32 s42, v62, 45
; SI-NEXT: v_readlane_b32 s44, v62, 46
+; SI-NEXT: v_readlane_b32 s56, v62, 49
; SI-NEXT: v_readlane_b32 s57, v62, 50
+; SI-NEXT: v_readlane_b32 s58, v62, 51
; SI-NEXT: v_readlane_b32 s59, v62, 52
+; SI-NEXT: v_readlane_b32 s60, v62, 53
; SI-NEXT: v_readlane_b32 s61, v62, 54
+; SI-NEXT: v_readlane_b32 s62, v62, 55
; SI-NEXT: v_readlane_b32 s63, v62, 56
+; SI-NEXT: v_readlane_b32 s72, v62, 57
; SI-NEXT: v_readlane_b32 s73, v62, 58
+; SI-NEXT: v_readlane_b32 s74, v62, 59
; SI-NEXT: v_readlane_b32 s75, v62, 60
+; SI-NEXT: v_readlane_b32 s76, v62, 61
; SI-NEXT: v_readlane_b32 s77, v62, 62
+; SI-NEXT: v_readlane_b32 s78, v62, 63
; SI-NEXT: v_readlane_b32 s79, v61, 0
; SI-NEXT: v_readlane_b32 s88, v61, 1
; SI-NEXT: v_readlane_b32 s89, v61, 2
@@ -110893,11 +111752,10 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readlane_b32 s91, v61, 4
; SI-NEXT: v_readlane_b32 s92, v61, 5
; SI-NEXT: v_readlane_b32 s93, v61, 6
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s78
-; SI-NEXT: v_readlane_b32 s78, v62, 63
+; SI-NEXT: v_mov_b32_e32 v2, s54
; SI-NEXT: v_readlane_b32 s94, v61, 7
; SI-NEXT: v_readlane_b32 s95, v61, 8
; SI-NEXT: v_readlane_b32 vcc_lo, v61, 9
@@ -110908,117 +111766,138 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readlane_b32 s35, v61, 14
; SI-NEXT: v_readlane_b32 s8, v61, 15
; SI-NEXT: v_readlane_b32 s36, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s76
-; SI-NEXT: v_readlane_b32 s76, v62, 61
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s74
-; SI-NEXT: v_readlane_b32 s74, v62, 59
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s72
-; SI-NEXT: v_readlane_b32 s72, v62, 57
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s62
-; SI-NEXT: v_readlane_b32 s62, v62, 55
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_readlane_b32 s6, v61, 17
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s60
-; SI-NEXT: v_readlane_b32 s60, v62, 53
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s52
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s58
-; SI-NEXT: v_readlane_b32 s58, v62, 51
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s50
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s56
-; SI-NEXT: v_readlane_b32 s56, v62, 49
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s48
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: v_readlane_b32 s6, v61, 17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 2
+; SI-NEXT: v_readlane_b32 s47, v62, 3
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s98
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 4
+; SI-NEXT: v_readlane_b32 s47, v62, 5
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s96
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 6
+; SI-NEXT: v_readlane_b32 s47, v62, 7
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s80
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 8
+; SI-NEXT: v_readlane_b32 s47, v62, 9
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s70
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 10
+; SI-NEXT: v_readlane_b32 s47, v62, 11
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s68
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 12
+; SI-NEXT: v_readlane_b32 s47, v62, 13
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s46
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 14
; SI-NEXT: v_readlane_b32 s47, v62, 15
-; SI-NEXT: v_mov_b32_e32 v56, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 16
; SI-NEXT: v_readlane_b32 s47, v62, 17
-; SI-NEXT: v_mov_b32_e32 v30, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 18
; SI-NEXT: v_readlane_b32 s47, v62, 19
-; SI-NEXT: v_mov_b32_e32 v8, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 20
; SI-NEXT: v_readlane_b32 s47, v62, 21
-; SI-NEXT: v_mov_b32_e32 v20, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 22
; SI-NEXT: v_readlane_b32 s47, v62, 23
-; SI-NEXT: v_mov_b32_e32 v33, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 24
; SI-NEXT: v_readlane_b32 s47, v62, 25
-; SI-NEXT: v_mov_b32_e32 v46, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 26
; SI-NEXT: v_readlane_b32 s47, v62, 27
-; SI-NEXT: v_mov_b32_e32 v19, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 28
; SI-NEXT: v_readlane_b32 s47, v62, 29
-; SI-NEXT: v_mov_b32_e32 v54, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 30
; SI-NEXT: v_readlane_b32 s47, v62, 31
-; SI-NEXT: v_mov_b32_e32 v34, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 32
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s52
; SI-NEXT: v_readlane_b32 s47, v62, 33
+; SI-NEXT: v_readlane_b32 s47, v62, 48
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s38
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 47
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v38, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 47
-; SI-NEXT: v_readlane_b32 s47, v62, 48
; SI-NEXT: .LBB73_6: ; %end
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v31
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v44
; SI-NEXT: s_and_b32 s4, s17, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v29
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v43
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s36, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v42
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
@@ -111032,206 +111911,134 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v38
; SI-NEXT: s_and_b32 s4, s19, 0xff
; SI-NEXT: s_lshl_b32 s6, s35, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v37
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v53
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s34, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v52
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s31, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s30, 8
-; SI-NEXT: s_lshl_b32 s8, vcc_lo, 24
-; SI-NEXT: v_readlane_b32 s30, v63, 34
-; SI-NEXT: v_readlane_b32 s31, v63, 35
-; SI-NEXT: v_readlane_b32 s99, v63, 33
-; SI-NEXT: v_readlane_b32 s98, v63, 32
-; SI-NEXT: v_readlane_b32 s97, v63, 31
-; SI-NEXT: v_readlane_b32 s96, v63, 30
-; SI-NEXT: v_readlane_b32 s87, v63, 29
-; SI-NEXT: v_readlane_b32 s86, v63, 28
-; SI-NEXT: v_readlane_b32 s85, v63, 27
-; SI-NEXT: v_readlane_b32 s84, v63, 26
-; SI-NEXT: v_readlane_b32 s83, v63, 25
-; SI-NEXT: v_readlane_b32 s82, v63, 24
-; SI-NEXT: v_readlane_b32 s81, v63, 23
-; SI-NEXT: v_readlane_b32 s80, v63, 22
-; SI-NEXT: v_readlane_b32 s71, v63, 21
-; SI-NEXT: v_readlane_b32 s70, v63, 20
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
-; SI-NEXT: v_readlane_b32 s65, v63, 15
-; SI-NEXT: v_readlane_b32 s64, v63, 14
-; SI-NEXT: v_readlane_b32 s55, v63, 13
-; SI-NEXT: v_readlane_b32 s54, v63, 12
-; SI-NEXT: v_readlane_b32 s53, v63, 11
-; SI-NEXT: v_readlane_b32 s52, v63, 10
-; SI-NEXT: v_readlane_b32 s51, v63, 9
-; SI-NEXT: v_readlane_b32 s50, v63, 8
-; SI-NEXT: v_readlane_b32 s49, v63, 7
-; SI-NEXT: v_readlane_b32 s48, v63, 6
-; SI-NEXT: v_readlane_b32 s39, v63, 5
-; SI-NEXT: v_readlane_b32 s38, v63, 4
-; SI-NEXT: v_readlane_b32 s37, v63, 3
-; SI-NEXT: v_readlane_b32 s36, v63, 2
-; SI-NEXT: v_readlane_b32 s35, v63, 1
-; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v34
; SI-NEXT: s_and_b32 s4, s21, 0xff
+; SI-NEXT: s_lshl_b32 s6, s30, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v47
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v37
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, vcc_lo, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s95, 8
-; SI-NEXT: s_lshl_b32 s8, s93, 24
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v31
; SI-NEXT: s_and_b32 s4, s23, 0xff
+; SI-NEXT: s_lshl_b32 s6, s95, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v30
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s94, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s93, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s92, 8
-; SI-NEXT: s_lshl_b32 s8, s90, 24
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v51
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v24
; SI-NEXT: s_and_b32 s4, s25, 0xff
+; SI-NEXT: s_lshl_b32 s6, s92, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v23
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s91, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v22
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s90, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s89, 8
-; SI-NEXT: s_lshl_b32 s8, s79, 24
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v21
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v16
; SI-NEXT: s_and_b32 s4, s27, 0xff
+; SI-NEXT: s_lshl_b32 s6, s89, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v19
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s88, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v18
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s79, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s78, 8
-; SI-NEXT: s_lshl_b32 s8, s76, 24
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v14
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v59
; SI-NEXT: s_and_b32 s4, s29, 0xff
+; SI-NEXT: s_lshl_b32 s6, s78, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v18
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v58
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s77, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v57
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s76, 24
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -111242,85 +112049,126 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v56
; SI-NEXT: s_and_b32 s4, s45, 0xff
; SI-NEXT: s_lshl_b32 s6, s75, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v55
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s74, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v46
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s73, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s72, 8
-; SI-NEXT: s_lshl_b32 s8, s62, 24
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v3
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v5
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v12
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s43, 0xff
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v48
+; SI-NEXT: s_lshl_b32 s6, s72, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s63, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v23
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: s_lshl_b32 s8, s62, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_lshl_b32 s6, s61, 8
+; SI-NEXT: s_lshl_b32 s8, s59, 24
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_readlane_b32 s30, v63, 34
+; SI-NEXT: v_readlane_b32 s31, v63, 35
+; SI-NEXT: v_readlane_b32 s99, v63, 33
+; SI-NEXT: v_readlane_b32 s98, v63, 32
+; SI-NEXT: v_readlane_b32 s97, v63, 31
+; SI-NEXT: v_readlane_b32 s96, v63, 30
+; SI-NEXT: v_readlane_b32 s87, v63, 29
+; SI-NEXT: v_readlane_b32 s86, v63, 28
+; SI-NEXT: v_readlane_b32 s85, v63, 27
+; SI-NEXT: v_readlane_b32 s84, v63, 26
+; SI-NEXT: v_readlane_b32 s83, v63, 25
+; SI-NEXT: v_readlane_b32 s82, v63, 24
+; SI-NEXT: v_readlane_b32 s81, v63, 23
+; SI-NEXT: v_readlane_b32 s80, v63, 22
+; SI-NEXT: v_readlane_b32 s71, v63, 21
+; SI-NEXT: v_readlane_b32 s70, v63, 20
+; SI-NEXT: v_readlane_b32 s69, v63, 19
+; SI-NEXT: v_readlane_b32 s68, v63, 18
+; SI-NEXT: v_readlane_b32 s67, v63, 17
+; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_readlane_b32 s64, v63, 14
+; SI-NEXT: v_readlane_b32 s55, v63, 13
+; SI-NEXT: v_readlane_b32 s54, v63, 12
+; SI-NEXT: v_readlane_b32 s53, v63, 11
+; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: v_readlane_b32 s51, v63, 9
+; SI-NEXT: v_readlane_b32 s50, v63, 8
+; SI-NEXT: v_readlane_b32 s49, v63, 7
+; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: v_readlane_b32 s39, v63, 5
+; SI-NEXT: v_readlane_b32 s38, v63, 4
+; SI-NEXT: v_readlane_b32 s37, v63, 3
+; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: v_readlane_b32 s35, v63, 1
+; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v14
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s41, 0xff
-; SI-NEXT: s_lshl_b32 s6, s61, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s60, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v59
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s59, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_lshl_b32 s6, s58, 8
; SI-NEXT: s_lshl_b32 s8, s56, 24
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v46
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v12
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
@@ -111328,138 +112176,190 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s15, 0xff
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v26
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v35
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_lshl_b32 s6, s47, 8
+; SI-NEXT: s_lshl_b32 s8, s44, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v10
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v39
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s13, 0xff
-; SI-NEXT: s_lshl_b32 s6, s47, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v55
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s46, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v58
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s44, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_lshl_b32 s6, s42, 8
+; SI-NEXT: s_lshl_b32 s8, s28, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v8
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v1
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s11, 0xff
-; SI-NEXT: s_lshl_b32 s6, s42, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v56
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s40, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v30
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s28, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_lshl_b32 s6, s26, 8
+; SI-NEXT: s_lshl_b32 s8, s22, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v8
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s9, 0xff
-; SI-NEXT: s_lshl_b32 s6, s26, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v20
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s24, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s22, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_lshl_b32 s6, s20, 8
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s6, s20, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s18, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v54
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s16, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_lshl_b32 s6, s10, 24
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s14, 8
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s12, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v38
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
@@ -111478,9 +112378,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -111489,8 +112389,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -111561,151 +112461,154 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB73_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 10
-; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 11
-; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 12
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 8
-; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 9
-; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 13
-; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 14
-; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 15
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 6
-; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 7
-; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 17
-; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 18
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 4
-; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 5
-; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 19
-; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 20
-; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 21
-; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 2
-; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 3
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 22
-; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: v_writelane_b32 v62, s46, 23
-; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: v_writelane_b32 v62, s46, 24
-; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 0
-; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 1
-; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: s_lshr_b32 s46, s13, 8
; VI-NEXT: v_writelane_b32 v62, s46, 25
-; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s46, s15, 24
; VI-NEXT: v_writelane_b32 v62, s46, 26
-; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: s_lshr_b32 s46, s15, 16
; VI-NEXT: v_writelane_b32 v62, s46, 27
-; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: s_lshr_b32 s46, s15, 8
; VI-NEXT: v_writelane_b32 v62, s46, 28
-; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: s_lshr_b32 s46, s41, 24
; VI-NEXT: v_writelane_b32 v62, s46, 29
-; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: s_lshr_b32 s46, s41, 16
; VI-NEXT: v_writelane_b32 v62, s46, 30
-; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: s_lshr_b32 s46, s41, 8
; VI-NEXT: v_writelane_b32 v62, s46, 31
-; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: s_lshr_b32 s46, s43, 24
; VI-NEXT: v_writelane_b32 v62, s46, 32
-; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: s_lshr_b32 s46, s43, 16
; VI-NEXT: v_writelane_b32 v62, s46, 33
-; VI-NEXT: s_lshr_b32 s46, s45, 24
+; VI-NEXT: s_lshr_b32 s46, s43, 8
; VI-NEXT: v_writelane_b32 v62, s46, 34
-; VI-NEXT: s_lshr_b32 s46, s45, 16
+; VI-NEXT: s_lshr_b32 s46, s45, 24
; VI-NEXT: v_writelane_b32 v62, s46, 35
-; VI-NEXT: s_lshr_b32 s46, s45, 8
+; VI-NEXT: s_lshr_b32 s46, s45, 16
; VI-NEXT: v_writelane_b32 v62, s46, 36
-; VI-NEXT: s_lshr_b32 s46, s29, 24
+; VI-NEXT: s_lshr_b32 s46, s45, 8
; VI-NEXT: v_writelane_b32 v62, s46, 37
-; VI-NEXT: s_lshr_b32 s46, s29, 16
+; VI-NEXT: s_lshr_b32 s46, s29, 24
; VI-NEXT: v_writelane_b32 v62, s46, 38
-; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: s_lshr_b32 s46, s29, 16
; VI-NEXT: v_writelane_b32 v62, s46, 39
-; VI-NEXT: s_lshr_b32 s46, s27, 24
+; VI-NEXT: s_lshr_b32 s46, s29, 8
; VI-NEXT: v_writelane_b32 v62, s46, 40
-; VI-NEXT: s_lshr_b32 s46, s27, 16
+; VI-NEXT: s_lshr_b32 s46, s27, 24
; VI-NEXT: v_writelane_b32 v62, s46, 41
-; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: s_lshr_b32 s46, s27, 16
; VI-NEXT: v_writelane_b32 v62, s46, 42
-; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: s_lshr_b32 s46, s27, 8
; VI-NEXT: v_writelane_b32 v62, s46, 43
-; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s25, 24
; VI-NEXT: v_writelane_b32 v62, s46, 44
-; VI-NEXT: s_lshr_b32 s46, s25, 8
+; VI-NEXT: s_lshr_b32 s46, s25, 16
; VI-NEXT: v_writelane_b32 v62, s46, 45
-; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: s_lshr_b32 s46, s25, 8
; VI-NEXT: v_writelane_b32 v62, s46, 46
-; VI-NEXT: s_lshr_b32 s46, s23, 16
+; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v62, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: v_writelane_b32 v62, s46, 47
-; VI-NEXT: s_lshr_b32 s46, s23, 8
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v62, s46, 48
-; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: s_lshr_b32 s46, s23, 8
; VI-NEXT: v_writelane_b32 v62, s46, 49
-; VI-NEXT: s_lshr_b32 s46, s21, 16
+; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: v_writelane_b32 v62, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s22, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s21, 24
; VI-NEXT: v_writelane_b32 v62, s46, 50
-; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: v_writelane_b32 v62, s46, 51
-; VI-NEXT: s_lshr_b32 s46, s19, 24
+; VI-NEXT: s_lshr_b32 s46, s21, 8
; VI-NEXT: v_writelane_b32 v62, s46, 52
-; VI-NEXT: s_lshr_b32 s46, s19, 16
+; VI-NEXT: s_lshr_b32 s46, s20, 16
+; VI-NEXT: v_writelane_b32 v62, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s20, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s19, 24
; VI-NEXT: v_writelane_b32 v62, s46, 53
-; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: s_lshr_b32 s46, s19, 16
; VI-NEXT: v_writelane_b32 v62, s46, 54
-; VI-NEXT: s_lshr_b32 s46, s17, 24
+; VI-NEXT: s_lshr_b32 s46, s19, 8
; VI-NEXT: v_writelane_b32 v62, s46, 55
-; VI-NEXT: s_lshr_b32 s46, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s18, 16
+; VI-NEXT: v_writelane_b32 v62, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s18, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s17, 24
; VI-NEXT: v_writelane_b32 v62, s46, 56
-; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: s_lshr_b32 s81, s14, 16
-; VI-NEXT: s_lshr_b32 s80, s14, 8
-; VI-NEXT: s_lshr_b32 s83, s40, 16
-; VI-NEXT: s_lshr_b32 s82, s40, 8
-; VI-NEXT: s_lshr_b32 s85, s42, 16
-; VI-NEXT: s_lshr_b32 s84, s42, 8
-; VI-NEXT: s_lshr_b32 s51, s44, 16
-; VI-NEXT: s_lshr_b32 s50, s44, 8
-; VI-NEXT: s_lshr_b32 s52, s28, 16
-; VI-NEXT: s_lshr_b32 s86, s28, 8
-; VI-NEXT: s_lshr_b32 s87, s26, 16
-; VI-NEXT: s_lshr_b32 s53, s26, 8
-; VI-NEXT: s_lshr_b32 s55, s24, 16
-; VI-NEXT: s_lshr_b32 s54, s24, 8
-; VI-NEXT: s_lshr_b32 s65, s22, 16
-; VI-NEXT: s_lshr_b32 s64, s22, 8
-; VI-NEXT: s_lshr_b32 s67, s20, 16
-; VI-NEXT: s_lshr_b32 s66, s20, 8
-; VI-NEXT: s_lshr_b32 s69, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s18, 8
+; VI-NEXT: s_lshr_b32 s46, s17, 16
; VI-NEXT: v_writelane_b32 v62, s46, 57
-; VI-NEXT: s_lshr_b32 s71, s16, 16
-; VI-NEXT: s_lshr_b32 s70, s16, 8
-; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
-; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
-; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
-; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
-; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24
-; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
+; VI-NEXT: s_lshr_b32 s46, s17, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 58
+; VI-NEXT: s_lshr_b32 s46, s16, 16
+; VI-NEXT: v_writelane_b32 v62, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s16, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 13
+; VI-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v62, s74, 10
+; VI-NEXT: v_writelane_b32 v62, s75, 11
+; VI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v62, s76, 8
+; VI-NEXT: v_writelane_b32 v62, s77, 9
+; VI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v62, s76, 6
+; VI-NEXT: v_writelane_b32 v62, s77, 7
+; VI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v62, s76, 4
+; VI-NEXT: v_writelane_b32 v62, s77, 5
+; VI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v62, s76, 2
+; VI-NEXT: v_writelane_b32 v62, s77, 3
+; VI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; VI-NEXT: s_lshr_b32 s57, s9, 24
+; VI-NEXT: s_lshr_b32 s73, s9, 16
+; VI-NEXT: v_writelane_b32 v62, s76, 0
+; VI-NEXT: s_lshr_b32 s85, s5, 24
+; VI-NEXT: s_lshr_b32 s60, s5, 16
+; VI-NEXT: s_lshr_b32 s84, s5, 8
+; VI-NEXT: s_lshr_b32 s72, s4, 16
+; VI-NEXT: s_lshr_b32 s87, s4, 8
+; VI-NEXT: s_lshr_b32 s82, s7, 24
+; VI-NEXT: s_lshr_b32 s81, s7, 16
+; VI-NEXT: s_lshr_b32 s80, s7, 8
+; VI-NEXT: s_lshr_b32 s86, s6, 16
+; VI-NEXT: s_lshr_b32 s63, s6, 8
+; VI-NEXT: s_lshr_b32 s67, s9, 8
+; VI-NEXT: s_lshr_b32 s62, s8, 16
+; VI-NEXT: s_lshr_b32 s61, s8, 8
+; VI-NEXT: s_lshr_b32 s64, s11, 24
+; VI-NEXT: s_lshr_b32 s54, s11, 16
+; VI-NEXT: s_lshr_b32 s52, s11, 8
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s10, 8
+; VI-NEXT: s_lshr_b32 s83, s12, 16
+; VI-NEXT: s_lshr_b32 s56, s12, 8
+; VI-NEXT: s_lshr_b32 s71, s14, 16
+; VI-NEXT: s_lshr_b32 s70, s14, 8
+; VI-NEXT: s_lshr_b32 s69, s40, 16
+; VI-NEXT: s_lshr_b32 s68, s40, 8
+; VI-NEXT: s_lshr_b32 s66, s42, 16
+; VI-NEXT: s_lshr_b32 s65, s42, 8
+; VI-NEXT: s_lshr_b32 s55, s44, 16
+; VI-NEXT: s_lshr_b32 s53, s44, 8
+; VI-NEXT: s_lshr_b32 s51, s28, 16
+; VI-NEXT: s_lshr_b32 s50, s28, 8
+; VI-NEXT: s_lshr_b32 s47, s26, 16
+; VI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
+; VI-NEXT: s_mov_b32 s46, s57
+; VI-NEXT: s_mov_b32 s57, s73
+; VI-NEXT: v_writelane_b32 v62, s77, 1
; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
@@ -111720,31 +112623,49 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: .LBB73_2:
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: v_writelane_b32 v62, s74, 0
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 1
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr51
+; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr66
; VI-NEXT: ; implicit-def: $sgpr68
; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr67
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr70
+; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr83
+; VI-NEXT: ; implicit-def: $sgpr58
+; VI-NEXT: ; implicit-def: $sgpr59
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr87
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr61
+; VI-NEXT: ; implicit-def: $sgpr62
+; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr57
+; VI-NEXT: ; implicit-def: $sgpr63
; VI-NEXT: ; implicit-def: $sgpr86
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr83
; VI-NEXT: ; implicit-def: $sgpr80
; VI-NEXT: ; implicit-def: $sgpr81
+; VI-NEXT: ; implicit-def: $sgpr82
+; VI-NEXT: ; implicit-def: $sgpr87
+; VI-NEXT: ; implicit-def: $sgpr72
+; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: ; implicit-def: $sgpr60
+; VI-NEXT: ; implicit-def: $sgpr85
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr34
@@ -111754,68 +112675,51 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s74, 2
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s74, 4
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 5
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s74, 6
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 7
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s74, 8
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 9
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s74, 10
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s75, 11
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -111875,8 +112779,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: .LBB73_3: ; %Flow
; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
+; VI-NEXT: s_cselect_b32 s73, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s73, 1
; VI-NEXT: s_cbranch_scc1 .LBB73_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
@@ -111897,86 +112801,90 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
; VI-NEXT: v_add_f64 v[27:28], s[26:27], 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
; VI-NEXT: v_add_f64 v[31:32], s[24:25], 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[7:8]
; VI-NEXT: v_add_f64 v[35:36], s[22:23], 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
; VI-NEXT: v_add_f64 v[37:38], s[20:21], 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
; VI-NEXT: v_add_f64 v[48:49], s[18:19], 1.0
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_add_f64 v[50:51], s[16:17], 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v20
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[23:24]
-; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v24
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[27:28]
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v28
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[27:28]
-; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[31:32]
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v20
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[35:36]
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v28
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[37:38]
-; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v32
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v36
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[48:49]
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v32
+; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v36
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v12
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v12
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v11
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v2
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v1
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v4
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v4
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v3
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v3
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v6
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v6
@@ -111984,9 +112892,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v6
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v5
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v5
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v8
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v8
@@ -111994,9 +112902,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v7
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v7
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v10
@@ -112004,7 +112912,7 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v9
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
@@ -112014,263 +112922,305 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v13
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v20
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v20
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v19
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v19
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v24
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v24
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v23
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v23
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v28
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v28
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v27
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v27
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v31
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v31
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v31
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v32
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v36
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v36
-; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v36
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v35
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v35
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v35
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v38
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v38
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v38
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v37
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v37
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v49
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v49
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v49
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v48
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v38
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v37
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v49
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v49
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v49
+; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v48
; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v48
; VI-NEXT: v_lshrrev_b32_e32 v29, 24, v51
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v51
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v51
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v50
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v51
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v51
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v50
; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v50
; VI-NEXT: s_branch .LBB73_6
; VI-NEXT: .LBB73_5:
-; VI-NEXT: v_mov_b32_e32 v56, s66
-; VI-NEXT: v_mov_b32_e32 v55, s36
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s34
-; VI-NEXT: v_mov_b32_e32 v17, s55
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s54
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s87
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s53
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s52
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s86
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s51
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s50
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s85
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s84
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s83
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s82
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s81
; VI-NEXT: v_mov_b32_e32 v11, s4
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s80
-; VI-NEXT: v_readlane_b32 s4, v62, 0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 1
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 2
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 3
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 4
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 5
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 6
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 7
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 8
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 9
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 10
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 11
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 12
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 13
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v59, s4
; VI-NEXT: v_readlane_b32 s4, v62, 14
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v25, s4
; VI-NEXT: v_readlane_b32 s4, v62, 15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s30
+; VI-NEXT: v_mov_b32_e32 v57, s4
; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v55, s4
; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v47, s4
; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v30, s4
; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s47
; VI-NEXT: v_readlane_b32 s4, v62, 22
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s51
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s50
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s55
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s53
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s66
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s65
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s69
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s68
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s71
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s70
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s83
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s56
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s59
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s58
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s62
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s61
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s86
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s63
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s72
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s87
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s85
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s60
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s84
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s82
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s81
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s80
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s46
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s57
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s67
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s64
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s54
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s52
+; VI-NEXT: v_readlane_b32 s4, v62, 23
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 24
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 25
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: v_mov_b32_e32 v53, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: v_mov_b32_e32 v47, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v34, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: v_mov_b32_e32 v25, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v56, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, vcc_lo
-; VI-NEXT: v_mov_b32_e32 v52, s4
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: v_mov_b32_e32 v30, s4
+; VI-NEXT: v_mov_b32_e32 v52, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: v_mov_b32_e32 v34, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 45
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 45
+; VI-NEXT: v_mov_b32_e32 v26, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: v_mov_b32_e32 v21, s4
+; VI-NEXT: v_mov_b32_e32 v61, s4
; VI-NEXT: v_readlane_b32 s4, v62, 47
; VI-NEXT: v_mov_b32_e32 v41, s4
+; VI-NEXT: v_mov_b32_e32 v40, s30
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, vcc_lo
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, s90
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, s88
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, s78
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, s76
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: v_mov_b32_e32 v22, s4
+; VI-NEXT: v_mov_b32_e32 v21, s4
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: v_mov_b32_e32 v42, s4
+; VI-NEXT: v_mov_b32_e32 v45, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: v_mov_b32_e32 v60, s4
+; VI-NEXT: v_mov_b32_e32 v42, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v58, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
-; VI-NEXT: v_mov_b32_e32 v61, s4
+; VI-NEXT: v_mov_b32_e32 v33, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: v_mov_b32_e32 v43, s4
+; VI-NEXT: v_mov_b32_e32 v60, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: v_mov_b32_e32 v45, s4
+; VI-NEXT: v_mov_b32_e32 v44, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: v_mov_b32_e32 v29, s4
+; VI-NEXT: v_mov_b32_e32 v22, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: v_mov_b32_e32 v44, s4
+; VI-NEXT: v_mov_b32_e32 v29, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 58
; VI-NEXT: v_mov_b32_e32 v12, s5
+; VI-NEXT: v_mov_b32_e32 v46, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 0
+; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 1
+; VI-NEXT: v_readlane_b32 s4, v62, 2
+; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 3
+; VI-NEXT: v_readlane_b32 s4, v62, 4
+; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 5
+; VI-NEXT: v_readlane_b32 s4, v62, 6
+; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 7
+; VI-NEXT: v_readlane_b32 s4, v62, 8
+; VI-NEXT: v_mov_b32_e32 v53, s38
+; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v53, s36
+; VI-NEXT: v_mov_b32_e32 v40, s74
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 9
+; VI-NEXT: v_readlane_b32 s4, v62, 10
+; VI-NEXT: v_mov_b32_e32 v53, s34
+; VI-NEXT: v_mov_b32_e32 v40, s4
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_mov_b32_e32 v3, s8
@@ -112301,75 +113251,32 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_mov_b32_e32 v49, s19
; VI-NEXT: v_mov_b32_e32 v50, s16
; VI-NEXT: v_mov_b32_e32 v51, s17
-; VI-NEXT: v_mov_b32_e32 v58, s71
-; VI-NEXT: v_mov_b32_e32 v59, s70
-; VI-NEXT: v_mov_b32_e32 v40, s69
-; VI-NEXT: v_mov_b32_e32 v57, s68
-; VI-NEXT: v_mov_b32_e32 v39, s67
-; VI-NEXT: v_mov_b32_e32 v26, s65
-; VI-NEXT: v_mov_b32_e32 v54, s64
-; VI-NEXT: v_mov_b32_e32 v33, s4
-; VI-NEXT: v_mov_b32_e32 v46, s38
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s90
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s88
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s78
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s76
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s74
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s72
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s62
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s60
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s58
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s56
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v55, s46
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 11
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: .LBB73_6: ; %end
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v58, v46, s4
-; VI-NEXT: v_perm_b32 v49, v49, v45, s4
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v36, v36, v22, s4
-; VI-NEXT: v_perm_b32 v17, v38, v17, s4
-; VI-NEXT: v_perm_b32 v18, v32, v18, s4
+; VI-NEXT: v_perm_b32 v51, v51, v46, s4
+; VI-NEXT: v_perm_b32 v37, v37, v47, s4
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v33, v38, v33, s4
+; VI-NEXT: v_perm_b32 v22, v49, v22, s4
; VI-NEXT: v_perm_b32 v28, v28, v52, s4
-; VI-NEXT: v_perm_b32 v35, v35, v54, s4
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: v_perm_b32 v50, v50, v59, s4
-; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v29, v44, v29, s4
-; VI-NEXT: v_perm_b32 v33, v51, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_e32 v29, v33, v29
+; VI-NEXT: v_perm_b32 v30, v35, v30, s4
+; VI-NEXT: v_perm_b32 v35, v36, v45, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v20, v20, v34, s4
+; VI-NEXT: v_perm_b32 v18, v18, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_e32 v18, v51, v18
; VI-NEXT: v_perm_b32 v48, v48, v57, s4
-; VI-NEXT: v_perm_b32 v37, v37, v56, s4
-; VI-NEXT: v_perm_b32 v16, v16, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v55
-; VI-NEXT: v_or_b32_e32 v50, v50, v53
-; VI-NEXT: v_perm_b32 v20, v20, v47, s4
+; VI-NEXT: v_perm_b32 v50, v50, v59, s4
+; VI-NEXT: v_perm_b32 v32, v32, v61, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -112402,125 +113309,135 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_perm_b32 v39, v39, v45, s4
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v40, v43, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v38, v39, v46, s4
+; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v34, v15, v34, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v25, v25, v53, s4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v27, v27, v39, s4
; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_perm_b32 v51, v40, v58, s4
+; VI-NEXT: v_perm_b32 v17, v17, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v25, v15, v25, s4
+; VI-NEXT: v_perm_b32 v16, v16, v15, s4
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v26, v26, v45, s4
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v22, v45, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v31, v22, s4
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v32, v22, v45, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v22, s4
+; VI-NEXT: v_perm_b32 v49, v55, v53, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v53, v24, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v55, 16, v40
+; VI-NEXT: v_or_b32_e32 v50, v50, v55
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v39, v39, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v52, v23, v52, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v31, v36, s4
; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v22, v45, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v23, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v23, v22, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v17, v31, v17
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v23, v24, v23, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v36, v36, v45, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v19, v23, s4
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v19, v24, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v45, s4
+; VI-NEXT: v_perm_b32 v24, v24, v45, s4
; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
-; VI-NEXT: v_or_b32_e32 v29, v48, v29
-; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v29, v43, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_e32 v29, v49, v29
-; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v39
-; VI-NEXT: v_or_b32_e32 v29, v37, v29
-; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v29, v60, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_e32 v17, v17, v29
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v26
-; VI-NEXT: v_or_b32_e32 v17, v35, v17
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v17, v41, v21, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_or_b32_e32 v17, v36, v17
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v38
-; VI-NEXT: v_or_b32_e32 v17, v31, v17
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v25
+; VI-NEXT: v_or_b32_e32 v18, v48, v18
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v18, v44, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_e32 v18, v22, v18
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v49
+; VI-NEXT: v_or_b32_e32 v18, v37, v18
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v18, v58, v42, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_e32 v18, v33, v18
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
+; VI-NEXT: v_or_b32_e32 v18, v30, v18
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v18, v21, v41, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_e32 v18, v35, v18
+; VI-NEXT: buffer_store_dword v50, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:28
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: v_perm_b32 v17, v34, v30, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_perm_b32 v15, v15, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v26, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
+; VI-NEXT: v_or_b32_e32 v17, v32, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v36
; VI-NEXT: v_or_b32_e32 v17, v27, v17
-; VI-NEXT: buffer_store_dword v50, v0, s[0:3], 0 offen
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(13)
-; VI-NEXT: v_perm_b32 v15, v15, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v18, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v17, v28, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v52
-; VI-NEXT: v_or_b32_e32 v17, v54, v17
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v39
+; VI-NEXT: v_or_b32_e32 v17, v52, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v18, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_or_b32_e32 v17, v24, v17
+; VI-NEXT: v_or_b32_e32 v17, v53, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v22
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v23
; VI-NEXT: v_or_b32_e32 v17, v19, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v18, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v17, v20, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v23
-; VI-NEXT: v_or_b32_e32 v17, v25, v17
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v24
+; VI-NEXT: v_or_b32_e32 v17, v34, v17
; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v18, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
@@ -112546,9 +113463,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_perm_b32 v9, v9, v13, s4
; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v13, v14, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v14, v13, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; VI-NEXT: v_or_b32_e32 v9, v9, v13
; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
@@ -112562,14 +113479,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v7, v9, s4
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v9, v9, v13, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v9, v10, v9, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:88
@@ -112583,14 +113500,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v5, v7, s4
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v7, v7, v8, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v7, v8, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
@@ -112604,31 +113521,31 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v3, v5, s4
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v5, v5, v6, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v5, v6, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v4, v5, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -112636,11 +113553,11 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -112656,9 +113573,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
@@ -112681,8 +113598,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -112691,8 +113608,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -112767,140 +113684,143 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB73_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 2
-; GFX9-NEXT: s_lshr_b32 s46, s5, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 3
-; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 4
-; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 0
-; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 1
-; GFX9-NEXT: s_lshr_b32 s46, s7, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 5
-; GFX9-NEXT: s_lshr_b32 s46, s7, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 6
-; GFX9-NEXT: s_lshr_b32 s46, s7, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 7
-; GFX9-NEXT: s_lshr_b32 s46, s9, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 8
-; GFX9-NEXT: s_lshr_b32 s46, s9, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 9
-; GFX9-NEXT: s_lshr_b32 s46, s9, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 10
-; GFX9-NEXT: s_lshr_b32 s46, s11, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 11
-; GFX9-NEXT: s_lshr_b32 s46, s11, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 12
-; GFX9-NEXT: s_lshr_b32 s46, s11, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 14
+; GFX9-NEXT: v_writelane_b32 v62, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s13, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 15
+; GFX9-NEXT: v_writelane_b32 v62, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s15, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 17
+; GFX9-NEXT: v_writelane_b32 v62, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s15, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 18
+; GFX9-NEXT: v_writelane_b32 v62, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s15, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 19
+; GFX9-NEXT: v_writelane_b32 v62, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s41, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 20
+; GFX9-NEXT: v_writelane_b32 v62, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s41, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 21
+; GFX9-NEXT: v_writelane_b32 v62, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s41, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 22
+; GFX9-NEXT: v_writelane_b32 v62, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s43, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 23
+; GFX9-NEXT: v_writelane_b32 v62, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s43, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s43, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 25
+; GFX9-NEXT: v_writelane_b32 v62, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s45, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 26
+; GFX9-NEXT: v_writelane_b32 v62, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s45, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 27
+; GFX9-NEXT: v_writelane_b32 v62, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s45, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 28
+; GFX9-NEXT: v_writelane_b32 v62, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s29, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 29
+; GFX9-NEXT: v_writelane_b32 v62, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s29, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 30
+; GFX9-NEXT: v_writelane_b32 v62, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s29, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 31
+; GFX9-NEXT: v_writelane_b32 v62, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s27, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 32
+; GFX9-NEXT: v_writelane_b32 v62, s46, 34
; GFX9-NEXT: s_lshr_b32 s46, s27, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 33
+; GFX9-NEXT: v_writelane_b32 v62, s46, 35
; GFX9-NEXT: s_lshr_b32 s46, s27, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 34
+; GFX9-NEXT: v_writelane_b32 v62, s46, 36
; GFX9-NEXT: s_lshr_b32 s46, s25, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 35
+; GFX9-NEXT: v_writelane_b32 v62, s46, 37
; GFX9-NEXT: s_lshr_b32 s46, s25, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 36
+; GFX9-NEXT: v_writelane_b32 v62, s46, 38
; GFX9-NEXT: s_lshr_b32 s46, s25, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 37
+; GFX9-NEXT: v_writelane_b32 v62, s46, 39
; GFX9-NEXT: s_lshr_b32 s46, s23, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 38
+; GFX9-NEXT: v_writelane_b32 v62, s46, 40
; GFX9-NEXT: s_lshr_b32 s46, s23, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 39
+; GFX9-NEXT: v_writelane_b32 v62, s46, 41
; GFX9-NEXT: s_lshr_b32 s46, s23, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 40
+; GFX9-NEXT: v_writelane_b32 v62, s46, 42
+; GFX9-NEXT: s_lshr_b32 s46, s22, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 14
+; GFX9-NEXT: s_lshr_b32 s46, s22, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s21, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 41
+; GFX9-NEXT: v_writelane_b32 v62, s46, 43
; GFX9-NEXT: s_lshr_b32 s46, s21, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 42
+; GFX9-NEXT: v_writelane_b32 v62, s46, 44
; GFX9-NEXT: s_lshr_b32 s46, s21, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 43
+; GFX9-NEXT: v_writelane_b32 v62, s46, 45
+; GFX9-NEXT: s_lshr_b32 s46, s20, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 12
+; GFX9-NEXT: s_lshr_b32 s46, s20, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s19, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 44
+; GFX9-NEXT: v_writelane_b32 v62, s46, 46
; GFX9-NEXT: s_lshr_b32 s46, s19, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 45
+; GFX9-NEXT: v_writelane_b32 v62, s46, 47
; GFX9-NEXT: s_lshr_b32 s46, s19, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 46
+; GFX9-NEXT: v_writelane_b32 v62, s46, 48
+; GFX9-NEXT: s_lshr_b32 s46, s18, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 10
+; GFX9-NEXT: s_lshr_b32 s46, s18, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 47
+; GFX9-NEXT: v_writelane_b32 v62, s46, 49
; GFX9-NEXT: s_lshr_b32 s46, s17, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 48
+; GFX9-NEXT: v_writelane_b32 v62, s46, 50
; GFX9-NEXT: s_lshr_b32 s46, s17, 8
-; GFX9-NEXT: s_lshr_b32 s83, s6, 16
-; GFX9-NEXT: s_lshr_b32 s82, s6, 8
-; GFX9-NEXT: s_lshr_b32 s85, s8, 16
-; GFX9-NEXT: s_lshr_b32 s84, s8, 8
-; GFX9-NEXT: s_lshr_b32 s87, s10, 16
-; GFX9-NEXT: s_lshr_b32 s86, s10, 8
-; GFX9-NEXT: s_lshr_b32 s97, s12, 16
-; GFX9-NEXT: s_lshr_b32 s96, s12, 8
-; GFX9-NEXT: s_lshr_b32 s99, s14, 16
-; GFX9-NEXT: s_lshr_b32 s98, s14, 8
-; GFX9-NEXT: s_lshr_b32 s39, s40, 16
-; GFX9-NEXT: s_lshr_b32 s38, s40, 8
-; GFX9-NEXT: s_lshr_b32 s49, s42, 16
-; GFX9-NEXT: s_lshr_b32 s48, s42, 8
-; GFX9-NEXT: s_lshr_b32 s51, s44, 16
-; GFX9-NEXT: s_lshr_b32 s50, s44, 8
-; GFX9-NEXT: s_lshr_b32 s53, s28, 16
-; GFX9-NEXT: s_lshr_b32 s52, s28, 8
-; GFX9-NEXT: s_lshr_b32 s55, s26, 16
-; GFX9-NEXT: s_lshr_b32 s54, s26, 8
-; GFX9-NEXT: s_lshr_b32 s65, s24, 16
-; GFX9-NEXT: s_lshr_b32 s64, s24, 8
-; GFX9-NEXT: s_lshr_b32 s67, s22, 16
-; GFX9-NEXT: s_lshr_b32 s66, s22, 8
-; GFX9-NEXT: s_lshr_b32 s69, s20, 16
-; GFX9-NEXT: s_lshr_b32 s68, s20, 8
-; GFX9-NEXT: s_lshr_b32 s71, s18, 16
-; GFX9-NEXT: s_lshr_b32 s70, s18, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 49
-; GFX9-NEXT: s_lshr_b32 s81, s16, 16
-; GFX9-NEXT: s_lshr_b32 s80, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
-; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 51
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 8
+; GFX9-NEXT: s_lshr_b32 s46, s16, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 9
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v62, s62, 6
+; GFX9-NEXT: v_writelane_b32 v62, s63, 7
+; GFX9-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
+; GFX9-NEXT: s_lshr_b32 s60, s10, 8
+; GFX9-NEXT: v_writelane_b32 v62, s62, 4
+; GFX9-NEXT: v_writelane_b32 v62, s63, 5
+; GFX9-NEXT: s_mov_b32 s46, s60
+; GFX9-NEXT: s_lshr_b64 s[60:61], s[8:9], 24
+; GFX9-NEXT: v_writelane_b32 v62, s60, 2
+; GFX9-NEXT: v_writelane_b32 v62, s61, 3
; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
+; GFX9-NEXT: v_writelane_b32 v62, s60, 0
+; GFX9-NEXT: s_lshr_b32 s53, s5, 24
+; GFX9-NEXT: s_lshr_b32 s52, s5, 16
+; GFX9-NEXT: s_lshr_b32 s51, s5, 8
+; GFX9-NEXT: s_lshr_b32 s64, s4, 16
+; GFX9-NEXT: s_lshr_b32 s59, s4, 8
+; GFX9-NEXT: s_lshr_b32 s48, s7, 24
+; GFX9-NEXT: s_lshr_b32 s39, s7, 16
+; GFX9-NEXT: s_lshr_b32 s47, s7, 8
+; GFX9-NEXT: s_lshr_b32 s58, s6, 16
+; GFX9-NEXT: s_lshr_b32 s55, s6, 8
+; GFX9-NEXT: s_lshr_b32 s98, s9, 24
+; GFX9-NEXT: s_lshr_b32 s96, s9, 16
+; GFX9-NEXT: s_lshr_b32 s86, s9, 8
+; GFX9-NEXT: s_lshr_b32 s54, s8, 16
+; GFX9-NEXT: s_lshr_b32 s56, s8, 8
+; GFX9-NEXT: s_lshr_b32 s83, s11, 24
+; GFX9-NEXT: s_lshr_b32 s81, s11, 16
+; GFX9-NEXT: s_lshr_b32 s71, s11, 8
+; GFX9-NEXT: s_lshr_b32 s50, s10, 16
+; GFX9-NEXT: s_lshr_b32 s49, s12, 16
+; GFX9-NEXT: s_lshr_b32 s38, s12, 8
+; GFX9-NEXT: s_lshr_b32 s99, s14, 16
+; GFX9-NEXT: s_lshr_b32 s57, s14, 8
+; GFX9-NEXT: s_lshr_b32 s97, s40, 16
+; GFX9-NEXT: s_lshr_b32 s87, s40, 8
+; GFX9-NEXT: s_lshr_b32 s85, s42, 16
+; GFX9-NEXT: s_lshr_b32 s84, s42, 8
+; GFX9-NEXT: s_lshr_b32 s82, s44, 16
+; GFX9-NEXT: s_lshr_b32 s80, s44, 8
+; GFX9-NEXT: s_lshr_b32 s70, s28, 16
+; GFX9-NEXT: s_lshr_b32 s69, s28, 8
+; GFX9-NEXT: s_lshr_b32 s68, s26, 16
+; GFX9-NEXT: s_lshr_b32 s67, s26, 8
+; GFX9-NEXT: s_lshr_b32 s66, s24, 16
+; GFX9-NEXT: s_lshr_b32 s65, s24, 8
+; GFX9-NEXT: v_writelane_b32 v62, s61, 1
; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24
; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
@@ -112918,39 +113838,52 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: .LBB73_2:
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr81
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: v_writelane_b32 v62, s60, 0
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s61, 1
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr60
+; GFX9-NEXT: ; implicit-def: $sgpr65
; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr65
+; GFX9-NEXT: ; implicit-def: $sgpr68
+; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr70
+; GFX9-NEXT: ; implicit-def: $sgpr80
+; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr84
+; GFX9-NEXT: ; implicit-def: $sgpr85
+; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr97
+; GFX9-NEXT: ; implicit-def: $sgpr57
+; GFX9-NEXT: ; implicit-def: $sgpr99
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr71
+; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr86
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr98
; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr58
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr59
+; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr52
; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr51
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr84
-; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr83
; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $vcc_lo
@@ -112963,41 +113896,30 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr60
-; GFX9-NEXT: ; implicit-def: $sgpr58
-; GFX9-NEXT: ; implicit-def: $sgpr56
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s60, 2
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s61, 3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s60, 4
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s61, 5
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s60, 6
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s61, 7
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
@@ -113065,8 +113987,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB73_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
+; GFX9-NEXT: s_cselect_b32 s61, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s61, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB73_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
@@ -113076,381 +113998,375 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: v_add_f64 v[7:8], s[12:13], 1.0
; GFX9-NEXT: v_add_f64 v[9:10], s[14:15], 1.0
; GFX9-NEXT: v_add_f64 v[13:14], s[40:41], 1.0
-; GFX9-NEXT: v_add_f64 v[17:18], s[42:43], 1.0
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
-; GFX9-NEXT: v_add_f64 v[21:22], s[44:45], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX9-NEXT: v_add_f64 v[23:24], s[28:29], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
+; GFX9-NEXT: v_add_f64 v[15:16], s[42:43], 1.0
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX9-NEXT: v_add_f64 v[20:21], s[44:45], 1.0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
+; GFX9-NEXT: v_add_f64 v[24:25], s[28:29], 1.0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
; GFX9-NEXT: v_add_f64 v[28:29], s[26:27], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
; GFX9-NEXT: v_add_f64 v[32:33], s[24:25], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[7:8]
; GFX9-NEXT: v_add_f64 v[34:35], s[22:23], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
; GFX9-NEXT: v_add_f64 v[36:37], s[20:21], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
; GFX9-NEXT: v_add_f64 v[38:39], s[18:19], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_add_f64 v[48:49], s[16:17], 1.0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22]
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[20:21]
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v20
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24]
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[24:25]
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v25
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[28:29]
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[28:29]
+; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[32:33]
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v29
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[32:33]
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v25
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[34:35]
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v28
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[34:35]
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v29
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[36:37]
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v33
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[36:37]
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v33
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[38:39]
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[38:39]
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v35
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49]
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v35
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v5
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v5
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v9
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v21
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v21
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v29
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v29
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v28
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v33
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v32
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v35
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v12
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v12
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v11
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v14
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v13
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v21
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v21
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v20
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v25
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v24
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v24
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v29
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v29
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v33
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v33
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v21
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v34
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 24, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v48
; GFX9-NEXT: s_branch .LBB73_6
; GFX9-NEXT: .LBB73_5:
-; GFX9-NEXT: v_mov_b32_e32 v15, s66
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s65
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s64
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s54
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s52
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s51
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s50
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s49
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s48
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s39
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s38
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s99
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s98
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s97
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s96
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s87
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s86
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s85
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s84
+; GFX9-NEXT: v_mov_b32_e32 v17, s66
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s65
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s68
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s67
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s70
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s69
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s80
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s85
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s84
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s97
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s87
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s99
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s57
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s38
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s50
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s46
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s54
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s56
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s58
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s55
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s64
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s59
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s53
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s52
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s51
; GFX9-NEXT: v_mov_b32_e32 v11, s4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s83
-; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s82
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s48
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s39
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s47
+; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s98
+; GFX9-NEXT: v_mov_b32_e32 v26, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s96
+; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s86
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s83
+; GFX9-NEXT: v_mov_b32_e32 v27, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s81
+; GFX9-NEXT: v_mov_b32_e32 v31, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s71
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
-; GFX9-NEXT: v_mov_b32_e32 v58, s4
-; GFX9-NEXT: v_mov_b32_e32 v57, s30
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 32
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 33
+; GFX9-NEXT: v_mov_b32_e32 v57, s4
+; GFX9-NEXT: v_mov_b32_e32 v56, s94
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v57, vcc_lo
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v53, s34
+; GFX9-NEXT: v_mov_b32_e32 v52, s30
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v57, s94
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v56, s92
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v57, s92
; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v52, vcc_lo
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v52, s34
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v57, s90
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v56, s90
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v57, v51
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v56, v51
; GFX9-NEXT: v_mov_b32_e32 v51, s88
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s78
; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
@@ -113460,73 +114376,79 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s74
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s72
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s62
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s60
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s58
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s56
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: v_mov_b32_e32 v50, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: v_mov_b32_e32 v31, s4
+; GFX9-NEXT: v_mov_b32_e32 v50, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: v_mov_b32_e32 v47, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: v_mov_b32_e32 v30, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: v_mov_b32_e32 v25, s4
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v19, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: v_mov_b32_e32 v44, s4
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: v_mov_b32_e32 v26, s4
+; GFX9-NEXT: v_mov_b32_e32 v23, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: v_mov_b32_e32 v61, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: v_mov_b32_e32 v51, s46
; GFX9-NEXT: v_mov_b32_e32 v43, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 48
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v30, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 50
+; GFX9-NEXT: v_mov_b32_e32 v61, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 51
; GFX9-NEXT: v_mov_b32_e32 v12, s5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 0
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readlane_b32 s5, v62, 1
+; GFX9-NEXT: v_readlane_b32 s4, v62, 2
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readlane_b32 s5, v62, 3
+; GFX9-NEXT: v_readlane_b32 s4, v62, 4
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readlane_b32 s5, v62, 5
+; GFX9-NEXT: v_readlane_b32 s4, v62, 6
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s6
; GFX9-NEXT: v_mov_b32_e32 v2, s7
; GFX9-NEXT: v_mov_b32_e32 v3, s8
@@ -113539,12 +114461,12 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v10, s15
; GFX9-NEXT: v_mov_b32_e32 v13, s40
; GFX9-NEXT: v_mov_b32_e32 v14, s41
-; GFX9-NEXT: v_mov_b32_e32 v17, s42
-; GFX9-NEXT: v_mov_b32_e32 v18, s43
-; GFX9-NEXT: v_mov_b32_e32 v21, s44
-; GFX9-NEXT: v_mov_b32_e32 v22, s45
-; GFX9-NEXT: v_mov_b32_e32 v23, s28
-; GFX9-NEXT: v_mov_b32_e32 v24, s29
+; GFX9-NEXT: v_mov_b32_e32 v15, s42
+; GFX9-NEXT: v_mov_b32_e32 v16, s43
+; GFX9-NEXT: v_mov_b32_e32 v20, s44
+; GFX9-NEXT: v_mov_b32_e32 v21, s45
+; GFX9-NEXT: v_mov_b32_e32 v24, s28
+; GFX9-NEXT: v_mov_b32_e32 v25, s29
; GFX9-NEXT: v_mov_b32_e32 v28, s26
; GFX9-NEXT: v_mov_b32_e32 v29, s27
; GFX9-NEXT: v_mov_b32_e32 v32, s24
@@ -113557,38 +114479,33 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v39, s19
; GFX9-NEXT: v_mov_b32_e32 v48, s16
; GFX9-NEXT: v_mov_b32_e32 v49, s17
-; GFX9-NEXT: v_mov_b32_e32 v59, s81
-; GFX9-NEXT: v_mov_b32_e32 v60, s80
-; GFX9-NEXT: v_mov_b32_e32 v56, s71
-; GFX9-NEXT: v_mov_b32_e32 v40, s70
-; GFX9-NEXT: v_mov_b32_e32 v46, s69
-; GFX9-NEXT: v_mov_b32_e32 v19, s68
-; GFX9-NEXT: v_mov_b32_e32 v27, s67
-; GFX9-NEXT: v_mov_b32_e32 v20, s4
-; GFX9-NEXT: v_mov_b32_e32 v51, s55
+; GFX9-NEXT: v_mov_b32_e32 v60, s82
+; GFX9-NEXT: v_readlane_b32 s5, v62, 7
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB73_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v39, v39, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v49, v49, v20, s4
-; GFX9-NEXT: v_perm_b32 v36, v36, v19, s4
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v30, v35, v30, s4
-; GFX9-NEXT: v_perm_b32 v16, v33, v16, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v48, v48, v60, s4
-; GFX9-NEXT: v_perm_b32 v25, v41, v25, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v44, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX9-NEXT: v_or_b32_e32 v25, v37, v25
-; GFX9-NEXT: v_perm_b32 v26, v26, v42, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX9-NEXT: v_perm_b32 v38, v38, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX9-NEXT: v_perm_b32 v24, v24, v58, s4
-; GFX9-NEXT: v_perm_b32 v22, v22, v55, s4
+; GFX9-NEXT: v_perm_b32 v51, v42, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v49, v17, s4
+; GFX9-NEXT: v_perm_b32 v26, v38, v26, s4
+; GFX9-NEXT: v_perm_b32 v38, v39, v45, s4
+; GFX9-NEXT: v_perm_b32 v23, v37, v23, s4
+; GFX9-NEXT: v_perm_b32 v19, v35, v19, s4
+; GFX9-NEXT: v_perm_b32 v34, v34, v31, s4
+; GFX9-NEXT: v_perm_b32 v29, v29, v50, s4
+; GFX9-NEXT: v_perm_b32 v36, v36, v40, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v44, s4
+; GFX9-NEXT: v_perm_b32 v18, v21, v18, s4
+; GFX9-NEXT: v_perm_b32 v30, v61, v30, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GFX9-NEXT: v_or_b32_e32 v17, v17, v30
+; GFX9-NEXT: v_perm_b32 v48, v48, v58, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; GFX9-NEXT: v_or_b32_e32 v48, v48, v51
+; GFX9-NEXT: v_perm_b32 v25, v25, v57, s4
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -113625,274 +114542,271 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: v_readlane_b32 s36, v63, 2
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v34, v34, v15, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v27, v27, v19, s4
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v45, v59, v52, s4
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v49, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v35, v15, v19, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v56, v56, v59, s4
-; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v20, v20, v40, s4
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v24, v50, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v39, v46, v52, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v40, v15, v40, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v37, v27, v45, s4
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v19, v51, v19, s4
-; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v16, v16, v15, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v35, v27, v45, s4
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v53, v32, v27, s4
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v31, v27, v31, s4
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v32, v32, v44, s4
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v40, v46, v59, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v20, v28, v15, s4
-; GFX9-NEXT: v_perm_b32 v28, v29, v50, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v15, v50, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v23, v15, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v33, v15, v50, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v21, v21, v15, s4
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v28, v28, v27, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v50, v60, v44, s4
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v21, v44, s4
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v50, v15, v50, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v15, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v51, 16, v45
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v27
-; GFX9-NEXT: v_or_b32_e32 v48, v48, v51
-; GFX9-NEXT: v_or_b32_e32 v25, v34, v25
+; GFX9-NEXT: v_perm_b32 v15, v15, v44, s4
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v49
+; GFX9-NEXT: v_or_b32_e32 v17, v26, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: v_perm_b32 v17, v43, v59, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v38, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v39
+; GFX9-NEXT: v_or_b32_e32 v17, v36, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: v_perm_b32 v17, v41, v22, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v23, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v37
+; GFX9-NEXT: v_or_b32_e32 v17, v34, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: v_perm_b32 v17, v55, v54, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v19, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v35
+; GFX9-NEXT: v_or_b32_e32 v17, v53, v17
; GFX9-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v48, v43, v61, s4
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v25, v47, v54, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v48
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX9-NEXT: v_or_b32_e32 v48, v49, v48
-; GFX9-NEXT: v_or_b32_e32 v25, v30, v25
-; GFX9-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v56
-; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v35
-; GFX9-NEXT: v_or_b32_e32 v38, v38, v48
-; GFX9-NEXT: v_or_b32_e32 v26, v36, v26
-; GFX9-NEXT: v_or_b32_e32 v25, v32, v25
-; GFX9-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v31, v25, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX9-NEXT: v_or_b32_e32 v16, v16, v25
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v19
-; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v28, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v29
-; GFX9-NEXT: v_or_b32_e32 v16, v23, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v33, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v31
+; GFX9-NEXT: v_or_b32_e32 v17, v28, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v24, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v33
-; GFX9-NEXT: v_or_b32_e32 v16, v21, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v29, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v32
+; GFX9-NEXT: v_or_b32_e32 v17, v24, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v56, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v25, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v17, v20, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v22, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v50
-; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
-; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v17, v18, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21
+; GFX9-NEXT: v_or_b32_e32 v17, v40, v17
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:64
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v18, v16
+; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v16, v16, v17
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4
; GFX9-NEXT: v_or_b32_e32 v13, v13, v15
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v14, v15, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_or_b32_e32 v13, v13, v14
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v9, v13, s4
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX9-NEXT: v_or_b32_e32 v9, v9, v13
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v10, v13, v10, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_or_b32_e32 v7, v7, v9
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v7, v7, v8, s4
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v6, v7, v6, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v6, s4
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_or_b32_e32 v3, v3, v5
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v4, v5, v4, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v57, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_perm_b32 v1, v11, v1, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
@@ -113917,8 +114831,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -114021,344 +114935,346 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_readfirstlane_b32 s8, v7
; GFX11-NEXT: v_readfirstlane_b32 s7, v6
; GFX11-NEXT: v_readfirstlane_b32 s6, v5
-; GFX11-NEXT: v_readfirstlane_b32 s5, v4
-; GFX11-NEXT: v_readfirstlane_b32 s4, v3
+; GFX11-NEXT: v_readfirstlane_b32 s89, v4
+; GFX11-NEXT: v_readfirstlane_b32 s88, v3
; GFX11-NEXT: v_readfirstlane_b32 s13, v2
; GFX11-NEXT: v_readfirstlane_b32 s12, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s30, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB73_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s11, 16
-; GFX11-NEXT: s_lshr_b32 s48, s41, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s9, 24
-; GFX11-NEXT: s_lshr_b32 s39, s41, 16
-; GFX11-NEXT: s_lshr_b32 s38, s41, 8
-; GFX11-NEXT: s_lshr_b32 s50, s40, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s9, 16
-; GFX11-NEXT: s_lshr_b32 s49, s40, 8
+; GFX11-NEXT: s_lshr_b32 s4, s9, 24
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX11-NEXT: v_writelane_b32 v76, s4, 9
+; GFX11-NEXT: s_lshr_b32 s4, s0, 8
+; GFX11-NEXT: s_lshr_b32 s53, s41, 24
+; GFX11-NEXT: s_lshr_b32 s92, s19, 24
+; GFX11-NEXT: s_lshr_b32 s94, s19, 16
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 1
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s17, 8
+; GFX11-NEXT: s_lshr_b32 s31, s41, 16
+; GFX11-NEXT: s_lshr_b32 s78, s41, 8
+; GFX11-NEXT: s_lshr_b32 s35, s40, 16
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 2
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
+; GFX11-NEXT: s_lshr_b32 s76, s40, 8
; GFX11-NEXT: s_lshr_b32 s37, s15, 24
-; GFX11-NEXT: s_lshr_b32 s36, s15, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s9, 8
-; GFX11-NEXT: s_lshr_b32 s35, s15, 8
-; GFX11-NEXT: s_lshr_b32 s52, s14, 16
-; GFX11-NEXT: s_lshr_b32 s51, s14, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s7, 24
-; GFX11-NEXT: s_lshr_b32 s34, s11, 24
-; GFX11-NEXT: s_lshr_b32 s104, s11, 8
-; GFX11-NEXT: s_lshr_b32 s54, s10, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s7, 16
-; GFX11-NEXT: s_lshr_b32 s53, s10, 8
-; GFX11-NEXT: s_lshr_b32 s64, s8, 16
-; GFX11-NEXT: s_lshr_b32 s55, s8, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s7, 8
-; GFX11-NEXT: s_lshr_b32 s66, s6, 16
-; GFX11-NEXT: s_lshr_b32 s65, s6, 8
-; GFX11-NEXT: s_lshr_b32 s68, s4, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s5, 24
-; GFX11-NEXT: s_lshr_b32 s67, s4, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s69, s12, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s5, 16
-; GFX11-NEXT: s_lshr_b32 s80, s28, 16
-; GFX11-NEXT: s_lshr_b32 s71, s28, 8
-; GFX11-NEXT: s_lshr_b32 s82, s26, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
-; GFX11-NEXT: s_lshr_b32 s42, s5, 8
-; GFX11-NEXT: s_lshr_b32 s81, s26, 8
-; GFX11-NEXT: s_lshr_b32 s84, s24, 16
-; GFX11-NEXT: s_lshr_b32 s83, s24, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
-; GFX11-NEXT: s_lshr_b32 s42, s13, 24
-; GFX11-NEXT: s_lshr_b32 s86, s22, 16
-; GFX11-NEXT: s_lshr_b32 s85, s22, 8
-; GFX11-NEXT: s_lshr_b32 s96, s20, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
-; GFX11-NEXT: s_lshr_b32 s42, s13, 16
-; GFX11-NEXT: s_lshr_b32 s87, s20, 8
-; GFX11-NEXT: s_lshr_b32 s98, s18, 16
-; GFX11-NEXT: s_lshr_b32 s97, s18, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
-; GFX11-NEXT: s_lshr_b32 s42, s13, 8
-; GFX11-NEXT: s_lshr_b32 s100, s16, 16
-; GFX11-NEXT: s_lshr_b32 s99, s16, 8
-; GFX11-NEXT: s_lshr_b32 s102, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
-; GFX11-NEXT: s_lshr_b32 s42, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s2, 8
-; GFX11-NEXT: s_lshr_b32 s31, s0, 16
-; GFX11-NEXT: s_lshr_b32 s103, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
-; GFX11-NEXT: s_lshr_b32 s42, s29, 16
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
-; GFX11-NEXT: s_lshr_b32 s42, s29, 8
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[4:5], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-NEXT: s_lshr_b32 s74, s15, 16
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 3
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
+; GFX11-NEXT: s_lshr_b32 s39, s15, 8
+; GFX11-NEXT: s_lshr_b32 s48, s14, 16
+; GFX11-NEXT: s_lshr_b32 s49, s14, 8
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 4
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 8
+; GFX11-NEXT: s_lshr_b32 s50, s11, 24
+; GFX11-NEXT: s_lshr_b32 s51, s11, 16
+; GFX11-NEXT: s_lshr_b32 s52, s11, 8
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 5
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s1, 24
+; GFX11-NEXT: s_lshr_b32 s55, s10, 16
+; GFX11-NEXT: s_lshr_b32 s64, s10, 8
+; GFX11-NEXT: s_lshr_b32 s67, s9, 16
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 6
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s1, 16
+; GFX11-NEXT: s_lshr_b32 s69, s9, 8
+; GFX11-NEXT: s_lshr_b32 s70, s8, 16
+; GFX11-NEXT: s_lshr_b32 s71, s8, 8
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 7
+; GFX11-NEXT: s_lshr_b32 vcc_hi, s1, 8
+; GFX11-NEXT: s_lshr_b32 s82, s7, 24
+; GFX11-NEXT: s_lshr_b32 s83, s7, 16
+; GFX11-NEXT: s_lshr_b32 s84, s7, 8
+; GFX11-NEXT: v_writelane_b32 v76, vcc_hi, 8
+; GFX11-NEXT: s_lshr_b32 s86, s6, 16
+; GFX11-NEXT: s_lshr_b32 s96, s6, 8
+; GFX11-NEXT: s_lshr_b32 s97, s89, 24
+; GFX11-NEXT: s_lshr_b32 s98, s89, 16
+; GFX11-NEXT: v_writelane_b32 v76, s4, 0
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
+; GFX11-NEXT: s_lshr_b32 s101, s89, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 30
+; GFX11-NEXT: s_lshr_b32 s102, s88, 16
+; GFX11-NEXT: s_lshr_b32 s103, s88, 8
+; GFX11-NEXT: s_lshr_b32 s65, s13, 24
+; GFX11-NEXT: s_lshr_b32 s43, s13, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 31
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[14:15], 24
+; GFX11-NEXT: s_lshr_b32 s45, s13, 8
+; GFX11-NEXT: s_lshr_b32 s46, s12, 16
+; GFX11-NEXT: s_lshr_b32 s47, s12, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 28
+; GFX11-NEXT: s_lshr_b32 s57, s29, 24
+; GFX11-NEXT: s_lshr_b32 s59, s29, 16
+; GFX11-NEXT: s_lshr_b32 s61, s29, 8
+; GFX11-NEXT: s_lshr_b32 s63, s28, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 29
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[10:11], 24
+; GFX11-NEXT: s_lshr_b32 s72, s28, 8
+; GFX11-NEXT: s_lshr_b32 s73, s27, 24
+; GFX11-NEXT: s_lshr_b32 s38, s27, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 26
+; GFX11-NEXT: s_lshr_b32 s75, s27, 8
+; GFX11-NEXT: s_lshr_b32 s62, s26, 16
+; GFX11-NEXT: s_lshr_b32 s60, s26, 8
+; GFX11-NEXT: s_lshr_b32 s36, s25, 24
+; GFX11-NEXT: v_writelane_b32 v77, s5, 27
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
+; GFX11-NEXT: s_lshr_b32 s77, s25, 16
+; GFX11-NEXT: s_lshr_b32 s34, s25, 8
+; GFX11-NEXT: s_lshr_b32 s58, s24, 16
+; GFX11-NEXT: v_writelane_b32 v77, s4, 24
+; GFX11-NEXT: s_lshr_b32 s56, s24, 8
+; GFX11-NEXT: s_lshr_b32 s79, s23, 24
+; GFX11-NEXT: s_lshr_b32 s30, s23, 16
; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
-; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s1, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 25
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[6:7], 24
+; GFX11-NEXT: s_lshr_b32 s44, s22, 16
+; GFX11-NEXT: s_lshr_b32 s104, s22, 8
+; GFX11-NEXT: s_lshr_b32 s95, s21, 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 22
+; GFX11-NEXT: s_lshr_b32 s93, s21, 16
+; GFX11-NEXT: s_lshr_b32 s91, s21, 8
+; GFX11-NEXT: s_lshr_b32 s100, s20, 16
+; GFX11-NEXT: s_lshr_b32 s99, s20, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 23
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[88:89], 24
+; GFX11-NEXT: s_lshr_b32 vcc_lo, s19, 8
+; GFX11-NEXT: s_lshr_b32 s87, s18, 16
+; GFX11-NEXT: s_lshr_b32 s85, s18, 8
+; GFX11-NEXT: v_writelane_b32 v77, s4, 20
+; GFX11-NEXT: s_lshr_b32 s90, s17, 24
+; GFX11-NEXT: s_lshr_b32 s81, s16, 16
+; GFX11-NEXT: s_lshr_b32 s80, s16, 8
+; GFX11-NEXT: s_lshr_b32 s68, s2, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 21
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[12:13], 24
+; GFX11-NEXT: s_lshr_b32 s66, s2, 8
+; GFX11-NEXT: s_lshr_b32 s54, s0, 16
+; GFX11-NEXT: s_mov_b32 vcc_hi, s53
+; GFX11-NEXT: v_writelane_b32 v77, s4, 18
+; GFX11-NEXT: v_readlane_b32 s53, v76, 9
+; GFX11-NEXT: v_writelane_b32 v77, s5, 19
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[28:29], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 17
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 14
+; GFX11-NEXT: v_writelane_b32 v77, s5, 15
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[24:25], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 12
+; GFX11-NEXT: v_writelane_b32 v77, s5, 13
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[22:23], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 10
+; GFX11-NEXT: v_writelane_b32 v77, s5, 11
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[20:21], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 8
+; GFX11-NEXT: v_writelane_b32 v77, s5, 9
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[18:19], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 6
+; GFX11-NEXT: v_writelane_b32 v77, s5, 7
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s4, 4
+; GFX11-NEXT: v_writelane_b32 v77, s5, 5
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[2:3], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 2
+; GFX11-NEXT: v_writelane_b32 v77, s5, 3
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-NEXT: v_writelane_b32 v77, s4, 0
+; GFX11-NEXT: v_writelane_b32 v77, s5, 1
+; GFX11-NEXT: s_mov_b32 s5, s92
+; GFX11-NEXT: s_mov_b32 s92, s94
+; GFX11-NEXT: s_mov_b32 s94, 0
; GFX11-NEXT: s_branch .LBB73_3
; GFX11-NEXT: .LBB73_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s30, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr31
; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: ; kill: killed $sgpr4
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: s_mov_b32 s94, -1
+; GFX11-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: ; implicit-def: $sgpr54
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr90
+; GFX11-NEXT: ; implicit-def: $sgpr85
+; GFX11-NEXT: ; implicit-def: $sgpr87
+; GFX11-NEXT: ; implicit-def: $vcc_lo
+; GFX11-NEXT: ; implicit-def: $sgpr92
; GFX11-NEXT: ; implicit-def: $sgpr99
; GFX11-NEXT: ; implicit-def: $sgpr100
-; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr91
+; GFX11-NEXT: ; implicit-def: $sgpr93
+; GFX11-NEXT: ; implicit-def: $sgpr95
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr79
; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr96
; GFX11-NEXT: ; implicit-def: $sgpr58
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr86
+; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr77
+; GFX11-NEXT: ; implicit-def: $sgpr36
; GFX11-NEXT: ; implicit-def: $sgpr60
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr75
+; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr73
+; GFX11-NEXT: ; implicit-def: $sgpr72
+; GFX11-NEXT: ; implicit-def: $sgpr63
+; GFX11-NEXT: ; implicit-def: $sgpr61
+; GFX11-NEXT: ; implicit-def: $sgpr59
+; GFX11-NEXT: ; implicit-def: $sgpr57
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr65
+; GFX11-NEXT: ; implicit-def: $sgpr103
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr101
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr97
+; GFX11-NEXT: ; implicit-def: $sgpr96
+; GFX11-NEXT: ; implicit-def: $sgpr86
+; GFX11-NEXT: ; implicit-def: $sgpr84
+; GFX11-NEXT: ; implicit-def: $sgpr83
; GFX11-NEXT: ; implicit-def: $sgpr82
; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr69
; GFX11-NEXT: ; implicit-def: $sgpr70
+; GFX11-NEXT: ; implicit-def: $sgpr69
; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr64
; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr34
-; GFX11-NEXT: ; implicit-def: $sgpr51
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr55
; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr51
; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr39
+; GFX11-NEXT: ; implicit-def: $sgpr49
; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $vcc_lo
-; GFX11-NEXT: ; implicit-def: $sgpr94
-; GFX11-NEXT: ; implicit-def: $sgpr92
-; GFX11-NEXT: ; implicit-def: $sgpr90
-; GFX11-NEXT: ; implicit-def: $sgpr88
-; GFX11-NEXT: ; implicit-def: $sgpr78
-; GFX11-NEXT: ; implicit-def: $sgpr76
+; GFX11-NEXT: ; implicit-def: $sgpr39
; GFX11-NEXT: ; implicit-def: $sgpr74
-; GFX11-NEXT: ; implicit-def: $sgpr72
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
+; GFX11-NEXT: ; implicit-def: $sgpr37
+; GFX11-NEXT: ; implicit-def: $sgpr76
+; GFX11-NEXT: ; implicit-def: $sgpr35
+; GFX11-NEXT: ; implicit-def: $sgpr78
+; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $vcc_hi
+; GFX11-NEXT: v_writelane_b32 v77, s43, 1
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s4, 2
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s5, 3
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 4
+; GFX11-NEXT: v_writelane_b32 v77, s5, 5
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 6
+; GFX11-NEXT: v_writelane_b32 v77, s5, 7
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s42, 8
+; GFX11-NEXT: v_writelane_b32 v77, s43, 9
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 10
+; GFX11-NEXT: v_writelane_b32 v77, s43, 11
+; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
+; GFX11-NEXT: v_writelane_b32 v77, s46, 12
+; GFX11-NEXT: v_writelane_b32 v77, s47, 13
+; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr46
+; GFX11-NEXT: v_writelane_b32 v77, s4, 14
+; GFX11-NEXT: v_writelane_b32 v77, s5, 15
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 16
+; GFX11-NEXT: v_writelane_b32 v77, s5, 17
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 18
+; GFX11-NEXT: v_writelane_b32 v77, s5, 19
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 20
+; GFX11-NEXT: v_writelane_b32 v77, s5, 21
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 22
+; GFX11-NEXT: v_writelane_b32 v77, s5, 23
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 24
+; GFX11-NEXT: v_writelane_b32 v77, s5, 25
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 26
+; GFX11-NEXT: v_writelane_b32 v77, s5, 27
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 28
+; GFX11-NEXT: v_writelane_b32 v77, s5, 29
+; GFX11-NEXT: ; implicit-def: $sgpr4
+; GFX11-NEXT: v_writelane_b32 v77, s4, 30
+; GFX11-NEXT: v_writelane_b32 v77, s5, 31
; GFX11-NEXT: .LBB73_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s30, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-NEXT: s_and_b32 s94, s94, exec_lo
+; GFX11-NEXT: s_cselect_b32 s94, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s94, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB73_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
-; GFX11-NEXT: v_add_f64 v[21:22], s[22:23], 1.0
-; GFX11-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
-; GFX11-NEXT: v_add_f64 v[23:24], s[20:21], 1.0
+; GFX11-NEXT: v_add_f64 v[9:10], s[6:7], 1.0
+; GFX11-NEXT: v_add_f64 v[11:12], s[88:89], 1.0
; GFX11-NEXT: v_add_f64 v[13:14], s[12:13], 1.0
-; GFX11-NEXT: v_add_f64 v[27:28], s[18:19], 1.0
+; GFX11-NEXT: v_add_f64 v[23:24], s[20:21], 1.0
+; GFX11-NEXT: v_add_f64 v[36:37], s[2:3], 1.0
; GFX11-NEXT: v_add_f64 v[15:16], s[28:29], 1.0
-; GFX11-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
-; GFX11-NEXT: v_add_f64 v[7:8], s[8:9], 1.0
+; GFX11-NEXT: v_add_f64 v[27:28], s[18:19], 1.0
; GFX11-NEXT: v_add_f64 v[17:18], s[26:27], 1.0
-; GFX11-NEXT: v_add_f64 v[35:36], s[2:3], 1.0
-; GFX11-NEXT: v_add_f64 v[1:2], s[40:41], 1.0
-; GFX11-NEXT: v_add_f64 v[3:4], s[14:15], 1.0
+; GFX11-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
; GFX11-NEXT: v_add_f64 v[5:6], s[10:11], 1.0
-; GFX11-NEXT: v_add_f64 v[9:10], s[6:7], 1.0
; GFX11-NEXT: v_add_f64 v[19:20], s[24:25], 1.0
-; GFX11-NEXT: v_add_f64 v[48:49], s[0:1], 1.0
-; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[21:22]
-; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[23:24]
-; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14]
-; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[27:28]
-; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
-; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[31:32]
-; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
-; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[35:36]
+; GFX11-NEXT: v_add_f64 v[1:2], s[40:41], 1.0
+; GFX11-NEXT: v_add_f64 v[3:4], s[14:15], 1.0
+; GFX11-NEXT: v_add_f64 v[7:8], s[8:9], 1.0
+; GFX11-NEXT: v_add_f64 v[21:22], s[22:23], 1.0
+; GFX11-NEXT: v_add_f64 v[38:39], s[0:1], 1.0
+; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10]
+; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12]
+; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
+; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[23:24]
+; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v36
+; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[15:16]
+; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[27:28]
+; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[17:18]
+; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[31:32]
+; GFX11-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
+; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[36:37]
; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2]
; GFX11-NEXT: v_lshrrev_b64 v[29:30], 24, v[3:4]
-; GFX11-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10]
-; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[48:49]
-; GFX11-NEXT: v_lshrrev_b32_e32 v39, 24, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v2
+; GFX11-NEXT: v_lshrrev_b64 v[34:35], 24, v[7:8]
+; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
+; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[38:39]
+; GFX11-NEXT: v_lshrrev_b32_e32 v55, 24, v2
+; GFX11-NEXT: v_lshrrev_b32_e32 v70, 16, v2
+; GFX11-NEXT: v_lshrrev_b32_e32 v35, 8, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1
; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1
; GFX11-NEXT: v_lshrrev_b32_e32 v82, 24, v4
@@ -114373,289 +115289,274 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_lshrrev_b32_e32 v84, 8, v5
; GFX11-NEXT: v_lshrrev_b32_e32 v102, 24, v8
; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v8
-; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v8
+; GFX11-NEXT: v_lshrrev_b32_e32 v99, 8, v8
; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v7
; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v7
; GFX11-NEXT: v_lshrrev_b32_e32 v114, 24, v10
; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v10
; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v10
-; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v99, 8, v9
-; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v131, 16, v12
-; GFX11-NEXT: v_lshrrev_b32_e32 v129, 8, v12
+; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v9
+; GFX11-NEXT: v_lshrrev_b32_e32 v100, 8, v9
+; GFX11-NEXT: v_lshrrev_b32_e32 v129, 24, v12
+; GFX11-NEXT: v_lshrrev_b32_e32 v130, 16, v12
+; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v12
; GFX11-NEXT: v_lshrrev_b32_e32 v113, 16, v11
; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v11
-; GFX11-NEXT: v_lshrrev_b32_e32 v134, 24, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v14
-; GFX11-NEXT: v_lshrrev_b32_e32 v144, 8, v14
+; GFX11-NEXT: v_lshrrev_b32_e32 v132, 24, v14
+; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v14
+; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v14
; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v13
; GFX11-NEXT: v_lshrrev_b32_e32 v117, 8, v13
; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 16, v16
+; GFX11-NEXT: v_lshrrev_b32_e32 v149, 16, v16
; GFX11-NEXT: v_lshrrev_b32_e32 v147, 8, v16
-; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v15
-; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v176, 24, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v20
+; GFX11-NEXT: v_lshrrev_b32_e32 v131, 16, v15
+; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v15
+; GFX11-NEXT: v_lshrrev_b32_e32 v160, 24, v18
+; GFX11-NEXT: v_lshrrev_b32_e32 v162, 16, v18
+; GFX11-NEXT: v_lshrrev_b32_e32 v161, 8, v18
+; GFX11-NEXT: v_lshrrev_b32_e32 v144, 16, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v20
+; GFX11-NEXT: v_lshrrev_b32_e32 v167, 16, v20
+; GFX11-NEXT: v_lshrrev_b32_e32 v165, 8, v20
; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v135, 8, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v182, 24, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v22
+; GFX11-NEXT: v_lshrrev_b32_e32 v145, 8, v19
+; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v22
+; GFX11-NEXT: v_lshrrev_b32_e32 v182, 16, v22
+; GFX11-NEXT: v_lshrrev_b32_e32 v181, 8, v22
; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v21
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 24, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v23
+; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v21
+; GFX11-NEXT: v_lshrrev_b32_e32 v43, 24, v24
+; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v24
+; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v24
+; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v23
+; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v23
; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 16, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v166, 16, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v165, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v32
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v31
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v180, 8, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 24, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v49
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v48
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v48
+; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v57, 24, v32
+; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v32
+; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v32
+; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v31
+; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v31
+; GFX11-NEXT: v_lshrrev_b32_e32 v60, 24, v37
+; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v37
+; GFX11-NEXT: v_lshrrev_b32_e32 v59, 8, v37
+; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v62, 24, v39
+; GFX11-NEXT: v_lshrrev_b32_e32 v63, 16, v39
+; GFX11-NEXT: v_lshrrev_b32_e32 v72, 8, v39
+; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v38
+; GFX11-NEXT: v_lshrrev_b32_e32 v41, 8, v38
+; GFX11-NEXT: v_mov_b32_e32 v69, v73
; GFX11-NEXT: s_branch .LBB73_6
; GFX11-NEXT: .LBB73_5:
-; GFX11-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v49, s1
+; GFX11-NEXT: v_dual_mov_b32 v38, s0 :: v_dual_mov_b32 v39, s1
; GFX11-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-NEXT: v_mov_b32_e32 v83, s36
-; GFX11-NEXT: v_dual_mov_b32 v1, s40 :: v_dual_mov_b32 v2, s41
-; GFX11-NEXT: v_dual_mov_b32 v3, s14 :: v_dual_mov_b32 v4, s15
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-NEXT: v_mov_b32_e32 v98, s0
+; GFX11-NEXT: v_dual_mov_b32 v40, s54 :: v_dual_mov_b32 v1, s40
+; GFX11-NEXT: v_dual_mov_b32 v2, s41 :: v_dual_mov_b32 v3, s14
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_dual_mov_b32 v4, s15 :: v_dual_mov_b32 v41, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-NEXT: v_mov_b32_e32 v97, s34
+; GFX11-NEXT: v_mov_b32_e32 v45, vcc_lo
; GFX11-NEXT: v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
-; GFX11-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-NEXT: v_mov_b32_e32 v58, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-NEXT: v_mov_b32_e32 v57, s90
; GFX11-NEXT: v_dual_mov_b32 v9, s6 :: v_dual_mov_b32 v10, s7
-; GFX11-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v103, s0
+; GFX11-NEXT: v_dual_mov_b32 v11, s88 :: v_dual_mov_b32 v12, s89
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_mov_b32_e32 v56, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 3
; GFX11-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v14, s13
; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
-; GFX11-NEXT: v_mov_b32_e32 v101, s0
+; GFX11-NEXT: v_mov_b32_e32 v60, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 4
; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v114, s0
+; GFX11-NEXT: v_mov_b32_e32 v61, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 5
; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-NEXT: v_mov_b32_e32 v59, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 6
; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
; GFX11-NEXT: v_dual_mov_b32 v31, s16 :: v_dual_mov_b32 v32, s17
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v115, s0
+; GFX11-NEXT: v_mov_b32_e32 v62, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-NEXT: v_dual_mov_b32 v35, s2 :: v_dual_mov_b32 v36, s3
-; GFX11-NEXT: v_dual_mov_b32 v41, s31 :: v_dual_mov_b32 v42, s103
-; GFX11-NEXT: v_mov_b32_e32 v130, s0
+; GFX11-NEXT: v_dual_mov_b32 v36, s2 :: v_dual_mov_b32 v37, s3
+; GFX11-NEXT: v_dual_mov_b32 v69, s68 :: v_dual_mov_b32 v178, s80
+; GFX11-NEXT: v_mov_b32_e32 v63, s0
; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v181, s102 :: v_dual_mov_b32 v180, s101
-; GFX11-NEXT: v_dual_mov_b32 v178, s100 :: v_dual_mov_b32 v177, s99
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v131, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v166, s98 :: v_dual_mov_b32 v165, s97
-; GFX11-NEXT: v_dual_mov_b32 v161, s96 :: v_dual_mov_b32 v160, s87
-; GFX11-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v151, s86 :: v_dual_mov_b32 v146, s84
-; GFX11-NEXT: v_dual_mov_b32 v149, s85 :: v_dual_mov_b32 v132, s81
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v134, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v135, s83 :: v_dual_mov_b32 v128, s80
-; GFX11-NEXT: v_dual_mov_b32 v133, s82 :: v_dual_mov_b32 v118, s70
-; GFX11-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v119, s71 :: v_dual_mov_b32 v112, s67
-; GFX11-NEXT: v_dual_mov_b32 v117, s69 :: v_dual_mov_b32 v100, s66
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v144, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v113, s68 :: v_dual_mov_b32 v96, s64
-; GFX11-NEXT: v_dual_mov_b32 v99, s65 :: v_dual_mov_b32 v84, s53
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v87, s55 :: v_dual_mov_b32 v80, s52
-; GFX11-NEXT: v_dual_mov_b32 v85, s54 :: v_dual_mov_b32 v30, s50
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s49
-; GFX11-NEXT: v_dual_mov_b32 v39, s48 :: v_dual_mov_b32 v34, s38
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v55, s39 :: v_dual_mov_b32 v82, s37
-; GFX11-NEXT: v_dual_mov_b32 v81, s35 :: v_dual_mov_b32 v86, s104
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v69, s42 :: v_dual_mov_b32 v68, s44
-; GFX11-NEXT: v_dual_mov_b32 v67, s46 :: v_dual_mov_b32 v66, s56
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v65, s58 :: v_dual_mov_b32 v64, s60
-; GFX11-NEXT: v_dual_mov_b32 v54, s62 :: v_dual_mov_b32 v53, vcc_lo
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v52, s94 :: v_dual_mov_b32 v51, s92
-; GFX11-NEXT: v_dual_mov_b32 v50, s90 :: v_dual_mov_b32 v37, s78
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v33, s76
-; GFX11-NEXT: v_mov_b32_e32 v29, s74
-; GFX11-NEXT: v_mov_b32_e32 v25, s72
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-NEXT: v_dual_mov_b32 v183, s66 :: v_dual_mov_b32 v176, s85
+; GFX11-NEXT: v_dual_mov_b32 v179, s81 :: v_dual_mov_b32 v164, s100
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v72, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 1
+; GFX11-NEXT: v_dual_mov_b32 v177, s87 :: v_dual_mov_b32 v150, s104
+; GFX11-NEXT: v_dual_mov_b32 v163, s99 :: v_dual_mov_b32 v146, s58
+; GFX11-NEXT: v_mov_b32_e32 v68, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 3
+; GFX11-NEXT: v_dual_mov_b32 v151, s44 :: v_dual_mov_b32 v144, s62
+; GFX11-NEXT: v_dual_mov_b32 v145, s56 :: v_dual_mov_b32 v128, s72
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v67, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 5
+; GFX11-NEXT: v_dual_mov_b32 v133, s60 :: v_dual_mov_b32 v118, s46
+; GFX11-NEXT: v_dual_mov_b32 v131, s63 :: v_dual_mov_b32 v112, s103
+; GFX11-NEXT: v_mov_b32_e32 v66, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 7
+; GFX11-NEXT: v_dual_mov_b32 v117, s47 :: v_dual_mov_b32 v100, s96
+; GFX11-NEXT: v_dual_mov_b32 v113, s102 :: v_dual_mov_b32 v96, s70
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v65, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 8
+; GFX11-NEXT: v_readlane_b32 s1, v77, 9
+; GFX11-NEXT: v_dual_mov_b32 v101, s86 :: v_dual_mov_b32 v84, s64
+; GFX11-NEXT: v_dual_mov_b32 v87, s71 :: v_dual_mov_b32 v80, s48
+; GFX11-NEXT: v_mov_b32_e32 v64, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 10
+; GFX11-NEXT: v_readlane_b32 s1, v77, 11
+; GFX11-NEXT: v_dual_mov_b32 v85, s55 :: v_dual_mov_b32 v30, s35
+; GFX11-NEXT: v_dual_mov_b32 v71, s49 :: v_dual_mov_b32 v26, s76
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v54, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 12
+; GFX11-NEXT: v_readlane_b32 s1, v77, 13
+; GFX11-NEXT: v_dual_mov_b32 v55, vcc_hi :: v_dual_mov_b32 v70, s31
+; GFX11-NEXT: v_dual_mov_b32 v35, s78 :: v_dual_mov_b32 v82, s37
+; GFX11-NEXT: v_mov_b32_e32 v53, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 14
+; GFX11-NEXT: v_readlane_b32 s1, v77, 15
+; GFX11-NEXT: v_dual_mov_b32 v83, s74 :: v_dual_mov_b32 v98, s51
+; GFX11-NEXT: v_dual_mov_b32 v81, s39 :: v_dual_mov_b32 v86, s52
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v52, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 16
+; GFX11-NEXT: v_readlane_b32 s1, v77, 17
+; GFX11-NEXT: v_dual_mov_b32 v97, s50 :: v_dual_mov_b32 v102, s53
+; GFX11-NEXT: v_dual_mov_b32 v103, s67 :: v_dual_mov_b32 v114, s82
+; GFX11-NEXT: v_mov_b32_e32 v51, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 18
+; GFX11-NEXT: v_readlane_b32 s1, v77, 19
+; GFX11-NEXT: v_dual_mov_b32 v99, s69 :: v_dual_mov_b32 v116, s83
+; GFX11-NEXT: v_dual_mov_b32 v115, s84 :: v_dual_mov_b32 v130, s98
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v50, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 20
+; GFX11-NEXT: v_readlane_b32 s1, v77, 21
+; GFX11-NEXT: v_dual_mov_b32 v129, s97 :: v_dual_mov_b32 v132, s65
+; GFX11-NEXT: v_dual_mov_b32 v119, s101 :: v_dual_mov_b32 v134, s45
+; GFX11-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 22
+; GFX11-NEXT: v_readlane_b32 s1, v77, 23
+; GFX11-NEXT: v_dual_mov_b32 v135, s43 :: v_dual_mov_b32 v148, s57
+; GFX11-NEXT: v_dual_mov_b32 v149, s59 :: v_dual_mov_b32 v160, s73
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 24
+; GFX11-NEXT: v_readlane_b32 s1, v77, 25
+; GFX11-NEXT: v_dual_mov_b32 v147, s61 :: v_dual_mov_b32 v162, s38
+; GFX11-NEXT: v_dual_mov_b32 v161, s75 :: v_dual_mov_b32 v166, s36
+; GFX11-NEXT: v_mov_b32_e32 v34, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 26
+; GFX11-NEXT: v_readlane_b32 s1, v77, 27
+; GFX11-NEXT: v_dual_mov_b32 v167, s77 :: v_dual_mov_b32 v180, s79
+; GFX11-NEXT: v_dual_mov_b32 v165, s34 :: v_dual_mov_b32 v182, s30
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v33, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 28
+; GFX11-NEXT: v_readlane_b32 s1, v77, 29
+; GFX11-NEXT: v_dual_mov_b32 v181, s42 :: v_dual_mov_b32 v44, s93
+; GFX11-NEXT: v_dual_mov_b32 v43, s95 :: v_dual_mov_b32 v42, s91
+; GFX11-NEXT: v_mov_b32_e32 v29, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 30
+; GFX11-NEXT: v_dual_mov_b32 v46, s5 :: v_dual_mov_b32 v47, s92
+; GFX11-NEXT: v_readlane_b32 s1, v77, 31
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-NEXT: v_mov_b32_e32 v25, s0
; GFX11-NEXT: .LBB73_6: ; %end
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_perm_b32 v69, v41, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v48, v48, v42, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v72, v63, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v68, v181, v68, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v181, v62, v60, 0xc0c0004
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_perm_b32 v68, v40, v68, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v67, v69, v67, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v38, v38, v41, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v40, v63, v62, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v69, v61, v60, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-NEXT: v_perm_b32 v183, v36, v183, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
+; GFX11-NEXT: v_perm_b32 v39, v39, v72, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; GFX11-NEXT: v_perm_b32 v41, v37, v59, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v49, v49, v73, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v180, 16, v181
-; GFX11-NEXT: v_or_b32_e32 v60, v48, v69
-; GFX11-NEXT: v_perm_b32 v48, v178, v67, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v61, v49, v70
-; GFX11-NEXT: v_perm_b32 v49, v56, v46, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v63, v36, v180
+; GFX11-NEXT: v_or_b32_e32 v36, v38, v68
+; GFX11-NEXT: v_perm_b32 v66, v179, v66, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v38, v183, v67
+; GFX11-NEXT: v_perm_b32 v67, v58, v57, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v65, v177, v65, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v68, v47, v46, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v37, v39, v40
+; GFX11-NEXT: v_or_b32_e32 v39, v41, v69
+; GFX11-NEXT: v_perm_b32 v31, v31, v178, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66
+; GFX11-NEXT: v_perm_b32 v32, v32, v56, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67
+; GFX11-NEXT: v_perm_b32 v27, v27, v176, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v65
+; GFX11-NEXT: v_perm_b32 v28, v28, v45, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_lshlrev_b32_e32 v36, 16, v48
-; GFX11-NEXT: v_perm_b32 v48, v166, v66, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v31, v31, v177, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v27, v165, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v28, v47, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v49, 16, v49
-; GFX11-NEXT: v_lshlrev_b32_e32 v48, 16, v48
-; GFX11-NEXT: v_or_b32_e32 v62, v35, v68
-; GFX11-NEXT: v_perm_b32 v35, v59, v58, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v66, v31, v36
-; GFX11-NEXT: v_or_b32_e32 v69, v28, v49
-; GFX11-NEXT: v_or_b32_e32 v68, v27, v48
-; GFX11-NEXT: v_perm_b32 v27, v161, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v28, v45, v44, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v31, v151, v64, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v32, v32, v57, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-NEXT: v_perm_b32 v23, v23, v160, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v65, v31, v66
+; GFX11-NEXT: v_or_b32_e32 v66, v32, v67
+; GFX11-NEXT: v_or_b32_e32 v67, v27, v69
+; GFX11-NEXT: v_perm_b32 v27, v164, v64, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v68, v28, v68
+; GFX11-NEXT: v_perm_b32 v28, v44, v43, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v31, v151, v54, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v23, v163, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_perm_b32 v24, v24, v43, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v24, v42, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-NEXT: v_perm_b32 v21, v21, v149, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v21, v21, v150, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; GFX11-NEXT: v_or_b32_e32 v67, v32, v35
; GFX11-NEXT: s_clause 0x1
-; GFX11-NEXT: scratch_store_b128 v0, v[60:63], off
-; GFX11-NEXT: scratch_store_b128 v0, v[66:69], off offset:16
-; GFX11-NEXT: v_or_b32_e32 v64, v23, v27
-; GFX11-NEXT: v_perm_b32 v23, v40, v182, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v65, v24, v28
-; GFX11-NEXT: v_or_b32_e32 v66, v21, v31
-; GFX11-NEXT: v_perm_b32 v21, v22, v183, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v22, v146, v54, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v179, v176, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v27, v133, v53, 0xc0c0004
+; GFX11-NEXT: scratch_store_b128 v0, v[36:39], off
+; GFX11-NEXT: scratch_store_b128 v0, v[65:68], off offset:16
+; GFX11-NEXT: v_or_b32_e32 v36, v23, v27
+; GFX11-NEXT: v_perm_b32 v23, v182, v180, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v37, v24, v28
+; GFX11-NEXT: v_or_b32_e32 v38, v21, v31
+; GFX11-NEXT: v_perm_b32 v21, v22, v181, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v22, v146, v53, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v167, v166, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v27, v144, v52, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v135, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v19, v19, v145, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v167, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v20, v20, v165, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v132, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v17, v17, v133, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-NEXT: v_or_b32_e32 v67, v21, v23
+; GFX11-NEXT: v_or_b32_e32 v39, v21, v23
; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
-; GFX11-NEXT: v_perm_b32 v22, v164, v162, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v22, v162, v160, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v20, v20, v24
; GFX11-NEXT: v_or_b32_e32 v21, v17, v27
-; GFX11-NEXT: v_perm_b32 v17, v18, v163, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v18, v128, v52, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v24, v118, v51, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v150, v148, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v17, v18, v161, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v18, v131, v51, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v118, v50, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v149, v148, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v15, v15, v119, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v15, v15, v128, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-NEXT: v_perm_b32 v13, v13, v117, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
@@ -114663,24 +115564,24 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_or_b32_e32 v22, v17, v22
; GFX11-NEXT: v_or_b32_e32 v15, v15, v18
-; GFX11-NEXT: v_perm_b32 v18, v145, v134, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v18, v135, v132, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v17, v13, v24
-; GFX11-NEXT: v_perm_b32 v24, v100, v38, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v24, v101, v48, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v16, v16, v23
-; GFX11-NEXT: v_perm_b32 v13, v14, v144, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v14, v113, v50, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v23, v131, v130, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v13, v14, v134, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v14, v113, v49, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v23, v130, v129, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-NEXT: v_perm_b32 v9, v9, v99, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v9, v9, v100, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX11-NEXT: v_perm_b32 v11, v11, v112, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v12, v12, v129, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v12, v12, v119, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_or_b32_e32 v18, v13, v18
; GFX11-NEXT: v_or_b32_e32 v13, v9, v24
; GFX11-NEXT: v_perm_b32 v9, v10, v115, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v10, v96, v37, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v10, v96, v34, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v11, v11, v14
; GFX11-NEXT: v_perm_b32 v14, v116, v114, 0xc0c0004
; GFX11-NEXT: v_or_b32_e32 v12, v12, v23
@@ -114689,7 +115590,7 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_perm_b32 v7, v7, v87, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-NEXT: v_perm_b32 v8, v8, v101, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v8, v8, v99, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_perm_b32 v5, v5, v84, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
@@ -114701,7 +115602,7 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_perm_b32 v5, v80, v29, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v23, v83, v82, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v24, v30, v25, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v25, v55, v39, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v25, v70, v55, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004
@@ -114710,7 +115611,7 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-NEXT: v_perm_b32 v26, v1, v26, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v27, v2, v34, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v27, v2, v35, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX11-NEXT: v_or_b32_e32 v10, v6, v10
; GFX11-NEXT: v_or_b32_e32 v1, v3, v5
@@ -114718,7 +115619,7 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11-NEXT: v_or_b32_e32 v3, v26, v24
; GFX11-NEXT: v_or_b32_e32 v4, v27, v25
; GFX11-NEXT: s_clause 0x5
-; GFX11-NEXT: scratch_store_b128 v0, v[64:67], off offset:32
+; GFX11-NEXT: scratch_store_b128 v0, v[36:39], off offset:32
; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48
; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64
; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80
@@ -120663,8 +121564,16 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s58, v10
+; SI-NEXT: v_readfirstlane_b32 s59, v9
+; SI-NEXT: v_readfirstlane_b32 s60, v8
+; SI-NEXT: v_readfirstlane_b32 s61, v7
; SI-NEXT: v_readfirstlane_b32 s76, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
; SI-NEXT: v_readfirstlane_b32 s46, v30
; SI-NEXT: v_readfirstlane_b32 s6, v29
; SI-NEXT: v_readfirstlane_b32 s7, v28
@@ -120678,327 +121587,318 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s15, v20
; SI-NEXT: v_readfirstlane_b32 s40, v19
; SI-NEXT: v_readfirstlane_b32 s41, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:332
; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:8
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:16
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:32
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:64
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:72
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:80
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:88
; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:104
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:112
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:120
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:128
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:240
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:256
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328
-; SI-NEXT: v_readfirstlane_b32 s75, v1
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:136
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:144
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:176
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:192
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:200
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:208
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:224
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:240
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:248
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:264
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:272
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:280
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:288
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:328
; SI-NEXT: v_readfirstlane_b32 s43, v16
-; SI-NEXT: v_readfirstlane_b32 s45, v14
-; SI-NEXT: v_readfirstlane_b32 s73, v3
-; SI-NEXT: v_readfirstlane_b32 s74, v2
-; SI-NEXT: v_readfirstlane_b32 s57, v11
-; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: v_readfirstlane_b32 s44, v15
+; SI-NEXT: v_readfirstlane_b32 s45, v14
; SI-NEXT: v_readfirstlane_b32 s47, v13
; SI-NEXT: v_readfirstlane_b32 s56, v12
-; SI-NEXT: v_readfirstlane_b32 s58, v10
-; SI-NEXT: v_readfirstlane_b32 s59, v9
-; SI-NEXT: v_readfirstlane_b32 s60, v8
-; SI-NEXT: v_readfirstlane_b32 s61, v7
+; SI-NEXT: v_readfirstlane_b32 s57, v11
; SI-NEXT: v_readfirstlane_b32 s62, v6
; SI-NEXT: v_readfirstlane_b32 s63, v5
+; SI-NEXT: v_readfirstlane_b32 s72, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v3
+; SI-NEXT: v_readfirstlane_b32 s74, v2
+; SI-NEXT: v_readfirstlane_b32 s75, v1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52
-; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40
-; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41
-; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42
-; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46
-; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56
-; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59
-; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61
-; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44
-; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45
-; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47
-; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v19
+; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v33
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v42
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v61
+; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v21
+; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v22
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316
-; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29
-; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48
-; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204
-; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v55
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v54
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188
-; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14) expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v27
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v50
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v36
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v44, 24, v57
+; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v59, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v37
+; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v35
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v32
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:284
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:276
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:268
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:260
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:252
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:156
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:92
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:84
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:44
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:28
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:20
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:12
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4
+; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v31
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB75_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_mov_b32_e32 v40, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
-; SI-NEXT: v_or_b32_e32 v0, s4, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v12
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v3, v11, v3
-; SI-NEXT: v_or_b32_e32 v11, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v13, v1
-; SI-NEXT: v_or_b32_e32 v13, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v14, v1
-; SI-NEXT: v_or_b32_e32 v14, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v42
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: v_or_b32_e32 v0, v0, v60
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v15, v1
-; SI-NEXT: v_or_b32_e32 v15, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: v_or_b32_e32 v0, v0, v41
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v16, v1
-; SI-NEXT: v_or_b32_e32 v16, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_or_b32_e32 v0, v0, v40
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v55, v1
-; SI-NEXT: v_or_b32_e32 v17, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v44
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v54
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v53, v1
-; SI-NEXT: v_or_b32_e32 v18, v0, v1
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v51, v1
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v12, v2, v3
-; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: v_or_b32_e32 v6, v15, v6
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v38, v38, v11
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_or_b32_e32 v5, v5, v17
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v38
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v4, v33, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v2, v42, v2
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v20, v0
; SI-NEXT: s_lshl_b32 s5, s17, 8
+; SI-NEXT: s_lshl_b32 s77, s19, 24
+; SI-NEXT: s_lshl_b32 s78, s23, 24
+; SI-NEXT: s_lshl_b32 s79, s27, 24
+; SI-NEXT: s_lshl_b32 s88, s75, 24
+; SI-NEXT: s_lshl_b32 s89, s63, 24
+; SI-NEXT: s_lshl_b32 s90, s59, 24
+; SI-NEXT: s_lshl_b32 s91, s47, 24
+; SI-NEXT: s_lshl_b32 s92, s42, 24
+; SI-NEXT: s_lshl_b32 s93, s14, 24
+; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_lshl_b32 s95, s6, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v7, s4, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v11, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v63
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v7, v18, v7
+; SI-NEXT: v_mov_b32_e32 v6, v13
+; SI-NEXT: v_or_b32_e32 v13, v5, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v62
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v60
+; SI-NEXT: v_or_b32_e32 v5, v5, v19
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v14, v7
+; SI-NEXT: v_mov_b32_e32 v60, v14
+; SI-NEXT: v_or_b32_e32 v14, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v57
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s18, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s77, s19, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s77, s5
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -121007,7 +121907,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s5, s5, s77
; SI-NEXT: s_and_b32 s77, s22, 0xff
; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s23, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s77, s78, s77
; SI-NEXT: s_or_b32 s5, s5, s77
@@ -121016,7 +121915,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s77, s77, s78
; SI-NEXT: s_and_b32 s78, s26, 0xff
; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s79, s27, 24
; SI-NEXT: s_and_b32 s77, s77, 0xffff
; SI-NEXT: s_or_b32 s78, s79, s78
; SI-NEXT: s_or_b32 s77, s77, s78
@@ -121025,7 +121923,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s78, s78, s79
; SI-NEXT: s_and_b32 s79, s76, 0xff
; SI-NEXT: s_lshl_b32 s79, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s75, 24
; SI-NEXT: s_and_b32 s78, s78, 0xffff
; SI-NEXT: s_or_b32 s79, s88, s79
; SI-NEXT: s_or_b32 s78, s78, s79
@@ -121034,7 +121931,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s79, s79, s88
; SI-NEXT: s_and_b32 s88, s72, 0xff
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s89, s63, 24
; SI-NEXT: s_and_b32 s79, s79, 0xffff
; SI-NEXT: s_or_b32 s88, s89, s88
; SI-NEXT: s_or_b32 s79, s79, s88
@@ -121043,7 +121939,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s88, s88, s89
; SI-NEXT: s_and_b32 s89, s60, 0xff
; SI-NEXT: s_lshl_b32 s89, s89, 16
-; SI-NEXT: s_lshl_b32 s90, s59, 24
; SI-NEXT: s_and_b32 s88, s88, 0xffff
; SI-NEXT: s_or_b32 s89, s90, s89
; SI-NEXT: s_or_b32 s88, s88, s89
@@ -121052,7 +121947,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s89, s89, s90
; SI-NEXT: s_and_b32 s90, s56, 0xff
; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_lshl_b32 s91, s47, 24
; SI-NEXT: s_and_b32 s89, s89, 0xffff
; SI-NEXT: s_or_b32 s90, s91, s90
; SI-NEXT: s_or_b32 s89, s89, s90
@@ -121060,18 +121954,7 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_lshl_b32 s91, s44, 8
; SI-NEXT: s_or_b32 s90, s90, s91
; SI-NEXT: s_and_b32 s91, s43, 0xff
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v52
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v19, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v49, v1
-; SI-NEXT: v_mov_b32_e32 v49, v48
; SI-NEXT: s_lshl_b32 s91, s91, 16
-; SI-NEXT: s_lshl_b32 s92, s42, 24
; SI-NEXT: s_and_b32 s90, s90, 0xffff
; SI-NEXT: s_or_b32 s91, s92, s91
; SI-NEXT: s_or_b32 s90, s90, s91
@@ -121080,7 +121963,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s91, s91, s92
; SI-NEXT: s_and_b32 s92, s15, 0xff
; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s93, s14, 24
; SI-NEXT: s_and_b32 s91, s91, 0xffff
; SI-NEXT: s_or_b32 s92, s93, s92
; SI-NEXT: s_or_b32 s91, s91, s92
@@ -121089,7 +121971,15 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s92, s92, s93
; SI-NEXT: s_and_b32 s93, s11, 0xff
; SI-NEXT: s_lshl_b32 s93, s93, 16
-; SI-NEXT: s_lshl_b32 s94, s10, 24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v47
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v51, v7
+; SI-NEXT: v_or_b32_e32 v15, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v32
; SI-NEXT: s_and_b32 s92, s92, 0xffff
; SI-NEXT: s_or_b32 s93, s94, s93
; SI-NEXT: s_or_b32 s92, s92, s93
@@ -121098,134 +121988,126 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_or_b32 s93, s93, s94
; SI-NEXT: s_and_b32 s94, s7, 0xff
; SI-NEXT: s_lshl_b32 s94, s94, 16
-; SI-NEXT: s_lshl_b32 s95, s6, 24
; SI-NEXT: s_and_b32 s93, s93, 0xffff
; SI-NEXT: s_or_b32 s94, s95, s94
; SI-NEXT: s_or_b32 s93, s93, s94
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v3, s78
-; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v48, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v16, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v7, v44, v7
+; SI-NEXT: v_or_b32_e32 v17, v5, v7
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v41
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v5, v7, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v18, v5, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v5, s88
-; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: v_mov_b32_e32 v7, s90
-; SI-NEXT: v_mov_b32_e32 v8, s91
-; SI-NEXT: v_mov_b32_e32 v9, s92
-; SI-NEXT: v_mov_b32_e32 v10, s93
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v19, v3, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v3, s78
+; SI-NEXT: v_mov_b32_e32 v4, s79
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_or_b32_e32 v20, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v52
-; SI-NEXT: v_or_b32_e32 v0, v0, v50
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v20, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v39, v1
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v50
-; SI-NEXT: v_or_b32_e32 v0, v0, v48
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v21, v1
; SI-NEXT: v_or_b32_e32 v21, v0, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v37, v1
-; SI-NEXT: v_mov_b32_e32 v37, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v48
-; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v22, v1
; SI-NEXT: v_or_b32_e32 v22, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v35, v1
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v38
-; SI-NEXT: v_or_b32_e32 v0, v0, v36
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v23, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v33, v1
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v36
-; SI-NEXT: v_or_b32_e32 v0, v0, v34
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v55, v1
; SI-NEXT: v_or_b32_e32 v24, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v1, v0
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
-; SI-NEXT: v_or_b32_e32 v0, v0, v62
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v29, v1
+; SI-NEXT: v_or_b32_e32 v1, v59, v1
; SI-NEXT: v_or_b32_e32 v25, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v29
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_or_b32_e32 v0, v0, v31
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v28, v1
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v59
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v56, v1
; SI-NEXT: v_or_b32_e32 v26, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v58
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v0, v0, v57
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v27, v1
-; SI-NEXT: v_mov_b32_e32 v57, v27
-; SI-NEXT: v_or_b32_e32 v27, v0, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v0, v0, v45
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v30
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_or_b32_e32 v28, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v46
-; SI-NEXT: v_mov_b32_e32 v45, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v60, v32
+; SI-NEXT: v_or_b32_e32 v27, v0, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v61
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v29, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v30, v0, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v28, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v6
+; SI-NEXT: v_mov_b32_e32 v6, s89
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
@@ -121234,56 +122116,46 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: v_or_b32_e32 v29, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
+; SI-NEXT: v_or_b32_e32 v0, v0, v46
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v36, v1
+; SI-NEXT: v_or_b32_e32 v30, v0, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v34
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v37, v1
; SI-NEXT: v_or_b32_e32 v31, v0, v1
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s77
+; SI-NEXT: v_mov_b32_e32 v8, s91
+; SI-NEXT: v_mov_b32_e32 v9, s92
+; SI-NEXT: v_mov_b32_e32 v10, s93
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB75_3
; SI-NEXT: .LBB75_2:
-; SI-NEXT: v_mov_b32_e32 v55, v54
-; SI-NEXT: v_mov_b32_e32 v53, v52
-; SI-NEXT: v_mov_b32_e32 v51, v50
-; SI-NEXT: v_mov_b32_e32 v49, v48
-; SI-NEXT: v_mov_b32_e32 v39, v38
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v41, v40
-; SI-NEXT: v_mov_b32_e32 v35, v34
-; SI-NEXT: v_mov_b32_e32 v33, v32
-; SI-NEXT: v_mov_b32_e32 v62, v29
-; SI-NEXT: v_mov_b32_e32 v59, v28
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: v_mov_b32_e32 v47, v43
-; SI-NEXT: v_mov_b32_e32 v57, v27
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v38, v17
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v62, v19
+; SI-NEXT: v_mov_b32_e32 v60, v14
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB75_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v43, v58
-; SI-NEXT: v_mov_b32_e32 v58, v33
-; SI-NEXT: v_mov_b32_e32 v33, v37
-; SI-NEXT: v_mov_b32_e32 v34, v39
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB75_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; SI-NEXT: s_add_i32 s46, s46, 3
; SI-NEXT: s_and_b32 s4, s46, 0xff
-; SI-NEXT: v_mov_b32_e32 v32, v35
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_lshl_b32 s5, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -121339,22 +122211,23 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: v_mov_b32_e32 v9, s10
; SI-NEXT: v_mov_b32_e32 v10, s6
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, s4, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v1
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s16, s18, 0xff
@@ -121430,16 +122303,15 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: s_and_b32 s21, s21, 0xffff
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_or_b32 s21, s22, s21
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s22, s41, 0xff
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_lshl_b32 s23, s40, 8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v2, v2, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_addk_i32 s22, 0x300
; SI-NEXT: s_and_b32 s22, s22, 0xffff
@@ -121459,312 +122331,366 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: v_mov_b32_e32 v7, s21
; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v39, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v3, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v3, s17
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_or_b32_e32 v1, v38, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v63, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v37, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_or_b32_e32 v1, v62, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_or_b32_e32 v0, v60, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_or_b32_e32 v0, v42, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v41, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v55, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v53, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v51, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v49, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v34, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v33, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v1, v0, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: v_or_b32_e32 v0, v32, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v62, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v57, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v1, v45, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_or_b32_e32 v0, v1, v0
+; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_or_b32_e32 v0, v0, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
@@ -121786,7 +122712,7 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v128i8_to_v16f64_scalar:
@@ -121808,15 +122734,17 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_readfirstlane_b32 s45, v15
-; VI-NEXT: v_readfirstlane_b32 s46, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
; VI-NEXT: v_readfirstlane_b32 s76, v0
-; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; VI-NEXT: v_readfirstlane_b32 s73, v3
+; VI-NEXT: v_readfirstlane_b32 s47, v13
+; VI-NEXT: v_readfirstlane_b32 s61, v7
+; VI-NEXT: v_readfirstlane_b32 s62, v6
+; VI-NEXT: v_readfirstlane_b32 s63, v5
+; VI-NEXT: v_readfirstlane_b32 s58, v10
+; VI-NEXT: v_readfirstlane_b32 s59, v9
+; VI-NEXT: v_readfirstlane_b32 s60, v8
; VI-NEXT: v_readfirstlane_b32 s6, v30
; VI-NEXT: v_readfirstlane_b32 s7, v29
; VI-NEXT: v_readfirstlane_b32 s8, v28
@@ -121832,448 +122760,424 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s42, v18
; VI-NEXT: v_readfirstlane_b32 s43, v17
; VI-NEXT: v_readfirstlane_b32 s44, v16
+; VI-NEXT: v_readfirstlane_b32 s45, v15
+; VI-NEXT: v_readfirstlane_b32 s46, v14
; VI-NEXT: v_readfirstlane_b32 s56, v12
; VI-NEXT: v_readfirstlane_b32 s57, v11
-; VI-NEXT: v_readfirstlane_b32 s58, v10
-; VI-NEXT: v_readfirstlane_b32 s59, v9
-; VI-NEXT: v_readfirstlane_b32 s60, v8
-; VI-NEXT: v_readfirstlane_b32 s61, v7
-; VI-NEXT: v_readfirstlane_b32 s62, v6
-; VI-NEXT: v_readfirstlane_b32 s63, v5
; VI-NEXT: v_readfirstlane_b32 s72, v4
-; VI-NEXT: v_readfirstlane_b32 s73, v3
; VI-NEXT: v_readfirstlane_b32 s74, v2
; VI-NEXT: v_readfirstlane_b32 s75, v1
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:180
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; VI-NEXT: s_and_b64 s[4:5], vcc, exec
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB75_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_mov_b32_e32 v3, s23
-; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: v_mov_b32_e32 v2, s21
-; VI-NEXT: v_perm_b32 v3, s22, v3, v11
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_perm_b32 v2, s20, v2, v11
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v0, v0, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v3
+; VI-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v4, s23
+; VI-NEXT: v_mov_b32_e32 v2, s19
+; VI-NEXT: v_mov_b32_e32 v3, s21
+; VI-NEXT: v_perm_b32 v4, s22, v4, v20
+; VI-NEXT: v_mov_b32_e32 v13, s17
+; VI-NEXT: v_perm_b32 v2, s18, v2, v20
+; VI-NEXT: v_perm_b32 v3, s20, v3, v20
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_perm_b32 v13, s16, v13, v20
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_mov_b32_e32 v19, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v4
; VI-NEXT: v_mov_b32_e32 v3, s27
+; VI-NEXT: v_mov_b32_e32 v22, v0
+; VI-NEXT: v_or_b32_e32 v0, v13, v2
; VI-NEXT: v_mov_b32_e32 v2, s25
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
+; VI-NEXT: v_perm_b32 v3, s26, v3, v20
+; VI-NEXT: v_perm_b32 v2, s24, v2, v20
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_mov_b32_e32 v4, s75
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
+; VI-NEXT: v_perm_b32 v4, s76, v4, v20
+; VI-NEXT: v_mov_b32_e32 v44, v5
+; VI-NEXT: v_perm_b32 v3, s28, v3, v20
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_mov_b32_e32 v5, s63
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s73
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
+; VI-NEXT: v_perm_b32 v5, s72, v5, v20
+; VI-NEXT: v_mov_b32_e32 v46, v6
+; VI-NEXT: v_perm_b32 v4, s74, v4, v20
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_mov_b32_e32 v6, s59
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s61
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
+; VI-NEXT: v_perm_b32 v6, s60, v6, v20
+; VI-NEXT: v_mov_b32_e32 v45, v7
+; VI-NEXT: v_perm_b32 v5, s62, v5, v20
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_mov_b32_e32 v7, s47
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s57
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
+; VI-NEXT: v_perm_b32 v7, s56, v7, v20
+; VI-NEXT: v_mov_b32_e32 v47, v40
+; VI-NEXT: v_mov_b32_e32 v40, v8
+; VI-NEXT: v_perm_b32 v6, s58, v6, v20
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_mov_b32_e32 v8, s43
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s45
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
+; VI-NEXT: v_perm_b32 v8, s44, v8, v20
+; VI-NEXT: v_mov_b32_e32 v43, v9
+; VI-NEXT: v_perm_b32 v7, s46, v7, v20
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s41
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
+; VI-NEXT: v_perm_b32 v9, s40, v9, v20
+; VI-NEXT: v_mov_b32_e32 v56, v41
+; VI-NEXT: v_mov_b32_e32 v41, v10
+; VI-NEXT: v_perm_b32 v8, s42, v8, v20
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_mov_b32_e32 v10, s11
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s13
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
+; VI-NEXT: v_perm_b32 v10, s12, v10, v20
+; VI-NEXT: v_mov_b32_e32 v42, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v20
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v12, s7
+; VI-NEXT: v_mov_b32_e32 v11, s7
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s9
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v20
+; VI-NEXT: v_perm_b32 v10, s10, v10, v20
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_e32 v10, v10, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v14, v13, s4
-; VI-NEXT: v_perm_b32 v11, s6, v15, v11
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_perm_b32 v12, v52, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v13, v54, v53, s4
-; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: v_perm_b32 v13, v48, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_perm_b32 v14, v50, v49, s4
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v36, v35, s4
+; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: v_perm_b32 v14, v52, v14, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_perm_b32 v15, v38, v37, s4
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v32, v16, s4
+; VI-NEXT: v_perm_b32 v15, v48, v15, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v16, v34, v33, s4
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v60, v17, s4
+; VI-NEXT: v_perm_b32 v16, v50, v16, s4
+; VI-NEXT: v_perm_b32 v18, v42, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_perm_b32 v17, v62, v61, s4
-; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_perm_b32 v17, v59, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_perm_b32 v18, v41, v40, s4
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_perm_b32 v18, v57, v19, s4
+; VI-NEXT: v_perm_b32 v17, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v19, v42, v58, s4
+; VI-NEXT: v_perm_b32 v19, v63, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v45, v20, s4
+; VI-NEXT: v_perm_b32 v19, v23, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_perm_b32 v20, v56, v47, s4
+; VI-NEXT: v_perm_b32 v23, v34, v33, s4
+; VI-NEXT: v_perm_b32 v24, v41, v43, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, s6, v11, v20
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v20, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v11, v11, v13
+; VI-NEXT: v_perm_b32 v13, v21, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v12, v12, v13
+; VI-NEXT: v_perm_b32 v13, v27, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_perm_b32 v20, v57, v28, s4
+; VI-NEXT: v_or_b32_e32 v13, v20, v13
+; VI-NEXT: v_perm_b32 v20, v55, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v20, v14
+; VI-NEXT: v_perm_b32 v20, v54, v53, s4
+; VI-NEXT: v_or_b32_e32 v15, v20, v15
+; VI-NEXT: v_perm_b32 v20, v39, v36, s4
+; VI-NEXT: v_or_b32_e32 v16, v20, v16
+; VI-NEXT: v_perm_b32 v20, v49, v38, s4
+; VI-NEXT: v_or_b32_e32 v17, v20, v17
+; VI-NEXT: v_perm_b32 v20, v62, v22, s4
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v44, v21, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v25, v58, s4
+; VI-NEXT: v_perm_b32 v22, v30, v31, s4
+; VI-NEXT: v_perm_b32 v25, v45, v46, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v26, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_perm_b32 v21, v46, v26, s4
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v31, v22, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v21, v37, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_perm_b32 v22, v24, v43, s4
; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v28, v23, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v32, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_perm_b32 v23, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v25, v63, s4
-; VI-NEXT: v_mov_b32_e32 v44, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v40, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_perm_b32 v24, v27, v55, s4
; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v57, v56
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v25, v24, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v24, v44, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_or_b32_e32 v25, v25, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_e32 v26, v26, v28
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v27, v27, v29
+; VI-NEXT: v_perm_b32 v29, v47, v56, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v29, v28, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v28, v59, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v30, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v29, v30, v29, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v46, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_perm_b32 v32, v33, v32, s4
+; VI-NEXT: v_or_b32_e32 v31, v32, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB75_3
; VI-NEXT: .LBB75_2:
-; VI-NEXT: v_mov_b32_e32 v57, v56
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_mov_b32_e32 v45, v26
-; VI-NEXT: v_mov_b32_e32 v44, v24
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT: .LBB75_3: ; %Flow
-; VI-NEXT: v_mov_b32_e32 v43, v44
-; VI-NEXT: v_mov_b32_e32 v44, v45
-; VI-NEXT: v_mov_b32_e32 v45, v47
-; VI-NEXT: v_mov_b32_e32 v46, v57
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
@@ -122281,11 +123185,11 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: v_mov_b32_e32 v0, s17
-; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; VI-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: v_perm_b32 v0, s16, v0, v11
-; VI-NEXT: v_perm_b32 v1, s18, v1, v11
+; VI-NEXT: v_perm_b32 v0, s16, v0, v12
+; VI-NEXT: v_perm_b32 v1, s18, v1, v12
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122293,8 +123197,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v1, s21
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: v_mov_b32_e32 v2, s23
-; VI-NEXT: v_perm_b32 v1, s20, v1, v11
-; VI-NEXT: v_perm_b32 v2, s22, v2, v11
+; VI-NEXT: v_perm_b32 v1, s20, v1, v12
+; VI-NEXT: v_perm_b32 v2, s22, v2, v12
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122302,8 +123206,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v2, s25
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: v_mov_b32_e32 v3, s27
-; VI-NEXT: v_perm_b32 v2, s24, v2, v11
-; VI-NEXT: v_perm_b32 v3, s26, v3, v11
+; VI-NEXT: v_perm_b32 v2, s24, v2, v12
+; VI-NEXT: v_perm_b32 v3, s26, v3, v12
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122311,8 +123215,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: s_add_i32 s76, s76, 3
; VI-NEXT: v_mov_b32_e32 v4, s75
-; VI-NEXT: v_perm_b32 v3, s28, v3, v11
-; VI-NEXT: v_perm_b32 v4, s76, v4, v11
+; VI-NEXT: v_perm_b32 v3, s28, v3, v12
+; VI-NEXT: v_perm_b32 v4, s76, v4, v12
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122320,8 +123224,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v4, s73
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: v_mov_b32_e32 v5, s63
-; VI-NEXT: v_perm_b32 v4, s74, v4, v11
-; VI-NEXT: v_perm_b32 v5, s72, v5, v11
+; VI-NEXT: v_perm_b32 v4, s74, v4, v12
+; VI-NEXT: v_perm_b32 v5, s72, v5, v12
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122329,8 +123233,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v5, s61
; VI-NEXT: s_add_i32 s60, s60, 3
; VI-NEXT: v_mov_b32_e32 v6, s59
-; VI-NEXT: v_perm_b32 v5, s62, v5, v11
-; VI-NEXT: v_perm_b32 v6, s60, v6, v11
+; VI-NEXT: v_perm_b32 v5, s62, v5, v12
+; VI-NEXT: v_perm_b32 v6, s60, v6, v12
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122338,8 +123242,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v6, s57
; VI-NEXT: s_add_i32 s56, s56, 3
; VI-NEXT: v_mov_b32_e32 v7, s47
-; VI-NEXT: v_perm_b32 v6, s58, v6, v11
-; VI-NEXT: v_perm_b32 v7, s56, v7, v11
+; VI-NEXT: v_perm_b32 v6, s58, v6, v12
+; VI-NEXT: v_perm_b32 v7, s56, v7, v12
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122347,8 +123251,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v7, s45
; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: v_mov_b32_e32 v8, s43
-; VI-NEXT: v_perm_b32 v7, s46, v7, v11
-; VI-NEXT: v_perm_b32 v8, s44, v8, v11
+; VI-NEXT: v_perm_b32 v7, s46, v7, v12
+; VI-NEXT: v_perm_b32 v8, s44, v8, v12
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122356,8 +123260,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v8, s41
; VI-NEXT: s_add_i32 s40, s40, 3
; VI-NEXT: v_mov_b32_e32 v9, s15
-; VI-NEXT: v_perm_b32 v8, s42, v8, v11
-; VI-NEXT: v_perm_b32 v9, s40, v9, v11
+; VI-NEXT: v_perm_b32 v8, s42, v8, v12
+; VI-NEXT: v_perm_b32 v9, s40, v9, v12
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -122365,37 +123269,23 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_mov_b32_e32 v9, s13
; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: v_mov_b32_e32 v10, s11
-; VI-NEXT: v_perm_b32 v9, s14, v9, v11
-; VI-NEXT: v_perm_b32 v10, s12, v10, v11
+; VI-NEXT: v_perm_b32 v9, s14, v9, v12
+; VI-NEXT: v_perm_b32 v10, s12, v10, v12
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: s_add_i32 s10, s10, 3
; VI-NEXT: v_mov_b32_e32 v10, s9
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_mov_b32_e32 v12, s7
-; VI-NEXT: v_perm_b32 v10, s10, v10, v11
-; VI-NEXT: v_perm_b32 v12, s8, v12, v11
+; VI-NEXT: v_mov_b32_e32 v11, s7
+; VI-NEXT: v_perm_b32 v10, s10, v10, v12
+; VI-NEXT: v_perm_b32 v11, s8, v11, v12
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v32
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v14, v14, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v15, v15, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -122407,254 +123297,337 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v11, s6, v12, v11
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11
-; VI-NEXT: v_perm_b32 v16, v16, v17, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60
-; VI-NEXT: v_perm_b32 v17, v17, v18, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v57
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v18, v18, v19, s4
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v19
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52
-; VI-NEXT: v_perm_b32 v12, v12, v53, s4
-; VI-NEXT: v_perm_b32 v13, v13, v51, s4
+; VI-NEXT: v_perm_b32 v12, s6, v11, v12
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50
-; VI-NEXT: v_perm_b32 v13, v13, v49, s4
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
-; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v14, v14, v37, s4
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
-; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v15, v15, v33, s4
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
-; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v16, v16, v61, s4
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
-; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41
-; VI-NEXT: v_perm_b32 v17, v17, v40, s4
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
-; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42
-; VI-NEXT: v_perm_b32 v18, v18, v47, s4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v11
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v13, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v12, s4
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v12
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v14, v12, s4
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v13
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v15, v13, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v14, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v14
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v16, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; VI-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v15
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v17, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v16
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v18, v16, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v17, s4
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v17
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v19, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v19, v19, v20, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v19, v18, s4
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20
-; VI-NEXT: v_perm_b32 v20, v20, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45
-; VI-NEXT: v_perm_b32 v20, v20, v44, s4
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v18
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v20, v18, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v20, v20, v19, s4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v19
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v19, v21, v19, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43
-; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v22, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v21, v20, s4
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v20
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v20, v22, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v22, v22, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v24, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v23, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x300, v23
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v24
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v22
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v24, v24, v25, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v24, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; VI-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v24, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v23, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v25
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v23
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v25, v26, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v25, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v25, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v26, v24, s4
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v26, v25, s4
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v25
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v27, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v26, v27, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26
+; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v26
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v26, v28, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v27, v28, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v28, v27, s4
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v27
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v28, vcc, 3, v28
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v28, v29, v28, s4
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v30, v28, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v29
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v31, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v29, v30, s4
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
+; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v30, v32, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v30, v31, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
+; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31
+; VI-NEXT: v_perm_b32 v31, v32, v31, s4
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v31, v32, s4
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
+; VI-NEXT: v_add_u32_e32 v33, vcc, 3, v31
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32
-; VI-NEXT: v_perm_b32 v32, v32, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; VI-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_perm_b32 v31, v33, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB75_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
@@ -122695,15 +123668,17 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_readfirstlane_b32 s45, v15
-; GFX9-NEXT: v_readfirstlane_b32 s46, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
; GFX9-NEXT: v_readfirstlane_b32 s76, v0
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:4
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s73, v3
+; GFX9-NEXT: v_readfirstlane_b32 s47, v13
+; GFX9-NEXT: v_readfirstlane_b32 s61, v7
+; GFX9-NEXT: v_readfirstlane_b32 s62, v6
+; GFX9-NEXT: v_readfirstlane_b32 s63, v5
+; GFX9-NEXT: v_readfirstlane_b32 s58, v10
+; GFX9-NEXT: v_readfirstlane_b32 s59, v9
+; GFX9-NEXT: v_readfirstlane_b32 s60, v8
; GFX9-NEXT: v_readfirstlane_b32 s6, v30
; GFX9-NEXT: v_readfirstlane_b32 s7, v29
; GFX9-NEXT: v_readfirstlane_b32 s8, v28
@@ -122719,487 +123694,447 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_readfirstlane_b32 s42, v18
; GFX9-NEXT: v_readfirstlane_b32 s43, v17
; GFX9-NEXT: v_readfirstlane_b32 s44, v16
+; GFX9-NEXT: v_readfirstlane_b32 s45, v15
+; GFX9-NEXT: v_readfirstlane_b32 s46, v14
; GFX9-NEXT: v_readfirstlane_b32 s56, v12
; GFX9-NEXT: v_readfirstlane_b32 s57, v11
-; GFX9-NEXT: v_readfirstlane_b32 s58, v10
-; GFX9-NEXT: v_readfirstlane_b32 s59, v9
-; GFX9-NEXT: v_readfirstlane_b32 s60, v8
-; GFX9-NEXT: v_readfirstlane_b32 s61, v7
-; GFX9-NEXT: v_readfirstlane_b32 s62, v6
-; GFX9-NEXT: v_readfirstlane_b32 s63, v5
; GFX9-NEXT: v_readfirstlane_b32 s72, v4
-; GFX9-NEXT: v_readfirstlane_b32 s73, v3
; GFX9-NEXT: v_readfirstlane_b32 s74, v2
; GFX9-NEXT: v_readfirstlane_b32 s75, v1
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:320
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:304
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:284
+; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:264
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
-; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:200
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:196
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:192
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:184
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:180
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:176
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:164
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:160
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:148
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:144
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:140
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:136
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(47)
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(46)
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(43)
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(55)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(54)
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(51)
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(49)
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(52)
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(60)
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(61)
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(62)
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB75_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX9-NEXT: v_or_b32_e32 v1, v2, v3
+; GFX9-NEXT: v_mov_b32_e32 v20, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v4, s23
+; GFX9-NEXT: v_mov_b32_e32 v2, s19
+; GFX9-NEXT: v_mov_b32_e32 v3, s21
+; GFX9-NEXT: v_perm_b32 v4, s22, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v13, s17
+; GFX9-NEXT: v_perm_b32 v2, s18, v2, v20
+; GFX9-NEXT: v_perm_b32 v3, s20, v3, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX9-NEXT: v_perm_b32 v13, s16, v13, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_mov_b32_e32 v19, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v3, s27
+; GFX9-NEXT: v_mov_b32_e32 v22, v0
+; GFX9-NEXT: v_or_b32_e32 v0, v13, v2
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v20
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
; GFX9-NEXT: v_or_b32_e32 v2, v2, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v20
+; GFX9-NEXT: v_mov_b32_e32 v44, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s63
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_mov_b32_e32 v4, s73
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v20
+; GFX9-NEXT: v_mov_b32_e32 v46, v6
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s59
; GFX9-NEXT: v_or_b32_e32 v4, v4, v5
; GFX9-NEXT: v_mov_b32_e32 v5, s61
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v20
+; GFX9-NEXT: v_mov_b32_e32 v45, v7
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s47
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: v_mov_b32_e32 v6, s57
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v20
+; GFX9-NEXT: v_mov_b32_e32 v47, v40
+; GFX9-NEXT: v_mov_b32_e32 v40, v8
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s43
; GFX9-NEXT: v_or_b32_e32 v6, v6, v7
; GFX9-NEXT: v_mov_b32_e32 v7, s45
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v20
+; GFX9-NEXT: v_mov_b32_e32 v43, v9
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: v_mov_b32_e32 v8, s41
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v20
+; GFX9-NEXT: v_mov_b32_e32 v56, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v10
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_mov_b32_e32 v10, s11
; GFX9-NEXT: v_or_b32_e32 v8, v8, v9
; GFX9-NEXT: v_mov_b32_e32 v9, s13
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v20
+; GFX9-NEXT: v_mov_b32_e32 v42, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v20
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: v_mov_b32_e32 v10, s9
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v20
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v20
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_or_b32_e32 v10, v10, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_or_b32_e32 v10, v10, v12
-; GFX9-NEXT: v_perm_b32 v12, v14, v13, s4
-; GFX9-NEXT: v_perm_b32 v11, s6, v15, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
-; GFX9-NEXT: v_perm_b32 v12, v52, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v54, v53, s4
-; GFX9-NEXT: v_or_b32_e32 v12, v13, v12
-; GFX9-NEXT: v_perm_b32 v13, v48, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_perm_b32 v14, v50, v49, s4
-; GFX9-NEXT: v_or_b32_e32 v13, v14, v13
-; GFX9-NEXT: v_perm_b32 v14, v36, v35, s4
+; GFX9-NEXT: v_perm_b32 v12, v12, v61, s4
+; GFX9-NEXT: v_perm_b32 v14, v52, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v38, v37, s4
-; GFX9-NEXT: v_or_b32_e32 v14, v15, v14
-; GFX9-NEXT: v_perm_b32 v15, v32, v16, s4
+; GFX9-NEXT: v_perm_b32 v15, v32, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v34, v33, s4
-; GFX9-NEXT: v_or_b32_e32 v15, v16, v15
-; GFX9-NEXT: v_perm_b32 v16, v60, v17, s4
+; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
+; GFX9-NEXT: v_perm_b32 v18, v42, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v17, v62, v61, s4
-; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
-; GFX9-NEXT: v_perm_b32 v17, v59, v18, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v18, v41, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v17, v18, v17
-; GFX9-NEXT: v_perm_b32 v18, v57, v19, s4
+; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v42, v58, s4
+; GFX9-NEXT: v_perm_b32 v19, v63, v19, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v18, v19, v18
-; GFX9-NEXT: v_perm_b32 v19, v45, v20, s4
+; GFX9-NEXT: v_perm_b32 v19, v23, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v56, v47, s4
+; GFX9-NEXT: v_perm_b32 v23, v34, v33, s4
+; GFX9-NEXT: v_perm_b32 v24, v41, v43, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, s6, v11, v20
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v20, v13, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
+; GFX9-NEXT: v_perm_b32 v13, v21, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v13
+; GFX9-NEXT: v_perm_b32 v13, v27, v29, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_perm_b32 v20, v57, v28, s4
+; GFX9-NEXT: v_or_b32_e32 v13, v20, v13
+; GFX9-NEXT: v_perm_b32 v20, v55, v48, s4
+; GFX9-NEXT: v_or_b32_e32 v14, v20, v14
+; GFX9-NEXT: v_perm_b32 v20, v54, v39, s4
+; GFX9-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX9-NEXT: v_perm_b32 v20, v36, v50, s4
+; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
+; GFX9-NEXT: v_perm_b32 v20, v49, v38, s4
+; GFX9-NEXT: v_or_b32_e32 v17, v20, v17
+; GFX9-NEXT: v_perm_b32 v20, v62, v22, s4
; GFX9-NEXT: v_or_b32_e32 v19, v20, v19
-; GFX9-NEXT: v_perm_b32 v20, v44, v21, s4
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v25, v58, s4
+; GFX9-NEXT: v_perm_b32 v22, v30, v31, s4
+; GFX9-NEXT: v_perm_b32 v25, v45, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v26, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v46, v26, s4
; GFX9-NEXT: v_or_b32_e32 v20, v21, v20
-; GFX9-NEXT: v_perm_b32 v21, v31, v22, s4
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v37, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v24, v43, s4
; GFX9-NEXT: v_or_b32_e32 v21, v22, v21
-; GFX9-NEXT: v_perm_b32 v22, v28, v23, s4
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v51, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: v_perm_b32 v23, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v22, v23, v22
-; GFX9-NEXT: v_perm_b32 v23, v25, v63, s4
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v40, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX9-NEXT: v_perm_b32 v24, v27, v55, s4
; GFX9-NEXT: v_or_b32_e32 v23, v24, v23
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v25, v24, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
; GFX9-NEXT: v_or_b32_e32 v24, v25, v24
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX9-NEXT: v_or_b32_e32 v25, v25, v27
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v26, v25
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v26, v27, v26, s4
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v28
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: v_or_b32_e32 v26, v27, v26
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_or_b32_e32 v27, v28, v27
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_e32 v27, v27, v29
+; GFX9-NEXT: v_perm_b32 v29, v47, v56, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v28, v59, v28, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
; GFX9-NEXT: v_or_b32_e32 v28, v29, v28
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
; GFX9-NEXT: v_or_b32_e32 v29, v30, v29
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
; GFX9-NEXT: v_or_b32_e32 v30, v31, v30
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v43, v31, s4
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v43, v46, v43, s4
-; GFX9-NEXT: v_or_b32_e32 v31, v43, v31
+; GFX9-NEXT: v_perm_b32 v32, v33, v32, s4
+; GFX9-NEXT: v_or_b32_e32 v31, v32, v31
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB75_3
; GFX9-NEXT: .LBB75_2:
-; GFX9-NEXT: v_mov_b32_e32 v57, v56
-; GFX9-NEXT: v_mov_b32_e32 v47, v46
-; GFX9-NEXT: v_mov_b32_e32 v45, v26
-; GFX9-NEXT: v_mov_b32_e32 v44, v24
; GFX9-NEXT: s_mov_b64 s[4:5], -1
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB75_3: ; %Flow
-; GFX9-NEXT: v_mov_b32_e32 v43, v44
-; GFX9-NEXT: v_mov_b32_e32 v44, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v47
-; GFX9-NEXT: v_mov_b32_e32 v46, v57
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
@@ -123207,18 +124142,18 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
+; GFX9-NEXT: v_mov_b32_e32 v12, 0xc0c0004
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: s_add_i32 s20, s20, 3
; GFX9-NEXT: v_mov_b32_e32 v2, s21
; GFX9-NEXT: s_add_i32 s22, s22, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
+; GFX9-NEXT: v_perm_b32 v0, s16, v0, v12
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
+; GFX9-NEXT: v_perm_b32 v1, s18, v1, v12
+; GFX9-NEXT: v_perm_b32 v2, s20, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s22, v3, v12
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
@@ -123229,8 +124164,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v2, s25
; GFX9-NEXT: s_add_i32 s26, s26, 3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v12
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v12
; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2
; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123238,8 +124173,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v3, s29
; GFX9-NEXT: s_add_i32 s76, s76, 3
; GFX9-NEXT: v_mov_b32_e32 v4, s75
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
-; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v12
+; GFX9-NEXT: v_perm_b32 v4, s76, v4, v12
; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3
; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123247,8 +124182,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v4, s73
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: v_mov_b32_e32 v5, s63
-; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11
-; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11
+; GFX9-NEXT: v_perm_b32 v4, s74, v4, v12
+; GFX9-NEXT: v_perm_b32 v5, s72, v5, v12
; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4
; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123256,8 +124191,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v5, s61
; GFX9-NEXT: s_add_i32 s60, s60, 3
; GFX9-NEXT: v_mov_b32_e32 v6, s59
-; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11
-; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11
+; GFX9-NEXT: v_perm_b32 v5, s62, v5, v12
+; GFX9-NEXT: v_perm_b32 v6, s60, v6, v12
; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5
; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123265,8 +124200,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v6, s57
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: v_mov_b32_e32 v7, s47
-; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11
-; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11
+; GFX9-NEXT: v_perm_b32 v6, s58, v6, v12
+; GFX9-NEXT: v_perm_b32 v7, s56, v7, v12
; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6
; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123274,8 +124209,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v7, s45
; GFX9-NEXT: s_add_i32 s44, s44, 3
; GFX9-NEXT: v_mov_b32_e32 v8, s43
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v12
+; GFX9-NEXT: v_perm_b32 v8, s44, v8, v12
; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7
; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123283,8 +124218,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v8, s41
; GFX9-NEXT: s_add_i32 s40, s40, 3
; GFX9-NEXT: v_mov_b32_e32 v9, s15
-; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11
-; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11
+; GFX9-NEXT: v_perm_b32 v8, s42, v8, v12
+; GFX9-NEXT: v_perm_b32 v9, s40, v9, v12
; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8
; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
@@ -123292,267 +124227,334 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v9, s13
; GFX9-NEXT: s_add_i32 s12, s12, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s11
-; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11
-; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11
+; GFX9-NEXT: v_perm_b32 v9, s14, v9, v12
+; GFX9-NEXT: v_perm_b32 v10, s12, v10, v12
; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9
; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: s_add_i32 s10, s10, 3
; GFX9-NEXT: v_mov_b32_e32 v10, s9
; GFX9-NEXT: s_add_i32 s8, s8, 3
-; GFX9-NEXT: v_mov_b32_e32 v12, s7
-; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11
-; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v11, s7
+; GFX9-NEXT: v_perm_b32 v10, s10, v10, v12
+; GFX9-NEXT: v_perm_b32 v11, s8, v11, v12
; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: s_waitcnt vmcnt(18)
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v32
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s6, s6, 3
-; GFX9-NEXT: s_waitcnt vmcnt(10)
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v48
-; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v36
-; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(17)
-; GFX9-NEXT: v_perm_b32 v16, v16, v17, s5
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v60
-; GFX9-NEXT: s_waitcnt vmcnt(16)
-; GFX9-NEXT: v_perm_b32 v17, v17, v18, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v57
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v18, v18, v19, s5
-; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_perm_b32 v11, s6, v12, v11
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11
-; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v19
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v12
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s5
-; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v12, 3, v54
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v52
-; GFX9-NEXT: v_perm_b32 v12, v12, v53, s5
-; GFX9-NEXT: v_perm_b32 v13, v13, v51, s5
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, s6, v11, v12
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12
-; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v13, 3, v50
-; GFX9-NEXT: v_perm_b32 v13, v13, v49, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v11
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, v13, v11, s5
+; GFX9-NEXT: v_add_u32_sdwa v11, v11, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v13, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v13, v12, s5
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v14, 3, v38
-; GFX9-NEXT: v_perm_b32 v14, v14, v37, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v12
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, v14, v12, s5
+; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v14, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v14, v13, s5
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v15, 3, v34
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v13
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v15, v13, s5
+; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v15, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v15, v14, s5
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v16, 3, v62
-; GFX9-NEXT: v_perm_b32 v16, v16, v61, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v14
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v14, v16, v14, s5
+; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v16, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v15, s5
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v16
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v17, 3, v41
-; GFX9-NEXT: v_perm_b32 v17, v17, v40, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v17, v15, s5
+; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v17, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v17, v16, s5
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v18, 3, v42
-; GFX9-NEXT: v_perm_b32 v18, v18, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v16
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v18, v16, s5
+; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v18, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v18, v17, s5
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v18
-; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v19, 3, v46
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v19, v19, v20, s5
-; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v17
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v17, v19, v17, s5
+; GFX9-NEXT: v_add_u32_sdwa v17, v17, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v19, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v19, v19, v18, s5
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v19
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v20
-; GFX9-NEXT: v_perm_b32 v20, v20, v21, s5
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v20, 3, v45
-; GFX9-NEXT: v_perm_b32 v20, v20, v44, s5
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v18
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v18, v20, v18, s5
+; GFX9-NEXT: v_add_u32_sdwa v18, v18, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v20, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v20, v20, v19, s5
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v20
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v21
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v21, 3, v43
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v19
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v21, v21, v22, s5
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v19, v21, v19, s5
+; GFX9-NEXT: v_add_u32_sdwa v19, v19, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v21, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v21, v21, v20, s5
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v21
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v22, 3, v22
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v20
+; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v22, v22, v23, s5
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v20, v22, v20, s5
+; GFX9-NEXT: v_add_u32_sdwa v20, v20, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v22, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v22, v22, v21, s5
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v23, 3, v23
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v21
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v23, v23, v24, s5
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v21, v23, v21, s5
+; GFX9-NEXT: v_add_u32_sdwa v21, v21, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v23, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v23, v22, s5
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v23
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v24, 3, v24
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v22
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v24, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v24, v22, s5
+; GFX9-NEXT: v_add_u32_sdwa v22, v22, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v24, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v24, v23, s5
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v24
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v23
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v25, v23, s5
+; GFX9-NEXT: v_add_u32_sdwa v23, v23, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v25, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v25, v24, s5
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v24
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v24, v26, v24, s5
+; GFX9-NEXT: v_add_u32_sdwa v24, v24, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v26, 3, v25
; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v25, 3, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s5
+; GFX9-NEXT: v_perm_b32 v25, v26, v25, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v25
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v27, v25, s5
+; GFX9-NEXT: v_add_u32_sdwa v25, v25, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v25
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
-; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v27, 3, v26
; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v26, 3, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s5
+; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
+; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v26
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v26, v28, v26, s5
+; GFX9-NEXT: v_add_u32_sdwa v26, v26, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v26
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v28, 3, v27
; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v27, 3, v27
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v28, s5
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v27
+; GFX9-NEXT: v_perm_b32 v27, v28, v27, s5
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v29, v27, s5
+; GFX9-NEXT: v_add_u32_sdwa v27, v27, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v29, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
+; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v28, v30, v28, s5
; GFX9-NEXT: v_add_u32_sdwa v28, v28, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v28, 3, v28
+; GFX9-NEXT: v_or_b32_sdwa v28, v29, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v28, v28, v29, s5
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v28
+; GFX9-NEXT: v_add_u32_e32 v30, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_perm_b32 v29, v30, v29, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v29, v31, v29, s5
; GFX9-NEXT: v_add_u32_sdwa v29, v29, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v29, 3, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v29, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 3, v30
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
+; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v30, v32, v30, s5
; GFX9-NEXT: v_add_u32_sdwa v30, v30, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v30, 3, v30
+; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v30, v30, v31, s5
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v30
+; GFX9-NEXT: v_add_u32_e32 v32, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v31, 3, v31
+; GFX9-NEXT: v_perm_b32 v31, v32, v31, s5
+; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v31, v32, s5
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v31
+; GFX9-NEXT: v_add_u32_e32 v33, 3, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v32, 3, v32
-; GFX9-NEXT: v_perm_b32 v32, v32, v33, s5
-; GFX9-NEXT: v_add_u32_sdwa v32, v32, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX9-NEXT: v_perm_b32 v31, v33, v31, s5
+; GFX9-NEXT: v_add_u32_sdwa v31, v31, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX9-NEXT: .LBB75_5: ; %end
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -126098,93 +127100,96 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB77_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB77_3
; VI-NEXT: .LBB77_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB77_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB77_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; VI-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; VI-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; VI-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; VI-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; VI-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; VI-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; VI-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; VI-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; VI-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; VI-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; VI-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; VI-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; VI-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; VI-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; VI-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; VI-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; VI-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; VI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; VI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; VI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; VI-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; VI-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; VI-NEXT: s_branch .LBB77_6
; VI-NEXT: .LBB77_5:
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
; VI-NEXT: .LBB77_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -126213,93 +127218,96 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB77_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB77_3
; GFX9-NEXT: .LBB77_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB77_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB77_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; GFX9-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; GFX9-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; GFX9-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; GFX9-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; GFX9-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; GFX9-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; GFX9-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; GFX9-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; GFX9-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; GFX9-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; GFX9-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; GFX9-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; GFX9-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; GFX9-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; GFX9-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; GFX9-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; GFX9-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; GFX9-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; GFX9-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; GFX9-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; GFX9-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; GFX9-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; GFX9-NEXT: s_branch .LBB77_6
; GFX9-NEXT: .LBB77_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB77_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -129377,7 +130385,7 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -129399,98 +130407,85 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_writelane_b32 v63, s36, 2
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31
-; SI-NEXT: v_readfirstlane_b32 s90, v5
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi
-; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95
; SI-NEXT: v_readfirstlane_b32 s78, v7
-; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89
; SI-NEXT: v_readfirstlane_b32 s74, v9
-; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
; SI-NEXT: v_readfirstlane_b32 s72, v10
; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
; SI-NEXT: v_readfirstlane_b32 s62, v11
; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75
; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73
; SI-NEXT: v_readfirstlane_b32 s58, v13
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63
; SI-NEXT: v_readfirstlane_b32 s56, v14
; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61
-; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s92, v4
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92
+; SI-NEXT: v_readfirstlane_b32 s90, v5
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: v_readfirstlane_b32 s88, v6
+; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: v_readfirstlane_b32 s76, v8
+; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
; SI-NEXT: s_lshl_b32 s15, s24, 16
@@ -129512,490 +130507,427 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_lshl_b32 s60, s60, 16
; SI-NEXT: s_lshl_b32 s62, s62, 16
; SI-NEXT: s_lshl_b32 s72, s72, 16
; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s78, s78, 16
-; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
; SI-NEXT: s_lshl_b32 s30, s30, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s10
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s42
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB79_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, v1
-; SI-NEXT: v_mov_b32_e32 v43, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v37, v36
-; SI-NEXT: v_mov_b32_e32 v36, v47
-; SI-NEXT: v_mov_b32_e32 v50, v49
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v40, v41
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v48, v37
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v48
+; SI-NEXT: v_mov_b32_e32 v62, v35
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v18
+; SI-NEXT: v_mov_b32_e32 v29, v54
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v30, v46
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v2, v34
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(2) expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0
+; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v39, v33
; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v3, v17
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v4, v20
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v5, v19
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v39
+; SI-NEXT: v_lshr_b64 v[3:4], v[32:33], 16
+; SI-NEXT: v_mov_b32_e32 v4, v41
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[4:5], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v5, v26
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16
-; SI-NEXT: v_mov_b32_e32 v6, v13
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[5:6], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16
-; SI-NEXT: v_mov_b32_e32 v7, v31
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[6:7], v[25:26], 16
+; SI-NEXT: v_mov_b32_e32 v7, v24
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 16
; SI-NEXT: v_mov_b32_e32 v8, v23
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v44, v45
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9
-; SI-NEXT: v_mov_b32_e32 v9, v25
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16
-; SI-NEXT: v_mov_b32_e32 v10, v30
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v9, v13
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v33, v61
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v33
+; SI-NEXT: v_lshr_b64 v[10:11], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v13, v60
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v12
+; SI-NEXT: v_lshr_b64 v[11:12], v[59:60], 16
+; SI-NEXT: v_mov_b32_e32 v14, v59
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v15
+; SI-NEXT: v_mov_b32_e32 v60, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[58:59], 16
+; SI-NEXT: v_mov_b32_e32 v15, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v16
+; SI-NEXT: v_mov_b32_e32 v59, v14
+; SI-NEXT: v_lshr_b64 v[13:14], v[57:58], 16
+; SI-NEXT: v_mov_b32_e32 v16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
+; SI-NEXT: v_mov_b32_e32 v58, v15
+; SI-NEXT: v_lshr_b64 v[14:15], v[56:57], 16
+; SI-NEXT: v_mov_b32_e32 v17, v56
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
+; SI-NEXT: v_mov_b32_e32 v57, v16
+; SI-NEXT: v_lshr_b64 v[15:16], v[55:56], 16
+; SI-NEXT: v_mov_b32_e32 v56, v17
+; SI-NEXT: v_lshr_b64 v[16:17], v[51:52], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v20
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, v49
+; SI-NEXT: v_mov_b32_e32 v49, v44
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v11, v27
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v54
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v25
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12
-; SI-NEXT: v_mov_b32_e32 v12, v61
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v21
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16
-; SI-NEXT: v_mov_b32_e32 v13, v29
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16
-; SI-NEXT: v_mov_b32_e32 v14, v15
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v62, v39
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v22
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15
-; SI-NEXT: v_mov_b32_e32 v15, v60
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16
-; SI-NEXT: v_mov_b32_e32 v16, v33
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v50
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16
-; SI-NEXT: v_mov_b32_e32 v17, v57
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47
-; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
-; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16
-; SI-NEXT: v_mov_b32_e32 v20, v38
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
+; SI-NEXT: v_mov_b32_e32 v24, v53
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; SI-NEXT: v_mov_b32_e32 v39, v62
-; SI-NEXT: v_mov_b32_e32 v58, v56
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
-; SI-NEXT: v_mov_b32_e32 v21, v22
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16
-; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16
-; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53
-; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v45, v44
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v47, v36
-; SI-NEXT: v_mov_b32_e32 v36, v37
-; SI-NEXT: v_mov_b32_e32 v49, v50
-; SI-NEXT: v_mov_b32_e32 v51, v33
+; SI-NEXT: v_lshr_b64 v[24:25], v[53:54], 16
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v54, v29
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v31
+; SI-NEXT: v_mov_b32_e32 v31, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v30
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v26, v43
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[26:27], v[43:44], 16
+; SI-NEXT: v_mov_b32_e32 v27, v28
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16
-; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; SI-NEXT: v_mov_b32_e32 v37, v48
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v35
+; SI-NEXT: v_mov_b32_e32 v35, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[47:48], 16
+; SI-NEXT: v_mov_b32_e32 v44, v49
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[45:46], 16
+; SI-NEXT: v_mov_b32_e32 v46, v30
+; SI-NEXT: v_lshr_b64 v[29:30], v[49:50], 16
+; SI-NEXT: v_mov_b32_e32 v50, v31
+; SI-NEXT: v_lshr_b64 v[30:31], v[42:43], 16
; SI-NEXT: v_mov_b32_e32 v31, v61
-; SI-NEXT: v_mov_b32_e32 v41, v40
+; SI-NEXT: v_mov_b32_e32 v61, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v49, v42
; SI-NEXT: s_branch .LBB79_3
; SI-NEXT: .LBB79_2:
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, v59
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v58, v56
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v52, v40
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT: .LBB79_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v37, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v33, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v38, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v50, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v40, v56
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_cbranch_scc1 .LBB79_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v39
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v34, v56
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v61
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -130004,12 +130936,20 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
@@ -130018,9 +130958,9 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
@@ -130029,9 +130969,9 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
@@ -130040,71 +130980,30 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v60
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v59
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
@@ -130113,15 +131012,29 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v54
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
@@ -130130,9 +131043,9 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
@@ -130141,31 +131054,69 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v50
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v45
; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
; SI-NEXT: v_mov_b32_e32 v31, v32
@@ -130180,6 +131131,7 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
@@ -130191,7 +131143,7 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -133557,7 +134509,7 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -133589,13 +134541,8 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_writelane_b32 v63, s54, 12
; SI-NEXT: v_writelane_b32 v63, s55, 13
; SI-NEXT: v_writelane_b32 v63, s64, 14
-; SI-NEXT: v_writelane_b32 v63, s65, 15
-; SI-NEXT: v_writelane_b32 v63, s66, 16
-; SI-NEXT: v_writelane_b32 v63, s67, 17
-; SI-NEXT: v_writelane_b32 v63, s68, 18
-; SI-NEXT: v_writelane_b32 v63, s69, 19
-; SI-NEXT: v_writelane_b32 v63, s30, 20
-; SI-NEXT: v_writelane_b32 v63, s31, 21
+; SI-NEXT: v_writelane_b32 v63, s30, 15
+; SI-NEXT: v_writelane_b32 v63, s31, 16
; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: v_readfirstlane_b32 s45, v17
; SI-NEXT: v_readfirstlane_b32 s44, v16
@@ -133618,27 +134565,32 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB81_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s69, s45, 16
-; SI-NEXT: s_lshr_b32 s68, s43, 16
-; SI-NEXT: s_lshr_b32 s67, s41, 16
-; SI-NEXT: s_lshr_b32 s66, s15, 16
-; SI-NEXT: s_lshr_b32 s65, s13, 16
-; SI-NEXT: s_lshr_b32 s64, s11, 16
-; SI-NEXT: s_lshr_b32 s55, s9, 16
-; SI-NEXT: s_lshr_b32 s54, s7, 16
-; SI-NEXT: s_lshr_b32 s53, s5, 16
-; SI-NEXT: s_lshr_b32 s52, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s50, s25, 16
-; SI-NEXT: s_lshr_b32 s49, s23, 16
-; SI-NEXT: s_lshr_b32 s48, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s58, s27, 16
+; SI-NEXT: s_lshr_b32 s59, s25, 16
+; SI-NEXT: s_lshr_b32 s56, s17, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s62, s41, 16
+; SI-NEXT: s_lshr_b32 s63, s23, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
+; SI-NEXT: s_mov_b32 s77, s58
+; SI-NEXT: s_mov_b32 s61, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s64, s45, 16
+; SI-NEXT: s_lshr_b32 s55, s43, 16
+; SI-NEXT: s_lshr_b32 s54, s15, 16
+; SI-NEXT: s_lshr_b32 s53, s13, 16
+; SI-NEXT: s_lshr_b32 s52, s11, 16
+; SI-NEXT: s_lshr_b32 s51, s9, 16
+; SI-NEXT: s_lshr_b32 s50, s7, 16
+; SI-NEXT: s_lshr_b32 s49, s5, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s38, s19, 16
+; SI-NEXT: s_mov_b32 s57, s63
+; SI-NEXT: s_mov_b32 s59, s62
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16
@@ -133655,52 +134607,49 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: .LBB81_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: .LBB81_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s63, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s63, 1
; SI-NEXT: s_cbranch_scc1 .LBB81_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0
; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0
-; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v27
; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16
; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0
@@ -133728,28 +134677,27 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_lshr_b64 v[52:53], v[8:9], 16
; SI-NEXT: v_lshr_b64 v[53:54], v[6:7], 16
; SI-NEXT: v_lshr_b64 v[39:40], v[2:3], 16
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[40:41], v[0:1], 16
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v3
+; SI-NEXT: v_mov_b32_e32 v55, v47
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v19
; SI-NEXT: s_branch .LBB81_6
; SI-NEXT: .LBB81_5:
-; SI-NEXT: v_mov_b32_e32 v32, s68
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v32, s67
+; SI-NEXT: v_mov_b32_e32 v32, s64
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v3, s19
@@ -133782,21 +134730,28 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_mov_b32_e32 v26, s40
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: v_mov_b32_e32 v30, s44
-; SI-NEXT: v_mov_b32_e32 v41, s69
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v45, s66
-; SI-NEXT: v_mov_b32_e32 v46, s65
-; SI-NEXT: v_mov_b32_e32 v47, s64
-; SI-NEXT: v_mov_b32_e32 v56, s55
-; SI-NEXT: v_mov_b32_e32 v57, s54
-; SI-NEXT: v_mov_b32_e32 v58, s53
-; SI-NEXT: v_mov_b32_e32 v59, s52
-; SI-NEXT: v_mov_b32_e32 v60, s51
-; SI-NEXT: v_mov_b32_e32 v61, s50
-; SI-NEXT: v_mov_b32_e32 v62, s49
-; SI-NEXT: v_mov_b32_e32 v42, s48
-; SI-NEXT: v_mov_b32_e32 v43, s39
-; SI-NEXT: v_mov_b32_e32 v44, s38
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, s55
+; SI-NEXT: v_mov_b32_e32 v43, s59
+; SI-NEXT: v_mov_b32_e32 v44, s54
+; SI-NEXT: v_mov_b32_e32 v45, s53
+; SI-NEXT: v_mov_b32_e32 v46, s52
+; SI-NEXT: v_mov_b32_e32 v41, s51
+; SI-NEXT: v_mov_b32_e32 v47, s50
+; SI-NEXT: v_mov_b32_e32 v56, s49
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_mov_b32_e32 v57, s48
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_mov_b32_e32 v58, s77
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_mov_b32_e32 v59, s61
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_mov_b32_e32 v60, s57
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v61, s39
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v62, s38
+; SI-NEXT: v_mov_b32_e32 v55, s47
; SI-NEXT: v_mov_b32_e32 v40, s34
; SI-NEXT: v_mov_b32_e32 v39, s30
; SI-NEXT: v_mov_b32_e32 v54, vcc_lo
@@ -133819,44 +134774,44 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v39
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62
; SI-NEXT: v_or_b32_e32 v3, v3, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v39
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v39
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
; SI-NEXT: v_or_b32_e32 v7, v7, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v39
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
; SI-NEXT: v_or_b32_e32 v9, v9, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v39
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
; SI-NEXT: v_or_b32_e32 v11, v11, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v39
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
; SI-NEXT: v_or_b32_e32 v13, v13, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
; SI-NEXT: v_or_b32_e32 v14, v14, v39
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v15, v15, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
@@ -133869,22 +134824,25 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v55
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v44
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_or_b32_e32 v0, v0, v40
; SI-NEXT: v_or_b32_e32 v16, v16, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
; SI-NEXT: v_or_b32_e32 v18, v18, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v41
; SI-NEXT: v_or_b32_e32 v20, v20, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46
; SI-NEXT: v_or_b32_e32 v22, v22, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45
; SI-NEXT: v_or_b32_e32 v24, v24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_or_b32_e32 v30, v30, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_or_b32_e32 v26, v26, v34
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_or_b32_e32 v28, v28, v33
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -133900,15 +134858,13 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_or_b32_e32 v26, v26, v34
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v28, v28, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: v_or_b32_e32 v30, v30, v32
+; SI-NEXT: v_and_b32_e32 v32, 0xffff, v31
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
@@ -133916,21 +134872,16 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; SI-NEXT: v_readlane_b32 s30, v63, 20
+; SI-NEXT: v_readlane_b32 s30, v63, 15
; SI-NEXT: v_or_b32_e32 v1, v1, v55
; SI-NEXT: v_or_b32_e32 v17, v17, v39
; SI-NEXT: v_or_b32_e32 v19, v19, v38
; SI-NEXT: v_or_b32_e32 v21, v21, v37
; SI-NEXT: v_or_b32_e32 v23, v23, v36
; SI-NEXT: v_or_b32_e32 v25, v25, v35
-; SI-NEXT: v_or_b32_e32 v31, v31, v32
-; SI-NEXT: v_readlane_b32 s31, v63, 21
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
-; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_or_b32_e32 v27, v27, v34
+; SI-NEXT: v_or_b32_e32 v29, v29, v33
+; SI-NEXT: v_readlane_b32 s31, v63, 16
; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
; SI-NEXT: v_readlane_b32 s54, v63, 12
@@ -133946,14 +134897,11 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_or_b32_e32 v27, v27, v34
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_or_b32_e32 v29, v29, v33
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_or_b32_e32 v31, v32, v31
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -133972,93 +134920,96 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB81_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB81_3
; VI-NEXT: .LBB81_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB81_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB81_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; VI-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; VI-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; VI-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; VI-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; VI-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; VI-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; VI-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; VI-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; VI-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; VI-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; VI-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; VI-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; VI-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; VI-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; VI-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; VI-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; VI-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; VI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; VI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; VI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; VI-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; VI-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; VI-NEXT: s_branch .LBB81_6
; VI-NEXT: .LBB81_5:
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
; VI-NEXT: .LBB81_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -134087,93 +135038,96 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB81_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB81_3
; GFX9-NEXT: .LBB81_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB81_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB81_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; GFX9-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; GFX9-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; GFX9-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; GFX9-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; GFX9-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; GFX9-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; GFX9-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; GFX9-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; GFX9-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; GFX9-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; GFX9-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; GFX9-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; GFX9-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; GFX9-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; GFX9-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; GFX9-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; GFX9-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; GFX9-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; GFX9-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; GFX9-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; GFX9-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; GFX9-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; GFX9-NEXT: s_branch .LBB81_6
; GFX9-NEXT: .LBB81_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB81_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -135318,14 +136272,14 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_readfirstlane_b32 s92, v6
; SI-NEXT: v_readfirstlane_b32 s94, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
-; SI-NEXT: v_readfirstlane_b32 s30, v3
-; SI-NEXT: v_readfirstlane_b32 s34, v2
-; SI-NEXT: v_readfirstlane_b32 s70, v1
-; SI-NEXT: v_readfirstlane_b32 s81, v0
-; SI-NEXT: s_lshr_b32 s35, s29, 16
-; SI-NEXT: s_lshr_b32 s69, s28, 16
-; SI-NEXT: s_lshr_b32 s80, s27, 16
-; SI-NEXT: s_lshr_b32 s83, s26, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s31, v2
+; SI-NEXT: v_readfirstlane_b32 s69, v1
+; SI-NEXT: v_readfirstlane_b32 s80, v0
+; SI-NEXT: s_lshr_b32 s34, s29, 16
+; SI-NEXT: s_lshr_b32 s68, s28, 16
+; SI-NEXT: s_lshr_b32 s71, s27, 16
+; SI-NEXT: s_lshr_b32 s82, s26, 16
; SI-NEXT: s_lshr_b32 s84, s25, 16
; SI-NEXT: s_lshr_b32 s85, s24, 16
; SI-NEXT: s_lshr_b32 s86, s23, 16
@@ -135334,7 +136288,7 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: s_lshr_b32 s97, s20, 16
; SI-NEXT: s_lshr_b32 s98, s19, 16
; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s7, s17, 16
+; SI-NEXT: s_lshr_b32 s83, s17, 16
; SI-NEXT: s_lshr_b32 s9, s16, 16
; SI-NEXT: s_lshr_b32 s67, s6, 16
; SI-NEXT: s_lshr_b32 s66, s8, 16
@@ -135350,71 +136304,72 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s31, s30, 16
-; SI-NEXT: s_lshr_b32 s68, s34, 16
-; SI-NEXT: s_lshr_b32 s71, s70, 16
-; SI-NEXT: s_lshr_b32 s82, s81, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s4, 16
+; SI-NEXT: s_lshr_b32 s35, s31, 16
+; SI-NEXT: s_lshr_b32 s70, s69, 16
+; SI-NEXT: s_lshr_b32 s81, s80, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v35, s67, 0
; SI-NEXT: v_writelane_b32 v35, s66, 1
; SI-NEXT: s_cbranch_scc0 .LBB83_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s9, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s99, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s98, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s7, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s83, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s96, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s52, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s53, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -135461,6 +136416,7 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB83_3
; SI-NEXT: .LBB83_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB83_3: ; %Flow
@@ -135471,7 +136427,7 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s83
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -135543,7 +136499,7 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s83
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s82
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
@@ -135554,7 +136510,7 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s71
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
@@ -135563,11 +136519,11 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_or_b32_e32 v11, v13, v11
; SI-NEXT: v_cvt_f32_f16_e32 v13, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
@@ -135578,8 +136534,8 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v15, s29
; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s82
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s80
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -135587,11 +136543,11 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s70
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s35
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
@@ -135599,11 +136555,11 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v18, s31
; SI-NEXT: v_or_b32_e32 v15, v16, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v19, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v19, s7
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -136810,7 +137766,7 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -136842,13 +137798,8 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_writelane_b32 v63, s54, 12
; SI-NEXT: v_writelane_b32 v63, s55, 13
; SI-NEXT: v_writelane_b32 v63, s64, 14
-; SI-NEXT: v_writelane_b32 v63, s65, 15
-; SI-NEXT: v_writelane_b32 v63, s66, 16
-; SI-NEXT: v_writelane_b32 v63, s67, 17
-; SI-NEXT: v_writelane_b32 v63, s68, 18
-; SI-NEXT: v_writelane_b32 v63, s69, 19
-; SI-NEXT: v_writelane_b32 v63, s30, 20
-; SI-NEXT: v_writelane_b32 v63, s31, 21
+; SI-NEXT: v_writelane_b32 v63, s30, 15
+; SI-NEXT: v_writelane_b32 v63, s31, 16
; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: v_readfirstlane_b32 s45, v17
; SI-NEXT: v_readfirstlane_b32 s44, v16
@@ -136871,27 +137822,32 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB85_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s69, s45, 16
-; SI-NEXT: s_lshr_b32 s68, s43, 16
-; SI-NEXT: s_lshr_b32 s67, s41, 16
-; SI-NEXT: s_lshr_b32 s66, s15, 16
-; SI-NEXT: s_lshr_b32 s65, s13, 16
-; SI-NEXT: s_lshr_b32 s64, s11, 16
-; SI-NEXT: s_lshr_b32 s55, s9, 16
-; SI-NEXT: s_lshr_b32 s54, s7, 16
-; SI-NEXT: s_lshr_b32 s53, s5, 16
-; SI-NEXT: s_lshr_b32 s52, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s50, s25, 16
-; SI-NEXT: s_lshr_b32 s49, s23, 16
-; SI-NEXT: s_lshr_b32 s48, s21, 16
-; SI-NEXT: s_lshr_b32 s39, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s58, s27, 16
+; SI-NEXT: s_lshr_b32 s59, s25, 16
+; SI-NEXT: s_lshr_b32 s56, s17, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s62, s41, 16
+; SI-NEXT: s_lshr_b32 s63, s23, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
+; SI-NEXT: s_mov_b32 s77, s58
+; SI-NEXT: s_mov_b32 s61, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s64, s45, 16
+; SI-NEXT: s_lshr_b32 s55, s43, 16
+; SI-NEXT: s_lshr_b32 s54, s15, 16
+; SI-NEXT: s_lshr_b32 s53, s13, 16
+; SI-NEXT: s_lshr_b32 s52, s11, 16
+; SI-NEXT: s_lshr_b32 s51, s9, 16
+; SI-NEXT: s_lshr_b32 s50, s7, 16
+; SI-NEXT: s_lshr_b32 s49, s5, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s38, s19, 16
+; SI-NEXT: s_mov_b32 s57, s63
+; SI-NEXT: s_mov_b32 s59, s62
; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16
@@ -136908,52 +137864,49 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: .LBB85_2:
; SI-NEXT: s_mov_b64 s[36:37], -1
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: .LBB85_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s63, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s63, 1
; SI-NEXT: s_cbranch_scc1 .LBB85_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0
; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0
-; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v27
; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16
; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0
@@ -136981,28 +137934,27 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_lshr_b64 v[52:53], v[8:9], 16
; SI-NEXT: v_lshr_b64 v[53:54], v[6:7], 16
; SI-NEXT: v_lshr_b64 v[39:40], v[2:3], 16
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[40:41], v[0:1], 16
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v3
+; SI-NEXT: v_mov_b32_e32 v55, v47
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v19
; SI-NEXT: s_branch .LBB85_6
; SI-NEXT: .LBB85_5:
-; SI-NEXT: v_mov_b32_e32 v32, s68
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v32, s67
+; SI-NEXT: v_mov_b32_e32 v32, s64
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v3, s19
@@ -137035,21 +137987,28 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v26, s40
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: v_mov_b32_e32 v30, s44
-; SI-NEXT: v_mov_b32_e32 v41, s69
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v45, s66
-; SI-NEXT: v_mov_b32_e32 v46, s65
-; SI-NEXT: v_mov_b32_e32 v47, s64
-; SI-NEXT: v_mov_b32_e32 v56, s55
-; SI-NEXT: v_mov_b32_e32 v57, s54
-; SI-NEXT: v_mov_b32_e32 v58, s53
-; SI-NEXT: v_mov_b32_e32 v59, s52
-; SI-NEXT: v_mov_b32_e32 v60, s51
-; SI-NEXT: v_mov_b32_e32 v61, s50
-; SI-NEXT: v_mov_b32_e32 v62, s49
-; SI-NEXT: v_mov_b32_e32 v42, s48
-; SI-NEXT: v_mov_b32_e32 v43, s39
-; SI-NEXT: v_mov_b32_e32 v44, s38
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v42, s55
+; SI-NEXT: v_mov_b32_e32 v43, s59
+; SI-NEXT: v_mov_b32_e32 v44, s54
+; SI-NEXT: v_mov_b32_e32 v45, s53
+; SI-NEXT: v_mov_b32_e32 v46, s52
+; SI-NEXT: v_mov_b32_e32 v41, s51
+; SI-NEXT: v_mov_b32_e32 v47, s50
+; SI-NEXT: v_mov_b32_e32 v56, s49
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_mov_b32_e32 v57, s48
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_mov_b32_e32 v58, s77
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_mov_b32_e32 v59, s61
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_mov_b32_e32 v60, s57
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v61, s39
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v62, s38
+; SI-NEXT: v_mov_b32_e32 v55, s47
; SI-NEXT: v_mov_b32_e32 v40, s34
; SI-NEXT: v_mov_b32_e32 v39, s30
; SI-NEXT: v_mov_b32_e32 v54, vcc_lo
@@ -137072,44 +138031,44 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v39
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62
; SI-NEXT: v_or_b32_e32 v3, v3, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v39
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
; SI-NEXT: v_or_b32_e32 v5, v5, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v39
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
; SI-NEXT: v_or_b32_e32 v7, v7, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v39
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
; SI-NEXT: v_or_b32_e32 v9, v9, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v39
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
; SI-NEXT: v_or_b32_e32 v11, v11, v39
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_or_b32_e32 v12, v12, v39
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
; SI-NEXT: v_or_b32_e32 v13, v13, v39
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
; SI-NEXT: v_or_b32_e32 v14, v14, v39
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v15, v15, v39
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
@@ -137122,22 +138081,25 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v0, v0, v55
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v44
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_or_b32_e32 v0, v0, v40
; SI-NEXT: v_or_b32_e32 v16, v16, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
; SI-NEXT: v_or_b32_e32 v18, v18, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v41
; SI-NEXT: v_or_b32_e32 v20, v20, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46
; SI-NEXT: v_or_b32_e32 v22, v22, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45
; SI-NEXT: v_or_b32_e32 v24, v24, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v45
-; SI-NEXT: v_or_b32_e32 v30, v30, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
+; SI-NEXT: v_or_b32_e32 v26, v26, v34
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_or_b32_e32 v28, v28, v33
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -137153,15 +138115,13 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_or_b32_e32 v26, v26, v34
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v28, v28, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: v_or_b32_e32 v30, v30, v32
+; SI-NEXT: v_and_b32_e32 v32, 0xffff, v31
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
@@ -137169,21 +138129,16 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
-; SI-NEXT: v_readlane_b32 s30, v63, 20
+; SI-NEXT: v_readlane_b32 s30, v63, 15
; SI-NEXT: v_or_b32_e32 v1, v1, v55
; SI-NEXT: v_or_b32_e32 v17, v17, v39
; SI-NEXT: v_or_b32_e32 v19, v19, v38
; SI-NEXT: v_or_b32_e32 v21, v21, v37
; SI-NEXT: v_or_b32_e32 v23, v23, v36
; SI-NEXT: v_or_b32_e32 v25, v25, v35
-; SI-NEXT: v_or_b32_e32 v31, v31, v32
-; SI-NEXT: v_readlane_b32 s31, v63, 21
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
-; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_or_b32_e32 v27, v27, v34
+; SI-NEXT: v_or_b32_e32 v29, v29, v33
+; SI-NEXT: v_readlane_b32 s31, v63, 16
; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
; SI-NEXT: v_readlane_b32 s54, v63, 12
@@ -137199,14 +138154,11 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_or_b32_e32 v27, v27, v34
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_or_b32_e32 v29, v29, v33
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; SI-NEXT: v_or_b32_e32 v31, v32, v31
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -137225,93 +138177,96 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; VI-NEXT: v_writelane_b32 v32, s49, 5
; VI-NEXT: v_writelane_b32 v32, s50, 6
; VI-NEXT: v_writelane_b32 v32, s51, 7
-; VI-NEXT: v_writelane_b32 v32, s30, 8
-; VI-NEXT: v_writelane_b32 v32, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB85_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB85_3
; VI-NEXT: .LBB85_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB85_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB85_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; VI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; VI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; VI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; VI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; VI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; VI-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; VI-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; VI-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; VI-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; VI-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; VI-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; VI-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; VI-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; VI-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; VI-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; VI-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; VI-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; VI-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; VI-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; VI-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; VI-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; VI-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; VI-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; VI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; VI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; VI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; VI-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; VI-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; VI-NEXT: s_branch .LBB85_6
; VI-NEXT: .LBB85_5:
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
; VI-NEXT: .LBB85_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v32, 8
-; VI-NEXT: v_readlane_b32 s31, v32, 9
; VI-NEXT: v_readlane_b32 s51, v32, 7
; VI-NEXT: v_readlane_b32 s50, v32, 6
; VI-NEXT: v_readlane_b32 s49, v32, 5
@@ -137340,93 +138295,96 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a,
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB85_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB85_3
; GFX9-NEXT: .LBB85_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB85_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB85_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_f64 v[14:15], s[30:31], 1.0
-; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
-; GFX9-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; GFX9-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; GFX9-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; GFX9-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
-; GFX9-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
-; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
-; GFX9-NEXT: v_add_f64 v[30:31], s[50:51], 1.0
-; GFX9-NEXT: v_add_f64 v[28:29], s[48:49], 1.0
-; GFX9-NEXT: v_add_f64 v[26:27], s[46:47], 1.0
-; GFX9-NEXT: v_add_f64 v[24:25], s[44:45], 1.0
-; GFX9-NEXT: v_add_f64 v[22:23], s[42:43], 1.0
-; GFX9-NEXT: v_add_f64 v[20:21], s[40:41], 1.0
-; GFX9-NEXT: v_add_f64 v[18:19], s[38:39], 1.0
-; GFX9-NEXT: v_add_f64 v[16:17], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[14:15], s[50:51], 1.0
+; GFX9-NEXT: v_add_f64 v[12:13], s[48:49], 1.0
+; GFX9-NEXT: v_add_f64 v[10:11], s[46:47], 1.0
+; GFX9-NEXT: v_add_f64 v[8:9], s[44:45], 1.0
+; GFX9-NEXT: v_add_f64 v[6:7], s[42:43], 1.0
+; GFX9-NEXT: v_add_f64 v[4:5], s[40:41], 1.0
+; GFX9-NEXT: v_add_f64 v[2:3], s[38:39], 1.0
+; GFX9-NEXT: v_add_f64 v[0:1], s[36:37], 1.0
+; GFX9-NEXT: v_add_f64 v[30:31], s[18:19], 1.0
+; GFX9-NEXT: v_add_f64 v[28:29], s[16:17], 1.0
+; GFX9-NEXT: v_add_f64 v[26:27], s[14:15], 1.0
+; GFX9-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
+; GFX9-NEXT: v_add_f64 v[22:23], s[10:11], 1.0
+; GFX9-NEXT: v_add_f64 v[20:21], s[8:9], 1.0
+; GFX9-NEXT: v_add_f64 v[18:19], s[6:7], 1.0
+; GFX9-NEXT: v_add_f64 v[16:17], s[4:5], 1.0
; GFX9-NEXT: s_branch .LBB85_6
; GFX9-NEXT: .LBB85_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB85_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -138400,25 +139358,25 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s91, v7
; SI-NEXT: v_readfirstlane_b32 s94, v6
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v5
-; SI-NEXT: v_readfirstlane_b32 s34, v4
-; SI-NEXT: v_readfirstlane_b32 s70, v3
-; SI-NEXT: v_readfirstlane_b32 s81, v2
-; SI-NEXT: v_readfirstlane_b32 s84, v1
-; SI-NEXT: v_readfirstlane_b32 s87, v0
+; SI-NEXT: v_readfirstlane_b32 s31, v4
+; SI-NEXT: v_readfirstlane_b32 s69, v3
+; SI-NEXT: v_readfirstlane_b32 s80, v2
+; SI-NEXT: v_readfirstlane_b32 s83, v1
+; SI-NEXT: v_readfirstlane_b32 s86, v0
; SI-NEXT: s_lshr_b32 s92, s29, 16
; SI-NEXT: s_lshr_b32 s95, s28, 16
-; SI-NEXT: s_lshr_b32 s30, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s69, s25, 16
-; SI-NEXT: s_lshr_b32 s71, s24, 16
-; SI-NEXT: s_lshr_b32 s82, s23, 16
-; SI-NEXT: s_lshr_b32 s85, s22, 16
-; SI-NEXT: s_lshr_b32 s96, s21, 16
-; SI-NEXT: s_lshr_b32 s97, s20, 16
-; SI-NEXT: s_lshr_b32 s98, s19, 16
-; SI-NEXT: s_lshr_b32 s99, s18, 16
-; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: s_lshr_b32 s8, s16, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s68, s25, 16
+; SI-NEXT: s_lshr_b32 s70, s24, 16
+; SI-NEXT: s_lshr_b32 s81, s23, 16
+; SI-NEXT: s_lshr_b32 s84, s22, 16
+; SI-NEXT: s_lshr_b32 s87, s21, 16
+; SI-NEXT: s_lshr_b32 s96, s20, 16
+; SI-NEXT: s_lshr_b32 s97, s19, 16
+; SI-NEXT: s_lshr_b32 s98, s18, 16
+; SI-NEXT: s_lshr_b32 s99, s17, 16
+; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: s_lshr_b32 s67, s7, 16
; SI-NEXT: s_lshr_b32 s10, s9, 16
; SI-NEXT: s_lshr_b32 s12, s11, 16
@@ -138432,75 +139390,76 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s34, 16
-; SI-NEXT: s_lshr_b32 s68, s70, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s35, s69, 16
+; SI-NEXT: s_lshr_b32 s71, s80, 16
+; SI-NEXT: s_lshr_b32 s82, s83, 16
+; SI-NEXT: s_lshr_b32 s85, s86, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v33, s14, 0
; SI-NEXT: v_writelane_b32 v33, s63, 1
; SI-NEXT: s_cbranch_scc0 .LBB87_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: s_or_b32 s36, s5, s8
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s98, 16
+; SI-NEXT: s_or_b32 s38, s5, s8
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s97, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s6, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s41, s99, 16
+; SI-NEXT: s_or_b32 s39, s5, s8
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s96, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s8
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s87, 16
+; SI-NEXT: s_or_b32 s41, s5, s8
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s84, 16
+; SI-NEXT: s_or_b32 s42, s5, s8
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s81, 16
+; SI-NEXT: s_or_b32 s43, s5, s8
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s70, 16
+; SI-NEXT: s_or_b32 s44, s5, s8
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s68, 16
+; SI-NEXT: s_or_b32 s45, s5, s8
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s8
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_mov_b32 s8, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s47, s5, s4
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s52, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s53, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s54, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -138556,6 +139515,7 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_mov_b32 s14, s12
; SI-NEXT: s_mov_b32 s12, s10
; SI-NEXT: s_mov_b32 s10, s67
+; SI-NEXT: s_mov_b32 s8, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB87_3: ; %Flow
@@ -138566,62 +139526,62 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s99, 16
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_add_i32 s37, s5, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s98, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s96, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -138633,30 +139593,30 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_add_i32 s86, s86, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s83, s83, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
@@ -145668,6 +146628,7 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
@@ -145710,1271 +146671,1297 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: v_writelane_b32 v45, s99, 33
; SI-NEXT: v_writelane_b32 v45, s30, 34
; SI-NEXT: v_writelane_b32 v45, s31, 35
-; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
+; SI-NEXT: ; implicit-def: $vgpr56 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_writelane_b32 v47, s29, 0
-; SI-NEXT: v_writelane_b32 v47, s28, 1
-; SI-NEXT: v_writelane_b32 v47, s27, 2
-; SI-NEXT: v_writelane_b32 v47, s26, 3
-; SI-NEXT: v_writelane_b32 v47, s25, 4
-; SI-NEXT: v_writelane_b32 v47, s24, 5
-; SI-NEXT: v_writelane_b32 v47, s23, 6
-; SI-NEXT: v_writelane_b32 v47, s4, 7
+; SI-NEXT: v_writelane_b32 v56, s29, 0
+; SI-NEXT: v_writelane_b32 v56, s28, 1
+; SI-NEXT: v_writelane_b32 v56, s27, 2
+; SI-NEXT: v_writelane_b32 v56, s26, 3
+; SI-NEXT: v_writelane_b32 v56, s25, 4
+; SI-NEXT: v_writelane_b32 v56, s24, 5
+; SI-NEXT: v_writelane_b32 v56, s23, 6
+; SI-NEXT: v_writelane_b32 v56, s22, 7
+; SI-NEXT: v_writelane_b32 v56, s21, 8
+; SI-NEXT: v_writelane_b32 v56, s4, 9
; SI-NEXT: v_readfirstlane_b32 s4, v29
-; SI-NEXT: v_writelane_b32 v47, s4, 8
+; SI-NEXT: v_writelane_b32 v56, s4, 10
; SI-NEXT: v_readfirstlane_b32 s4, v28
-; SI-NEXT: v_writelane_b32 v47, s4, 9
+; SI-NEXT: v_writelane_b32 v56, s4, 11
; SI-NEXT: v_readfirstlane_b32 s4, v27
-; SI-NEXT: v_writelane_b32 v47, s4, 10
+; SI-NEXT: v_writelane_b32 v56, s4, 12
; SI-NEXT: v_readfirstlane_b32 s4, v26
-; SI-NEXT: v_writelane_b32 v47, s4, 11
+; SI-NEXT: v_writelane_b32 v56, s4, 13
; SI-NEXT: v_readfirstlane_b32 s4, v25
-; SI-NEXT: v_writelane_b32 v47, s4, 12
+; SI-NEXT: v_writelane_b32 v56, s4, 14
; SI-NEXT: v_readfirstlane_b32 s4, v24
-; SI-NEXT: v_writelane_b32 v47, s4, 13
+; SI-NEXT: v_writelane_b32 v56, s4, 15
; SI-NEXT: v_readfirstlane_b32 s4, v23
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332
-; SI-NEXT: v_writelane_b32 v47, s4, 14
+; SI-NEXT: s_mov_b32 s6, s19
+; SI-NEXT: v_writelane_b32 v56, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_writelane_b32 v47, s4, 15
+; SI-NEXT: v_readfirstlane_b32 s19, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:328
+; SI-NEXT: v_writelane_b32 v56, s4, 17
; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:320
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:316
-; SI-NEXT: v_writelane_b32 v47, s4, 16
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
+; SI-NEXT: v_writelane_b32 v56, s4, 18
; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:324
-; SI-NEXT: v_writelane_b32 v47, s4, 17
+; SI-NEXT: v_writelane_b32 v56, s4, 19
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v47, s4, 18
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_writelane_b32 v47, s4, 19
-; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_writelane_b32 v47, s4, 20
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: v_writelane_b32 v47, s4, 21
-; SI-NEXT: v_readfirstlane_b32 s4, v15
-; SI-NEXT: v_writelane_b32 v47, s4, 22
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v47, s4, 23
-; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_writelane_b32 v47, s4, 24
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: v_writelane_b32 v47, s4, 25
-; SI-NEXT: s_mov_b32 s7, s17
-; SI-NEXT: v_readfirstlane_b32 s17, v10
-; SI-NEXT: v_readfirstlane_b32 s9, v9
-; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:320
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:316
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:308
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:304
+; SI-NEXT: v_writelane_b32 v56, s4, 20
+; SI-NEXT: v_readfirstlane_b32 s75, v15
+; SI-NEXT: v_readfirstlane_b32 s44, v16
+; SI-NEXT: v_readfirstlane_b32 s27, v12
+; SI-NEXT: v_readfirstlane_b32 s52, v0
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:244
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
-; SI-NEXT: v_readfirstlane_b32 s55, v11
-; SI-NEXT: v_readfirstlane_b32 s15, v8
+; SI-NEXT: v_readfirstlane_b32 s89, v10
+; SI-NEXT: v_readfirstlane_b32 s62, v9
+; SI-NEXT: v_readfirstlane_b32 s92, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300
+; SI-NEXT: v_readfirstlane_b32 s88, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:296
+; SI-NEXT: v_readfirstlane_b32 s59, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:292
+; SI-NEXT: v_readfirstlane_b32 s77, v11
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:288
+; SI-NEXT: s_mov_b32 s7, s20
+; SI-NEXT: v_readfirstlane_b32 s79, v8
+; SI-NEXT: v_readfirstlane_b32 s12, v7
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:284
-; SI-NEXT: v_readfirstlane_b32 s67, v6
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264
+; SI-NEXT: v_readfirstlane_b32 s46, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
-; SI-NEXT: v_readfirstlane_b32 s51, v5
+; SI-NEXT: v_readfirstlane_b32 s22, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s23, v4
+; SI-NEXT: v_readfirstlane_b32 s36, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
-; SI-NEXT: v_readfirstlane_b32 s26, v3
+; SI-NEXT: v_readfirstlane_b32 s20, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: v_readfirstlane_b32 s65, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264
-; SI-NEXT: v_readfirstlane_b32 s69, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:304
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:296
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:292
-; SI-NEXT: s_mov_b32 s6, s19
+; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v23
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v1
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:248
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
+; SI-NEXT: v_readfirstlane_b32 s83, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232
-; SI-NEXT: v_readfirstlane_b32 s50, v22
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s31, v25
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224
+; SI-NEXT: v_readfirstlane_b32 s51, v19
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:220
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s10, v25
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:212
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:208
-; SI-NEXT: v_readfirstlane_b32 s49, v20
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:224
-; SI-NEXT: v_readfirstlane_b32 s80, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:68
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s81, v0
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s8, v22
+; SI-NEXT: v_writelane_b32 v56, s8, 21
+; SI-NEXT: v_readfirstlane_b32 s8, v20
+; SI-NEXT: v_writelane_b32 v56, s8, 22
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:184
+; SI-NEXT: v_readfirstlane_b32 s39, v12
+; SI-NEXT: v_readfirstlane_b32 s31, v0
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s5, v11
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:68
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
+; SI-NEXT: v_readfirstlane_b32 s5, v24
+; SI-NEXT: v_readfirstlane_b32 s8, v17
+; SI-NEXT: v_writelane_b32 v56, s8, 23
+; SI-NEXT: v_readfirstlane_b32 s8, v14
+; SI-NEXT: v_writelane_b32 v56, s8, 24
+; SI-NEXT: v_readfirstlane_b32 s8, v13
+; SI-NEXT: v_writelane_b32 v56, s8, 25
+; SI-NEXT: v_readfirstlane_b32 s8, v11
+; SI-NEXT: v_writelane_b32 v56, s8, 26
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:172
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
; SI-NEXT: v_readfirstlane_b32 s8, v8
-; SI-NEXT: v_writelane_b32 v47, s8, 26
+; SI-NEXT: v_readfirstlane_b32 s37, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
+; SI-NEXT: v_writelane_b32 v56, s8, 27
; SI-NEXT: v_readfirstlane_b32 s8, v6
-; SI-NEXT: v_writelane_b32 v47, s8, 27
+; SI-NEXT: v_writelane_b32 v56, s8, 28
; SI-NEXT: v_readfirstlane_b32 s8, v5
-; SI-NEXT: v_writelane_b32 v47, s8, 28
+; SI-NEXT: v_writelane_b32 v56, s8, 29
+; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_writelane_b32 v47, s8, 29
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_writelane_b32 v47, s8, 30
-; SI-NEXT: v_readfirstlane_b32 s8, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
-; SI-NEXT: v_readfirstlane_b32 s78, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: v_writelane_b32 v56, s8, 30
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
+; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148
; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 s68, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:172
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
-; SI-NEXT: v_readfirstlane_b32 s35, v13
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
-; SI-NEXT: v_readfirstlane_b32 s93, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:188
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 s53, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
-; SI-NEXT: v_readfirstlane_b32 s19, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:204
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: v_readfirstlane_b32 s14, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:196
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:196
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
-; SI-NEXT: v_writelane_b32 v47, s8, 31
-; SI-NEXT: v_writelane_b32 v47, s18, 32
-; SI-NEXT: v_writelane_b32 v47, s6, 33
-; SI-NEXT: v_writelane_b32 v47, s7, 34
-; SI-NEXT: v_writelane_b32 v47, s16, 35
-; SI-NEXT: v_writelane_b32 v47, s22, 36
-; SI-NEXT: v_writelane_b32 v47, s21, 37
-; SI-NEXT: v_writelane_b32 v47, s20, 38
-; SI-NEXT: v_writelane_b32 v47, s9, 39
-; SI-NEXT: v_writelane_b32 v47, s15, 40
-; SI-NEXT: v_writelane_b32 v47, s51, 41
-; SI-NEXT: v_writelane_b32 v47, s23, 42
-; SI-NEXT: v_writelane_b32 v47, s55, 43
-; SI-NEXT: v_readfirstlane_b32 s94, v9
+; SI-NEXT: v_writelane_b32 v56, s8, 31
+; SI-NEXT: v_readfirstlane_b32 s85, v9
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s30, v10
+; SI-NEXT: v_readfirstlane_b32 s35, v10
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:76
; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s89, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s54, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:44
+; SI-NEXT: v_readfirstlane_b32 s48, v18
+; SI-NEXT: v_readfirstlane_b32 s63, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: v_readfirstlane_b32 s64, v1
+; SI-NEXT: v_readfirstlane_b32 s38, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:36
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
+; SI-NEXT: v_readfirstlane_b32 s30, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:28
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:52
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
+; SI-NEXT: v_readfirstlane_b32 s82, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: v_readfirstlane_b32 s37, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:12
+; SI-NEXT: v_readfirstlane_b32 s78, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: v_readfirstlane_b32 s86, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:12
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s79, v29
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s61, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s57, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s59, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
+; SI-NEXT: v_readfirstlane_b32 s84, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:20
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_readfirstlane_b32 s38, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_writelane_b32 v47, s65, 44
-; SI-NEXT: v_writelane_b32 v47, s17, 45
-; SI-NEXT: v_writelane_b32 v47, s67, 46
-; SI-NEXT: v_writelane_b32 v47, s26, 47
-; SI-NEXT: v_writelane_b32 v47, vcc_hi, 48
-; SI-NEXT: v_writelane_b32 v47, s69, 49
-; SI-NEXT: v_writelane_b32 v47, s70, 50
-; SI-NEXT: v_readfirstlane_b32 s66, v25
-; SI-NEXT: v_readfirstlane_b32 s13, v12
-; SI-NEXT: v_readfirstlane_b32 s40, v52
-; SI-NEXT: v_readfirstlane_b32 s42, v0
-; SI-NEXT: v_readfirstlane_b32 s28, v53
-; SI-NEXT: v_readfirstlane_b32 s88, v7
-; SI-NEXT: v_readfirstlane_b32 s46, v39
-; SI-NEXT: v_readfirstlane_b32 s60, v2
-; SI-NEXT: v_readfirstlane_b32 s58, v48
-; SI-NEXT: v_readfirstlane_b32 s62, v3
-; SI-NEXT: v_readfirstlane_b32 s63, v37
-; SI-NEXT: v_readfirstlane_b32 s73, v38
-; SI-NEXT: v_readfirstlane_b32 s74, v5
-; SI-NEXT: v_readfirstlane_b32 s76, v35
-; SI-NEXT: v_readfirstlane_b32 s90, v36
-; SI-NEXT: v_readfirstlane_b32 s91, v4
-; SI-NEXT: v_readfirstlane_b32 s95, v8
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v33
-; SI-NEXT: v_readfirstlane_b32 s27, v34
-; SI-NEXT: v_readfirstlane_b32 s34, v6
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s72, v13
-; SI-NEXT: v_readfirstlane_b32 s75, v31
-; SI-NEXT: v_readfirstlane_b32 s45, v32
-; SI-NEXT: v_readfirstlane_b32 s25, v11
-; SI-NEXT: v_readfirstlane_b32 s24, v15
-; SI-NEXT: v_readfirstlane_b32 s77, v28
-; SI-NEXT: v_readfirstlane_b32 s12, v30
-; SI-NEXT: v_readfirstlane_b32 s36, v14
-; SI-NEXT: v_readfirstlane_b32 s52, v18
-; SI-NEXT: v_readfirstlane_b32 s92, v26
-; SI-NEXT: v_readfirstlane_b32 s39, v27
-; SI-NEXT: v_readfirstlane_b32 s48, v19
-; SI-NEXT: v_readfirstlane_b32 s44, v17
-; SI-NEXT: v_readfirstlane_b32 s61, v9
-; SI-NEXT: v_readfirstlane_b32 s47, v49
+; SI-NEXT: v_readfirstlane_b32 s11, v0
+; SI-NEXT: v_readfirstlane_b32 s8, v53
+; SI-NEXT: v_readfirstlane_b32 s24, v12
+; SI-NEXT: v_readfirstlane_b32 s29, v52
+; SI-NEXT: v_readfirstlane_b32 s97, v29
+; SI-NEXT: v_readfirstlane_b32 s98, v20
+; SI-NEXT: v_readfirstlane_b32 s49, v25
+; SI-NEXT: v_readfirstlane_b32 s73, v11
+; SI-NEXT: v_readfirstlane_b32 s96, v33
+; SI-NEXT: v_readfirstlane_b32 s26, v31
+; SI-NEXT: v_readfirstlane_b32 s94, v14
+; SI-NEXT: v_readfirstlane_b32 s72, v7
+; SI-NEXT: v_readfirstlane_b32 s58, v39
+; SI-NEXT: v_readfirstlane_b32 s81, v4
+; SI-NEXT: v_readfirstlane_b32 s60, v37
+; SI-NEXT: v_readfirstlane_b32 s47, v3
+; SI-NEXT: v_readfirstlane_b32 s76, v38
+; SI-NEXT: v_readfirstlane_b32 s91, v5
+; SI-NEXT: v_readfirstlane_b32 s21, v35
+; SI-NEXT: v_readfirstlane_b32 s57, v36
+; SI-NEXT: v_readfirstlane_b32 s87, v8
+; SI-NEXT: v_readfirstlane_b32 s99, v34
+; SI-NEXT: v_readfirstlane_b32 s90, v6
+; SI-NEXT: v_readfirstlane_b32 s28, v13
+; SI-NEXT: v_readfirstlane_b32 s25, v32
+; SI-NEXT: v_readfirstlane_b32 s74, v17
+; SI-NEXT: v_readfirstlane_b32 s93, v30
+; SI-NEXT: v_readfirstlane_b32 s23, v22
+; SI-NEXT: v_readfirstlane_b32 s50, v26
+; SI-NEXT: v_readfirstlane_b32 s95, v27
+; SI-NEXT: v_readfirstlane_b32 s34, v24
+; SI-NEXT: v_readfirstlane_b32 s45, v9
+; SI-NEXT: v_readfirstlane_b32 s15, v49
; SI-NEXT: v_readfirstlane_b32 s56, v10
-; SI-NEXT: v_readfirstlane_b32 s10, v51
-; SI-NEXT: v_readfirstlane_b32 s8, v21
-; SI-NEXT: v_readfirstlane_b32 s11, v54
+; SI-NEXT: v_readfirstlane_b32 s13, v51
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s9, v15
+; SI-NEXT: v_readfirstlane_b32 s69, v55
+; SI-NEXT: v_readfirstlane_b32 s68, v21
+; SI-NEXT: v_writelane_b32 v47, s68, 0
+; SI-NEXT: v_readfirstlane_b32 s70, v40
+; SI-NEXT: v_writelane_b32 v47, s69, 1
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s29, v16
-; SI-NEXT: v_writelane_b32 v46, s11, 0
-; SI-NEXT: v_writelane_b32 v46, s29, 1
-; SI-NEXT: v_writelane_b32 v46, s13, 2
-; SI-NEXT: v_writelane_b32 v46, s10, 3
-; SI-NEXT: v_writelane_b32 v46, s40, 4
+; SI-NEXT: v_readfirstlane_b32 s71, v16
+; SI-NEXT: v_writelane_b32 v47, s70, 2
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s41, v1
-; SI-NEXT: v_writelane_b32 v46, s42, 5
-; SI-NEXT: v_writelane_b32 v46, s41, 6
-; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_readfirstlane_b32 s43, v50
-; SI-NEXT: v_writelane_b32 v46, s47, 7
-; SI-NEXT: v_writelane_b32 v46, s43, 8
-; SI-NEXT: v_writelane_b32 v46, s56, 9
-; SI-NEXT: v_writelane_b32 v46, s60, 10
-; SI-NEXT: v_writelane_b32 v46, s46, 11
-; SI-NEXT: v_writelane_b32 v46, s58, 12
-; SI-NEXT: v_writelane_b32 v46, s61, 13
-; SI-NEXT: v_writelane_b32 v46, s62, 14
-; SI-NEXT: v_writelane_b32 v46, s63, 15
-; SI-NEXT: v_writelane_b32 v46, s73, 16
-; SI-NEXT: v_writelane_b32 v46, s88, 17
-; SI-NEXT: v_writelane_b32 v46, s74, 18
-; SI-NEXT: v_writelane_b32 v46, s76, 19
-; SI-NEXT: v_writelane_b32 v46, s90, 20
-; SI-NEXT: v_writelane_b32 v46, s91, 21
-; SI-NEXT: v_writelane_b32 v46, s95, 22
-; SI-NEXT: v_writelane_b32 v46, vcc_lo, 23
-; SI-NEXT: v_writelane_b32 v46, s27, 24
-; SI-NEXT: v_writelane_b32 v46, s34, 25
-; SI-NEXT: v_writelane_b32 v46, s5, 26
-; SI-NEXT: v_writelane_b32 v46, s72, 27
-; SI-NEXT: v_writelane_b32 v46, s75, 28
-; SI-NEXT: v_writelane_b32 v46, s45, 29
-; SI-NEXT: v_writelane_b32 v46, s78, 30
-; SI-NEXT: v_writelane_b32 v46, s25, 31
-; SI-NEXT: v_writelane_b32 v46, s24, 32
-; SI-NEXT: v_writelane_b32 v46, s77, 33
-; SI-NEXT: v_writelane_b32 v46, s30, 34
-; SI-NEXT: v_writelane_b32 v46, s80, 35
-; SI-NEXT: v_writelane_b32 v46, s94, 36
-; SI-NEXT: v_writelane_b32 v46, s12, 37
-; SI-NEXT: v_writelane_b32 v46, s54, 38
-; SI-NEXT: v_writelane_b32 v46, s37, 39
+; SI-NEXT: v_readfirstlane_b32 s80, v18
+; SI-NEXT: v_writelane_b32 v47, s71, 3
+; SI-NEXT: v_writelane_b32 v47, s80, 4
+; SI-NEXT: v_writelane_b32 v47, s8, 5
+; SI-NEXT: v_writelane_b32 v47, s9, 6
+; SI-NEXT: v_writelane_b32 v47, s24, 7
+; SI-NEXT: v_writelane_b32 v47, s13, 8
+; SI-NEXT: v_writelane_b32 v47, s29, 9
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_readfirstlane_b32 s14, v1
+; SI-NEXT: v_writelane_b32 v47, s11, 10
+; SI-NEXT: v_writelane_b32 v47, s14, 11
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_readfirstlane_b32 s40, v50
+; SI-NEXT: v_writelane_b32 v47, s15, 12
+; SI-NEXT: v_writelane_b32 v47, s40, 13
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s71, v29
-; SI-NEXT: v_writelane_b32 v46, s36, 40
-; SI-NEXT: v_readfirstlane_b32 s83, v43
-; SI-NEXT: v_writelane_b32 v47, s71, 51
-; SI-NEXT: v_writelane_b32 v46, s38, 41
+; SI-NEXT: v_readfirstlane_b32 s42, v2
+; SI-NEXT: v_writelane_b32 v47, s56, 14
+; SI-NEXT: v_writelane_b32 v47, s42, 15
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_readfirstlane_b32 s82, v44
-; SI-NEXT: v_writelane_b32 v47, s83, 52
-; SI-NEXT: v_writelane_b32 v46, s79, 42
+; SI-NEXT: v_readfirstlane_b32 s43, v48
+; SI-NEXT: v_writelane_b32 v47, s58, 16
+; SI-NEXT: v_writelane_b32 v47, s43, 17
+; SI-NEXT: v_writelane_b32 v47, s45, 18
+; SI-NEXT: v_writelane_b32 v47, s47, 19
+; SI-NEXT: v_writelane_b32 v47, s60, 20
+; SI-NEXT: v_writelane_b32 v47, s76, 21
+; SI-NEXT: v_writelane_b32 v47, s72, 22
+; SI-NEXT: v_writelane_b32 v47, s91, 23
+; SI-NEXT: v_writelane_b32 v47, s21, 24
+; SI-NEXT: v_writelane_b32 v47, s57, 25
+; SI-NEXT: v_readfirstlane_b32 s41, v54
+; SI-NEXT: v_writelane_b32 v47, s81, 26
+; SI-NEXT: v_writelane_b32 v56, s41, 32
+; SI-NEXT: v_writelane_b32 v47, s87, 27
+; SI-NEXT: v_writelane_b32 v56, s18, 33
+; SI-NEXT: v_writelane_b32 v47, s96, 28
+; SI-NEXT: v_writelane_b32 v56, s6, 34
+; SI-NEXT: v_writelane_b32 v47, s99, 29
+; SI-NEXT: v_writelane_b32 v56, s17, 35
+; SI-NEXT: v_writelane_b32 v47, s90, 30
+; SI-NEXT: v_writelane_b32 v56, s16, 36
+; SI-NEXT: v_writelane_b32 v47, s28, 31
+; SI-NEXT: v_writelane_b32 v56, s7, 37
+; SI-NEXT: v_writelane_b32 v47, s26, 32
+; SI-NEXT: v_writelane_b32 v56, s92, 38
+; SI-NEXT: v_writelane_b32 v47, s37, 33
+; SI-NEXT: v_writelane_b32 v56, s44, 39
+; SI-NEXT: v_writelane_b32 v47, s25, 34
+; SI-NEXT: v_writelane_b32 v56, s59, 40
+; SI-NEXT: v_writelane_b32 v47, s78, 35
+; SI-NEXT: v_writelane_b32 v56, s27, 41
+; SI-NEXT: v_writelane_b32 v47, s73, 36
+; SI-NEXT: v_writelane_b32 v56, s62, 42
+; SI-NEXT: v_writelane_b32 v47, s74, 37
+; SI-NEXT: v_writelane_b32 v56, s79, 43
+; SI-NEXT: v_writelane_b32 v47, s97, 38
+; SI-NEXT: v_writelane_b32 v56, s22, 44
+; SI-NEXT: v_writelane_b32 v47, s35, 39
+; SI-NEXT: v_writelane_b32 v56, s75, 45
+; SI-NEXT: v_writelane_b32 v47, s39, 40
+; SI-NEXT: v_writelane_b32 v56, s36, 46
+; SI-NEXT: v_writelane_b32 v47, s85, 41
+; SI-NEXT: v_writelane_b32 v56, s19, 47
+; SI-NEXT: v_writelane_b32 v47, s93, 42
+; SI-NEXT: v_writelane_b32 v56, s77, 48
+; SI-NEXT: v_writelane_b32 v47, s63, 43
+; SI-NEXT: v_writelane_b32 v56, s88, 49
+; SI-NEXT: v_writelane_b32 v47, s86, 44
+; SI-NEXT: v_writelane_b32 v56, s12, 50
+; SI-NEXT: v_writelane_b32 v47, s94, 45
+; SI-NEXT: v_writelane_b32 v56, s89, 51
+; SI-NEXT: v_writelane_b32 v47, s38, 46
+; SI-NEXT: v_writelane_b32 v56, s46, 52
+; SI-NEXT: v_writelane_b32 v47, s61, 47
+; SI-NEXT: v_writelane_b32 v56, s20, 53
+; SI-NEXT: v_writelane_b32 v47, s23, 48
+; SI-NEXT: v_writelane_b32 v56, vcc_lo, 54
+; SI-NEXT: v_writelane_b32 v47, s50, 49
+; SI-NEXT: v_writelane_b32 v56, vcc_hi, 55
+; SI-NEXT: v_writelane_b32 v47, s82, 50
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s84, v24
-; SI-NEXT: v_writelane_b32 v47, s82, 53
-; SI-NEXT: v_writelane_b32 v46, s52, 43
-; SI-NEXT: v_readfirstlane_b32 s85, v41
-; SI-NEXT: v_writelane_b32 v47, s84, 54
-; SI-NEXT: v_writelane_b32 v46, s92, 44
+; SI-NEXT: v_readfirstlane_b32 s53, v28
+; SI-NEXT: v_writelane_b32 v56, s52, 56
+; SI-NEXT: v_writelane_b32 v47, s31, 51
+; SI-NEXT: v_readfirstlane_b32 s54, v43
+; SI-NEXT: v_writelane_b32 v56, s53, 57
+; SI-NEXT: v_writelane_b32 v47, s95, 52
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s86, v42
-; SI-NEXT: v_writelane_b32 v47, s85, 55
-; SI-NEXT: v_writelane_b32 v46, s64, 45
-; SI-NEXT: v_readfirstlane_b32 s87, v22
-; SI-NEXT: v_writelane_b32 v47, s86, 56
-; SI-NEXT: v_writelane_b32 v46, s81, 46
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s96, v23
-; SI-NEXT: v_writelane_b32 v47, s87, 57
-; SI-NEXT: v_writelane_b32 v46, s39, 47
-; SI-NEXT: v_readfirstlane_b32 s97, v55
-; SI-NEXT: v_writelane_b32 v47, s96, 58
-; SI-NEXT: v_writelane_b32 v46, s57, 48
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s98, v40
-; SI-NEXT: v_writelane_b32 v47, s97, 59
-; SI-NEXT: v_writelane_b32 v46, s48, 49
-; SI-NEXT: v_readfirstlane_b32 s99, v20
-; SI-NEXT: v_writelane_b32 v47, s98, 60
-; SI-NEXT: v_writelane_b32 v46, s89, 50
-; SI-NEXT: v_writelane_b32 v47, s99, 61
-; SI-NEXT: v_writelane_b32 v46, s59, 51
-; SI-NEXT: v_writelane_b32 v47, s8, 62
-; SI-NEXT: v_writelane_b32 v46, s66, 52
-; SI-NEXT: v_writelane_b32 v47, s28, 63
-; SI-NEXT: v_writelane_b32 v46, s44, 53
+; SI-NEXT: v_readfirstlane_b32 s55, v44
+; SI-NEXT: v_writelane_b32 v56, s54, 58
+; SI-NEXT: v_writelane_b32 v47, s30, 53
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s64, v23
+; SI-NEXT: v_writelane_b32 v56, s55, 59
+; SI-NEXT: v_writelane_b32 v47, s98, 54
+; SI-NEXT: v_readfirstlane_b32 s65, v41
+; SI-NEXT: v_writelane_b32 v56, s64, 60
+; SI-NEXT: v_writelane_b32 v47, s48, 55
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s66, v42
+; SI-NEXT: v_writelane_b32 v56, s65, 61
+; SI-NEXT: v_writelane_b32 v47, s84, 56
+; SI-NEXT: v_readfirstlane_b32 s67, v19
+; SI-NEXT: v_writelane_b32 v56, s66, 62
+; SI-NEXT: v_writelane_b32 v47, s49, 57
+; SI-NEXT: v_writelane_b32 v56, s67, 63
+; SI-NEXT: v_writelane_b32 v47, s34, 58
; SI-NEXT: s_cbranch_scc0 .LBB89_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_writelane_b32 v46, s4, 56
+; SI-NEXT: v_writelane_b32 v46, s83, 7
+; SI-NEXT: v_writelane_b32 v46, s4, 8
; SI-NEXT: s_and_b32 s4, s16, 0xff
-; SI-NEXT: v_writelane_b32 v46, s49, 57
-; SI-NEXT: s_mov_b32 s49, s31
-; SI-NEXT: s_mov_b32 s31, s19
-; SI-NEXT: s_mov_b32 s19, s14
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_mov_b32 s14, s5
-; SI-NEXT: s_lshl_b32 s5, s7, 24
-; SI-NEXT: s_or_b32 s16, s5, s4
+; SI-NEXT: s_mov_b32 s83, s51
+; SI-NEXT: s_mov_b32 s51, s10
+; SI-NEXT: s_mov_b32 s10, s5
+; SI-NEXT: s_lshl_b32 s5, s17, 24
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: v_writelane_b32 v47, s4, 59
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s6, 24
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_writelane_b32 v46, s4, 54
-; SI-NEXT: s_and_b32 s4, s20, 0xff
-; SI-NEXT: s_lshl_b32 s5, s21, 8
+; SI-NEXT: v_readlane_b32 s5, v56, 8
+; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: s_and_b32 s4, s7, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_writelane_b32 v46, s4, 58
-; SI-NEXT: s_and_b32 s5, s22, 0xff
-; SI-NEXT: v_readlane_b32 s4, v47, 6
+; SI-NEXT: v_writelane_b32 v46, s4, 9
+; SI-NEXT: v_readlane_b32 s4, v56, 7
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 6
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 5
-; SI-NEXT: s_or_b32 s18, s6, s5
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_readlane_b32 s4, v56, 5
+; SI-NEXT: v_writelane_b32 v47, s5, 62
; SI-NEXT: s_and_b32 s5, s4, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 4
+; SI-NEXT: v_readlane_b32 s4, v56, 4
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s4, 24
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_writelane_b32 v46, s5, 55
-; SI-NEXT: v_readlane_b32 s5, v47, 3
-; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 2
+; SI-NEXT: v_readlane_b32 s4, v56, 3
+; SI-NEXT: v_writelane_b32 v47, s5, 61
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 2
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s6, 24
-; SI-NEXT: s_or_b32 s20, s6, s5
-; SI-NEXT: v_readlane_b32 s5, v47, 1
-; SI-NEXT: v_readlane_b32 s6, v47, 0
-; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_lshl_b32 s6, s4, 24
+; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: v_readlane_b32 s4, v56, 1
+; SI-NEXT: v_writelane_b32 v47, s5, 63
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 0
+; SI-NEXT: s_lshl_b32 s6, s4, 8
; SI-NEXT: s_or_b32 s4, s5, s6
-; SI-NEXT: s_and_b32 s6, s70, 0xff
+; SI-NEXT: s_and_b32 s6, s52, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, vcc_hi, 24
-; SI-NEXT: v_writelane_b32 v46, s4, 59
-; SI-NEXT: s_or_b32 s4, s7, s6
-; SI-NEXT: s_and_b32 s6, s69, 0xff
+; SI-NEXT: s_lshl_b32 s7, vcc_lo, 24
+; SI-NEXT: v_writelane_b32 v46, s4, 10
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 1
+; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s26, 24
-; SI-NEXT: v_writelane_b32 v46, s4, 60
-; SI-NEXT: s_or_b32 s4, s7, s6
-; SI-NEXT: s_and_b32 s6, s23, 0xff
+; SI-NEXT: s_lshl_b32 s7, s20, 24
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 0
+; SI-NEXT: s_and_b32 s6, s36, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s51, 24
-; SI-NEXT: s_or_b32 s21, s7, s6
-; SI-NEXT: s_and_b32 s6, s67, 0xff
-; SI-NEXT: s_lshl_b32 s7, s65, 8
-; SI-NEXT: s_or_b32 vcc_hi, s6, s7
-; SI-NEXT: s_and_b32 s7, s15, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s22, s9, s7
-; SI-NEXT: s_and_b32 s7, s17, 0xff
-; SI-NEXT: v_writelane_b32 v46, s4, 61
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s55, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 25
-; SI-NEXT: s_or_b32 s70, s9, s7
-; SI-NEXT: s_and_b32 s7, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v47, 24
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 23
-; SI-NEXT: s_or_b32 s23, s9, s7
-; SI-NEXT: s_and_b32 s7, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v47, 22
-; SI-NEXT: s_lshl_b32 s9, s4, 8
-; SI-NEXT: v_readlane_b32 s4, v47, 21
-; SI-NEXT: s_or_b32 s5, s7, s9
-; SI-NEXT: s_and_b32 s7, s4, 0xff
-; SI-NEXT: v_readlane_b32 s4, v47, 20
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s4, 24
-; SI-NEXT: v_readlane_b32 s4, v47, 19
-; SI-NEXT: s_or_b32 s26, s9, s7
-; SI-NEXT: s_and_b32 s7, s4, 0xff
-; SI-NEXT: v_readlane_b32 s9, v47, 18
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s6, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 17
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v47, 16
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s69, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 15
-; SI-NEXT: v_readlane_b32 s9, v47, 14
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_or_b32 s4, s7, s9
-; SI-NEXT: v_readlane_b32 s7, v47, 13
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v47, 12
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s55, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 11
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v47, 10
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s51, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 9
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v47, 8
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s15, s9, 24
-; SI-NEXT: s_or_b32 s65, s15, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 7
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s17, s82, 8
-; SI-NEXT: s_or_b32 s82, s7, s17
-; SI-NEXT: s_and_b32 s7, s71, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s83, 24
-; SI-NEXT: s_or_b32 s71, s17, s7
-; SI-NEXT: s_and_b32 s7, s87, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s86, 24
-; SI-NEXT: s_or_b32 s67, s17, s7
-; SI-NEXT: s_and_b32 s7, s84, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s85, 24
-; SI-NEXT: s_or_b32 s86, s17, s7
-; SI-NEXT: s_and_b32 s7, s99, 0xff
-; SI-NEXT: s_lshl_b32 s17, s98, 8
-; SI-NEXT: s_or_b32 s83, s7, s17
-; SI-NEXT: s_and_b32 s7, s96, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s97, 24
-; SI-NEXT: s_or_b32 s87, s17, s7
-; SI-NEXT: s_and_b32 s7, s29, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s11, 24
-; SI-NEXT: s_or_b32 s11, s17, s7
-; SI-NEXT: s_and_b32 s7, s8, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s28, 24
-; SI-NEXT: s_or_b32 s9, s17, s7
-; SI-NEXT: s_and_b32 s7, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s40, 8
-; SI-NEXT: s_or_b32 s84, s7, s17
-; SI-NEXT: s_and_b32 s7, s13, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s10, 24
-; SI-NEXT: s_or_b32 s15, s17, s7
-; SI-NEXT: s_and_b32 s7, s56, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s43, 24
-; SI-NEXT: s_or_b32 s29, s17, s7
-; SI-NEXT: s_and_b32 s7, s41, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s47, 24
-; SI-NEXT: s_or_b32 s40, s17, s7
-; SI-NEXT: s_and_b32 s7, s61, 0xff
-; SI-NEXT: s_lshl_b32 s17, s58, 8
-; SI-NEXT: s_or_b32 s85, s7, s17
-; SI-NEXT: s_and_b32 s7, s60, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s46, 24
-; SI-NEXT: s_or_b32 s42, s17, s7
-; SI-NEXT: s_and_b32 s7, s88, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s73, 24
-; SI-NEXT: s_or_b32 s41, s17, s7
-; SI-NEXT: s_and_b32 s7, s62, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s63, 24
-; SI-NEXT: s_or_b32 s28, s17, s7
-; SI-NEXT: s_and_b32 s7, s91, 0xff
-; SI-NEXT: s_lshl_b32 s17, s90, 8
-; SI-NEXT: s_mov_b32 s88, s86
-; SI-NEXT: s_or_b32 s86, s7, s17
-; SI-NEXT: s_and_b32 s7, s74, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s76, 24
-; SI-NEXT: s_or_b32 s47, s17, s7
-; SI-NEXT: s_and_b32 s7, s34, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s27, 24
-; SI-NEXT: s_or_b32 s43, s17, s7
-; SI-NEXT: s_and_b32 s7, s95, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, vcc_lo, 24
-; SI-NEXT: s_or_b32 s27, s17, s7
-; SI-NEXT: s_and_b32 s7, s25, 0xff
-; SI-NEXT: s_lshl_b32 s17, s45, 8
-; SI-NEXT: s_mov_b32 s61, s21
-; SI-NEXT: s_or_b32 s21, s7, s17
-; SI-NEXT: s_and_b32 s7, s72, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s75, 24
-; SI-NEXT: s_or_b32 s72, s17, s7
-; SI-NEXT: s_and_b32 s7, s36, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s12, 24
-; SI-NEXT: s_or_b32 s25, s17, s7
-; SI-NEXT: s_and_b32 s7, s24, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s77, 24
-; SI-NEXT: s_or_b32 s74, s17, s7
-; SI-NEXT: s_and_b32 s7, s48, 0xff
-; SI-NEXT: s_lshl_b32 s17, s39, 8
-; SI-NEXT: s_mov_b32 s46, s16
-; SI-NEXT: s_or_b32 s16, s7, s17
-; SI-NEXT: s_and_b32 s7, s52, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s92, 24
-; SI-NEXT: s_or_b32 s52, s17, s7
-; SI-NEXT: s_and_b32 s7, s44, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s66, 24
-; SI-NEXT: s_mov_b32 s75, s51
-; SI-NEXT: s_or_b32 s51, s17, s7
-; SI-NEXT: s_and_b32 s7, s79, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s37, 24
-; SI-NEXT: s_or_b32 s76, s17, s7
-; SI-NEXT: s_and_b32 s7, s59, 0xff
-; SI-NEXT: s_lshl_b32 s17, s57, 8
-; SI-NEXT: s_mov_b32 s62, s22
-; SI-NEXT: s_or_b32 s22, s7, s17
-; SI-NEXT: s_and_b32 s7, s38, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s54, 24
-; SI-NEXT: s_mov_b32 s77, s55
-; SI-NEXT: s_or_b32 s55, s17, s7
-; SI-NEXT: s_and_b32 s7, s89, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s81, 24
-; SI-NEXT: s_or_b32 s54, s17, s7
-; SI-NEXT: s_and_b32 s7, s80, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s30, 24
-; SI-NEXT: s_or_b32 s45, s17, s7
-; SI-NEXT: s_and_b32 s7, s64, 0xff
-; SI-NEXT: s_lshl_b32 s17, s94, 8
-; SI-NEXT: s_mov_b32 s60, s20
-; SI-NEXT: s_or_b32 s20, s7, s17
-; SI-NEXT: s_and_b32 s7, s78, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 31
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s8, 24
-; SI-NEXT: s_or_b32 s66, s17, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 30
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 29
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s8, 24
-; SI-NEXT: s_mov_b32 s78, s65
-; SI-NEXT: s_or_b32 s65, s17, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 28
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 27
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s8, 24
-; SI-NEXT: s_mov_b32 s44, s67
-; SI-NEXT: s_or_b32 s67, s17, s7
-; SI-NEXT: v_readlane_b32 s7, v47, 26
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s17, s14, 8
-; SI-NEXT: s_mov_b32 s63, s23
-; SI-NEXT: s_or_b32 s23, s7, s17
-; SI-NEXT: s_and_b32 s7, s35, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s68, 24
-; SI-NEXT: s_mov_b32 s59, s69
-; SI-NEXT: s_or_b32 s69, s17, s7
-; SI-NEXT: s_and_b32 s7, s53, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s93, 24
-; SI-NEXT: s_or_b32 s10, s17, s7
+; SI-NEXT: s_lshl_b32 s7, s22, 24
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 2
+; SI-NEXT: s_and_b32 s6, s46, 0xff
+; SI-NEXT: s_lshl_b32 s7, s12, 8
+; SI-NEXT: s_or_b32 s4, s6, s7
+; SI-NEXT: s_and_b32 s6, s79, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s62, 24
+; SI-NEXT: v_writelane_b32 v46, s4, 11
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 4
+; SI-NEXT: s_and_b32 s6, s89, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s77, 24
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 3
+; SI-NEXT: s_and_b32 s6, s27, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s59, 24
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s6, 5
+; SI-NEXT: s_and_b32 s6, s88, 0xff
+; SI-NEXT: s_lshl_b32 s7, s75, 8
+; SI-NEXT: s_or_b32 s4, s6, s7
+; SI-NEXT: s_and_b32 s6, s44, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s92, 24
+; SI-NEXT: v_writelane_b32 v46, s4, 12
+; SI-NEXT: s_or_b32 s4, s7, s6
+; SI-NEXT: v_writelane_b32 v46, s4, 6
; SI-NEXT: s_and_b32 s7, s19, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 20
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s31, 24
-; SI-NEXT: s_or_b32 s8, s17, s7
-; SI-NEXT: s_and_b32 s7, s49, 0xff
-; SI-NEXT: s_lshl_b32 s17, s50, 8
-; SI-NEXT: s_mov_b32 s56, s26
-; SI-NEXT: s_or_b32 s26, s7, s17
-; SI-NEXT: v_readlane_b32 s7, v46, 57
-; SI-NEXT: s_mov_b32 s90, s7
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s12, v46, 56
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s17, s12, 24
-; SI-NEXT: s_mov_b32 s79, s71
-; SI-NEXT: s_or_b32 s71, s17, s7
-; SI-NEXT: v_readlane_b32 s7, v46, 58
-; SI-NEXT: s_lshl_b32 s17, s7, 16
-; SI-NEXT: v_readlane_b32 s7, v46, 59
-; SI-NEXT: s_mov_b32 s58, s18
-; SI-NEXT: s_mov_b32 s91, s87
-; SI-NEXT: s_mov_b32 vcc_lo, s35
-; SI-NEXT: s_mov_b32 s95, s68
-; SI-NEXT: s_mov_b32 s92, s53
-; SI-NEXT: s_mov_b32 s30, s93
-; SI-NEXT: s_mov_b32 s89, s19
-; SI-NEXT: s_mov_b32 s36, s31
-; SI-NEXT: s_mov_b32 s57, s49
-; SI-NEXT: s_mov_b32 s94, s50
-; SI-NEXT: s_mov_b32 s73, s12
-; SI-NEXT: s_lshl_b32 s18, s7, 16
-; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s93, s5, 16
-; SI-NEXT: s_lshl_b32 s99, s4, 16
-; SI-NEXT: s_lshl_b32 s98, s82, 16
-; SI-NEXT: s_lshl_b32 s97, s83, 16
-; SI-NEXT: s_lshl_b32 s96, s84, 16
-; SI-NEXT: s_lshl_b32 s87, s85, 16
-; SI-NEXT: s_lshl_b32 s86, s86, 16
-; SI-NEXT: s_lshl_b32 s85, s21, 16
-; SI-NEXT: s_lshl_b32 s84, s16, 16
-; SI-NEXT: s_lshl_b32 s83, s22, 16
-; SI-NEXT: s_lshl_b32 s82, s20, 16
-; SI-NEXT: s_lshl_b32 s81, s23, 16
-; SI-NEXT: v_readlane_b32 s23, v46, 61
-; SI-NEXT: v_readlane_b32 s24, v46, 60
-; SI-NEXT: s_lshl_b32 s80, s26, 16
+; SI-NEXT: s_lshl_b32 s12, s4, 24
+; SI-NEXT: v_readlane_b32 s4, v56, 19
+; SI-NEXT: s_or_b32 s7, s12, s7
+; SI-NEXT: s_and_b32 s12, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 18
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s18, s4, 24
+; SI-NEXT: v_readlane_b32 s4, v56, 17
+; SI-NEXT: s_or_b32 s18, s18, s12
+; SI-NEXT: s_and_b32 s12, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 16
+; SI-NEXT: s_lshl_b32 s19, s4, 8
+; SI-NEXT: v_readlane_b32 s4, v56, 15
+; SI-NEXT: s_or_b32 s6, s12, s19
+; SI-NEXT: s_and_b32 s12, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 14
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s19, s4, 24
+; SI-NEXT: v_readlane_b32 s4, v56, 13
+; SI-NEXT: s_or_b32 s16, s19, s12
+; SI-NEXT: s_and_b32 s12, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 12
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s20, s4, 24
+; SI-NEXT: v_readlane_b32 s4, v56, 11
+; SI-NEXT: s_or_b32 s5, s20, s12
+; SI-NEXT: s_and_b32 s12, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 10
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s20, s4, 24
+; SI-NEXT: s_or_b32 s4, s20, s12
+; SI-NEXT: v_readlane_b32 s12, v56, 9
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: s_lshl_b32 s27, s55, 8
+; SI-NEXT: s_or_b32 s52, s12, s27
+; SI-NEXT: s_and_b32 s12, s53, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s27, s54, 24
+; SI-NEXT: s_or_b32 s17, s27, s12
+; SI-NEXT: s_and_b32 s12, s67, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s27, s66, 24
+; SI-NEXT: s_or_b32 s19, s27, s12
+; SI-NEXT: s_and_b32 s12, s64, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s44, s65, 24
+; SI-NEXT: s_or_b32 s12, s44, s12
+; SI-NEXT: s_and_b32 s44, s71, 0xff
+; SI-NEXT: s_lshl_b32 s46, s70, 8
+; SI-NEXT: s_or_b32 s53, s44, s46
+; SI-NEXT: s_and_b32 s44, s68, 0xff
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_lshl_b32 s46, s69, 24
+; SI-NEXT: s_or_b32 s44, s46, s44
+; SI-NEXT: s_and_b32 s46, s9, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s41, s41, 24
+; SI-NEXT: s_or_b32 s41, s41, s46
+; SI-NEXT: s_and_b32 s46, s80, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s59, s8, 24
+; SI-NEXT: s_or_b32 s59, s59, s46
+; SI-NEXT: s_and_b32 s46, s11, 0xff
+; SI-NEXT: s_lshl_b32 s62, s29, 8
+; SI-NEXT: s_or_b32 s54, s46, s62
+; SI-NEXT: s_and_b32 s46, s24, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s62, s13, 24
+; SI-NEXT: s_or_b32 s27, s62, s46
+; SI-NEXT: s_and_b32 s46, s56, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s62, s40, 24
+; SI-NEXT: s_or_b32 s62, s62, s46
+; SI-NEXT: s_and_b32 s46, s14, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s75, s15, 24
+; SI-NEXT: s_or_b32 s75, s75, s46
+; SI-NEXT: s_and_b32 s46, s45, 0xff
+; SI-NEXT: s_lshl_b32 s77, s43, 8
+; SI-NEXT: s_or_b32 s55, s46, s77
+; SI-NEXT: s_and_b32 s46, s42, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s77, s58, 24
+; SI-NEXT: s_or_b32 s29, s77, s46
+; SI-NEXT: s_and_b32 s46, s72, 0xff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s79, s76, 24
+; SI-NEXT: s_or_b32 s46, s79, s46
+; SI-NEXT: s_and_b32 s79, s47, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s88, s60, 24
+; SI-NEXT: s_or_b32 s24, s88, s79
+; SI-NEXT: s_and_b32 s88, s81, 0xff
+; SI-NEXT: s_lshl_b32 s89, s57, 8
+; SI-NEXT: s_mov_b32 s42, s16
+; SI-NEXT: s_or_b32 s16, s88, s89
+; SI-NEXT: s_and_b32 s88, s91, 0xff
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s89, s21, 24
+; SI-NEXT: s_or_b32 s21, s89, s88
+; SI-NEXT: s_and_b32 s88, s90, 0xff
+; SI-NEXT: s_lshl_b32 s88, s88, 16
+; SI-NEXT: s_lshl_b32 s90, s99, 24
+; SI-NEXT: s_or_b32 s88, s90, s88
+; SI-NEXT: s_and_b32 s90, s87, 0xff
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: s_lshl_b32 s91, s96, 24
+; SI-NEXT: s_or_b32 s40, s91, s90
+; SI-NEXT: s_and_b32 s91, s73, 0xff
+; SI-NEXT: s_lshl_b32 s92, s25, 8
+; SI-NEXT: s_mov_b32 s45, s19
+; SI-NEXT: s_or_b32 s19, s91, s92
+; SI-NEXT: s_and_b32 s91, s28, 0xff
+; SI-NEXT: s_lshl_b32 s91, s91, 16
+; SI-NEXT: s_lshl_b32 s92, s26, 24
+; SI-NEXT: s_or_b32 s92, s92, s91
+; SI-NEXT: s_and_b32 s91, s94, 0xff
+; SI-NEXT: s_lshl_b32 s91, s91, 16
+; SI-NEXT: s_lshl_b32 s93, s93, 24
+; SI-NEXT: s_or_b32 s91, s93, s91
+; SI-NEXT: s_and_b32 s93, s74, 0xff
+; SI-NEXT: s_lshl_b32 s93, s93, 16
+; SI-NEXT: s_lshl_b32 s94, s97, 24
+; SI-NEXT: s_or_b32 s93, s94, s93
+; SI-NEXT: s_and_b32 s94, s98, 0xff
+; SI-NEXT: s_lshl_b32 s95, s95, 8
+; SI-NEXT: s_or_b32 s22, s94, s95
+; SI-NEXT: s_and_b32 s94, s23, 0xff
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_lshl_b32 s95, s50, 24
+; SI-NEXT: s_or_b32 s95, s95, s94
+; SI-NEXT: s_and_b32 s94, s34, 0xff
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: s_lshl_b32 vcc_lo, s49, 24
+; SI-NEXT: s_or_b32 s94, vcc_lo, s94
+; SI-NEXT: s_and_b32 vcc_lo, s61, 0xff
+; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 vcc_hi, s86, 24
+; SI-NEXT: s_or_b32 vcc_lo, vcc_hi, vcc_lo
+; SI-NEXT: s_and_b32 vcc_hi, s84, 0xff
+; SI-NEXT: s_lshl_b32 s30, s30, 8
+; SI-NEXT: s_mov_b32 s43, s17
+; SI-NEXT: s_or_b32 s17, vcc_hi, s30
+; SI-NEXT: s_and_b32 vcc_hi, s38, 0xff
+; SI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s30, s63, 24
+; SI-NEXT: s_or_b32 s30, s30, vcc_hi
+; SI-NEXT: s_and_b32 vcc_hi, s48, 0xff
+; SI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s31, s31, 24
+; SI-NEXT: s_or_b32 vcc_hi, s31, vcc_hi
+; SI-NEXT: s_and_b32 s31, s39, 0xff
+; SI-NEXT: s_lshl_b32 s31, s31, 16
+; SI-NEXT: s_lshl_b32 s34, s35, 24
+; SI-NEXT: s_or_b32 s31, s34, s31
+; SI-NEXT: s_and_b32 s34, s82, 0xff
+; SI-NEXT: s_lshl_b32 s35, s85, 8
+; SI-NEXT: s_or_b32 s20, s34, s35
+; SI-NEXT: s_and_b32 s34, s78, 0xff
+; SI-NEXT: s_lshl_b32 s34, s34, 16
+; SI-NEXT: s_lshl_b32 s35, s37, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 31
+; SI-NEXT: s_or_b32 s35, s35, s34
+; SI-NEXT: s_and_b32 s34, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 30
+; SI-NEXT: s_lshl_b32 s34, s34, 16
+; SI-NEXT: s_lshl_b32 s36, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 29
+; SI-NEXT: s_or_b32 s34, s36, s34
+; SI-NEXT: s_and_b32 s36, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 28
+; SI-NEXT: s_lshl_b32 s36, s36, 16
+; SI-NEXT: s_lshl_b32 s37, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 27
+; SI-NEXT: s_or_b32 s36, s37, s36
+; SI-NEXT: s_and_b32 s37, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 26
+; SI-NEXT: s_lshl_b32 s38, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v56, 25
+; SI-NEXT: s_or_b32 s23, s37, s38
+; SI-NEXT: s_and_b32 s37, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 24
+; SI-NEXT: s_lshl_b32 s37, s37, 16
+; SI-NEXT: s_lshl_b32 s38, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 23
+; SI-NEXT: s_or_b32 s38, s38, s37
+; SI-NEXT: s_mov_b32 s90, s8
+; SI-NEXT: s_and_b32 s37, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 22
+; SI-NEXT: s_lshl_b32 s37, s37, 16
+; SI-NEXT: s_mov_b32 s28, s8
+; SI-NEXT: s_lshl_b32 s39, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 21
+; SI-NEXT: s_or_b32 s37, s39, s37
+; SI-NEXT: s_and_b32 s39, s8, 0xff
+; SI-NEXT: s_lshl_b32 s39, s39, 16
+; SI-NEXT: s_lshl_b32 s48, s10, 24
+; SI-NEXT: s_or_b32 s39, s48, s39
+; SI-NEXT: s_and_b32 s48, s51, 0xff
+; SI-NEXT: s_lshl_b32 s64, s83, 8
+; SI-NEXT: v_readlane_b32 s8, v46, 8
+; SI-NEXT: s_or_b32 s25, s48, s64
+; SI-NEXT: s_mov_b32 s57, s8
+; SI-NEXT: s_and_b32 s48, s8, 0xff
+; SI-NEXT: v_readlane_b32 s8, v46, 7
+; SI-NEXT: s_mov_b32 s76, s8
+; SI-NEXT: s_lshl_b32 s64, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v46, 9
+; SI-NEXT: s_lshl_b32 s80, s8, 16
+; SI-NEXT: v_readlane_b32 s8, v46, 10
+; SI-NEXT: s_lshl_b32 s71, s8, 16
+; SI-NEXT: v_readlane_b32 s8, v46, 11
+; SI-NEXT: s_lshl_b32 s48, s48, 16
+; SI-NEXT: s_lshl_b32 s70, s8, 16
+; SI-NEXT: v_readlane_b32 s8, v46, 12
+; SI-NEXT: s_mov_b32 s74, s10
+; SI-NEXT: s_mov_b32 s26, s51
+; SI-NEXT: s_mov_b32 s73, s83
+; SI-NEXT: s_or_b32 s48, s64, s48
+; SI-NEXT: s_lshl_b32 s69, s8, 16
+; SI-NEXT: s_lshl_b32 s68, s6, 16
+; SI-NEXT: s_lshl_b32 s67, s52, 16
+; SI-NEXT: s_lshl_b32 s66, s53, 16
+; SI-NEXT: s_lshl_b32 s65, s54, 16
+; SI-NEXT: s_lshl_b32 s64, s55, 16
+; SI-NEXT: s_lshl_b32 s55, s16, 16
+; SI-NEXT: s_lshl_b32 s54, s19, 16
+; SI-NEXT: s_mov_b32 s19, s5
+; SI-NEXT: s_lshl_b32 s53, s22, 16
+; SI-NEXT: s_lshl_b32 s52, s17, 16
+; SI-NEXT: s_lshl_b32 s51, s20, 16
+; SI-NEXT: s_mov_b32 s20, s4
+; SI-NEXT: s_lshl_b32 s50, s23, 16
+; SI-NEXT: s_lshl_b32 s49, s25, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB89_3
; SI-NEXT: .LBB89_2:
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: s_mov_b32 s92, s53
-; SI-NEXT: s_mov_b32 s30, s93
-; SI-NEXT: s_mov_b32 vcc_lo, s35
-; SI-NEXT: s_mov_b32 s95, s68
-; SI-NEXT: s_mov_b32 s57, s31
-; SI-NEXT: s_mov_b32 s89, s14
-; SI-NEXT: s_mov_b32 s36, s19
-; SI-NEXT: s_mov_b32 s94, s50
-; SI-NEXT: s_mov_b32 s90, s49
-; SI-NEXT: s_mov_b32 s73, s4
-; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: v_readlane_b32 s90, v56, 23
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr17
-; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; kill: killed $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $sgpr24
-; SI-NEXT: ; implicit-def: $sgpr23
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr7
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: v_readlane_b32 s28, v56, 22
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s26, s10
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s74, s5
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s73, s51
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s57, s4
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s76, s83
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr18
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr19
+; SI-NEXT: ; implicit-def: $sgpr20
+; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr59
-; SI-NEXT: ; implicit-def: $sgpr99
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr27
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr97
-; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr11
-; SI-NEXT: ; implicit-def: $sgpr9
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr29
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr24
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr21
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr41
-; SI-NEXT: ; implicit-def: $sgpr28
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr25
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr45
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: .LBB89_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
+; SI-NEXT: v_readlane_b32 s81, v47, 59
+; SI-NEXT: v_readlane_b32 s82, v47, 60
+; SI-NEXT: v_readlane_b32 s84, v47, 61
+; SI-NEXT: v_readlane_b32 s83, v47, 62
+; SI-NEXT: v_readlane_b32 s85, v47, 63
+; SI-NEXT: v_readlane_b32 s87, v46, 0
+; SI-NEXT: v_readlane_b32 s86, v46, 1
+; SI-NEXT: v_readlane_b32 s96, v46, 2
+; SI-NEXT: v_readlane_b32 s98, v46, 3
+; SI-NEXT: v_readlane_b32 s97, v46, 4
+; SI-NEXT: v_readlane_b32 s99, v46, 5
+; SI-NEXT: v_readlane_b32 s6, v46, 6
; SI-NEXT: s_cbranch_scc1 .LBB89_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s4, s57, 3
+; SI-NEXT: s_add_i32 s4, s26, 3
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s94, 8
-; SI-NEXT: s_add_i32 s6, s90, 3
+; SI-NEXT: s_lshl_b32 s5, s73, 8
+; SI-NEXT: s_add_i32 s6, s57, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s5, s73, 24
+; SI-NEXT: s_lshl_b32 s5, s76, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_addk_i32 s4, 0x300
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_add_i32 s27, s92, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s27, 0xff
-; SI-NEXT: s_lshl_b32 s6, s30, 8
-; SI-NEXT: s_add_i32 s7, s89, 3
+; SI-NEXT: s_add_i32 s5, s90, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 21
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s6, s28, 8
+; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s6, s36, 24
+; SI-NEXT: s_lshl_b32 s6, s74, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_addk_i32 s5, 0x300
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v47, 26
-; SI-NEXT: s_add_i32 s14, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 26
-; SI-NEXT: s_and_b32 s6, s14, 0xff
+; SI-NEXT: v_readlane_b32 s6, v56, 27
+; SI-NEXT: s_add_i32 s21, s6, 3
+; SI-NEXT: v_readlane_b32 s7, v56, 26
+; SI-NEXT: v_readlane_b32 s8, v56, 25
+; SI-NEXT: s_and_b32 s6, s21, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s16, vcc_lo, 3
+; SI-NEXT: s_add_i32 s12, s8, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s8, s16, 0xff
-; SI-NEXT: s_lshl_b32 s7, s95, 24
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s8, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v47, 30
-; SI-NEXT: s_add_i32 s57, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 29
-; SI-NEXT: v_readlane_b32 s9, v47, 28
-; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s28, s9, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 27
-; SI-NEXT: s_and_b32 s9, s28, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 24
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s7, s7, s12
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 45
-; SI-NEXT: s_add_i32 s79, s7, 3
-; SI-NEXT: v_readlane_b32 s9, v46, 36
-; SI-NEXT: v_readlane_b32 s10, v46, 30
-; SI-NEXT: s_and_b32 s7, s79, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s41, s10, 3
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_readlane_b32 s9, v47, 31
-; SI-NEXT: s_and_b32 s12, s41, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: v_readlane_b32 s7, v56, 31
+; SI-NEXT: s_add_i32 s10, s7, 3
+; SI-NEXT: v_readlane_b32 s8, v56, 30
+; SI-NEXT: s_and_b32 s7, s10, 0xff
+; SI-NEXT: s_lshl_b32 s10, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v56, 28
+; SI-NEXT: s_or_b32 s7, s10, s7
+; SI-NEXT: s_lshl_b32 s10, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v56, 29
+; SI-NEXT: s_add_i32 s12, s8, 3
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_or_b32 s9, s9, s12
+; SI-NEXT: v_readlane_b32 s8, v47, 50
+; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_readlane_b32 s9, v46, 50
-; SI-NEXT: s_add_i32 s95, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 46
-; SI-NEXT: s_and_b32 s9, s95, 0xff
-; SI-NEXT: s_lshl_b32 s12, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 34
-; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: s_lshl_b32 s12, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 35
-; SI-NEXT: s_add_i32 s58, s10, 3
-; SI-NEXT: s_and_b32 s13, s58, 0xff
+; SI-NEXT: s_add_i32 s57, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 41
+; SI-NEXT: s_or_b32 s7, s10, s7
+; SI-NEXT: s_and_b32 s10, s57, 0xff
+; SI-NEXT: s_lshl_b32 s12, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v47, 33
+; SI-NEXT: s_or_b32 s10, s12, s10
+; SI-NEXT: s_lshl_b32 s12, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v47, 35
+; SI-NEXT: s_add_i32 s26, s8, 3
+; SI-NEXT: s_and_b32 s13, s26, 0xff
+; SI-NEXT: v_readlane_b32 s8, v47, 55
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_addk_i32 s9, 0x300
+; SI-NEXT: s_add_i32 s73, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 51
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_or_b32 s13, s12, s9
-; SI-NEXT: v_readlane_b32 s9, v46, 51
-; SI-NEXT: s_add_i32 vcc_lo, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 48
-; SI-NEXT: s_and_b32 s9, vcc_lo, 0xff
-; SI-NEXT: s_lshl_b32 s12, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 38
-; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: s_lshl_b32 s12, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 41
-; SI-NEXT: s_add_i32 s74, s10, 3
-; SI-NEXT: s_and_b32 s14, s74, 0xff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_addk_i32 s9, 0x300
-; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_or_b32 s14, s12, s9
-; SI-NEXT: v_readlane_b32 s9, v46, 53
-; SI-NEXT: s_add_i32 s35, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 52
-; SI-NEXT: s_and_b32 s9, s35, 0xff
-; SI-NEXT: s_lshl_b32 s12, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 39
-; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: s_lshl_b32 s12, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 42
-; SI-NEXT: s_add_i32 s76, s10, 3
-; SI-NEXT: s_and_b32 s15, s76, 0xff
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_addk_i32 s9, 0x300
-; SI-NEXT: s_or_b32 s12, s12, s15
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_or_b32 s16, s12, s9
-; SI-NEXT: v_readlane_b32 s9, v46, 49
-; SI-NEXT: s_add_i32 s94, s9, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 47
-; SI-NEXT: s_and_b32 s9, s94, 0xff
-; SI-NEXT: s_lshl_b32 s12, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 44
-; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: s_lshl_b32 s12, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 43
-; SI-NEXT: s_add_i32 s77, s10, 3
-; SI-NEXT: s_and_b32 s15, s77, 0xff
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_addk_i32 s9, 0x300
-; SI-NEXT: v_readlane_b32 s10, v46, 40
-; SI-NEXT: s_or_b32 s12, s12, s15
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_add_i32 s73, s10, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 37
-; SI-NEXT: s_or_b32 s9, s12, s9
+; SI-NEXT: s_addk_i32 s10, 0x300
+; SI-NEXT: s_lshl_b32 s13, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v47, 39
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v47, 40
+; SI-NEXT: s_or_b32 s10, s12, s10
; SI-NEXT: s_and_b32 s12, s73, 0xff
-; SI-NEXT: s_lshl_b32 s15, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 33
-; SI-NEXT: s_or_b32 s12, s15, s12
-; SI-NEXT: s_lshl_b32 s15, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 32
-; SI-NEXT: s_add_i32 s46, s10, 3
-; SI-NEXT: s_and_b32 s17, s46, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_addk_i32 s12, 0x300
-; SI-NEXT: v_readlane_b32 s10, v46, 31
-; SI-NEXT: s_or_b32 s15, s15, s17
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_add_i32 s43, s10, 3
-; SI-NEXT: v_readlane_b32 s10, v46, 29
-; SI-NEXT: s_or_b32 s21, s15, s12
-; SI-NEXT: s_lshl_b32 s15, s10, 8
-; SI-NEXT: v_readlane_b32 s10, v46, 28
-; SI-NEXT: s_lshl_b32 s11, s10, 24
-; SI-NEXT: v_readlane_b32 s10, v46, 27
-; SI-NEXT: s_and_b32 s12, s43, 0xff
-; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_or_b32 s12, s15, s12
-; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_add_i32 s11, s8, 3
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_addk_i32 s12, 0x300
-; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: v_readlane_b32 s8, v47, 56
+; SI-NEXT: s_or_b32 s9, s9, s11
; SI-NEXT: s_and_b32 s11, s12, 0xffff
-; SI-NEXT: s_or_b32 s12, s10, s11
-; SI-NEXT: v_readlane_b32 s10, v46, 25
-; SI-NEXT: s_add_i32 s29, s10, 3
-; SI-NEXT: v_readlane_b32 s11, v46, 24
-; SI-NEXT: v_readlane_b32 s15, v46, 22
-; SI-NEXT: s_and_b32 s10, s29, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 8
-; SI-NEXT: s_add_i32 s19, s15, 3
-; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v46, 23
-; SI-NEXT: s_and_b32 s15, s19, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 24
+; SI-NEXT: s_add_i32 s74, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 53
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_and_b32 s11, s74, 0xff
+; SI-NEXT: s_lshl_b32 s12, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v47, 43
+; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_lshl_b32 s12, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v47, 46
+; SI-NEXT: s_add_i32 s43, s8, 3
+; SI-NEXT: s_and_b32 s13, s43, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_addk_i32 s11, 0x300
+; SI-NEXT: v_readlane_b32 s8, v47, 58
+; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_add_i32 s78, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 57
+; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_and_b32 s12, s78, 0xff
+; SI-NEXT: s_lshl_b32 s13, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v47, 44
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_lshl_b32 s13, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v47, 47
+; SI-NEXT: s_add_i32 s45, s8, 3
+; SI-NEXT: s_and_b32 s15, s45, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_addk_i32 s10, 0x300
-; SI-NEXT: s_or_b32 s11, s11, s15
-; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_or_b32 s25, s11, s10
-; SI-NEXT: s_add_i32 s10, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v46, 21
-; SI-NEXT: s_add_i32 s11, s7, 0x3000000
-; SI-NEXT: s_add_i32 s19, s9, 0x3000000
+; SI-NEXT: s_addk_i32 s12, 0x300
+; SI-NEXT: v_readlane_b32 s8, v47, 54
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s12, s12, 0xffff
+; SI-NEXT: s_add_i32 s72, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 52
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s13, s72, 0xff
+; SI-NEXT: s_lshl_b32 s15, s8, 8
+; SI-NEXT: v_readlane_b32 s8, v47, 49
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_lshl_b32 s15, s8, 24
+; SI-NEXT: v_readlane_b32 s8, v47, 48
+; SI-NEXT: s_add_i32 s47, s8, 3
+; SI-NEXT: s_and_b32 s18, s47, 0xff
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_addk_i32 s13, 0x300
+; SI-NEXT: v_readlane_b32 s8, v47, 45
+; SI-NEXT: s_or_b32 s15, s15, s18
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_add_i32 s42, s8, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 42
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_and_b32 s15, s42, 0xff
+; SI-NEXT: s_lshl_b32 s14, s8, 8
+; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: v_readlane_b32 s15, v47, 37
+; SI-NEXT: s_add_i32 s29, s15, 3
+; SI-NEXT: v_readlane_b32 s8, v47, 38
+; SI-NEXT: s_and_b32 s15, s29, 0xff
+; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_addk_i32 s14, 0x300
+; SI-NEXT: s_or_b32 s8, s8, s15
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_or_b32 s14, s8, s14
+; SI-NEXT: v_readlane_b32 s8, v47, 36
+; SI-NEXT: s_add_i32 s24, s8, 3
+; SI-NEXT: v_readlane_b32 s15, v47, 34
+; SI-NEXT: v_readlane_b32 s16, v47, 31
+; SI-NEXT: s_and_b32 s8, s24, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_add_i32 s17, s16, 3
+; SI-NEXT: s_or_b32 s8, s15, s8
+; SI-NEXT: v_readlane_b32 s15, v47, 32
+; SI-NEXT: s_and_b32 s16, s17, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 24
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_addk_i32 s8, 0x300
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s15, s15, s8
+; SI-NEXT: v_readlane_b32 s8, v47, 30
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: v_readlane_b32 s16, v47, 29
+; SI-NEXT: v_readlane_b32 s17, v47, 27
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_add_i32 s17, s17, 3
+; SI-NEXT: s_or_b32 s8, s16, s8
+; SI-NEXT: v_readlane_b32 s16, v47, 28
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_addk_i32 s8, 0x300
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_add_i32 s23, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v47, 26
+; SI-NEXT: s_or_b32 s16, s16, s8
+; SI-NEXT: s_add_i32 s22, s7, 0x3000000
+; SI-NEXT: s_add_i32 s8, s10, 0x3000000
+; SI-NEXT: s_add_i32 s10, s11, 0x3000000
+; SI-NEXT: s_add_i32 s11, s12, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 20
-; SI-NEXT: v_readlane_b32 s9, v46, 18
+; SI-NEXT: v_readlane_b32 s7, v47, 25
+; SI-NEXT: v_readlane_b32 s12, v47, 23
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 19
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 24
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s26, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v46, 17
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s17, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 22
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 16
-; SI-NEXT: v_readlane_b32 s9, v46, 14
+; SI-NEXT: v_readlane_b32 s7, v47, 21
+; SI-NEXT: v_readlane_b32 s12, v47, 19
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 15
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 20
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s27, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v46, 13
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s21, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 18
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 12
-; SI-NEXT: v_readlane_b32 s9, v46, 10
+; SI-NEXT: v_readlane_b32 s7, v47, 17
+; SI-NEXT: v_readlane_b32 s12, v47, 15
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 11
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 16
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s28, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v46, 9
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s24, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 14
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 8
-; SI-NEXT: v_readlane_b32 s9, v46, 6
+; SI-NEXT: v_readlane_b32 s7, v47, 13
+; SI-NEXT: v_readlane_b32 s12, v47, 11
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 7
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 12
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s29, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v46, 5
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s25, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 10
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 4
-; SI-NEXT: v_readlane_b32 s9, v46, 2
+; SI-NEXT: v_readlane_b32 s7, v47, 9
+; SI-NEXT: v_readlane_b32 s12, v47, 7
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 3
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 8
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s40, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v46, 1
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s26, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 6
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 0
-; SI-NEXT: v_readlane_b32 s9, v47, 62
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 63
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: s_and_b32 s7, s6, 0xff
+; SI-NEXT: v_readlane_b32 s6, v56, 32
+; SI-NEXT: v_readlane_b32 s12, v47, 4
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: v_readlane_b32 s7, v47, 5
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s41, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v47, 61
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s29, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v47, 3
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 60
-; SI-NEXT: v_readlane_b32 s9, v47, 58
+; SI-NEXT: v_readlane_b32 s7, v47, 2
+; SI-NEXT: v_readlane_b32 s12, v47, 0
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 59
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 1
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_or_b32 s42, s7, s6
-; SI-NEXT: v_readlane_b32 s6, v47, 57
+; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s40, s7, s6
+; SI-NEXT: v_readlane_b32 s6, v56, 63
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 56
-; SI-NEXT: v_readlane_b32 s9, v47, 54
+; SI-NEXT: v_readlane_b32 s7, v56, 62
+; SI-NEXT: v_readlane_b32 s12, v56, 60
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 55
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 61
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s7, s7, s12
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s43, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v47, 7
+; SI-NEXT: s_add_i32 s27, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 9
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 53
-; SI-NEXT: v_readlane_b32 s9, v47, 51
+; SI-NEXT: v_readlane_b32 s7, v56, 59
+; SI-NEXT: v_readlane_b32 s12, v56, 57
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 52
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 58
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s7, s7, s12
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s44, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v47, 11
+; SI-NEXT: s_add_i32 s12, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 13
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 10
-; SI-NEXT: v_readlane_b32 s9, v47, 9
+; SI-NEXT: v_readlane_b32 s7, v56, 12
+; SI-NEXT: v_readlane_b32 s18, v56, 11
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 8
-; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 10
+; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_or_b32 s7, s7, s18
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s9, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v47, 15
-; SI-NEXT: s_add_i32 s22, s12, 0x3000000
+; SI-NEXT: s_add_i32 s28, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 17
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 14
-; SI-NEXT: v_readlane_b32 s12, v47, 13
+; SI-NEXT: v_readlane_b32 s7, v56, 16
+; SI-NEXT: v_readlane_b32 s18, v56, 15
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 12
-; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 14
+; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s7, s7, s18
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s15, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v47, 19
+; SI-NEXT: s_add_i32 s20, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 47
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 18
-; SI-NEXT: v_readlane_b32 s12, v47, 17
+; SI-NEXT: v_readlane_b32 s7, v56, 20
+; SI-NEXT: v_readlane_b32 s18, v56, 19
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 16
-; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: v_readlane_b32 s7, v56, 18
+; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s12
+; SI-NEXT: s_or_b32 s7, s7, s18
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s12, s6, 0x3000000
-; SI-NEXT: v_readlane_b32 s6, v47, 23
+; SI-NEXT: s_add_i32 s7, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 49
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v47, 22
-; SI-NEXT: v_readlane_b32 s17, v47, 21
+; SI-NEXT: v_readlane_b32 s18, v56, 45
+; SI-NEXT: v_readlane_b32 s19, v56, 39
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 20
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s7, 24
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s17
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v47, 45
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 43
-; SI-NEXT: v_readlane_b32 s18, v47, 25
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s7, s17, s7
-; SI-NEXT: v_readlane_b32 s17, v47, 24
-; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s7, s17, s7
-; SI-NEXT: s_add_i32 s20, s7, 0x3000000
-; SI-NEXT: v_readlane_b32 s7, v47, 46
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 44
-; SI-NEXT: v_readlane_b32 s18, v47, 40
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s7, s17, s7
-; SI-NEXT: v_readlane_b32 s17, v47, 39
-; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s7, s17, s7
-; SI-NEXT: v_readlane_b32 s17, v47, 49
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: v_readlane_b32 s18, v47, 47
-; SI-NEXT: v_readlane_b32 s23, v47, 42
-; SI-NEXT: s_and_b32 s17, s17, 0xff
; SI-NEXT: s_lshl_b32 s18, s18, 8
-; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v47, 41
-; SI-NEXT: s_and_b32 s23, s23, 0xff
-; SI-NEXT: s_addk_i32 s17, 0x300
-; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_lshl_b32 s23, s23, 16
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s23
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_add_i32 s23, s17, 0x3000000
-; SI-NEXT: v_readlane_b32 s17, v47, 1
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: v_readlane_b32 s18, v47, 0
-; SI-NEXT: v_readlane_b32 s24, v47, 50
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_lshl_b32 s18, s18, 8
-; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v47, 48
-; SI-NEXT: s_and_b32 s24, s24, 0xff
-; SI-NEXT: s_addk_i32 s17, 0x300
+; SI-NEXT: s_add_i32 s19, s19, 3
+; SI-NEXT: s_or_b32 s6, s18, s6
+; SI-NEXT: v_readlane_b32 s18, v56, 38
+; SI-NEXT: s_and_b32 s19, s19, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s24
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_add_i32 s18, s17, 0x3000000
-; SI-NEXT: v_readlane_b32 s17, v47, 5
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: v_readlane_b32 s24, v47, 4
-; SI-NEXT: v_readlane_b32 s45, v47, 3
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_lshl_b32 s24, s24, 8
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s18, s18, s19
+; SI-NEXT: s_or_b32 s6, s18, s6
+; SI-NEXT: s_add_i32 s18, s6, 0x3000000
+; SI-NEXT: v_readlane_b32 s6, v56, 51
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_readlane_b32 s19, v56, 48
+; SI-NEXT: v_readlane_b32 s41, v56, 41
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s19, s19, 8
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: s_or_b32 s6, s19, s6
+; SI-NEXT: v_readlane_b32 s19, v56, 40
+; SI-NEXT: s_and_b32 s41, s41, 0xff
+; SI-NEXT: s_addk_i32 s6, 0x300
+; SI-NEXT: s_lshl_b32 s19, s19, 24
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s41
+; SI-NEXT: s_or_b32 s6, s19, s6
+; SI-NEXT: v_readlane_b32 s19, v56, 52
+; SI-NEXT: s_add_i32 s19, s19, 3
+; SI-NEXT: v_readlane_b32 s41, v56, 50
+; SI-NEXT: v_readlane_b32 s42, v56, 43
+; SI-NEXT: s_and_b32 s19, s19, 0xff
+; SI-NEXT: s_lshl_b32 s41, s41, 8
+; SI-NEXT: s_add_i32 s42, s42, 3
+; SI-NEXT: s_or_b32 s19, s41, s19
+; SI-NEXT: v_readlane_b32 s41, v56, 42
+; SI-NEXT: s_and_b32 s42, s42, 0xff
+; SI-NEXT: s_addk_i32 s19, 0x300
+; SI-NEXT: s_lshl_b32 s41, s41, 24
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s41, s41, s42
+; SI-NEXT: s_or_b32 s19, s41, s19
+; SI-NEXT: v_readlane_b32 s41, v56, 55
+; SI-NEXT: s_add_i32 s41, s41, 3
+; SI-NEXT: v_readlane_b32 s42, v56, 53
+; SI-NEXT: v_readlane_b32 s43, v56, 46
+; SI-NEXT: s_and_b32 s41, s41, 0xff
+; SI-NEXT: s_lshl_b32 s42, s42, 8
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: s_or_b32 s41, s42, s41
+; SI-NEXT: v_readlane_b32 s42, v56, 44
+; SI-NEXT: s_and_b32 s43, s43, 0xff
+; SI-NEXT: s_addk_i32 s41, 0x300
+; SI-NEXT: s_lshl_b32 s42, s42, 24
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_or_b32 s42, s42, s43
+; SI-NEXT: s_or_b32 s41, s42, s41
+; SI-NEXT: v_readlane_b32 s42, v56, 1
+; SI-NEXT: s_add_i32 s42, s42, 3
+; SI-NEXT: v_readlane_b32 s43, v56, 0
+; SI-NEXT: v_readlane_b32 s44, v56, 56
+; SI-NEXT: s_and_b32 s42, s42, 0xff
+; SI-NEXT: s_lshl_b32 s43, s43, 8
+; SI-NEXT: s_add_i32 s44, s44, 3
+; SI-NEXT: s_or_b32 s42, s43, s42
+; SI-NEXT: v_readlane_b32 s43, v56, 54
+; SI-NEXT: s_and_b32 s44, s44, 0xff
+; SI-NEXT: s_addk_i32 s42, 0x300
+; SI-NEXT: s_lshl_b32 s43, s43, 24
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s42, s42, 0xffff
+; SI-NEXT: s_or_b32 s43, s43, s44
+; SI-NEXT: s_or_b32 s42, s43, s42
+; SI-NEXT: v_readlane_b32 s43, v56, 5
+; SI-NEXT: s_add_i32 s43, s43, 3
+; SI-NEXT: v_readlane_b32 s44, v56, 4
+; SI-NEXT: v_readlane_b32 s45, v56, 3
+; SI-NEXT: s_and_b32 s43, s43, 0xff
+; SI-NEXT: s_lshl_b32 s44, s44, 8
; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: s_or_b32 s17, s24, s17
-; SI-NEXT: v_readlane_b32 s24, v47, 2
+; SI-NEXT: s_or_b32 s43, s44, s43
+; SI-NEXT: v_readlane_b32 s44, v56, 2
; SI-NEXT: s_and_b32 s45, s45, 0xff
-; SI-NEXT: s_addk_i32 s17, 0x300
-; SI-NEXT: s_lshl_b32 s24, s24, 24
+; SI-NEXT: s_addk_i32 s43, 0x300
+; SI-NEXT: s_lshl_b32 s44, s44, 24
; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s45
-; SI-NEXT: s_or_b32 s17, s24, s17
-; SI-NEXT: s_add_i32 s24, s17, 0x3000000
-; SI-NEXT: v_readlane_b32 s17, v47, 38
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: v_readlane_b32 s45, v47, 37
-; SI-NEXT: v_readlane_b32 s46, v47, 36
-; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_or_b32 s44, s44, s45
+; SI-NEXT: s_or_b32 s43, s44, s43
+; SI-NEXT: v_readlane_b32 s44, v56, 37
+; SI-NEXT: s_add_i32 s44, s44, 3
+; SI-NEXT: v_readlane_b32 s45, v56, 8
+; SI-NEXT: v_readlane_b32 s46, v56, 7
+; SI-NEXT: s_and_b32 s44, s44, 0xff
; SI-NEXT: s_lshl_b32 s45, s45, 8
; SI-NEXT: s_add_i32 s46, s46, 3
-; SI-NEXT: s_or_b32 s17, s45, s17
-; SI-NEXT: v_readlane_b32 s45, v47, 6
+; SI-NEXT: s_or_b32 s44, s45, s44
+; SI-NEXT: v_readlane_b32 s45, v56, 6
; SI-NEXT: s_and_b32 s46, s46, 0xff
-; SI-NEXT: s_addk_i32 s17, 0x300
+; SI-NEXT: s_addk_i32 s44, 0x300
; SI-NEXT: s_lshl_b32 s45, s45, 24
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_and_b32 s44, s44, 0xffff
; SI-NEXT: s_or_b32 s45, s45, s46
-; SI-NEXT: s_or_b32 s17, s45, s17
-; SI-NEXT: v_readlane_b32 s45, v47, 35
+; SI-NEXT: s_or_b32 s44, s45, s44
+; SI-NEXT: v_readlane_b32 s45, v56, 36
; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: v_readlane_b32 s46, v47, 34
-; SI-NEXT: v_readlane_b32 s47, v47, 32
+; SI-NEXT: v_readlane_b32 s46, v56, 35
+; SI-NEXT: v_readlane_b32 s47, v56, 33
; SI-NEXT: s_and_b32 s45, s45, 0xff
; SI-NEXT: s_lshl_b32 s46, s46, 8
; SI-NEXT: s_add_i32 s47, s47, 3
; SI-NEXT: s_or_b32 s45, s46, s45
-; SI-NEXT: v_readlane_b32 s46, v47, 33
+; SI-NEXT: v_readlane_b32 s46, v56, 34
; SI-NEXT: s_and_b32 s47, s47, 0xff
; SI-NEXT: s_addk_i32 s45, 0x300
; SI-NEXT: s_lshl_b32 s46, s46, 24
@@ -146982,227 +147969,224 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: s_and_b32 s45, s45, 0xffff
; SI-NEXT: s_or_b32 s46, s46, s47
; SI-NEXT: s_or_b32 s45, s46, s45
-; SI-NEXT: s_add_i32 s45, s45, 0x3000000
-; SI-NEXT: s_add_i32 s41, s41, 0x3000000
-; SI-NEXT: s_and_b32 s46, s45, 0xffff0000
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
-; SI-NEXT: s_add_i32 s8, s8, 0x3000000
+; SI-NEXT: s_add_i32 s9, s9, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
+; SI-NEXT: s_add_i32 s15, s15, 0x3000000
; SI-NEXT: s_add_i32 s16, s16, 0x3000000
+; SI-NEXT: s_add_i32 s17, s17, 0x3000000
; SI-NEXT: s_add_i32 s21, s21, 0x3000000
+; SI-NEXT: s_add_i32 s24, s24, 0x3000000
; SI-NEXT: s_add_i32 s25, s25, 0x3000000
; SI-NEXT: s_add_i32 s26, s26, 0x3000000
-; SI-NEXT: s_add_i32 s27, s27, 0x3000000
-; SI-NEXT: s_add_i32 s28, s28, 0x3000000
; SI-NEXT: s_add_i32 s29, s29, 0x3000000
; SI-NEXT: s_add_i32 s40, s40, 0x3000000
-; SI-NEXT: s_add_i32 s42, s42, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
-; SI-NEXT: s_add_i32 s7, s7, 0x3000000
-; SI-NEXT: s_add_i32 s17, s17, 0x3000000
-; SI-NEXT: v_writelane_b32 v46, s46, 54
-; SI-NEXT: s_and_b32 s60, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: s_lshl_b32 s57, s41, 16
-; SI-NEXT: s_lshl_b32 s46, s45, 16
-; SI-NEXT: s_and_b32 s58, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: v_writelane_b32 v46, s24, 55
-; SI-NEXT: s_and_b32 s24, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s61, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s23, s23, 16
-; SI-NEXT: s_and_b32 s62, s7, 0xffff0000
+; SI-NEXT: s_add_i32 s19, s19, 0x3000000
+; SI-NEXT: s_add_i32 s41, s41, 0x3000000
+; SI-NEXT: s_add_i32 s42, s42, 0x3000000
+; SI-NEXT: s_add_i32 s43, s43, 0x3000000
+; SI-NEXT: s_add_i32 s44, s44, 0x3000000
+; SI-NEXT: s_add_i32 s45, s45, 0x3000000
+; SI-NEXT: s_and_b32 s82, s45, 0xffff0000
+; SI-NEXT: s_lshl_b32 s81, s45, 16
+; SI-NEXT: s_and_b32 s83, s44, 0xffff0000
+; SI-NEXT: s_lshl_b32 s80, s44, 16
+; SI-NEXT: s_and_b32 s85, s43, 0xffff0000
+; SI-NEXT: s_lshl_b32 s84, s43, 16
+; SI-NEXT: s_and_b32 s86, s42, 0xffff0000
+; SI-NEXT: s_lshl_b32 s71, s42, 16
+; SI-NEXT: s_and_b32 s96, s41, 0xffff0000
+; SI-NEXT: s_lshl_b32 s87, s41, 16
+; SI-NEXT: s_and_b32 s97, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s70, s19, 16
+; SI-NEXT: s_and_b32 s99, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s98, s6, 16
+; SI-NEXT: s_and_b32 s6, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s18, 16
+; SI-NEXT: s_and_b32 s18, s7, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_and_b32 s63, s20, 0xffff0000
-; SI-NEXT: s_lshl_b32 s70, s20, 16
-; SI-NEXT: s_and_b32 s56, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s93, s6, 16
-; SI-NEXT: s_and_b32 s59, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s6, s12, 16
-; SI-NEXT: s_and_b32 s77, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s99, s15, 16
-; SI-NEXT: s_and_b32 s78, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s75, s9, 16
-; SI-NEXT: s_and_b32 s79, s44, 0xffff0000
-; SI-NEXT: s_lshl_b32 s98, s44, 16
-; SI-NEXT: s_and_b32 s88, s43, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s43, 16
-; SI-NEXT: s_and_b32 s91, s42, 0xffff0000
-; SI-NEXT: s_lshl_b32 s97, s42, 16
-; SI-NEXT: s_and_b32 s9, s41, 0xffff0000
-; SI-NEXT: s_and_b32 s15, s40, 0xffff0000
-; SI-NEXT: s_lshl_b32 s96, s40, 16
-; SI-NEXT: s_and_b32 s40, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s29, s29, 16
-; SI-NEXT: s_and_b32 s42, s28, 0xffff0000
-; SI-NEXT: s_lshl_b32 s87, s28, 16
-; SI-NEXT: s_and_b32 s28, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 s41, s27, 16
-; SI-NEXT: s_and_b32 s47, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s86, s26, 16
-; SI-NEXT: s_and_b32 s27, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s43, s25, 16
-; SI-NEXT: s_and_b32 s72, s22, 0xffff0000
-; SI-NEXT: s_lshl_b32 s85, s22, 16
-; SI-NEXT: s_and_b32 s74, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s25, s21, 16
-; SI-NEXT: s_and_b32 s52, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s84, s19, 16
-; SI-NEXT: s_and_b32 s76, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s51, s16, 16
-; SI-NEXT: s_and_b32 s55, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s83, s14, 16
-; SI-NEXT: s_and_b32 s45, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s54, s13, 16
-; SI-NEXT: s_and_b32 s66, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s82, s11, 16
-; SI-NEXT: s_mov_b32 s11, s57
-; SI-NEXT: s_and_b32 s67, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s65, s10, 16
-; SI-NEXT: s_and_b32 s69, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s81, s8, 16
-; SI-NEXT: s_and_b32 s8, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s5, 16
-; SI-NEXT: s_and_b32 s71, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s80, s4, 16
+; SI-NEXT: s_and_b32 s42, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s68, s20, 16
+; SI-NEXT: s_and_b32 s20, s28, 0xffff0000
+; SI-NEXT: s_lshl_b32 s19, s28, 16
+; SI-NEXT: s_and_b32 s43, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s67, s12, 16
+; SI-NEXT: s_and_b32 s12, s27, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s27, 16
+; SI-NEXT: s_and_b32 s44, s40, 0xffff0000
+; SI-NEXT: s_lshl_b32 s66, s40, 16
+; SI-NEXT: s_and_b32 s59, s29, 0xffff0000
+; SI-NEXT: s_lshl_b32 s41, s29, 16
+; SI-NEXT: s_and_b32 s27, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s65, s26, 16
+; SI-NEXT: s_and_b32 s75, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s25, 16
+; SI-NEXT: s_and_b32 s29, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s64, s24, 16
+; SI-NEXT: s_and_b32 s24, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s46, s21, 16
+; SI-NEXT: s_and_b32 s21, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s55, s17, 16
+; SI-NEXT: s_and_b32 s40, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s88, s16, 16
+; SI-NEXT: s_and_b32 s92, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s54, s15, 16
+; SI-NEXT: s_and_b32 s93, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s91, s14, 16
+; SI-NEXT: s_and_b32 s95, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s53, s13, 16
+; SI-NEXT: s_and_b32 vcc_lo, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s11, 16
+; SI-NEXT: s_and_b32 s30, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s52, s10, 16
+; SI-NEXT: s_and_b32 s31, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_hi, s9, 16
+; SI-NEXT: s_and_b32 s35, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s51, s8, 16
+; SI-NEXT: s_and_b32 s36, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s34, s22, 16
+; SI-NEXT: s_and_b32 s38, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s50, s23, 16
+; SI-NEXT: s_and_b32 s39, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 s37, s5, 16
+; SI-NEXT: s_and_b32 s48, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s49, s4, 16
; SI-NEXT: .LBB89_5: ; %end
-; SI-NEXT: v_readlane_b32 s4, v46, 54
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s81
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s83
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s80
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s60
-; SI-NEXT: v_readlane_b32 s4, v46, 55
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s85
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s84
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s86
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s71
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s96
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s87
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s97
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s70
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s99
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s70
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s98
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s69
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s18
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s7
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s42
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s99
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s68
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s20
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s19
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s43
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s98
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s67
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s12
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s45
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s44
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s97
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s66
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s59
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s41
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s27
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s96
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s65
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s75
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s62
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s29
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s87
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s64
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s24
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s46
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s86
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s55
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s40
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s88
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s92
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s85
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s54
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s93
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s91
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s84
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s53
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, vcc_lo
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s94
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s55
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s30
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s83
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s52
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s31
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s54
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, vcc_hi
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s35
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s82
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s51
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s36
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s65
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s34
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s69
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s38
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s81
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s50
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s39
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s37
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s71
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s48
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s80
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s49
; SI-NEXT: v_readlane_b32 s30, v45, 34
; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
; SI-NEXT: v_readlane_b32 s31, v45, 35
@@ -147244,6 +148228,7 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -147267,32 +148252,28 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
; VI-NEXT: v_readfirstlane_b32 s63, v12
-; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12
-; VI-NEXT: v_readfirstlane_b32 s59, v29
-; VI-NEXT: v_readfirstlane_b32 s47, v27
+; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s75, v30
-; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s60, v26
; VI-NEXT: v_readfirstlane_b32 s43, v25
+; VI-NEXT: v_readfirstlane_b32 s59, v29
+; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s47, v27
; VI-NEXT: v_readfirstlane_b32 s56, v24
; VI-NEXT: v_readfirstlane_b32 s15, v23
; VI-NEXT: v_readfirstlane_b32 s44, v22
; VI-NEXT: v_readfirstlane_b32 s12, v21
; VI-NEXT: v_readfirstlane_b32 s40, v20
-; VI-NEXT: v_readfirstlane_b32 s76, v18
-; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s9, v19
+; VI-NEXT: v_readfirstlane_b32 s76, v18
; VI-NEXT: v_readfirstlane_b32 s61, v17
+; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s62, v15
-; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s57, v13
-; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s41, v9
; VI-NEXT: v_readfirstlane_b32 s46, v8
; VI-NEXT: v_readfirstlane_b32 s13, v7
@@ -147302,176 +148283,191 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_readfirstlane_b32 s7, v3
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4
+; VI-NEXT: v_readfirstlane_b32 s8, v0
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
-; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320
-; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316
-; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308
-; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304
-; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300
-; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:260
; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:256
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:252
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:248
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:216
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:212
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:208
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:204
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:196
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:192
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:188
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:180
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:176
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:152
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB89_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -147485,50 +148481,61 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_mov_b32_e32 v43, v10
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, v49
+; VI-NEXT: v_mov_b32_e32 v49, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v35, v12
+; VI-NEXT: v_mov_b32_e32 v31, v42
+; VI-NEXT: v_mov_b32_e32 v42, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s47
@@ -147537,169 +148544,185 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v15, v14, s4
+; VI-NEXT: v_perm_b32 v12, v35, v32, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v18, v23, v18, s4
-; VI-NEXT: v_perm_b32 v23, v51, v33, s4
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v12, v56, v12, s4
+; VI-NEXT: v_perm_b32 v12, v50, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v47, v13, s4
+; VI-NEXT: v_perm_b32 v13, v39, v36, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v14, v59, v14, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v15, v32, v15, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v61, v13, s4
+; VI-NEXT: v_perm_b32 v13, v57, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v17, v60, s4
+; VI-NEXT: v_perm_b32 v32, v52, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v53, s4
+; VI-NEXT: v_or_b32_e32 v13, v32, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v21, v16, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v17, v28, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v21, v58, v46, s4
-; VI-NEXT: v_perm_b32 v24, v36, v49, s4
-; VI-NEXT: v_mov_b32_e32 v28, v52
-; VI-NEXT: v_mov_b32_e32 v52, v53
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v19, v16, s4
-; VI-NEXT: v_perm_b32 v19, v26, v22, s4
-; VI-NEXT: v_or_b32_e32 v17, v19, v17
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v25, v20, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v16, v18, v16
-; VI-NEXT: v_perm_b32 v18, v45, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v20, v44, v29, s4
-; VI-NEXT: v_perm_b32 v22, v53, v42, s4
-; VI-NEXT: v_mov_b32_e32 v45, v34
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v63, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v32, v14
+; VI-NEXT: v_perm_b32 v32, v61, v34, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v15, v15, v62, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v32
+; VI-NEXT: v_perm_b32 v32, v60, v59, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v28, v58, v28, s4
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: v_or_b32_e32 v16, v28, v32
+; VI-NEXT: v_perm_b32 v28, v46, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_perm_b32 v18, v29, v18, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v28
+; VI-NEXT: v_perm_b32 v28, v44, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v43, v19, s4
+; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_perm_b32 v20, v23, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v19, v19, v28
+; VI-NEXT: v_perm_b32 v28, v24, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v20, v20, v28
+; VI-NEXT: v_perm_b32 v28, v26, v25, s4
+; VI-NEXT: v_mov_b32_e32 v37, v54
+; VI-NEXT: v_perm_b32 v29, v49, v54, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_mov_b32_e32 v53, v49
+; VI-NEXT: v_mov_b32_e32 v52, v33
+; VI-NEXT: v_perm_b32 v35, v56, v47, s4
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_e32 v17, v17, v35
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v21, v22, v21, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v21, v21, v28
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v19, v30, v19, s4
-; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v55, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v39, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v38, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v54, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v40, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: v_perm_b32 v24, v48, v34, s4
+; VI-NEXT: v_mov_b32_e32 v36, v38
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_mov_b32_e32 v48, v54
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v24, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_mov_b32_e32 v50, v28
+; VI-NEXT: v_perm_b32 v28, v31, v28, s4
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v48, v25
-; VI-NEXT: v_perm_b32 v25, v25, v41, s4
-; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v33
-; VI-NEXT: v_mov_b32_e32 v33, v26
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_perm_b32 v22, v23, v22, s4
+; VI-NEXT: v_or_b32_e32 v22, v22, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v53, v25
+; VI-NEXT: v_mov_b32_e32 v57, v31
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v25, s4
+; VI-NEXT: v_or_b32_e32 v23, v24, v23
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v25, v24, s4
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v24, v25, v24
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v26, v40, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v34, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v28, v28, v35, s4
+; VI-NEXT: v_perm_b32 v28, v55, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v62, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, v44
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v43, v29, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v49, v29
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v41, v55, v54, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v32, v30
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v35, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_mov_b32_e32 v62, v31
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v63, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_mov_b32_e32 v35, v43
-; VI-NEXT: v_perm_b32 v43, v44, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_mov_b32_e32 v51, v38
+; VI-NEXT: v_mov_b32_e32 v38, v55
+; VI-NEXT: v_or_b32_e32 v31, v41, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v39, v34
-; VI-NEXT: v_mov_b32_e32 v34, v52
-; VI-NEXT: v_mov_b32_e32 v52, v45
; VI-NEXT: s_branch .LBB89_3
; VI-NEXT: .LBB89_2:
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v52, v34
-; VI-NEXT: v_mov_b32_e32 v39, v33
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v53
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v51, v4
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: v_mov_b32_e32 v53, v10
+; VI-NEXT: v_mov_b32_e32 v38, v3
+; VI-NEXT: v_mov_b32_e32 v52, v31
+; VI-NEXT: v_mov_b32_e32 v35, v8
+; VI-NEXT: v_mov_b32_e32 v63, v1
+; VI-NEXT: v_mov_b32_e32 v37, v49
+; VI-NEXT: v_mov_b32_e32 v36, v6
+; VI-NEXT: v_mov_b32_e32 v48, v0
+; VI-NEXT: v_mov_b32_e32 v34, v54
+; VI-NEXT: v_mov_b32_e32 v32, v5
+; VI-NEXT: v_mov_b32_e32 v50, v11
+; VI-NEXT: v_mov_b32_e32 v57, v9
; VI-NEXT: v_mov_b32_e32 v62, v2
-; VI-NEXT: v_mov_b32_e32 v35, v1
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_mov_b32_e32 v49, v33
+; VI-NEXT: v_mov_b32_e32 v33, v7
+; VI-NEXT: v_mov_b32_e32 v43, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -147709,9 +148732,26 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB89_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
+; VI-NEXT: v_perm_b32 v0, v0, v63, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
+; VI-NEXT: v_perm_b32 v0, v0, v48, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35
+; VI-NEXT: v_perm_b32 v20, v0, v32, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
+; VI-NEXT: v_perm_b32 v21, v0, v62, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v57
+; VI-NEXT: v_perm_b32 v23, v0, v33, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_perm_b32 v24, v0, v52, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53
+; VI-NEXT: v_perm_b32 v25, v0, v37, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s60, s60, 3
@@ -147733,339 +148773,349 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
+; VI-NEXT: v_mov_b32_e32 v57, s21
; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_mov_b32_e32 v62, s19
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_mov_b32_e32 v18, s17
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_mov_b32_e32 v63, s17
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v0, v0, v35, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, s21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v26, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v27, v0, v50, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v30, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v31, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v0, v1, s4
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v41, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v19, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v0, v1, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
-; VI-NEXT: v_perm_b32 v25, v0, v53, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
-; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v24, v0, v52, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v30, v0, v41, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40
-; VI-NEXT: v_perm_b32 v23, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v31, v0, v49, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54
-; VI-NEXT: v_perm_b32 v22, v0, v37, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v33, v0, v39, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v21, v0, v63, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v36, v0, v42, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
-; VI-NEXT: v_perm_b32 v20, v0, v55, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
+; VI-NEXT: v_perm_b32 v44, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v63, s19
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v45, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v53, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: v_perm_b32 v47, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v56, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v18, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v0, v1, s4
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v58, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v59, v0, v43, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v60, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v0, v1, s4
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v61, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v40, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v42, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v10, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v14, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v16, v0, v60, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v40, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56
+; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v42, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47
+; VI-NEXT: v_perm_b32 v36, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v62, s20, v62, v0
-; VI-NEXT: v_perm_b32 v63, s18, v63, v0
+; VI-NEXT: v_perm_b32 v57, s20, v57, v0
+; VI-NEXT: v_perm_b32 v62, s18, v62, v0
+; VI-NEXT: v_lshlrev_b32_e32 v62, 16, v62
+; VI-NEXT: v_add_u32_e32 v57, vcc, 0x300, v57
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, s75, v1, v0
+; VI-NEXT: v_perm_b32 v39, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v55, s72, v1, v0
+; VI-NEXT: v_perm_b32 v33, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v41, s60, v1, v0
+; VI-NEXT: v_perm_b32 v35, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v46, s44, v1, v0
+; VI-NEXT: v_perm_b32 v48, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v47, s76, v1, v0
+; VI-NEXT: v_perm_b32 v49, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v56, s74, v1, v0
+; VI-NEXT: v_perm_b32 v50, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v57, s58, v1, v0
+; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
+; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
+; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
+; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v58, s42, v1, v0
+; VI-NEXT: v_perm_b32 v52, s42, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v59, s11, v1, v0
+; VI-NEXT: v_perm_b32 v53, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v60, s28, v1, v0
+; VI-NEXT: v_perm_b32 v54, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v61, s24, v1, v0
+; VI-NEXT: v_perm_b32 v55, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
-; VI-NEXT: v_perm_b32 v0, s16, v18, v0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63
+; VI-NEXT: v_perm_b32 v0, s16, v63, v0
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
+; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
-; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62
-; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61
-; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60
-; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59
-; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58
-; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57
-; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56
-; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47
-; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46
-; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11
-; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40
+; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
+; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42
-; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43
-; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41
-; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44
-; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45
-; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36
-; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
+; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v41
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v19
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v18
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v58
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v59
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v60
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v61
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
+; VI-NEXT: v_or_b32_sdwa v0, v62, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -148084,45 +149134,20 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB89_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -148162,458 +149187,521 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s42, v13
+; GFX9-NEXT: v_readfirstlane_b32 s46, v12
+; GFX9-NEXT: v_readfirstlane_b32 s61, v11
; GFX9-NEXT: v_readfirstlane_b32 s7, v0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:8
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s6, v1
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s9, v21
; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s42, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s61, v11
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(41)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:320
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:296
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:264
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:260
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:256
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280
-; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264
-; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:260
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:256
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:252
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:244
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:240
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:244
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:236
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:220
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:212
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:180
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:148
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:144
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(26)
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB89_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v24, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v49, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v24
+; GFX9-NEXT: v_mov_b32_e32 v63, v55
+; GFX9-NEXT: v_mov_b32_e32 v55, v4
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s7, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s7, v4, v24
+; GFX9-NEXT: v_mov_b32_e32 v33, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
-; GFX9-NEXT: v_perm_b32 v5, s10, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s43, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s10, v5, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s17
+; GFX9-NEXT: v_perm_b32 v4, s43, v4, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v23, s16, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s19
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
-; GFX9-NEXT: v_perm_b32 v6, s14, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s59, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s14, v6, v24
+; GFX9-NEXT: v_perm_b32 v41, s18, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v45, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v7
+; GFX9-NEXT: v_perm_b32 v5, s59, v5, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, s21
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s63, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v24
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v21, s20, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s23
+; GFX9-NEXT: v_perm_b32 v6, s63, v6, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v41, s22, v41, v24
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
-; GFX9-NEXT: v_perm_b32 v8, s58, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s75, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s58, v8, v24
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v61
+; GFX9-NEXT: v_mov_b32_e32 v61, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v10
+; GFX9-NEXT: v_perm_b32 v7, s75, v7, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
; GFX9-NEXT: v_mov_b32_e32 v9, s11
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
+; GFX9-NEXT: v_or_b32_sdwa v1, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v63, v12
-; GFX9-NEXT: v_mov_b32_e32 v12, s40
+; GFX9-NEXT: v_mov_b32_e32 v20, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v12, s13, v12, v10
-; GFX9-NEXT: v_perm_b32 v9, s60, v9, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v9, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v12, s72
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v13
-; GFX9-NEXT: v_mov_b32_e32 v13, s56
-; GFX9-NEXT: v_perm_b32 v12, s62, v12, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v13, v10
-; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v20, s13, v20, v10
; GFX9-NEXT: s_mov_b32 s4, 0x6050400
-; GFX9-NEXT: v_perm_b32 v11, s74, v14, v11
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v14, v28, v23, s5
-; GFX9-NEXT: v_perm_b32 v28, v48, v62, s5
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v12, v15, v17, s4
+; GFX9-NEXT: v_perm_b32 v9, s60, v9, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_or_b32_sdwa v9, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v20, s72
+; GFX9-NEXT: v_mov_b32_e32 v21, s56
+; GFX9-NEXT: v_perm_b32 v13, s74, v13, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_perm_b32 v12, v35, v53, s4
+; GFX9-NEXT: v_perm_b32 v20, s62, v20, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v21, v10
+; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v20, v24, s4
+; GFX9-NEXT: v_perm_b32 v13, v26, v42, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v16, v19, s4
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: v_perm_b32 v13, v39, v34, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v14, v18, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v27, v35, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v15, v21, v26, s4
+; GFX9-NEXT: v_perm_b32 v20, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v62, v52, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
+; GFX9-NEXT: v_or_b32_sdwa v14, v20, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v36, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v16, v30, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v17, v37, v29, s5
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v18, v51, v39, s5
+; GFX9-NEXT: v_perm_b32 v20, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v0, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v43, v38, s5
+; GFX9-NEXT: v_perm_b32 v22, v32, v16, s5
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v21, v46, v60, s5
+; GFX9-NEXT: v_or_b32_sdwa v16, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v57, v36, s5
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v40, v17, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v19, v41, v50, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v18, v58, v53, s5
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v40, v45, s5
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_perm_b32 v19, v46, v36, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v61, v57, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v56, v44, s5
+; GFX9-NEXT: v_or_b32_sdwa v17, v17, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v20, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v19, v51, v19, s5
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v33
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: v_perm_b32 v20, v59, v32, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v23, v58, v23, s5
+; GFX9-NEXT: v_perm_b32 v24, v47, v24, s5
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v58, v49
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: v_perm_b32 v20, v54, v57, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v54, v55, s5
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v21, v50, v21, s5
; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v21, v60, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_perm_b32 v21, v33, v60, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v43, v32, s5
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v22, v25, v22, s5
; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v53, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v50, v37
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_mov_b32_e32 v62, v30
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_mov_b32_e32 v47, v26
+; GFX9-NEXT: v_perm_b32 v26, v44, v26, s5
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v22, v52, v59, s5
+; GFX9-NEXT: v_mov_b32_e32 v42, v29
+; GFX9-NEXT: v_mov_b32_e32 v44, v45
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v22, v37, v22, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v38, v37, s5
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v24, v42, v24, s5
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v27, v49, v27, s4
-; GFX9-NEXT: v_mov_b32_e32 v49, v48
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
+; GFX9-NEXT: v_mov_b32_e32 v61, v41
+; GFX9-NEXT: v_mov_b32_e32 v37, v28
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v23, v38, v50, s5
+; GFX9-NEXT: v_mov_b32_e32 v38, v33
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v56, v54
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v55, v23, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v55, v63
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v42, v46, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v49, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v40, v25, s4
+; GFX9-NEXT: v_perm_b32 v25, v25, v41, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v26, v33, v34, s4
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v26, v45, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v45, v31
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v54, v41, v54, s5
+; GFX9-NEXT: v_mov_b32_e32 v52, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v53, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v35, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v39, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
+; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v29, v51, v39, s4
+; GFX9-NEXT: v_perm_b32 v29, v46, v59, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v63, v30
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v30, v35, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
+; GFX9-NEXT: v_perm_b32 v30, v43, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v33, v31, s4
+; GFX9-NEXT: v_mov_b32_e32 v36, v31
+; GFX9-NEXT: v_perm_b32 v31, v31, v33, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v34, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_perm_b32 v33, v48, v33, s5
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v33, v31
+; GFX9-NEXT: v_perm_b32 v31, v40, v31, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: v_or_b32_sdwa v31, v31, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v48, v42
+; GFX9-NEXT: v_mov_b32_e32 v54, v40
; GFX9-NEXT: s_branch .LBB89_3
; GFX9-NEXT: .LBB89_2:
-; GFX9-NEXT: v_mov_b32_e32 v33, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v49, v3
-; GFX9-NEXT: v_mov_b32_e32 v63, v1
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v52, v0
+; GFX9-NEXT: v_mov_b32_e32 v56, v20
+; GFX9-NEXT: v_mov_b32_e32 v62, v8
+; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
+; GFX9-NEXT: v_mov_b32_e32 v38, v1
+; GFX9-NEXT: v_mov_b32_e32 v53, v24
+; GFX9-NEXT: v_mov_b32_e32 v36, v21
+; GFX9-NEXT: v_mov_b32_e32 v39, v33
+; GFX9-NEXT: v_mov_b32_e32 v33, v63
+; GFX9-NEXT: v_mov_b32_e32 v63, v22
+; GFX9-NEXT: v_mov_b32_e32 v37, v2
+; GFX9-NEXT: v_mov_b32_e32 v35, v23
+; GFX9-NEXT: v_mov_b32_e32 v58, v3
+; GFX9-NEXT: v_mov_b32_e32 v50, v7
+; GFX9-NEXT: v_mov_b32_e32 v51, v5
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: v_mov_b32_e32 v53, v33
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB89_3: ; %Flow
@@ -148622,20 +149710,45 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB89_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
; GFX9-NEXT: s_movk_i32 s4, 0x300
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v0, v0, v54, s5
+; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
+; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
+; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
; GFX9-NEXT: v_perm_b32 v0, v0, v63, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v59
+; GFX9-NEXT: v_perm_b32 v0, v0, v46, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v62
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
+; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v37
; GFX9-NEXT: s_add_i32 s74, s74, 3
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: s_add_i32 s60, s60, 3
@@ -148660,260 +149773,219 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v34, s19
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v51, s5
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v27, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v28, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v30, v38, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
-; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v43
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v60
-; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
-; GFX9-NEXT: v_add_u32_sdwa v21, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
-; GFX9-NEXT: v_perm_b32 v0, v0, v55, s5
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
-; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
-; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
-; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
-; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
-; GFX9-NEXT: v_perm_b32 v0, v0, v41, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v22, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v24, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v23, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v25, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
+; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v20, v50, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v18, v62, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_or_b32_sdwa v26, v31, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
@@ -148924,10 +149996,12 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v1, 3, v1
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s5
+; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s62
; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0
@@ -148987,8 +150061,8 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -152099,112 +153173,172 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr37
; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; kill: killed $vgpr41
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
@@ -152220,233 +153354,195 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; kill: killed $vgpr33
; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v2
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v32
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v32
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v32
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v31
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v31
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v30
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v30
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v30
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v29
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v29
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v28
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v28
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v28
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v27
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v26
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v26
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v26
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v25
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v25
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v24
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v24
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v24
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v23
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v23
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v22
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v22
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v21
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v21
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v20
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[23:24]
+; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[19:20]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v1
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v19
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v5
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v18
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[21:22]
+; VI-NEXT: v_mov_b32_e32 v45, v53
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[1:2]
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: v_mov_b32_e32 v55, v53
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
-; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: v_mov_b32_e32 v44, v39
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v21
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v20
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v17
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v17
+; VI-NEXT: v_mov_b32_e32 v42, v46
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
; VI-NEXT: .LBB90_2: ; %Flow
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_4
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v18
@@ -153027,457 +154123,475 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; VI-NEXT: v_alignbit_b32 v15, v15, v33, 16
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v2
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v32
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v32
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v31
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v31
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v30
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v30
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v30
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v29
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v29
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v28
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v28
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v28
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v27
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v26
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v26
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v26
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v25
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v25
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v24
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v24
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v24
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v23
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v23
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v22
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v22
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v21
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v20
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v19
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v5
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v18
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[1:2]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v21
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v20
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v17
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v3
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v1
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v17
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v17
; VI-NEXT: .LBB90_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v55, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v37, v37, v42, s4
-; VI-NEXT: v_perm_b32 v53, v59, v43, s4
-; VI-NEXT: v_perm_b32 v1, v1, v60, s4
-; VI-NEXT: v_perm_b32 v33, v33, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
-; VI-NEXT: v_or_b32_e32 v1, v1, v39
-; VI-NEXT: v_perm_b32 v2, v2, v58, s4
-; VI-NEXT: v_perm_b32 v3, v3, v56, s4
-; VI-NEXT: v_perm_b32 v4, v4, v45, s4
-; VI-NEXT: v_perm_b32 v17, v17, v34, s4
-; VI-NEXT: v_perm_b32 v18, v18, v48, s4
-; VI-NEXT: v_perm_b32 v34, v63, v52, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v5, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v6, v6, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v41, v54, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v7, v7, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v8, v8, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v51, v41, v51, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v10, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v50, v41, v50, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v11, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v12, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v49, v41, v49, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v13, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v10, v10, v52, s4
+; VI-NEXT: v_perm_b32 v13, v13, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v16, v35, s4
+; VI-NEXT: v_perm_b32 v8, v8, v44, s4
+; VI-NEXT: v_perm_b32 v43, v43, v39, s4
+; VI-NEXT: v_perm_b32 v15, v15, v50, s4
+; VI-NEXT: v_perm_b32 v7, v7, v63, s4
+; VI-NEXT: v_perm_b32 v9, v9, v54, s4
+; VI-NEXT: v_perm_b32 v11, v11, v36, s4
+; VI-NEXT: v_perm_b32 v12, v12, v56, s4
+; VI-NEXT: v_perm_b32 v14, v14, v47, s4
+; VI-NEXT: v_perm_b32 v17, v17, v55, s4
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v2, v2, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v51, v62, v51, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v42, v42, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v14, v14, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v40, v40, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v41, v41, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v41, s4
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v5, v5, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v4, v4, v53, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v6, v6, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v16, v16, v41, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v39, v1, s4
+; VI-NEXT: v_perm_b32 v35, v37, v52, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v38, v38, v45, s4
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v18, v18, v37, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v39, v40, v44, s4
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v50, v37, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v43
+; VI-NEXT: v_or_b32_e32 v1, v1, v52
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v49, v49, v44, s4
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v1, v61, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_perm_b32 v1, v59, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v55
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v41
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_perm_b32 v1, v33, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v54
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_perm_b32 v36, v60, v44, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_perm_b32 v1, v57, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v34
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v44, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v62, v61, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_perm_b32 v1, v19, v57, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v50
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v46, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_perm_b32 v1, v20, v38, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v21, v36, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v35, v2, s4
+; VI-NEXT: v_perm_b32 v1, v21, v1, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v22, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v23, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v24, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v26, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v28, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v29, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v30, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v31, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v32, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v3, v32, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -153517,409 +154631,410 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: v_mov_b32_e32 v45, v0
+; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32
+; GFX9-NEXT: v_mov_b32_e32 v62, v0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: v_mov_b32_e32 v56, v15
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: ; kill: killed $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr15
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: ; kill: killed $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: v_mov_b32_e32 v57, v16
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr16
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr15
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr53
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr54
+; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; kill: killed $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; kill: killed $vgpr36
-; GFX9-NEXT: ; kill: killed $vgpr43
-; GFX9-NEXT: ; kill: killed $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(29)
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[56:57]
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[13:14]
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: s_waitcnt vmcnt(45)
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[60:61]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v56
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v19
-; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v17
+; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2]
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v14
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v12
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v10
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v6
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v59
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v58
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v29
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v28
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v27
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v26
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v25
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v24
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v23
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v22
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12]
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v61
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v59, v36
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v61
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v61
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v60
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v60
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[58:59]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v7
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v4
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v2
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v30
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v29
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v27
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v6
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v17
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v26
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v26
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v25
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v24
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v24
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v23
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v22
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v20
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB90_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_4
@@ -153934,66 +155049,66 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v33, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v31, v32, vcc
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v33, v18, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v17
; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v0, v15, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v31, vcc
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v32, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v20
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v20
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v62, v18, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v37, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v19
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v19
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v20, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v40, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v22
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v0, v62, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v32, v0, v37, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -154001,81 +155116,79 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v31, v0, v40, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v20, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v0, v15, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v41, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v19, v41, v0, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v0, v43, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v24
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v0, v44, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v23
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v20, v0, v44, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v26
+; GFX9-NEXT: v_perm_b32 v19, v43, v0, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -154083,116 +155196,107 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_mov_b32_e32 v51, v16
-; GFX9-NEXT: v_mov_b32_e32 v50, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v20, v13, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v28
+; GFX9-NEXT: v_perm_b32 v19, v0, v13, s7
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v27
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v27
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v42, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v42, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v28, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v54, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v39, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v61
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v59
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v55, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v61
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v59
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v26, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_waitcnt vmcnt(57)
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v60
+; GFX9-NEXT: s_waitcnt vmcnt(50)
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v58
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v49, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v60
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v58
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v25, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
@@ -154200,154 +155304,181 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v2
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v48, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v24, v18, v19, vcc
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v27, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v22, v17, v18, vcc
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v28, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v23, v17, v18, vcc
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v33, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v14, v49, v26, s7
+; GFX9-NEXT: v_perm_b32 v13, v48, v25, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v5
+; GFX9-NEXT: v_perm_b32 v14, v22, v24, s7
+; GFX9-NEXT: v_perm_b32 v13, v21, v23, s7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_perm_b32 v14, v19, v33, s7
+; GFX9-NEXT: v_perm_b32 v13, v18, v20, s7
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v5, vcc
+; GFX9-NEXT: v_perm_b32 v14, v6, v17, s7
+; GFX9-NEXT: v_perm_b32 v13, v5, v4, s7
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v31, vcc
+; GFX9-NEXT: v_add3_u32 v8, v8, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v8, v8, v31, vcc
+; GFX9-NEXT: v_bfe_u32 v31, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v31, v31, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v7, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v45, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v7, v7, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v31, vcc
+; GFX9-NEXT: v_bfe_u32 v31, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v31, v31, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v10, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v34, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v10, v10, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v10, v31, vcc
+; GFX9-NEXT: v_bfe_u32 v31, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v31, v31, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v58, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v2, v9, vcc
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v9, v31, vcc
+; GFX9-NEXT: v_bfe_u32 v31, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v31, v31, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_bfe_u32 v12, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v59, v31, v32, vcc
; GFX9-NEXT: v_add3_u32 v12, v12, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
@@ -154366,16 +155497,17 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v14
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v31
+; GFX9-NEXT: v_or_b32_e32 v56, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v14, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v48, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v56, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v14, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v14
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
@@ -154383,686 +155515,687 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v13
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX9-NEXT: v_mov_b32_e32 v34, v16
-; GFX9-NEXT: v_mov_b32_e32 v33, v15
-; GFX9-NEXT: v_perm_b32 v16, v54, v42, s7
-; GFX9-NEXT: v_perm_b32 v15, v55, v39, s7
-; GFX9-NEXT: v_bfe_u32 v48, v31, 16, 1
+; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add3_u32 v48, v48, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v31
+; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
+; GFX9-NEXT: v_or_b32_e32 v56, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
-; GFX9-NEXT: v_perm_b32 v16, v53, v0, s7
-; GFX9-NEXT: v_mov_b32_e32 v61, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v48, v49, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v47, v53, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v56, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v13
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_perm_b32 v32, v14, v1, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v48, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v31, v13, v0, s7
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v61, v31, v32, vcc
+; GFX9-NEXT: v_perm_b32 v57, v14, v1, s7
+; GFX9-NEXT: v_perm_b32 v56, v61, v0, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v19
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v15, v52, v30, s7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v26, v28, s7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v28
-; GFX9-NEXT: v_perm_b32 v16, v27, v29, s7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v23, v25, s7
-; GFX9-NEXT: v_perm_b32 v15, v22, v24, s7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, v56
-; GFX9-NEXT: v_mov_b32_e32 v16, v57
-; GFX9-NEXT: v_perm_b32 v56, v9, v4, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v25
-; GFX9-NEXT: v_perm_b32 v59, v12, v3, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v24
-; GFX9-NEXT: v_perm_b32 v38, v19, v21, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v16
-; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
-; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v10
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v8
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48
+; GFX9-NEXT: v_perm_b32 v36, v30, v28, s7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v29
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v53
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v52
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v55, v12, v59, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v59
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v26
+; GFX9-NEXT: v_perm_b32 v38, v9, v58, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v25
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v19
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v22
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v23
+; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
+; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
+; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v13
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
+; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v16
+; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_bfe_u32 v16, v13, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v60, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v16, v16, v13, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v13
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v16, v31, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v15
; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6
-; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v48
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
-; GFX9-NEXT: v_bfe_u32 v48, v16, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v63, v49, v63, vcc
-; GFX9-NEXT: v_add3_u32 v48, v48, v16, s6
-; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v16
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v16, v48, v49, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v15
-; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX9-NEXT: v_bfe_u32 v47, v48, 16, 1
+; GFX9-NEXT: v_bfe_u32 v31, v16, 16, 1
; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX9-NEXT: v_add3_u32 v47, v47, v48, s6
-; GFX9-NEXT: v_or_b32_e32 v60, 0x400000, v48
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
-; GFX9-NEXT: v_bfe_u32 v48, v15, 16, 1
-; GFX9-NEXT: v_perm_b32 v37, v18, v20, s7
-; GFX9-NEXT: v_perm_b32 v36, v8, v17, s7
-; GFX9-NEXT: v_perm_b32 v35, v7, v6, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v46, v47, v60, vcc
-; GFX9-NEXT: v_add3_u32 v48, v48, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v47, 0x400000, v15
+; GFX9-NEXT: v_add3_u32 v31, v31, v16, s6
+; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v16
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; GFX9-NEXT: v_bfe_u32 v16, v15, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v63, v31, v63, vcc
+; GFX9-NEXT: v_add3_u32 v16, v16, v15, s6
+; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v15
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v48, v47, vcc
-; GFX9-NEXT: v_mov_b32_e32 v49, v36
-; GFX9-NEXT: v_mov_b32_e32 v48, v35
-; GFX9-NEXT: v_mov_b32_e32 v35, v37
-; GFX9-NEXT: v_mov_b32_e32 v36, v38
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v41, v16, v63, s7
-; GFX9-NEXT: v_perm_b32 v40, v15, v46, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v46
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[40:41]
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v43
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v63
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32]
-; GFX9-NEXT: v_perm_b32 v58, v11, v2, s7
-; GFX9-NEXT: v_perm_b32 v57, v10, v5, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5
-; GFX9-NEXT: s_waitcnt vmcnt(23)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v62
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v61
-; GFX9-NEXT: s_waitcnt vmcnt(18)
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v38
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v37
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v32, v13, v60, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v16, v31, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_perm_b32 v31, v15, v63, s7
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v63
+; GFX9-NEXT: v_perm_b32 v50, v7, v45, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v33
+; GFX9-NEXT: v_perm_b32 v46, v52, v42, s7
+; GFX9-NEXT: v_perm_b32 v35, v29, v27, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v42
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v60
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v40
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(15)
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
+; GFX9-NEXT: v_perm_b32 v54, v11, v2, s7
+; GFX9-NEXT: v_perm_b32 v39, v10, v34, s7
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v51, v8, v3, s7
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v61
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v44
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[37:38]
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[58:59]
-; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v43
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[56:57]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51]
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[54:55]
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[40:41]
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[62:63]
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v62
-; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v41
+; GFX9-NEXT: s_waitcnt vmcnt(6)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[56:57]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[38:39]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[50:51]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[42:43]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[35:36]
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[46:47]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[54:55]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[36:37]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[42:43]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[50:51]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[34:35]
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v55
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v42
+; GFX9-NEXT: s_waitcnt vmcnt(12)
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v41
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v40
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v55
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v54
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v39
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v39
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v38
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v51
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v51
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v50
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v43
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v49
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v32, v37
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v55
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v31, v36
+; GFX9-NEXT: s_waitcnt vmcnt(23)
+; GFX9-NEXT: v_lshrrev_b64 v[60:61], 24, v[52:53]
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v40
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v49
+; GFX9-NEXT: v_mov_b32_e32 v49, v33
+; GFX9-NEXT: v_mov_b32_e32 v37, v44
+; GFX9-NEXT: v_mov_b32_e32 v36, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v48
+; GFX9-NEXT: v_mov_b32_e32 v41, v63
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[60:61]
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v49
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35
-; GFX9-NEXT: v_mov_b32_e32 v35, v52
-; GFX9-NEXT: v_mov_b32_e32 v36, v53
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[52:53]
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v56
-; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v53, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v63
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v55
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v42
-; GFX9-NEXT: s_waitcnt vmcnt(9)
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v36
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v39
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v35, v50
-; GFX9-NEXT: v_mov_b32_e32 v36, v51
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v63
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v35
-; GFX9-NEXT: v_mov_b32_e32 v36, v16
-; GFX9-NEXT: v_mov_b32_e32 v35, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
-; GFX9-NEXT: v_mov_b32_e32 v16, v46
-; GFX9-NEXT: v_mov_b32_e32 v46, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v31
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
+; GFX9-NEXT: v_mov_b32_e32 v31, v52
+; GFX9-NEXT: v_mov_b32_e32 v32, v53
+; GFX9-NEXT: v_mov_b32_e32 v52, v34
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v53, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v31
+; GFX9-NEXT: v_mov_b32_e32 v31, v60
+; GFX9-NEXT: v_mov_b32_e32 v32, v61
+; GFX9-NEXT: v_mov_b32_e32 v61, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v31
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v33, v13
; GFX9-NEXT: .LBB90_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v1, v1, v55, s4
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v56, v34, s4
+; GFX9-NEXT: v_perm_b32 v32, v1, v55, s4
+; GFX9-NEXT: v_perm_b32 v34, v2, v39, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v6, v6, v52, s4
; GFX9-NEXT: v_perm_b32 v3, v3, v54, s4
-; GFX9-NEXT: v_perm_b32 v0, v5, v0, s4
-; GFX9-NEXT: v_perm_b32 v5, v6, v49, s4
-; GFX9-NEXT: v_perm_b32 v8, v8, v31, s4
-; GFX9-NEXT: v_perm_b32 v10, v10, v47, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v32, s4
-; GFX9-NEXT: v_perm_b32 v9, v9, v16, s4
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4
-; GFX9-NEXT: v_perm_b32 v2, v2, v40, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
-; GFX9-NEXT: v_perm_b32 v17, v17, v42, s4
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v55, v55, v35, s4
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v54, v54, v35, s4
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshl_or_b32 v0, v54, 16, v0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v49, v49, v15, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v4, v4, v37, s4
+; GFX9-NEXT: v_perm_b32 v33, v57, v33, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v36, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v63, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v42, s4
+; GFX9-NEXT: v_perm_b32 v0, v20, v0, s4
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v35, v51, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v37, v49, v54, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v38, v38, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v7, v7, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v8, v8, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v39, v50, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v9, v9, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v10, v10, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v2, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v35, s4
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v11, v11, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v12, v12, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v47, v47, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v56, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v43, v43, v50, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v1
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v57, v35, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v50, v1, v50, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v56, v35, v50, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v35, v36, s4
-; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v52, v41, v54, s4
+; GFX9-NEXT: v_perm_b32 v51, v1, v51, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v15, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v31, 16, v32
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v3
-; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v34
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
-; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v5
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v5
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v7
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v7
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v8
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v0, v31, 16, v9
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v0, v32, 16, v11
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v9
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v0, v49, 16, v13
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v11
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v14
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v0, v47, 16, v15
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v13
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v0, v56, 16, v17
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v18
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v0, v19, v38, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v37, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v20, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v15
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:56
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v41, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v21, v62, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:60
+; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v17
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:64
+; GFX9-NEXT: v_perm_b32 v1, v45, v60, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:68
+; GFX9-NEXT: v_perm_b32 v1, v19, v47, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v1
+; GFX9-NEXT: buffer_store_dword v1, v62, s[0:3], 0 offen offset:72
+; GFX9-NEXT: v_perm_b32 v1, v40, v46, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v22, v44, s4
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v21, v44, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v39, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v23, v52, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:80
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v22, v53, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v23, v0, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:88
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v24, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_perm_b32 v0, v25, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v26, v34, s4
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:96
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v0, v26, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v27, v46, s4
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v0, v28, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:104
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v28, v61, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:112
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v30, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_perm_b32 v0, v60, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v58, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:120
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v0, v61, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v59, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:124
+; GFX9-NEXT: buffer_store_dword v0, v62, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
@@ -155084,70 +156217,66 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v64bf16_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:96
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:92
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
@@ -155180,34 +156309,34 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
@@ -155235,17 +156364,22 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v19
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[7:8]
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v38.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[1:2]
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v16
@@ -155274,19 +156408,19 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v32
@@ -155304,31 +156438,28 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v27
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v22
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v22
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v20
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v17
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v50.l
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[17:18]
@@ -155373,8 +156504,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v17
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v18
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v33, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v33, v37, v35, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v19
@@ -155418,9 +156549,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v34
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v17
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v34, v35, v36 :: v_dual_add_f32 v35, 0x40c00000, v37
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -155451,18 +156582,17 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v33, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v21
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v21, v35, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v34, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v34
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v34, v35, v36 :: v_dual_and_b32 v37, 0xffff0000, v23
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v35, 0x40c00000, v37
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v33
@@ -155490,15 +156620,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v23
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v83.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v21
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v35, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v34, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v34
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v37, 0xffff0000, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v34, v35, v36 :: v_dual_add_f32 v35, 0x40c00000, v37
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
@@ -155524,10 +156654,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v85.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v33, v36, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v23
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v33
; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v28, 16, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
@@ -155567,7 +156696,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 24, v28
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v33
; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v30, 16, 1
@@ -155694,8 +156823,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v33, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v35, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v34, 0x7fff
@@ -155730,12 +156859,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v35
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v101.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v4
; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v35, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v37, v34, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v33, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
@@ -155776,7 +156905,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v35, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v34, 0x7fff
@@ -155813,7 +156942,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v8
; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v35, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v3
; GFX11-TRUE16-NEXT: v_add3_u32 v35, v37, v7, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v37, v34, 16, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
@@ -155866,7 +156995,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
; GFX11-TRUE16-NEXT: v_or_b32_e32 v38, 0x400000, v12
; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v34, v34, v35, 0x7fff
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v34, v34, v36, vcc_lo
@@ -155984,52 +157113,53 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 8, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 8, v19
; GFX11-TRUE16-NEXT: .LBB90_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v112, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v61, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v102, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v114, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v103, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v116, v65, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v41, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v113, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v112, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v102, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v114, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v103, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v116, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v66, 16, v3
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v113, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v117, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v117, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v115, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v35, 16, v4
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v39, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v50, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v115, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v50, 16, v4
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v167, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v119, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v119, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v165, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v118, v163, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v118, v163, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v161, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v130, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v130, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v51, v128, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v55, 16, v7
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v128, v149, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v64, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v66, 16, v8
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v9
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v10
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v11
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v51, 16, v12
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v9
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v52, 16, v10
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v51, 16, v11
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v12
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v13, v147, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v131, v48, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v14, v146, 0xc0c0004
@@ -156038,35 +157168,35 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v133, v36, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v16, v135, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v132, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v77, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v80, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v76, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v70, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v74, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v70, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v39, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v13, v82, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v71, v72, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v71, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v46, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v84, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v81, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v81, v44, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v43, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v86, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v24, v46, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v83, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v25, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v24, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v83, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v25, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v96, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v26, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v26, v35, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v22, v85, v182, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v27, v180, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v98, v37, 0xc0c0004
@@ -156098,89 +157228,85 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:96
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v64bf16_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x16 ; 92-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:100
+; GFX11-FAKE16-NEXT: s_clause 0x15 ; 88-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:96
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:92
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:88
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:88
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:84
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:16
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102
@@ -156188,23 +157314,23 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
@@ -156224,42 +157350,42 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
@@ -156281,14 +157407,21 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB90_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v20
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v51, v54
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v16
@@ -156308,34 +157441,31 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v1
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v32
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v30
@@ -156343,38 +157473,35 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v29
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v25
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v23
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v22
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v21
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
@@ -156415,10 +157542,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v18
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v72, v36, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v40, v36, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1
@@ -156427,37 +157554,39 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v36 :: v_dual_add_f32 v39, 0x40c00000, v19
; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v33, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v67
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v40, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v67
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v39, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v38, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v67
; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v38, v34, v39, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39
; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 16, v40
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v20, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v37, v48, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_perm_b32 v71, v20, v19, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v20
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v35, v37, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v36, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v71
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v38, v49, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v21
; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
@@ -156466,13 +157595,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v35
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v37, v48 :: v_dual_add_f32 v22, 0x40c00000, v22
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v71
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v22, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v22
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -156486,9 +157614,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 16, v22
; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v37, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
@@ -156504,13 +157632,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v24, 0x7fff
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v48 :: v_dual_add_f32 v51, 0x40c00000, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v37
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v39, v50, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v48, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v51, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v49, v52, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v26
; GFX11-FAKE16-NEXT: v_add3_u32 v39, v53, v48, 0x7fff
@@ -156540,8 +157668,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v50, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v53, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v37
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v54, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v28
; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v50, 0x7fff
@@ -156811,12 +157939,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v116
; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v58, v10, v131, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v42, v10, v131, 0x7060302
; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v116, 0x7fff
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v119, v129 :: v_dual_lshlrev_b32 v119, 16, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v57, v9, v132, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v41, v9, v132, 0x7060302
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_perm_b32 v182, v12, v145, 0x7060302
; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v119
@@ -156905,7 +158033,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[163:164]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[181:182]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[57:58]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[41:42]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v119
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
@@ -156951,7 +158079,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[98:99]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[82:83]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v70
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[70:71]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[66:67]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v164
@@ -156963,75 +158091,76 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v182
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v182
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v58
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v58
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v57
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v42
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v42
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v115
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v115
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v114
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v113
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v103
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v103
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v102
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v100
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v100
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v98
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v96
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v87
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v82
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v81
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v80
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v67
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v72
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v71
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v71, v77
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v67, v76
; GFX11-FAKE16-NEXT: .LBB90_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v150, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v148, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v146, v52, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v150, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v148, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v103, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v144, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v144, v56, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v114, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v37, v133, v37, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v55, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v64, 16, v2
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v112, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v48, v135, v48, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v134, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v134, v45, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v132, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v41, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v37, v130, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v181, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v39, v128, v178, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v55, 16, v6
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -157047,23 +158176,23 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v117, v33, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v161, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v116, v160, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v78, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v67, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v75, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v40, v65, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v77, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v56, v71, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v76, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v47, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v45, v74, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v74, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v46, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v44, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v43, v63, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v80, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v43, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v71, v68, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v42, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v67, v62, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
@@ -157072,11 +158201,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v82, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v16, v183, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v180, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v180, v61, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v84, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v177, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v176, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v176, v57, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v86, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v24, v165, v50, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15
@@ -157084,7 +158213,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v162, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v162, v47, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v96, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v23, v151, v49, 0xc0c0004
@@ -157107,30 +158236,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x16 ; 92-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:88
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:92
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:96
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:100
+; GFX11-FAKE16-NEXT: s_clause 0x15 ; 88-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:88
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:92
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:96
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -157155,9 +158283,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
@@ -157208,36 +158336,35 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s99, 33
; SI-NEXT: v_writelane_b32 v63, s30, 34
; SI-NEXT: v_writelane_b32 v63, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s58, v14
-; SI-NEXT: v_readfirstlane_b32 s56, v15
-; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s88, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s59
-; SI-NEXT: v_readfirstlane_b32 s46, v16
-; SI-NEXT: s_lshl_b32 s56, s56, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_readfirstlane_b32 s92, v5
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: v_readfirstlane_b32 s90, v6
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: v_readfirstlane_b32 s30, v2
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s93
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s92
; SI-NEXT: v_readfirstlane_b32 s42, v18
; SI-NEXT: v_readfirstlane_b32 s44, v17
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v16
+; SI-NEXT: v_readfirstlane_b32 s56, v15
+; SI-NEXT: v_readfirstlane_b32 s58, v14
; SI-NEXT: v_readfirstlane_b32 s60, v13
; SI-NEXT: v_readfirstlane_b32 s62, v12
; SI-NEXT: v_readfirstlane_b32 s72, v11
; SI-NEXT: v_readfirstlane_b32 s74, v10
; SI-NEXT: v_readfirstlane_b32 s76, v9
; SI-NEXT: v_readfirstlane_b32 s78, v8
-; SI-NEXT: v_readfirstlane_b32 s90, v6
-; SI-NEXT: v_readfirstlane_b32 s92, v5
+; SI-NEXT: v_readfirstlane_b32 s88, v7
+; SI-NEXT: s_lshl_b32 s90, s90, 16
; SI-NEXT: v_readfirstlane_b32 s94, v4
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3
-; SI-NEXT: v_readfirstlane_b32 s30, v2
; SI-NEXT: v_readfirstlane_b32 s34, v1
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s91
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
@@ -157270,6 +158397,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s42, s42, 16
; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
; SI-NEXT: s_lshl_b32 s60, s60, 16
@@ -157285,10 +158417,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s78, s78, 16
; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
-; SI-NEXT: s_lshl_b32 s92, s92, 16
; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
; SI-NEXT: s_lshl_b32 s94, s94, 16
; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
@@ -157298,236 +158426,261 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v19
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s90
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s23
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s21
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s30
; SI-NEXT: v_mul_f32_e64 v49, 1.0, vcc_hi
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s93
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s79
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s77
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s75
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s47
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v37, 1.0, s45
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s44
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s94
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s57
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s42
; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr61 : SGPR spill to VGPR lane
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB91_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: v_readfirstlane_b32 s4, v26
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
+; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_mov_b32_e32 v26, v37
; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: v_readfirstlane_b32 s4, v26
; SI-NEXT: s_lshr_b32 s87, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v21
+; SI-NEXT: v_readfirstlane_b32 s4, v60
+; SI-NEXT: v_readfirstlane_b32 s86, v25
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v25
+; SI-NEXT: v_readfirstlane_b32 s4, v23
+; SI-NEXT: v_mov_b32_e32 v25, v55
; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: v_readfirstlane_b32 s4, v25
; SI-NEXT: s_lshr_b32 s51, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v27
-; SI-NEXT: v_mov_b32_e32 v27, v55
-; SI-NEXT: v_mov_b32_e32 v55, v36
-; SI-NEXT: v_mov_b32_e32 v36, v47
-; SI-NEXT: v_mov_b32_e32 v47, v57
-; SI-NEXT: v_mov_b32_e32 v57, v11
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s74, v35
-; SI-NEXT: v_readfirstlane_b32 s88, v30
-; SI-NEXT: v_mov_b32_e32 v30, v28
-; SI-NEXT: v_mov_b32_e32 v35, v42
-; SI-NEXT: v_mov_b32_e32 v42, v40
-; SI-NEXT: v_mov_b32_e32 v28, v22
-; SI-NEXT: v_mov_b32_e32 v22, v4
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s4, v47
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v32
-; SI-NEXT: v_mov_b32_e32 v32, v2
-; SI-NEXT: v_mov_b32_e32 v2, v12
-; SI-NEXT: v_mov_b32_e32 v12, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s50, v18
-; SI-NEXT: v_mov_b32_e32 v18, v54
+; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: v_mov_b32_e32 v55, v30
; SI-NEXT: s_lshr_b64 s[70:71], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v55
+; SI-NEXT: v_mov_b32_e32 v37, v22
+; SI-NEXT: v_mov_b32_e32 v22, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: v_mov_b32_e32 v39, v52
+; SI-NEXT: v_mov_b32_e32 v52, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s67, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v38
+; SI-NEXT: v_readfirstlane_b32 s4, v12
+; SI-NEXT: v_mov_b32_e32 v12, v31
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s42, v3
+; SI-NEXT: v_mov_b32_e32 v3, v36
+; SI-NEXT: v_mov_b32_e32 v36, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v50
+; SI-NEXT: v_readfirstlane_b32 s4, v14
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v15
+; SI-NEXT: v_readfirstlane_b32 s4, v37
; SI-NEXT: s_lshr_b32 s75, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v59
+; SI-NEXT: v_readfirstlane_b32 s4, v7
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: s_lshr_b64 s[48:49], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v20
+; SI-NEXT: v_readfirstlane_b32 s4, v28
; SI-NEXT: s_lshr_b32 s43, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_readfirstlane_b32 s4, v48
+; SI-NEXT: v_mov_b32_e32 v29, v34
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v51
+; SI-NEXT: v_readfirstlane_b32 s4, v29
; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v60
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v51, v53
+; SI-NEXT: v_readfirstlane_b32 s4, v22
+; SI-NEXT: v_mov_b32_e32 v30, v9
+; SI-NEXT: v_readfirstlane_b32 s74, v10
; SI-NEXT: s_lshr_b32 s89, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v51
+; SI-NEXT: v_readfirstlane_b32 s4, v30
+; SI-NEXT: v_mov_b32_e32 v10, v51
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v27
+; SI-NEXT: v_readfirstlane_b32 s4, v10
; SI-NEXT: s_lshr_b64 s[76:77], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v23
+; SI-NEXT: v_readfirstlane_b32 s4, v33
+; SI-NEXT: v_mov_b32_e32 v51, v1
; SI-NEXT: s_lshr_b32 s37, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v55
-; SI-NEXT: v_mov_b32_e32 v53, v41
+; SI-NEXT: v_readfirstlane_b32 s4, v51
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v53
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v39
-; SI-NEXT: v_mov_b32_e32 v41, v49
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s15, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v41
+; SI-NEXT: v_readfirstlane_b32 s4, v49
+; SI-NEXT: v_mov_b32_e32 v1, v54
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v2
+; SI-NEXT: v_readfirstlane_b32 s4, v1
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v24
+; SI-NEXT: v_readfirstlane_b32 s4, v52
; SI-NEXT: s_lshr_b32 s73, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v43
+; SI-NEXT: v_readfirstlane_b32 s14, v36
+; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v6
+; SI-NEXT: s_lshr_b64 s[96:97], s[86:87], 16
+; SI-NEXT: s_mov_b32 s99, s96
+; SI-NEXT: v_readfirstlane_b32 s50, v56
+; SI-NEXT: s_lshr_b64 s[82:83], s[50:51], 16
+; SI-NEXT: s_mov_b32 s85, s82
+; SI-NEXT: v_readfirstlane_b32 s66, v15
+; SI-NEXT: s_lshr_b64 s[68:69], s[66:67], 16
+; SI-NEXT: s_mov_b32 s71, s68
+; SI-NEXT: s_lshr_b64 s[54:55], s[74:75], 16
+; SI-NEXT: s_mov_b32 s65, s54
+; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16
+; SI-NEXT: s_mov_b32 s49, vcc_lo
+; SI-NEXT: v_readfirstlane_b32 s88, v3
+; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
+; SI-NEXT: s_mov_b32 s95, s80
+; SI-NEXT: v_readfirstlane_b32 s36, v13
+; SI-NEXT: s_lshr_b64 s[38:39], s[36:37], 16
+; SI-NEXT: s_mov_b32 s77, s38
+; SI-NEXT: s_mov_b32 s31, s92
+; SI-NEXT: v_readfirstlane_b32 s72, v12
+; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
+; SI-NEXT: s_mov_b32 s79, s60
+; SI-NEXT: v_readfirstlane_b32 s44, v44
+; SI-NEXT: v_readfirstlane_b32 s28, v41
+; SI-NEXT: v_readfirstlane_b32 s22, v50
+; SI-NEXT: v_readfirstlane_b32 s18, v35
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_readfirstlane_b32 s4, v17
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v46
+; SI-NEXT: v_readfirstlane_b32 s12, v20
+; SI-NEXT: v_mov_b32_e32 v19, v16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_readfirstlane_b32 s4, v31
; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v52
+; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v24
+; SI-NEXT: v_mov_b32_e32 v23, v58
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s4, v5
; SI-NEXT: s_lshr_b32 s59, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v56
+; SI-NEXT: v_readfirstlane_b32 s4, v46
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v58
+; SI-NEXT: v_readfirstlane_b32 s4, v45
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v42
+; SI-NEXT: v_readfirstlane_b32 s4, v24
; SI-NEXT: s_lshr_b32 s45, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
+; SI-NEXT: v_readfirstlane_b32 s4, v43
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v1
+; SI-NEXT: v_readfirstlane_b32 s4, v42
; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v44
+; SI-NEXT: v_readfirstlane_b32 s4, v27
; SI-NEXT: s_lshr_b32 s29, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v5
+; SI-NEXT: v_readfirstlane_b32 s4, v40
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v28
+; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v57
+; SI-NEXT: v_readfirstlane_b32 s4, v32
; SI-NEXT: s_lshr_b32 s23, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
+; SI-NEXT: v_readfirstlane_b32 s4, v38
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
-; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_readfirstlane_b32 s4, v11
+; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s4, v59
; SI-NEXT: s_lshr_b32 s19, s4, 16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s4, v4
+; SI-NEXT: v_readfirstlane_b32 s4, v21
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_mov_b32_e32 v29, v13
-; SI-NEXT: v_readfirstlane_b32 s14, v29
-; SI-NEXT: v_readfirstlane_b32 s86, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s4, v33
+; SI-NEXT: v_readfirstlane_b32 s4, v2
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: v_readfirstlane_b32 s4, v57
; SI-NEXT: s_lshr_b32 s13, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v37
+; SI-NEXT: v_readfirstlane_b32 s4, v18
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v48
+; SI-NEXT: v_readfirstlane_b32 s4, v16
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s5, v7
-; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
+; SI-NEXT: v_readfirstlane_b32 s5, v58
; SI-NEXT: s_lshr_b32 s7, s5, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v34
-; SI-NEXT: s_lshr_b64 s[96:97], s[86:87], 16
; SI-NEXT: s_mov_b32 s5, s7
; SI-NEXT: s_lshr_b64 s[8:9], s[6:7], 16
; SI-NEXT: s_mov_b32 s6, s92
-; SI-NEXT: s_mov_b32 s99, s96
; SI-NEXT: v_writelane_b32 v61, s4, 34
; SI-NEXT: v_writelane_b32 v62, s6, 48
; SI-NEXT: v_writelane_b32 v61, s5, 35
@@ -157540,22 +158693,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s9, 5
; SI-NEXT: s_lshr_b64 s[8:9], s[98:99], 16
; SI-NEXT: v_writelane_b32 v62, s8, 2
-; SI-NEXT: s_lshr_b64 s[82:83], s[50:51], 16
; SI-NEXT: v_writelane_b32 v62, s9, 3
; SI-NEXT: s_lshr_b64 s[8:9], s[98:99], 8
-; SI-NEXT: s_mov_b32 s85, s82
; SI-NEXT: v_writelane_b32 v62, s8, 0
; SI-NEXT: v_writelane_b32 v62, s9, 1
; SI-NEXT: s_lshr_b64 s[8:9], s[84:85], 24
; SI-NEXT: v_writelane_b32 v62, s8, 10
; SI-NEXT: v_writelane_b32 v62, s9, 11
; SI-NEXT: s_lshr_b64 s[8:9], s[84:85], 16
-; SI-NEXT: v_readfirstlane_b32 s66, v26
; SI-NEXT: v_writelane_b32 v62, s8, 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[66:67], 16
; SI-NEXT: v_writelane_b32 v62, s9, 9
; SI-NEXT: s_lshr_b64 s[8:9], s[84:85], 8
-; SI-NEXT: s_mov_b32 s71, s68
; SI-NEXT: v_writelane_b32 v62, s8, 6
; SI-NEXT: v_writelane_b32 v62, s9, 7
; SI-NEXT: s_lshr_b64 s[8:9], s[70:71], 24
@@ -157563,22 +158711,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s9, 17
; SI-NEXT: s_lshr_b64 s[8:9], s[70:71], 16
; SI-NEXT: v_writelane_b32 v62, s8, 14
-; SI-NEXT: s_lshr_b64 s[54:55], s[74:75], 16
; SI-NEXT: v_writelane_b32 v62, s9, 15
; SI-NEXT: s_lshr_b64 s[8:9], s[70:71], 8
-; SI-NEXT: s_mov_b32 s65, s54
; SI-NEXT: v_writelane_b32 v62, s8, 12
; SI-NEXT: v_writelane_b32 v62, s9, 13
; SI-NEXT: s_lshr_b64 s[8:9], s[64:65], 24
; SI-NEXT: v_writelane_b32 v62, s8, 22
; SI-NEXT: v_writelane_b32 v62, s9, 23
; SI-NEXT: s_lshr_b64 s[8:9], s[64:65], 16
-; SI-NEXT: v_readfirstlane_b32 s42, v45
; SI-NEXT: v_writelane_b32 v62, s8, 20
-; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16
; SI-NEXT: v_writelane_b32 v62, s9, 21
; SI-NEXT: s_lshr_b64 s[8:9], s[64:65], 8
-; SI-NEXT: s_mov_b32 s49, vcc_lo
; SI-NEXT: v_writelane_b32 v62, s8, 18
; SI-NEXT: v_writelane_b32 v62, s9, 19
; SI-NEXT: s_lshr_b64 s[8:9], s[48:49], 24
@@ -157586,22 +158729,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s9, 29
; SI-NEXT: s_lshr_b64 s[8:9], s[48:49], 16
; SI-NEXT: v_writelane_b32 v62, s8, 26
-; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
; SI-NEXT: v_writelane_b32 v62, s9, 27
; SI-NEXT: s_lshr_b64 s[8:9], s[48:49], 8
-; SI-NEXT: s_mov_b32 s95, s80
; SI-NEXT: v_writelane_b32 v62, s8, 24
; SI-NEXT: v_writelane_b32 v62, s9, 25
; SI-NEXT: s_lshr_b64 s[8:9], s[94:95], 24
; SI-NEXT: v_writelane_b32 v62, s8, 34
; SI-NEXT: v_writelane_b32 v62, s9, 35
; SI-NEXT: s_lshr_b64 s[8:9], s[94:95], 16
-; SI-NEXT: v_readfirstlane_b32 s36, v32
; SI-NEXT: v_writelane_b32 v62, s8, 32
-; SI-NEXT: s_lshr_b64 s[38:39], s[36:37], 16
; SI-NEXT: v_writelane_b32 v62, s9, 33
; SI-NEXT: s_lshr_b64 s[8:9], s[94:95], 8
-; SI-NEXT: s_mov_b32 s77, s38
; SI-NEXT: v_writelane_b32 v62, s8, 30
; SI-NEXT: v_writelane_b32 v62, s9, 31
; SI-NEXT: s_lshr_b64 s[8:9], s[76:77], 24
@@ -157611,26 +158749,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s8, 38
; SI-NEXT: v_writelane_b32 v62, s9, 39
; SI-NEXT: s_lshr_b64 s[8:9], s[76:77], 8
-; SI-NEXT: s_mov_b32 s31, s92
; SI-NEXT: v_writelane_b32 v62, s8, 36
; SI-NEXT: v_writelane_b32 v62, s9, 37
; SI-NEXT: s_lshr_b64 s[8:9], s[30:31], 24
; SI-NEXT: v_writelane_b32 v62, s8, 46
; SI-NEXT: v_writelane_b32 v62, s9, 47
; SI-NEXT: s_lshr_b64 s[8:9], s[30:31], 16
-; SI-NEXT: v_readfirstlane_b32 s72, v30
; SI-NEXT: v_writelane_b32 v62, s8, 44
-; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
; SI-NEXT: v_writelane_b32 v62, s9, 45
; SI-NEXT: s_lshr_b64 s[8:9], s[30:31], 8
-; SI-NEXT: s_mov_b32 s79, s60
; SI-NEXT: v_writelane_b32 v62, s8, 42
; SI-NEXT: v_writelane_b32 v62, s9, 43
; SI-NEXT: s_lshr_b64 s[8:9], s[78:79], 24
; SI-NEXT: v_writelane_b32 v62, s8, 54
; SI-NEXT: v_writelane_b32 v62, s9, 55
; SI-NEXT: s_lshr_b64 s[8:9], s[78:79], 16
-; SI-NEXT: v_readfirstlane_b32 s58, v35
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s58, v34
; SI-NEXT: v_writelane_b32 v62, s8, 52
; SI-NEXT: s_lshr_b64 s[56:57], s[58:59], 16
; SI-NEXT: v_writelane_b32 v62, s9, 53
@@ -157642,7 +158777,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v62, s8, 60
; SI-NEXT: v_writelane_b32 v62, s9, 61
; SI-NEXT: s_lshr_b64 s[8:9], s[62:63], 16
-; SI-NEXT: v_readfirstlane_b32 s44, v36
; SI-NEXT: v_writelane_b32 v62, s8, 58
; SI-NEXT: s_lshr_b64 s[52:53], s[44:45], 16
; SI-NEXT: v_writelane_b32 v62, s9, 59
@@ -157654,7 +158788,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 2
; SI-NEXT: v_writelane_b32 v61, s9, 3
; SI-NEXT: s_lshr_b64 s[8:9], s[46:47], 16
-; SI-NEXT: v_readfirstlane_b32 s28, v47
; SI-NEXT: v_writelane_b32 v61, s8, 0
; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16
; SI-NEXT: v_writelane_b32 v61, s9, 1
@@ -157666,7 +158799,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 8
; SI-NEXT: v_writelane_b32 v61, s9, 9
; SI-NEXT: s_lshr_b64 s[8:9], s[40:41], 16
-; SI-NEXT: v_readfirstlane_b32 s22, v22
; SI-NEXT: v_writelane_b32 v61, s8, 6
; SI-NEXT: s_lshr_b64 s[20:21], s[22:23], 16
; SI-NEXT: v_writelane_b32 v61, s9, 7
@@ -157678,7 +158810,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 14
; SI-NEXT: v_writelane_b32 v61, s9, 15
; SI-NEXT: s_lshr_b64 s[8:9], s[24:25], 16
-; SI-NEXT: v_readfirstlane_b32 s18, v9
; SI-NEXT: v_writelane_b32 v61, s8, 12
; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16
; SI-NEXT: v_writelane_b32 v61, s9, 13
@@ -157690,7 +158821,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s8, 20
; SI-NEXT: v_writelane_b32 v61, s9, 21
; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 16
-; SI-NEXT: v_readfirstlane_b32 s12, v40
; SI-NEXT: v_writelane_b32 v61, s8, 18
; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16
; SI-NEXT: v_writelane_b32 v61, s9, 19
@@ -157712,20 +158842,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s9, 33
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: v_writelane_b32 v61, s8, 30
-; SI-NEXT: v_mov_b32_e32 v1, v8
-; SI-NEXT: v_mov_b32_e32 v8, v5
; SI-NEXT: v_writelane_b32 v61, s9, 31
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 8
-; SI-NEXT: v_lshrrev_b32_e32 v5, 24, v6
-; SI-NEXT: v_mov_b32_e32 v3, v20
+; SI-NEXT: v_mov_b32_e32 v16, v6
; SI-NEXT: v_writelane_b32 v61, s8, 28
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v5, 24, v57
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v7
-; SI-NEXT: v_mov_b32_e32 v20, v17
+; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v5
+; SI-NEXT: v_mov_b32_e32 v6, v24
+; SI-NEXT: v_mov_b32_e32 v24, v57
+; SI-NEXT: v_mov_b32_e32 v14, v21
+; SI-NEXT: v_mov_b32_e32 v15, v2
+; SI-NEXT: v_mov_b32_e32 v2, v20
+; SI-NEXT: v_mov_b32_e32 v7, v18
; SI-NEXT: s_lshr_b32 s88, s96, 8
; SI-NEXT: s_lshr_b32 s61, s82, 8
; SI-NEXT: s_lshr_b32 s72, s68, 8
@@ -157748,191 +158876,184 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b32 s12, s90, 8
; SI-NEXT: v_writelane_b32 v61, s9, 29
; SI-NEXT: s_mov_b64 s[8:9], 0
-; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v18
-; SI-NEXT: v_mov_b32_e32 v16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v15
-; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v14, 24, v60
-; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v23
-; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v39
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v24
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v52
-; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v42
-; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v44
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v19
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v48, v32
-; SI-NEXT: v_mov_b32_e32 v32, v5
-; SI-NEXT: v_mov_b32_e32 v34, v51
-; SI-NEXT: v_mov_b32_e32 v37, v27
-; SI-NEXT: v_mov_b32_e32 v27, v1
-; SI-NEXT: v_mov_b32_e32 v51, v55
-; SI-NEXT: v_mov_b32_e32 v55, v41
-; SI-NEXT: v_mov_b32_e32 v41, v2
-; SI-NEXT: v_mov_b32_e32 v31, v12
-; SI-NEXT: v_mov_b32_e32 v1, v22
-; SI-NEXT: v_mov_b32_e32 v12, v28
-; SI-NEXT: v_mov_b32_e32 v5, v54
-; SI-NEXT: v_mov_b32_e32 v22, v40
-; SI-NEXT: v_mov_b32_e32 v28, v4
-; SI-NEXT: v_mov_b32_e32 v40, v42
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v6, v57
-; SI-NEXT: v_mov_b32_e32 v4, v11
+; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v26
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v55
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v37
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v28
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v22
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v33
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v39
+; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v52
+; SI-NEXT: v_mov_b32_e32 v18, v27
+; SI-NEXT: v_lshrrev_b32_e32 v4, 24, v27
+; SI-NEXT: v_mov_b32_e32 v20, v32
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v32
+; SI-NEXT: v_mov_b32_e32 v21, v59
+; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v59
+; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v24
+; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v23
+; SI-NEXT: v_mov_b32_e32 v27, v3
+; SI-NEXT: v_mov_b32_e32 v32, v13
+; SI-NEXT: v_mov_b32_e32 v59, v30
+; SI-NEXT: v_mov_b32_e32 v24, v10
+; SI-NEXT: v_mov_b32_e32 v38, v12
+; SI-NEXT: v_mov_b32_e32 v12, v35
+; SI-NEXT: v_mov_b32_e32 v35, v49
+; SI-NEXT: v_mov_b32_e32 v13, v28
+; SI-NEXT: v_mov_b32_e32 v28, v33
+; SI-NEXT: v_mov_b32_e32 v33, v39
+; SI-NEXT: v_mov_b32_e32 v39, v52
+; SI-NEXT: v_mov_b32_e32 v49, v5
; SI-NEXT: s_branch .LBB91_3
; SI-NEXT: .LBB91_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v34, v53
+; SI-NEXT: v_mov_b32_e32 v19, v16
; SI-NEXT: v_writelane_b32 v62, s4, 0
; SI-NEXT: v_writelane_b32 v62, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_mov_b32_e32 v53, v41
+; SI-NEXT: v_mov_b32_e32 v16, v6
; SI-NEXT: v_writelane_b32 v62, s4, 2
; SI-NEXT: v_writelane_b32 v62, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v30, v28
+; SI-NEXT: v_mov_b32_e32 v15, v2
; SI-NEXT: v_writelane_b32 v62, s4, 4
; SI-NEXT: v_writelane_b32 v62, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v41, v12
+; SI-NEXT: v_mov_b32_e32 v14, v21
; SI-NEXT: v_writelane_b32 v62, s4, 6
; SI-NEXT: v_writelane_b32 v62, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v31, v33
+; SI-NEXT: v_mov_b32_e32 v2, v20
; SI-NEXT: v_writelane_b32 v62, s4, 8
; SI-NEXT: v_writelane_b32 v62, s5, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v12, v22
+; SI-NEXT: v_mov_b32_e32 v21, v59
; SI-NEXT: v_writelane_b32 v62, s4, 10
; SI-NEXT: v_writelane_b32 v62, s5, 11
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v20, v32
; SI-NEXT: v_writelane_b32 v62, s4, 12
; SI-NEXT: v_writelane_b32 v62, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: v_mov_b32_e32 v1, v4
+; SI-NEXT: v_mov_b32_e32 v6, v24
; SI-NEXT: v_writelane_b32 v62, s4, 14
; SI-NEXT: v_writelane_b32 v62, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v29, v34
; SI-NEXT: v_writelane_b32 v62, s4, 16
+; SI-NEXT: v_mov_b32_e32 v32, v13
+; SI-NEXT: v_mov_b32_e32 v59, v9
+; SI-NEXT: v_mov_b32_e32 v24, v51
+; SI-NEXT: v_mov_b32_e32 v51, v1
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v38, v31
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v35, v49
+; SI-NEXT: v_mov_b32_e32 v1, v54
+; SI-NEXT: v_mov_b32_e32 v13, v28
+; SI-NEXT: v_mov_b32_e32 v28, v39
+; SI-NEXT: v_mov_b32_e32 v39, v17
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: v_writelane_b32 v62, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: v_mov_b32_e32 v20, v17
+; SI-NEXT: v_mov_b32_e32 v7, v18
; SI-NEXT: v_writelane_b32 v62, s4, 18
; SI-NEXT: v_writelane_b32 v62, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v16, v15
+; SI-NEXT: v_mov_b32_e32 v18, v27
; SI-NEXT: v_writelane_b32 v62, s4, 20
; SI-NEXT: v_writelane_b32 v62, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v8, v5
+; SI-NEXT: s_mov_b64 s[8:9], -1
; SI-NEXT: v_writelane_b32 v62, s4, 22
; SI-NEXT: v_writelane_b32 v62, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b64 s[8:9], -1
+; SI-NEXT: v_mov_b32_e32 v27, v36
; SI-NEXT: v_writelane_b32 v62, s4, 24
; SI-NEXT: v_writelane_b32 v62, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v48, v2
+; SI-NEXT: v_mov_b32_e32 v36, v5
; SI-NEXT: v_writelane_b32 v62, s4, 26
; SI-NEXT: v_writelane_b32 v62, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v37, v55
+; SI-NEXT: v_mov_b32_e32 v26, v37
; SI-NEXT: v_writelane_b32 v62, s4, 28
; SI-NEXT: v_writelane_b32 v62, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v29, v13
+; SI-NEXT: v_mov_b32_e32 v25, v55
; SI-NEXT: v_writelane_b32 v62, s4, 30
; SI-NEXT: v_writelane_b32 v62, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v51, v36
+; SI-NEXT: v_mov_b32_e32 v55, v30
; SI-NEXT: v_writelane_b32 v62, s4, 32
; SI-NEXT: v_writelane_b32 v62, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v55, v49
+; SI-NEXT: v_mov_b32_e32 v37, v22
; SI-NEXT: v_writelane_b32 v62, s4, 34
; SI-NEXT: v_writelane_b32 v62, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v35, v42
+; SI-NEXT: v_mov_b32_e32 v22, v33
; SI-NEXT: v_writelane_b32 v62, s4, 36
; SI-NEXT: v_writelane_b32 v62, s5, 37
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v36, v47
+; SI-NEXT: v_mov_b32_e32 v33, v52
; SI-NEXT: v_writelane_b32 v62, s4, 38
; SI-NEXT: v_writelane_b32 v62, s5, 39
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v47, v57
-; SI-NEXT: v_writelane_b32 v62, s4, 40
-; SI-NEXT: v_writelane_b32 v62, s5, 41
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v5, v54
-; SI-NEXT: v_writelane_b32 v62, s4, 42
-; SI-NEXT: v_writelane_b32 v62, s5, 43
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v6, v11
-; SI-NEXT: v_writelane_b32 v62, s4, 44
-; SI-NEXT: v_writelane_b32 v62, s5, 45
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr87
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $sgpr28
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $sgpr21
-; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $sgpr22
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr30
@@ -157957,7 +159078,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr13
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr8
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: v_writelane_b32 v62, s4, 40
+; SI-NEXT: v_writelane_b32 v62, s5, 41
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v62, s4, 42
+; SI-NEXT: v_writelane_b32 v62, s5, 43
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v62, s4, 44
+; SI-NEXT: v_writelane_b32 v62, s5, 45
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v62, s4, 46
; SI-NEXT: v_writelane_b32 v62, s5, 47
; SI-NEXT: ; implicit-def: $sgpr4
@@ -158037,79 +159169,58 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s14, 32
; SI-NEXT: v_writelane_b32 v61, s15, 33
; SI-NEXT: v_writelane_b32 v61, s4, 34
-; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: v_writelane_b32 v61, s5, 35
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: .LBB91_3: ; %Flow
-; SI-NEXT: v_mov_b32_e32 v13, v16
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec
; SI-NEXT: s_cselect_b32 s5, 1, 0
-; SI-NEXT: v_mov_b32_e32 v2, v19
; SI-NEXT: s_cmp_lg_u32 s5, 1
-; SI-NEXT: v_mov_b32_e32 v54, v38
-; SI-NEXT: v_mov_b32_e32 v38, v50
-; SI-NEXT: v_mov_b32_e32 v50, v45
-; SI-NEXT: v_mov_b32_e32 v45, v3
-; SI-NEXT: v_mov_b32_e32 v3, v10
-; SI-NEXT: v_mov_b32_e32 v10, v14
; SI-NEXT: s_cbranch_scc1 .LBB91_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v15
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_readfirstlane_b32 s4, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v3
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
+; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v11
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s5, v19
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_readfirstlane_b32 s5, v7
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; SI-NEXT: s_lshr_b32 s7, s5, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
; SI-NEXT: s_lshr_b64 s[90:91], s[6:7], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v33
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v22
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10
+; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v57
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v11
-; SI-NEXT: v_readfirstlane_b32 s12, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20
+; SI-NEXT: v_readfirstlane_b32 s6, v2
; SI-NEXT: s_lshr_b32 s13, s6, 16
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_readfirstlane_b32 s8, v15
; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_readfirstlane_b32 s18, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v43
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_readfirstlane_b32 s12, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v51
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v59
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v48
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: s_mov_b32 s5, s7
; SI-NEXT: v_writelane_b32 v61, s4, 34
; SI-NEXT: v_writelane_b32 v61, s5, 35
@@ -158117,131 +159228,177 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_mov_b32 s11, s20
; SI-NEXT: s_mov_b32 s5, s90
; SI-NEXT: s_lshr_b32 s12, s20, 8
-; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v9
-; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v4
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v11
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v9
+; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v7
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_readfirstlane_b32 s8, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v35
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_readfirstlane_b32 s6, v10
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s6, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v21
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_readfirstlane_b32 s6, v10
; SI-NEXT: s_lshr_b32 s19, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s18, v11
+; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16
+; SI-NEXT: s_mov_b32 s17, s34
+; SI-NEXT: s_lshr_b32 s91, s34, 8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s8, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
-; SI-NEXT: v_readfirstlane_b32 s22, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v6
; SI-NEXT: s_lshr_b64 s[24:25], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v31
-; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s22, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v3
; SI-NEXT: s_lshr_b32 s23, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v44
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v56
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: s_lshr_b32 s29, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v40
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: s_lshr_b64 s[26:27], s[22:23], 16
; SI-NEXT: s_mov_b32 s25, s26
-; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16
-; SI-NEXT: s_mov_b32 s17, s34
; SI-NEXT: s_lshr_b32 s18, s26, 8
-; SI-NEXT: s_lshr_b32 s91, s34, 8
-; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v7
-; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v3
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v47
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s28, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s6, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v36
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s44, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v46
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s28, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s6, v4
+; SI-NEXT: s_lshr_b32 s29, s6, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
+; SI-NEXT: s_mov_b32 s41, s56
+; SI-NEXT: v_lshrrev_b32_e32 v4, 24, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_readfirstlane_b32 s6, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
-; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v6
; SI-NEXT: s_lshr_b32 s45, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_readfirstlane_b32 s58, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v41
+; SI-NEXT: v_readfirstlane_b32 s6, v11
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30
+; SI-NEXT: v_readfirstlane_b32 s44, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v31
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_readfirstlane_b32 s8, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v49
+; SI-NEXT: v_readfirstlane_b32 s58, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s8, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v38
; SI-NEXT: s_lshr_b32 s59, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_readfirstlane_b32 s72, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
+; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v39
+; SI-NEXT: v_readfirstlane_b32 s72, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v53
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v51
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v29
-; SI-NEXT: v_readfirstlane_b32 s6, v12
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v11
+; SI-NEXT: v_readfirstlane_b32 s8, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v36
; SI-NEXT: s_lshr_b32 s73, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v39
-; SI-NEXT: v_readfirstlane_b32 s14, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v37
+; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v33
+; SI-NEXT: v_readfirstlane_b32 s14, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v24
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v15
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v48
+; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: v_readfirstlane_b32 s8, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32
; SI-NEXT: s_lshr_b32 s15, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s36, v10
+; SI-NEXT: v_readfirstlane_b32 s6, v15
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v28
+; SI-NEXT: v_readfirstlane_b32 s36, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v29
; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s6, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: v_readfirstlane_b32 s8, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v27
; SI-NEXT: s_lshr_b32 s37, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15
+; SI-NEXT: v_readfirstlane_b32 s88, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v22
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v15
+; SI-NEXT: s_lshr_b32 s89, s6, 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v26
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
+; SI-NEXT: s_mov_b32 s95, s80
; SI-NEXT: s_lshr_b64 s[38:39], s[36:37], 16
; SI-NEXT: s_mov_b32 s77, s38
; SI-NEXT: s_lshr_b64 s[96:97], s[14:15], 16
@@ -158249,22 +159406,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b64 s[92:93], s[72:73], 16
; SI-NEXT: s_mov_b32 s79, s92
; SI-NEXT: s_lshr_b64 s[60:61], s[58:59], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s8, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_readfirstlane_b32 s6, v14
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b32 s63, s60
; SI-NEXT: s_lshr_b64 s[52:53], s[44:45], 16
; SI-NEXT: s_mov_b32 s47, s52
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_mov_b32 s41, s56
+; SI-NEXT: s_lshr_b32 s93, s80, 8
; SI-NEXT: s_lshr_b32 s44, s38, 8
; SI-NEXT: s_lshr_b32 s27, s96, 8
; SI-NEXT: s_lshr_b32 s28, s92, 8
@@ -158272,142 +159417,128 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b32 s22, s52, 8
; SI-NEXT: s_mov_b32 s36, s20
; SI-NEXT: s_mov_b32 s14, s90
-; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v15
-; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s88, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v60
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: s_lshr_b32 s89, s6, 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[88:89], 16
-; SI-NEXT: s_mov_b32 s95, s80
-; SI-NEXT: s_lshr_b32 s93, s80, 8
-; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v1
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v15
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v11
+; SI-NEXT: v_lshrrev_b32_e32 v12, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v18
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_readfirstlane_b32 s8, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_readfirstlane_b32 s6, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[48:49], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v14
-; SI-NEXT: v_readfirstlane_b32 s42, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: v_readfirstlane_b32 s6, v16
; SI-NEXT: s_lshr_b32 s43, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s8, v18
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v37
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16
; SI-NEXT: s_mov_b32 s49, vcc_lo
; SI-NEXT: s_lshr_b32 s58, vcc_lo, 8
; SI-NEXT: s_mov_b32 s42, s26
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s74, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_readfirstlane_b32 s6, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 16
; SI-NEXT: v_readfirstlane_b32 s6, v13
; SI-NEXT: s_lshr_b32 s75, s6, 16
+; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_readfirstlane_b32 s74, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[54:55], s[74:75], 16
; SI-NEXT: s_mov_b32 s65, s54
; SI-NEXT: s_lshr_b32 s57, s54, 8
; SI-NEXT: s_mov_b32 s74, s60
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v5
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v18, 24, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s66, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_readfirstlane_b32 s6, v17
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[8:9], 16
; SI-NEXT: v_readfirstlane_b32 s6, v9
; SI-NEXT: s_lshr_b32 s67, s6, 16
+; SI-NEXT: s_lshr_b64 s[70:71], s[8:9], 16
+; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v6
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_readfirstlane_b32 s66, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[68:69], s[66:67], 16
; SI-NEXT: s_mov_b32 s71, s68
; SI-NEXT: s_lshr_b32 s72, s68, 8
; SI-NEXT: s_mov_b32 s66, s56
; SI-NEXT: s_lshr_b32 s56, s56, 8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s50, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_readfirstlane_b32 s6, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 16
; SI-NEXT: v_readfirstlane_b32 s6, v5
; SI-NEXT: s_lshr_b32 s51, s6, 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_readfirstlane_b32 s50, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b64 s[82:83], s[50:51], 16
; SI-NEXT: s_mov_b32 s85, s82
; SI-NEXT: s_lshr_b32 s61, s82, 8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s8, v18
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_readfirstlane_b32 s6, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v1
; SI-NEXT: s_lshr_b32 s87, s6, 16
; SI-NEXT: s_lshr_b64 s[98:99], s[8:9], 16
-; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s86, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_readfirstlane_b32 s86, v17
; SI-NEXT: s_lshr_b64 s[8:9], s[86:87], 16
; SI-NEXT: s_mov_b32 s99, s8
; SI-NEXT: s_lshr_b64 s[6:7], s[98:99], 24
@@ -158576,7 +159707,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s96, 0xff
; SI-NEXT: s_lshl_b32 s8, s88, 8
@@ -158584,8 +159714,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s8, s87, 0xff
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v18
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v56
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 6
@@ -158613,7 +159743,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v47
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 12
@@ -158641,7 +159771,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 18
@@ -158670,7 +159800,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v45
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 24
@@ -158699,7 +159829,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 30
@@ -158728,7 +159858,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v10
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v43
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 36
@@ -158757,7 +159887,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 42
@@ -158788,7 +159918,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s9, v62, 49
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v41
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 50
@@ -158816,7 +159946,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 56
@@ -158845,7 +159975,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v50
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v12
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 62
@@ -158873,7 +160003,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v38
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v9
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 4
@@ -158902,7 +160032,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v54
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 10
@@ -158931,7 +160061,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v32
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v54
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 16
@@ -158959,7 +160089,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v27
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v8
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 22
@@ -158987,7 +160117,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v11
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 28
; SI-NEXT: s_and_b32 s5, s5, 0xffff
@@ -159005,20 +160135,36 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s8, s5
; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: v_readlane_b32 s6, v61, 34
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s5, s6, 8
-; SI-NEXT: v_readlane_b32 s6, v61, 34
; SI-NEXT: s_and_b32 s4, s14, 0xff
; SI-NEXT: v_readlane_b32 s7, v61, 35
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s7, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v60
; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: v_or_b32_e32 v1, s5, v1
+; SI-NEXT: v_or_b32_e32 v1, s4, v1
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: v_readlane_b32 s99, v62, 5
; SI-NEXT: v_readlane_b32 s85, v62, 11
; SI-NEXT: v_readlane_b32 s30, v63, 34
@@ -159063,28 +160209,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1
-; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -159093,8 +160221,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -159165,102 +160293,70 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB91_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 2
-; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 3
-; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 4
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 0
-; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 1
-; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 7
-; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 8
-; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 9
-; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 5
-; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 6
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 12
+; VI-NEXT: v_writelane_b32 v62, s46, 18
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 13
+; VI-NEXT: v_writelane_b32 v62, s46, 19
; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 14
+; VI-NEXT: v_writelane_b32 v62, s46, 20
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 10
+; VI-NEXT: v_writelane_b32 v62, s46, 16
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 11
-; VI-NEXT: s_lshr_b32 s46, s25, 24
; VI-NEXT: v_writelane_b32 v62, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 23
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 18
+; VI-NEXT: v_writelane_b32 v62, s46, 24
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 19
+; VI-NEXT: v_writelane_b32 v62, s46, 25
; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 15
+; VI-NEXT: v_writelane_b32 v62, s46, 21
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: v_writelane_b32 v62, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 28
; VI-NEXT: s_lshr_b32 s46, s23, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 23
+; VI-NEXT: v_writelane_b32 v62, s46, 29
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 30
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 20
+; VI-NEXT: v_writelane_b32 v62, s46, 26
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 21
-; VI-NEXT: s_lshr_b32 s46, s21, 24
; VI-NEXT: v_writelane_b32 v62, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 33
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 28
+; VI-NEXT: v_writelane_b32 v62, s46, 34
; VI-NEXT: s_lshr_b32 s46, s21, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 29
+; VI-NEXT: v_writelane_b32 v62, s46, 35
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 25
+; VI-NEXT: v_writelane_b32 v62, s46, 31
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 26
-; VI-NEXT: s_lshr_b32 s46, s19, 24
; VI-NEXT: v_writelane_b32 v62, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s19, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 38
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 33
+; VI-NEXT: v_writelane_b32 v62, s46, 39
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 34
+; VI-NEXT: v_writelane_b32 v62, s46, 40
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 30
+; VI-NEXT: v_writelane_b32 v62, s46, 36
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 31
-; VI-NEXT: s_lshr_b32 s46, s17, 24
; VI-NEXT: v_writelane_b32 v62, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s17, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 43
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 38
+; VI-NEXT: v_writelane_b32 v62, s46, 44
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 39
+; VI-NEXT: v_writelane_b32 v62, s46, 45
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 35
-; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 36
-; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 40
-; VI-NEXT: s_lshr_b32 s46, s15, 16
; VI-NEXT: v_writelane_b32 v62, s46, 41
-; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: s_lshr_b32 s46, s16, 8
; VI-NEXT: v_writelane_b32 v62, s46, 42
-; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 45
-; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 46
; VI-NEXT: s_lshr_b32 s46, s41, 8
; VI-NEXT: v_writelane_b32 v62, s46, 47
-; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 43
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 44
+; VI-NEXT: v_writelane_b32 v62, s46, 46
; VI-NEXT: s_lshr_b32 s46, s43, 24
; VI-NEXT: v_writelane_b32 v62, s46, 50
; VI-NEXT: s_lshr_b32 s46, s43, 16
@@ -159280,37 +160376,71 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshr_b32 s46, s44, 16
; VI-NEXT: v_writelane_b32 v62, s46, 53
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: s_lshr_b32 s69, s7, 24
-; VI-NEXT: s_lshr_b32 s68, s7, 16
-; VI-NEXT: s_lshr_b32 s67, s7, 8
-; VI-NEXT: s_lshr_b32 s71, s6, 16
-; VI-NEXT: s_lshr_b32 s70, s6, 8
-; VI-NEXT: s_lshr_b32 s64, s9, 24
-; VI-NEXT: s_lshr_b32 s55, s9, 16
-; VI-NEXT: s_lshr_b32 s54, s9, 8
-; VI-NEXT: s_lshr_b32 s66, s8, 16
-; VI-NEXT: s_lshr_b32 s65, s8, 8
-; VI-NEXT: s_lshr_b32 s53, s11, 24
-; VI-NEXT: s_lshr_b32 s52, s11, 16
-; VI-NEXT: s_lshr_b32 s51, s11, 8
-; VI-NEXT: s_lshr_b32 s87, s10, 16
-; VI-NEXT: s_lshr_b32 s86, s10, 8
-; VI-NEXT: s_lshr_b32 s50, s13, 24
-; VI-NEXT: s_lshr_b32 s83, s13, 16
-; VI-NEXT: s_lshr_b32 s82, s13, 8
-; VI-NEXT: s_lshr_b32 s85, s12, 16
-; VI-NEXT: s_lshr_b32 s84, s12, 8
-; VI-NEXT: s_lshr_b32 s81, s14, 16
-; VI-NEXT: s_lshr_b32 s80, s14, 8
; VI-NEXT: v_writelane_b32 v62, s46, 54
-; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[58:59], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[76:77], s[16:17], 24
+; VI-NEXT: s_lshr_b64 s[88:89], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v62, s88, 14
+; VI-NEXT: v_writelane_b32 v62, s89, 15
+; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
+; VI-NEXT: s_lshr_b32 s57, s15, 16
+; VI-NEXT: s_lshr_b32 s78, s41, 24
+; VI-NEXT: v_writelane_b32 v62, s88, 12
+; VI-NEXT: v_writelane_b32 v62, s89, 13
+; VI-NEXT: s_mov_b32 s46, s57
+; VI-NEXT: s_mov_b32 s57, s78
+; VI-NEXT: s_lshr_b64 s[78:79], s[26:27], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 10
+; VI-NEXT: v_writelane_b32 v62, s79, 11
+; VI-NEXT: s_lshr_b64 s[78:79], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 8
+; VI-NEXT: v_writelane_b32 v62, s79, 9
+; VI-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 6
+; VI-NEXT: v_writelane_b32 v62, s79, 7
+; VI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 4
+; VI-NEXT: v_writelane_b32 v62, s79, 5
+; VI-NEXT: s_lshr_b64 s[78:79], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 2
+; VI-NEXT: v_writelane_b32 v62, s79, 3
+; VI-NEXT: s_lshr_b64 s[78:79], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v62, s78, 0
+; VI-NEXT: s_lshr_b32 s64, s5, 24
+; VI-NEXT: s_lshr_b32 s59, s5, 16
+; VI-NEXT: s_lshr_b32 s55, s5, 8
+; VI-NEXT: s_lshr_b32 s58, s4, 16
+; VI-NEXT: s_lshr_b32 s56, s4, 8
+; VI-NEXT: s_lshr_b32 s50, s29, 24
+; VI-NEXT: s_lshr_b32 s47, s29, 16
+; VI-NEXT: s_lshr_b32 s86, s29, 8
+; VI-NEXT: s_lshr_b32 s87, s28, 16
+; VI-NEXT: s_lshr_b32 s85, s28, 8
+; VI-NEXT: s_lshr_b32 s82, s7, 24
+; VI-NEXT: s_lshr_b32 s81, s7, 16
+; VI-NEXT: s_lshr_b32 s77, s7, 8
+; VI-NEXT: s_lshr_b32 s80, s6, 16
+; VI-NEXT: s_lshr_b32 s76, s6, 8
+; VI-NEXT: s_lshr_b32 s71, s9, 24
+; VI-NEXT: s_lshr_b32 s75, s9, 16
+; VI-NEXT: s_lshr_b32 s70, s9, 8
+; VI-NEXT: s_lshr_b32 s74, s8, 16
+; VI-NEXT: s_lshr_b32 s69, s8, 8
+; VI-NEXT: s_lshr_b32 s73, s11, 24
+; VI-NEXT: s_lshr_b32 s72, s11, 16
+; VI-NEXT: s_lshr_b32 s67, s11, 8
+; VI-NEXT: s_lshr_b32 s68, s10, 16
+; VI-NEXT: s_lshr_b32 s63, s10, 8
+; VI-NEXT: s_lshr_b32 s62, s13, 24
+; VI-NEXT: s_lshr_b32 s61, s13, 16
+; VI-NEXT: s_lshr_b32 s66, s13, 8
+; VI-NEXT: s_lshr_b32 s60, s12, 16
+; VI-NEXT: s_lshr_b32 s65, s12, 8
+; VI-NEXT: s_lshr_b32 s54, s15, 24
+; VI-NEXT: s_lshr_b32 s52, s15, 8
+; VI-NEXT: s_lshr_b32 s53, s14, 16
+; VI-NEXT: s_lshr_b32 s51, s14, 8
+; VI-NEXT: s_lshr_b32 s84, s41, 16
+; VI-NEXT: s_lshr_b32 s83, s40, 16
+; VI-NEXT: v_writelane_b32 v62, s79, 1
; VI-NEXT: s_lshr_b64 s[78:79], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[90:91], s[10:11], 24
@@ -159324,38 +160454,54 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: .LBB91_2:
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: v_writelane_b32 v62, s78, 0
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 1
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr86
; VI-NEXT: ; implicit-def: $sgpr87
+; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr58
+; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr59
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr83
+; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr71
-; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr61
+; VI-NEXT: ; implicit-def: $sgpr62
+; VI-NEXT: ; implicit-def: $sgpr63
; VI-NEXT: ; implicit-def: $sgpr68
+; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr72
+; VI-NEXT: ; implicit-def: $sgpr73
; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr76
; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr70
+; VI-NEXT: ; implicit-def: $sgpr75
+; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: ; implicit-def: $sgpr76
+; VI-NEXT: ; implicit-def: $sgpr80
+; VI-NEXT: ; implicit-def: $sgpr77
+; VI-NEXT: ; implicit-def: $sgpr81
+; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr34
@@ -159363,85 +160509,69 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr90
; VI-NEXT: ; implicit-def: $sgpr88
-; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 2
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 4
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 5
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 6
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 7
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 8
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 9
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 10
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 11
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 12
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 13
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 14
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 15
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -159479,591 +160609,587 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: .LBB91_3: ; %Flow
; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
+; VI-NEXT: s_cselect_b32 s79, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s79, 1
; VI-NEXT: s_cbranch_scc1 .LBB91_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_lshl_b32 s46, s45, 16
-; VI-NEXT: v_mov_b32_e32 v2, 0x40c00000
-; VI-NEXT: v_add_f32_e32 v1, s46, v2
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s45, s45, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s45, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v43, 0x40c00000
+; VI-NEXT: v_add_f32_e32 v1, s46, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s45, s44, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s45, v2
-; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s45, s45, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s45, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s44, s44, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s44, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: s_lshl_b32 s45, s44, 16
+; VI-NEXT: v_add_f32_e32 v1, s45, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s44, s43, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s44, v2
-; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s44, s44, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s44, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
+; VI-NEXT: s_lshl_b32 s44, s43, 16
; VI-NEXT: s_and_b32 s43, s43, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s43, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v2, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v1, s44, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: s_lshl_b32 s43, s42, 16
-; VI-NEXT: v_add_f32_e32 v1, s43, v2
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s43, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s42, s42, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s42, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: s_lshl_b32 s43, s42, 16
+; VI-NEXT: v_add_f32_e32 v1, s43, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s42, s41, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s42, v2
-; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s42, s42, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s42, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
+; VI-NEXT: s_lshl_b32 s42, s41, 16
; VI-NEXT: s_and_b32 s41, s41, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s41, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v2, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v1, s42, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s41, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
+; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s41, s40, 16
-; VI-NEXT: v_add_f32_e32 v1, s41, v2
+; VI-NEXT: v_add_f32_e32 v1, s41, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: s_and_b32 s40, s40, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v18, v56
-; VI-NEXT: v_mov_b32_e32 v9, v6
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s40, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s40, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
; VI-NEXT: s_lshl_b32 s40, s15, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s40, v2
-; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
; VI-NEXT: s_and_b32 s15, s15, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s15, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v2, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v1, s40, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s15, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
+; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s15, s14, 16
-; VI-NEXT: v_add_f32_e32 v1, s15, v2
+; VI-NEXT: v_add_f32_e32 v1, s15, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: s_and_b32 s14, s14, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v25, v6
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s14, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s14, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: s_lshl_b32 s14, s13, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s14, v2
-; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s13, s13, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s13, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s14, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s13, s12, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s13, v2
-; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s13, s13, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s13, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s13, s12, 16
; VI-NEXT: s_and_b32 s12, s12, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s12, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v27, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v1, s13, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s12, s11, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s12, v2
-; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s12, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s11, s11, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s11, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s12, s11, 16
+; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s12, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s11, s10, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s11, v2
-; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s11, s11, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s11, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s11, s10, 16
; VI-NEXT: s_and_b32 s10, s10, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s10, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v57, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f32_e32 v1, s11, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s10, s9, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s10, v2
-; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s10, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s9, s9, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s9, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s10, s9, 16
+; VI-NEXT: v_lshrrev_b64 v[58:59], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s10, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s9, s8, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s9, v2
-; VI-NEXT: v_mov_b32_e32 v27, v6
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s9, s9, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s9, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s9, s8, 16
; VI-NEXT: s_and_b32 s8, s8, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s8, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s8, s7, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s8, v2
-; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s7, s7, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s7, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_mov_b32_e32 v59, v5
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s9, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s7, s6, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s7, v2
-; VI-NEXT: v_lshrrev_b64 v[59:60], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s8, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s6, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s8, s7, 16
+; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s8, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s17, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s7, s7, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s7, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s17, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s7, s6, 16
+; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s7, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s16, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s6, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s16, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s17, 16
+; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s19, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s17, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s19, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s16, 16
+; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s18, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s16, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s18, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s19, 16
+; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s21, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s19, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s21, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s18, 16
+; VI-NEXT: v_lshrrev_b64 v[47:48], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s20, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s18, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s20, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s21, 16
+; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s23, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s21, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s23, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s20, 16
+; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s22, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s20, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s22, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s23, 16
+; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s25, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s23, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s25, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s22, 16
+; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s24, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s22, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s24, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s25, 16
+; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s27, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s25, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s27, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s24, 16
+; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s26, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s24, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s26, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s27, 16
+; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s29, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s27, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s29, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s26, 16
+; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s28, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s26, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s29, 16
+; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s6, s5, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s29, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s5, s5, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v1, s5, v2
-; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
-; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
-; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s28, 16
+; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s5, s4, 16
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_add_f32_e32 v1, s5, v2
-; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[3:4]
-; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
-; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
+; VI-NEXT: s_and_b32 s6, s28, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s6, v43
+; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
+; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s4, s4, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_lshl_b32 s6, s5, 16
+; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s6, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: v_add_f32_e32 v2, s4, v2
-; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
+; VI-NEXT: s_and_b32 s5, s5, 0xffff0000
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_add_f32_e32 v2, s5, v43
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -160071,475 +161197,448 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v58, v46
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58]
-; VI-NEXT: v_mov_b32_e32 v61, v59
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: s_lshl_b32 s5, s4, 16
+; VI-NEXT: v_lshrrev_b64 v[44:45], 16, v[1:2]
+; VI-NEXT: v_add_f32_e32 v1, s5, v43
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: s_and_b32 s4, s4, 0xffff0000
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; VI-NEXT: v_add_f32_e32 v1, s4, v43
+; VI-NEXT: v_cndmask_b32_e32 v42, v2, v3, vcc
+; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
+; VI-NEXT: v_mov_b32_e32 v39, v37
+; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
+; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[38:39]
+; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; VI-NEXT: v_mov_b32_e32 v30, v28
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; VI-NEXT: v_mov_b32_e32 v25, v5
+; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[42:43]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[29:30]
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v5, v44
+; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[4:5]
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v61, v46
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[60:61]
-; VI-NEXT: v_mov_b32_e32 v11, v6
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[10:11]
-; VI-NEXT: v_mov_b32_e32 v23, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[22:23]
-; VI-NEXT: v_mov_b32_e32 v16, v14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[24:25]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[58:59]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[56:57]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[26:27]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[24:25]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[8:9]
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v46
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v46
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v46
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v57
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v57
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v54
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v54
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v40
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v37
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v37
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v34
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v31
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v31
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v28
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v35
+; VI-NEXT: v_mov_b32_e32 v50, v48
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[49:50]
+; VI-NEXT: v_mov_b32_e32 v33, v47
+; VI-NEXT: v_mov_b32_e32 v36, v34
; VI-NEXT: v_mov_b32_e32 v53, v51
+; VI-NEXT: v_mov_b32_e32 v41, v54
+; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[40:41]
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[52:53]
+; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[35:36]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[32:33]
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v48
+; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v49
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v34
+; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v32
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v29
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[16:17]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[30:31]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v28
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v59
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[52:53]
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v46
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v59
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v59
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v59
-; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v46
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v60
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, v60
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v60
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_mov_b32_e32 v2, v58
-; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v2
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v2
+; VI-NEXT: v_mov_b32_e32 v2, v45
+; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v24
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v10
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v10
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v10
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v21
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v21
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v44
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v44
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v40
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v51
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v51
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v51
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v52
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v52
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v48
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v48
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v37
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v37
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v34
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v34
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v49
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v31, v47
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v47
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; VI-NEXT: v_mov_b32_e32 v45, v30
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v7
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v58
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v22
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v22
+; VI-NEXT: v_mov_b32_e32 v2, v58
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v58
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v14
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v14
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v14
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v14
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v58, v16
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v56
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, v15
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v15
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v2, v56
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v56
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v41, v54
-; VI-NEXT: v_mov_b32_e32 v39, v37
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[40:41]
-; VI-NEXT: v_mov_b32_e32 v30, v28
-; VI-NEXT: v_mov_b32_e32 v33, v31
-; VI-NEXT: v_mov_b32_e32 v36, v34
-; VI-NEXT: v_mov_b32_e32 v50, v48
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[38:39]
-; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[49:50]
-; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[35:36]
-; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[32:33]
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[29:30]
-; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v52
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v49
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v37
-; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v38
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v38
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v35
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v35
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v31
-; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v32
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v29
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v24
-; VI-NEXT: v_mov_b32_e32 v60, v8
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v56
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v56
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v56
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v17
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_mov_b32_e32 v2, v14
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v10, 24, v2
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v57, v7
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, v26
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v26
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v10, v33
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v24
-; VI-NEXT: s_waitcnt vmcnt(10)
-; VI-NEXT: v_mov_b32_e32 v59, v58
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v49
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_mov_b32_e32 v2, v14
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: v_mov_b32_e32 v46, v24
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; VI-NEXT: v_mov_b32_e32 v41, v2
-; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v2
-; VI-NEXT: v_mov_b32_e32 v2, v58
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v2
+; VI-NEXT: v_mov_b32_e32 v2, v16
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v2
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v14, v24
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2
-; VI-NEXT: s_waitcnt vmcnt(9)
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v2
-; VI-NEXT: v_mov_b32_e32 v2, v56
-; VI-NEXT: v_mov_b32_e32 v58, v17
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v17
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v30
+; VI-NEXT: v_mov_b32_e32 v2, v24
+; VI-NEXT: v_mov_b32_e32 v42, v24
+; VI-NEXT: v_mov_b32_e32 v24, v56
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v24
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v24
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7
; VI-NEXT: s_branch .LBB91_6
; VI-NEXT: .LBB91_5:
-; VI-NEXT: v_readlane_b32 s47, v62, 0
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 2
+; VI-NEXT: v_mov_b32_e32 v6, s6
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s7
+; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 3
+; VI-NEXT: v_mov_b32_e32 v1, s56
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s64
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 4
+; VI-NEXT: v_mov_b32_e32 v1, s59
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 5
+; VI-NEXT: v_mov_b32_e32 v1, s55
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 8
+; VI-NEXT: v_mov_b32_e32 v1, s87
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s85
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s50
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 9
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 11
-; VI-NEXT: v_mov_b32_e32 v10, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 15
-; VI-NEXT: v_mov_b32_e32 v8, s47
+; VI-NEXT: v_mov_b32_e32 v1, s86
; VI-NEXT: v_readlane_b32 s47, v62, 16
-; VI-NEXT: v_mov_b32_e32 v7, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 17
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 20
-; VI-NEXT: v_mov_b32_e32 v5, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 21
-; VI-NEXT: v_mov_b32_e32 v13, s47
+; VI-NEXT: v_mov_b32_e32 v8, s47
; VI-NEXT: v_readlane_b32 s47, v62, 22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v10, s47
; VI-NEXT: v_readlane_b32 s47, v62, 23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 24
-; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 25
-; VI-NEXT: v_mov_b32_e32 v18, s47
+; VI-NEXT: v_mov_b32_e32 v50, s47
; VI-NEXT: v_readlane_b32 s47, v62, 26
-; VI-NEXT: v_mov_b32_e32 v20, s47
+; VI-NEXT: v_mov_b32_e32 v17, s47
; VI-NEXT: v_readlane_b32 s47, v62, 27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v5, s47
; VI-NEXT: v_readlane_b32 s47, v62, 28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 29
-; VI-NEXT: v_mov_b32_e32 v9, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 30
-; VI-NEXT: v_mov_b32_e32 v25, s47
+; VI-NEXT: v_mov_b32_e32 v53, s47
; VI-NEXT: v_readlane_b32 s47, v62, 31
-; VI-NEXT: v_mov_b32_e32 v30, s47
+; VI-NEXT: v_mov_b32_e32 v12, s47
; VI-NEXT: v_readlane_b32 s47, v62, 32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v3, s47
; VI-NEXT: v_readlane_b32 s47, v62, 33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 34
-; VI-NEXT: v_mov_b32_e32 v27, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 35
-; VI-NEXT: v_mov_b32_e32 v23, s47
+; VI-NEXT: v_mov_b32_e32 v43, s47
; VI-NEXT: v_readlane_b32 s47, v62, 36
-; VI-NEXT: v_mov_b32_e32 v53, s47
+; VI-NEXT: v_mov_b32_e32 v61, s47
; VI-NEXT: v_readlane_b32 s47, v62, 37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s71
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s70
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s69
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s68
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s67
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s66
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s64
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s87
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s86
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s52
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s51
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s85
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s84
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s83
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s82
+; VI-NEXT: v_mov_b32_e32 v2, s47
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s8
; VI-NEXT: v_readlane_b32 s47, v62, 39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s81
-; VI-NEXT: v_mov_b32_e32 v50, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s80
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s47
; VI-NEXT: v_readlane_b32 s47, v62, 40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v47, s47
; VI-NEXT: v_readlane_b32 s47, v62, 41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v41, s47
; VI-NEXT: v_readlane_b32 s47, v62, 42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v27, s47
; VI-NEXT: v_readlane_b32 s47, v62, 43
-; VI-NEXT: v_mov_b32_e32 v26, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 44
-; VI-NEXT: v_mov_b32_e32 v16, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v2, s45
-; VI-NEXT: v_mov_b32_e32 v1, s46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s78
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s88
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s47
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s76
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s82
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s81
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s77
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s90
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, vcc_lo
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s74
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_readlane_b32 s47, v62, 47
-; VI-NEXT: v_mov_b32_e32 v22, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 48
-; VI-NEXT: v_mov_b32_e32 v33, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 49
-; VI-NEXT: v_mov_b32_e32 v39, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 50
-; VI-NEXT: v_mov_b32_e32 v61, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 51
-; VI-NEXT: v_mov_b32_e32 v15, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 52
-; VI-NEXT: v_mov_b32_e32 v36, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 53
-; VI-NEXT: v_mov_b32_e32 v45, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 54
-; VI-NEXT: v_mov_b32_e32 v56, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 55
-; VI-NEXT: v_mov_b32_e32 v21, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 56
-; VI-NEXT: v_mov_b32_e32 v1, s34
+; VI-NEXT: v_mov_b32_e32 v2, s69
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s71
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s75
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s70
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s63
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s73
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s72
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s67
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s65
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s62
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s61
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s66
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s53
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s51
+; VI-NEXT: v_mov_b32_e32 v4, s4
+; VI-NEXT: v_mov_b32_e32 v44, s5
+; VI-NEXT: v_readlane_b32 s4, v62, 14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s54
+; VI-NEXT: v_readlane_b32 s5, v62, 15
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s52
+; VI-NEXT: v_readlane_b32 s46, v62, 46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v16, s46
+; VI-NEXT: v_mov_b32_e32 v2, s57
+; VI-NEXT: v_readlane_b32 s46, v62, 47
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v26, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 48
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, s46
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s9
+; VI-NEXT: v_readlane_b32 s46, v62, 49
+; VI-NEXT: v_mov_b32_e32 v25, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 50
+; VI-NEXT: v_mov_b32_e32 v59, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 51
+; VI-NEXT: v_mov_b32_e32 v14, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 52
+; VI-NEXT: v_mov_b32_e32 v19, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 53
+; VI-NEXT: v_mov_b32_e32 v30, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 54
+; VI-NEXT: v_mov_b32_e32 v36, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 55
+; VI-NEXT: v_readlane_b32 s47, v62, 44
+; VI-NEXT: v_mov_b32_e32 v21, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 56
; VI-NEXT: v_mov_b32_e32 v55, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 57
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v47, s47
-; VI-NEXT: v_mov_b32_e32 v57, s4
-; VI-NEXT: v_mov_b32_e32 v46, s5
+; VI-NEXT: v_readlane_b32 s47, v62, 45
+; VI-NEXT: v_mov_b32_e32 v39, s46
+; VI-NEXT: v_readlane_b32 s46, v62, 57
+; VI-NEXT: v_mov_b32_e32 v23, s47
+; VI-NEXT: v_mov_b32_e32 v60, s83
+; VI-NEXT: v_mov_b32_e32 v33, s46
; VI-NEXT: v_mov_b32_e32 v40, s28
; VI-NEXT: v_mov_b32_e32 v54, s29
; VI-NEXT: v_mov_b32_e32 v52, s26
@@ -160554,50 +161653,106 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_mov_b32_e32 v31, s19
; VI-NEXT: v_mov_b32_e32 v29, s16
; VI-NEXT: v_mov_b32_e32 v28, s17
-; VI-NEXT: v_mov_b32_e32 v14, s40
-; VI-NEXT: v_mov_b32_e32 v41, s41
-; VI-NEXT: v_mov_b32_e32 v60, s42
-; VI-NEXT: v_mov_b32_e32 v59, s43
-; VI-NEXT: v_mov_b32_e32 v58, s44
-; VI-NEXT: v_mov_b32_e32 v42, s56
-; VI-NEXT: v_mov_b32_e32 v3, s58
-; VI-NEXT: v_mov_b32_e32 v6, s60
-; VI-NEXT: v_mov_b32_e32 v43, s62
-; VI-NEXT: v_mov_b32_e32 v44, s72
-; VI-NEXT: v_mov_b32_e32 v12, s74
-; VI-NEXT: v_mov_b32_e32 v19, s76
-; VI-NEXT: v_mov_b32_e32 v1, s36
-; VI-NEXT: v_mov_b32_e32 v4, s38
+; VI-NEXT: v_mov_b32_e32 v58, s40
+; VI-NEXT: v_mov_b32_e32 v46, s41
+; VI-NEXT: v_mov_b32_e32 v45, s42
+; VI-NEXT: v_mov_b32_e32 v42, s43
+; VI-NEXT: v_mov_b32_e32 v57, s44
+; VI-NEXT: v_mov_b32_e32 v56, s45
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s10
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s11
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s12
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s13
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s14
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s15
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s78
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s88
+; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 12
+; VI-NEXT: v_readlane_b32 s5, v62, 13
+; VI-NEXT: v_mov_b32_e32 v9, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 10
+; VI-NEXT: v_readlane_b32 s5, v62, 11
+; VI-NEXT: v_mov_b32_e32 v11, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 8
+; VI-NEXT: v_readlane_b32 s5, v62, 9
+; VI-NEXT: v_mov_b32_e32 v13, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 6
+; VI-NEXT: v_readlane_b32 s5, v62, 7
+; VI-NEXT: v_mov_b32_e32 v15, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 4
+; VI-NEXT: v_readlane_b32 s5, v62, 5
+; VI-NEXT: v_mov_b32_e32 v18, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 2
+; VI-NEXT: v_readlane_b32 s5, v62, 3
+; VI-NEXT: v_mov_b32_e32 v20, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 0
+; VI-NEXT: v_readlane_b32 s5, v62, 1
+; VI-NEXT: v_mov_b32_e32 v22, s4
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s90
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, vcc_lo
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s30
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s36
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, s38
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; VI-NEXT: .LBB91_6: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v17, v5, v43, s4
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v6, v8, v6, s4
-; VI-NEXT: v_perm_b32 v12, v25, v12, s4
-; VI-NEXT: v_perm_b32 v25, v31, v27, s4
-; VI-NEXT: v_perm_b32 v19, v23, v19, s4
-; VI-NEXT: v_perm_b32 v23, v28, v50, s4
-; VI-NEXT: v_perm_b32 v28, v32, v30, s4
-; VI-NEXT: v_perm_b32 v24, v34, v9, s4
-; VI-NEXT: v_perm_b32 v20, v35, v20, s4
-; VI-NEXT: v_perm_b32 v13, v38, v13, s4
-; VI-NEXT: v_perm_b32 v11, v37, v11, s4
-; VI-NEXT: v_perm_b32 v7, v49, v7, s4
-; VI-NEXT: v_perm_b32 v49, v2, v47, s4
-; VI-NEXT: v_perm_b32 v29, v29, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_e32 v19, v29, v19
-; VI-NEXT: v_perm_b32 v18, v18, v44, s4
-; VI-NEXT: v_perm_b32 v10, v52, v10, s4
-; VI-NEXT: v_perm_b32 v1, v33, v1, s4
-; VI-NEXT: v_perm_b32 v39, v60, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_perm_b32 v4, v45, v4, s4
-; VI-NEXT: v_or_b32_e32 v1, v39, v1
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_perm_b32 v33, v59, v36, s4
-; VI-NEXT: v_perm_b32 v16, v14, v16, s4
+; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: v_perm_b32 v29, v35, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v28, v31, v47, s4
+; VI-NEXT: v_perm_b32 v24, v38, v5, s4
+; VI-NEXT: v_perm_b32 v1, v32, v1, s4
+; VI-NEXT: v_perm_b32 v12, v12, v18, s4
+; VI-NEXT: v_perm_b32 v18, v34, v43, s4
+; VI-NEXT: v_perm_b32 v15, v17, v15, s4
+; VI-NEXT: v_perm_b32 v17, v37, v53, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v22, v41, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; VI-NEXT: v_or_b32_e32 v22, v27, v22
+; VI-NEXT: v_perm_b32 v20, v61, v20, s4
+; VI-NEXT: v_perm_b32 v8, v8, v13, s4
+; VI-NEXT: v_perm_b32 v10, v49, v10, s4
+; VI-NEXT: v_perm_b32 v13, v48, v50, s4
+; VI-NEXT: v_perm_b32 v36, v57, v36, s4
+; VI-NEXT: v_perm_b32 v33, v56, v33, s4
+; VI-NEXT: v_perm_b32 v25, v45, v25, s4
+; VI-NEXT: v_perm_b32 v19, v42, v19, s4
+; VI-NEXT: v_perm_b32 v16, v58, v16, s4
+; VI-NEXT: v_perm_b32 v26, v46, v26, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -160630,140 +161785,145 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v8, v48, v5, s4
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v48, v58, v56, s4
-; VI-NEXT: v_or_b32_e32 v4, v48, v4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v5, v3, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v31, v52, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v30, v30, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v11, v3, v11, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v51, v3, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v2, v2, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v5, v51, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v37, v60, v37, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v40, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v32, v3, v42, s4
+; VI-NEXT: v_perm_b32 v32, v40, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v9, v3, v9, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v34, v54, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v4, v4, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v57, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v37, v3, v37, s4
+; VI-NEXT: v_perm_b32 v6, v3, v6, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v46, v3, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v26, v26, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v35, v44, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v23, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v12
-; VI-NEXT: v_or_b32_e32 v5, v28, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v7, v55, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_or_b32_e32 v7, v23, v7
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v20
+; VI-NEXT: v_or_b32_e32 v1, v1, v7
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v25, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v18
-; VI-NEXT: v_or_b32_e32 v5, v20, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v28, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v12
+; VI-NEXT: v_or_b32_e32 v1, v29, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v24, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v17
-; VI-NEXT: v_or_b32_e32 v5, v13, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v15
+; VI-NEXT: v_or_b32_e32 v1, v24, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v11, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v6
-; VI-NEXT: v_or_b32_e32 v5, v7, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v8
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v8, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v27
-; VI-NEXT: v_or_b32_e32 v5, v10, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v11
+; VI-NEXT: v_or_b32_e32 v1, v31, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v30, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
-; VI-NEXT: v_or_b32_e32 v5, v31, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v9
+; VI-NEXT: v_or_b32_e32 v1, v32, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v34, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
-; VI-NEXT: v_or_b32_e32 v5, v35, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v34, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v6
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_perm_b32 v1, v15, v61, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v35, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v30
+; VI-NEXT: v_or_b32_e32 v1, v36, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v1, v39, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v4, v55, v21, s4
; VI-NEXT: v_or_b32_e32 v1, v33, v1
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v25, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_perm_b32 v1, v14, v59, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v19, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
-; VI-NEXT: v_or_b32_e32 v4, v49, v4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
; VI-NEXT: v_or_b32_e32 v1, v16, v1
-; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:68
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_perm_b32 v5, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v38, v5
-; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v22, v1
+; VI-NEXT: v_or_b32_e32 v1, v26, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
@@ -160787,21 +161947,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
@@ -160812,21 +161972,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
@@ -160837,26 +161997,26 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -160864,24 +162024,24 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -160902,8 +162062,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -160912,8 +162072,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -160989,138 +162149,140 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_cbranch_scc0 .LBB91_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 17
-; GFX9-NEXT: s_lshr_b32 s46, s5, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 1
+; GFX9-NEXT: v_writelane_b32 v62, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 18
-; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 0
+; GFX9-NEXT: v_writelane_b32 v62, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s29, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 20
-; GFX9-NEXT: s_lshr_b32 s46, s29, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 3
+; GFX9-NEXT: v_writelane_b32 v62, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s29, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 21
-; GFX9-NEXT: s_lshr_b32 s46, s28, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 2
+; GFX9-NEXT: v_writelane_b32 v62, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s28, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 19
+; GFX9-NEXT: v_writelane_b32 v62, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s27, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 23
-; GFX9-NEXT: s_lshr_b32 s46, s27, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 5
+; GFX9-NEXT: v_writelane_b32 v62, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s27, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 24
-; GFX9-NEXT: s_lshr_b32 s46, s26, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 4
+; GFX9-NEXT: v_writelane_b32 v62, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s26, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 22
+; GFX9-NEXT: v_writelane_b32 v62, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s25, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 26
-; GFX9-NEXT: s_lshr_b32 s46, s25, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 7
+; GFX9-NEXT: v_writelane_b32 v62, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s25, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 27
-; GFX9-NEXT: s_lshr_b32 s46, s24, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 6
+; GFX9-NEXT: v_writelane_b32 v62, s46, 22
; GFX9-NEXT: s_lshr_b32 s46, s24, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 25
+; GFX9-NEXT: v_writelane_b32 v62, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s23, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 29
-; GFX9-NEXT: s_lshr_b32 s46, s23, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 9
+; GFX9-NEXT: v_writelane_b32 v62, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s23, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 30
+; GFX9-NEXT: v_writelane_b32 v62, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s22, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s22, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 28
+; GFX9-NEXT: v_writelane_b32 v62, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s21, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 32
+; GFX9-NEXT: v_writelane_b32 v62, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s21, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 11
+; GFX9-NEXT: v_writelane_b32 v62, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s21, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 33
+; GFX9-NEXT: v_writelane_b32 v62, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s20, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 10
+; GFX9-NEXT: v_writelane_b32 v62, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s20, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 31
+; GFX9-NEXT: v_writelane_b32 v62, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s19, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 35
+; GFX9-NEXT: v_writelane_b32 v62, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s19, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 13
+; GFX9-NEXT: v_writelane_b32 v62, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s19, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 36
+; GFX9-NEXT: v_writelane_b32 v62, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s18, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 12
+; GFX9-NEXT: v_writelane_b32 v62, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s18, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 34
+; GFX9-NEXT: v_writelane_b32 v62, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s17, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 38
+; GFX9-NEXT: v_writelane_b32 v62, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s17, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 15
+; GFX9-NEXT: v_writelane_b32 v62, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s17, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 39
+; GFX9-NEXT: v_writelane_b32 v62, s46, 34
; GFX9-NEXT: s_lshr_b32 s46, s16, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 14
+; GFX9-NEXT: v_writelane_b32 v62, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s16, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 37
+; GFX9-NEXT: v_writelane_b32 v62, s46, 32
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 36
+; GFX9-NEXT: s_lshr_b32 s46, s14, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 35
; GFX9-NEXT: s_lshr_b32 s46, s13, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 40
+; GFX9-NEXT: v_writelane_b32 v62, s46, 38
; GFX9-NEXT: s_lshr_b32 s46, s13, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 41
+; GFX9-NEXT: v_writelane_b32 v62, s46, 39
+; GFX9-NEXT: s_lshr_b32 s46, s12, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 37
; GFX9-NEXT: s_lshr_b32 s46, s41, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 42
+; GFX9-NEXT: v_writelane_b32 v62, s46, 41
; GFX9-NEXT: s_lshr_b32 s46, s41, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 43
+; GFX9-NEXT: v_writelane_b32 v62, s46, 42
+; GFX9-NEXT: s_lshr_b32 s46, s40, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 40
; GFX9-NEXT: s_lshr_b32 s46, s43, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 45
+; GFX9-NEXT: v_writelane_b32 v62, s46, 44
; GFX9-NEXT: s_lshr_b32 s46, s43, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 46
+; GFX9-NEXT: v_writelane_b32 v62, s46, 45
; GFX9-NEXT: s_lshr_b32 s46, s42, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 44
+; GFX9-NEXT: v_writelane_b32 v62, s46, 43
; GFX9-NEXT: s_lshr_b32 s46, s45, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 48
+; GFX9-NEXT: v_writelane_b32 v62, s46, 47
; GFX9-NEXT: s_lshr_b32 s46, s45, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 49
+; GFX9-NEXT: v_writelane_b32 v62, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s44, 8
-; GFX9-NEXT: s_lshr_b32 s97, s7, 24
-; GFX9-NEXT: s_lshr_b32 s68, s7, 16
-; GFX9-NEXT: s_lshr_b32 s99, s7, 8
-; GFX9-NEXT: s_lshr_b32 s81, s6, 16
-; GFX9-NEXT: s_lshr_b32 s49, s6, 8
-; GFX9-NEXT: s_lshr_b32 s86, s9, 24
-; GFX9-NEXT: s_lshr_b32 s67, s9, 16
-; GFX9-NEXT: s_lshr_b32 s96, s9, 8
-; GFX9-NEXT: s_lshr_b32 s80, s8, 16
-; GFX9-NEXT: s_lshr_b32 s48, s8, 8
-; GFX9-NEXT: s_lshr_b32 s85, s11, 24
-; GFX9-NEXT: s_lshr_b32 s66, s11, 16
-; GFX9-NEXT: s_lshr_b32 s39, s11, 8
-; GFX9-NEXT: s_lshr_b32 s71, s10, 16
-; GFX9-NEXT: s_lshr_b32 s98, s10, 8
-; GFX9-NEXT: s_lshr_b32 s82, s15, 24
-; GFX9-NEXT: s_lshr_b32 s65, s15, 16
-; GFX9-NEXT: s_lshr_b32 s84, s15, 8
-; GFX9-NEXT: s_lshr_b32 s70, s14, 16
-; GFX9-NEXT: s_lshr_b32 s87, s14, 8
-; GFX9-NEXT: s_lshr_b32 s64, s13, 16
-; GFX9-NEXT: s_lshr_b32 s69, s12, 16
-; GFX9-NEXT: s_lshr_b32 s38, s12, 8
-; GFX9-NEXT: s_lshr_b32 s54, s41, 16
-; GFX9-NEXT: s_lshr_b32 s55, s40, 16
-; GFX9-NEXT: s_lshr_b32 s83, s40, 8
-; GFX9-NEXT: s_lshr_b32 s52, s43, 16
-; GFX9-NEXT: s_lshr_b32 s53, s42, 16
-; GFX9-NEXT: s_lshr_b32 s50, s45, 16
-; GFX9-NEXT: s_lshr_b32 s51, s44, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 47
-; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 46
+; GFX9-NEXT: s_lshr_b64 s[58:59], s[4:5], 24
+; GFX9-NEXT: v_writelane_b32 v62, s58, 2
+; GFX9-NEXT: v_writelane_b32 v62, s59, 3
+; GFX9-NEXT: s_lshr_b64 s[58:59], s[28:29], 24
+; GFX9-NEXT: v_writelane_b32 v62, s58, 0
+; GFX9-NEXT: s_lshr_b32 s47, s7, 8
+; GFX9-NEXT: s_lshr_b32 s60, s45, 16
+; GFX9-NEXT: s_lshr_b32 s61, s44, 16
+; GFX9-NEXT: v_writelane_b32 v62, s59, 1
; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24
+; GFX9-NEXT: s_lshr_b32 s56, s5, 16
+; GFX9-NEXT: s_lshr_b32 s64, s4, 16
+; GFX9-NEXT: s_lshr_b32 s52, s29, 16
+; GFX9-NEXT: s_lshr_b32 s50, s28, 16
+; GFX9-NEXT: s_lshr_b32 s39, s27, 16
+; GFX9-NEXT: s_lshr_b32 s99, s26, 16
+; GFX9-NEXT: s_lshr_b32 s96, s25, 16
+; GFX9-NEXT: s_lshr_b32 s87, s24, 16
+; GFX9-NEXT: s_lshr_b32 s66, s23, 16
+; GFX9-NEXT: s_lshr_b32 s55, s7, 24
+; GFX9-NEXT: s_lshr_b32 s81, s7, 16
+; GFX9-NEXT: s_lshr_b32 s86, s6, 16
+; GFX9-NEXT: s_lshr_b32 s54, s6, 8
+; GFX9-NEXT: s_lshr_b32 s49, s9, 24
+; GFX9-NEXT: s_lshr_b32 s80, s9, 16
+; GFX9-NEXT: s_lshr_b32 s48, s9, 8
+; GFX9-NEXT: s_lshr_b32 s85, s8, 16
+; GFX9-NEXT: s_lshr_b32 s38, s8, 8
+; GFX9-NEXT: s_lshr_b32 s98, s11, 24
+; GFX9-NEXT: s_lshr_b32 s71, s11, 16
+; GFX9-NEXT: s_lshr_b32 s97, s11, 8
+; GFX9-NEXT: s_lshr_b32 s84, s10, 16
+; GFX9-NEXT: s_lshr_b32 s57, s10, 8
+; GFX9-NEXT: s_lshr_b32 s67, s15, 24
+; GFX9-NEXT: s_lshr_b32 s70, s15, 16
+; GFX9-NEXT: s_lshr_b32 s83, s14, 16
+; GFX9-NEXT: s_lshr_b32 s69, s13, 16
+; GFX9-NEXT: s_lshr_b32 s82, s12, 16
+; GFX9-NEXT: s_lshr_b32 s65, s41, 16
+; GFX9-NEXT: s_lshr_b32 s68, s40, 16
+; GFX9-NEXT: s_lshr_b32 s53, s43, 16
+; GFX9-NEXT: s_lshr_b32 s51, s42, 16
+; GFX9-NEXT: s_mov_b32 s46, s47
+; GFX9-NEXT: s_mov_b32 s59, s61
+; GFX9-NEXT: s_mov_b32 s47, s60
; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
; GFX9-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
@@ -161139,46 +162301,57 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: .LBB91_2:
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr78
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: v_writelane_b32 v62, s78, 0
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s79, 1
+; GFX9-NEXT: ; implicit-def: $sgpr46
+; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr78
+; GFX9-NEXT: ; implicit-def: $sgpr66
+; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr99
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr53
; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr83
-; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr69
; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr84
+; GFX9-NEXT: ; implicit-def: $sgpr56
+; GFX9-NEXT: ; implicit-def: $sgpr59
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr53
+; GFX9-NEXT: ; implicit-def: $sgpr68
; GFX9-NEXT: ; implicit-def: $sgpr65
; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr98
+; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr70
+; GFX9-NEXT: ; implicit-def: $sgpr67
+; GFX9-NEXT: ; implicit-def: $sgpr57
+; GFX9-NEXT: ; implicit-def: $sgpr84
+; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr66
+; GFX9-NEXT: ; implicit-def: $sgpr98
+; GFX9-NEXT: ; implicit-def: $sgpr38
; GFX9-NEXT: ; implicit-def: $sgpr85
; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr86
; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr86
; GFX9-NEXT: ; implicit-def: $sgpr81
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr97
+; GFX9-NEXT: ; implicit-def: $sgpr55
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
; GFX9-NEXT: ; implicit-def: $sgpr62
; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr58
-; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $vcc_lo
@@ -161186,27 +162359,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: ; implicit-def: $sgpr92
; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr88
-; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s78, 2
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: v_writelane_b32 v62, s79, 3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
+; GFX9-NEXT: ; implicit-def: $sgpr78
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
@@ -161286,13 +162447,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB91_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
+; GFX9-NEXT: s_cselect_b32 s61, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s61, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB91_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_and_b32 s46, s45, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v13, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v1, s46, v13
+; GFX9-NEXT: v_mov_b32_e32 v20, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v1, s46, v20
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -161301,7 +162462,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s45, s45, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v13
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v20
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -161311,19 +162472,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; GFX9-NEXT: s_and_b32 s45, s44, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v13
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v20
; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s44, s44, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s44, v13
+; GFX9-NEXT: v_add_f32_e32 v1, s44, v20
; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
@@ -161333,19 +162494,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: s_and_b32 s44, s43, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v3, s44, v13
+; GFX9-NEXT: v_add_f32_e32 v3, s44, v20
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: s_lshl_b32 s43, s43, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v13
+; GFX9-NEXT: v_add_f32_e32 v3, s43, v20
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
@@ -161355,19 +162516,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v3
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v6
; GFX9-NEXT: s_and_b32 s43, s42, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v13
+; GFX9-NEXT: v_add_f32_e32 v3, s43, v20
; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s42, s42, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s42, v13
+; GFX9-NEXT: v_add_f32_e32 v3, s42, v20
; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
@@ -161377,19 +162538,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v3
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v7
; GFX9-NEXT: s_and_b32 s42, s41, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v5, s42, v13
+; GFX9-NEXT: v_add_f32_e32 v5, s42, v20
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
; GFX9-NEXT: s_lshl_b32 s41, s41, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v13
+; GFX9-NEXT: v_add_f32_e32 v5, s41, v20
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
@@ -161399,19 +162560,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v5
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v8
; GFX9-NEXT: s_and_b32 s41, s40, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v6, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v13
+; GFX9-NEXT: v_add_f32_e32 v5, s41, v20
; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s40, s40, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s40, v13
+; GFX9-NEXT: v_add_f32_e32 v5, s40, v20
; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
@@ -161421,19 +162582,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v5
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v9
; GFX9-NEXT: s_and_b32 s40, s13, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v5, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s40, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s40, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s13, s13, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s13, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s13, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161444,8 +162605,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v10
; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v11, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s13, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s13, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161453,9 +162614,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s12, s12, 16
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161465,10 +162626,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v10
; GFX9-NEXT: s_and_b32 s12, s15, 0xffff0000
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: v_or_b32_sdwa v10, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161477,7 +162638,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s12, s15, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161488,8 +162649,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s12, s14, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v17, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161497,9 +162658,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s12, s14, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161510,8 +162671,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v16, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161519,9 +162680,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s11, s11, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161532,8 +162693,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v19, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161541,9 +162702,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s10, s10, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161554,8 +162715,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v18, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161563,9 +162724,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s9, s9, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161576,8 +162737,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v23, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161585,9 +162746,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s8, s8, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161598,8 +162759,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v22, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161607,9 +162768,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s7, s7, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161620,8 +162781,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v25, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161629,9 +162790,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s6, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161642,8 +162803,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v24, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161651,9 +162812,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s17, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161664,8 +162825,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v27, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161673,9 +162834,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s16, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161686,8 +162847,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v26, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161695,9 +162856,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161707,9 +162868,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v29, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v31, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161717,9 +162878,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s18, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161729,9 +162890,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v28, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v30, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161739,9 +162900,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s21, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161751,9 +162912,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v53, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v54, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161761,9 +162922,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s20, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161773,9 +162934,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v52, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v53, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161783,21 +162945,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s23, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v61
; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v55, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v41, v7, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161805,21 +162965,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s22, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v54, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v40, v7, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161827,21 +162985,20 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s25, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v41, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v43, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161849,21 +163006,20 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s24, 16
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v40, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v42, v7, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161871,8 +163027,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s27, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161880,11 +163037,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v43, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v45, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161892,8 +163049,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s26, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161901,11 +163059,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v57
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v42, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v44, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161913,8 +163071,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161922,11 +163081,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v56
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v45, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v47, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161934,9 +163093,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161944,11 +163103,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v44, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v46, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161956,19 +163115,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v47, v7, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: v_or_b32_sdwa v56, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v20
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
@@ -161976,369 +163137,425 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s4, v20
; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v59
-; GFX9-NEXT: v_or_b32_sdwa v46, v7, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v60
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v55, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[24:25]
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[22:23]
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[18:19]
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[16:17]
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[10:11]
-; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[42:43]
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[52:53]
-; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[46:47]
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[44:45]
-; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[40:41]
-; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[28:29]
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55]
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[26:27]
-; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v28
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v25
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v23
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v55
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v55
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v56
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v56
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v55
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v47
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v47
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v46
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v45
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v25
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v25
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v24
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v23
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v23
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v22
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v19
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v18
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v17
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v17
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v16
+; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[40:41]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v11
+; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[53:54]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v11
+; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[46:47]
+; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[44:45]
+; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[30:31]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v10
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[42:43]
+; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[26:27]
+; GFX9-NEXT: v_lshrrev_b64 v[32:33], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6
+; GFX9-NEXT: v_lshrrev_b64 v[28:29], 24, v[55:56]
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 24, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v26
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v3, v15
+; GFX9-NEXT: v_mov_b32_e32 v5, v21
+; GFX9-NEXT: v_mov_b32_e32 v23, v57
+; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v4
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v4
+; GFX9-NEXT: v_mov_b32_e32 v4, v14
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v42
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v40
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v54
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v53
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v53
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v26
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
; GFX9-NEXT: s_branch .LBB91_6
; GFX9-NEXT: .LBB91_5:
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s5
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s28
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s29
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s26
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s27
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s24
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s25
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s22
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s23
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s20
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s21
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s18
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s16
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s8
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s9
-; GFX9-NEXT: v_mov_b32_e32 v13, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s10
-; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s11
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s14
-; GFX9-NEXT: v_mov_b32_e32 v58, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s15
-; GFX9-NEXT: v_mov_b32_e32 v14, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s12
-; GFX9-NEXT: v_mov_b32_e32 v56, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s13
-; GFX9-NEXT: v_mov_b32_e32 v57, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s56
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s50
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s52
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s99
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s39
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s87
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s96
+; GFX9-NEXT: v_readlane_b32 s4, v62, 4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: v_mov_b32_e32 v12, s4
+; GFX9-NEXT: v_mov_b32_e32 v14, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v29, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v12, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v6, s41
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s65
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: v_mov_b32_e32 v32, s4
+; GFX9-NEXT: v_mov_b32_e32 v36, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: v_mov_b32_e32 v35, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: v_mov_b32_e32 v44, s4
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: v_mov_b32_e32 v13, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: v_mov_b32_e32 v52, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: v_mov_b32_e32 v46, s4
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: v_mov_b32_e32 v43, s4
+; GFX9-NEXT: v_mov_b32_e32 v33, s4
+; GFX9-NEXT: v_mov_b32_e32 v32, s78
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, s88
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: v_mov_b32_e32 v39, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: v_mov_b32_e32 v47, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v6, s54
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s55
; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s46
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s38
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, s90
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
-; GFX9-NEXT: v_mov_b32_e32 v52, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s49
+; GFX9-NEXT: v_mov_b32_e32 v31, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: v_mov_b32_e32 v21, s4
-; GFX9-NEXT: v_mov_b32_e32 v20, s78
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v20, s88
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s81
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s68
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v20, s90
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s80
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s67
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v20, s92
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s71
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s66
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s70
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s65
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s69
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s64
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s55
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s41
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s54
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s42
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s48
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s53
-; GFX9-NEXT: v_mov_b32_e32 v53, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s57
+; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s43
-; GFX9-NEXT: v_mov_b32_e32 v8, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s98
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s97
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s52
-; GFX9-NEXT: v_mov_b32_e32 v60, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, s92
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s67
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s44
-; GFX9-NEXT: v_mov_b32_e32 v7, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: v_mov_b32_e32 v26, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s45
-; GFX9-NEXT: v_mov_b32_e32 v9, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s50
-; GFX9-NEXT: v_mov_b32_e32 v27, s4
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s49
-; GFX9-NEXT: v_mov_b32_e32 v28, s4
+; GFX9-NEXT: v_mov_b32_e32 v30, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s97
-; GFX9-NEXT: v_mov_b32_e32 v11, s4
+; GFX9-NEXT: v_mov_b32_e32 v2, s86
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v32, s94
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s99
-; GFX9-NEXT: v_mov_b32_e32 v29, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s81
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 43
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s85
+; GFX9-NEXT: v_mov_b32_e32 v11, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s86
-; GFX9-NEXT: v_mov_b32_e32 v3, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s80
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s96
-; GFX9-NEXT: v_mov_b32_e32 v24, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s84
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s85
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s71
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s83
+; GFX9-NEXT: v_mov_b32_e32 v25, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: v_mov_b32_e32 v20, s94
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v61, s5
-; GFX9-NEXT: v_mov_b32_e32 v18, s98
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v16, s87
-; GFX9-NEXT: v_mov_b32_e32 v25, s82
-; GFX9-NEXT: v_mov_b32_e32 v17, s84
-; GFX9-NEXT: v_mov_b32_e32 v10, s38
-; GFX9-NEXT: v_mov_b32_e32 v5, s83
-; GFX9-NEXT: v_mov_b32_e32 v2, s4
-; GFX9-NEXT: v_mov_b32_e32 v30, s46
-; GFX9-NEXT: v_mov_b32_e32 v33, s56
-; GFX9-NEXT: v_mov_b32_e32 v36, s58
-; GFX9-NEXT: v_mov_b32_e32 v37, s60
-; GFX9-NEXT: v_mov_b32_e32 v38, s62
-; GFX9-NEXT: v_mov_b32_e32 v48, s72
-; GFX9-NEXT: v_mov_b32_e32 v49, s74
-; GFX9-NEXT: v_mov_b32_e32 v50, s76
-; GFX9-NEXT: v_mov_b32_e32 v20, vcc_lo
-; GFX9-NEXT: v_mov_b32_e32 v31, s30
-; GFX9-NEXT: v_mov_b32_e32 v34, s34
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s70
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 2
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s82
+; GFX9-NEXT: v_readlane_b32 s5, v62, 3
+; GFX9-NEXT: v_mov_b32_e32 v32, vcc_lo
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v2, s69
+; GFX9-NEXT: v_mov_b32_e32 v28, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 0
+; GFX9-NEXT: v_mov_b32_e32 v4, s24
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v3, s25
+; GFX9-NEXT: v_mov_b32_e32 v5, s22
+; GFX9-NEXT: v_mov_b32_e32 v23, s23
+; GFX9-NEXT: v_mov_b32_e32 v19, s20
+; GFX9-NEXT: v_mov_b32_e32 v10, s21
+; GFX9-NEXT: v_mov_b32_e32 v16, s18
+; GFX9-NEXT: v_mov_b32_e32 v17, s19
+; GFX9-NEXT: v_mov_b32_e32 v26, s16
+; GFX9-NEXT: v_mov_b32_e32 v24, s17
+; GFX9-NEXT: v_mov_b32_e32 v60, s64
+; GFX9-NEXT: v_mov_b32_e32 v61, s66
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s40
+; GFX9-NEXT: v_mov_b32_e32 v2, s68
+; GFX9-NEXT: v_mov_b32_e32 v56, s42
+; GFX9-NEXT: v_mov_b32_e32 v8, s51
+; GFX9-NEXT: v_mov_b32_e32 v46, s43
+; GFX9-NEXT: v_mov_b32_e32 v47, s53
+; GFX9-NEXT: v_mov_b32_e32 v7, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s59
+; GFX9-NEXT: v_mov_b32_e32 v21, s45
+; GFX9-NEXT: v_mov_b32_e32 v57, s47
+; GFX9-NEXT: v_readlane_b32 s5, v62, 1
+; GFX9-NEXT: v_mov_b32_e32 v34, s4
+; GFX9-NEXT: v_mov_b32_e32 v37, s58
+; GFX9-NEXT: v_mov_b32_e32 v38, s60
+; GFX9-NEXT: v_mov_b32_e32 v48, s62
+; GFX9-NEXT: v_mov_b32_e32 v49, s72
+; GFX9-NEXT: v_mov_b32_e32 v50, s74
+; GFX9-NEXT: v_mov_b32_e32 v51, s76
+; GFX9-NEXT: v_mov_b32_e32 v32, s30
+; GFX9-NEXT: v_mov_b32_e32 v35, s34
; GFX9-NEXT: .LBB91_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v14, v14, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v12, v12, v37, s4
-; GFX9-NEXT: v_perm_b32 v36, v57, v36, s4
-; GFX9-NEXT: v_perm_b32 v30, v59, v30, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v29, v29, v50, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v12, v12, v51, s4
+; GFX9-NEXT: v_perm_b32 v26, v26, v44, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_or_b32_e32 v12, v26, v12
+; GFX9-NEXT: v_perm_b32 v15, v15, v43, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: v_perm_b32 v1, v1, v40, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_perm_b32 v28, v60, v28, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v35, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v32, s4
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -162375,301 +163592,278 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_readlane_b32 s36, v63, 2
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v50, v23, v50, s4
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v33, v33, v34, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v49, v23, v49, s4
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v31, v34, v31, s4
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v48, v23, v48, s4
-; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v26, v34, v26, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v34, 16, v50
-; GFX9-NEXT: v_or_b32_e32 v26, v26, v34
-; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v38, v23, v38, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v9, v27, v9, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_or_b32_e32 v9, v26, v9
-; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v49, v50, v49, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v48, v50, v48, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v38, v50, v38, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v37, v50, v37, s4
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v34, v50, v34, s4
+; GFX9-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen
+; GFX9-NEXT: v_perm_b32 v12, v24, v59, s4
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX9-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_perm_b32 v12, v16, v41, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v29
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v15
+; GFX9-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: v_perm_b32 v12, v17, v31, s4
+; GFX9-NEXT: v_or_b32_e32 v1, v12, v1
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_perm_b32 v1, v19, v53, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v49
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v12
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: v_perm_b32 v1, v10, v54, s4
+; GFX9-NEXT: v_perm_b32 v10, v14, v42, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_perm_b32 v1, v5, v55, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v48
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX9-NEXT: v_perm_b32 v5, v61, v33, s4
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: v_perm_b32 v1, v23, v39, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_perm_b32 v1, v4, v13, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v38
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: v_perm_b32 v1, v3, v52, s4
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v49
-; GFX9-NEXT: v_or_b32_e32 v8, v8, v9
-; GFX9-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v20, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v37
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v36, s4
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v60, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v48
+; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v21, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v38
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v54, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v7, v7, v55, s4
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v15, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v12
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v47, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v36
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v42, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v28
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v7, v7, v43, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v14
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v8, v56, v51, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v45, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v7, v13, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v30
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: v_perm_b32 v8, v58, v32, s4
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_perm_b32 v7, v61, v35, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v33
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v7
+; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; GFX9-NEXT: v_perm_b32 v1, v7, v45, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: v_perm_b32 v3, v57, v25, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v21, v6, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v56, v11, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX9-NEXT: v_perm_b32 v3, v47, v22, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v4, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v46, v18, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v27, v30, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v6, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v10, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v28, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v17, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v25, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v18, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v19, s4
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v2, v1, v2, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
@@ -162686,8 +163880,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -162697,88 +163891,90 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:88
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:72
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:12
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:8
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:4
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s34, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s35, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s36, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s37, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s38, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s39, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s48, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s49, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s50, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s51, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s52, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s53, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s54, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s55, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s64, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s65, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s66, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s67, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s68, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s69, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s70, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s71, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s80, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s81, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s82, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s83, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s84, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s85, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s86, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s87, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s96, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s97, 31
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s98, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s99, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s100, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s101, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s102, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s103, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s104, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s30, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s31, 8
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13
@@ -162795,220 +163991,210 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-TRUE16-NEXT: s_mov_b32 s104, 0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78 : SGPR spill to VGPR lane
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s5, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s5, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s4, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s4, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s7, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s7, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s7, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s6, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s9, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s9, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s8, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s11, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s11, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s10, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s10, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s13, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s13, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s13, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s12, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s15, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s15, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s14, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s14, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s41, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s41, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s40, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s40, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s29, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s29, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s29, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s28, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 22
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 17
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s28, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 18
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s27, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s26, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 20
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s25, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 21
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s23, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 19
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s22, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 23
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s20, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s17, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 22
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s2, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 26
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s5, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 27
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s7, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 25
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s6, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 29
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s9, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 15
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s11, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 30
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s10, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 14
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s13, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 28
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s12, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 31
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s15, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s78, 12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s15, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s79, 13
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s14, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s78, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s41, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s40, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s79, 11
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_mov_b32 s35, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s78, 8
+; GFX11-TRUE16-NEXT: s_mov_b32 s73, s76
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-TRUE16-NEXT: s_mov_b32 s42, s74
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s79, 9
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s78, 6
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s79, 7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s74, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s75, 1
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_mov_b32 s75, s77
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
; GFX11-TRUE16-NEXT: s_branch .LBB91_3
; GFX11-TRUE16-NEXT: .LBB91_2:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: s_mov_b32 s104, -1
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: s_mov_b32 s35, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
@@ -163018,79 +164204,78 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 1
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 3
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 5
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 7
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 9
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 11
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s42, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v78, s43, 13
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: .LBB91_3: ; %Flow
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s43, s104, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s77, s35, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s77, 1, 0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s77, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB91_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: s_lshl_b32 s42, s29, 16
@@ -163236,7 +164421,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v10
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
@@ -163249,7 +164434,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v13, v14
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
@@ -163266,27 +164451,27 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v15
; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v10
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v15, v16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
@@ -163450,8 +164635,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v82.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
@@ -163507,7 +164692,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v83.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v81.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
@@ -163556,7 +164741,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v131.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v131.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
@@ -163587,7 +164772,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v15
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
@@ -163649,10 +164834,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v17
; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v147.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.l, v134.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v22, v15
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v17, 16, 1
@@ -163672,7 +164857,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v23
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v161.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.h, v149.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v26, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -163684,68 +164869,70 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v150.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v163.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v25, v26, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v134.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v146.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v42.l, v146.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v42.h, v151.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v145.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v19
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v27, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v160.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v145.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v148.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v135.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v165.l
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v148.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v100.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v117.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v115.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v114.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v115.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v29.h, v128.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v119.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.h, v133.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v130.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v144.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v165.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v160.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v164.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v53.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v65.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v67.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v68.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v82.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v85.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v96.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v151.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v164.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[46:47]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v147.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v161.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v44
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v43
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[42:43]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[20:21]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[40:41]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[35:36]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[48:49]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v36
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[44:45]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v179
@@ -163753,293 +164940,280 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v183
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v45
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v44
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v35
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v43
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v42
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v21
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v21
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, v74
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, v73
; GFX11-TRUE16-NEXT: s_branch .LBB91_6
; GFX11-TRUE16-NEXT: .LBB91_5:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v115, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s8 :: v_dual_mov_b32 v165, s26
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v151, s25
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v147, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v135, s18
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v131, s19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v119, s17
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v99, s5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v87, s7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v81, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v71, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s103 :: v_dual_mov_b32 v112, s99
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s102 :: v_dual_mov_b32 v100, s101
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s98 :: v_dual_mov_b32 v96, s100
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s97 :: v_dual_mov_b32 v84, s87
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s96 :: v_dual_mov_b32 v70, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s12 :: v_dual_mov_b32 v80, s86
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s85
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s40
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s84 :: v_dual_mov_b32 v66, s83
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s82
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v53, s81
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s29 :: v_dual_mov_b32 v51, s80
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s71 :: v_dual_mov_b32 v19, s69
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s67 :: v_dual_mov_b32 v13, s70
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s64 :: v_dual_mov_b32 v14, s66
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s68 :: v_dual_mov_b32 v12, s55
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s53 :: v_dual_mov_b32 v28, s50
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s65 :: v_dual_mov_b32 v10, s52
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s54 :: v_dual_mov_b32 v8, s49
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s39 :: v_dual_mov_b32 v6, s38
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v115, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v85, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v165, s26 :: v_dual_mov_b32 v162, s27
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s51 :: v_dual_mov_b32 v48, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s36 :: v_dual_mov_b32 v36, s35
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v147, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v160, s25 :: v_dual_mov_b32 v135, s18
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s48 :: v_dual_mov_b32 v44, s37
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s30 :: v_dual_mov_b32 v4, s31
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v26, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s42
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 16
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s66
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v131, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v119, s17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v99, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v87, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v81, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v177, s63
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s74 :: v_dual_mov_b32 v16, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v18, s88
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v23, s92
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, vcc_lo
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 25
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v167, s57
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s8 :: v_dual_mov_b32 v163, s60
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s11 :: v_dual_mov_b32 v161, s45
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v176, s30 :: v_dual_mov_b32 v151, s44
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v164, s61 :: v_dual_mov_b32 v149, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v148, s100 :: v_dual_mov_b32 v145, s102
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v144, s83 :: v_dual_mov_b32 v133, s87
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s67 :: v_dual_mov_b32 v129, s71
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s54 :: v_dual_mov_b32 v112, s55
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s52 :: v_dual_mov_b32 v100, s50
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s53 :: v_dual_mov_b32 v96, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s51 :: v_dual_mov_b32 v84, s49
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s38 :: v_dual_mov_b32 v82, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s13 :: v_dual_mov_b32 v71, s39
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s36
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s40
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s37 :: v_dual_mov_b32 v66, s31
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s34
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v53, s75
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s29 :: v_dual_mov_b32 v51, s73
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v72, s0 :: v_dual_mov_b32 v19, s47
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 29
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v178, s97 :: v_dual_mov_b32 v39, s101
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s99 :: v_dual_mov_b32 v181, s85
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v62, s0 :: v_dual_mov_b32 v13, s56
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v180, s81 :: v_dual_mov_b32 v179, s82
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s64 :: v_dual_mov_b32 v183, s69
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 31
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s96
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s43 :: v_dual_mov_b32 v21, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s59 :: v_dual_mov_b32 v11, s103
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v5, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s80
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s58 :: v_dual_mov_b32 v9, s86
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s42 :: v_dual_mov_b32 v29, s98
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s104 :: v_dual_mov_b32 v7, s70
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s84 :: v_dual_mov_b32 v35, s68
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v25, s72
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s76 :: v_dual_mov_b32 v23, s92
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s88 :: v_dual_mov_b32 v3, s94
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v1, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s74
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v40, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s65 :: v_dual_mov_b32 v41, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 13
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v26, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 11
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v31, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v32, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v33, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v78, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v78, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s0
; GFX11-TRUE16-NEXT: .LBB91_6: ; %end
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v128, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v115, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v117, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v117, v114, v72, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v128, v38, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v37, v132, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
-; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v144, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v115, v115, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v114, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v59, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v128, v116, v61, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v130, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v117, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v117, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v144, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v129, v116, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v132, 16, v114
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v115, v38
; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v118, v37
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v128, v129
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v133, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v119, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v119, v135, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v133, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v119, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v119, v145, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v130, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v151, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v130, v135, v45, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v33, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v160, v31, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v31, v149, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v119, v32
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v146, v42, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v30, v163, v30, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v118, v145, v56, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v38, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v134, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v119, 16, v119
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v128, v117
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v129, v132
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v37, v33
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v146, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v163, v27, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v161, v183, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v118, v38
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v130, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v119
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v149, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v150, v2, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v33, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v161, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v134, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v167, v26, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v31
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v147, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v2, v27
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v147, v182, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v164, v181, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v177, v25, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v118
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v37, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v166, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v37, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v166, v180, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v69, v23, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v96, v18, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
-; GFX11-TRUE16-NEXT: v_perm_b32 v116, v165, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v160, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v165, v178, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v2, v27
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v176, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v32, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v68, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v83, v22, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v82, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v85, v9, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v100, v17, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v37, v164, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v33, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v38, v25
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v162, v34, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v50, v4, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v83, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v82, v7, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v80, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v71, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v27, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v151, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v28, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v1, v53, v1, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v25, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v25, v2
; GFX11-TRUE16-NEXT: v_perm_b32 v25, v55, v48, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v26
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v67, v35, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v85, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v84, v29, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v17
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v103, v16, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v101, v21, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v113, v15, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v24, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v37
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v52, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v27, v52, v40, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-TRUE16-NEXT: v_perm_b32 v37, v64, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -164048,7 +165222,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v80, v10, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v81, v12, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v13, v98, v13, 0xc0c0004
@@ -164059,7 +165233,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v19, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v27, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v37, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v25
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v26
@@ -164071,78 +165245,79 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v21
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[31:34], off offset:48
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-TRUE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:72
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v76, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v76, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v76, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v76, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v76, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v76, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v76, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v76, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v76, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v75, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v75, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v75, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v75, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v75, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v75, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v75, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v75, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v75, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v75, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v75, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v75, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v75, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v75, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v75, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v75, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v75, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v75, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v75, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v75, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v75, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v75, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v75, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v75, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v75, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v75, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v75, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v75, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v75, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v75, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v75, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v75, 0
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:88
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
@@ -164152,88 +165327,90 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:88
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:72
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:12
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:8
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:4
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30
-; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7
-; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s34, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s35, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s36, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s37, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s38, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s39, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s48, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s49, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s50, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s51, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s52, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s53, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s54, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s55, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s64, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s65, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s66, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s67, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s68, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s69, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s70, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s71, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s80, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s81, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s82, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s83, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s84, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s85, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s86, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s87, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s96, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s97, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s98, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s99, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s100, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s101, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s102, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s103, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s104, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s30, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s31, 8
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13
@@ -164250,220 +165427,210 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-FAKE16-NEXT: s_mov_b32 s104, 0
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78 : SGPR spill to VGPR lane
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s5, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s5, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s5, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s4, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s4, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s7, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s7, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s7, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s6, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s6, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s9, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s9, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s9, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s8, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s8, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s11, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s11, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s11, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s10, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s10, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s13, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s13, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s13, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s12, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s12, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s15, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s15, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s15, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s14, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s14, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s41, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s41, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s41, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s40, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s40, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s29, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s29, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s29, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s28, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s28, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[24:25], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 17
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s28, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 18
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s27, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s26, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 20
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s25, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 21
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s23, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 19
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s22, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 23
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s20, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s17, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 22
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s2, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 26
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s5, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 27
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s7, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 25
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s6, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 29
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s9, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 15
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s11, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 30
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 14
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s14, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s15, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s78, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s40, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s79, 13
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s14, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s78, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s29, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s79, 11
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_mov_b32 s35, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s78, 8
+; GFX11-FAKE16-NEXT: s_mov_b32 s73, s76
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_mov_b32 s42, s74
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s79, 9
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s78, 6
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s79, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s74, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s75, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s74, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s75, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s74, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s75, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_mov_b32 s75, s77
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
; GFX11-FAKE16-NEXT: s_branch .LBB91_3
; GFX11-FAKE16-NEXT: .LBB91_2:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: s_mov_b32 s104, -1
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: s_mov_b32 s35, -1
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_lo
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
@@ -164473,79 +165640,78 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s42, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v78, s43, 13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: .LBB91_3: ; %Flow
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: s_and_b32 s43, s104, exec_lo
-; GFX11-FAKE16-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s77, s35, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s77, 1, 0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s77, 1
; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB91_5
; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-FAKE16-NEXT: s_lshl_b32 s42, s29, 16
@@ -164578,7 +165744,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41
; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
@@ -164587,13 +165753,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4
@@ -164608,15 +165774,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
@@ -164627,16 +165793,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v39
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v48
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v4, v11 :: v_dual_add_nc_u32 v5, v7, v8
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v9, v10
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
@@ -164648,8 +165814,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v49, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v7, v9
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v11
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
@@ -164664,9 +165830,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v12
; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
@@ -164681,7 +165847,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: s_and_b32 s12, s11, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v9
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
@@ -164689,7 +165855,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v11, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v14 :: v_dual_add_nc_u32 v8, v9, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v13
@@ -164729,7 +165895,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v13, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v10
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
@@ -164746,8 +165912,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v15, v16
; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
@@ -164762,17 +165928,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v17, 16, 1
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v82, 16, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v71
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v83
; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v85, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v12
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v86, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v12
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v17
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
@@ -164788,15 +165954,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v12, v19 :: v_dual_add_nc_u32 v14, v17, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
@@ -164808,8 +165974,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v17, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
@@ -164825,14 +165991,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v16, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v19, v20
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
@@ -164843,109 +166009,111 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v49
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19
; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19
; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_and_b32 s1, s0, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v50, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v85
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v87, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v84
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v50
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v98, 16, v13
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v51, 16, v3
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v87
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v99, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v100, 16, v13
; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v96
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v51
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v52
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v101, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v97
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v101, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v102, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v100
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v102, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v103
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v103, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v114, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v32, v115, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v113
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v117, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v113
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v118, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v114
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v118, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v39, v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v22
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
@@ -164958,33 +166126,33 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v115
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v116
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v23, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v24, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v129, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v130, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v24
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v19
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v24
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v53, 16, v3
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v22, v18
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
@@ -164993,67 +166161,67 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v19
; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v116
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v117
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v128
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v130, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v54
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v129
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v131, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v13
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v15, v19, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v134, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v134, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v119
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v128
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v133, 16, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v135, 16, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v14
; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v25, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v23, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v26, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v24, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v15
; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v14
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v27, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v86, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v64, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v19
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v21, v28, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v132
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v83
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v131
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v133
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v43
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v132
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v145, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v145, 16, v15
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13
; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
@@ -165067,477 +166235,467 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v22, v20
; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v26, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v24, v21
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v27, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v55
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v15
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v65, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v144
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v144
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v149, 16, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v146
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v150, 16, v18
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v20
; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v147, 16, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v42, v147, 16, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v21, v14
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v18, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15
; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v25, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v26, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v23, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v24, v18
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v67
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v66
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v18, v20, v21 :: v_dual_add_nc_u32 v15, v15, v27
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v24, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v20 :: v_dual_add_nc_u32 v18, v21, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v24
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v21, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v14, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v25, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v23, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v27, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v21
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v25
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v23
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v18, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v25
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v23
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v22, v32, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v22, v30, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v26, v26, v28
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v69, 16, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v27, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, v24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v27, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v80
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v26
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v23
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v18, v29, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v26, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v151
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v160
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v146
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v148
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v18
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v161
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v177, v165, 16, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v97, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v163, 16, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v176, v166, 16, v15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v164, 16, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v148
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v149
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v161
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v160
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v164, 16, v20
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v182, v162, 16, v21
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v55, 16, v3
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v81, 16, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v13
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v66, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[45:46]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[176:177]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[43:44]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[180:181]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[37:38]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[182:183]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[30:31]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[40:41]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[23:24]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v177
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v177
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v151, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v163
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v177, v166, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[42:43]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v43
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v176, v167, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v165, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[40:41]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[180:181]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[182:183]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[44:45]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v40
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[176:177]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v177
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v181
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v181
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 8, v180
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v183
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v41
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v41
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v43
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v46
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v46
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v45
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v44
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v44
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v42
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, v43
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v69, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v80
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v98, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v67, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v44
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v81, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v176
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v182
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v37
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 24, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 24, v12
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v44, v73 :: v_dual_mov_b32 v43, v74
; GFX11-FAKE16-NEXT: s_branch .LBB91_6
; GFX11-FAKE16-NEXT: .LBB91_5:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v103, s1
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v160, s26 :: v_dual_mov_b32 v151, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s24 :: v_dual_mov_b32 v146, s25
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v148, s22 :: v_dual_mov_b32 v135, s23
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s20 :: v_dual_mov_b32 v131, s21
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v119, s19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s16 :: v_dual_mov_b32 v115, s2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s17 :: v_dual_mov_b32 v113, s3
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s4 :: v_dual_mov_b32 v96, s5
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s6 :: v_dual_mov_b32 v84, s7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s8 :: v_dual_mov_b32 v70, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s2 :: v_dual_mov_b32 v113, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s1 :: v_dual_mov_b32 v85, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s26 :: v_dual_mov_b32 v160, s27
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s10 :: v_dual_mov_b32 v68, s11
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v102, s103 :: v_dual_mov_b32 v101, s99
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s102 :: v_dual_mov_b32 v97, s101
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s98 :: v_dual_mov_b32 v85, s100
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s97 :: v_dual_mov_b32 v81, s87
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s96 :: v_dual_mov_b32 v67, s13
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s12 :: v_dual_mov_b32 v69, s86
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s14 :: v_dual_mov_b32 v66, s85
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v53, s40
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s84 :: v_dual_mov_b32 v55, s83
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v133, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s41 :: v_dual_mov_b32 v52, s82
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s28 :: v_dual_mov_b32 v50, s81
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v48, s80
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s71 :: v_dual_mov_b32 v23, s64
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s70 :: v_dual_mov_b32 v17, s66
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s68 :: v_dual_mov_b32 v24, s53
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s55 :: v_dual_mov_b32 v9, s65
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s50 :: v_dual_mov_b32 v7, s54
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s52 :: v_dual_mov_b32 v31, s39
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s49 :: v_dual_mov_b32 v5, s51
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v117, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s36 :: v_dual_mov_b32 v6, s38
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s48 :: v_dual_mov_b32 v38, s35
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s34 :: v_dual_mov_b32 v44, s37
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v45, s30 :: v_dual_mov_b32 v4, s31
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v26, s62
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s60 :: v_dual_mov_b32 v28, s58
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s44 :: v_dual_mov_b32 v35, s42
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s74 :: v_dual_mov_b32 v14, s76
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v21, s92
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, vcc_lo
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v163, s24 :: v_dual_mov_b32 v148, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v149, s22 :: v_dual_mov_b32 v144, s23
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v115, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 16
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s66
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v133, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s21 :: v_dual_mov_b32 v129, s16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s67
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s69
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s19 :: v_dual_mov_b32 v117, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s3 :: v_dual_mov_b32 v97, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v44, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s4 :: v_dual_mov_b32 v71, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s6 :: v_dual_mov_b32 v83, s10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s8 :: v_dual_mov_b32 v167, s63
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s11 :: v_dual_mov_b32 v165, s57
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v166, s30 :: v_dual_mov_b32 v151, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v164, s61 :: v_dual_mov_b32 v145, s46
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v162, s60 :: v_dual_mov_b32 v147, s100
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v150, s45 :: v_dual_mov_b32 v135, s102
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 22
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s83 :: v_dual_mov_b32 v131, s87
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v130, s67 :: v_dual_mov_b32 v119, s71
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v103, s54 :: v_dual_mov_b32 v102, s55
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v101, s52 :: v_dual_mov_b32 v98, s50
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s53 :: v_dual_mov_b32 v86, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s51 :: v_dual_mov_b32 v82, s49
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s38 :: v_dual_mov_b32 v80, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v68, s13 :: v_dual_mov_b32 v69, s39
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s14 :: v_dual_mov_b32 v67, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s15 :: v_dual_mov_b32 v54, s40
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s37 :: v_dual_mov_b32 v64, s31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v53, s34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s28 :: v_dual_mov_b32 v51, s75
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s29 :: v_dual_mov_b32 v49, s73
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v176, s97 :: v_dual_mov_b32 v37, s101
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s99 :: v_dual_mov_b32 v179, s85
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v178, s81 :: v_dual_mov_b32 v177, s82
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v182, s64 :: v_dual_mov_b32 v181, s69
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 31
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s43 :: v_dual_mov_b32 v15, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s59 :: v_dual_mov_b32 v25, s62
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v5, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s56 :: v_dual_mov_b32 v17, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s103 :: v_dual_mov_b32 v26, s42
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v40, s0 :: v_dual_mov_b32 v23, s72
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s104 :: v_dual_mov_b32 v9, s86
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s98 :: v_dual_mov_b32 v10, s96
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s68 :: v_dual_mov_b32 v7, s70
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v32, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s76 :: v_dual_mov_b32 v21, s92
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, s65
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v3, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v1, vcc_lo
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, s74
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s88 :: v_dual_mov_b32 v42, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v27, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 11
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v28, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v33, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v34, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v35, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v78, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v78, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0
; GFX11-FAKE16-NEXT: .LBB91_6: ; %end
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v117, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v112, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v112, v114, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v129, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v114, v118, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v112
-; GFX11-FAKE16-NEXT: v_perm_b32 v115, v115, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, v35, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v134, v33, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v118, v113, v61, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, v103, v117
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, v115, v34
-; GFX11-FAKE16-NEXT: v_perm_b32 v33, v128, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v130, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v32, v147, v32, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v133, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v118, v129
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v116, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v118, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v130, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v113, v72, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v112, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v119, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v116, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v115, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v119, v114, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v130, 16, v112
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, v113, v36
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v134, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, v116, v35
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v117, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v117, v135, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
+; GFX11-FAKE16-NEXT: v_perm_b32 v33, v147, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-FAKE16-NEXT: v_perm_b32 v116, v132, v46, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v118, v119, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v33, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v150, v28, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v145, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-FAKE16-NEXT: v_perm_b32 v128, v128, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v151, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, v118, v115
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v119, v130
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v133, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v33
; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v34
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v116, v117
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v118, v103
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v144, v40, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v162, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v116, v131, v183, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v66, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v117, v148, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v116, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v128, v117
+; GFX11-FAKE16-NEXT: v_perm_b32 v117, v146, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v162, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v118, v119
+; GFX11-FAKE16-NEXT: v_perm_b32 v119, v149, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v103, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v149, v181, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v116, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v26, v164, v26, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v179, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v65, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v117, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v150, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v167, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v67, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v119, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v144, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v164, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v161, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v166, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v66, v5, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v81, v20, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v117, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v180, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v161, v178, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v166, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-FAKE16-NEXT: v_perm_b32 v112, v146, v177, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v50, v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v28, v29
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v115, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v160, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v37
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v49, v42, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v7, v80, v7, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v69, v31, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v71, v9, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v69, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v83, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v98, v18, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v25
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v27, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v103, v26
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v165, v167, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v112, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v151, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v48, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v49, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v48, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v145, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v23, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v53, v2, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v20
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v67, v8, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v82, v30, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v83, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v82, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v84, v11, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v55, v3, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v48, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v52, v41, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v64, v37, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v68, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v87, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v165, v27, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v51, v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v64, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v37
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v65, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v132, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v116
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v52, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v70, v10, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v100, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v101, v14, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v102, v13, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v101, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v113, v160, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v53, v43, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v99, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v103, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v102, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v163, v178, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v148, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v49, v50, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v54, v40, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v28, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v36
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v51, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v54, v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v55, v6, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v71, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v118, v116
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v23
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v87, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v96, v16, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v84, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v85, v17, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v99, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v100, v22, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v96, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v97, v15, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v113, v114
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v112, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v113, v114
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v49, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v48, v3
; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v37
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
@@ -165545,78 +166703,79 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v23, v20
; GFX11-FAKE16-NEXT: s_clause 0x5
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:32
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:48
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68
-; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7
-; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8
-; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6
-; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5
-; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4
-; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3
-; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2
-; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1
-; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31
-; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30
-; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29
-; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28
-; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27
-; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26
-; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25
-; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24
-; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23
-; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22
-; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21
-; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20
-; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19
-; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18
-; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17
-; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16
-; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15
-; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14
-; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13
-; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12
-; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11
-; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10
-; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9
-; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8
-; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7
-; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6
-; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5
-; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4
-; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3
-; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2
-; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1
-; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:72
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v76, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v76, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v76, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v76, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v76, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v76, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v76, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v76, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v76, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v75, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v75, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v75, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v75, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v75, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v75, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v75, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v75, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v75, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v75, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v75, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v75, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v75, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v75, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v75, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v75, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v75, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v75, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v75, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v75, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v75, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v75, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v75, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v75, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v75, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v75, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v75, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v75, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v75, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v75, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v75, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v75, 0
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72
; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76
; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80
; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84
+; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:88
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
@@ -171957,6 +173116,7 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
@@ -171999,817 +173159,839 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: v_writelane_b32 v45, s99, 33
; SI-NEXT: v_writelane_b32 v45, s30, 34
; SI-NEXT: v_writelane_b32 v45, s31, 35
-; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
+; SI-NEXT: ; implicit-def: $vgpr56 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_writelane_b32 v47, s29, 0
-; SI-NEXT: v_writelane_b32 v47, s28, 1
-; SI-NEXT: v_writelane_b32 v47, s27, 2
-; SI-NEXT: v_writelane_b32 v47, s26, 3
-; SI-NEXT: v_writelane_b32 v47, s25, 4
-; SI-NEXT: v_writelane_b32 v47, s24, 5
-; SI-NEXT: v_writelane_b32 v47, s23, 6
-; SI-NEXT: v_writelane_b32 v47, s22, 7
-; SI-NEXT: v_writelane_b32 v47, s21, 8
-; SI-NEXT: v_writelane_b32 v47, s20, 9
-; SI-NEXT: v_writelane_b32 v47, s19, 10
-; SI-NEXT: v_writelane_b32 v47, s18, 11
-; SI-NEXT: v_writelane_b32 v47, s17, 12
-; SI-NEXT: v_writelane_b32 v47, s16, 13
-; SI-NEXT: v_writelane_b32 v47, s4, 14
+; SI-NEXT: v_writelane_b32 v56, s29, 0
+; SI-NEXT: v_writelane_b32 v56, s28, 1
+; SI-NEXT: v_writelane_b32 v56, s27, 2
+; SI-NEXT: v_writelane_b32 v56, s26, 3
+; SI-NEXT: v_writelane_b32 v56, s25, 4
+; SI-NEXT: v_writelane_b32 v56, s23, 5
+; SI-NEXT: v_writelane_b32 v56, s22, 6
+; SI-NEXT: v_writelane_b32 v56, s21, 7
+; SI-NEXT: v_writelane_b32 v56, s19, 8
+; SI-NEXT: v_writelane_b32 v56, s18, 9
+; SI-NEXT: v_writelane_b32 v56, s17, 10
+; SI-NEXT: v_writelane_b32 v56, s16, 11
+; SI-NEXT: v_writelane_b32 v56, s4, 12
; SI-NEXT: v_readfirstlane_b32 s4, v29
-; SI-NEXT: v_writelane_b32 v47, s4, 15
+; SI-NEXT: v_writelane_b32 v56, s4, 13
; SI-NEXT: v_readfirstlane_b32 s4, v28
-; SI-NEXT: v_writelane_b32 v47, s4, 16
+; SI-NEXT: v_writelane_b32 v56, s4, 14
; SI-NEXT: v_readfirstlane_b32 s4, v27
-; SI-NEXT: v_writelane_b32 v47, s4, 17
+; SI-NEXT: v_writelane_b32 v56, s4, 15
; SI-NEXT: v_readfirstlane_b32 s4, v26
-; SI-NEXT: v_writelane_b32 v47, s4, 18
+; SI-NEXT: v_writelane_b32 v56, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
-; SI-NEXT: v_writelane_b32 v47, s4, 19
+; SI-NEXT: v_writelane_b32 v56, s4, 17
; SI-NEXT: v_readfirstlane_b32 s4, v24
-; SI-NEXT: v_writelane_b32 v47, s4, 20
+; SI-NEXT: v_writelane_b32 v56, s4, 18
; SI-NEXT: v_readfirstlane_b32 s4, v23
-; SI-NEXT: v_writelane_b32 v47, s4, 21
+; SI-NEXT: v_writelane_b32 v56, s4, 19
; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_writelane_b32 v47, s4, 22
+; SI-NEXT: v_writelane_b32 v56, s4, 20
; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:332
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324
-; SI-NEXT: v_readfirstlane_b32 s92, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:320
-; SI-NEXT: v_writelane_b32 v47, s4, 23
+; SI-NEXT: v_writelane_b32 v56, s4, 21
; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316
-; SI-NEXT: v_writelane_b32 v47, s4, 24
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:328
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320
+; SI-NEXT: v_writelane_b32 v56, s4, 22
+; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316
+; SI-NEXT: v_writelane_b32 v56, s4, 23
+; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: v_writelane_b32 v56, s4, 24
; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_writelane_b32 v47, s4, 25
+; SI-NEXT: v_writelane_b32 v56, s4, 25
; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: v_writelane_b32 v47, s4, 26
+; SI-NEXT: v_writelane_b32 v56, s4, 26
; SI-NEXT: v_readfirstlane_b32 s4, v15
-; SI-NEXT: v_writelane_b32 v47, s4, 27
+; SI-NEXT: v_writelane_b32 v56, s4, 27
; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v47, s4, 28
-; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_writelane_b32 v47, s4, 29
+; SI-NEXT: v_writelane_b32 v56, s4, 28
+; SI-NEXT: v_readfirstlane_b32 s4, v11
+; SI-NEXT: v_writelane_b32 v56, s4, 29
; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: v_writelane_b32 v47, s4, 30
+; SI-NEXT: v_writelane_b32 v56, s4, 30
; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: v_writelane_b32 v47, s4, 31
+; SI-NEXT: v_writelane_b32 v56, s4, 31
; SI-NEXT: v_readfirstlane_b32 s4, v7
-; SI-NEXT: v_writelane_b32 v47, s4, 32
-; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: v_readfirstlane_b32 s7, v18
-; SI-NEXT: v_writelane_b32 v47, s4, 33
-; SI-NEXT: v_readfirstlane_b32 s10, v0
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
-; SI-NEXT: v_readfirstlane_b32 s6, v11
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264
-; SI-NEXT: v_readfirstlane_b32 s11, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 32
+; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
+; SI-NEXT: v_readfirstlane_b32 s98, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s12, v4
+; SI-NEXT: v_readfirstlane_b32 s99, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
-; SI-NEXT: v_readfirstlane_b32 s9, v3
+; SI-NEXT: v_writelane_b32 v56, s4, 33
+; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: v_readfirstlane_b32 s14, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:308
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
-; SI-NEXT: v_readfirstlane_b32 s13, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300
-; SI-NEXT: v_readfirstlane_b32 s8, v10
+; SI-NEXT: v_readfirstlane_b32 s96, v13
+; SI-NEXT: v_readfirstlane_b32 s97, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
+; SI-NEXT: v_readfirstlane_b32 s76, v10
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
-; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v56, s4, 34
+; SI-NEXT: v_readfirstlane_b32 s77, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
+; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_readfirstlane_b32 s81, v21
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224
; SI-NEXT: v_readfirstlane_b32 s4, v1
-; SI-NEXT: v_writelane_b32 v47, s4, 34
-; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:248
-; SI-NEXT: v_writelane_b32 v47, s4, 35
-; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_writelane_b32 v47, s4, 36
-; SI-NEXT: v_readfirstlane_b32 s4, v24
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248
+; SI-NEXT: v_writelane_b32 v56, s4, 35
+; SI-NEXT: v_readfirstlane_b32 s4, v0
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s82, v23
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s19, v20
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s80, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:232
+; SI-NEXT: v_readfirstlane_b32 s83, v19
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:224
-; SI-NEXT: v_writelane_b32 v47, s4, 37
-; SI-NEXT: v_readfirstlane_b32 s84, v18
-; SI-NEXT: v_readfirstlane_b32 s95, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208
+; SI-NEXT: v_writelane_b32 v56, s4, 36
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s68, v8
+; SI-NEXT: v_readfirstlane_b32 s21, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
-; SI-NEXT: v_readfirstlane_b32 s44, v6
-; SI-NEXT: v_readfirstlane_b32 s26, v11
+; SI-NEXT: v_readfirstlane_b32 s44, v11
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
+; SI-NEXT: v_readfirstlane_b32 s46, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
+; SI-NEXT: v_readfirstlane_b32 s72, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: v_readfirstlane_b32 s45, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: v_readfirstlane_b32 s74, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v5
+; SI-NEXT: v_readfirstlane_b32 s40, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
-; SI-NEXT: v_readfirstlane_b32 s93, v3
-; SI-NEXT: v_readfirstlane_b32 s28, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
+; SI-NEXT: v_readfirstlane_b32 s69, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
-; SI-NEXT: v_readfirstlane_b32 s29, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 s64, v15
+; SI-NEXT: v_readfirstlane_b32 s47, v15
+; SI-NEXT: v_readfirstlane_b32 s55, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: v_readfirstlane_b32 s22, v16
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: v_writelane_b32 v47, s4, 38
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196
+; SI-NEXT: v_readfirstlane_b32 s57, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
-; SI-NEXT: v_readfirstlane_b32 s24, v9
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160
-; SI-NEXT: v_readfirstlane_b32 s75, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 s99, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
+; SI-NEXT: v_readfirstlane_b32 s16, v12
+; SI-NEXT: v_readfirstlane_b32 s54, v10
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s45, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: v_readfirstlane_b32 s18, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
+; SI-NEXT: v_readfirstlane_b32 s60, v24
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
+; SI-NEXT: v_readfirstlane_b32 s84, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
+; SI-NEXT: v_readfirstlane_b32 s90, v18
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_readfirstlane_b32 s66, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
+; SI-NEXT: v_readfirstlane_b32 s23, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
+; SI-NEXT: v_readfirstlane_b32 s65, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
+; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: v_readfirstlane_b32 s37, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52
; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s81, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44
+; SI-NEXT: v_readfirstlane_b32 s56, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92
+; SI-NEXT: v_readfirstlane_b32 s17, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: v_readfirstlane_b32 s31, v1
+; SI-NEXT: v_readfirstlane_b32 s62, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: v_readfirstlane_b32 s57, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s83, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s86, v29
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
+; SI-NEXT: v_readfirstlane_b32 s94, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s80, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_readfirstlane_b32 s65, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s46, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_writelane_b32 v47, s4, 39
-; SI-NEXT: v_readfirstlane_b32 s67, v20
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v0
-; SI-NEXT: v_writelane_b32 v46, vcc_hi, 0
-; SI-NEXT: v_readfirstlane_b32 s34, v53
-; SI-NEXT: v_readfirstlane_b32 s55, v8
-; SI-NEXT: v_readfirstlane_b32 s90, v33
-; SI-NEXT: v_readfirstlane_b32 s27, v11
-; SI-NEXT: v_readfirstlane_b32 s36, v39
+; SI-NEXT: v_readfirstlane_b32 s88, v8
+; SI-NEXT: v_readfirstlane_b32 s13, v11
+; SI-NEXT: v_readfirstlane_b32 s66, v33
+; SI-NEXT: v_readfirstlane_b32 s78, v7
+; SI-NEXT: v_readfirstlane_b32 s14, v34
+; SI-NEXT: v_readfirstlane_b32 s15, v6
+; SI-NEXT: v_readfirstlane_b32 s93, v39
+; SI-NEXT: v_readfirstlane_b32 s39, v35
+; SI-NEXT: v_readfirstlane_b32 s49, v4
+; SI-NEXT: v_readfirstlane_b32 s51, v37
+; SI-NEXT: v_writelane_b32 v47, s51, 0
+; SI-NEXT: v_writelane_b32 v47, s54, 1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s50, v35
-; SI-NEXT: v_readfirstlane_b32 s49, v5
-; SI-NEXT: v_readfirstlane_b32 s51, v36
-; SI-NEXT: v_readfirstlane_b32 s52, v4
-; SI-NEXT: v_readfirstlane_b32 s54, v37
-; SI-NEXT: v_readfirstlane_b32 s73, v6
-; SI-NEXT: v_readfirstlane_b32 s35, v2
-; SI-NEXT: v_readfirstlane_b32 s37, v48
-; SI-NEXT: v_readfirstlane_b32 s53, v3
-; SI-NEXT: v_readfirstlane_b32 s69, v7
-; SI-NEXT: v_readfirstlane_b32 s72, v34
-; SI-NEXT: v_readfirstlane_b32 s21, v15
-; SI-NEXT: v_readfirstlane_b32 s87, v26
-; SI-NEXT: v_readfirstlane_b32 s70, v38
-; SI-NEXT: v_readfirstlane_b32 s71, v16
-; SI-NEXT: v_readfirstlane_b32 s82, v27
-; SI-NEXT: v_readfirstlane_b32 s4, v32
-; SI-NEXT: v_writelane_b32 v47, s4, 40
-; SI-NEXT: v_writelane_b32 v47, s13, 41
-; SI-NEXT: v_readfirstlane_b32 s79, v13
-; SI-NEXT: v_writelane_b32 v47, s11, 42
-; SI-NEXT: v_writelane_b32 v47, s12, 43
-; SI-NEXT: v_writelane_b32 v47, s6, 44
-; SI-NEXT: v_writelane_b32 v47, s7, 45
-; SI-NEXT: v_writelane_b32 v47, s8, 46
-; SI-NEXT: v_writelane_b32 v47, s9, 47
-; SI-NEXT: v_readfirstlane_b32 s47, v12
-; SI-NEXT: v_writelane_b32 v47, s10, 48
-; SI-NEXT: v_readfirstlane_b32 s56, v28
-; SI-NEXT: v_writelane_b32 v47, s14, 49
-; SI-NEXT: v_readfirstlane_b32 s89, v30
-; SI-NEXT: v_readfirstlane_b32 s91, v10
-; SI-NEXT: v_readfirstlane_b32 s77, v18
-; SI-NEXT: v_readfirstlane_b32 s25, v31
-; SI-NEXT: v_readfirstlane_b32 s98, v9
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v52
-; SI-NEXT: v_readfirstlane_b32 s30, v21
-; SI-NEXT: v_writelane_b32 v46, s30, 1
-; SI-NEXT: v_writelane_b32 v46, s34, 2
-; SI-NEXT: v_writelane_b32 v46, s35, 3
-; SI-NEXT: v_readfirstlane_b32 s60, v54
-; SI-NEXT: v_writelane_b32 v46, s36, 4
-; SI-NEXT: v_readfirstlane_b32 s61, v19
-; SI-NEXT: v_writelane_b32 v46, s60, 5
-; SI-NEXT: v_writelane_b32 v46, s61, 6
-; SI-NEXT: v_readfirstlane_b32 s38, v17
-; SI-NEXT: v_writelane_b32 v46, s37, 7
+; SI-NEXT: v_readfirstlane_b32 s12, v38
+; SI-NEXT: v_writelane_b32 v47, s83, 2
+; SI-NEXT: v_readfirstlane_b32 s52, v9
+; SI-NEXT: v_writelane_b32 v47, s12, 3
+; SI-NEXT: v_writelane_b32 v47, s52, 4
+; SI-NEXT: v_readfirstlane_b32 s67, v32
+; SI-NEXT: v_readfirstlane_b32 s58, v14
+; SI-NEXT: v_readfirstlane_b32 s59, v26
+; SI-NEXT: v_readfirstlane_b32 s61, v27
+; SI-NEXT: v_readfirstlane_b32 s53, v31
+; SI-NEXT: v_writelane_b32 v47, s53, 5
+; SI-NEXT: v_writelane_b32 v47, s55, 6
+; SI-NEXT: v_writelane_b32 v47, s13, 7
+; SI-NEXT: v_writelane_b32 v47, s67, 8
+; SI-NEXT: v_writelane_b32 v47, s88, 9
+; SI-NEXT: v_writelane_b32 v47, s44, 10
+; SI-NEXT: v_writelane_b32 v47, s45, 11
+; SI-NEXT: v_writelane_b32 v47, s46, 12
+; SI-NEXT: v_writelane_b32 v47, s78, 13
+; SI-NEXT: v_writelane_b32 v47, s66, 14
+; SI-NEXT: v_writelane_b32 v47, s47, 15
+; SI-NEXT: v_writelane_b32 v47, s56, 16
+; SI-NEXT: v_writelane_b32 v47, s57, 17
+; SI-NEXT: v_writelane_b32 v47, s14, 18
+; SI-NEXT: v_writelane_b32 v47, s58, 19
+; SI-NEXT: v_writelane_b32 v47, s59, 20
+; SI-NEXT: v_writelane_b32 v47, s17, 21
+; SI-NEXT: v_writelane_b32 v47, s60, 22
+; SI-NEXT: v_writelane_b32 v47, s15, 23
+; SI-NEXT: v_writelane_b32 v47, s61, 24
+; SI-NEXT: v_readfirstlane_b32 s63, v12
+; SI-NEXT: v_writelane_b32 v47, s62, 25
+; SI-NEXT: v_writelane_b32 v47, s63, 26
+; SI-NEXT: v_writelane_b32 v47, s16, 27
+; SI-NEXT: v_readfirstlane_b32 s92, v2
+; SI-NEXT: v_writelane_b32 v47, vcc_lo, 28
+; SI-NEXT: v_writelane_b32 v47, s72, 29
+; SI-NEXT: v_writelane_b32 v47, s73, 30
+; SI-NEXT: v_writelane_b32 v47, s23, 31
+; SI-NEXT: v_readfirstlane_b32 s74, v13
+; SI-NEXT: v_readfirstlane_b32 s95, v48
+; SI-NEXT: v_writelane_b32 v47, s18, 32
+; SI-NEXT: v_readfirstlane_b32 s64, v28
+; SI-NEXT: v_writelane_b32 v47, s74, 33
+; SI-NEXT: v_writelane_b32 v47, s64, 34
+; SI-NEXT: v_readfirstlane_b32 s41, v30
+; SI-NEXT: v_readfirstlane_b32 s19, v41
+; SI-NEXT: v_writelane_b32 v56, s19, 37
+; SI-NEXT: v_readfirstlane_b32 s43, v51
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_writelane_b32 v56, s42, 38
+; SI-NEXT: v_writelane_b32 v56, s43, 39
+; SI-NEXT: v_readfirstlane_b32 s6, v42
+; SI-NEXT: v_readfirstlane_b32 s7, v23
+; SI-NEXT: v_writelane_b32 v56, s6, 40
+; SI-NEXT: v_readfirstlane_b32 s75, v52
+; SI-NEXT: v_writelane_b32 v56, s7, 41
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s39, v1
-; SI-NEXT: v_writelane_b32 v46, s38, 8
-; SI-NEXT: v_readfirstlane_b32 s48, v49
-; SI-NEXT: v_writelane_b32 v46, s39, 9
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s62, v50
-; SI-NEXT: v_writelane_b32 v46, s48, 10
-; SI-NEXT: v_writelane_b32 v46, s62, 11
-; SI-NEXT: v_writelane_b32 v46, s49, 12
+; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_writelane_b32 v56, s75, 42
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s63, v14
-; SI-NEXT: v_writelane_b32 v46, s50, 13
-; SI-NEXT: v_writelane_b32 v46, s63, 14
-; SI-NEXT: v_writelane_b32 v46, s51, 15
-; SI-NEXT: v_writelane_b32 v46, s52, 16
-; SI-NEXT: v_writelane_b32 v46, s53, 17
-; SI-NEXT: v_writelane_b32 v46, s54, 18
-; SI-NEXT: v_writelane_b32 v46, s55, 19
-; SI-NEXT: v_writelane_b32 v46, s64, 20
-; SI-NEXT: v_writelane_b32 v46, s81, 21
-; SI-NEXT: v_writelane_b32 v46, s72, 22
-; SI-NEXT: v_writelane_b32 v46, s71, 23
-; SI-NEXT: v_writelane_b32 v46, s87, 24
-; SI-NEXT: v_writelane_b32 v46, s80, 25
-; SI-NEXT: v_writelane_b32 v46, s73, 26
-; SI-NEXT: v_writelane_b32 v46, s82, 27
-; SI-NEXT: v_writelane_b32 v46, s79, 28
-; SI-NEXT: v_writelane_b32 v46, s75, 29
-; SI-NEXT: v_writelane_b32 v46, s65, 30
-; SI-NEXT: v_writelane_b32 v46, s44, 31
-; SI-NEXT: v_writelane_b32 v46, s45, 32
-; SI-NEXT: v_writelane_b32 v46, s46, 33
+; SI-NEXT: v_readfirstlane_b32 s89, v22
+; SI-NEXT: v_writelane_b32 v56, s79, 43
+; SI-NEXT: v_readfirstlane_b32 s91, v53
+; SI-NEXT: v_writelane_b32 v56, s89, 44
+; SI-NEXT: v_writelane_b32 v56, s91, 45
+; SI-NEXT: v_writelane_b32 v56, s92, 46
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_readfirstlane_b32 s8, v54
+; SI-NEXT: v_writelane_b32 v56, s93, 47
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_readfirstlane_b32 s9, v20
+; SI-NEXT: v_writelane_b32 v56, s8, 48
+; SI-NEXT: v_writelane_b32 v56, s9, 49
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s16, v29
-; SI-NEXT: v_writelane_b32 v46, s47, 34
-; SI-NEXT: v_readfirstlane_b32 s17, v43
-; SI-NEXT: v_writelane_b32 v47, s16, 50
-; SI-NEXT: v_writelane_b32 v46, s56, 35
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_readfirstlane_b32 s15, v44
-; SI-NEXT: v_writelane_b32 v47, s17, 51
-; SI-NEXT: v_writelane_b32 v46, s74, 36
+; SI-NEXT: v_readfirstlane_b32 s31, v16
+; SI-NEXT: v_writelane_b32 v56, s95, 50
+; SI-NEXT: v_writelane_b32 v56, s31, 51
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s18, v23
-; SI-NEXT: v_writelane_b32 v47, s15, 52
-; SI-NEXT: v_writelane_b32 v46, s89, 37
-; SI-NEXT: v_readfirstlane_b32 s23, v55
-; SI-NEXT: v_writelane_b32 v47, s18, 53
-; SI-NEXT: v_writelane_b32 v46, s57, 38
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_writelane_b32 v56, s80, 52
+; SI-NEXT: v_writelane_b32 v47, s40, 35
+; SI-NEXT: v_readfirstlane_b32 s36, v49
+; SI-NEXT: v_writelane_b32 v56, s34, 53
+; SI-NEXT: v_writelane_b32 v47, s41, 36
+; SI-NEXT: v_readfirstlane_b32 s68, v10
+; SI-NEXT: v_writelane_b32 v56, s36, 54
+; SI-NEXT: v_writelane_b32 v47, s84, 37
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s40, v40
-; SI-NEXT: v_writelane_b32 v47, s23, 54
-; SI-NEXT: v_writelane_b32 v46, s91, 39
+; SI-NEXT: v_readfirstlane_b32 s10, v50
+; SI-NEXT: v_writelane_b32 v56, s81, 55
+; SI-NEXT: v_writelane_b32 v47, s68, 38
+; SI-NEXT: v_readfirstlane_b32 s38, v5
+; SI-NEXT: v_writelane_b32 v56, s10, 56
+; SI-NEXT: v_writelane_b32 v47, s65, 39
+; SI-NEXT: v_writelane_b32 v56, s38, 57
+; SI-NEXT: v_writelane_b32 v47, s90, 40
+; SI-NEXT: v_readfirstlane_b32 s11, v17
+; SI-NEXT: v_writelane_b32 v56, s39, 58
+; SI-NEXT: v_writelane_b32 v47, s69, 41
+; SI-NEXT: v_readfirstlane_b32 s48, v36
+; SI-NEXT: v_writelane_b32 v56, s11, 59
+; SI-NEXT: v_writelane_b32 v47, s94, 42
+; SI-NEXT: v_writelane_b32 v56, s48, 60
+; SI-NEXT: v_writelane_b32 v47, s70, 43
+; SI-NEXT: v_readfirstlane_b32 s35, v19
+; SI-NEXT: v_writelane_b32 v56, s49, 61
+; SI-NEXT: v_writelane_b32 v47, s37, 44
+; SI-NEXT: v_readfirstlane_b32 s71, v15
+; SI-NEXT: v_readfirstlane_b32 s50, v3
+; SI-NEXT: v_readfirstlane_b32 s22, v55
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s41, v22
-; SI-NEXT: v_writelane_b32 v47, s40, 55
-; SI-NEXT: v_writelane_b32 v46, s83, 40
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s42, v25
-; SI-NEXT: v_writelane_b32 v47, s41, 56
-; SI-NEXT: v_writelane_b32 v46, s84, 41
-; SI-NEXT: v_readfirstlane_b32 s43, v41
-; SI-NEXT: v_writelane_b32 v47, s42, 57
-; SI-NEXT: v_writelane_b32 v46, s93, 42
-; SI-NEXT: v_writelane_b32 v47, s43, 58
-; SI-NEXT: v_writelane_b32 v46, s86, 43
-; SI-NEXT: v_readfirstlane_b32 s78, v51
-; SI-NEXT: v_writelane_b32 v47, s77, 59
-; SI-NEXT: v_writelane_b32 v46, s95, 44
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s58, v42
-; SI-NEXT: v_writelane_b32 v47, s78, 60
-; SI-NEXT: v_writelane_b32 v46, s66, 45
-; SI-NEXT: v_readfirstlane_b32 s59, v24
-; SI-NEXT: v_writelane_b32 v47, s58, 61
-; SI-NEXT: v_writelane_b32 v46, s67, 46
-; SI-NEXT: v_writelane_b32 v47, s59, 62
-; SI-NEXT: v_writelane_b32 v46, s21, 47
-; SI-NEXT: v_writelane_b32 v47, vcc_lo, 63
-; SI-NEXT: v_writelane_b32 v46, s31, 48
+; SI-NEXT: v_readfirstlane_b32 s85, v24
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_readfirstlane_b32 s25, v40
+; SI-NEXT: v_readfirstlane_b32 s28, v21
+; SI-NEXT: v_readfirstlane_b32 s87, v25
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v43
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s26, v29
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s27, v44
+; SI-NEXT: v_writelane_b32 v56, s82, 62
+; SI-NEXT: v_writelane_b32 v47, s35, 45
+; SI-NEXT: v_writelane_b32 v56, s50, 63
+; SI-NEXT: v_writelane_b32 v47, s71, 46
; SI-NEXT: s_cbranch_scc0 .LBB93_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readlane_b32 s4, v47, 13
-; SI-NEXT: v_readlane_b32 s5, v47, 12
+; SI-NEXT: v_readlane_b32 s4, v56, 11
+; SI-NEXT: v_readlane_b32 s5, v56, 10
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s20, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 5
-; SI-NEXT: v_readlane_b32 s5, v47, 4
-; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: v_writelane_b32 v47, s21, 47
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 4
+; SI-NEXT: v_writelane_b32 v47, s4, 48
+; SI-NEXT: s_and_b32 s4, s24, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s88, s4, s5
-; SI-NEXT: s_and_b32 s4, s14, 0xff
-; SI-NEXT: s_lshl_b32 s5, s9, 8
-; SI-NEXT: s_or_b32 s94, s4, s5
-; SI-NEXT: s_and_b32 s4, s8, 0xff
-; SI-NEXT: s_lshl_b32 s5, s6, 8
-; SI-NEXT: s_or_b32 s85, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s5, s92, 8
-; SI-NEXT: s_or_b32 s96, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 18
-; SI-NEXT: v_readlane_b32 s5, v47, 17
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 34
+; SI-NEXT: v_writelane_b32 v47, s4, 49
+; SI-NEXT: s_and_b32 s4, s77, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 29
+; SI-NEXT: v_writelane_b32 v47, s4, 50
+; SI-NEXT: s_and_b32 s4, s76, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 51
+; SI-NEXT: v_readlane_b32 s4, v56, 24
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 23
+; SI-NEXT: s_lshl_b32 s4, s4, 8
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: v_writelane_b32 v47, s4, 52
+; SI-NEXT: v_readlane_b32 s4, v56, 16
+; SI-NEXT: v_readlane_b32 s5, v56, 15
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: v_writelane_b32 v46, s22, 49
-; SI-NEXT: s_or_b32 s22, s4, s5
-; SI-NEXT: s_and_b32 s4, s59, 0xff
-; SI-NEXT: s_lshl_b32 s5, s58, 8
-; SI-NEXT: s_or_b32 s58, s4, s5
-; SI-NEXT: s_and_b32 s4, s61, 0xff
-; SI-NEXT: s_lshl_b32 s5, s60, 8
-; SI-NEXT: s_or_b32 s59, s4, s5
-; SI-NEXT: s_and_b32 s4, s63, 0xff
-; SI-NEXT: s_lshl_b32 s5, s62, 8
-; SI-NEXT: s_or_b32 s60, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xff
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 53
+; SI-NEXT: s_and_b32 s4, s7, 0xff
+; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 54
+; SI-NEXT: s_and_b32 s4, s9, 0xff
+; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 55
+; SI-NEXT: s_and_b32 s4, s11, 0xff
+; SI-NEXT: s_lshl_b32 s5, s10, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 56
+; SI-NEXT: s_and_b32 s4, s13, 0xff
+; SI-NEXT: s_lshl_b32 s5, s12, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 57
+; SI-NEXT: s_and_b32 s4, s15, 0xff
+; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: s_and_b32 s4, s68, 0xff
+; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 59
+; SI-NEXT: s_and_b32 s4, s71, 0xff
+; SI-NEXT: s_lshl_b32 s5, s35, 8
+; SI-NEXT: s_or_b32 s71, s4, s5
+; SI-NEXT: s_and_b32 s4, s37, 0xff
; SI-NEXT: s_lshl_b32 s5, s70, 8
-; SI-NEXT: s_or_b32 s61, s4, s5
-; SI-NEXT: s_and_b32 s4, s73, 0xff
-; SI-NEXT: s_lshl_b32 s5, s72, 8
-; SI-NEXT: s_or_b32 s62, s4, s5
-; SI-NEXT: s_and_b32 s4, s91, 0xff
-; SI-NEXT: s_lshl_b32 s5, s89, 8
-; SI-NEXT: s_or_b32 s63, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xff
-; SI-NEXT: s_lshl_b32 s5, s67, 8
-; SI-NEXT: s_or_b32 s72, s4, s5
-; SI-NEXT: s_and_b32 s4, s66, 0xff
-; SI-NEXT: s_lshl_b32 s5, s95, 8
-; SI-NEXT: s_or_b32 s73, s4, s5
-; SI-NEXT: s_and_b32 s4, s93, 0xff
-; SI-NEXT: s_lshl_b32 s5, s74, 8
-; SI-NEXT: s_or_b32 s74, s4, s5
-; SI-NEXT: s_and_b32 s4, s99, 0xff
-; SI-NEXT: s_lshl_b32 s5, s75, 8
-; SI-NEXT: s_or_b32 s75, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 9
-; SI-NEXT: v_readlane_b32 s5, v47, 8
-; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_or_b32 s70, s4, s5
+; SI-NEXT: s_and_b32 s4, s69, 0xff
+; SI-NEXT: s_lshl_b32 s5, s40, 8
+; SI-NEXT: s_or_b32 s69, s4, s5
+; SI-NEXT: s_and_b32 s4, s18, 0xff
+; SI-NEXT: s_lshl_b32 s5, s16, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 7
+; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: s_and_b32 s4, s20, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s5, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 7
+; SI-NEXT: v_readlane_b32 s4, v56, 6
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 6
+; SI-NEXT: v_readlane_b32 s6, v56, 5
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_or_b32 s7, s6, s4
-; SI-NEXT: v_readlane_b32 s4, v47, 11
+; SI-NEXT: v_readlane_b32 s4, v56, 9
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 10
+; SI-NEXT: v_readlane_b32 s6, v56, 8
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: v_writelane_b32 v46, s7, 50
+; SI-NEXT: v_writelane_b32 v47, s7, 61
; SI-NEXT: s_or_b32 s4, s6, s4
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: v_readlane_b32 s6, v47, 1
-; SI-NEXT: v_readlane_b32 s7, v47, 0
+; SI-NEXT: v_readlane_b32 s6, v56, 1
+; SI-NEXT: v_readlane_b32 s7, v56, 0
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s7, s6, s7
-; SI-NEXT: s_and_b32 s6, s10, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 34
+; SI-NEXT: v_readlane_b32 s6, v56, 36
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 35
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_or_b32 s9, s8, s6
-; SI-NEXT: v_readlane_b32 s6, v47, 3
+; SI-NEXT: v_readlane_b32 s6, v56, 3
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 2
+; SI-NEXT: v_readlane_b32 s8, v56, 2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: v_writelane_b32 v46, s9, 51
+; SI-NEXT: v_writelane_b32 v47, s9, 62
; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_readlane_b32 s8, v47, 33
-; SI-NEXT: v_readlane_b32 s9, v47, 32
+; SI-NEXT: v_readlane_b32 s8, v56, 33
+; SI-NEXT: v_readlane_b32 s9, v56, 32
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s9, s8, s9
-; SI-NEXT: v_readlane_b32 s8, v47, 31
+; SI-NEXT: v_readlane_b32 s8, v56, 31
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v47, 30
+; SI-NEXT: v_readlane_b32 s10, v56, 30
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s10, s10, 24
-; SI-NEXT: s_or_b32 s14, s10, s8
-; SI-NEXT: s_and_b32 s8, s12, 0xff
+; SI-NEXT: s_or_b32 s11, s10, s8
+; SI-NEXT: s_and_b32 s8, s99, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s11, 24
+; SI-NEXT: s_lshl_b32 s10, s98, 24
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s11, 63
; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: v_readlane_b32 s10, v47, 28
-; SI-NEXT: v_readlane_b32 s11, v47, 27
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: v_readlane_b32 s10, v56, 28
+; SI-NEXT: v_readlane_b32 s11, v56, 27
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_or_b32 s11, s10, s11
-; SI-NEXT: v_readlane_b32 s10, v47, 26
+; SI-NEXT: v_readlane_b32 s10, v56, 26
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v47, 25
+; SI-NEXT: v_readlane_b32 s12, v56, 25
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: s_or_b32 s91, s12, s10
-; SI-NEXT: s_and_b32 s10, s13, 0xff
-; SI-NEXT: v_readlane_b32 s12, v47, 29
+; SI-NEXT: s_or_b32 s13, s12, s10
+; SI-NEXT: s_and_b32 s10, s97, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_lshl_b32 s12, s96, 24
+; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_or_b32 s10, s12, s10
-; SI-NEXT: v_readlane_b32 s12, v47, 22
-; SI-NEXT: v_readlane_b32 s13, v47, 21
-; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 8
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_or_b32 s13, s12, s13
-; SI-NEXT: v_readlane_b32 s12, v47, 20
-; SI-NEXT: v_writelane_b32 v46, s14, 52
-; SI-NEXT: s_or_b32 s9, s9, s14
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: v_readlane_b32 s12, v56, 20
+; SI-NEXT: v_writelane_b32 v46, s13, 0
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s12, 0xff
+; SI-NEXT: v_readlane_b32 s12, v56, 19
+; SI-NEXT: s_lshl_b32 s12, s12, 8
+; SI-NEXT: s_or_b32 s13, s13, s12
+; SI-NEXT: v_readlane_b32 s12, v56, 18
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v47, 19
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: s_or_b32 s93, s14, s12
-; SI-NEXT: v_readlane_b32 s12, v47, 24
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v56, 17
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s86, s12, s14
+; SI-NEXT: v_readlane_b32 s12, v56, 22
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v47, 23
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: s_or_b32 s12, s14, s12
-; SI-NEXT: v_readlane_b32 s14, v47, 14
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v56, 21
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s12, s12, s14
+; SI-NEXT: v_readlane_b32 s14, v56, 12
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_lshl_b32 s15, s27, 8
; SI-NEXT: s_or_b32 s15, s14, s15
-; SI-NEXT: s_and_b32 s14, s16, 0xff
+; SI-NEXT: s_and_b32 s14, s26, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_mov_b32 s67, s29
-; SI-NEXT: s_mov_b32 s29, s28
-; SI-NEXT: s_mov_b32 s28, s26
-; SI-NEXT: s_mov_b32 s26, s68
-; SI-NEXT: s_mov_b32 s68, s24
-; SI-NEXT: s_mov_b32 s24, s25
-; SI-NEXT: s_lshl_b32 s25, s17, 24
-; SI-NEXT: s_or_b32 s17, s25, s14
-; SI-NEXT: v_readlane_b32 s14, v47, 16
-; SI-NEXT: v_writelane_b32 v46, s90, 53
+; SI-NEXT: s_lshl_b32 s16, vcc_hi, 24
+; SI-NEXT: s_or_b32 s29, s16, s14
+; SI-NEXT: v_readlane_b32 s14, v56, 14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 15
-; SI-NEXT: v_writelane_b32 v46, s69, 54
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s25, s16, 24
-; SI-NEXT: s_or_b32 s14, s25, s14
-; SI-NEXT: s_and_b32 s25, s41, 0xff
-; SI-NEXT: v_writelane_b32 v46, s27, 55
-; SI-NEXT: s_lshl_b32 s27, s40, 8
-; SI-NEXT: s_or_b32 s25, s25, s27
-; SI-NEXT: s_and_b32 s27, s18, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s18, s23, 24
-; SI-NEXT: s_or_b32 s18, s18, s27
-; SI-NEXT: s_and_b32 s27, s42, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s40, s43, 24
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_or_b32 s40, s40, s27
-; SI-NEXT: s_or_b32 s41, s25, s18
-; SI-NEXT: s_and_b32 s25, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s27, vcc_lo, 8
-; SI-NEXT: s_or_b32 s27, s25, s27
-; SI-NEXT: s_and_b32 s25, s77, 0xff
+; SI-NEXT: s_lshl_b32 s16, s14, 16
+; SI-NEXT: v_readlane_b32 s14, v56, 13
+; SI-NEXT: s_lshl_b32 s14, s14, 24
+; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_and_b32 s16, s28, 0xff
+; SI-NEXT: s_lshl_b32 s18, s25, 8
+; SI-NEXT: s_or_b32 s18, s16, s18
+; SI-NEXT: s_and_b32 s16, s85, 0xff
+; SI-NEXT: v_writelane_b32 v46, s20, 1
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s20, s22, 24
+; SI-NEXT: v_writelane_b32 v46, vcc_hi, 2
+; SI-NEXT: v_writelane_b32 v46, s28, 3
+; SI-NEXT: s_or_b32 s28, s20, s16
+; SI-NEXT: s_and_b32 s20, s87, 0xff
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v46, s24, 4
+; SI-NEXT: s_lshl_b32 s24, s19, 24
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s40, s24, s20
+; SI-NEXT: s_or_b32 s41, s18, s28
+; SI-NEXT: s_and_b32 s18, s79, 0xff
+; SI-NEXT: s_lshl_b32 s20, s75, 8
+; SI-NEXT: s_or_b32 s20, s18, s20
+; SI-NEXT: s_and_b32 s18, s42, 0xff
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s24, s43, 24
+; SI-NEXT: s_or_b32 s19, s24, s18
+; SI-NEXT: s_and_b32 s24, s89, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: v_writelane_b32 v46, s25, 5
+; SI-NEXT: s_lshl_b32 s25, s91, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s42, s25, s24
+; SI-NEXT: s_or_b32 s43, s20, s19
+; SI-NEXT: s_and_b32 s20, s31, 0xff
+; SI-NEXT: s_lshl_b32 s24, s95, 8
+; SI-NEXT: s_or_b32 s20, s20, s24
+; SI-NEXT: s_and_b32 s24, s92, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s25, s93, 24
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_and_b32 s25, s34, 0xff
+; SI-NEXT: s_mov_b32 s21, s26
; SI-NEXT: s_lshl_b32 s25, s25, 16
-; SI-NEXT: s_lshl_b32 s42, s78, 24
-; SI-NEXT: s_or_b32 s66, s42, s25
-; SI-NEXT: s_and_b32 s42, s30, 0xff
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_lshl_b32 s43, s34, 24
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_or_b32 s42, s43, s42
-; SI-NEXT: s_or_b32 s43, s27, s66
-; SI-NEXT: s_and_b32 s27, s38, 0xff
-; SI-NEXT: s_lshl_b32 s76, s37, 8
-; SI-NEXT: s_or_b32 s76, s27, s76
-; SI-NEXT: s_and_b32 s27, s35, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s77, s36, 24
-; SI-NEXT: s_or_b32 s90, s77, s27
-; SI-NEXT: s_and_b32 s77, s39, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s48, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s34, s78, s77
-; SI-NEXT: s_or_b32 s35, s76, s90
-; SI-NEXT: s_and_b32 s76, s52, 0xff
-; SI-NEXT: s_lshl_b32 s77, s51, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s49, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s50, 24
-; SI-NEXT: s_or_b32 s69, s78, s77
-; SI-NEXT: s_and_b32 s77, s53, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s54, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s36, s78, s77
-; SI-NEXT: s_or_b32 s37, s76, s69
-; SI-NEXT: s_and_b32 s76, s55, 0xff
-; SI-NEXT: s_lshl_b32 s77, s98, 8
-; SI-NEXT: v_readlane_b32 s16, v47, 40
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_writelane_b32 v46, s70, 56
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s24, 24
-; SI-NEXT: v_readlane_b32 s16, v46, 54
-; SI-NEXT: s_or_b32 s70, s78, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v46, 53
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s38, s78, s77
-; SI-NEXT: s_or_b32 s39, s76, s70
-; SI-NEXT: s_and_b32 s76, s79, 0xff
-; SI-NEXT: s_lshl_b32 s77, s82, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s71, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s87, 24
-; SI-NEXT: s_or_b32 s71, s78, s77
-; SI-NEXT: s_and_b32 s77, s47, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_lshl_b32 s26, s36, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s34, s26, s25
+; SI-NEXT: s_or_b32 s35, s20, s24
+; SI-NEXT: s_and_b32 s20, s49, 0xff
+; SI-NEXT: s_lshl_b32 s25, s48, 8
+; SI-NEXT: s_or_b32 s20, s20, s25
+; SI-NEXT: s_and_b32 s25, s38, 0xff
+; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_lshl_b32 s26, s39, 24
+; SI-NEXT: v_writelane_b32 v46, s27, 6
+; SI-NEXT: s_or_b32 s27, s26, s25
+; SI-NEXT: s_and_b32 s26, s50, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s16, s51, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s36, s16, s26
+; SI-NEXT: s_or_b32 s37, s20, s27
+; SI-NEXT: s_and_b32 s20, s88, 0xff
+; SI-NEXT: s_lshl_b32 s26, s67, 8
+; SI-NEXT: s_or_b32 s20, s20, s26
+; SI-NEXT: s_and_b32 s26, s52, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s16, s53, 24
+; SI-NEXT: s_or_b32 s18, s16, s26
+; SI-NEXT: s_and_b32 s26, s78, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s75, s66, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s38, s75, s26
+; SI-NEXT: s_or_b32 s39, s20, s18
+; SI-NEXT: s_and_b32 s20, s63, 0xff
+; SI-NEXT: s_lshl_b32 s26, s61, 8
+; SI-NEXT: s_or_b32 s20, s20, s26
+; SI-NEXT: s_and_b32 s26, s58, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s75, s59, 24
+; SI-NEXT: s_or_b32 s26, s75, s26
+; SI-NEXT: s_and_b32 s75, s74, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s64, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s48, s78, s75
+; SI-NEXT: s_or_b32 s49, s20, s26
+; SI-NEXT: s_and_b32 s20, s23, 0xff
+; SI-NEXT: s_lshl_b32 s75, vcc_lo, 8
+; SI-NEXT: s_or_b32 s75, s20, s75
+; SI-NEXT: s_and_b32 s20, s60, 0xff
+; SI-NEXT: s_lshl_b32 s20, s20, 16
; SI-NEXT: s_lshl_b32 s78, s56, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s48, s78, s77
-; SI-NEXT: s_or_b32 s49, s76, s71
-; SI-NEXT: s_and_b32 s76, s46, 0xff
-; SI-NEXT: s_lshl_b32 s77, s65, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s80, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s81, 24
-; SI-NEXT: s_or_b32 vcc_hi, s78, s77
-; SI-NEXT: s_and_b32 s77, s86, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s83, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s16, v47, 39
-; SI-NEXT: s_or_b32 s50, s78, s77
-; SI-NEXT: s_or_b32 s51, s76, vcc_hi
-; SI-NEXT: s_and_b32 s76, s31, 0xff
-; SI-NEXT: s_lshl_b32 s77, s16, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s29, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s28, 24
-; SI-NEXT: s_or_b32 s31, s78, s77
-; SI-NEXT: s_and_b32 s77, s84, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s57, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s52, s78, s77
-; SI-NEXT: s_or_b32 s53, s76, s31
-; SI-NEXT: s_and_b32 s76, s67, 0xff
-; SI-NEXT: s_lshl_b32 s77, s26, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s68, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 38
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: s_or_b32 s82, s78, s77
-; SI-NEXT: s_and_b32 s77, s45, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s44, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s16, v47, 37
-; SI-NEXT: s_or_b32 s54, s78, s77
-; SI-NEXT: s_or_b32 s55, s76, s82
-; SI-NEXT: s_and_b32 s76, s19, 0xff
-; SI-NEXT: s_lshl_b32 s77, s16, 8
-; SI-NEXT: v_readlane_b32 s16, v47, 36
+; SI-NEXT: s_or_b32 s20, s78, s20
+; SI-NEXT: s_and_b32 s78, s94, 0xff
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s79, s65, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: s_or_b32 s50, s79, s78
+; SI-NEXT: s_or_b32 s51, s75, s20
+; SI-NEXT: s_and_b32 s75, s62, 0xff
+; SI-NEXT: s_lshl_b32 s78, s17, 8
+; SI-NEXT: s_or_b32 s75, s75, s78
+; SI-NEXT: s_and_b32 s78, s45, 0xff
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s79, s44, 24
+; SI-NEXT: s_or_b32 s78, s79, s78
+; SI-NEXT: s_and_b32 s79, s90, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s88, s84, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 47
+; SI-NEXT: s_or_b32 s52, s88, s79
+; SI-NEXT: s_or_b32 s53, s75, s78
+; SI-NEXT: s_and_b32 s75, s46, 0xff
+; SI-NEXT: s_lshl_b32 s79, s16, 8
+; SI-NEXT: s_or_b32 s75, s75, s79
+; SI-NEXT: s_and_b32 s79, s55, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s88, s54, 24
+; SI-NEXT: s_or_b32 s88, s88, s79
+; SI-NEXT: s_and_b32 s79, s73, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s89, s72, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 48
+; SI-NEXT: s_or_b32 s54, s89, s79
+; SI-NEXT: s_or_b32 s55, s75, s88
+; SI-NEXT: s_and_b32 s75, s83, 0xff
+; SI-NEXT: s_lshl_b32 s79, s82, 8
+; SI-NEXT: s_and_b32 s44, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 49
+; SI-NEXT: s_or_b32 s75, s75, s79
+; SI-NEXT: s_and_b32 s79, s81, 0xff
+; SI-NEXT: s_and_b32 s45, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 50
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s89, s80, 24
+; SI-NEXT: s_and_b32 s46, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 51
+; SI-NEXT: s_or_b32 s90, s89, s79
+; SI-NEXT: s_lshl_b32 s89, s47, 24
+; SI-NEXT: s_and_b32 s47, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 52
+; SI-NEXT: s_and_b32 s79, s57, 0xff
+; SI-NEXT: s_and_b32 s56, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 53
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_and_b32 s57, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 54
+; SI-NEXT: s_or_b32 s64, s89, s79
+; SI-NEXT: s_and_b32 s79, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 55
+; SI-NEXT: s_and_b32 s89, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 56
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 57
+; SI-NEXT: s_and_b32 s91, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 58
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_and_b32 s92, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 59
+; SI-NEXT: s_or_b32 s13, s13, s86
+; SI-NEXT: s_and_b32 s93, s16, 0xffff
+; SI-NEXT: s_mov_b32 s16, s85
+; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 16
+; SI-NEXT: s_and_b32 s94, s71, 0xffff
+; SI-NEXT: s_and_b32 s95, s70, 0xffff
+; SI-NEXT: s_or_b32 s58, s56, s12
+; SI-NEXT: s_mov_b32 s59, s13
+; SI-NEXT: s_lshr_b64 s[70:71], s[12:13], 16
+; SI-NEXT: s_or_b32 s12, s93, s48
+; SI-NEXT: s_mov_b32 s13, s49
+; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
+; SI-NEXT: s_mov_b32 s85, s16
+; SI-NEXT: v_readlane_b32 s16, v47, 61
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 35
-; SI-NEXT: s_or_b32 s15, s15, s17
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: v_readlane_b32 s16, v46, 49
-; SI-NEXT: s_and_b32 s44, s20, 0xffff
-; SI-NEXT: s_mov_b32 s25, s99
-; SI-NEXT: s_or_b32 s87, s78, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: s_and_b32 s57, s22, 0xffff
-; SI-NEXT: s_and_b32 s22, s74, 0xffff
-; SI-NEXT: s_and_b32 s99, s75, 0xffff
+; SI-NEXT: s_mov_b32 s25, s22
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s22, v47, 60
+; SI-NEXT: s_or_b32 s60, s47, s10
+; SI-NEXT: s_mov_b32 s61, s11
+; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16
+; SI-NEXT: s_or_b32 s10, s94, s50
+; SI-NEXT: s_mov_b32 s11, s51
+; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
+; SI-NEXT: s_lshr_b32 s49, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v47, 62
+; SI-NEXT: s_or_b32 s15, s15, s29
+; SI-NEXT: s_mov_b32 s23, s21
+; SI-NEXT: s_or_b32 s65, s75, s90
+; SI-NEXT: s_and_b32 s21, s69, 0xffff
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s62, s46, s8
+; SI-NEXT: s_mov_b32 s63, s9
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
+; SI-NEXT: s_or_b32 s8, s95, s52
+; SI-NEXT: s_mov_b32 s9, s53
+; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
+; SI-NEXT: s_lshr_b32 s51, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v47, 63
; SI-NEXT: s_or_b32 s74, s44, s4
; SI-NEXT: s_mov_b32 s75, s5
-; SI-NEXT: s_lshr_b64 s[20:21], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 16
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s64, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s5, v46, 50
-; SI-NEXT: s_or_b32 s11, s11, s91
-; SI-NEXT: s_or_b32 s13, s13, s93
-; SI-NEXT: s_mov_b32 s27, s98
-; SI-NEXT: s_or_b32 s64, s78, s77
-; SI-NEXT: s_or_b32 s65, s76, s87
-; SI-NEXT: s_and_b32 s45, s88, 0xffff
-; SI-NEXT: s_and_b32 s46, s94, 0xffff
-; SI-NEXT: s_and_b32 s47, s85, 0xffff
-; SI-NEXT: s_and_b32 s56, s96, 0xffff
-; SI-NEXT: s_and_b32 vcc_lo, s58, 0xffff
-; SI-NEXT: s_and_b32 s30, s59, 0xffff
-; SI-NEXT: s_and_b32 s96, s60, 0xffff
-; SI-NEXT: s_and_b32 s83, s61, 0xffff
-; SI-NEXT: s_and_b32 s16, s62, 0xffff
-; SI-NEXT: s_and_b32 s86, s63, 0xffff
-; SI-NEXT: s_and_b32 s97, s72, 0xffff
-; SI-NEXT: s_and_b32 s98, s73, 0xffff
-; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
-; SI-NEXT: s_lshr_b32 s23, s5, 16
-; SI-NEXT: v_readlane_b32 s5, v46, 51
+; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 16
; SI-NEXT: s_or_b32 s72, s45, s6
; SI-NEXT: s_mov_b32 s73, s7
-; SI-NEXT: s_or_b32 s62, s46, s8
-; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
-; SI-NEXT: s_or_b32 s60, s47, s10
-; SI-NEXT: s_mov_b32 s61, s11
-; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16
-; SI-NEXT: s_or_b32 s58, s56, s12
-; SI-NEXT: s_mov_b32 s59, s13
-; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16
; SI-NEXT: s_or_b32 s56, s57, s14
; SI-NEXT: s_mov_b32 s57, s15
-; SI-NEXT: s_or_b32 s46, vcc_lo, s40
-; SI-NEXT: s_mov_b32 s47, s41
-; SI-NEXT: s_lshr_b64 s[6:7], s[40:41], 16
-; SI-NEXT: s_or_b32 s44, s30, s42
+; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 16
+; SI-NEXT: s_or_b32 s44, s89, s42
; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_lshr_b64 s[88:89], s[42:43], 16
-; SI-NEXT: s_or_b32 s42, s96, s34
+; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 16
+; SI-NEXT: s_or_b32 s42, s17, s34
; SI-NEXT: s_mov_b32 s43, s35
-; SI-NEXT: s_lshr_b64 s[84:85], s[34:35], 16
-; SI-NEXT: s_or_b32 s40, s83, s36
-; SI-NEXT: s_mov_b32 s41, s37
-; SI-NEXT: s_lshr_b64 s[8:9], s[36:37], 16
-; SI-NEXT: s_or_b32 s14, s16, s38
+; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
+; SI-NEXT: s_or_b32 s14, s92, s38
; SI-NEXT: s_mov_b32 s15, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16
-; SI-NEXT: s_or_b32 s12, s86, s48
-; SI-NEXT: s_mov_b32 s13, s49
-; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
-; SI-NEXT: s_or_b32 s94, s97, s50
-; SI-NEXT: s_mov_b32 s95, s51
-; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
-; SI-NEXT: s_or_b32 s36, s98, s52
-; SI-NEXT: s_mov_b32 s37, s53
-; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
-; SI-NEXT: s_or_b32 s34, s22, s54
-; SI-NEXT: s_mov_b32 s35, s55
+; SI-NEXT: s_or_b32 s6, s21, s54
+; SI-NEXT: s_mov_b32 s7, s55
; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
-; SI-NEXT: s_lshr_b32 s77, s5, 16
-; SI-NEXT: v_readlane_b32 s5, v46, 52
-; SI-NEXT: v_readlane_b32 s22, v46, 49
-; SI-NEXT: s_or_b32 s96, s99, s64
-; SI-NEXT: s_mov_b32 s97, s65
+; SI-NEXT: s_or_b32 s4, s22, s64
+; SI-NEXT: s_mov_b32 s5, s65
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
-; SI-NEXT: s_lshr_b32 s5, s5, 16
-; SI-NEXT: s_lshr_b32 s91, s91, 16
-; SI-NEXT: s_lshr_b32 s93, s93, 16
-; SI-NEXT: s_lshr_b32 s11, s17, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s66, 16
-; SI-NEXT: s_lshr_b32 s7, s90, 16
-; SI-NEXT: s_lshr_b32 s9, s69, 16
-; SI-NEXT: s_lshr_b32 s39, s70, 16
-; SI-NEXT: s_mov_b32 s98, s27
-; SI-NEXT: s_mov_b32 s99, s25
-; SI-NEXT: v_readlane_b32 s70, v46, 56
-; SI-NEXT: v_readlane_b32 s27, v46, 55
-; SI-NEXT: s_lshr_b32 s49, s71, 16
-; SI-NEXT: s_lshr_b32 s51, vcc_hi, 16
-; SI-NEXT: s_mov_b32 s25, s24
-; SI-NEXT: s_mov_b32 s24, s68
-; SI-NEXT: s_mov_b32 s68, s26
-; SI-NEXT: s_mov_b32 s26, s28
-; SI-NEXT: s_mov_b32 s28, s29
-; SI-NEXT: s_mov_b32 s29, s67
-; SI-NEXT: v_readlane_b32 s69, v46, 54
-; SI-NEXT: v_readlane_b32 s90, v46, 53
-; SI-NEXT: s_lshr_b32 s53, s31, 16
-; SI-NEXT: s_lshr_b32 s55, s82, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s87, 16
+; SI-NEXT: s_lshr_b32 s53, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v46, 0
+; SI-NEXT: s_or_b32 s46, s79, s40
+; SI-NEXT: s_mov_b32 s47, s41
+; SI-NEXT: s_or_b32 s40, s91, s36
+; SI-NEXT: s_mov_b32 s41, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
+; SI-NEXT: s_lshr_b32 s55, s16, 16
+; SI-NEXT: s_lshr_b32 s65, s86, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_mov_b32 s94, s66
+; SI-NEXT: s_lshr_b32 s79, s28, 16
+; SI-NEXT: v_readlane_b32 s28, v46, 3
+; SI-NEXT: v_readlane_b32 vcc_hi, v46, 2
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: s_lshr_b32 s91, s24, 16
+; SI-NEXT: v_readlane_b32 s24, v46, 4
+; SI-NEXT: s_lshr_b32 s93, s27, 16
+; SI-NEXT: v_readlane_b32 s27, v46, 6
+; SI-NEXT: s_lshr_b32 s95, s18, 16
+; SI-NEXT: s_lshr_b32 s31, s26, 16
+; SI-NEXT: s_lshr_b32 s17, s20, 16
+; SI-NEXT: v_readlane_b32 s20, v46, 1
+; SI-NEXT: s_lshr_b32 s92, s78, 16
+; SI-NEXT: s_lshr_b32 s78, s88, 16
+; SI-NEXT: v_readlane_b32 s21, v47, 47
+; SI-NEXT: s_mov_b32 s26, s23
+; SI-NEXT: s_mov_b32 s22, s25
+; SI-NEXT: v_readlane_b32 s25, v46, 5
+; SI-NEXT: s_lshr_b32 s39, s90, 16
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB93_3
; SI-NEXT: .LBB93_2:
; SI-NEXT: s_mov_b64 s[66:67], -1
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr20
-; SI-NEXT: ; implicit-def: $sgpr23
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr5
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr17
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: .LBB93_3: ; %Flow
-; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 s17, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s17, 1
+; SI-NEXT: s_and_b64 s[18:19], s[66:67], exec
+; SI-NEXT: s_cselect_b32 s16, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s16, 1
; SI-NEXT: s_cbranch_scc1 .LBB93_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s85, s99, 3
-; SI-NEXT: v_readlane_b32 s5, v46, 29
-; SI-NEXT: s_and_b32 s4, s85, 0xff
+; SI-NEXT: v_readlane_b32 s4, v47, 32
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: v_readlane_b32 s5, v47, 27
+; SI-NEXT: v_readlane_b32 s6, v47, 17
+; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_add_i32 s6, s22, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v46, 20
+; SI-NEXT: v_readlane_b32 s5, v47, 15
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
@@ -172817,14 +173999,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s5, s19, 3
-; SI-NEXT: v_readlane_b32 s6, v47, 37
-; SI-NEXT: v_readlane_b32 s7, v47, 36
+; SI-NEXT: v_readlane_b32 s5, v47, 2
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: v_readlane_b32 s6, v56, 62
+; SI-NEXT: v_readlane_b32 s7, v56, 55
; SI-NEXT: s_and_b32 s5, s5, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v47, 35
+; SI-NEXT: v_readlane_b32 s6, v56, 52
; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
@@ -172832,91 +174015,94 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v46, 42
+; SI-NEXT: v_readlane_b32 s6, v47, 41
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 36
-; SI-NEXT: v_readlane_b32 s8, v46, 32
+; SI-NEXT: v_readlane_b32 s7, v47, 35
+; SI-NEXT: v_readlane_b32 s8, v47, 30
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s83, s8, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 31
-; SI-NEXT: s_and_b32 s8, s83, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 29
+; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s7, s29, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 12
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: v_readlane_b32 s9, v47, 6
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s8, s68, 8
-; SI-NEXT: s_add_i32 s9, s24, 3
-; SI-NEXT: s_add_i32 s96, s4, 0x3000000
+; SI-NEXT: s_lshl_b32 s8, s21, 8
+; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s4, v47, 38
+; SI-NEXT: v_readlane_b32 s8, v47, 1
; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s8, s4, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_addk_i32 s7, 0x300
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v46, 45
+; SI-NEXT: v_readlane_b32 s8, v47, 44
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v46, 44
-; SI-NEXT: v_readlane_b32 s10, v46, 41
+; SI-NEXT: v_readlane_b32 s9, v47, 43
+; SI-NEXT: v_readlane_b32 s10, v47, 40
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s68, s10, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v46, 38
-; SI-NEXT: s_and_b32 s10, s68, 0xff
+; SI-NEXT: v_readlane_b32 s9, v47, 37
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_addk_i32 s8, 0x300
; SI-NEXT: s_or_b32 s9, s9, s10
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v46, 48
+; SI-NEXT: v_readlane_b32 s9, v47, 25
; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: v_readlane_b32 s4, v47, 39
+; SI-NEXT: v_readlane_b32 s10, v47, 21
+; SI-NEXT: v_readlane_b32 s11, v47, 11
; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s10, s4, 8
-; SI-NEXT: s_add_i32 s11, s28, 3
+; SI-NEXT: s_lshl_b32 s10, s10, 8
+; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_or_b32 s9, s10, s9
+; SI-NEXT: v_readlane_b32 s10, v47, 10
; SI-NEXT: s_and_b32 s11, s11, 0xff
-; SI-NEXT: s_lshl_b32 s10, s26, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_addk_i32 s9, 0x300
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v46, 47
-; SI-NEXT: s_add_i32 s17, s10, 3
-; SI-NEXT: v_readlane_b32 s11, v46, 46
-; SI-NEXT: v_readlane_b32 s12, v46, 43
-; SI-NEXT: s_and_b32 s10, s17, 0xff
+; SI-NEXT: v_readlane_b32 s10, v47, 46
+; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: v_readlane_b32 s11, v47, 45
+; SI-NEXT: v_readlane_b32 s12, v47, 42
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
-; SI-NEXT: s_add_i32 s23, s12, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v46, 40
-; SI-NEXT: s_and_b32 s12, s23, 0xff
+; SI-NEXT: v_readlane_b32 s11, v47, 39
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_addk_i32 s10, 0x300
; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v46, 33
-; SI-NEXT: s_add_i32 s84, s11, 3
-; SI-NEXT: v_readlane_b32 s12, v46, 30
-; SI-NEXT: v_readlane_b32 s13, v46, 25
-; SI-NEXT: s_and_b32 s11, s84, 0xff
+; SI-NEXT: v_readlane_b32 s11, v47, 31
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: v_readlane_b32 s12, v47, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 22
+; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v46, 21
+; SI-NEXT: v_readlane_b32 s12, v47, 16
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
@@ -172924,31 +174110,31 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v46, 39
-; SI-NEXT: s_add_i32 s99, s12, 3
-; SI-NEXT: v_readlane_b32 s13, v46, 37
-; SI-NEXT: v_readlane_b32 s14, v46, 34
-; SI-NEXT: s_and_b32 s12, s99, 0xff
+; SI-NEXT: v_readlane_b32 s12, v47, 38
+; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: v_readlane_b32 s13, v47, 36
+; SI-NEXT: v_readlane_b32 s14, v47, 33
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 8
-; SI-NEXT: s_add_i32 s86, s14, 3
+; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v46, 35
-; SI-NEXT: s_and_b32 s14, s86, 0xff
+; SI-NEXT: v_readlane_b32 s13, v47, 34
+; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_addk_i32 s12, 0x300
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v46, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 26
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: v_readlane_b32 s14, v46, 27
-; SI-NEXT: v_readlane_b32 s15, v46, 23
+; SI-NEXT: v_readlane_b32 s14, v47, 24
+; SI-NEXT: v_readlane_b32 s15, v47, 19
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v46, 24
+; SI-NEXT: v_readlane_b32 s14, v47, 20
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -172956,41 +174142,47 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v46, 26
+; SI-NEXT: v_readlane_b32 s14, v47, 23
; SI-NEXT: s_add_i32 s14, s14, 3
-; SI-NEXT: v_readlane_b32 s15, v46, 22
+; SI-NEXT: v_readlane_b32 s15, v47, 18
+; SI-NEXT: v_readlane_b32 s16, v47, 13
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 8
-; SI-NEXT: s_add_i32 s16, s69, 3
+; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: v_readlane_b32 s15, v47, 14
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s15, s90, 24
+; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_addk_i32 s14, 0x300
; SI-NEXT: s_or_b32 s15, s15, s16
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v46, 19
+; SI-NEXT: v_readlane_b32 s15, v47, 9
; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: v_readlane_b32 s4, v47, 40
+; SI-NEXT: v_readlane_b32 s16, v47, 8
+; SI-NEXT: v_readlane_b32 s17, v47, 4
; SI-NEXT: s_and_b32 s15, s15, 0xff
-; SI-NEXT: s_lshl_b32 s16, s98, 8
-; SI-NEXT: s_add_i32 s17, s4, 3
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: v_readlane_b32 s16, v47, 5
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_lshl_b32 s16, s25, 24
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_addk_i32 s15, 0x300
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_add_i32 s16, s27, 3
-; SI-NEXT: v_readlane_b32 s18, v46, 17
+; SI-NEXT: v_readlane_b32 s16, v47, 7
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v47, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 63
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 18
+; SI-NEXT: v_readlane_b32 s17, v47, 0
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -172999,15 +174191,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s40, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 16
+; SI-NEXT: v_readlane_b32 s16, v56, 61
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 15
-; SI-NEXT: v_readlane_b32 s18, v46, 12
+; SI-NEXT: v_readlane_b32 s17, v56, 60
+; SI-NEXT: v_readlane_b32 s18, v56, 57
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 13
+; SI-NEXT: v_readlane_b32 s17, v56, 58
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173016,15 +174208,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s41, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 14
+; SI-NEXT: v_readlane_b32 s16, v56, 59
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 11
-; SI-NEXT: v_readlane_b32 s18, v46, 9
+; SI-NEXT: v_readlane_b32 s17, v56, 56
+; SI-NEXT: v_readlane_b32 s18, v56, 53
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 10
+; SI-NEXT: v_readlane_b32 s17, v56, 54
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173033,15 +174225,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 8
+; SI-NEXT: v_readlane_b32 s16, v56, 51
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 7
-; SI-NEXT: v_readlane_b32 s18, v46, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 50
+; SI-NEXT: v_readlane_b32 s18, v56, 46
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 4
+; SI-NEXT: v_readlane_b32 s17, v56, 47
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173050,15 +174242,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 6
+; SI-NEXT: v_readlane_b32 s16, v56, 49
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 5
-; SI-NEXT: v_readlane_b32 s18, v46, 1
+; SI-NEXT: v_readlane_b32 s17, v56, 48
+; SI-NEXT: v_readlane_b32 s18, v56, 44
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 45
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173067,15 +174259,15 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s44, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 0
+; SI-NEXT: v_readlane_b32 s16, v56, 43
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 63
-; SI-NEXT: v_readlane_b32 s18, v47, 59
+; SI-NEXT: v_readlane_b32 s17, v56, 42
+; SI-NEXT: v_readlane_b32 s18, v56, 38
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 60
+; SI-NEXT: v_readlane_b32 s17, v56, 39
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173084,15 +174276,14 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s45, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 62
+; SI-NEXT: v_readlane_b32 s16, v56, 41
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 61
-; SI-NEXT: v_readlane_b32 s18, v47, 57
+; SI-NEXT: v_readlane_b32 s17, v56, 40
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s87, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 58
+; SI-NEXT: v_readlane_b32 s17, v56, 37
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173101,116 +174292,107 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s46, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 56
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 55
-; SI-NEXT: v_readlane_b32 s18, v47, 53
+; SI-NEXT: s_add_i32 s16, s28, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s25, 8
+; SI-NEXT: s_add_i32 s18, s85, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 54
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s22, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s47, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 18
+; SI-NEXT: v_readlane_b32 s16, v56, 16
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 17
-; SI-NEXT: v_readlane_b32 s18, v47, 16
+; SI-NEXT: v_readlane_b32 s17, v56, 15
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 15
-; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 13
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 14
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s56, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 14
+; SI-NEXT: v_readlane_b32 s16, v56, 12
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 52
-; SI-NEXT: v_readlane_b32 s18, v47, 50
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s27, 8
+; SI-NEXT: s_add_i32 s18, s26, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 51
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, vcc_hi, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s57, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 45
+; SI-NEXT: v_readlane_b32 s16, v56, 24
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s18, v47, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s92, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 23
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s17, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 23
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s58, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 22
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 21
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 22
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 21
-; SI-NEXT: v_readlane_b32 s18, v47, 20
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 19
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_add_i32 s58, s16, 0x3000000
+; SI-NEXT: v_readlane_b32 s16, v56, 20
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 19
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s59, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 46
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 17
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 18
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 44
-; SI-NEXT: v_readlane_b32 s18, v47, 41
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_add_i32 s59, s16, 0x3000000
+; SI-NEXT: s_add_i32 s16, s76, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 29
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s97, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s4, v47, 29
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s4, 24
+; SI-NEXT: s_lshl_b32 s17, s96, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s60, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 28
+; SI-NEXT: v_readlane_b32 s16, v56, 28
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 27
-; SI-NEXT: v_readlane_b32 s18, v47, 26
+; SI-NEXT: v_readlane_b32 s17, v56, 27
+; SI-NEXT: v_readlane_b32 s18, v56, 26
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 25
+; SI-NEXT: v_readlane_b32 s17, v56, 25
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173219,32 +174401,29 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s61, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 49
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 47
-; SI-NEXT: v_readlane_b32 s18, v47, 43
+; SI-NEXT: s_add_i32 s16, s77, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 34
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 42
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s98, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s62, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 33
+; SI-NEXT: v_readlane_b32 s16, v56, 33
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 32
-; SI-NEXT: v_readlane_b32 s18, v47, 31
+; SI-NEXT: v_readlane_b32 s17, v56, 32
+; SI-NEXT: v_readlane_b32 s18, v56, 31
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 30
+; SI-NEXT: v_readlane_b32 s17, v56, 30
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173253,15 +174432,14 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s63, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 5
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 4
-; SI-NEXT: v_readlane_b32 s18, v47, 3
+; SI-NEXT: s_add_i32 s16, s24, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 4
+; SI-NEXT: v_readlane_b32 s18, v56, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 2
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173270,32 +174448,32 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s72, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 1
+; SI-NEXT: v_readlane_b32 s16, v56, 1
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 0
-; SI-NEXT: v_readlane_b32 s18, v47, 48
+; SI-NEXT: v_readlane_b32 s17, v56, 0
+; SI-NEXT: v_readlane_b32 s18, v56, 36
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s4, v47, 34
+; SI-NEXT: v_readlane_b32 s17, v56, 35
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s4, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s73, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 13
+; SI-NEXT: v_readlane_b32 s16, v56, 11
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 12
-; SI-NEXT: v_readlane_b32 s18, v47, 11
+; SI-NEXT: v_readlane_b32 s17, v56, 10
+; SI-NEXT: v_readlane_b32 s18, v56, 9
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 10
+; SI-NEXT: v_readlane_b32 s17, v56, 8
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -173304,183 +174482,183 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s74, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 9
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 8
-; SI-NEXT: v_readlane_b32 s18, v47, 7
+; SI-NEXT: s_add_i32 s16, s20, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 7
+; SI-NEXT: v_readlane_b32 s18, v56, 6
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 6
+; SI-NEXT: v_readlane_b32 s17, v56, 5
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_add_i32 s34, s6, 0x3000000
-; SI-NEXT: s_add_i32 s35, s7, 0x3000000
-; SI-NEXT: s_add_i32 s36, s8, 0x3000000
-; SI-NEXT: s_add_i32 s37, s9, 0x3000000
-; SI-NEXT: s_add_i32 s94, s10, 0x3000000
-; SI-NEXT: s_add_i32 s95, s11, 0x3000000
+; SI-NEXT: s_add_i32 s4, s4, 0x3000000
+; SI-NEXT: s_add_i32 s5, s5, 0x3000000
+; SI-NEXT: s_add_i32 s6, s6, 0x3000000
+; SI-NEXT: s_add_i32 s7, s7, 0x3000000
+; SI-NEXT: s_add_i32 s8, s8, 0x3000000
+; SI-NEXT: s_add_i32 s9, s9, 0x3000000
+; SI-NEXT: s_add_i32 s10, s10, 0x3000000
+; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s97, s5, 0x3000000
; SI-NEXT: s_add_i32 s75, s16, 0x3000000
-; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[10:11], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[6:7], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[8:9], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[94:95], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[36:37], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[34:35], 16
-; SI-NEXT: s_lshr_b64 s[20:21], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[96:97], 16
-; SI-NEXT: s_lshr_b32 s23, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s73, 16
-; SI-NEXT: s_lshr_b32 s5, s63, 16
-; SI-NEXT: s_lshr_b32 s91, s61, 16
-; SI-NEXT: s_lshr_b32 s93, s59, 16
-; SI-NEXT: s_lshr_b32 s11, s57, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s47, 16
-; SI-NEXT: s_lshr_b32 s30, s45, 16
-; SI-NEXT: s_lshr_b32 s7, s43, 16
-; SI-NEXT: s_lshr_b32 s9, s41, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s95, 16
-; SI-NEXT: s_lshr_b32 s53, s37, 16
-; SI-NEXT: s_lshr_b32 s55, s35, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s97, 16
+; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[74:75], 16
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[70:71], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[80:81], s[56:57], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s49, s75, 16
+; SI-NEXT: s_lshr_b32 s51, s73, 16
+; SI-NEXT: s_lshr_b32 s53, s63, 16
+; SI-NEXT: s_lshr_b32 s55, s61, 16
+; SI-NEXT: s_lshr_b32 s65, s59, 16
+; SI-NEXT: s_lshr_b32 s35, s57, 16
+; SI-NEXT: s_lshr_b32 s79, s47, 16
+; SI-NEXT: s_lshr_b32 s89, s45, 16
+; SI-NEXT: s_lshr_b32 s91, s43, 16
+; SI-NEXT: s_lshr_b32 s93, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s15, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s17, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s9, 16
+; SI-NEXT: s_lshr_b32 s78, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s5, 16
; SI-NEXT: .LBB93_5: ; %end
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: s_and_b32 s17, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s20, 16
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_and_b32 s18, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s23, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_and_b32 s19, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s76, 16
+; SI-NEXT: s_and_b32 s16, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s82, 16
+; SI-NEXT: s_or_b32 s16, s16, s19
+; SI-NEXT: s_and_b32 s19, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s20, s49, 16
; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: s_and_b32 s20, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s77, 16
+; SI-NEXT: s_and_b32 s20, s72, 0xffff
+; SI-NEXT: s_lshl_b32 s21, s30, 16
; SI-NEXT: s_or_b32 s20, s20, s21
-; SI-NEXT: s_and_b32 s21, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s78, 16
+; SI-NEXT: s_and_b32 s21, s73, 0xffff
+; SI-NEXT: s_lshl_b32 s22, s51, 16
; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: s_and_b32 s22, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s5, 16
+; SI-NEXT: s_and_b32 s22, s62, 0xffff
+; SI-NEXT: s_lshl_b32 s23, s94, 16
; SI-NEXT: s_or_b32 s22, s22, s23
-; SI-NEXT: s_and_b32 s23, s60, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s80, 16
+; SI-NEXT: s_and_b32 s23, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s24, s53, 16
; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s91, 16
+; SI-NEXT: s_and_b32 s24, s60, 0xffff
+; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
-; SI-NEXT: s_and_b32 s25, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s10, 16
+; SI-NEXT: s_and_b32 s25, s61, 0xffff
+; SI-NEXT: s_lshl_b32 s26, s55, 16
; SI-NEXT: s_or_b32 s25, s25, s26
-; SI-NEXT: s_and_b32 s26, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s93, 16
+; SI-NEXT: s_and_b32 s26, s58, 0xffff
+; SI-NEXT: s_lshl_b32 s27, s70, 16
; SI-NEXT: s_or_b32 s26, s26, s27
-; SI-NEXT: s_and_b32 s27, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s4, 16
+; SI-NEXT: s_and_b32 s27, s59, 0xffff
+; SI-NEXT: s_lshl_b32 s28, s65, 16
; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: s_and_b32 s28, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s11, 16
+; SI-NEXT: s_and_b32 s28, s56, 0xffff
+; SI-NEXT: s_lshl_b32 s29, s80, 16
; SI-NEXT: s_or_b32 s28, s28, s29
-; SI-NEXT: s_and_b32 s29, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s6, 16
-; SI-NEXT: s_or_b32 s29, s29, s46
-; SI-NEXT: s_and_b32 s46, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_or_b32 s46, s46, s47
+; SI-NEXT: s_and_b32 s29, s57, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s35, 16
+; SI-NEXT: s_or_b32 s29, s29, s56
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s84, 16
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s47, s47, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s79, 16
+; SI-NEXT: s_or_b32 s47, s47, s56
; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
+; SI-NEXT: s_lshl_b32 s56, s68, 16
+; SI-NEXT: s_or_b32 s44, s44, s56
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s56, s89, 16
+; SI-NEXT: s_or_b32 s45, s45, s56
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s84, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s56, s34, 16
+; SI-NEXT: s_or_b32 s42, s42, s56
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s7, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s56, s91, 16
+; SI-NEXT: s_or_b32 s43, s43, s56
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s8, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s56, s36, 16
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_or_b32 s40, s40, s56
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s9, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s56, s93, 16
+; SI-NEXT: s_or_b32 s11, s11, s17
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s52, 16
+; SI-NEXT: s_or_b32 s41, s41, s56
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s38, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s56, s38, 16
+; SI-NEXT: s_or_b32 s8, s8, s17
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s92, 16
+; SI-NEXT: s_or_b32 s14, s14, s56
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s56, s95, 16
+; SI-NEXT: s_or_b32 s9, s9, s17
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s54, 16
+; SI-NEXT: s_or_b32 s15, s15, s56
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s56, s48, 16
+; SI-NEXT: s_or_b32 s6, s6, s17
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s78, 16
+; SI-NEXT: s_or_b32 s12, s12, s56
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
-; SI-NEXT: s_and_b32 s10, s94, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
-; SI-NEXT: s_and_b32 s11, s95, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
-; SI-NEXT: s_and_b32 s8, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
-; SI-NEXT: s_and_b32 s6, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
-; SI-NEXT: s_and_b32 s7, s35, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
-; SI-NEXT: s_and_b32 s4, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_and_b32 s5, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s16, vcc_hi, 16
-; SI-NEXT: s_or_b32 s4, s4, s47
-; SI-NEXT: s_or_b32 s5, s5, s16
+; SI-NEXT: s_lshl_b32 s56, s31, 16
+; SI-NEXT: s_or_b32 s7, s7, s17
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s64, 16
+; SI-NEXT: s_or_b32 s13, s13, s56
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s50, 16
+; SI-NEXT: s_or_b32 s4, s4, s17
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s39, 16
+; SI-NEXT: s_or_b32 s10, s10, s56
+; SI-NEXT: s_or_b32 s5, s5, s17
; SI-NEXT: v_readlane_b32 s30, v45, 34
-; SI-NEXT: v_mov_b32_e32 v0, s17
-; SI-NEXT: v_mov_b32_e32 v1, s18
-; SI-NEXT: v_mov_b32_e32 v2, s19
-; SI-NEXT: v_mov_b32_e32 v3, s20
-; SI-NEXT: v_mov_b32_e32 v4, s21
-; SI-NEXT: v_mov_b32_e32 v5, s22
-; SI-NEXT: v_mov_b32_e32 v6, s23
-; SI-NEXT: v_mov_b32_e32 v7, s24
-; SI-NEXT: v_mov_b32_e32 v8, s25
-; SI-NEXT: v_mov_b32_e32 v9, s26
-; SI-NEXT: v_mov_b32_e32 v10, s27
-; SI-NEXT: v_mov_b32_e32 v11, s28
-; SI-NEXT: v_mov_b32_e32 v12, s29
-; SI-NEXT: v_mov_b32_e32 v13, s46
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s19
+; SI-NEXT: v_mov_b32_e32 v2, s20
+; SI-NEXT: v_mov_b32_e32 v3, s21
+; SI-NEXT: v_mov_b32_e32 v4, s22
+; SI-NEXT: v_mov_b32_e32 v5, s23
+; SI-NEXT: v_mov_b32_e32 v6, s24
+; SI-NEXT: v_mov_b32_e32 v7, s25
+; SI-NEXT: v_mov_b32_e32 v8, s26
+; SI-NEXT: v_mov_b32_e32 v9, s27
+; SI-NEXT: v_mov_b32_e32 v10, s28
+; SI-NEXT: v_mov_b32_e32 v11, s29
+; SI-NEXT: v_mov_b32_e32 v12, s46
+; SI-NEXT: v_mov_b32_e32 v13, s47
; SI-NEXT: v_mov_b32_e32 v14, s44
; SI-NEXT: v_mov_b32_e32 v15, s45
; SI-NEXT: v_mov_b32_e32 v16, s42
@@ -173538,6 +174716,7 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -173561,32 +174740,28 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
; VI-NEXT: v_readfirstlane_b32 s63, v12
-; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12
-; VI-NEXT: v_readfirstlane_b32 s59, v29
-; VI-NEXT: v_readfirstlane_b32 s47, v27
+; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s75, v30
-; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s60, v26
; VI-NEXT: v_readfirstlane_b32 s43, v25
+; VI-NEXT: v_readfirstlane_b32 s59, v29
+; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s47, v27
; VI-NEXT: v_readfirstlane_b32 s56, v24
; VI-NEXT: v_readfirstlane_b32 s15, v23
; VI-NEXT: v_readfirstlane_b32 s44, v22
; VI-NEXT: v_readfirstlane_b32 s12, v21
; VI-NEXT: v_readfirstlane_b32 s40, v20
-; VI-NEXT: v_readfirstlane_b32 s76, v18
-; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s9, v19
+; VI-NEXT: v_readfirstlane_b32 s76, v18
; VI-NEXT: v_readfirstlane_b32 s61, v17
+; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s62, v15
-; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s57, v13
-; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s41, v9
; VI-NEXT: v_readfirstlane_b32 s46, v8
; VI-NEXT: v_readfirstlane_b32 s13, v7
@@ -173596,176 +174771,191 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s7, v3
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4
+; VI-NEXT: v_readfirstlane_b32 s8, v0
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
-; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320
-; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316
-; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308
-; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304
-; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300
-; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:260
; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:256
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:252
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:248
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:216
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:212
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:208
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:204
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:196
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:192
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:188
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:180
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:176
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:152
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB93_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -173779,50 +174969,61 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_mov_b32_e32 v43, v10
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, v49
+; VI-NEXT: v_mov_b32_e32 v49, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v35, v12
+; VI-NEXT: v_mov_b32_e32 v31, v42
+; VI-NEXT: v_mov_b32_e32 v42, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s47
@@ -173831,169 +175032,185 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v15, v14, s4
+; VI-NEXT: v_perm_b32 v12, v35, v32, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v18, v23, v18, s4
-; VI-NEXT: v_perm_b32 v23, v51, v33, s4
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v12, v56, v12, s4
+; VI-NEXT: v_perm_b32 v12, v50, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v47, v13, s4
+; VI-NEXT: v_perm_b32 v13, v39, v36, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v14, v59, v14, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v15, v32, v15, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v61, v13, s4
+; VI-NEXT: v_perm_b32 v13, v57, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v17, v60, s4
+; VI-NEXT: v_perm_b32 v32, v52, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v53, s4
+; VI-NEXT: v_or_b32_e32 v13, v32, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v21, v16, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v17, v28, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v21, v58, v46, s4
-; VI-NEXT: v_perm_b32 v24, v36, v49, s4
-; VI-NEXT: v_mov_b32_e32 v28, v52
-; VI-NEXT: v_mov_b32_e32 v52, v53
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v19, v16, s4
-; VI-NEXT: v_perm_b32 v19, v26, v22, s4
-; VI-NEXT: v_or_b32_e32 v17, v19, v17
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v25, v20, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v16, v18, v16
-; VI-NEXT: v_perm_b32 v18, v45, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v20, v44, v29, s4
-; VI-NEXT: v_perm_b32 v22, v53, v42, s4
-; VI-NEXT: v_mov_b32_e32 v45, v34
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v63, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v32, v14
+; VI-NEXT: v_perm_b32 v32, v61, v34, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v15, v15, v62, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v32
+; VI-NEXT: v_perm_b32 v32, v60, v59, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v28, v58, v28, s4
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: v_or_b32_e32 v16, v28, v32
+; VI-NEXT: v_perm_b32 v28, v46, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_perm_b32 v18, v29, v18, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v28
+; VI-NEXT: v_perm_b32 v28, v44, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v43, v19, s4
+; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_perm_b32 v20, v23, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v19, v19, v28
+; VI-NEXT: v_perm_b32 v28, v24, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v20, v20, v28
+; VI-NEXT: v_perm_b32 v28, v26, v25, s4
+; VI-NEXT: v_mov_b32_e32 v37, v54
+; VI-NEXT: v_perm_b32 v29, v49, v54, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_mov_b32_e32 v53, v49
+; VI-NEXT: v_mov_b32_e32 v52, v33
+; VI-NEXT: v_perm_b32 v35, v56, v47, s4
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_e32 v17, v17, v35
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v21, v22, v21, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v21, v21, v28
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v19, v30, v19, s4
-; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v55, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v39, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v38, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v54, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v40, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: v_perm_b32 v24, v48, v34, s4
+; VI-NEXT: v_mov_b32_e32 v36, v38
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_mov_b32_e32 v48, v54
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v24, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_mov_b32_e32 v50, v28
+; VI-NEXT: v_perm_b32 v28, v31, v28, s4
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v48, v25
-; VI-NEXT: v_perm_b32 v25, v25, v41, s4
-; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v33
-; VI-NEXT: v_mov_b32_e32 v33, v26
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_perm_b32 v22, v23, v22, s4
+; VI-NEXT: v_or_b32_e32 v22, v22, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v53, v25
+; VI-NEXT: v_mov_b32_e32 v57, v31
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v25, s4
+; VI-NEXT: v_or_b32_e32 v23, v24, v23
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v25, v24, s4
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v24, v25, v24
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v26, v40, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v34, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v28, v28, v35, s4
+; VI-NEXT: v_perm_b32 v28, v55, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v62, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, v44
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v43, v29, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v49, v29
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v41, v55, v54, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v32, v30
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v35, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_mov_b32_e32 v62, v31
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v63, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_mov_b32_e32 v35, v43
-; VI-NEXT: v_perm_b32 v43, v44, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_mov_b32_e32 v51, v38
+; VI-NEXT: v_mov_b32_e32 v38, v55
+; VI-NEXT: v_or_b32_e32 v31, v41, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v39, v34
-; VI-NEXT: v_mov_b32_e32 v34, v52
-; VI-NEXT: v_mov_b32_e32 v52, v45
; VI-NEXT: s_branch .LBB93_3
; VI-NEXT: .LBB93_2:
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v52, v34
-; VI-NEXT: v_mov_b32_e32 v39, v33
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v53
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v51, v4
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: v_mov_b32_e32 v53, v10
+; VI-NEXT: v_mov_b32_e32 v38, v3
+; VI-NEXT: v_mov_b32_e32 v52, v31
+; VI-NEXT: v_mov_b32_e32 v35, v8
+; VI-NEXT: v_mov_b32_e32 v63, v1
+; VI-NEXT: v_mov_b32_e32 v37, v49
+; VI-NEXT: v_mov_b32_e32 v36, v6
+; VI-NEXT: v_mov_b32_e32 v48, v0
+; VI-NEXT: v_mov_b32_e32 v34, v54
+; VI-NEXT: v_mov_b32_e32 v32, v5
+; VI-NEXT: v_mov_b32_e32 v50, v11
+; VI-NEXT: v_mov_b32_e32 v57, v9
; VI-NEXT: v_mov_b32_e32 v62, v2
-; VI-NEXT: v_mov_b32_e32 v35, v1
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_mov_b32_e32 v49, v33
+; VI-NEXT: v_mov_b32_e32 v33, v7
+; VI-NEXT: v_mov_b32_e32 v43, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -174003,9 +175220,26 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB93_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
+; VI-NEXT: v_perm_b32 v0, v0, v63, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
+; VI-NEXT: v_perm_b32 v0, v0, v48, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35
+; VI-NEXT: v_perm_b32 v20, v0, v32, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
+; VI-NEXT: v_perm_b32 v21, v0, v62, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v57
+; VI-NEXT: v_perm_b32 v23, v0, v33, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_perm_b32 v24, v0, v52, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53
+; VI-NEXT: v_perm_b32 v25, v0, v37, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s60, s60, 3
@@ -174027,339 +175261,349 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
+; VI-NEXT: v_mov_b32_e32 v57, s21
; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_mov_b32_e32 v62, s19
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_mov_b32_e32 v18, s17
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_mov_b32_e32 v63, s17
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v0, v0, v35, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, s21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v26, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v27, v0, v50, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v30, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v31, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v0, v1, s4
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v41, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v19, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v0, v1, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
-; VI-NEXT: v_perm_b32 v25, v0, v53, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
-; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v24, v0, v52, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v30, v0, v41, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40
-; VI-NEXT: v_perm_b32 v23, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v31, v0, v49, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54
-; VI-NEXT: v_perm_b32 v22, v0, v37, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v33, v0, v39, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v21, v0, v63, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v36, v0, v42, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
-; VI-NEXT: v_perm_b32 v20, v0, v55, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
+; VI-NEXT: v_perm_b32 v44, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v63, s19
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v45, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v53, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: v_perm_b32 v47, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v56, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v18, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v0, v1, s4
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v58, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v59, v0, v43, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v60, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v61, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v0, v1, s4
+; VI-NEXT: v_perm_b32 v40, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v42, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v10, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v14, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v16, v0, v60, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v40, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56
+; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v42, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47
+; VI-NEXT: v_perm_b32 v36, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v62, s20, v62, v0
-; VI-NEXT: v_perm_b32 v63, s18, v63, v0
+; VI-NEXT: v_perm_b32 v57, s20, v57, v0
+; VI-NEXT: v_perm_b32 v62, s18, v62, v0
+; VI-NEXT: v_lshlrev_b32_e32 v62, 16, v62
+; VI-NEXT: v_add_u32_e32 v57, vcc, 0x300, v57
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, s75, v1, v0
+; VI-NEXT: v_perm_b32 v39, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v55, s72, v1, v0
+; VI-NEXT: v_perm_b32 v33, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v41, s60, v1, v0
+; VI-NEXT: v_perm_b32 v35, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v46, s44, v1, v0
+; VI-NEXT: v_perm_b32 v48, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v47, s76, v1, v0
+; VI-NEXT: v_perm_b32 v49, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v56, s74, v1, v0
+; VI-NEXT: v_perm_b32 v50, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v57, s58, v1, v0
+; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
+; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
+; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
+; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v58, s42, v1, v0
+; VI-NEXT: v_perm_b32 v52, s42, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v59, s11, v1, v0
+; VI-NEXT: v_perm_b32 v53, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v60, s28, v1, v0
+; VI-NEXT: v_perm_b32 v54, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v61, s24, v1, v0
+; VI-NEXT: v_perm_b32 v55, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
-; VI-NEXT: v_perm_b32 v0, s16, v18, v0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63
+; VI-NEXT: v_perm_b32 v0, s16, v63, v0
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
+; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
-; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62
-; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61
-; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60
-; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59
-; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58
-; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57
-; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56
-; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47
-; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46
-; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11
-; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40
+; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
+; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42
-; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43
-; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41
-; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44
-; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45
-; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36
-; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
+; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v41
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v19
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v18
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v58
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v59
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v60
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v61
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
+; VI-NEXT: v_or_b32_sdwa v0, v62, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -174378,45 +175622,20 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB93_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -174456,458 +175675,521 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s42, v13
+; GFX9-NEXT: v_readfirstlane_b32 s46, v12
+; GFX9-NEXT: v_readfirstlane_b32 s61, v11
; GFX9-NEXT: v_readfirstlane_b32 s7, v0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:8
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s6, v1
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s9, v21
; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s42, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s61, v11
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(41)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:320
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:296
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:264
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:260
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:256
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280
-; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264
-; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:260
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:256
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:252
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:244
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:240
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:244
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:236
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:220
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:212
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:180
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:148
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:144
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(26)
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB93_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v24, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v49, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v24
+; GFX9-NEXT: v_mov_b32_e32 v63, v55
+; GFX9-NEXT: v_mov_b32_e32 v55, v4
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s7, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s7, v4, v24
+; GFX9-NEXT: v_mov_b32_e32 v33, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
-; GFX9-NEXT: v_perm_b32 v5, s10, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s43, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s10, v5, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s17
+; GFX9-NEXT: v_perm_b32 v4, s43, v4, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v23, s16, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s19
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
-; GFX9-NEXT: v_perm_b32 v6, s14, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s59, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s14, v6, v24
+; GFX9-NEXT: v_perm_b32 v41, s18, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v45, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v7
+; GFX9-NEXT: v_perm_b32 v5, s59, v5, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, s21
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s63, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v24
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v21, s20, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s23
+; GFX9-NEXT: v_perm_b32 v6, s63, v6, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v41, s22, v41, v24
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
-; GFX9-NEXT: v_perm_b32 v8, s58, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s75, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s58, v8, v24
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v61
+; GFX9-NEXT: v_mov_b32_e32 v61, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v10
+; GFX9-NEXT: v_perm_b32 v7, s75, v7, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
; GFX9-NEXT: v_mov_b32_e32 v9, s11
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
+; GFX9-NEXT: v_or_b32_sdwa v1, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v63, v12
-; GFX9-NEXT: v_mov_b32_e32 v12, s40
+; GFX9-NEXT: v_mov_b32_e32 v20, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v12, s13, v12, v10
-; GFX9-NEXT: v_perm_b32 v9, s60, v9, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v9, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v12, s72
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v13
-; GFX9-NEXT: v_mov_b32_e32 v13, s56
-; GFX9-NEXT: v_perm_b32 v12, s62, v12, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v13, v10
-; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v20, s13, v20, v10
; GFX9-NEXT: s_mov_b32 s4, 0x6050400
-; GFX9-NEXT: v_perm_b32 v11, s74, v14, v11
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v14, v28, v23, s5
-; GFX9-NEXT: v_perm_b32 v28, v48, v62, s5
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v12, v15, v17, s4
+; GFX9-NEXT: v_perm_b32 v9, s60, v9, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_or_b32_sdwa v9, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v20, s72
+; GFX9-NEXT: v_mov_b32_e32 v21, s56
+; GFX9-NEXT: v_perm_b32 v13, s74, v13, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_perm_b32 v12, v35, v53, s4
+; GFX9-NEXT: v_perm_b32 v20, s62, v20, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v21, v10
+; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v20, v24, s4
+; GFX9-NEXT: v_perm_b32 v13, v26, v42, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v16, v19, s4
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: v_perm_b32 v13, v39, v34, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v14, v18, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v27, v35, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v15, v21, v26, s4
+; GFX9-NEXT: v_perm_b32 v20, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v62, v52, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
+; GFX9-NEXT: v_or_b32_sdwa v14, v20, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v36, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v16, v30, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v17, v37, v29, s5
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v18, v51, v39, s5
+; GFX9-NEXT: v_perm_b32 v20, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v0, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v43, v38, s5
+; GFX9-NEXT: v_perm_b32 v22, v32, v16, s5
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v21, v46, v60, s5
+; GFX9-NEXT: v_or_b32_sdwa v16, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v57, v36, s5
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v40, v17, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v19, v41, v50, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v18, v58, v53, s5
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v40, v45, s5
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_perm_b32 v19, v46, v36, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v61, v57, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v56, v44, s5
+; GFX9-NEXT: v_or_b32_sdwa v17, v17, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v20, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v19, v51, v19, s5
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v33
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: v_perm_b32 v20, v59, v32, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v54, v55, s5
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v23, v58, v23, s5
+; GFX9-NEXT: v_perm_b32 v24, v47, v24, s5
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v58, v49
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: v_perm_b32 v20, v54, v57, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v21, v50, v21, s5
; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v21, v60, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_perm_b32 v21, v33, v60, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v43, v32, s5
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v22, v25, v22, s5
; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v53, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v50, v37
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_mov_b32_e32 v62, v30
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_mov_b32_e32 v47, v26
+; GFX9-NEXT: v_perm_b32 v26, v44, v26, s5
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v22, v52, v59, s5
+; GFX9-NEXT: v_mov_b32_e32 v42, v29
+; GFX9-NEXT: v_mov_b32_e32 v44, v45
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v22, v37, v22, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v38, v37, s5
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v24, v42, v24, s5
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v27, v49, v27, s4
-; GFX9-NEXT: v_mov_b32_e32 v49, v48
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
+; GFX9-NEXT: v_mov_b32_e32 v61, v41
+; GFX9-NEXT: v_mov_b32_e32 v37, v28
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v23, v38, v50, s5
+; GFX9-NEXT: v_mov_b32_e32 v38, v33
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v56, v54
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v55, v23, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v55, v63
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v42, v46, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v49, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v40, v25, s4
+; GFX9-NEXT: v_perm_b32 v25, v25, v41, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v26, v33, v34, s4
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v26, v45, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v45, v31
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v54, v41, v54, s5
+; GFX9-NEXT: v_mov_b32_e32 v52, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v53, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v35, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v39, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
+; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v29, v51, v39, s4
+; GFX9-NEXT: v_perm_b32 v29, v46, v59, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v63, v30
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v30, v35, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
+; GFX9-NEXT: v_perm_b32 v30, v43, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v33, v31, s4
+; GFX9-NEXT: v_mov_b32_e32 v36, v31
+; GFX9-NEXT: v_perm_b32 v31, v31, v33, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v34, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_perm_b32 v33, v48, v33, s5
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v33, v31
+; GFX9-NEXT: v_perm_b32 v31, v40, v31, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: v_or_b32_sdwa v31, v31, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v48, v42
+; GFX9-NEXT: v_mov_b32_e32 v54, v40
; GFX9-NEXT: s_branch .LBB93_3
; GFX9-NEXT: .LBB93_2:
-; GFX9-NEXT: v_mov_b32_e32 v33, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v49, v3
-; GFX9-NEXT: v_mov_b32_e32 v63, v1
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v52, v0
+; GFX9-NEXT: v_mov_b32_e32 v56, v20
+; GFX9-NEXT: v_mov_b32_e32 v62, v8
+; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
+; GFX9-NEXT: v_mov_b32_e32 v38, v1
+; GFX9-NEXT: v_mov_b32_e32 v53, v24
+; GFX9-NEXT: v_mov_b32_e32 v36, v21
+; GFX9-NEXT: v_mov_b32_e32 v39, v33
+; GFX9-NEXT: v_mov_b32_e32 v33, v63
+; GFX9-NEXT: v_mov_b32_e32 v63, v22
+; GFX9-NEXT: v_mov_b32_e32 v37, v2
+; GFX9-NEXT: v_mov_b32_e32 v35, v23
+; GFX9-NEXT: v_mov_b32_e32 v58, v3
+; GFX9-NEXT: v_mov_b32_e32 v50, v7
+; GFX9-NEXT: v_mov_b32_e32 v51, v5
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: v_mov_b32_e32 v53, v33
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB93_3: ; %Flow
@@ -174916,20 +176198,45 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB93_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
; GFX9-NEXT: s_movk_i32 s4, 0x300
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v0, v0, v54, s5
+; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
+; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
+; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
; GFX9-NEXT: v_perm_b32 v0, v0, v63, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v59
+; GFX9-NEXT: v_perm_b32 v0, v0, v46, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v62
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
+; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v37
; GFX9-NEXT: s_add_i32 s74, s74, 3
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; GFX9-NEXT: s_add_i32 s72, s72, 3
; GFX9-NEXT: s_add_i32 s56, s56, 3
; GFX9-NEXT: s_add_i32 s60, s60, 3
@@ -174954,260 +176261,219 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v34, s19
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v51, s5
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v27, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v28, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v30, v38, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
-; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v43
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v60
-; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
-; GFX9-NEXT: v_add_u32_sdwa v21, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
-; GFX9-NEXT: v_perm_b32 v0, v0, v55, s5
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
-; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
-; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
-; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
-; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
-; GFX9-NEXT: v_perm_b32 v0, v0, v41, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v22, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v24, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v23, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v25, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
+; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v20, v50, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v18, v62, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_or_b32_sdwa v26, v31, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
@@ -175218,10 +176484,12 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v1, 3, v1
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s5
+; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s62
; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0
@@ -175281,8 +176549,8 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -178286,995 +179554,1016 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v54, v30
-; VI-NEXT: v_mov_b32_e32 v31, v28
-; VI-NEXT: v_mov_b32_e32 v30, v27
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v31
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, v29
-; VI-NEXT: v_mov_b32_e32 v28, v26
-; VI-NEXT: v_mov_b32_e32 v27, v25
-; VI-NEXT: v_mov_b32_e32 v26, v24
-; VI-NEXT: v_mov_b32_e32 v25, v23
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32
-; VI-NEXT: v_mov_b32_e32 v51, v3
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v15
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v13
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v11
-; VI-NEXT: v_mov_b32_e32 v49, v5
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v49
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v51
-; VI-NEXT: v_mov_b32_e32 v50, v6
-; VI-NEXT: v_mov_b32_e32 v52, v4
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v50
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v52
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v54
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v53
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v28
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v20
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v17
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v27
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v25
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v29
-; VI-NEXT: s_waitcnt vmcnt(11)
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v21
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v16
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v14
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v49, v30
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32
+; VI-NEXT: v_mov_b32_e32 v48, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v48
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v27
; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr5
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr6
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v25
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v24
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v22
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v17
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: ; kill: killed $vgpr3
-; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v4
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v49
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v51
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v50
+; VI-NEXT: ; kill: killed $vgpr13
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v16
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v16
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v15
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v14
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v14
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v13
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v12
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v12
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v11
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v10
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v10
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v7
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v50
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v52
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v24
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v24
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v23
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v53
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v51
-; VI-NEXT: v_mov_b32_e32 v31, v44
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16]
-; VI-NEXT: v_mov_b32_e32 v44, v31
-; VI-NEXT: v_mov_b32_e32 v31, v4
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v2
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[51:52]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v50
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v49
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v52
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17
+; VI-NEXT: v_mov_b32_e32 v29, v15
+; VI-NEXT: v_mov_b32_e32 v30, v16
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v50
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v49
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v49
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v48
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v28
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v28
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v27
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v26
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v26
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v25
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v24
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v24
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v23
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v22
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v22
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v21
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v20
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v20
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v19
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v18
+; VI-NEXT: v_lshrrev_b64 v[56:57], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v17
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v30
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v30
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v29
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v28
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v28
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v27
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v26
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v26
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v25
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v22
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v22
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v21
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v20
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v20
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v19
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, v48
-; VI-NEXT: v_lshrrev_b64 v[47:48], 24, v[49:50]
-; VI-NEXT: v_mov_b32_e32 v48, v3
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[53:54]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v30, v55
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[21:22]
-; VI-NEXT: v_mov_b32_e32 v29, v56
-; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[19:20]
-; VI-NEXT: v_mov_b32_e32 v56, v29
-; VI-NEXT: v_mov_b32_e32 v29, v42
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v42, v29
+; VI-NEXT: v_lshrrev_b32_e32 v13, 24, v16
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v16
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v15
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v16, v30
+; VI-NEXT: v_mov_b32_e32 v30, v42
+; VI-NEXT: v_mov_b32_e32 v15, v43
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
+; VI-NEXT: v_mov_b32_e32 v43, v15
+; VI-NEXT: v_mov_b32_e32 v15, v29
+; VI-NEXT: v_mov_b32_e32 v29, v59
+; VI-NEXT: v_lshrrev_b64 v[58:59], 24, v[19:20]
+; VI-NEXT: v_mov_b32_e32 v59, v29
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v14
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v13
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v12
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v11
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v10
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v10
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[50:51]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[48:49]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v7
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v6
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v6
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v5
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v4
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v4
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v3
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v2
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v2
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v1
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v51
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v51
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[21:22]
+; VI-NEXT: v_mov_b32_e32 v57, v39
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, v42
+; VI-NEXT: v_mov_b32_e32 v42, v30
; VI-NEXT: .LBB94_2: ; %Flow
; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v44, 0x200
-; VI-NEXT: v_add_f16_sdwa v3, v18, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_mov_b32_e32 v31, 0x200
+; VI-NEXT: v_add_f16_sdwa v13, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
; VI-NEXT: v_add_f16_e32 v18, 0x200, v18
-; VI-NEXT: v_add_f16_sdwa v3, v17, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v13, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, 0x200, v17
-; VI-NEXT: v_or_b32_e32 v46, v18, v29
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v43, v18, v21
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_sdwa v3, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_sdwa v4, v24, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
-; VI-NEXT: v_add_f16_sdwa v13, v2, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
-; VI-NEXT: v_add_f16_sdwa v63, v52, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v52, 0x200, v52
-; VI-NEXT: v_add_f16_sdwa v18, v8, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_add_f16_sdwa v30, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v52, v1, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_add_f16_sdwa v6, v7, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v41, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v30
+; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
-; VI-NEXT: v_add_f16_sdwa v15, v10, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v53, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v16, v3, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v14, v12, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
-; VI-NEXT: v_or_b32_e32 v45, v17, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v18, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
+; VI-NEXT: v_add_f16_sdwa v54, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
+; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
+; VI-NEXT: v_add_f16_sdwa v63, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
+; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v42, v17, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_add_f16_sdwa v13, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_or_b32_e32 v56, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_add_f16_sdwa v3, v22, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v55, v19, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_or_b32_e32 v58, v22, v29
-; VI-NEXT: v_add_f16_sdwa v29, v21, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_add_f16_sdwa v3, v26, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v45, v20, v21
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v17, v2, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
+; VI-NEXT: v_or_b32_e32 v44, v19, v21
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v33, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
+; VI-NEXT: v_or_b32_e32 v40, v20, v21
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v39, v19, v21
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v33, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_f16_sdwa v13, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
+; VI-NEXT: v_or_b32_e32 v47, v20, v21
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: v_add_f16_sdwa v13, v26, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v57, v21, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_sdwa v21, v25, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v39, v26, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
+; VI-NEXT: v_add_f16_sdwa v33, v25, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
-; VI-NEXT: v_add_f16_sdwa v3, v28, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v38, v25, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v46, v19, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_or_b32_e32 v38, v26, v21
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: v_add_f16_sdwa v13, v28, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v28, 0x200, v28
-; VI-NEXT: v_add_f16_sdwa v21, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v60, v28, v29
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
+; VI-NEXT: v_add_f16_sdwa v33, v27, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v37, v25, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_or_b32_e32 v56, v28, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v13, v49, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v49, 0x200, v49
+; VI-NEXT: v_add_f16_sdwa v33, v48, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v48, 0x200, v48
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_add_f16_sdwa v29, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_add_f16_sdwa v15, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
+; VI-NEXT: v_or_b32_e32 v55, v27, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: v_add_f16_sdwa v13, v51, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v51, 0x200, v51
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v36, v49, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: v_add_f16_sdwa v33, v50, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v50, 0x200, v50
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v35, v48, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v48, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
+; VI-NEXT: v_add_f16_sdwa v49, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
+; VI-NEXT: v_add_f16_sdwa v13, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
+; VI-NEXT: v_or_b32_e32 v34, v51, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v33
+; VI-NEXT: v_or_b32_e32 v33, v50, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v17
+; VI-NEXT: v_or_b32_e32 v58, v2, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v52
+; VI-NEXT: v_or_b32_e32 v51, v8, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v41
+; VI-NEXT: v_or_b32_e32 v57, v1, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v48
+; VI-NEXT: v_or_b32_e32 v50, v7, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v53
+; VI-NEXT: v_or_b32_e32 v60, v4, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v16
+; VI-NEXT: v_or_b32_e32 v28, v10, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v18
+; VI-NEXT: v_or_b32_e32 v59, v3, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v54
+; VI-NEXT: v_or_b32_e32 v27, v9, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v49
+; VI-NEXT: v_or_b32_e32 v62, v6, v21
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v63
+; VI-NEXT: v_or_b32_e32 v26, v12, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v13
+; VI-NEXT: v_or_b32_e32 v61, v5, v21
+; VI-NEXT: v_or_b32_e32 v25, v11, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v29
; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
-; VI-NEXT: v_or_b32_e32 v59, v27, v29
-; VI-NEXT: v_mov_b32_e32 v16, v27
-; VI-NEXT: v_mov_b32_e32 v17, v28
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_f16_sdwa v3, v22, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
-; VI-NEXT: v_or_b32_e32 v37, v22, v29
-; VI-NEXT: v_add_f16_sdwa v29, v21, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v24, v20, v23
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v15
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_add_f16_sdwa v14, v21, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
+; VI-NEXT: v_or_b32_e32 v23, v19, v23
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_add_f16_sdwa v19, v22, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v19
+; VI-NEXT: v_or_b32_e32 v32, v22, v20
; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_add_f16_sdwa v3, v54, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v54, 0x200, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v22, v50, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v50, 0x200, v50
-; VI-NEXT: v_or_b32_e32 v36, v21, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_sdwa v21, v53, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v53, 0x200, v53
-; VI-NEXT: v_or_b32_e32 v62, v54, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
-; VI-NEXT: v_or_b32_e32 v61, v53, v29
-; VI-NEXT: v_add_f16_sdwa v3, v23, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v4
-; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
-; VI-NEXT: v_or_b32_e32 v34, v24, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v33, v23, v29
-; VI-NEXT: v_add_f16_sdwa v3, v1, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
-; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
-; VI-NEXT: v_or_b32_e32 v43, v2, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v42, v1, v29
-; VI-NEXT: v_add_f16_sdwa v3, v51, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v41, v52, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_add_f16_sdwa v3, v49, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v49, 0x200, v49
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_e32 v51, 0x200, v51
-; VI-NEXT: v_or_b32_e32 v40, v51, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v22
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v4, v51
-; VI-NEXT: v_mov_b32_e32 v5, v52
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v14
+; VI-NEXT: v_or_b32_e32 v31, v21, v20
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v32
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v31
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v24
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v23
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v26
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v25
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v28
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v27
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v51
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v50
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[50:51]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v62
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v61
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[61:62]
+; VI-NEXT: v_mov_b32_e32 v61, v17
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v60
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v59
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v27, v53
-; VI-NEXT: v_mov_b32_e32 v28, v54
-; VI-NEXT: v_add_f16_sdwa v21, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_or_b32_e32 v48, v50, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: v_or_b32_e32 v47, v49, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v18
-; VI-NEXT: v_or_b32_e32 v50, v8, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v6
-; VI-NEXT: v_or_b32_e32 v49, v7, v29
-; VI-NEXT: v_add_f16_sdwa v3, v9, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v15
-; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
-; VI-NEXT: v_or_b32_e32 v52, v10, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v51, v9, v29
-; VI-NEXT: v_add_f16_sdwa v3, v11, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v14
-; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
-; VI-NEXT: v_or_b32_e32 v54, v12, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v53, v11, v29
-; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
-; VI-NEXT: v_or_b32_e32 v32, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v31, v19, v29
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_f16_sdwa v35, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
-; VI-NEXT: v_or_b32_e32 v30, v20, v29
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v30
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v19, v29
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v29
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v32
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v54
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v53
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v52
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v50
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v48
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v47
-; VI-NEXT: v_lshrrev_b64 v[47:48], 24, v[47:48]
-; VI-NEXT: v_mov_b32_e32 v48, v6
-; VI-NEXT: v_mov_b32_e32 v6, v3
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v42
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v34
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[53:54]
-; VI-NEXT: v_mov_b32_e32 v54, v28
-; VI-NEXT: v_mov_b32_e32 v53, v27
-; VI-NEXT: v_mov_b32_e32 v28, v17
-; VI-NEXT: v_mov_b32_e32 v27, v16
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[51:52]
-; VI-NEXT: v_mov_b32_e32 v52, v5
-; VI-NEXT: v_mov_b32_e32 v51, v4
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[33:34]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v61
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[61:62]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v36
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v59
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[59:60]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v38
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v57
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[57:58]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v35, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v21, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v14, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v15, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v18, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v22, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v63, 8, 8
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v13, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v41
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v40
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[40:41]
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v43
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[42:43]
-; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[55:56]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[45:46]
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v46
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[49:50]
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v45
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v57, v18
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v58
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v57
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v33
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v36
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v35
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[35:36]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v56
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v55
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[55:56]
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v38
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v37
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v47
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[37:38]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v46
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v40
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[59:60]
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v39
+; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[57:58]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[46:47]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v45
+; VI-NEXT: v_lshrrev_b64 v[58:59], 24, v[44:45]
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v59, v19
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[39:40]
+; VI-NEXT: v_mov_b32_e32 v62, v29
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v43
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[42:43]
+; VI-NEXT: v_mov_b32_e32 v43, v13
+; VI-NEXT: v_bfe_u32 v13, v59, 8, 8
+; VI-NEXT: v_mov_b32_e32 v55, v49
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v62, 8, 8
+; VI-NEXT: v_mov_b32_e32 v35, v53
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v55, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v34
+; VI-NEXT: v_mov_b32_e32 v34, v30
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v35, 8, 8
+; VI-NEXT: v_mov_b32_e32 v37, v54
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v34, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v37, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v48, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v61, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, v63
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v44
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v42
+; VI-NEXT: v_mov_b32_e32 v42, v18
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v61, v21
-; VI-NEXT: v_mov_b32_e32 v58, v14
-; VI-NEXT: v_mov_b32_e32 v37, v15
-; VI-NEXT: v_mov_b32_e32 v34, v22
-; VI-NEXT: v_mov_b32_e32 v59, v63
-; VI-NEXT: v_mov_b32_e32 v36, v13
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v56, v23
+; VI-NEXT: v_mov_b32_e32 v53, v16
+; VI-NEXT: v_mov_b32_e32 v16, v14
+; VI-NEXT: v_mov_b32_e32 v40, v24
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_bfe_u32 v3, v3, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(13)
-; VI-NEXT: v_bfe_u32 v3, v56, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(11)
-; VI-NEXT: v_bfe_u32 v3, v38, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v42, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v46, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v44, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v45, v3
-; VI-NEXT: v_bfe_u32 v3, v3, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_mov_b32_e32 v33, v3
-; VI-NEXT: v_bfe_u32 v63, v3, 8, 8
+; VI-NEXT: v_bfe_u32 v13, v31, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_bfe_u32 v13, v13, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v46, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v63, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v60, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v45, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v47, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v13, v36, 8, 8
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; VI-NEXT: .LBB94_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v4, v52, v5, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v2, v30, s4
-; VI-NEXT: v_perm_b32 v29, v39, v43, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_perm_b32 v17, v17, v60, s4
-; VI-NEXT: v_perm_b32 v18, v18, v62, s4
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v1, v1, v29
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v30, v3, v40, s4
-; VI-NEXT: v_perm_b32 v3, v51, v31, s4
-; VI-NEXT: v_perm_b32 v31, v5, v47, s4
-; VI-NEXT: v_perm_b32 v5, v49, v6, s4
-; VI-NEXT: v_perm_b32 v6, v50, v32, s4
-; VI-NEXT: v_perm_b32 v32, v48, v13, s4
+; VI-NEXT: v_perm_b32 v19, v52, v40, s4
+; VI-NEXT: v_perm_b32 v20, v53, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_perm_b32 v17, v17, v44, s4
+; VI-NEXT: v_perm_b32 v18, v18, v32, s4
+; VI-NEXT: v_perm_b32 v30, v33, v58, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v1, v19
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v3, v3, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v4, v4, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v21, v54, v13, s4
; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v53, v16, v53, s4
+; VI-NEXT: v_perm_b32 v5, v5, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v6, v6, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v22, v41, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v7, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v8, v8, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v39, v13, v14, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v42, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v9, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v10, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v48, v13, v14, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v24, v43, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v11, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v12, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v49, v13, v14, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v52, v15, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v13, v15, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v14, v14, v15, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v50, v15, v21, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v16, v21, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v51, v21, v41, s4
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v29, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v52, v21, v55, s4
+; VI-NEXT: v_perm_b32 v16, v16, v29, s4
+; VI-NEXT: v_perm_b32 v29, v38, v39, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v36, v1, s4
+; VI-NEXT: v_perm_b32 v1, v61, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v20
; VI-NEXT: v_or_b32_e32 v1, v3, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v59, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v4, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v31
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v21
; VI-NEXT: v_or_b32_e32 v1, v5, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v34, v1, s4
+; VI-NEXT: v_perm_b32 v1, v37, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v6, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v7, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v57, v1, s4
+; VI-NEXT: v_perm_b32 v1, v34, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v8, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v9, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v37, v1, s4
+; VI-NEXT: v_perm_b32 v1, v35, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v10, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v24
; VI-NEXT: v_or_b32_e32 v1, v11, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v58, v1, s4
+; VI-NEXT: v_perm_b32 v1, v55, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v12, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
; VI-NEXT: v_or_b32_e32 v1, v13, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v61, v1, s4
+; VI-NEXT: v_perm_b32 v1, v62, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v14, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v53
; VI-NEXT: v_or_b32_e32 v1, v15, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v35, v1, s4
+; VI-NEXT: v_perm_b32 v1, v59, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v16, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v29
; VI-NEXT: v_or_b32_e32 v1, v17, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_perm_b32 v1, v33, v63, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v36, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v18, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v45, v2, s4
+; VI-NEXT: v_perm_b32 v2, v47, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v4, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v3, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v44, v2, s4
+; VI-NEXT: v_perm_b32 v2, v45, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v25, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v4, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v26, v1, s4
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v46, v2, s4
+; VI-NEXT: v_perm_b32 v2, v60, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v25, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v27, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
+; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v42, v2, s4
+; VI-NEXT: v_perm_b32 v2, v63, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v27, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v38, v2, s4
+; VI-NEXT: v_perm_b32 v2, v46, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v48, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v53, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v54, v1, s4
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v56, v2, s4
+; VI-NEXT: v_perm_b32 v1, v49, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v50, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v23, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v51, v57, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v24, v1, s4
+; VI-NEXT: v_perm_b32 v2, v31, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -179319,838 +180608,906 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(33)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB94_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(22)
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30
-; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30
-; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29
-; GFX9-NEXT: v_mov_b32_e32 v43, v54
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(58)
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v17
+; GFX9-NEXT: v_mov_b32_e32 v34, v41
+; GFX9-NEXT: v_mov_b32_e32 v33, v40
; GFX9-NEXT: .LBB94_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB94_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: s_movk_i32 s6, 0x200
+; GFX9-NEXT: v_pk_add_f16 v16, v16, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v15, v15, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX9-NEXT: v_pk_add_f16 v14, v14, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v13, v13, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
+; GFX9-NEXT: v_pk_add_f16 v12, v12, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
; GFX9-NEXT: v_pk_add_f16 v32, v32, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(46)
; GFX9-NEXT: v_pk_add_f16 v31, v31, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
; GFX9-NEXT: v_pk_add_f16 v30, v30, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v29, v29, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
; GFX9-NEXT: v_pk_add_f16 v28, v28, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v27, v27, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
; GFX9-NEXT: v_pk_add_f16 v26, v26, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v25, v25, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
; GFX9-NEXT: v_pk_add_f16 v24, v24, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v23, v23, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
; GFX9-NEXT: v_pk_add_f16 v22, v22, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v21, v21, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: v_pk_add_f16 v16, v16, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_pk_add_f16 v20, v20, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v19, v19, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: v_pk_add_f16 v15, v15, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: v_pk_add_f16 v14, v14, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: v_pk_add_f16 v18, v18, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v17, v17, s6 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32
-; GFX9-NEXT: v_pk_add_f16 v13, v13, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31
-; GFX9-NEXT: v_pk_add_f16 v12, v12, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30
-; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
-; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27
-; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26
-; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24
-; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24
-; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23
-; GFX9-NEXT: v_pk_add_f16 v20, v20, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v19, v19, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22
-; GFX9-NEXT: v_pk_add_f16 v18, v18, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v17, v17, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v17
; GFX9-NEXT: .LBB94_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
-; GFX9-NEXT: v_perm_b32 v33, v62, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v55, v63, v42, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1
-; GFX9-NEXT: v_perm_b32 v39, v39, v53, s4
-; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v44, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v61, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v60, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v54, s4
-; GFX9-NEXT: v_perm_b32 v17, v17, v59, s4
-; GFX9-NEXT: v_perm_b32 v18, v18, v58, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v40, v41, v40, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v52, v41, v52, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v51, v41, v51, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v10, v10, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v50, v41, v50, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v49, v41, v49, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v41, v2, v62, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v50, s4
+; GFX9-NEXT: v_perm_b32 v10, v10, v51, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v59, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v58, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v56, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v40, s4
+; GFX9-NEXT: v_perm_b32 v40, v1, v63, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v60, v60, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v57, v57, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v45, v45, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v53, v53, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v39, v49, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v49, v1, v49, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v48, v41, v48, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v50, v1, v50, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v41, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v48, v48, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v36, v36, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v40
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v53, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v41
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v60, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v57, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v45, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v35, v34, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v43, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v38, v36, s4
+; GFX9-NEXT: v_perm_b32 v1, v35, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v57, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v47, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_perm_b32 v1, v20, v56, s4
+; GFX9-NEXT: v_perm_b32 v1, v20, v44, s4
+; GFX9-NEXT: v_perm_b32 v2, v42, v55, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v21, v47, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v21, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v46, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v52, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -180174,60 +181531,56 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v64f16_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:96
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:92
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
@@ -180270,26 +181623,26 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
@@ -180325,17 +181678,22 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB94_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[7:8]
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v38.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[1:2]
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
@@ -180372,11 +181730,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v32
@@ -180400,25 +181758,22 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v50.l
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[17:18]
@@ -180511,11 +181866,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v32
@@ -180539,64 +181894,64 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
; GFX11-TRUE16-NEXT: .LBB94_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v45, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v46, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v41, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v63, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v61, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v179, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v179, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v1
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v176, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v3
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v176, v166, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v161, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v161, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v66, 16, v3
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v149, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v149, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v135, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v135, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v132, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v35, 16, v4
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v39, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v50, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v132, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v50, 16, v4
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v119, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v117, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v117, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v113, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v113, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v101, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v99, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v99, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v51, v97, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v55, 16, v7
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v97, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v64, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v66, 16, v8
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v9
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v10
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v11
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v51, 16, v12
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v9
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v52, 16, v10
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v51, 16, v11
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v12
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v13, v87, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v86, v48, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v14, v85, 0xc0c0004
@@ -180605,30 +181960,30 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v81, v36, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v16, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v71, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v77, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v76, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v75, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v74, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v74, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v72, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v63, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v61, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v58, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v56, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v39, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v57, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v47, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v44, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v42, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v42, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v24, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v181, v180, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v25, v177, 0xc0c0004
@@ -180665,77 +182020,71 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:96
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v64f16_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:92
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:84
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
@@ -180787,31 +182136,31 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
@@ -180844,15 +182193,22 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB94_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v25
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v51, v54
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
@@ -180895,11 +182251,9 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30
@@ -180916,29 +182270,25 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
; GFX11-FAKE16-NEXT: .LBB94_2: ; %Flow
@@ -181054,49 +182404,50 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v17
; GFX11-FAKE16-NEXT: .LBB94_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v161, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v149, v147, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v145, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v134, v52, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v132, v131, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v161, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v149, v147, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v131, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v55, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v64, 16, v2
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v128, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v119, v118, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v119, v118, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v114, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v114, v113, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v4
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v36, v103, v36, 0xc0c0004
@@ -181105,17 +182456,16 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v99, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v35, v98, v35, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v97, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v96, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v96, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v55, 16, v6
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v36, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v48, 16, v12
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v86, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v85, v34, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v84, 0xc0c0004
@@ -181124,33 +182474,33 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v80, v33, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v71, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v76, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v75, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v74, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v51, v67, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v74, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v73, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v62, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v61, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v60, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v57, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v47, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v72, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v61, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v59, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v56, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v46, v45, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v44, v54, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v42, v41, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v41, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v183, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v181, v180, 0xc0c0004
@@ -181184,28 +182534,26 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:88
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:92
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -181272,396 +182620,399 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_writelane_b32 v34, s99, 33
; SI-NEXT: v_writelane_b32 v34, s30, 34
; SI-NEXT: v_writelane_b32 v34, s31, 35
-; SI-NEXT: s_lshr_b32 s5, s16, 16
-; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane
; SI-NEXT: s_lshr_b32 s6, s18, 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_writelane_b32 v36, s5, 0
+; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane
; SI-NEXT: s_lshr_b32 s7, s20, 16
-; SI-NEXT: v_writelane_b32 v36, s6, 1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v37, s6, 0
; SI-NEXT: s_lshr_b32 s8, s22, 16
-; SI-NEXT: v_writelane_b32 v36, s7, 2
+; SI-NEXT: v_writelane_b32 v37, s7, 2
; SI-NEXT: s_lshr_b32 s9, s24, 16
-; SI-NEXT: v_writelane_b32 v36, s8, 3
+; SI-NEXT: v_writelane_b32 v37, s8, 4
; SI-NEXT: s_lshr_b32 s10, s26, 16
-; SI-NEXT: v_writelane_b32 v36, s9, 4
+; SI-NEXT: v_writelane_b32 v37, s9, 6
; SI-NEXT: s_lshr_b32 s11, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s94, v3
-; SI-NEXT: v_writelane_b32 v36, s10, 5
-; SI-NEXT: v_readfirstlane_b32 s30, v5
-; SI-NEXT: s_lshr_b32 s12, s94, 16
-; SI-NEXT: v_writelane_b32 v36, s11, 6
-; SI-NEXT: v_readfirstlane_b32 s69, v18
-; SI-NEXT: v_readfirstlane_b32 s71, v17
-; SI-NEXT: v_readfirstlane_b32 s65, v16
-; SI-NEXT: v_readfirstlane_b32 s67, v15
-; SI-NEXT: v_readfirstlane_b32 s53, v14
-; SI-NEXT: v_readfirstlane_b32 s55, v13
-; SI-NEXT: v_readfirstlane_b32 s49, v12
-; SI-NEXT: v_readfirstlane_b32 s51, v11
-; SI-NEXT: v_readfirstlane_b32 s95, v10
-; SI-NEXT: v_readfirstlane_b32 s39, v9
-; SI-NEXT: v_readfirstlane_b32 s34, v8
-; SI-NEXT: v_readfirstlane_b32 s36, v7
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v6
-; SI-NEXT: s_lshr_b32 s13, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: v_readfirstlane_b32 s89, v2
-; SI-NEXT: v_readfirstlane_b32 s91, v1
-; SI-NEXT: v_writelane_b32 v36, s12, 7
-; SI-NEXT: s_lshr_b32 s88, s29, 16
-; SI-NEXT: s_lshr_b32 s79, s27, 16
-; SI-NEXT: s_lshr_b32 s78, s25, 16
-; SI-NEXT: s_lshr_b32 s77, s23, 16
-; SI-NEXT: s_lshr_b32 s76, s21, 16
-; SI-NEXT: s_lshr_b32 s99, s19, 16
-; SI-NEXT: s_lshr_b32 s98, s17, 16
-; SI-NEXT: s_lshr_b32 s70, s69, 16
-; SI-NEXT: s_lshr_b32 s31, s71, 16
-; SI-NEXT: s_lshr_b32 s66, s65, 16
-; SI-NEXT: s_lshr_b32 s68, s67, 16
-; SI-NEXT: s_lshr_b32 s54, s53, 16
-; SI-NEXT: s_lshr_b32 s64, s55, 16
-; SI-NEXT: s_lshr_b32 s50, s49, 16
-; SI-NEXT: s_lshr_b32 s52, s51, 16
-; SI-NEXT: s_lshr_b32 s38, s95, 16
-; SI-NEXT: s_lshr_b32 s37, s39, 16
+; SI-NEXT: v_writelane_b32 v37, s10, 7
+; SI-NEXT: s_lshr_b32 s5, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s51, v1
+; SI-NEXT: v_writelane_b32 v37, s11, 8
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3
+; SI-NEXT: s_lshr_b32 s12, s51, 16
+; SI-NEXT: v_writelane_b32 v37, s5, 9
+; SI-NEXT: v_readfirstlane_b32 s89, v5
+; SI-NEXT: s_lshr_b32 s13, vcc_lo, 16
+; SI-NEXT: v_writelane_b32 v37, s12, 10
+; SI-NEXT: s_mov_b32 s69, s16
+; SI-NEXT: v_readfirstlane_b32 s95, v18
+; SI-NEXT: v_readfirstlane_b32 s16, v17
+; SI-NEXT: v_readfirstlane_b32 s34, v16
+; SI-NEXT: v_readfirstlane_b32 s30, v15
+; SI-NEXT: v_readfirstlane_b32 s92, v14
+; SI-NEXT: v_readfirstlane_b32 s36, v13
+; SI-NEXT: v_readfirstlane_b32 s65, v12
+; SI-NEXT: v_readfirstlane_b32 s94, v11
+; SI-NEXT: v_readfirstlane_b32 s71, v10
+; SI-NEXT: v_readfirstlane_b32 s67, v9
+; SI-NEXT: v_readfirstlane_b32 s80, v8
+; SI-NEXT: v_readfirstlane_b32 s70, v7
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
+; SI-NEXT: s_lshr_b32 s14, s89, 16
+; SI-NEXT: v_readfirstlane_b32 s54, v4
+; SI-NEXT: v_readfirstlane_b32 s53, v2
+; SI-NEXT: v_writelane_b32 v37, s13, 11
+; SI-NEXT: s_mov_b32 s79, s17
+; SI-NEXT: s_lshr_b32 s49, s29, 16
+; SI-NEXT: s_lshr_b32 s38, s27, 16
+; SI-NEXT: s_lshr_b32 s52, s25, 16
+; SI-NEXT: s_lshr_b32 s50, s23, 16
+; SI-NEXT: s_lshr_b32 s48, s21, 16
+; SI-NEXT: s_lshr_b32 s91, s19, 16
+; SI-NEXT: s_lshr_b32 s90, s17, 16
+; SI-NEXT: s_lshr_b32 s17, s95, 16
+; SI-NEXT: s_lshr_b32 s96, s16, 16
; SI-NEXT: s_lshr_b32 s35, s34, 16
-; SI-NEXT: s_lshr_b32 s14, s36, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s31, s30, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
-; SI-NEXT: s_lshr_b32 s90, s89, 16
-; SI-NEXT: s_lshr_b32 s85, s91, 16
+; SI-NEXT: s_lshr_b32 s37, s36, 16
+; SI-NEXT: s_lshr_b32 s64, s65, 16
+; SI-NEXT: s_lshr_b32 s77, s94, 16
+; SI-NEXT: s_lshr_b32 s66, s71, 16
+; SI-NEXT: s_lshr_b32 s76, s67, 16
+; SI-NEXT: s_lshr_b32 s81, s80, 16
+; SI-NEXT: s_lshr_b32 s15, s70, 16
+; SI-NEXT: s_lshr_b32 s88, vcc_hi, 16
+; SI-NEXT: s_lshr_b32 s55, s54, 16
+; SI-NEXT: s_lshr_b32 s39, s53, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v36, s13, 8
+; SI-NEXT: v_writelane_b32 v37, s14, 12
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v36, s14, 9
-; SI-NEXT: v_writelane_b32 v36, s37, 10
-; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v37, s15, 13
+; SI-NEXT: v_writelane_b32 v37, s76, 14
+; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB95_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s74, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s4, s79, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s75, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s72, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s73, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s48, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
-; SI-NEXT: s_lshr_b64 s[96:97], s[74:75], 24
+; SI-NEXT: s_lshl_b32 s5, s50, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 15
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 16
-; SI-NEXT: s_lshr_b64 s[96:97], s[74:75], 16
+; SI-NEXT: s_lshl_b32 s5, s52, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 13
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s79, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 14
-; SI-NEXT: s_lshr_b64 s[96:97], s[74:75], 8
+; SI-NEXT: s_lshl_b32 s5, s38, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s11, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 11
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 12
-; SI-NEXT: s_lshr_b64 s[96:97], s[72:73], 24
+; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s57, s4, s5
-; SI-NEXT: s_and_b32 s4, s91, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 21
+; SI-NEXT: s_and_b32 s4, s51, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s89, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 22
-; SI-NEXT: s_lshr_b64 s[96:97], s[72:73], 16
+; SI-NEXT: s_and_b32 s4, s53, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s94, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 19
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s13, 16
; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s92, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 20
-; SI-NEXT: s_lshr_b64 s[96:97], s[72:73], 8
+; SI-NEXT: s_and_b32 s4, s54, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s55, 16
; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s13, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 17
+; SI-NEXT: s_and_b32 s4, s89, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 18
-; SI-NEXT: s_lshr_b64 s[96:97], s[62:63], 24
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s14, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 27
+; SI-NEXT: s_and_b32 s4, s70, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s14, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 28
-; SI-NEXT: s_lshr_b64 s[96:97], s[62:63], 16
+; SI-NEXT: s_and_b32 s4, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s15, s4, s5
-; SI-NEXT: s_and_b32 s4, s39, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s37, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 25
+; SI-NEXT: s_and_b32 s4, s67, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s12, s4, s5
-; SI-NEXT: s_and_b32 s4, s95, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s38, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 26
-; SI-NEXT: s_lshr_b64 s[96:97], s[62:63], 8
+; SI-NEXT: s_and_b32 s4, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s52, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 23
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s10, s4, s5
-; SI-NEXT: s_and_b32 s4, s49, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s50, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 24
-; SI-NEXT: s_lshr_b64 s[96:97], s[58:59], 24
-; SI-NEXT: s_or_b32 s11, s4, s5
-; SI-NEXT: s_and_b32 s4, s55, 0xffff
+; SI-NEXT: s_and_b32 s4, s65, 0xffff
; SI-NEXT: s_lshl_b32 s5, s64, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 33
+; SI-NEXT: s_or_b32 s11, s4, s5
+; SI-NEXT: s_and_b32 s4, s36, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s8, s4, s5
-; SI-NEXT: s_and_b32 s4, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s54, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 34
-; SI-NEXT: s_lshr_b64 s[96:97], s[58:59], 16
+; SI-NEXT: s_and_b32 s4, s92, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s9, s4, s5
-; SI-NEXT: s_and_b32 s4, s67, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 31
+; SI-NEXT: s_and_b32 s4, s30, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s6, s4, s5
-; SI-NEXT: s_and_b32 s4, s65, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s66, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 32
-; SI-NEXT: s_lshr_b64 s[96:97], s[58:59], 8
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: v_writelane_b32 v36, s96, 29
+; SI-NEXT: s_and_b32 s4, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s96, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s37, s70, 16
-; SI-NEXT: v_writelane_b32 v36, s97, 30
-; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 24
-; SI-NEXT: s_or_b32 s5, s5, s37
-; SI-NEXT: s_lshr_b32 s37, s75, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 39
-; SI-NEXT: v_writelane_b32 v35, s37, 2
-; SI-NEXT: s_lshr_b32 s37, s73, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 40
-; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v35, s37, 1
-; SI-NEXT: s_lshr_b32 s37, s63, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 37
-; SI-NEXT: v_writelane_b32 v35, s37, 0
-; SI-NEXT: s_lshr_b32 s37, s59, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 38
-; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v37, s37, 63
-; SI-NEXT: s_lshr_b32 s37, s47, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 35
-; SI-NEXT: v_writelane_b32 v37, s37, 62
-; SI-NEXT: s_lshr_b32 s37, s61, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 36
-; SI-NEXT: s_lshr_b64 s[96:97], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v37, s37, 61
-; SI-NEXT: s_lshr_b32 s37, s57, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 45
-; SI-NEXT: v_writelane_b32 v37, s37, 60
-; SI-NEXT: s_lshr_b32 s37, s45, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 46
-; SI-NEXT: s_lshr_b64 s[96:97], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v37, s37, 59
-; SI-NEXT: s_lshr_b32 s37, s43, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 43
-; SI-NEXT: v_writelane_b32 v37, s37, 58
-; SI-NEXT: s_lshr_b32 s37, s41, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 44
-; SI-NEXT: s_lshr_b64 s[96:97], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v37, s37, 57
-; SI-NEXT: s_lshr_b32 s37, s15, 8
-; SI-NEXT: v_writelane_b32 v36, s96, 41
-; SI-NEXT: v_writelane_b32 v37, s37, 56
-; SI-NEXT: s_lshr_b32 s37, s13, 8
-; SI-NEXT: v_writelane_b32 v36, s97, 42
-; SI-NEXT: s_mov_b32 s96, s85
-; SI-NEXT: s_lshr_b64 s[84:85], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v37, s37, 55
-; SI-NEXT: s_lshr_b32 s37, s11, 8
-; SI-NEXT: v_writelane_b32 v36, s84, 51
-; SI-NEXT: v_writelane_b32 v37, s37, 54
-; SI-NEXT: s_lshr_b32 s37, s9, 8
-; SI-NEXT: v_writelane_b32 v36, s85, 52
-; SI-NEXT: s_lshr_b64 s[84:85], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v37, s37, 53
-; SI-NEXT: s_lshr_b32 s37, s7, 8
-; SI-NEXT: v_writelane_b32 v36, s84, 49
-; SI-NEXT: v_writelane_b32 v37, s37, 52
-; SI-NEXT: s_lshr_b32 s37, s5, 8
-; SI-NEXT: v_writelane_b32 v36, s85, 50
-; SI-NEXT: s_lshr_b64 s[84:85], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v37, s37, 51
-; SI-NEXT: s_bfe_u32 s37, s98, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s84, 47
-; SI-NEXT: v_writelane_b32 v37, s37, 50
-; SI-NEXT: s_bfe_u32 s37, s99, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s85, 48
-; SI-NEXT: s_lshr_b64 s[84:85], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v37, s37, 49
-; SI-NEXT: s_bfe_u32 s37, s76, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s84, 57
-; SI-NEXT: v_writelane_b32 v37, s37, 48
-; SI-NEXT: s_bfe_u32 s37, s77, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s85, 58
-; SI-NEXT: s_lshr_b64 s[84:85], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v37, s37, 47
-; SI-NEXT: s_bfe_u32 s37, s78, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s84, 55
-; SI-NEXT: v_writelane_b32 v37, s37, 46
-; SI-NEXT: s_bfe_u32 s37, s79, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s85, 56
-; SI-NEXT: s_lshr_b64 s[84:85], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v37, s37, 45
-; SI-NEXT: s_bfe_u32 s37, s88, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s84, 53
-; SI-NEXT: v_writelane_b32 v37, s37, 44
-; SI-NEXT: s_bfe_u32 s37, s90, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s85, 54
-; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v37, s37, 43
-; SI-NEXT: v_writelane_b32 v36, s84, 63
-; SI-NEXT: v_writelane_b32 v37, s85, 0
-; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v36, s84, 61
-; SI-NEXT: v_writelane_b32 v36, s85, 62
-; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v36, s84, 59
-; SI-NEXT: v_writelane_b32 v36, s85, 60
-; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 5
-; SI-NEXT: v_writelane_b32 v37, s85, 6
-; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 3
-; SI-NEXT: v_writelane_b32 v37, s85, 4
-; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 1
-; SI-NEXT: v_writelane_b32 v37, s85, 2
-; SI-NEXT: s_lshr_b64 s[84:85], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 11
-; SI-NEXT: v_writelane_b32 v37, s85, 12
-; SI-NEXT: s_lshr_b64 s[84:85], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 9
-; SI-NEXT: v_writelane_b32 v37, s85, 10
-; SI-NEXT: s_lshr_b64 s[84:85], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 7
-; SI-NEXT: v_writelane_b32 v37, s85, 8
-; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 17
-; SI-NEXT: v_writelane_b32 v37, s85, 18
-; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 15
-; SI-NEXT: v_writelane_b32 v37, s85, 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 13
-; SI-NEXT: v_writelane_b32 v37, s85, 14
-; SI-NEXT: s_lshr_b64 s[84:85], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 23
-; SI-NEXT: v_writelane_b32 v37, s85, 24
-; SI-NEXT: s_lshr_b64 s[84:85], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 21
-; SI-NEXT: v_writelane_b32 v37, s85, 22
-; SI-NEXT: s_lshr_b64 s[84:85], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 19
-; SI-NEXT: v_writelane_b32 v37, s85, 20
-; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 29
-; SI-NEXT: v_writelane_b32 v37, s85, 30
-; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 27
-; SI-NEXT: v_writelane_b32 v37, s85, 28
-; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 25
-; SI-NEXT: v_writelane_b32 v37, s85, 26
-; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 35
-; SI-NEXT: v_writelane_b32 v37, s85, 36
-; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 33
-; SI-NEXT: v_writelane_b32 v37, s85, 34
-; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v37, s84, 31
-; SI-NEXT: v_writelane_b32 v37, s85, 32
-; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v37, s84, 39
-; SI-NEXT: v_writelane_b32 v37, s85, 40
-; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v37, s84, 41
-; SI-NEXT: v_writelane_b32 v37, s85, 42
-; SI-NEXT: s_mov_b32 s85, s96
-; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v37, s96, 37
-; SI-NEXT: s_bfe_u32 s80, s93, 0x80008
-; SI-NEXT: s_bfe_u32 s48, vcc_hi, 0x80008
-; SI-NEXT: s_bfe_u32 s83, s35, 0x80008
-; SI-NEXT: s_bfe_u32 s86, s38, 0x80008
-; SI-NEXT: s_bfe_u32 s87, s50, 0x80008
-; SI-NEXT: s_bfe_u32 s81, s54, 0x80008
-; SI-NEXT: s_bfe_u32 s37, s66, 0x80008
-; SI-NEXT: s_bfe_u32 s82, s70, 0x80008
-; SI-NEXT: v_writelane_b32 v37, s97, 38
-; SI-NEXT: s_mov_b64 s[96:97], 0
+; SI-NEXT: s_and_b32 s5, s95, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s17, 16
+; SI-NEXT: s_or_b32 s5, s5, s76
+; SI-NEXT: s_lshr_b32 s76, s75, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 2
+; SI-NEXT: s_lshr_b32 s76, s73, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 1
+; SI-NEXT: s_lshr_b32 s76, s63, 8
+; SI-NEXT: v_writelane_b32 v35, s76, 0
+; SI-NEXT: s_lshr_b32 s76, s59, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 63
+; SI-NEXT: s_lshr_b32 s76, s47, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 62
+; SI-NEXT: s_lshr_b32 s76, s61, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 61
+; SI-NEXT: s_lshr_b32 s76, s57, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 60
+; SI-NEXT: s_lshr_b32 s76, s45, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 59
+; SI-NEXT: s_lshr_b32 s76, s43, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 58
+; SI-NEXT: s_lshr_b32 s76, s41, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 57
+; SI-NEXT: s_lshr_b32 s76, s15, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 56
+; SI-NEXT: s_lshr_b32 s76, s13, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 55
+; SI-NEXT: s_lshr_b32 s76, s11, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 54
+; SI-NEXT: s_lshr_b32 s76, s9, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 53
+; SI-NEXT: s_lshr_b32 s76, s7, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 52
+; SI-NEXT: s_lshr_b32 s76, s5, 8
+; SI-NEXT: v_writelane_b32 v36, s76, 51
+; SI-NEXT: s_bfe_u32 s76, s90, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 50
+; SI-NEXT: s_bfe_u32 s76, s91, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 49
+; SI-NEXT: s_bfe_u32 s76, s48, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 48
+; SI-NEXT: s_bfe_u32 s76, s50, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 47
+; SI-NEXT: s_bfe_u32 s76, s52, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 46
+; SI-NEXT: s_bfe_u32 s76, s38, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 45
+; SI-NEXT: s_bfe_u32 s76, s49, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 44
+; SI-NEXT: s_bfe_u32 s76, s39, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 43
+; SI-NEXT: s_bfe_u32 s76, s55, 0x80008
+; SI-NEXT: v_writelane_b32 v36, s76, 42
+; SI-NEXT: s_bfe_u32 s76, s88, 0x80008
+; SI-NEXT: s_mov_b32 s99, s77
+; SI-NEXT: v_writelane_b32 v36, s76, 41
+; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 19
+; SI-NEXT: v_writelane_b32 v37, s77, 20
+; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 17
+; SI-NEXT: v_writelane_b32 v37, s77, 18
+; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 15
+; SI-NEXT: v_writelane_b32 v37, s77, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 25
+; SI-NEXT: v_writelane_b32 v37, s77, 26
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 23
+; SI-NEXT: v_writelane_b32 v37, s77, 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 21
+; SI-NEXT: v_writelane_b32 v37, s77, 22
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 31
+; SI-NEXT: v_writelane_b32 v37, s77, 32
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 29
+; SI-NEXT: v_writelane_b32 v37, s77, 30
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 27
+; SI-NEXT: v_writelane_b32 v37, s77, 28
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 37
+; SI-NEXT: v_writelane_b32 v37, s77, 38
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 35
+; SI-NEXT: v_writelane_b32 v37, s77, 36
+; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 33
+; SI-NEXT: v_writelane_b32 v37, s77, 34
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 43
+; SI-NEXT: v_writelane_b32 v37, s77, 44
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 41
+; SI-NEXT: v_writelane_b32 v37, s77, 42
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 39
+; SI-NEXT: v_writelane_b32 v37, s77, 40
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 49
+; SI-NEXT: v_writelane_b32 v37, s77, 50
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 47
+; SI-NEXT: v_writelane_b32 v37, s77, 48
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 45
+; SI-NEXT: v_writelane_b32 v37, s77, 46
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 55
+; SI-NEXT: v_writelane_b32 v37, s77, 56
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 53
+; SI-NEXT: v_writelane_b32 v37, s77, 54
+; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 51
+; SI-NEXT: v_writelane_b32 v37, s77, 52
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v37, s76, 61
+; SI-NEXT: v_writelane_b32 v37, s77, 62
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v37, s76, 59
+; SI-NEXT: v_writelane_b32 v37, s77, 60
+; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 57
+; SI-NEXT: v_writelane_b32 v37, s77, 58
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 3
+; SI-NEXT: v_writelane_b32 v36, s77, 4
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v36, s76, 1
+; SI-NEXT: v_writelane_b32 v36, s77, 2
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v37, s76, 63
+; SI-NEXT: v_writelane_b32 v36, s77, 0
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 9
+; SI-NEXT: v_writelane_b32 v36, s77, 10
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v36, s76, 7
+; SI-NEXT: v_writelane_b32 v36, s77, 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v36, s76, 5
+; SI-NEXT: v_writelane_b32 v36, s77, 6
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 15
+; SI-NEXT: v_writelane_b32 v36, s77, 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v36, s76, 13
+; SI-NEXT: v_writelane_b32 v36, s77, 14
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v36, s76, 11
+; SI-NEXT: v_writelane_b32 v36, s77, 12
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 21
+; SI-NEXT: v_writelane_b32 v36, s77, 22
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v36, s76, 19
+; SI-NEXT: v_writelane_b32 v36, s77, 20
+; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v36, s76, 17
+; SI-NEXT: v_writelane_b32 v36, s77, 18
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 27
+; SI-NEXT: v_writelane_b32 v36, s77, 28
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v36, s76, 25
+; SI-NEXT: v_writelane_b32 v36, s77, 26
+; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 8
+; SI-NEXT: v_writelane_b32 v36, s76, 23
+; SI-NEXT: v_writelane_b32 v36, s77, 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v36, s76, 33
+; SI-NEXT: v_writelane_b32 v36, s77, 34
+; SI-NEXT: s_mov_b32 s68, s79
+; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
+; SI-NEXT: v_writelane_b32 v36, s78, 31
+; SI-NEXT: v_writelane_b32 v36, s79, 32
+; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v36, s78, 29
+; SI-NEXT: v_writelane_b32 v36, s79, 30
+; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v36, s78, 37
+; SI-NEXT: v_writelane_b32 v36, s79, 38
+; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v36, s78, 35
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v36, s79, 36
+; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 8
+; SI-NEXT: s_mov_b32 s79, s68
+; SI-NEXT: s_mov_b32 s77, s69
+; SI-NEXT: s_lshr_b64 s[68:69], s[4:5], 16
+; SI-NEXT: v_writelane_b32 v36, s82, 39
+; SI-NEXT: s_bfe_u32 s86, s81, 0x80008
+; SI-NEXT: s_bfe_u32 s87, s66, 0x80008
+; SI-NEXT: s_bfe_u32 s84, s64, 0x80008
+; SI-NEXT: s_bfe_u32 s85, s93, 0x80008
+; SI-NEXT: s_bfe_u32 s97, s35, 0x80008
+; SI-NEXT: s_bfe_u32 s98, s17, 0x80008
+; SI-NEXT: s_mov_b32 s69, s77
+; SI-NEXT: v_writelane_b32 v36, s83, 40
+; SI-NEXT: s_mov_b64 s[82:83], 0
; SI-NEXT: s_branch .LBB95_3
; SI-NEXT: .LBB95_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: s_mov_b64 s[96:97], -1
-; SI-NEXT: v_writelane_b32 v36, s4, 11
-; SI-NEXT: v_writelane_b32 v36, s5, 12
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: s_mov_b32 s99, s77
+; SI-NEXT: v_writelane_b32 v37, s4, 15
+; SI-NEXT: v_writelane_b32 v37, s5, 16
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b64 s[82:83], -1
+; SI-NEXT: v_writelane_b32 v37, s4, 17
+; SI-NEXT: v_writelane_b32 v37, s5, 18
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr97
+; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
@@ -181672,50 +183023,49 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: v_writelane_b32 v36, s4, 13
-; SI-NEXT: v_writelane_b32 v36, s5, 14
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 15
-; SI-NEXT: v_writelane_b32 v36, s5, 16
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: v_writelane_b32 v37, s4, 19
+; SI-NEXT: v_writelane_b32 v37, s5, 20
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 17
-; SI-NEXT: v_writelane_b32 v36, s5, 18
+; SI-NEXT: v_writelane_b32 v37, s4, 21
+; SI-NEXT: v_writelane_b32 v37, s5, 22
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 19
-; SI-NEXT: v_writelane_b32 v36, s5, 20
+; SI-NEXT: v_writelane_b32 v37, s4, 23
+; SI-NEXT: v_writelane_b32 v37, s5, 24
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 21
-; SI-NEXT: v_writelane_b32 v36, s5, 22
+; SI-NEXT: v_writelane_b32 v37, s4, 25
+; SI-NEXT: v_writelane_b32 v37, s5, 26
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 23
-; SI-NEXT: v_writelane_b32 v36, s5, 24
+; SI-NEXT: v_writelane_b32 v37, s4, 27
+; SI-NEXT: v_writelane_b32 v37, s5, 28
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 25
-; SI-NEXT: v_writelane_b32 v36, s5, 26
+; SI-NEXT: v_writelane_b32 v37, s4, 29
+; SI-NEXT: v_writelane_b32 v37, s5, 30
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 27
-; SI-NEXT: v_writelane_b32 v36, s5, 28
+; SI-NEXT: v_writelane_b32 v37, s4, 31
+; SI-NEXT: v_writelane_b32 v37, s5, 32
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 29
-; SI-NEXT: v_writelane_b32 v36, s5, 30
+; SI-NEXT: v_writelane_b32 v37, s4, 33
+; SI-NEXT: v_writelane_b32 v37, s5, 34
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 31
-; SI-NEXT: v_writelane_b32 v36, s5, 32
+; SI-NEXT: v_writelane_b32 v37, s4, 35
+; SI-NEXT: v_writelane_b32 v37, s5, 36
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 33
-; SI-NEXT: v_writelane_b32 v36, s5, 34
+; SI-NEXT: v_writelane_b32 v37, s4, 37
+; SI-NEXT: v_writelane_b32 v37, s5, 38
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
@@ -181753,132 +183103,127 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 35
-; SI-NEXT: v_writelane_b32 v36, s5, 36
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 37
-; SI-NEXT: v_writelane_b32 v36, s5, 38
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 39
-; SI-NEXT: v_writelane_b32 v36, s5, 40
+; SI-NEXT: v_writelane_b32 v37, s4, 39
+; SI-NEXT: v_writelane_b32 v37, s5, 40
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 41
-; SI-NEXT: v_writelane_b32 v36, s5, 42
+; SI-NEXT: v_writelane_b32 v37, s4, 41
+; SI-NEXT: v_writelane_b32 v37, s5, 42
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 43
-; SI-NEXT: v_writelane_b32 v36, s5, 44
+; SI-NEXT: v_writelane_b32 v37, s4, 43
+; SI-NEXT: v_writelane_b32 v37, s5, 44
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 45
-; SI-NEXT: v_writelane_b32 v36, s5, 46
+; SI-NEXT: v_writelane_b32 v37, s4, 45
+; SI-NEXT: v_writelane_b32 v37, s5, 46
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 47
-; SI-NEXT: v_writelane_b32 v36, s5, 48
+; SI-NEXT: v_writelane_b32 v37, s4, 47
+; SI-NEXT: v_writelane_b32 v37, s5, 48
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 49
-; SI-NEXT: v_writelane_b32 v36, s5, 50
+; SI-NEXT: v_writelane_b32 v37, s4, 49
+; SI-NEXT: v_writelane_b32 v37, s5, 50
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 51
-; SI-NEXT: v_writelane_b32 v36, s5, 52
+; SI-NEXT: v_writelane_b32 v37, s4, 51
+; SI-NEXT: v_writelane_b32 v37, s5, 52
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 53
-; SI-NEXT: v_writelane_b32 v36, s5, 54
+; SI-NEXT: v_writelane_b32 v37, s4, 53
+; SI-NEXT: v_writelane_b32 v37, s5, 54
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 55
-; SI-NEXT: v_writelane_b32 v36, s5, 56
+; SI-NEXT: v_writelane_b32 v37, s4, 55
+; SI-NEXT: v_writelane_b32 v37, s5, 56
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 57
-; SI-NEXT: v_writelane_b32 v36, s5, 58
+; SI-NEXT: v_writelane_b32 v37, s4, 57
+; SI-NEXT: v_writelane_b32 v37, s5, 58
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 59
-; SI-NEXT: v_writelane_b32 v36, s5, 60
+; SI-NEXT: v_writelane_b32 v37, s4, 59
+; SI-NEXT: v_writelane_b32 v37, s5, 60
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 61
-; SI-NEXT: v_writelane_b32 v36, s5, 62
+; SI-NEXT: v_writelane_b32 v37, s4, 61
+; SI-NEXT: v_writelane_b32 v37, s5, 62
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 63
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v37, s5, 0
+; SI-NEXT: v_writelane_b32 v37, s4, 63
+; SI-NEXT: v_writelane_b32 v36, s5, 0
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 1
-; SI-NEXT: v_writelane_b32 v37, s5, 2
+; SI-NEXT: v_writelane_b32 v36, s4, 1
+; SI-NEXT: v_writelane_b32 v36, s5, 2
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 3
-; SI-NEXT: v_writelane_b32 v37, s5, 4
+; SI-NEXT: v_writelane_b32 v36, s4, 3
+; SI-NEXT: v_writelane_b32 v36, s5, 4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 5
-; SI-NEXT: v_writelane_b32 v37, s5, 6
+; SI-NEXT: v_writelane_b32 v36, s4, 5
+; SI-NEXT: v_writelane_b32 v36, s5, 6
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 7
-; SI-NEXT: v_writelane_b32 v37, s5, 8
+; SI-NEXT: v_writelane_b32 v36, s4, 7
+; SI-NEXT: v_writelane_b32 v36, s5, 8
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 9
-; SI-NEXT: v_writelane_b32 v37, s5, 10
+; SI-NEXT: v_writelane_b32 v36, s4, 9
+; SI-NEXT: v_writelane_b32 v36, s5, 10
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 11
-; SI-NEXT: v_writelane_b32 v37, s5, 12
+; SI-NEXT: v_writelane_b32 v36, s4, 11
+; SI-NEXT: v_writelane_b32 v36, s5, 12
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 13
-; SI-NEXT: v_writelane_b32 v37, s5, 14
+; SI-NEXT: v_writelane_b32 v36, s4, 13
+; SI-NEXT: v_writelane_b32 v36, s5, 14
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 15
-; SI-NEXT: v_writelane_b32 v37, s5, 16
+; SI-NEXT: v_writelane_b32 v36, s4, 15
+; SI-NEXT: v_writelane_b32 v36, s5, 16
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 17
-; SI-NEXT: v_writelane_b32 v37, s5, 18
+; SI-NEXT: v_writelane_b32 v36, s4, 17
+; SI-NEXT: v_writelane_b32 v36, s5, 18
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 19
-; SI-NEXT: v_writelane_b32 v37, s5, 20
+; SI-NEXT: v_writelane_b32 v36, s4, 19
+; SI-NEXT: v_writelane_b32 v36, s5, 20
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 21
-; SI-NEXT: v_writelane_b32 v37, s5, 22
+; SI-NEXT: v_writelane_b32 v36, s4, 21
+; SI-NEXT: v_writelane_b32 v36, s5, 22
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 23
-; SI-NEXT: v_writelane_b32 v37, s5, 24
+; SI-NEXT: v_writelane_b32 v36, s4, 23
+; SI-NEXT: v_writelane_b32 v36, s5, 24
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 25
-; SI-NEXT: v_writelane_b32 v37, s5, 26
+; SI-NEXT: v_writelane_b32 v36, s4, 25
+; SI-NEXT: v_writelane_b32 v36, s5, 26
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 27
-; SI-NEXT: v_writelane_b32 v37, s5, 28
+; SI-NEXT: v_writelane_b32 v36, s4, 27
+; SI-NEXT: v_writelane_b32 v36, s5, 28
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 29
-; SI-NEXT: v_writelane_b32 v37, s5, 30
+; SI-NEXT: v_writelane_b32 v36, s4, 29
+; SI-NEXT: v_writelane_b32 v36, s5, 30
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 31
-; SI-NEXT: v_writelane_b32 v37, s5, 32
+; SI-NEXT: v_writelane_b32 v36, s4, 31
+; SI-NEXT: v_writelane_b32 v36, s5, 32
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 33
-; SI-NEXT: v_writelane_b32 v37, s5, 34
+; SI-NEXT: v_writelane_b32 v36, s4, 33
+; SI-NEXT: v_writelane_b32 v36, s5, 34
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 35
-; SI-NEXT: v_writelane_b32 v37, s5, 36
-; SI-NEXT: v_writelane_b32 v37, s84, 37
-; SI-NEXT: v_writelane_b32 v37, s85, 38
-; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v36, s4, 35
+; SI-NEXT: v_writelane_b32 v36, s5, 36
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s84, 39
-; SI-NEXT: v_writelane_b32 v37, s85, 40
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: v_writelane_b32 v37, s84, 41
-; SI-NEXT: v_writelane_b32 v37, s85, 42
+; SI-NEXT: v_writelane_b32 v36, s4, 37
+; SI-NEXT: v_writelane_b32 v36, s5, 38
+; SI-NEXT: v_writelane_b32 v36, s78, 39
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s79, 40
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: .LBB95_3: ; %Flow
-; SI-NEXT: s_and_b64 s[96:97], s[96:97], exec
-; SI-NEXT: s_cselect_b32 s96, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s96, 1
+; SI-NEXT: s_and_b64 s[82:83], s[82:83], exec
+; SI-NEXT: s_cselect_b32 s77, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s77, 1
; SI-NEXT: s_cbranch_scc1 .LBB95_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s71
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s70
-; SI-NEXT: v_readlane_b32 s12, v36, 10
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s16
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s96
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
+; SI-NEXT: v_readlane_b32 s12, v37, 14
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s69
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s95
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s31
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -181890,17 +183235,17 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s5, v1
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s67
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s66
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s35
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s65
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s34
; SI-NEXT: v_readfirstlane_b32 s7, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s64
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s37
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -181908,19 +183253,19 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s55
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s36
; SI-NEXT: v_readfirstlane_b32 s7, v2
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s54
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s93
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v3
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s53
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s92
; SI-NEXT: v_readfirstlane_b32 s9, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s52
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s99
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -181930,15 +183275,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s9, v3
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: v_readfirstlane_b32 s10, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s51
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s94
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: v_readfirstlane_b32 s10, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s50
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s64
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v6, v4
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s49
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s65
; SI-NEXT: v_readfirstlane_b32 s11, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s12
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -181948,17 +183293,17 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: v_readfirstlane_b32 s12, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s39
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s67
; SI-NEXT: v_readfirstlane_b32 s11, v4
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: v_readfirstlane_b32 s12, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s38
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s66
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
-; SI-NEXT: v_readlane_b32 s14, v36, 9
+; SI-NEXT: v_readlane_b32 s14, v37, 13
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s95
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s71
; SI-NEXT: v_readfirstlane_b32 s13, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s14
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
@@ -181971,319 +183316,319 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s13, v5
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: v_readfirstlane_b32 s14, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s36
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s70
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: v_readfirstlane_b32 s14, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s81
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
-; SI-NEXT: v_readlane_b32 s40, v36, 8
+; SI-NEXT: v_readlane_b32 s16, v37, 12
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s80
; SI-NEXT: v_readfirstlane_b32 s15, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s40
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s16
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: v_readfirstlane_b32 s40, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s30
+; SI-NEXT: v_readfirstlane_b32 s16, v7
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s89
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: v_readfirstlane_b32 s15, v6
; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_or_b32 s15, s40, s15
-; SI-NEXT: v_readfirstlane_b32 s40, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_hi
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v9, v7
-; SI-NEXT: v_readlane_b32 s42, v36, 7
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: v_readfirstlane_b32 s16, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s88
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v9
+; SI-NEXT: s_or_b32 s40, s17, s16
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_lo
-; SI-NEXT: v_readfirstlane_b32 s41, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s42
+; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_hi
+; SI-NEXT: v_readlane_b32 s17, v37, 11
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s17
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_or_b32 s40, s41, s40
-; SI-NEXT: v_readfirstlane_b32 s41, v7
-; SI-NEXT: s_lshl_b32 s41, s41, 16
-; SI-NEXT: v_readfirstlane_b32 s42, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s94
-; SI-NEXT: s_or_b32 s41, s42, s41
-; SI-NEXT: v_readfirstlane_b32 s42, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s93
+; SI-NEXT: v_readfirstlane_b32 s16, v7
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v8, vcc_lo
+; SI-NEXT: s_or_b32 s41, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s55
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v10, v8
-; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s92
-; SI-NEXT: v_readfirstlane_b32 s43, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s85
-; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s54
+; SI-NEXT: v_readfirstlane_b32 s17, v10
+; SI-NEXT: s_or_b32 s42, s17, s16
+; SI-NEXT: v_readlane_b32 s17, v37, 10
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s17
+; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
+; SI-NEXT: v_readfirstlane_b32 s17, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s51
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
-; SI-NEXT: s_or_b32 s42, s43, s42
-; SI-NEXT: v_readfirstlane_b32 s44, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s91
-; SI-NEXT: v_readfirstlane_b32 s43, v8
-; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: s_or_b32 s43, s44, s43
-; SI-NEXT: v_readfirstlane_b32 s44, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s90
+; SI-NEXT: v_readfirstlane_b32 s16, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_cvt_f16_f32_e32 v11, v9
-; SI-NEXT: v_readlane_b32 s46, v36, 6
+; SI-NEXT: s_or_b32 s43, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v10
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s39
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v11
+; SI-NEXT: s_or_b32 s44, s17, s16
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s89
-; SI-NEXT: v_readfirstlane_b32 s45, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s46
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s53
+; SI-NEXT: v_readlane_b32 s17, v37, 8
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s17
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: v_readfirstlane_b32 s46, v10
+; SI-NEXT: v_readfirstlane_b32 s16, v9
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s28
-; SI-NEXT: v_readfirstlane_b32 s28, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s88
-; SI-NEXT: s_or_b32 s44, s45, s44
+; SI-NEXT: s_or_b32 s45, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s49
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v12, v10
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v11
; SI-NEXT: v_cvt_f32_f16_e32 v11, s29
-; SI-NEXT: v_readfirstlane_b32 s45, v9
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: v_readlane_b32 s29, v36, 5
-; SI-NEXT: s_or_b32 s45, s46, s45
-; SI-NEXT: v_readfirstlane_b32 s46, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s29
+; SI-NEXT: v_readfirstlane_b32 s17, v12
+; SI-NEXT: s_or_b32 s56, s17, s16
+; SI-NEXT: v_readlane_b32 s17, v37, 7
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s17
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: v_writelane_b32 v36, s64, 11
+; SI-NEXT: v_readfirstlane_b32 s17, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_readfirstlane_b32 s29, v11
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
-; SI-NEXT: s_lshl_b32 s28, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s26, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s79
+; SI-NEXT: v_readfirstlane_b32 s16, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_cvt_f16_f32_e32 v13, v11
-; SI-NEXT: s_or_b32 s56, s46, s28
-; SI-NEXT: v_readfirstlane_b32 s28, v10
-; SI-NEXT: s_lshl_b32 s28, s28, 16
+; SI-NEXT: s_or_b32 s57, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s38
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: s_or_b32 s60, s17, s16
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
-; SI-NEXT: v_readlane_b32 s27, v36, 4
-; SI-NEXT: s_or_b32 s57, s29, s28
-; SI-NEXT: v_readfirstlane_b32 s28, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
+; SI-NEXT: v_readlane_b32 s17, v37, 6
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s17
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_readfirstlane_b32 s27, v12
+; SI-NEXT: v_readfirstlane_b32 s16, v11
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s24
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: v_readfirstlane_b32 s24, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s78
+; SI-NEXT: s_or_b32 s61, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s52
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v14, v12
-; SI-NEXT: s_or_b32 s60, s28, s26
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s25
-; SI-NEXT: v_readfirstlane_b32 s26, v11
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: v_readlane_b32 s25, v36, 3
+; SI-NEXT: v_readfirstlane_b32 s17, v14
+; SI-NEXT: s_or_b32 s46, s17, s16
+; SI-NEXT: v_readlane_b32 s17, v37, 4
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_or_b32 s61, s27, s26
-; SI-NEXT: v_readfirstlane_b32 s26, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s25
-; SI-NEXT: v_readfirstlane_b32 s25, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s22
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: s_or_b32 s46, s26, s24
+; SI-NEXT: v_writelane_b32 v36, s65, 12
+; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s22
+; SI-NEXT: v_readfirstlane_b32 s16, v12
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_readfirstlane_b32 s24, v12
-; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: s_or_b32 s47, s25, s24
-; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: s_or_b32 s47, s17, s16
+; SI-NEXT: s_lshr_b64 s[64:65], s[12:13], 24
+; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s23
-; SI-NEXT: v_readfirstlane_b32 s22, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s77
-; SI-NEXT: v_readlane_b32 s23, v36, 2
+; SI-NEXT: v_readfirstlane_b32 s16, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s50
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: s_or_b32 s58, s17, s16
+; SI-NEXT: v_readlane_b32 s17, v37, 2
; SI-NEXT: v_cvt_f16_f32_e32 v15, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s23
-; SI-NEXT: v_readfirstlane_b32 s23, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
+; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s20
-; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: v_readfirstlane_b32 s16, v15
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_or_b32 s58, s24, s22
-; SI-NEXT: v_readfirstlane_b32 s22, v15
-; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_or_b32 s59, s23, s22
-; SI-NEXT: v_readfirstlane_b32 s20, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s76
-; SI-NEXT: v_readfirstlane_b32 s22, v13
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s59, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v14
+; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s21
-; SI-NEXT: v_readlane_b32 s21, v36, 1
-; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s48
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s62, s17, s16
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s21
-; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v37, s50, 17
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_readfirstlane_b32 s21, v13
+; SI-NEXT: v_readlane_b32 s17, v37, 0
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
+; SI-NEXT: v_writelane_b32 v36, s64, 21
+; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s18
+; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: v_writelane_b32 v37, s51, 18
+; SI-NEXT: v_readfirstlane_b32 s16, v19
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_readfirstlane_b32 s18, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s99
+; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 16
-; SI-NEXT: s_or_b32 s62, s22, s20
-; SI-NEXT: v_readfirstlane_b32 s20, v19
-; SI-NEXT: v_writelane_b32 v37, s50, 15
-; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: v_writelane_b32 v37, s51, 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 8
-; SI-NEXT: s_or_b32 s63, s21, s20
+; SI-NEXT: s_or_b32 s63, s17, s16
+; SI-NEXT: v_readfirstlane_b32 s16, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s91
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: v_writelane_b32 v36, s65, 22
+; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 24
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_readfirstlane_b32 s20, v13
+; SI-NEXT: s_or_b32 s72, s17, s16
; SI-NEXT: v_cvt_f32_f16_e32 v13, s19
-; SI-NEXT: v_readlane_b32 s19, v36, 0
-; SI-NEXT: v_writelane_b32 v37, s50, 13
+; SI-NEXT: v_readlane_b32 s17, v37, 9
+; SI-NEXT: v_writelane_b32 v36, s64, 27
; SI-NEXT: v_cvt_f16_f32_e32 v22, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s19
-; SI-NEXT: v_writelane_b32 v37, s51, 14
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v37, s50, 23
-; SI-NEXT: v_writelane_b32 v37, s51, 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s17
+; SI-NEXT: v_writelane_b32 v36, s65, 28
+; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v36, s64, 25
+; SI-NEXT: v_writelane_b32 v36, s65, 26
+; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_writelane_b32 v37, s50, 21
+; SI-NEXT: v_writelane_b32 v36, s64, 23
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s16
-; SI-NEXT: v_writelane_b32 v37, s51, 22
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 8
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s69
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 24
+; SI-NEXT: v_writelane_b32 v36, s65, 24
+; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 24
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_writelane_b32 v37, s50, 19
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: v_writelane_b32 v37, s51, 20
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 24
-; SI-NEXT: s_or_b32 s72, s20, s18
-; SI-NEXT: v_readfirstlane_b32 s18, v22
-; SI-NEXT: v_writelane_b32 v37, s50, 29
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: v_readfirstlane_b32 s16, v13
+; SI-NEXT: v_writelane_b32 v37, s18, 55
+; SI-NEXT: v_writelane_b32 v36, s64, 33
+; SI-NEXT: v_writelane_b32 v37, s19, 56
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v36, s65, 34
+; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s16, v22
+; SI-NEXT: v_writelane_b32 v37, s18, 53
+; SI-NEXT: v_writelane_b32 v36, s64, 31
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
-; SI-NEXT: v_writelane_b32 v37, s51, 30
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 16
-; SI-NEXT: s_or_b32 s73, s16, s18
+; SI-NEXT: v_writelane_b32 v37, s19, 54
+; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v36, s65, 32
+; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8
+; SI-NEXT: s_or_b32 s73, s17, s16
; SI-NEXT: v_readfirstlane_b32 s16, v14
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s98
-; SI-NEXT: v_writelane_b32 v37, s50, 27
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s17
-; SI-NEXT: v_writelane_b32 v37, s51, 28
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v37, s50, 25
-; SI-NEXT: v_writelane_b32 v37, s51, 26
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 24
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s90
+; SI-NEXT: v_writelane_b32 v37, s18, 61
+; SI-NEXT: v_writelane_b32 v36, s64, 29
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s79
+; SI-NEXT: v_writelane_b32 v37, s19, 62
+; SI-NEXT: v_writelane_b32 v36, s65, 30
+; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 24
+; SI-NEXT: v_writelane_b32 v37, s64, 4
+; SI-NEXT: v_writelane_b32 v37, s65, 5
+; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 16
; SI-NEXT: v_readfirstlane_b32 s17, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v37, s50, 35
+; SI-NEXT: v_writelane_b32 v36, s64, 37
; SI-NEXT: v_cvt_f16_f32_e32 v26, v13
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
-; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v37, s51, 36
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16
+; SI-NEXT: v_writelane_b32 v36, s65, 38
+; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_writelane_b32 v36, s20, 51
-; SI-NEXT: v_writelane_b32 v37, s50, 33
-; SI-NEXT: v_writelane_b32 v36, s21, 52
-; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v37, s51, 34
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: v_writelane_b32 v36, s64, 35
+; SI-NEXT: v_writelane_b32 v36, s65, 36
+; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_writelane_b32 v36, s20, 49
-; SI-NEXT: v_writelane_b32 v37, s50, 31
+; SI-NEXT: v_writelane_b32 v37, s64, 0
; SI-NEXT: s_or_b32 s74, s17, s16
; SI-NEXT: v_readfirstlane_b32 s16, v26
-; SI-NEXT: v_writelane_b32 v36, s21, 50
-; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v37, s51, 32
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v37, s65, 1
+; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_readfirstlane_b32 s17, v13
-; SI-NEXT: v_writelane_b32 v36, s20, 47
-; SI-NEXT: v_writelane_b32 v37, s50, 39
+; SI-NEXT: v_writelane_b32 v37, s64, 2
; SI-NEXT: s_or_b32 s75, s17, s16
-; SI-NEXT: v_writelane_b32 v36, s21, 48
-; SI-NEXT: s_lshr_b64 s[20:21], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v37, s51, 40
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[18:19], s[74:75], 24
-; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[62:63], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[62:63], 16
-; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8
-; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24
-; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 8
-; SI-NEXT: s_lshr_b64 s[22:23], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v36, s20, 57
-; SI-NEXT: v_writelane_b32 v37, s50, 41
-; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8
-; SI-NEXT: s_lshr_b64 s[64:65], s[46:47], 24
-; SI-NEXT: s_lshr_b64 s[86:87], s[46:47], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[60:61], 24
+; SI-NEXT: v_writelane_b32 v37, s65, 3
+; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[50:51], s[74:75], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[36:37], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[48:49], s[72:73], 8
+; SI-NEXT: s_lshr_b64 s[30:31], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[62:63], 8
+; SI-NEXT: s_lshr_b64 s[22:23], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[26:27], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[46:47], 8
+; SI-NEXT: s_lshr_b64 s[82:83], s[60:61], 24
; SI-NEXT: s_lshr_b64 s[84:85], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v36, s21, 58
-; SI-NEXT: s_lshr_b32 s93, s75, 8
-; SI-NEXT: s_lshr_b32 s91, s73, 8
-; SI-NEXT: s_lshr_b32 s89, s63, 8
-; SI-NEXT: s_lshr_b32 s79, s59, 8
-; SI-NEXT: s_lshr_b32 s77, s47, 8
-; SI-NEXT: s_lshr_b32 s29, s61, 8
-; SI-NEXT: s_lshr_b32 s28, s57, 8
-; SI-NEXT: s_lshr_b32 s27, s45, 8
-; SI-NEXT: s_lshr_b32 s26, s43, 8
+; SI-NEXT: s_lshr_b64 s[86:87], s[60:61], 8
+; SI-NEXT: s_lshr_b64 s[68:69], s[56:57], 8
+; SI-NEXT: s_lshr_b64 s[70:71], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v36, s64, 39
+; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
+; SI-NEXT: s_lshr_b64 s[20:21], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[98:99], s[46:47], 16
+; SI-NEXT: s_lshr_b32 s97, s75, 8
+; SI-NEXT: s_lshr_b32 s87, s73, 8
+; SI-NEXT: s_lshr_b32 s85, s63, 8
+; SI-NEXT: s_lshr_b32 s83, s59, 8
+; SI-NEXT: s_lshr_b32 s69, s47, 8
+; SI-NEXT: s_lshr_b32 s53, s61, 8
+; SI-NEXT: s_lshr_b32 s51, s57, 8
+; SI-NEXT: s_lshr_b32 s49, s45, 8
+; SI-NEXT: s_lshr_b32 s39, s43, 8
; SI-NEXT: s_lshr_b32 s37, s41, 8
-; SI-NEXT: s_lshr_b32 s19, s15, 8
-; SI-NEXT: s_lshr_b32 s35, s13, 8
-; SI-NEXT: s_lshr_b32 s31, s11, 8
-; SI-NEXT: s_lshr_b32 vcc_hi, s9, 8
-; SI-NEXT: s_lshr_b32 s95, s7, 8
+; SI-NEXT: s_lshr_b32 s35, s15, 8
+; SI-NEXT: s_lshr_b32 s31, s13, 8
+; SI-NEXT: s_lshr_b32 s91, s11, 8
+; SI-NEXT: s_lshr_b32 s77, s9, 8
+; SI-NEXT: s_lshr_b32 s27, s7, 8
; SI-NEXT: s_lshr_b32 s23, s5, 8
; SI-NEXT: v_bfe_u32 v32, v26, 8, 8
; SI-NEXT: v_bfe_u32 v31, v22, 8, 8
@@ -182301,195 +183646,198 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_bfe_u32 v16, v3, 8, 8
; SI-NEXT: v_bfe_u32 v14, v2, 8, 8
; SI-NEXT: v_bfe_u32 v13, v1, 8, 8
-; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[80:81], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 8
-; SI-NEXT: s_lshr_b64 s[38:39], s[40:41], 24
-; SI-NEXT: s_lshr_b64 s[68:69], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[20:21], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v37, s51, 42
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[24:25], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[28:29], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[94:95], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[92:93], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[78:79], s[40:41], 16
+; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v36, s65, 40
+; SI-NEXT: s_mov_b32 s64, s70
; SI-NEXT: s_branch .LBB95_6
; SI-NEXT: .LBB95_5:
-; SI-NEXT: v_readlane_b32 s16, v37, 43
+; SI-NEXT: v_readlane_b32 s16, v36, 41
+; SI-NEXT: v_mov_b32_e32 v21, s16
+; SI-NEXT: v_readlane_b32 s16, v36, 42
+; SI-NEXT: v_mov_b32_e32 v9, s39
+; SI-NEXT: v_mov_b32_e32 v10, s49
+; SI-NEXT: v_mov_b32_e32 v11, s38
+; SI-NEXT: v_mov_b32_e32 v12, s52
+; SI-NEXT: v_mov_b32_e32 v15, s50
+; SI-NEXT: v_mov_b32_e32 v19, s48
+; SI-NEXT: v_mov_b32_e32 v22, s91
+; SI-NEXT: v_mov_b32_e32 v26, s90
+; SI-NEXT: v_mov_b32_e32 v23, s16
+; SI-NEXT: v_readlane_b32 s16, v36, 43
+; SI-NEXT: v_readlane_b32 s38, v37, 23
+; SI-NEXT: v_readlane_b32 s50, v37, 19
+; SI-NEXT: v_readlane_b32 s48, v37, 21
+; SI-NEXT: v_readlane_b32 s90, v37, 17
+; SI-NEXT: v_readlane_b32 s52, v37, 15
; SI-NEXT: v_mov_b32_e32 v24, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 44
+; SI-NEXT: v_readlane_b32 s16, v36, 44
+; SI-NEXT: v_readlane_b32 s39, v37, 24
+; SI-NEXT: v_readlane_b32 s51, v37, 20
+; SI-NEXT: v_readlane_b32 s49, v37, 22
+; SI-NEXT: v_readlane_b32 s91, v37, 18
+; SI-NEXT: v_readlane_b32 s53, v37, 16
+; SI-NEXT: v_writelane_b32 v37, s78, 0
; SI-NEXT: v_mov_b32_e32 v25, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 45
+; SI-NEXT: v_readlane_b32 s16, v36, 45
+; SI-NEXT: v_writelane_b32 v37, s79, 1
; SI-NEXT: v_mov_b32_e32 v27, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 46
+; SI-NEXT: v_readlane_b32 s16, v36, 46
+; SI-NEXT: v_writelane_b32 v37, s68, 2
; SI-NEXT: v_mov_b32_e32 v28, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 47
+; SI-NEXT: v_readlane_b32 s16, v36, 47
+; SI-NEXT: v_writelane_b32 v37, s69, 3
; SI-NEXT: v_mov_b32_e32 v29, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 48
+; SI-NEXT: v_readlane_b32 s16, v36, 48
+; SI-NEXT: v_writelane_b32 v37, s76, 4
; SI-NEXT: v_mov_b32_e32 v30, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 49
-; SI-NEXT: v_mov_b32_e32 v7, vcc_hi
+; SI-NEXT: v_readlane_b32 s16, v36, 49
+; SI-NEXT: v_writelane_b32 v37, s77, 5
+; SI-NEXT: v_mov_b32_e32 v2, s35
+; SI-NEXT: v_mov_b32_e32 v14, s97
+; SI-NEXT: v_mov_b32_e32 v16, s85
+; SI-NEXT: v_mov_b32_e32 v17, s84
+; SI-NEXT: v_mov_b32_e32 v18, s87
+; SI-NEXT: v_mov_b32_e32 v20, s86
; SI-NEXT: v_mov_b32_e32 v31, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 50
-; SI-NEXT: v_readlane_b32 s94, v36, 21
-; SI-NEXT: v_readlane_b32 vcc_lo, v36, 23
+; SI-NEXT: v_readlane_b32 s16, v36, 50
+; SI-NEXT: v_readlane_b32 s68, v37, 51
+; SI-NEXT: v_readlane_b32 s76, v37, 39
+; SI-NEXT: v_readlane_b32 s96, v37, 43
+; SI-NEXT: v_readlane_b32 s86, v37, 45
+; SI-NEXT: v_readlane_b32 s84, v37, 47
+; SI-NEXT: v_readlane_b32 s82, v37, 49
+; SI-NEXT: v_readlane_b32 s22, v37, 35
+; SI-NEXT: v_readlane_b32 s26, v37, 33
+; SI-NEXT: v_readlane_b32 s30, v37, 29
+; SI-NEXT: v_readlane_b32 s36, v37, 25
+; SI-NEXT: v_readlane_b32 s34, v37, 27
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v3, s93
+; SI-NEXT: v_mov_b32_e32 v4, s64
+; SI-NEXT: v_mov_b32_e32 v5, s66
+; SI-NEXT: v_mov_b32_e32 v6, s81
+; SI-NEXT: v_mov_b32_e32 v7, s88
+; SI-NEXT: v_mov_b32_e32 v8, s55
+; SI-NEXT: v_mov_b32_e32 v13, s98
; SI-NEXT: v_mov_b32_e32 v32, s16
-; SI-NEXT: v_readlane_b32 s16, v37, 52
-; SI-NEXT: v_readlane_b32 s17, v37, 53
-; SI-NEXT: v_readlane_b32 s95, v36, 22
-; SI-NEXT: v_readlane_b32 vcc_hi, v36, 24
-; SI-NEXT: v_mov_b32_e32 v6, s35
-; SI-NEXT: v_mov_b32_e32 v14, s37
-; SI-NEXT: s_mov_b32 s95, s16
-; SI-NEXT: s_mov_b32 vcc_hi, s17
-; SI-NEXT: v_readlane_b32 s30, v36, 19
-; SI-NEXT: v_readlane_b32 s16, v36, 15
-; SI-NEXT: v_readlane_b32 s34, v36, 17
-; SI-NEXT: v_readlane_b32 s36, v36, 13
-; SI-NEXT: v_readlane_b32 s22, v36, 37
-; SI-NEXT: v_mov_b32_e32 v8, s93
-; SI-NEXT: v_mov_b32_e32 v9, s90
-; SI-NEXT: v_mov_b32_e32 v10, s88
-; SI-NEXT: v_mov_b32_e32 v11, s79
-; SI-NEXT: v_mov_b32_e32 v12, s78
-; SI-NEXT: v_mov_b32_e32 v15, s77
-; SI-NEXT: v_mov_b32_e32 v19, s76
-; SI-NEXT: v_readlane_b32 s24, v37, 51
-; SI-NEXT: v_readlane_b32 s18, v37, 54
-; SI-NEXT: v_readlane_b32 s20, v37, 55
-; SI-NEXT: v_readlane_b32 s21, v37, 57
-; SI-NEXT: v_readlane_b32 s76, v36, 33
-; SI-NEXT: v_readlane_b32 s78, v36, 31
-; SI-NEXT: v_readlane_b32 s88, v36, 27
-; SI-NEXT: v_readlane_b32 s90, v36, 29
-; SI-NEXT: v_readlane_b32 s92, v36, 25
-; SI-NEXT: v_readlane_b32 s31, v36, 20
-; SI-NEXT: v_readlane_b32 s17, v36, 16
-; SI-NEXT: v_readlane_b32 s35, v36, 18
-; SI-NEXT: v_readlane_b32 s37, v36, 14
-; SI-NEXT: v_readlane_b32 s23, v36, 38
-; SI-NEXT: v_mov_b32_e32 v1, s70
-; SI-NEXT: v_mov_b32_e32 v2, s66
-; SI-NEXT: v_mov_b32_e32 v3, s54
-; SI-NEXT: v_mov_b32_e32 v4, s50
-; SI-NEXT: v_mov_b32_e32 v5, s38
-; SI-NEXT: v_mov_b32_e32 v22, s99
-; SI-NEXT: v_mov_b32_e32 v26, s98
-; SI-NEXT: v_mov_b32_e32 v13, s82
-; SI-NEXT: v_mov_b32_e32 v16, s81
-; SI-NEXT: v_mov_b32_e32 v17, s87
-; SI-NEXT: v_mov_b32_e32 v18, s86
-; SI-NEXT: v_mov_b32_e32 v20, s83
-; SI-NEXT: v_mov_b32_e32 v21, s48
-; SI-NEXT: v_mov_b32_e32 v23, s80
-; SI-NEXT: v_readlane_b32 s77, v36, 34
-; SI-NEXT: v_readlane_b32 s79, v36, 32
-; SI-NEXT: v_readlane_b32 s89, v36, 28
-; SI-NEXT: v_readlane_b32 s91, v36, 30
-; SI-NEXT: v_readlane_b32 s93, v36, 26
-; SI-NEXT: s_mov_b32 s31, s18
-; SI-NEXT: s_mov_b32 s18, s16
-; SI-NEXT: s_mov_b32 s35, s20
-; SI-NEXT: s_mov_b32 s37, s21
-; SI-NEXT: v_readlane_b32 s16, v36, 11
-; SI-NEXT: v_readlane_b32 s50, v37, 37
-; SI-NEXT: v_readlane_b32 s96, v36, 45
-; SI-NEXT: v_readlane_b32 s84, v36, 43
-; SI-NEXT: v_readlane_b32 s54, v36, 41
-; SI-NEXT: v_readlane_b32 s64, v36, 39
-; SI-NEXT: s_mov_b32 s23, s24
-; SI-NEXT: v_readlane_b32 s86, v36, 35
-; SI-NEXT: v_readlane_b32 s98, v37, 11
-; SI-NEXT: v_readlane_b32 s20, v37, 9
-; SI-NEXT: v_readlane_b32 s48, v37, 7
-; SI-NEXT: v_readlane_b32 s38, v37, 5
-; SI-NEXT: v_readlane_b32 s68, v37, 3
-; SI-NEXT: v_readlane_b32 s24, v37, 1
-; SI-NEXT: v_readlane_b32 s52, v36, 63
-; SI-NEXT: v_readlane_b32 s80, v36, 61
-; SI-NEXT: v_readlane_b32 s66, v36, 59
-; SI-NEXT: v_readlane_b32 s82, v36, 55
-; SI-NEXT: v_readlane_b32 s70, v36, 53
-; SI-NEXT: v_readlane_b32 s19, v37, 56
-; SI-NEXT: v_readlane_b32 s26, v37, 58
-; SI-NEXT: v_readlane_b32 s27, v37, 59
-; SI-NEXT: v_readlane_b32 s28, v37, 60
-; SI-NEXT: v_readlane_b32 s29, v37, 61
-; SI-NEXT: v_readlane_b32 s77, v37, 62
-; SI-NEXT: v_readlane_b32 s17, v36, 12
-; SI-NEXT: v_readlane_b32 s79, v37, 63
-; SI-NEXT: v_readlane_b32 s89, v35, 0
-; SI-NEXT: v_readlane_b32 s51, v37, 38
-; SI-NEXT: v_readlane_b32 s91, v35, 1
-; SI-NEXT: v_readlane_b32 s97, v36, 46
-; SI-NEXT: v_readlane_b32 s93, v35, 2
-; SI-NEXT: v_readlane_b32 s85, v36, 44
-; SI-NEXT: v_readlane_b32 s55, v36, 42
-; SI-NEXT: v_readlane_b32 s65, v36, 40
-; SI-NEXT: v_readlane_b32 s87, v36, 36
-; SI-NEXT: v_readlane_b32 s99, v37, 12
-; SI-NEXT: v_readlane_b32 s21, v37, 10
-; SI-NEXT: v_readlane_b32 s49, v37, 8
-; SI-NEXT: v_readlane_b32 s39, v37, 6
-; SI-NEXT: v_readlane_b32 s69, v37, 4
-; SI-NEXT: v_readlane_b32 s25, v37, 2
-; SI-NEXT: v_readlane_b32 s53, v37, 0
-; SI-NEXT: v_readlane_b32 s81, v36, 62
-; SI-NEXT: v_readlane_b32 s67, v36, 60
-; SI-NEXT: v_readlane_b32 s83, v36, 56
-; SI-NEXT: v_readlane_b32 s71, v36, 54
+; SI-NEXT: v_readlane_b32 s69, v37, 52
+; SI-NEXT: v_readlane_b32 s64, v36, 19
+; SI-NEXT: v_readlane_b32 s66, v36, 17
+; SI-NEXT: v_readlane_b32 s77, v37, 40
+; SI-NEXT: v_readlane_b32 s54, v36, 15
+; SI-NEXT: v_readlane_b32 s80, v36, 13
+; SI-NEXT: v_readlane_b32 vcc_lo, v36, 5
+; SI-NEXT: v_readlane_b32 s94, v36, 3
+; SI-NEXT: v_readlane_b32 s92, v36, 1
+; SI-NEXT: v_readlane_b32 s98, v37, 41
+; SI-NEXT: v_readlane_b32 s97, v37, 44
+; SI-NEXT: v_readlane_b32 s87, v37, 46
+; SI-NEXT: v_readlane_b32 s18, v37, 63
+; SI-NEXT: v_readlane_b32 s78, v36, 7
+; SI-NEXT: v_readlane_b32 s24, v37, 59
+; SI-NEXT: v_readlane_b32 s88, v36, 9
+; SI-NEXT: v_readlane_b32 s85, v37, 48
+; SI-NEXT: v_readlane_b32 s83, v37, 50
+; SI-NEXT: v_readlane_b32 s28, v37, 57
+; SI-NEXT: v_readlane_b32 s20, v37, 37
+; SI-NEXT: v_readlane_b32 s23, v37, 36
+; SI-NEXT: v_readlane_b32 s16, v37, 31
+; SI-NEXT: v_readlane_b32 s27, v37, 34
+; SI-NEXT: v_readlane_b32 s31, v37, 30
+; SI-NEXT: v_readlane_b32 s37, v37, 26
+; SI-NEXT: v_readlane_b32 s35, v37, 28
+; SI-NEXT: v_readlane_b32 s65, v36, 20
+; SI-NEXT: v_readlane_b32 s67, v36, 18
+; SI-NEXT: v_readlane_b32 s55, v36, 16
+; SI-NEXT: v_readlane_b32 s81, v36, 14
+; SI-NEXT: v_readlane_b32 vcc_hi, v36, 6
+; SI-NEXT: v_readlane_b32 s95, v36, 4
+; SI-NEXT: v_readlane_b32 s93, v36, 2
+; SI-NEXT: v_readlane_b32 s99, v37, 42
+; SI-NEXT: v_readlane_b32 s19, v36, 0
+; SI-NEXT: v_readlane_b32 s79, v36, 8
+; SI-NEXT: v_readlane_b32 s25, v37, 60
+; SI-NEXT: v_readlane_b32 s89, v36, 10
+; SI-NEXT: v_readlane_b32 s29, v37, 58
+; SI-NEXT: v_readlane_b32 s21, v37, 38
+; SI-NEXT: v_readlane_b32 s17, v37, 32
+; SI-NEXT: v_readlane_b32 s23, v36, 51
+; SI-NEXT: v_readlane_b32 s27, v36, 52
+; SI-NEXT: v_readlane_b32 s77, v36, 53
+; SI-NEXT: v_readlane_b32 s91, v36, 54
+; SI-NEXT: v_readlane_b32 s31, v36, 55
+; SI-NEXT: v_readlane_b32 s35, v36, 56
+; SI-NEXT: v_readlane_b32 s37, v36, 57
+; SI-NEXT: v_readlane_b32 s39, v36, 58
+; SI-NEXT: v_readlane_b32 s49, v36, 59
+; SI-NEXT: v_readlane_b32 s51, v36, 60
+; SI-NEXT: v_readlane_b32 s53, v36, 61
+; SI-NEXT: v_readlane_b32 s69, v36, 62
+; SI-NEXT: v_readlane_b32 s83, v36, 63
+; SI-NEXT: v_readlane_b32 s85, v35, 0
+; SI-NEXT: v_readlane_b32 s87, v35, 1
+; SI-NEXT: v_readlane_b32 s97, v35, 2
; SI-NEXT: .LBB95_6: ; %end
-; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_and_b32 s17, s74, 0xff
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s36, 0xff
-; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_mov_b32_e32 v33, s16
-; SI-NEXT: s_and_b32 s16, s75, 0xff
-; SI-NEXT: s_lshl_b32 s17, s93, 8
+; SI-NEXT: s_lshl_b32 s17, s52, 8
+; SI-NEXT: s_and_b32 s19, s74, 0xff
+; SI-NEXT: s_or_b32 s17, s19, s17
+; SI-NEXT: s_and_b32 s19, s90, 0xff
+; SI-NEXT: s_lshl_b32 s21, s50, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s19, s21, s19
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: v_mov_b32_e32 v33, s17
+; SI-NEXT: s_and_b32 s17, s75, 0xff
+; SI-NEXT: s_lshl_b32 s19, s97, 8
; SI-NEXT: v_and_b32_e32 v26, 0xff, v26
-; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v32
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
; SI-NEXT: v_or_b32_e32 v26, v32, v26
-; SI-NEXT: v_or_b32_e32 v26, s16, v26
-; SI-NEXT: s_lshl_b32 s16, s34, 8
-; SI-NEXT: s_and_b32 s17, s72, 0xff
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s30, 0xff
-; SI-NEXT: s_lshl_b32 s18, s94, 24
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_mov_b32_e32 v32, s16
-; SI-NEXT: s_and_b32 s16, s73, 0xff
-; SI-NEXT: s_lshl_b32 s17, s91, 8
+; SI-NEXT: v_or_b32_e32 v26, s17, v26
+; SI-NEXT: s_lshl_b32 s17, s48, 8
+; SI-NEXT: s_and_b32 s19, s72, 0xff
+; SI-NEXT: s_or_b32 s17, s19, s17
+; SI-NEXT: s_and_b32 s19, s38, 0xff
+; SI-NEXT: s_lshl_b32 s21, s36, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s19, s21, s19
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: v_mov_b32_e32 v32, s17
+; SI-NEXT: s_and_b32 s17, s73, 0xff
+; SI-NEXT: s_lshl_b32 s19, s87, 8
; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
-; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v31
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
; SI-NEXT: v_or_b32_e32 v22, v31, v22
-; SI-NEXT: v_or_b32_e32 v22, s16, v22
-; SI-NEXT: s_lshl_b32 s16, vcc_lo, 8
-; SI-NEXT: s_and_b32 s17, s62, 0xff
+; SI-NEXT: v_or_b32_e32 v22, s17, v22
+; SI-NEXT: s_lshl_b32 s17, s34, 8
+; SI-NEXT: s_and_b32 s19, s62, 0xff
+; SI-NEXT: s_or_b32 s17, s19, s17
+; SI-NEXT: s_and_b32 s19, s30, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s16, s16, s19
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s92, 0xff
-; SI-NEXT: s_lshl_b32 s18, s88, 24
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v31, s16
; SI-NEXT: s_and_b32 s16, s63, 0xff
-; SI-NEXT: s_lshl_b32 s17, s89, 8
+; SI-NEXT: s_lshl_b32 s17, s85, 8
; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
@@ -182497,18 +183845,18 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v19, v30, v19
; SI-NEXT: v_or_b32_e32 v19, s16, v19
-; SI-NEXT: s_lshl_b32 s16, s90, 8
+; SI-NEXT: s_lshl_b32 s16, s26, 8
; SI-NEXT: s_and_b32 s17, s58, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s78, 0xff
-; SI-NEXT: s_lshl_b32 s18, s76, 24
+; SI-NEXT: s_and_b32 s17, s22, 0xff
+; SI-NEXT: s_lshl_b32 s19, s20, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v30, s16
; SI-NEXT: s_and_b32 s16, s59, 0xff
-; SI-NEXT: s_lshl_b32 s17, s79, 8
+; SI-NEXT: s_lshl_b32 s17, s83, 8
; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
@@ -182516,18 +183864,18 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v15, v29, v15
; SI-NEXT: v_or_b32_e32 v15, s16, v15
-; SI-NEXT: s_lshl_b32 s16, s86, 8
+; SI-NEXT: s_lshl_b32 s16, s76, 8
; SI-NEXT: s_and_b32 s17, s46, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s22, 0xff
-; SI-NEXT: s_lshl_b32 s18, s64, 24
+; SI-NEXT: s_and_b32 s17, s98, 0xff
+; SI-NEXT: s_lshl_b32 s19, s96, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v29, s16
; SI-NEXT: s_and_b32 s16, s47, 0xff
-; SI-NEXT: s_lshl_b32 s17, s77, 8
+; SI-NEXT: s_lshl_b32 s17, s69, 8
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
@@ -182535,20 +183883,19 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v12, v28, v12
; SI-NEXT: v_or_b32_e32 v12, s16, v12
-; SI-NEXT: s_lshl_b32 s16, s54, 8
+; SI-NEXT: s_lshl_b32 s16, s86, 8
; SI-NEXT: s_and_b32 s17, s60, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s84, 0xff
-; SI-NEXT: s_lshl_b32 s18, s96, 24
+; SI-NEXT: s_lshl_b32 s19, s82, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v28, s16
; SI-NEXT: s_and_b32 s16, s61, 0xff
-; SI-NEXT: s_lshl_b32 s17, s29, 8
+; SI-NEXT: s_lshl_b32 s17, s53, 8
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: v_readlane_b32 s46, v36, 47
; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:4
; SI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:8
@@ -182564,27 +183911,26 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v27
-; SI-NEXT: v_readlane_b32 s47, v36, 48
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: s_lshl_b32 s17, s46, 8
-; SI-NEXT: v_readlane_b32 s46, v36, 49
; SI-NEXT: v_or_b32_e32 v11, s16, v11
; SI-NEXT: s_and_b32 s16, s56, 0xff
-; SI-NEXT: v_readlane_b32 s47, v36, 50
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s46, 0xff
-; SI-NEXT: v_readlane_b32 s46, v36, 51
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s46, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_lshl_b32 s17, s68, 8
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s19, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v37, 53
+; SI-NEXT: v_readlane_b32 s17, v37, 54
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: v_readlane_b32 s20, v37, 55
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s17, s20, 24
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s16, s19, s16
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v11, s16
; SI-NEXT: s_and_b32 s16, s57, 0xff
-; SI-NEXT: s_lshl_b32 s17, s28, 8
+; SI-NEXT: s_lshl_b32 s17, s51, 8
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -182593,22 +183939,23 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v25
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_readlane_b32 s21, v37, 56
; SI-NEXT: v_or_b32_e32 v10, s16, v10
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_lshl_b32 s17, s28, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s82, 0xff
-; SI-NEXT: v_readlane_b32 s28, v36, 57
+; SI-NEXT: s_and_b32 s17, s24, 0xff
+; SI-NEXT: v_readlane_b32 s20, v37, 61
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s28, 24
+; SI-NEXT: s_lshl_b32 s19, s20, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v10, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
-; SI-NEXT: s_lshl_b32 s17, s27, 8
+; SI-NEXT: s_lshl_b32 s17, s49, 8
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -182619,11 +183966,11 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_or_b32_e32 v9, s16, v9
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s66, 8
+; SI-NEXT: s_lshl_b32 s17, s18, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s80, 0xff
+; SI-NEXT: s_and_b32 s17, s92, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s52, 24
+; SI-NEXT: s_lshl_b32 s18, s94, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -182631,7 +183978,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s26, 8
+; SI-NEXT: s_lshl_b32 s17, s39, 8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -182642,11 +183989,11 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_or_b32_e32 v8, s16, v8
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s24, 8
+; SI-NEXT: s_lshl_b32 s17, vcc_lo, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s68, 0xff
+; SI-NEXT: s_and_b32 s17, s78, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s38, 24
+; SI-NEXT: s_lshl_b32 s18, s88, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -182664,12 +184011,14 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_or_b32_e32 v7, s16, v7
+; SI-NEXT: v_readlane_b32 s16, v36, 11
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s16, s48, 8
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: v_readlane_b32 s17, v36, 12
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_and_b32 s16, s20, 0xff
+; SI-NEXT: s_and_b32 s16, s80, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s98, 24
+; SI-NEXT: s_lshl_b32 s17, s54, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_or_b32 s14, s14, s16
@@ -182677,7 +184026,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v7, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: s_lshl_b32 s15, s19, 8
+; SI-NEXT: s_lshl_b32 s15, s35, 8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_or_b32 s14, s14, s15
@@ -182687,15 +184036,11 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_or_b32_e32 v6, s14, v6
-; SI-NEXT: v_readlane_b32 s14, v37, 13
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v37, 14
-; SI-NEXT: s_lshl_b32 s14, s14, 8
+; SI-NEXT: s_lshl_b32 s14, s66, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v37, 15
-; SI-NEXT: v_readlane_b32 s15, v37, 16
-; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v37, 17
+; SI-NEXT: s_and_b32 s14, s64, 0xff
+; SI-NEXT: v_readlane_b32 s16, v36, 21
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -182705,7 +184050,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v6, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s35, 8
+; SI-NEXT: s_lshl_b32 s13, s31, 8
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -182715,15 +184060,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v5, s12, v5
-; SI-NEXT: v_readlane_b32 s12, v37, 19
+; SI-NEXT: v_readlane_b32 s12, v36, 23
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v37, 20
+; SI-NEXT: v_readlane_b32 s13, v36, 24
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v37, 21
-; SI-NEXT: v_readlane_b32 s13, v37, 22
+; SI-NEXT: v_readlane_b32 s12, v36, 25
+; SI-NEXT: v_readlane_b32 s13, v36, 26
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v37, 23
+; SI-NEXT: v_readlane_b32 s14, v36, 27
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
@@ -182733,7 +184078,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v5, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s31, 8
+; SI-NEXT: s_lshl_b32 s11, s91, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -182743,15 +184088,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v4, s10, v4
-; SI-NEXT: v_readlane_b32 s10, v37, 25
+; SI-NEXT: v_readlane_b32 s10, v36, 29
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v37, 26
+; SI-NEXT: v_readlane_b32 s11, v36, 30
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v37, 27
-; SI-NEXT: v_readlane_b32 s11, v37, 28
+; SI-NEXT: v_readlane_b32 s10, v36, 31
+; SI-NEXT: v_readlane_b32 s11, v36, 32
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v37, 29
+; SI-NEXT: v_readlane_b32 s12, v36, 33
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
@@ -182761,7 +184106,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, vcc_hi, 8
+; SI-NEXT: s_lshl_b32 s9, s77, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -182771,15 +184116,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v3, s8, v3
-; SI-NEXT: v_readlane_b32 s8, v37, 31
+; SI-NEXT: v_readlane_b32 s8, v36, 35
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v37, 32
+; SI-NEXT: v_readlane_b32 s9, v36, 36
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v37, 33
-; SI-NEXT: v_readlane_b32 s9, v37, 34
+; SI-NEXT: v_readlane_b32 s8, v36, 37
+; SI-NEXT: v_readlane_b32 s9, v36, 38
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v37, 35
+; SI-NEXT: v_readlane_b32 s10, v37, 4
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
@@ -182789,7 +184134,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s95, 8
+; SI-NEXT: s_lshl_b32 s7, s27, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -182799,13 +184144,15 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v2, s6, v2
+; SI-NEXT: v_readlane_b32 s6, v36, 39
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s50, 8
+; SI-NEXT: v_readlane_b32 s7, v36, 40
+; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v37, 41
-; SI-NEXT: v_readlane_b32 s7, v37, 42
+; SI-NEXT: v_readlane_b32 s6, v37, 2
+; SI-NEXT: v_readlane_b32 s7, v37, 3
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v37, 39
+; SI-NEXT: v_readlane_b32 s8, v37, 0
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -182826,13 +184173,12 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
; SI-NEXT: v_readlane_b32 s30, v34, 34
-; SI-NEXT: v_readlane_b32 s47, v36, 52
-; SI-NEXT: v_readlane_b32 s29, v36, 58
-; SI-NEXT: v_readlane_b32 s17, v37, 18
-; SI-NEXT: v_readlane_b32 s15, v37, 24
-; SI-NEXT: v_readlane_b32 s13, v37, 30
-; SI-NEXT: v_readlane_b32 s11, v37, 36
-; SI-NEXT: v_readlane_b32 s9, v37, 40
+; SI-NEXT: v_readlane_b32 s21, v37, 62
+; SI-NEXT: v_readlane_b32 s17, v36, 22
+; SI-NEXT: v_readlane_b32 s15, v36, 28
+; SI-NEXT: v_readlane_b32 s13, v36, 34
+; SI-NEXT: v_readlane_b32 s11, v37, 5
+; SI-NEXT: v_readlane_b32 s9, v37, 1
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v34, 35
; SI-NEXT: v_readlane_b32 s99, v34, 33
@@ -182882,8 +184228,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -182932,6 +184278,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_writelane_b32 v63, s30, 30
; VI-NEXT: v_writelane_b32 v63, s31, 31
; VI-NEXT: v_readfirstlane_b32 s4, v19
+; VI-NEXT: v_mov_b32_e32 v61, v0
; VI-NEXT: v_readfirstlane_b32 s7, v18
; VI-NEXT: v_readfirstlane_b32 s6, v17
; VI-NEXT: v_readfirstlane_b32 s9, v16
@@ -182955,101 +184302,81 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc0 .LBB95_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 15
+; VI-NEXT: v_writelane_b32 v62, s46, 21
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 27
-; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 14
+; VI-NEXT: v_writelane_b32 v62, s46, 32
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 26
+; VI-NEXT: v_writelane_b32 v62, s46, 31
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 17
-; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 13
+; VI-NEXT: v_writelane_b32 v62, s46, 22
; VI-NEXT: s_lshr_b32 s46, s29, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 29
+; VI-NEXT: v_writelane_b32 v62, s46, 34
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 12
+; VI-NEXT: v_writelane_b32 v62, s46, 20
; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 28
+; VI-NEXT: v_writelane_b32 v62, s46, 33
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 18
+; VI-NEXT: v_writelane_b32 v62, s46, 23
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 11
+; VI-NEXT: v_writelane_b32 v62, s46, 19
; VI-NEXT: s_lshr_b32 s46, s27, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 31
+; VI-NEXT: v_writelane_b32 v62, s46, 36
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 10
+; VI-NEXT: v_writelane_b32 v62, s46, 18
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 30
+; VI-NEXT: v_writelane_b32 v62, s46, 35
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 19
+; VI-NEXT: v_writelane_b32 v62, s46, 24
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 9
+; VI-NEXT: v_writelane_b32 v62, s46, 17
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 33
+; VI-NEXT: v_writelane_b32 v62, s46, 38
; VI-NEXT: s_lshr_b32 s46, s24, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 8
+; VI-NEXT: v_writelane_b32 v62, s46, 16
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 32
+; VI-NEXT: v_writelane_b32 v62, s46, 37
; VI-NEXT: s_lshr_b32 s46, s23, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 20
+; VI-NEXT: v_writelane_b32 v62, s46, 25
; VI-NEXT: s_lshr_b32 s46, s23, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 7
+; VI-NEXT: v_writelane_b32 v62, s46, 15
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 35
+; VI-NEXT: v_writelane_b32 v62, s46, 40
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 6
+; VI-NEXT: v_writelane_b32 v62, s46, 14
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 34
+; VI-NEXT: v_writelane_b32 v62, s46, 39
; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 21
+; VI-NEXT: v_writelane_b32 v62, s46, 26
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 5
+; VI-NEXT: v_writelane_b32 v62, s46, 13
; VI-NEXT: s_lshr_b32 s46, s21, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 37
+; VI-NEXT: v_writelane_b32 v62, s46, 42
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 4
+; VI-NEXT: v_writelane_b32 v62, s46, 12
; VI-NEXT: s_lshr_b32 s46, s20, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 36
+; VI-NEXT: v_writelane_b32 v62, s46, 41
; VI-NEXT: s_lshr_b32 s46, s19, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 22
+; VI-NEXT: v_writelane_b32 v62, s46, 27
; VI-NEXT: s_lshr_b32 s46, s19, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 3
+; VI-NEXT: v_writelane_b32 v62, s46, 11
; VI-NEXT: s_lshr_b32 s46, s19, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 39
+; VI-NEXT: v_writelane_b32 v62, s46, 44
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 2
+; VI-NEXT: v_writelane_b32 v62, s46, 10
; VI-NEXT: s_lshr_b32 s46, s18, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 38
+; VI-NEXT: v_writelane_b32 v62, s46, 43
; VI-NEXT: s_lshr_b32 s46, s17, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 23
+; VI-NEXT: v_writelane_b32 v62, s46, 28
; VI-NEXT: s_lshr_b32 s46, s17, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 1
+; VI-NEXT: v_writelane_b32 v62, s46, 9
; VI-NEXT: s_lshr_b32 s46, s17, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 41
+; VI-NEXT: v_writelane_b32 v62, s46, 46
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v62, s46, 0
+; VI-NEXT: v_writelane_b32 v62, s46, 8
; VI-NEXT: s_lshr_b32 s46, s16, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 40
-; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 24
-; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 43
-; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 42
-; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v62, s46, 25
-; VI-NEXT: s_lshr_b32 s46, s9, 8
; VI-NEXT: v_writelane_b32 v62, s46, 45
-; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 44
-; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 47
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v62, s46, 46
+; VI-NEXT: v_writelane_b32 v62, s46, 47
; VI-NEXT: s_lshr_b32 s46, s13, 8
; VI-NEXT: v_writelane_b32 v62, s46, 49
; VI-NEXT: s_lshr_b32 s46, s12, 8
@@ -183062,40 +184389,61 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_writelane_b32 v62, s46, 53
; VI-NEXT: s_lshr_b32 s46, s40, 8
; VI-NEXT: v_writelane_b32 v62, s46, 52
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 29
; VI-NEXT: s_lshr_b32 s46, s43, 8
; VI-NEXT: v_writelane_b32 v62, s46, 55
; VI-NEXT: s_lshr_b32 s46, s42, 8
; VI-NEXT: v_writelane_b32 v62, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s45, 24
+; VI-NEXT: v_writelane_b32 v62, s46, 30
; VI-NEXT: s_lshr_b32 s46, s45, 8
; VI-NEXT: v_writelane_b32 v62, s46, 57
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: s_lshr_b32 s52, s7, 16
-; VI-NEXT: s_lshr_b32 s53, s6, 16
-; VI-NEXT: s_lshr_b32 s84, s9, 16
-; VI-NEXT: s_lshr_b32 s85, s8, 16
-; VI-NEXT: s_lshr_b32 s80, s11, 24
-; VI-NEXT: s_lshr_b32 s86, s11, 16
-; VI-NEXT: s_lshr_b32 s87, s10, 16
-; VI-NEXT: s_lshr_b32 s81, s13, 24
-; VI-NEXT: s_lshr_b32 s54, s13, 16
-; VI-NEXT: s_lshr_b32 s55, s12, 16
-; VI-NEXT: s_lshr_b32 s82, s15, 24
-; VI-NEXT: s_lshr_b32 s64, s15, 16
-; VI-NEXT: s_lshr_b32 s65, s14, 16
-; VI-NEXT: s_lshr_b32 s83, s41, 24
-; VI-NEXT: s_lshr_b32 s66, s41, 16
-; VI-NEXT: s_lshr_b32 s67, s40, 16
-; VI-NEXT: s_lshr_b32 s50, s43, 24
-; VI-NEXT: s_lshr_b32 s68, s43, 16
-; VI-NEXT: s_lshr_b32 s69, s42, 16
-; VI-NEXT: s_lshr_b32 s51, s45, 24
-; VI-NEXT: s_lshr_b32 s70, s45, 16
-; VI-NEXT: s_lshr_b32 s71, s44, 16
; VI-NEXT: v_writelane_b32 v62, s46, 56
-; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[58:59], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v62, s72, 6
+; VI-NEXT: v_writelane_b32 v62, s73, 7
+; VI-NEXT: s_lshr_b64 s[72:73], s[28:29], 24
+; VI-NEXT: s_lshr_b32 s62, s13, 24
+; VI-NEXT: v_writelane_b32 v62, s72, 4
+; VI-NEXT: v_writelane_b32 v62, s73, 5
+; VI-NEXT: s_mov_b32 s46, s62
+; VI-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
+; VI-NEXT: v_writelane_b32 v62, s62, 2
+; VI-NEXT: v_writelane_b32 v62, s63, 3
+; VI-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v62, s62, 0
+; VI-NEXT: s_lshr_b32 s64, s5, 16
+; VI-NEXT: s_lshr_b32 s54, s4, 16
+; VI-NEXT: s_lshr_b32 s50, s29, 16
+; VI-NEXT: s_lshr_b32 s61, s7, 24
+; VI-NEXT: s_lshr_b32 s52, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s7, 8
+; VI-NEXT: s_lshr_b32 s55, s6, 16
+; VI-NEXT: s_lshr_b32 s82, s6, 8
+; VI-NEXT: s_lshr_b32 s60, s9, 24
+; VI-NEXT: s_lshr_b32 s65, s9, 16
+; VI-NEXT: s_lshr_b32 s68, s9, 8
+; VI-NEXT: s_lshr_b32 s67, s8, 16
+; VI-NEXT: s_lshr_b32 s66, s8, 8
+; VI-NEXT: s_lshr_b32 s87, s11, 24
+; VI-NEXT: s_lshr_b32 s69, s11, 16
+; VI-NEXT: s_lshr_b32 s51, s11, 8
+; VI-NEXT: s_lshr_b32 s71, s10, 16
+; VI-NEXT: s_lshr_b32 s80, s13, 16
+; VI-NEXT: s_lshr_b32 s81, s12, 16
+; VI-NEXT: s_lshr_b32 s70, s15, 24
+; VI-NEXT: s_lshr_b32 s83, s15, 16
+; VI-NEXT: s_lshr_b32 s84, s14, 16
+; VI-NEXT: s_lshr_b32 s53, s41, 24
+; VI-NEXT: s_lshr_b32 s85, s41, 16
+; VI-NEXT: s_lshr_b32 s56, s40, 16
+; VI-NEXT: s_lshr_b32 s86, s43, 16
+; VI-NEXT: s_lshr_b32 s58, s42, 16
+; VI-NEXT: s_lshr_b32 s59, s45, 16
+; VI-NEXT: s_lshr_b32 s47, s44, 16
+; VI-NEXT: v_writelane_b32 v62, s63, 1
; VI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
; VI-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
@@ -183113,38 +184461,52 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: .LBB95_2:
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: s_mov_b64 s[48:49], -1
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: v_writelane_b32 v62, s78, 0
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 1
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr54
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr59
+; VI-NEXT: ; implicit-def: $sgpr58
+; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr85
+; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: ; implicit-def: $sgpr83
; VI-NEXT: ; implicit-def: $sgpr70
+; VI-NEXT: ; implicit-def: $sgpr81
+; VI-NEXT: ; implicit-def: $sgpr80
+; VI-NEXT: ; kill: killed $sgpr57
+; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr51
; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr87
; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr83
+; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr68
; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr86
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr61
; VI-NEXT: ; implicit-def: $sgpr76
; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr72
; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr34
@@ -183152,47 +184514,33 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr90
; VI-NEXT: ; implicit-def: $sgpr88
-; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 2
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 3
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 4
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 5
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s78, 6
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: v_writelane_b32 v62, s79, 7
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr78
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
@@ -183268,617 +184616,614 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: .LBB95_3: ; %Flow
; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
+; VI-NEXT: s_cselect_b32 s63, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s63, 1
; VI-NEXT: s_cbranch_scc1 .LBB95_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_lshr_b32 s46, s45, 16
; VI-NEXT: v_mov_b32_e32 v8, 0x200
-; VI-NEXT: v_add_f16_e32 v1, s46, v8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v2, s45, v8
-; VI-NEXT: s_lshr_b32 s45, s44, 16
-; VI-NEXT: v_or_b32_e32 v38, v2, v1
+; VI-NEXT: v_add_f16_e32 v0, s46, v8
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
; VI-NEXT: v_add_f16_e32 v1, s45, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v2, s44, v8
-; VI-NEXT: s_lshr_b32 s44, s43, 16
-; VI-NEXT: v_or_b32_e32 v37, v2, v1
+; VI-NEXT: s_lshr_b32 s45, s44, 16
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v22, v1, v2
+; VI-NEXT: v_add_f16_e32 v51, s45, v8
; VI-NEXT: v_add_f16_e32 v1, s44, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v2, s43, v8
-; VI-NEXT: s_lshr_b32 s43, s42, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v55, v2, v1
+; VI-NEXT: s_lshr_b32 s44, s43, 16
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51
+; VI-NEXT: v_add_f16_e32 v49, s44, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v21, v1, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
; VI-NEXT: v_add_f16_e32 v1, s43, v8
-; VI-NEXT: v_add_f16_e32 v2, s42, v8
+; VI-NEXT: s_lshr_b32 s43, s42, 16
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v24, v1, v2
+; VI-NEXT: v_add_f16_e32 v0, s43, v8
+; VI-NEXT: v_add_f16_e32 v1, s42, v8
; VI-NEXT: s_lshr_b32 s42, s41, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v60, s42, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v54, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
-; VI-NEXT: v_add_f16_e32 v2, s41, v8
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; VI-NEXT: v_add_f16_e32 v46, s42, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v23, v1, v2
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v46
+; VI-NEXT: v_add_f16_e32 v0, s41, v8
; VI-NEXT: s_lshr_b32 s41, s40, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v26, v2, v1
+; VI-NEXT: v_or_b32_e32 v26, v0, v1
; VI-NEXT: v_add_f16_e32 v1, s41, v8
-; VI-NEXT: v_add_f16_e32 v2, s40, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v1
+; VI-NEXT: v_add_f16_e32 v1, s40, v8
; VI-NEXT: s_lshr_b32 s40, s15, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v42, s40, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v25, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
-; VI-NEXT: v_add_f16_e32 v2, s15, v8
+; VI-NEXT: v_add_f16_e32 v48, s40, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v25, v1, v2
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_add_f16_e32 v58, s15, v8
; VI-NEXT: s_lshr_b32 s15, s14, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v24, v2, v1
+; VI-NEXT: v_or_b32_e32 v7, v58, v1
; VI-NEXT: v_add_f16_e32 v1, s15, v8
; VI-NEXT: v_add_f16_e32 v2, s14, v8
; VI-NEXT: s_lshr_b32 s14, s13, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v57, s14, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v23, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v57
+; VI-NEXT: v_add_f16_e32 v36, s14, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v6, v2, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
; VI-NEXT: v_add_f16_e32 v2, s13, v8
; VI-NEXT: s_lshr_b32 s13, s12, 16
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v28, v2, v1
; VI-NEXT: v_add_f16_e32 v1, s13, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_add_f16_e32 v2, s12, v8
; VI-NEXT: s_lshr_b32 s12, s11, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_add_f16_e32 v60, s12, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v27, v2, v1
-; VI-NEXT: v_add_f16_e32 v58, s12, v8
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
; VI-NEXT: v_add_f16_e32 v2, s11, v8
; VI-NEXT: s_lshr_b32 s11, s10, 16
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
-; VI-NEXT: v_add_f16_e32 v44, s11, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v22, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v44
-; VI-NEXT: v_add_f16_e32 v2, s10, v8
+; VI-NEXT: v_or_b32_e32 v5, v2, v1
+; VI-NEXT: v_add_f16_e32 v1, s11, v8
+; VI-NEXT: v_add_f16_e32 v38, s10, v8
; VI-NEXT: s_lshr_b32 s10, s9, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v21, v2, v1
-; VI-NEXT: v_add_f16_e32 v40, s10, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_add_f16_e32 v59, s10, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v4, v38, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
; VI-NEXT: v_add_f16_e32 v2, s9, v8
-; VI-NEXT: s_lshr_b32 s9, s8, 16
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
-; VI-NEXT: v_add_f16_e32 v47, s9, v8
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v30, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
-; VI-NEXT: v_add_f16_e32 v2, s8, v8
+; VI-NEXT: s_lshr_b32 s9, s8, 16
+; VI-NEXT: v_add_f16_e32 v44, s8, v8
; VI-NEXT: s_lshr_b32 s8, s7, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v2, v1
-; VI-NEXT: v_add_f16_e32 v43, s8, v8
; VI-NEXT: v_add_f16_e32 v2, s7, v8
; VI-NEXT: s_lshr_b32 s7, s6, 16
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v43
-; VI-NEXT: v_add_f16_e32 v45, s7, v8
; VI-NEXT: v_add_f16_e32 v3, s6, v8
; VI-NEXT: s_lshr_b32 s6, s17, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v2, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v45
-; VI-NEXT: v_add_f16_e32 v36, s6, v8
+; VI-NEXT: v_add_f16_e32 v18, s6, v8
; VI-NEXT: s_lshr_b32 s6, s16, 16
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v1, v3, v1
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
-; VI-NEXT: v_add_f16_e32 v50, s17, v8
-; VI-NEXT: v_add_f16_e32 v41, s6, v8
+; VI-NEXT: v_add_f16_e32 v1, s9, v8
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v18
+; VI-NEXT: v_add_f16_e32 v9, s17, v8
+; VI-NEXT: v_add_f16_e32 v52, s6, v8
; VI-NEXT: s_lshr_b32 s6, s19, 16
-; VI-NEXT: v_or_b32_e32 v32, v50, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
-; VI-NEXT: v_add_f16_e32 v59, s16, v8
-; VI-NEXT: v_add_f16_e32 v39, s6, v8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_add_f16_e32 v50, s8, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v32, v9, v10
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v52
+; VI-NEXT: v_add_f16_e32 v9, s16, v8
+; VI-NEXT: v_add_f16_e32 v12, s6, v8
; VI-NEXT: s_lshr_b32 s6, s18, 16
-; VI-NEXT: v_or_b32_e32 v31, v59, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v39
-; VI-NEXT: v_add_f16_e32 v52, s19, v8
-; VI-NEXT: v_add_f16_e32 v48, s6, v8
+; VI-NEXT: v_or_b32_e32 v29, v44, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v9, v10
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; VI-NEXT: v_add_f16_e32 v9, s19, v8
+; VI-NEXT: v_add_f16_e32 v39, s6, v8
; VI-NEXT: s_lshr_b32 s6, s21, 16
-; VI-NEXT: v_or_b32_e32 v20, v52, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
-; VI-NEXT: v_add_f16_e32 v61, s18, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v2, v2, v1
+; VI-NEXT: v_add_f16_e32 v1, s7, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v20, v9, v10
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v39
+; VI-NEXT: v_add_f16_e32 v9, s18, v8
; VI-NEXT: s_lshr_b32 s7, s20, 16
-; VI-NEXT: v_add_f16_e32 v35, s6, v8
-; VI-NEXT: v_or_b32_e32 v19, v61, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
-; VI-NEXT: v_add_f16_e32 v9, s21, v8
-; VI-NEXT: v_add_f16_e32 v56, s7, v8
+; VI-NEXT: v_add_f16_e32 v54, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v19, v9, v10
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v54
+; VI-NEXT: v_add_f16_e32 v15, s21, v8
+; VI-NEXT: v_add_f16_e32 v35, s7, v8
; VI-NEXT: s_lshr_b32 s6, s23, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v34, v9, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v56
-; VI-NEXT: v_add_f16_e32 v9, s20, v8
-; VI-NEXT: v_add_f16_e32 v14, s6, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v33, v9, v3
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v34, v15, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v35
+; VI-NEXT: v_add_f16_e32 v55, s20, v8
; VI-NEXT: s_lshr_b32 s7, s22, 16
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
-; VI-NEXT: v_add_f16_e32 v9, s23, v8
-; VI-NEXT: v_or_b32_e32 v16, v9, v3
+; VI-NEXT: v_add_f16_e32 v56, s6, v8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_or_b32_e32 v33, v55, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v56
+; VI-NEXT: v_add_f16_e32 v41, s23, v8
; VI-NEXT: v_add_f16_e32 v3, s7, v8
; VI-NEXT: s_lshr_b32 s6, s25, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_or_b32_e32 v17, v41, v9
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v3
; VI-NEXT: v_add_f16_e32 v9, s22, v8
-; VI-NEXT: v_add_f16_e32 v5, s6, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v9, v3
+; VI-NEXT: v_add_f16_e32 v40, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v16, v9, v10
; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v40
; VI-NEXT: v_add_f16_e32 v9, s25, v8
-; VI-NEXT: v_or_b32_e32 v13, v9, v3
-; VI-NEXT: v_add_f16_e32 v3, s7, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v14, v9, v10
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s27, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v9
; VI-NEXT: v_add_f16_e32 v9, s24, v8
+; VI-NEXT: v_add_f16_e32 v45, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v13, v9, v10
; VI-NEXT: s_lshr_b32 s7, s26, 16
-; VI-NEXT: v_add_f16_e32 v51, s6, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v12, v9, v3
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v51
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v45
; VI-NEXT: v_add_f16_e32 v10, s27, v8
-; VI-NEXT: v_add_f16_e32 v3, s7, v8
+; VI-NEXT: v_or_b32_e32 v43, v10, v9
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s29, 16
-; VI-NEXT: v_or_b32_e32 v18, v10, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; VI-NEXT: v_add_f16_e32 v3, s26, v8
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_f16_e32 v10, s26, v8
+; VI-NEXT: v_add_f16_e32 v53, s6, v8
+; VI-NEXT: v_or_b32_e32 v42, v10, v9
; VI-NEXT: s_lshr_b32 s7, s28, 16
-; VI-NEXT: v_add_f16_e32 v7, s6, v8
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v53
+; VI-NEXT: v_add_f16_e32 v57, s29, v8
+; VI-NEXT: v_or_b32_e32 v11, v57, v9
+; VI-NEXT: v_add_f16_e32 v9, s7, v8
; VI-NEXT: s_lshr_b32 s6, s5, 16
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v17, v3, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v7
-; VI-NEXT: v_add_f16_e32 v49, s29, v8
-; VI-NEXT: v_add_f16_e32 v3, s7, v8
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_f16_e32 v10, s28, v8
; VI-NEXT: s_lshr_b32 s7, s4, 16
-; VI-NEXT: v_add_f16_e32 v6, s6, v8
-; VI-NEXT: v_or_b32_e32 v11, v49, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v3
-; VI-NEXT: v_add_f16_e32 v53, s28, v8
-; VI-NEXT: v_add_f16_e32 v46, s5, v8
-; VI-NEXT: v_add_f16_e32 v4, s7, v8
-; VI-NEXT: v_add_f16_e32 v3, s4, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v6
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v10, v53, v9
-; VI-NEXT: v_or_b32_e32 v9, v46, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v4
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v8, v3, v8
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v9
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v8
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[8:9]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v11
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v10
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[10:11]
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v2
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v1
+; VI-NEXT: v_add_f16_e32 v37, s6, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v10, v10, v9
+; VI-NEXT: v_add_f16_e32 v9, s5, v8
+; VI-NEXT: v_add_f16_e32 v0, s7, v8
+; VI-NEXT: v_add_f16_e32 v47, s4, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v37
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v9, v9, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v8, v47, v8
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v9
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v11
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v10
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v43
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v42
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v14
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v13
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v17
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[16:17]
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, v39
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v1
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v17
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v12
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[4:5]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[8:9]
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v16
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v34
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v20
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[10:11]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v34
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v33
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
-; VI-NEXT: v_bfe_u32 v26, v40, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[12:13]
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[33:34]
-; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v23
-; VI-NEXT: v_mov_b32_e32 v23, v3
-; VI-NEXT: v_bfe_u32 v3, v43, 8, 8
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v26, v57, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v58, 8, 8
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v26, v42, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[6:7]
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[42:43]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v26
+; VI-NEXT: v_mov_b32_e32 v11, v3
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v19
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[54:55]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v15, v5, 8, 8
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v2, v14, 8, 8
-; VI-NEXT: v_mov_b32_e32 v5, v35
-; VI-NEXT: v_bfe_u32 v21, v35, 8, 8
-; VI-NEXT: v_mov_b32_e32 v28, v39
-; VI-NEXT: v_bfe_u32 v22, v39, 8, 8
-; VI-NEXT: v_mov_b32_e32 v31, v36
-; VI-NEXT: v_bfe_u32 v27, v36, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v3, v60, 8, 8
-; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v54, v50
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v39, v13
-; VI-NEXT: v_mov_b32_e32 v13, v48
-; VI-NEXT: v_mov_b32_e32 v48, v9
-; VI-NEXT: v_mov_b32_e32 v9, v41
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v7
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[25:26]
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v24
+; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[23:24]
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v4, v59
+; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v38
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v37
-; VI-NEXT: v_lshrrev_b64 v[37:38], 24, v[37:38]
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v55
-; VI-NEXT: v_mov_b32_e32 v55, v6
-; VI-NEXT: v_bfe_u32 v38, v6, 8, 8
-; VI-NEXT: v_mov_b32_e32 v6, v7
-; VI-NEXT: v_bfe_u32 v24, v7, 8, 8
-; VI-NEXT: v_bfe_u32 v32, v51, 8, 8
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_bfe_u32 v12, v60, 8, 8
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_bfe_u32 v26, v50, 8, 8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v25, v60
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v21
+; VI-NEXT: v_lshrrev_b64 v[59:60], 24, v[21:22]
+; VI-NEXT: v_mov_b32_e32 v21, v41
+; VI-NEXT: v_mov_b32_e32 v41, v56
+; VI-NEXT: v_bfe_u32 v7, v56, 8, 8
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v56, v4, 8, 8
+; VI-NEXT: v_bfe_u32 v4, v36, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v30
+; VI-NEXT: v_mov_b32_e32 v32, v54
+; VI-NEXT: v_mov_b32_e32 v34, v12
+; VI-NEXT: v_mov_b32_e32 v3, v18
+; VI-NEXT: v_mov_b32_e32 v42, v38
+; VI-NEXT: v_mov_b32_e32 v38, v4
+; VI-NEXT: v_bfe_u32 v4, v46, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v23
+; VI-NEXT: v_mov_b32_e32 v2, v51
+; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v22
+; VI-NEXT: v_mov_b32_e32 v51, v55
+; VI-NEXT: v_mov_b32_e32 v60, v9
+; VI-NEXT: v_mov_b32_e32 v9, v52
+; VI-NEXT: v_bfe_u32 v22, v37, 8, 8
+; VI-NEXT: v_mov_b32_e32 v54, v53
+; VI-NEXT: v_bfe_u32 v12, v53, 8, 8
+; VI-NEXT: v_mov_b32_e32 v55, v45
+; VI-NEXT: v_bfe_u32 v53, v45, 8, 8
+; VI-NEXT: v_mov_b32_e32 v45, v40
+; VI-NEXT: v_bfe_u32 v27, v40, 8, 8
+; VI-NEXT: v_mov_b32_e32 v40, v1
+; VI-NEXT: v_bfe_u32 v31, v32, 8, 8
+; VI-NEXT: v_bfe_u32 v28, v34, 8, 8
+; VI-NEXT: v_bfe_u32 v1, v3, 8, 8
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v6, v50, 8, 8
+; VI-NEXT: v_mov_b32_e32 v50, v58
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v58, v25, 8, 8
+; VI-NEXT: v_bfe_u32 v52, v48, 8, 8
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v4, v49, 8, 8
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_bfe_u32 v25, v26, 8, 8
; VI-NEXT: s_branch .LBB95_6
; VI-NEXT: .LBB95_5:
+; VI-NEXT: v_mov_b32_e32 v1, s44
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s43
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s16
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s18
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s24
-; VI-NEXT: v_readlane_b32 s6, v62, 0
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_mov_b32_e32 v9, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s26
-; VI-NEXT: v_mov_b32_e32 v31, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 2
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s27
-; VI-NEXT: v_mov_b32_e32 v13, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 3
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s67
-; VI-NEXT: v_mov_b32_e32 v28, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s66
-; VI-NEXT: v_mov_b32_e32 v56, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: v_mov_b32_e32 v5, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s56
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s84
; VI-NEXT: v_readlane_b32 s6, v62, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s81
+; VI-NEXT: v_mov_b32_e32 v9, s6
; VI-NEXT: v_readlane_b32 s6, v62, 9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s80
+; VI-NEXT: v_mov_b32_e32 v3, s6
; VI-NEXT: v_readlane_b32 s6, v62, 10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s71
+; VI-NEXT: v_mov_b32_e32 v17, s6
; VI-NEXT: v_readlane_b32 s6, v62, 11
-; VI-NEXT: v_mov_b32_e32 v51, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s69
+; VI-NEXT: v_mov_b32_e32 v34, s6
; VI-NEXT: v_readlane_b32 s6, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s67
+; VI-NEXT: v_mov_b32_e32 v35, s6
; VI-NEXT: v_readlane_b32 s6, v62, 13
-; VI-NEXT: v_mov_b32_e32 v6, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s65
+; VI-NEXT: v_mov_b32_e32 v32, s6
; VI-NEXT: v_readlane_b32 s6, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s55
+; VI-NEXT: v_mov_b32_e32 v11, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 15
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s52
+; VI-NEXT: v_mov_b32_e32 v41, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 16
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 17
+; VI-NEXT: v_mov_b32_e32 v45, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 18
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 19
+; VI-NEXT: v_mov_b32_e32 v55, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 20
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s54
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: v_mov_b32_e32 v38, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: v_mov_b32_e32 v24, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: v_mov_b32_e32 v32, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: v_mov_b32_e32 v15, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: v_mov_b32_e32 v21, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 22
; VI-NEXT: v_mov_b32_e32 v22, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 22
+; VI-NEXT: v_mov_b32_e32 v12, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: v_mov_b32_e32 v27, s4
+; VI-NEXT: v_mov_b32_e32 v53, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v27, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s80
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s81
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s82
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s83
+; VI-NEXT: v_mov_b32_e32 v7, s4
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v31, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s5
+; VI-NEXT: v_mov_b32_e32 v28, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v4, s53
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v0, s41
+; VI-NEXT: v_mov_b32_e32 v25, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: v_mov_b32_e32 v33, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v14, s4
+; VI-NEXT: v_mov_b32_e32 v6, s66
; VI-NEXT: v_readlane_b32 s4, v62, 47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s51
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: v_mov_b32_e32 v48, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: v_mov_b32_e32 v4, s4
-; VI-NEXT: v_mov_b32_e32 v3, s46
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, s56
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, s78
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, s88
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, s90
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, vcc_lo
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, s30
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v40, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: v_mov_b32_e32 v23, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
; VI-NEXT: v_mov_b32_e32 v29, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 55
; VI-NEXT: v_mov_b32_e32 v30, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: v_readlane_b32 s6, v62, 15
+; VI-NEXT: v_readlane_b32 s4, v62, 55
; VI-NEXT: v_mov_b32_e32 v20, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 56
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
-; VI-NEXT: v_mov_b32_e32 v3, s34
-; VI-NEXT: v_mov_b32_e32 v35, s44
-; VI-NEXT: v_mov_b32_e32 v59, s16
-; VI-NEXT: v_mov_b32_e32 v54, s17
-; VI-NEXT: v_mov_b32_e32 v61, s18
-; VI-NEXT: v_mov_b32_e32 v52, s19
-; VI-NEXT: v_mov_b32_e32 v14, s71
-; VI-NEXT: v_mov_b32_e32 v60, s70
-; VI-NEXT: v_mov_b32_e32 v36, s69
-; VI-NEXT: v_mov_b32_e32 v50, s68
-; VI-NEXT: v_mov_b32_e32 v42, s64
-; VI-NEXT: v_mov_b32_e32 v41, s55
-; VI-NEXT: v_mov_b32_e32 v57, s54
-; VI-NEXT: v_mov_b32_e32 v44, s87
-; VI-NEXT: v_mov_b32_e32 v58, s86
-; VI-NEXT: v_mov_b32_e32 v47, s85
-; VI-NEXT: v_mov_b32_e32 v40, s84
-; VI-NEXT: v_mov_b32_e32 v45, s53
-; VI-NEXT: v_mov_b32_e32 v43, s52
-; VI-NEXT: v_mov_b32_e32 v55, s6
-; VI-NEXT: v_mov_b32_e32 v53, s28
-; VI-NEXT: v_mov_b32_e32 v49, s29
-; VI-NEXT: v_mov_b32_e32 v46, s5
-; VI-NEXT: v_mov_b32_e32 v26, s50
-; VI-NEXT: v_mov_b32_e32 v12, s51
-; VI-NEXT: v_mov_b32_e32 v25, s4
-; VI-NEXT: v_mov_b32_e32 v10, s58
-; VI-NEXT: v_mov_b32_e32 v8, s60
+; VI-NEXT: v_mov_b32_e32 v23, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 6
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 7
+; VI-NEXT: v_readlane_b32 s4, v62, 4
+; VI-NEXT: v_mov_b32_e32 v6, s4
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s78
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s88
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, s90
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v6, vcc_lo
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 5
+; VI-NEXT: v_mov_b32_e32 v6, s30
+; VI-NEXT: v_readlane_b32 s4, v62, 2
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s5, v62, 3
+; VI-NEXT: v_mov_b32_e32 v6, s61
+; VI-NEXT: v_mov_b32_e32 v5, s34
+; VI-NEXT: v_mov_b32_e32 v10, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 0
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v50, s15
+; VI-NEXT: v_mov_b32_e32 v42, s10
+; VI-NEXT: v_mov_b32_e32 v44, s8
+; VI-NEXT: v_mov_b32_e32 v51, s20
+; VI-NEXT: v_mov_b32_e32 v15, s21
+; VI-NEXT: v_mov_b32_e32 v21, s23
+; VI-NEXT: v_mov_b32_e32 v2, s47
+; VI-NEXT: v_mov_b32_e32 v26, s59
+; VI-NEXT: v_mov_b32_e32 v24, s58
+; VI-NEXT: v_mov_b32_e32 v49, s86
+; VI-NEXT: v_mov_b32_e32 v46, s85
+; VI-NEXT: v_mov_b32_e32 v48, s83
+; VI-NEXT: v_mov_b32_e32 v54, s50
+; VI-NEXT: v_mov_b32_e32 v37, s64
+; VI-NEXT: v_mov_b32_e32 v57, s29
+; VI-NEXT: v_mov_b32_e32 v56, s60
+; VI-NEXT: v_mov_b32_e32 v58, s87
+; VI-NEXT: v_mov_b32_e32 v38, s46
+; VI-NEXT: v_mov_b32_e32 v52, s70
+; VI-NEXT: v_mov_b32_e32 v39, s82
+; VI-NEXT: v_mov_b32_e32 v47, s57
+; VI-NEXT: v_mov_b32_e32 v60, s68
+; VI-NEXT: v_readlane_b32 s5, v62, 1
+; VI-NEXT: v_mov_b32_e32 v13, s4
; VI-NEXT: v_mov_b32_e32 v16, s62
-; VI-NEXT: v_mov_b32_e32 v17, s72
-; VI-NEXT: v_mov_b32_e32 v18, s74
+; VI-NEXT: v_mov_b32_e32 v8, s72
+; VI-NEXT: v_mov_b32_e32 v33, s74
; VI-NEXT: v_mov_b32_e32 v19, s76
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v11, s36
-; VI-NEXT: v_mov_b32_e32 v37, s38
+; VI-NEXT: v_mov_b32_e32 v5, s36
+; VI-NEXT: v_mov_b32_e32 v59, s38
; VI-NEXT: .LBB95_6: ; %end
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v18, v13, v18, s4
+; VI-NEXT: v_perm_b32 v18, v17, v33, s4
+; VI-NEXT: v_perm_b32 v17, v35, v8, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v19, v9, v19, s4
-; VI-NEXT: v_perm_b32 v11, v36, v11, s4
-; VI-NEXT: v_perm_b32 v36, v59, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_e32 v19, v36, v19
-; VI-NEXT: v_perm_b32 v27, v31, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v17, v56, v17, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_perm_b32 v14, v14, v37, s4
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v16, v11, v16, s4
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_perm_b32 v11, v24, v5, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -183912,275 +185257,279 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v3, v16, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v3, v8, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_perm_b32 v13, v8, v13, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v3, v10, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_perm_b32 v10, v8, v10, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v9, v3, v7, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v19, v54, v34, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v27
-; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v8, v3, v7, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v61, v3, s4
-; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v19, v28, v22, s4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v52, v3, s4
-; VI-NEXT: v_or_b32_e32 v18, v18, v19
-; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v3, s4
-; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v18, v5, v21, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; VI-NEXT: v_perm_b32 v9, v8, v35, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v8, v8, v35, s4
+; VI-NEXT: v_perm_b32 v35, v2, v59, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v3, s4
-; VI-NEXT: v_or_b32_e32 v17, v17, v18
-; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v43, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v19
+; VI-NEXT: buffer_store_dword v2, v61, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v3, s4
-; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v14, s4
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v16, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v18
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v34, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v2, v16, v2
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v13
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v3, v15, s4
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_e32 v2, v2, v13
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:12
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v10
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v51, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v32, v31, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v3, v51, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; VI-NEXT: v_perm_b32 v1, v15, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:20
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v53, v2, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v3, v6, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v41, v7, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v49, v2, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v21, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:28
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v8
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v3, v55, v38, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v46, v2, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_perm_b32 v2, v35, v20, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v3, v60, v12, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v45, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:36
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v25, s4
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v55, v53, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:44
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v50, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v30, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v5, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v54, v12, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v57, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:52
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_perm_b32 v2, v37, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:60
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v35
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v1, v1, v0, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:64
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v26, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v23, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v42, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v30, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v49, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v20, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:76
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v41, v2, s4
-; VI-NEXT: v_perm_b32 v1, v1, v39, s4
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v2, v46, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v57, v2, s4
+; VI-NEXT: v_perm_b32 v1, v0, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v40, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v44, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v48, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v50, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v1, s4
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v58, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v38, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v42, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v58, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v44, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v47, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v60, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v40, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v56, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v39, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v45, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v47, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v43, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
+; VI-NEXT: v_perm_b32 v1, v1, v6, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: buffer_store_dword v1, v61, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -184196,8 +185545,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -184206,8 +185555,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -184282,8 +185631,6 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB95_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 49
; GFX9-NEXT: s_lshr_b32 s46, s5, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
@@ -184381,38 +185728,40 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 1
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 0
-; GFX9-NEXT: s_lshr_b32 s82, s11, 24
-; GFX9-NEXT: s_lshr_b32 s83, s11, 16
-; GFX9-NEXT: s_lshr_b32 s85, s11, 8
-; GFX9-NEXT: s_lshr_b32 s84, s10, 16
-; GFX9-NEXT: s_lshr_b32 s86, s10, 8
-; GFX9-NEXT: s_lshr_b32 s87, s13, 24
-; GFX9-NEXT: s_lshr_b32 s96, s13, 16
-; GFX9-NEXT: s_lshr_b32 s98, s13, 8
-; GFX9-NEXT: s_lshr_b32 s97, s12, 16
-; GFX9-NEXT: s_lshr_b32 s99, s12, 8
-; GFX9-NEXT: s_lshr_b32 s38, s15, 24
-; GFX9-NEXT: s_lshr_b32 s39, s15, 16
-; GFX9-NEXT: s_lshr_b32 s49, s15, 8
-; GFX9-NEXT: s_lshr_b32 s48, s14, 16
-; GFX9-NEXT: s_lshr_b32 s50, s14, 8
-; GFX9-NEXT: s_lshr_b32 s51, s41, 24
-; GFX9-NEXT: s_lshr_b32 s52, s41, 16
-; GFX9-NEXT: s_lshr_b32 s54, s41, 8
-; GFX9-NEXT: s_lshr_b32 s53, s40, 16
-; GFX9-NEXT: s_lshr_b32 s55, s40, 8
-; GFX9-NEXT: s_lshr_b32 s64, s43, 24
-; GFX9-NEXT: s_lshr_b32 s65, s43, 16
-; GFX9-NEXT: s_lshr_b32 s67, s43, 8
-; GFX9-NEXT: s_lshr_b32 s66, s42, 16
-; GFX9-NEXT: s_lshr_b32 s68, s42, 8
-; GFX9-NEXT: s_lshr_b32 s69, s45, 24
-; GFX9-NEXT: s_lshr_b32 s70, s45, 16
-; GFX9-NEXT: s_lshr_b32 s80, s45, 8
-; GFX9-NEXT: s_lshr_b32 s71, s44, 16
-; GFX9-NEXT: s_lshr_b32 s81, s44, 8
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s80, s11, 24
+; GFX9-NEXT: s_lshr_b32 s81, s11, 16
+; GFX9-NEXT: s_lshr_b32 s83, s11, 8
+; GFX9-NEXT: s_lshr_b32 s82, s10, 16
+; GFX9-NEXT: s_lshr_b32 s84, s10, 8
+; GFX9-NEXT: s_lshr_b32 s85, s13, 24
+; GFX9-NEXT: s_lshr_b32 s86, s13, 16
+; GFX9-NEXT: s_lshr_b32 s96, s13, 8
+; GFX9-NEXT: s_lshr_b32 s87, s12, 16
+; GFX9-NEXT: s_lshr_b32 s97, s12, 8
+; GFX9-NEXT: s_lshr_b32 s98, s15, 24
+; GFX9-NEXT: s_lshr_b32 s99, s15, 16
+; GFX9-NEXT: s_lshr_b32 s39, s15, 8
+; GFX9-NEXT: s_lshr_b32 s38, s14, 16
+; GFX9-NEXT: s_lshr_b32 s48, s14, 8
+; GFX9-NEXT: s_lshr_b32 s49, s41, 24
+; GFX9-NEXT: s_lshr_b32 s50, s41, 16
+; GFX9-NEXT: s_lshr_b32 s52, s41, 8
+; GFX9-NEXT: s_lshr_b32 s51, s40, 16
+; GFX9-NEXT: s_lshr_b32 s53, s40, 8
+; GFX9-NEXT: s_lshr_b32 s54, s43, 24
+; GFX9-NEXT: s_lshr_b32 s55, s43, 16
+; GFX9-NEXT: s_lshr_b32 s65, s43, 8
+; GFX9-NEXT: s_lshr_b32 s64, s42, 16
+; GFX9-NEXT: s_lshr_b32 s66, s42, 8
+; GFX9-NEXT: s_lshr_b32 s67, s45, 24
+; GFX9-NEXT: s_lshr_b32 s68, s45, 16
+; GFX9-NEXT: s_lshr_b32 s70, s45, 8
+; GFX9-NEXT: s_lshr_b32 s69, s44, 16
+; GFX9-NEXT: s_lshr_b32 s71, s44, 8
+; GFX9-NEXT: s_mov_b32 s47, s56
; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24
; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
@@ -184436,36 +185785,37 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr65
+; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr65
; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr53
; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr53
; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr52
; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr96
; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr84
; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr84
; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr80
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
@@ -184576,12 +185926,10 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB95_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
+; GFX9-NEXT: s_cselect_b32 s57, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s57, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB95_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v15, 0x200
@@ -184618,345 +185966,342 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: v_pk_add_f16 v28, s29, v15 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_f16 v27, s28, v15 op_sel_hi:[1,0]
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v38
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v38
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v49
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v49
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v4
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v3
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v3
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v6
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v5
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v8
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v8
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v7
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v7
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v10
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v10
; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v9
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30]
+; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[31:32]
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v38
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v12
+; GFX9-NEXT: v_mov_b32_e32 v18, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v12
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v11
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v13
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v20
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v20
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[35:36]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[37:38]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v20
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[37:38]
+; GFX9-NEXT: v_mov_b32_e32 v24, v16
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v36
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v20
-; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[48:49]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v20
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[33:34]
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v36
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v25
; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v30
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v31
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v31
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v33
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v19
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: s_branch .LBB95_6
; GFX9-NEXT: .LBB95_5:
-; GFX9-NEXT: v_mov_b32_e32 v15, s81
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s71
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s80
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s70
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s69
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s70
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s68
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s66
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s67
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s65
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s66
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s64
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s65
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s55
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s54
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s52
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s53
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s51
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s52
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s50
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s48
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s49
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s39
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s48
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s38
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s39
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s99
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s97
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s98
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s96
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s97
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s87
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s96
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s86
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s84
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s85
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s84
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s82
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s83
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s81
; GFX9-NEXT: v_mov_b32_e32 v25, s4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s82
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s80
; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
; GFX9-NEXT: v_mov_b32_e32 v50, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: v_mov_b32_e32 v52, s4
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: v_mov_b32_e32 v24, s4
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
; GFX9-NEXT: v_mov_b32_e32 v21, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
; GFX9-NEXT: v_mov_b32_e32 v61, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
; GFX9-NEXT: v_mov_b32_e32 v23, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: v_mov_b32_e32 v53, s4
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
; GFX9-NEXT: v_mov_b32_e32 v60, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
; GFX9-NEXT: v_mov_b32_e32 v57, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
@@ -184964,71 +186309,80 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
; GFX9-NEXT: v_mov_b32_e32 v56, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s46
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s56
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s47
+; GFX9-NEXT: v_mov_b32_e32 v19, s44
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s46
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v45, s78
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s56
+; GFX9-NEXT: v_mov_b32_e32 v52, s62
+; GFX9-NEXT: v_mov_b32_e32 v45, v51
+; GFX9-NEXT: v_mov_b32_e32 v51, s88
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s58
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s60
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s58
+; GFX9-NEXT: v_mov_b32_e32 v51, v17
+; GFX9-NEXT: v_mov_b32_e32 v17, s90
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s62
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s92
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s72
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s94
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s78
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, vcc_lo
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s88
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s30
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v19, s44
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s34
; GFX9-NEXT: v_mov_b32_e32 v20, s45
; GFX9-NEXT: v_mov_b32_e32 v13, s42
; GFX9-NEXT: v_mov_b32_e32 v14, s43
@@ -185059,63 +186413,39 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v27, s28
; GFX9-NEXT: v_mov_b32_e32 v28, s29
; GFX9-NEXT: v_mov_b32_e32 v26, s5
-; GFX9-NEXT: v_mov_b32_e32 v43, s74
-; GFX9-NEXT: v_mov_b32_e32 v44, s76
-; GFX9-NEXT: v_mov_b32_e32 v40, v41
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v22
-; GFX9-NEXT: v_mov_b32_e32 v22, s90
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s92
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s94
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, vcc_lo
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s34
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v24, s60
+; GFX9-NEXT: v_mov_b32_e32 v39, s72
+; GFX9-NEXT: v_mov_b32_e32 v40, s74
+; GFX9-NEXT: v_mov_b32_e32 v41, s76
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB95_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v37, v37, v52, s4
-; GFX9-NEXT: v_perm_b32 v31, v31, v53, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v33, v33, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v21, v35, v21, s4
+; GFX9-NEXT: v_perm_b32 v35, v61, v52, s4
+; GFX9-NEXT: v_perm_b32 v32, v32, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4
; GFX9-NEXT: v_perm_b32 v16, v36, v16, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v24, v38, v24, s4
-; GFX9-NEXT: v_perm_b32 v17, v28, v17, s4
-; GFX9-NEXT: v_perm_b32 v48, v48, v55, s4
+; GFX9-NEXT: v_perm_b32 v22, v22, v41, s4
+; GFX9-NEXT: v_perm_b32 v48, v48, v44, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v48, v22
; GFX9-NEXT: v_perm_b32 v49, v49, v50, s4
-; GFX9-NEXT: v_perm_b32 v50, v54, v43, s4
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v39, v39, v44, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39
-; GFX9-NEXT: v_or_b32_e32 v39, v48, v39
-; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4
-; GFX9-NEXT: v_perm_b32 v32, v32, v59, s4
+; GFX9-NEXT: v_perm_b32 v50, v43, v40, s4
+; GFX9-NEXT: v_perm_b32 v37, v37, v42, s4
+; GFX9-NEXT: v_perm_b32 v38, v38, v55, s4
+; GFX9-NEXT: v_perm_b32 v39, v54, v39, s4
+; GFX9-NEXT: v_perm_b32 v24, v60, v24, s4
+; GFX9-NEXT: v_perm_b32 v31, v31, v59, s4
+; GFX9-NEXT: v_perm_b32 v18, v58, v18, s4
; GFX9-NEXT: v_perm_b32 v29, v29, v57, s4
; GFX9-NEXT: v_perm_b32 v30, v30, v56, s4
; GFX9-NEXT: v_perm_b32 v27, v27, v46, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v45, s4
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -185153,271 +186483,270 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v36, v58, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v22, v25, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v35, v61, v35, s4
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v18, v21, v18
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v38, v47, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v25, v26, v15, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v34, v60, v54, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v28, v51, v52, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v28, v15, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v34, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v15, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v28, v45, v52, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v26, v26, v15, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v15, v51, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v36, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v19, v19, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v20, v20, v15, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4
-; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v39, v39, v48, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39
-; GFX9-NEXT: v_or_b32_e32 v39, v49, v39
-; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v50
-; GFX9-NEXT: v_or_b32_e32 v37, v37, v39
-; GFX9-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v22, v48, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v49, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v22, v37, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v37, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX9-NEXT: v_or_b32_e32 v24, v24, v37
-; GFX9-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v22, v37, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v38, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v39
+; GFX9-NEXT: v_or_b32_e32 v21, v21, v22
+; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v21, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v16, v16, v18
+; GFX9-NEXT: v_perm_b32 v21, v21, v22, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX9-NEXT: v_or_b32_e32 v16, v16, v21
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v35
; GFX9-NEXT: v_or_b32_e32 v16, v33, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v23, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v24
; GFX9-NEXT: v_or_b32_e32 v16, v31, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v32, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v18
; GFX9-NEXT: v_or_b32_e32 v16, v29, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v30, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34
; GFX9-NEXT: v_or_b32_e32 v16, v27, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v28
-; GFX9-NEXT: v_or_b32_e32 v16, v22, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v26, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v26
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36
; GFX9-NEXT: v_or_b32_e32 v16, v19, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4
; GFX9-NEXT: v_or_b32_e32 v13, v13, v15
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_or_b32_e32 v13, v13, v14
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX9-NEXT: v_or_b32_e32 v9, v9, v11
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_or_b32_e32 v7, v7, v9
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4
; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_or_b32_e32 v3, v3, v5
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: v_perm_b32 v1, v2, v41, s4
-; GFX9-NEXT: v_perm_b32 v2, v40, v42, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v51, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -185436,8 +186765,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -185545,219 +186874,211 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s100, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB95_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s30, s5, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s31, s5, 16
-; GFX11-NEXT: s_lshr_b32 s35, s5, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b32 s36, s4, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 24
-; GFX11-NEXT: s_lshr_b32 s38, s7, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-NEXT: s_lshr_b32 s48, s7, 8
-; GFX11-NEXT: s_lshr_b32 s39, s6, 16
-; GFX11-NEXT: s_lshr_b32 s49, s6, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-NEXT: s_lshr_b32 s50, s9, 24
-; GFX11-NEXT: s_lshr_b32 s51, s9, 16
-; GFX11-NEXT: s_lshr_b32 s53, s9, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_lshr_b32 s52, s8, 16
-; GFX11-NEXT: s_lshr_b32 s54, s8, 8
-; GFX11-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: s_lshr_b32 s64, s11, 16
-; GFX11-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-NEXT: s_lshr_b32 s65, s10, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_lshr_b32 s67, s10, 8
-; GFX11-NEXT: s_lshr_b32 s68, s13, 24
-; GFX11-NEXT: s_lshr_b32 s69, s13, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-NEXT: s_lshr_b32 s71, s13, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s80, s12, 8
-; GFX11-NEXT: s_lshr_b32 s81, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: s_lshr_b32 s82, s15, 16
-; GFX11-NEXT: s_lshr_b32 s84, s15, 8
-; GFX11-NEXT: s_lshr_b32 s83, s14, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s85, s14, 8
-; GFX11-NEXT: s_lshr_b32 s86, s41, 24
-; GFX11-NEXT: s_lshr_b32 s87, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: s_lshr_b32 s97, s41, 8
-; GFX11-NEXT: s_lshr_b32 s96, s40, 16
-; GFX11-NEXT: s_lshr_b32 s98, s40, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-NEXT: s_lshr_b32 s99, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s29, 16
-; GFX11-NEXT: s_lshr_b32 s103, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-NEXT: s_lshr_b32 s102, s28, 16
-; GFX11-NEXT: s_lshr_b32 s104, s28, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-NEXT: s_lshr_b32 s59, s11, 8
+; GFX11-NEXT: s_lshr_b32 s76, s10, 16
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-NEXT: s_lshr_b32 s87, s27, 24
+; GFX11-NEXT: s_lshr_b32 s85, s27, 16
+; GFX11-NEXT: s_lshr_b32 s86, s27, 8
+; GFX11-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-NEXT: s_lshr_b32 s83, s26, 16
+; GFX11-NEXT: s_lshr_b32 s84, s26, 8
+; GFX11-NEXT: s_lshr_b32 s80, s25, 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-NEXT: s_lshr_b32 s81, s25, 16
+; GFX11-NEXT: s_lshr_b32 s82, s25, 8
+; GFX11-NEXT: s_lshr_b32 s70, s24, 16
+; GFX11-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-NEXT: s_lshr_b32 s71, s24, 8
+; GFX11-NEXT: s_lshr_b32 s69, s23, 24
+; GFX11-NEXT: s_lshr_b32 s67, s23, 16
+; GFX11-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-NEXT: s_lshr_b32 s68, s23, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 31
; GFX11-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 16
+; GFX11-NEXT: s_lshr_b32 s66, s22, 8
+; GFX11-NEXT: s_lshr_b32 s64, s21, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 30
; GFX11-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-NEXT: s_lshr_b32 s53, s5, 24
+; GFX11-NEXT: s_lshr_b32 s54, s5, 16
+; GFX11-NEXT: s_lshr_b32 s55, s5, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 29
; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-NEXT: s_lshr_b32 s51, s4, 16
+; GFX11-NEXT: s_lshr_b32 s52, s4, 8
+; GFX11-NEXT: s_lshr_b32 s50, s7, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 28
; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-NEXT: s_lshr_b32 s48, s7, 16
+; GFX11-NEXT: s_lshr_b32 s49, s7, 8
+; GFX11-NEXT: s_lshr_b32 s38, s6, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 27
; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-NEXT: s_lshr_b32 s39, s6, 8
+; GFX11-NEXT: s_lshr_b32 s35, s9, 24
+; GFX11-NEXT: s_lshr_b32 s36, s9, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 26
; GFX11-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-NEXT: s_lshr_b32 s37, s9, 8
+; GFX11-NEXT: s_lshr_b32 s31, s8, 16
+; GFX11-NEXT: s_lshr_b32 s34, s8, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 25
; GFX11-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-NEXT: s_lshr_b32 s30, s11, 24
+; GFX11-NEXT: s_lshr_b32 s63, s11, 16
+; GFX11-NEXT: s_lshr_b32 s61, s10, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 24
; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-NEXT: s_lshr_b32 s45, s13, 24
+; GFX11-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-NEXT: s_lshr_b32 s57, s13, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 23
; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-NEXT: s_lshr_b32 s62, s12, 16
+; GFX11-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 22
; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-NEXT: s_lshr_b32 s56, s15, 16
+; GFX11-NEXT: s_lshr_b32 s58, s15, 8
+; GFX11-NEXT: s_lshr_b32 s44, s14, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 21
; GFX11-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-NEXT: s_lshr_b32 s46, s14, 8
+; GFX11-NEXT: s_lshr_b32 s103, s41, 24
+; GFX11-NEXT: s_lshr_b32 s104, s41, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 20
; GFX11-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-NEXT: s_lshr_b32 s101, s40, 16
+; GFX11-NEXT: s_lshr_b32 s102, s40, 8
+; GFX11-NEXT: s_lshr_b32 s100, s29, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 19
; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-NEXT: s_lshr_b32 s98, s29, 16
+; GFX11-NEXT: s_lshr_b32 s99, s29, 8
+; GFX11-NEXT: s_lshr_b32 s96, s28, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 18
; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-NEXT: s_lshr_b32 s97, s28, 8
+; GFX11-NEXT: s_mov_b32 s73, s59
+; GFX11-NEXT: s_mov_b32 s59, s76
+; GFX11-NEXT: v_writelane_b32 v77, s42, 17
; GFX11-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 16
; GFX11-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 15
; GFX11-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v77, s74, 12
+; GFX11-NEXT: v_writelane_b32 v77, s75, 13
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 10
+; GFX11-NEXT: v_writelane_b32 v77, s75, 11
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 8
+; GFX11-NEXT: v_writelane_b32 v77, s75, 9
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 6
+; GFX11-NEXT: v_writelane_b32 v77, s75, 7
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 4
+; GFX11-NEXT: v_writelane_b32 v77, s75, 5
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 2
+; GFX11-NEXT: v_writelane_b32 v77, s75, 3
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 0
+; GFX11-NEXT: v_writelane_b32 v77, s75, 1
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-NEXT: s_mov_b32 s75, 0
; GFX11-NEXT: s_branch .LBB95_3
; GFX11-NEXT: .LBB95_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s100, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: s_mov_b32 s75, -1
; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr65
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr69
+; GFX11-NEXT: ; implicit-def: $sgpr71
+; GFX11-NEXT: ; implicit-def: $sgpr70
+; GFX11-NEXT: ; implicit-def: $sgpr82
+; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr84
+; GFX11-NEXT: ; implicit-def: $sgpr83
+; GFX11-NEXT: ; implicit-def: $sgpr86
+; GFX11-NEXT: ; implicit-def: $sgpr85
+; GFX11-NEXT: ; implicit-def: $sgpr87
+; GFX11-NEXT: ; implicit-def: $sgpr97
+; GFX11-NEXT: ; implicit-def: $sgpr96
+; GFX11-NEXT: ; implicit-def: $sgpr99
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr100
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr101
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr103
; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr56
+; GFX11-NEXT: ; implicit-def: $sgpr44
; GFX11-NEXT: ; implicit-def: $sgpr58
+; GFX11-NEXT: ; implicit-def: $sgpr56
; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr57
+; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr61
+; GFX11-NEXT: ; implicit-def: $sgpr59
+; GFX11-NEXT: ; implicit-def: $sgpr73
+; GFX11-NEXT: ; implicit-def: $sgpr63
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr31
; GFX11-NEXT: ; implicit-def: $sgpr37
; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr39
+; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr50
+; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr51
+; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr54
+; GFX11-NEXT: ; implicit-def: $sgpr53
; GFX11-NEXT: ; implicit-def: $sgpr72
; GFX11-NEXT: ; implicit-def: $vcc_lo
; GFX11-NEXT: ; implicit-def: $sgpr94
@@ -185767,86 +187088,85 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: ; implicit-def: $sgpr78
; GFX11-NEXT: ; implicit-def: $sgpr76
; GFX11-NEXT: ; implicit-def: $sgpr74
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-NEXT: v_writelane_b32 v77, s43, 1
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-NEXT: v_writelane_b32 v77, s43, 3
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-NEXT: v_writelane_b32 v77, s43, 5
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-NEXT: v_writelane_b32 v77, s43, 7
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 8
+; GFX11-NEXT: v_writelane_b32 v77, s43, 9
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 10
+; GFX11-NEXT: v_writelane_b32 v77, s43, 11
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 12
+; GFX11-NEXT: v_writelane_b32 v77, s43, 13
+; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: .LBB95_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s100, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-NEXT: s_and_b32 s75, s75, exec_lo
+; GFX11-NEXT: s_cselect_b32 s75, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s75, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB95_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s19 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s27 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s26 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s18 op_sel_hi:[0,1]
-; GFX11-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s16 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s25 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s24 op_sel_hi:[0,1]
@@ -185874,6 +187194,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: v_pk_add_f16 v35, 0x200, s0 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s21 op_sel_hi:[0,1]
; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s20 op_sel_hi:[0,1]
+; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v30
; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
@@ -185893,43 +187214,42 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17
; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20
; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20
+; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v20
; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19
+; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v19
; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22
; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22
; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21
+; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21
; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21
; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v23
+; GFX11-NEXT: v_lshrrev_b32_e32 v47, 24, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v28
; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35
+; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v45, 16, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v63, 16, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v61, 24, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v58, 8, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v35
+; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v35
; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2
@@ -185970,195 +187290,186 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16
; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15
+; GFX11-NEXT: v_mov_b32_e32 v68, v73
; GFX11-NEXT: s_branch .LBB95_6
; GFX11-NEXT: .LBB95_5:
; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 14
; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 15
; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 16
; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 17
; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 18
; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 19
; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 20
; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 21
; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
-; GFX11-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
+; GFX11-NEXT: v_dual_mov_b32 v134, s97 :: v_dual_mov_b32 v145, s96
+; GFX11-NEXT: v_mov_b32_e32 v56, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 22
+; GFX11-NEXT: v_dual_mov_b32 v132, s99 :: v_dual_mov_b32 v135, s98
+; GFX11-NEXT: v_dual_mov_b32 v144, s100 :: v_dual_mov_b32 v131, s102
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
-; GFX11-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
-; GFX11-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
+; GFX11-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 23
+; GFX11-NEXT: v_dual_mov_b32 v133, s101 :: v_dual_mov_b32 v128, s42
+; GFX11-NEXT: v_dual_mov_b32 v129, s104 :: v_dual_mov_b32 v130, s103
+; GFX11-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 24
+; GFX11-NEXT: v_dual_mov_b32 v116, s46 :: v_dual_mov_b32 v119, s44
+; GFX11-NEXT: v_dual_mov_b32 v114, s58 :: v_dual_mov_b32 v117, s56
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 25
+; GFX11-NEXT: v_dual_mov_b32 v118, s60 :: v_dual_mov_b32 v113, s43
+; GFX11-NEXT: v_dual_mov_b32 v115, s62 :: v_dual_mov_b32 v102, s57
; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
-; GFX11-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
-; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
+; GFX11-NEXT: v_readlane_b32 s0, v77, 26
+; GFX11-NEXT: v_dual_mov_b32 v103, s47 :: v_dual_mov_b32 v112, s45
+; GFX11-NEXT: v_dual_mov_b32 v98, s61 :: v_dual_mov_b32 v101, s59
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
-; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
-; GFX11-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
+; GFX11-NEXT: v_mov_b32_e32 v68, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 27
+; GFX11-NEXT: v_dual_mov_b32 v96, s73 :: v_dual_mov_b32 v99, s63
+; GFX11-NEXT: v_dual_mov_b32 v100, s30 :: v_dual_mov_b32 v87, s34
+; GFX11-NEXT: v_mov_b32_e32 v41, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 28
+; GFX11-NEXT: v_dual_mov_b32 v97, s31 :: v_dual_mov_b32 v86, s35
+; GFX11-NEXT: v_dual_mov_b32 v83, s37 :: v_dual_mov_b32 v82, s39
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
-; GFX11-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
+; GFX11-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 29
+; GFX11-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v84, s38
+; GFX11-NEXT: v_dual_mov_b32 v55, s49 :: v_dual_mov_b32 v80, s48
; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
-; GFX11-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
+; GFX11-NEXT: v_readlane_b32 s0, v77, 30
+; GFX11-NEXT: v_dual_mov_b32 v81, s50 :: v_dual_mov_b32 v32, s52
+; GFX11-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s55
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
-; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
+; GFX11-NEXT: v_dual_mov_b32 v44, s0 :: v_dual_mov_b32 v167, s64
+; GFX11-NEXT: v_readlane_b32 s0, v77, 31
+; GFX11-NEXT: v_dual_mov_b32 v39, s54 :: v_dual_mov_b32 v50, s53
+; GFX11-NEXT: v_dual_mov_b32 v176, s66 :: v_dual_mov_b32 v165, s67
; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
-; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
-; GFX11-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
+; GFX11-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-NEXT: v_dual_mov_b32 v164, s68 :: v_dual_mov_b32 v163, s70
+; GFX11-NEXT: v_dual_mov_b32 v166, s69 :: v_dual_mov_b32 v161, s81
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-NEXT: v_dual_mov_b32 v160, s71 :: v_dual_mov_b32 v149, s84
+; GFX11-NEXT: v_dual_mov_b32 v177, s65 :: v_dual_mov_b32 v150, s82
+; GFX11-NEXT: v_mov_b32_e32 v151, s83
+; GFX11-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-NEXT: v_dual_mov_b32 v162, s80 :: v_dual_mov_b32 v147, s85
+; GFX11-NEXT: v_dual_mov_b32 v146, s86 :: v_dual_mov_b32 v51, s72
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v49, s92
-; GFX11-NEXT: v_mov_b32_e32 v67, vcc_lo
+; GFX11-NEXT: v_mov_b32_e32 v178, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v38, s88
+; GFX11-NEXT: v_dual_mov_b32 v48, s90 :: v_dual_mov_b32 v49, s92
; GFX11-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-NEXT: v_dual_mov_b32 v66, s94 :: v_dual_mov_b32 v67, vcc_lo
+; GFX11-NEXT: v_mov_b32_e32 v25, s74
+; GFX11-NEXT: v_mov_b32_e32 v31, s76
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s0, v76, 5
; GFX11-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v165, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v166, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v151, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 12
+; GFX11-NEXT: v_readlane_b32 s1, v77, 13
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v52, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 10
+; GFX11-NEXT: v_readlane_b32 s1, v77, 11
+; GFX11-NEXT: v_dual_mov_b32 v148, s87 :: v_dual_mov_b32 v53, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 8
+; GFX11-NEXT: v_readlane_b32 s1, v77, 9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v54, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 7
+; GFX11-NEXT: v_mov_b32_e32 v64, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-NEXT: v_readlane_b32 s1, v77, 5
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v65, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-NEXT: v_readlane_b32 s1, v77, 3
+; GFX11-NEXT: v_mov_b32_e32 v69, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v70, s0
; GFX11-NEXT: .LBB95_6: ; %end
-; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_perm_b32 v70, v59, v70, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v69, v63, v69, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v35, v35, v57, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v65, v45, v65, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v64, v44, v64, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v46, v33, v46, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v34, v36, v70
-; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v36, v36, v58, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v57, v60, v61, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v58, v62, v72, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v33, v35, v70
+; GFX11-NEXT: v_perm_b32 v29, v29, v40, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_or_b32_e32 v33, v35, v68
-; GFX11-NEXT: v_or_b32_e32 v35, v56, v69
-; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v35, v46, v69
; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v30, v68, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v68, v43, v47, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57
+; GFX11-NEXT: v_perm_b32 v56, v34, v56, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
; GFX11-NEXT: v_or_b32_e32 v27, v29, v65
; GFX11-NEXT: v_or_b32_e32 v29, v70, v64
; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_or_b32_e32 v36, v57, v58
-; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-NEXT: v_or_b32_e32 v34, v36, v57
+; GFX11-NEXT: v_or_b32_e32 v36, v56, v58
+; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v28, v30, v68
-; GFX11-NEXT: v_or_b32_e32 v30, v182, v69
+; GFX11-NEXT: v_or_b32_e32 v28, v30, v69
+; GFX11-NEXT: v_or_b32_e32 v30, v182, v68
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off
; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
@@ -186169,13 +187480,13 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v151, v51, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30
; GFX11-NEXT: v_or_b32_e32 v30, v21, v23
; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
@@ -192662,6 +193973,7 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
@@ -192704,817 +194016,839 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: v_writelane_b32 v45, s99, 33
; SI-NEXT: v_writelane_b32 v45, s30, 34
; SI-NEXT: v_writelane_b32 v45, s31, 35
-; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
+; SI-NEXT: ; implicit-def: $vgpr56 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_writelane_b32 v47, s29, 0
-; SI-NEXT: v_writelane_b32 v47, s28, 1
-; SI-NEXT: v_writelane_b32 v47, s27, 2
-; SI-NEXT: v_writelane_b32 v47, s26, 3
-; SI-NEXT: v_writelane_b32 v47, s25, 4
-; SI-NEXT: v_writelane_b32 v47, s24, 5
-; SI-NEXT: v_writelane_b32 v47, s23, 6
-; SI-NEXT: v_writelane_b32 v47, s22, 7
-; SI-NEXT: v_writelane_b32 v47, s21, 8
-; SI-NEXT: v_writelane_b32 v47, s20, 9
-; SI-NEXT: v_writelane_b32 v47, s19, 10
-; SI-NEXT: v_writelane_b32 v47, s18, 11
-; SI-NEXT: v_writelane_b32 v47, s17, 12
-; SI-NEXT: v_writelane_b32 v47, s16, 13
-; SI-NEXT: v_writelane_b32 v47, s4, 14
+; SI-NEXT: v_writelane_b32 v56, s29, 0
+; SI-NEXT: v_writelane_b32 v56, s28, 1
+; SI-NEXT: v_writelane_b32 v56, s27, 2
+; SI-NEXT: v_writelane_b32 v56, s26, 3
+; SI-NEXT: v_writelane_b32 v56, s25, 4
+; SI-NEXT: v_writelane_b32 v56, s23, 5
+; SI-NEXT: v_writelane_b32 v56, s22, 6
+; SI-NEXT: v_writelane_b32 v56, s21, 7
+; SI-NEXT: v_writelane_b32 v56, s19, 8
+; SI-NEXT: v_writelane_b32 v56, s18, 9
+; SI-NEXT: v_writelane_b32 v56, s17, 10
+; SI-NEXT: v_writelane_b32 v56, s16, 11
+; SI-NEXT: v_writelane_b32 v56, s4, 12
; SI-NEXT: v_readfirstlane_b32 s4, v29
-; SI-NEXT: v_writelane_b32 v47, s4, 15
+; SI-NEXT: v_writelane_b32 v56, s4, 13
; SI-NEXT: v_readfirstlane_b32 s4, v28
-; SI-NEXT: v_writelane_b32 v47, s4, 16
+; SI-NEXT: v_writelane_b32 v56, s4, 14
; SI-NEXT: v_readfirstlane_b32 s4, v27
-; SI-NEXT: v_writelane_b32 v47, s4, 17
+; SI-NEXT: v_writelane_b32 v56, s4, 15
; SI-NEXT: v_readfirstlane_b32 s4, v26
-; SI-NEXT: v_writelane_b32 v47, s4, 18
+; SI-NEXT: v_writelane_b32 v56, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
-; SI-NEXT: v_writelane_b32 v47, s4, 19
+; SI-NEXT: v_writelane_b32 v56, s4, 17
; SI-NEXT: v_readfirstlane_b32 s4, v24
-; SI-NEXT: v_writelane_b32 v47, s4, 20
+; SI-NEXT: v_writelane_b32 v56, s4, 18
; SI-NEXT: v_readfirstlane_b32 s4, v23
-; SI-NEXT: v_writelane_b32 v47, s4, 21
+; SI-NEXT: v_writelane_b32 v56, s4, 19
; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_writelane_b32 v47, s4, 22
+; SI-NEXT: v_writelane_b32 v56, s4, 20
; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:332
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324
-; SI-NEXT: v_readfirstlane_b32 s92, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:320
-; SI-NEXT: v_writelane_b32 v47, s4, 23
+; SI-NEXT: v_writelane_b32 v56, s4, 21
; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316
-; SI-NEXT: v_writelane_b32 v47, s4, 24
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:328
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320
+; SI-NEXT: v_writelane_b32 v56, s4, 22
+; SI-NEXT: v_readfirstlane_b32 s4, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316
+; SI-NEXT: v_writelane_b32 v56, s4, 23
+; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: v_writelane_b32 v56, s4, 24
; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_writelane_b32 v47, s4, 25
+; SI-NEXT: v_writelane_b32 v56, s4, 25
; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: v_writelane_b32 v47, s4, 26
+; SI-NEXT: v_writelane_b32 v56, s4, 26
; SI-NEXT: v_readfirstlane_b32 s4, v15
-; SI-NEXT: v_writelane_b32 v47, s4, 27
+; SI-NEXT: v_writelane_b32 v56, s4, 27
; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v47, s4, 28
-; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_writelane_b32 v47, s4, 29
+; SI-NEXT: v_writelane_b32 v56, s4, 28
+; SI-NEXT: v_readfirstlane_b32 s4, v11
+; SI-NEXT: v_writelane_b32 v56, s4, 29
; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: v_writelane_b32 v47, s4, 30
+; SI-NEXT: v_writelane_b32 v56, s4, 30
; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: v_writelane_b32 v47, s4, 31
+; SI-NEXT: v_writelane_b32 v56, s4, 31
; SI-NEXT: v_readfirstlane_b32 s4, v7
-; SI-NEXT: v_writelane_b32 v47, s4, 32
-; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: v_readfirstlane_b32 s7, v18
-; SI-NEXT: v_writelane_b32 v47, s4, 33
-; SI-NEXT: v_readfirstlane_b32 s10, v0
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
-; SI-NEXT: v_readfirstlane_b32 s6, v11
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264
-; SI-NEXT: v_readfirstlane_b32 s11, v5
+; SI-NEXT: v_writelane_b32 v56, s4, 32
+; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280
+; SI-NEXT: v_readfirstlane_b32 s98, v5
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276
-; SI-NEXT: v_readfirstlane_b32 s12, v4
+; SI-NEXT: v_readfirstlane_b32 s99, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272
-; SI-NEXT: v_readfirstlane_b32 s9, v3
+; SI-NEXT: v_writelane_b32 v56, s4, 33
+; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268
-; SI-NEXT: v_readfirstlane_b32 s14, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:308
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:308
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292
-; SI-NEXT: v_readfirstlane_b32 s13, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300
-; SI-NEXT: v_readfirstlane_b32 s8, v10
+; SI-NEXT: v_readfirstlane_b32 s96, v13
+; SI-NEXT: v_readfirstlane_b32 s97, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:300
+; SI-NEXT: v_readfirstlane_b32 s76, v10
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296
-; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v56, s4, 34
+; SI-NEXT: v_readfirstlane_b32 s77, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260
+; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
+; SI-NEXT: v_readfirstlane_b32 s81, v21
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224
; SI-NEXT: v_readfirstlane_b32 s4, v1
-; SI-NEXT: v_writelane_b32 v47, s4, 34
-; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:236
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:256
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:248
-; SI-NEXT: v_writelane_b32 v47, s4, 35
-; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_writelane_b32 v47, s4, 36
-; SI-NEXT: v_readfirstlane_b32 s4, v24
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248
+; SI-NEXT: v_writelane_b32 v56, s4, 35
+; SI-NEXT: v_readfirstlane_b32 s4, v0
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240
+; SI-NEXT: v_readfirstlane_b32 s82, v23
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216
-; SI-NEXT: v_readfirstlane_b32 s19, v20
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216
+; SI-NEXT: v_readfirstlane_b32 s80, v20
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:232
+; SI-NEXT: v_readfirstlane_b32 s83, v19
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:228
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:224
-; SI-NEXT: v_writelane_b32 v47, s4, 37
-; SI-NEXT: v_readfirstlane_b32 s84, v18
-; SI-NEXT: v_readfirstlane_b32 s95, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208
+; SI-NEXT: v_writelane_b32 v56, s4, 36
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s68, v8
+; SI-NEXT: v_readfirstlane_b32 s21, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152
-; SI-NEXT: v_readfirstlane_b32 s44, v6
-; SI-NEXT: v_readfirstlane_b32 s26, v11
+; SI-NEXT: v_readfirstlane_b32 s44, v11
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104
+; SI-NEXT: v_readfirstlane_b32 s46, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
+; SI-NEXT: v_readfirstlane_b32 s72, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140
; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136
-; SI-NEXT: v_readfirstlane_b32 s45, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
-; SI-NEXT: v_readfirstlane_b32 s74, v4
+; SI-NEXT: v_readfirstlane_b32 s73, v5
+; SI-NEXT: v_readfirstlane_b32 s40, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124
; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120
-; SI-NEXT: v_readfirstlane_b32 s93, v3
-; SI-NEXT: v_readfirstlane_b32 s28, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132
+; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128
+; SI-NEXT: v_readfirstlane_b32 s69, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112
-; SI-NEXT: v_readfirstlane_b32 s29, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144
-; SI-NEXT: v_readfirstlane_b32 s64, v15
+; SI-NEXT: v_readfirstlane_b32 s47, v15
+; SI-NEXT: v_readfirstlane_b32 s55, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200
-; SI-NEXT: v_readfirstlane_b32 s22, v16
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: v_writelane_b32 v47, s4, 38
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:196
+; SI-NEXT: v_readfirstlane_b32 s57, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192
-; SI-NEXT: v_readfirstlane_b32 s24, v9
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:164
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160
-; SI-NEXT: v_readfirstlane_b32 s75, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
-; SI-NEXT: v_readfirstlane_b32 s99, v12
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
+; SI-NEXT: v_readfirstlane_b32 s16, v12
+; SI-NEXT: v_readfirstlane_b32 s54, v10
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_readfirstlane_b32 s45, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96
+; SI-NEXT: v_readfirstlane_b32 s18, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176
+; SI-NEXT: v_readfirstlane_b32 s60, v24
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
+; SI-NEXT: v_readfirstlane_b32 s84, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
+; SI-NEXT: v_readfirstlane_b32 s90, v18
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68
; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64
-; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_readfirstlane_b32 s66, v21
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:52
+; SI-NEXT: v_readfirstlane_b32 s23, v25
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
+; SI-NEXT: v_readfirstlane_b32 s65, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
+; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56
+; SI-NEXT: v_readfirstlane_b32 s37, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52
; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48
-; SI-NEXT: v_readfirstlane_b32 s81, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44
+; SI-NEXT: v_readfirstlane_b32 s56, v20
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:44
; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92
+; SI-NEXT: v_readfirstlane_b32 s17, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88
-; SI-NEXT: v_readfirstlane_b32 s31, v1
+; SI-NEXT: v_readfirstlane_b32 s62, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84
; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80
-; SI-NEXT: v_readfirstlane_b32 s57, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72
-; SI-NEXT: v_readfirstlane_b32 s83, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8
-; SI-NEXT: v_readfirstlane_b32 s86, v29
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
+; SI-NEXT: v_readfirstlane_b32 s94, v29
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32
-; SI-NEXT: v_readfirstlane_b32 s80, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:36
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32
-; SI-NEXT: v_readfirstlane_b32 s65, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:28
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24
-; SI-NEXT: v_readfirstlane_b32 s46, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16
-; SI-NEXT: v_writelane_b32 v47, s4, 39
-; SI-NEXT: v_readfirstlane_b32 s67, v20
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v0
-; SI-NEXT: v_writelane_b32 v46, vcc_hi, 0
-; SI-NEXT: v_readfirstlane_b32 s34, v53
-; SI-NEXT: v_readfirstlane_b32 s55, v8
-; SI-NEXT: v_readfirstlane_b32 s90, v33
-; SI-NEXT: v_readfirstlane_b32 s27, v11
-; SI-NEXT: v_readfirstlane_b32 s36, v39
+; SI-NEXT: v_readfirstlane_b32 s88, v8
+; SI-NEXT: v_readfirstlane_b32 s13, v11
+; SI-NEXT: v_readfirstlane_b32 s66, v33
+; SI-NEXT: v_readfirstlane_b32 s78, v7
+; SI-NEXT: v_readfirstlane_b32 s14, v34
+; SI-NEXT: v_readfirstlane_b32 s15, v6
+; SI-NEXT: v_readfirstlane_b32 s93, v39
+; SI-NEXT: v_readfirstlane_b32 s39, v35
+; SI-NEXT: v_readfirstlane_b32 s49, v4
+; SI-NEXT: v_readfirstlane_b32 s51, v37
+; SI-NEXT: v_writelane_b32 v47, s51, 0
+; SI-NEXT: v_writelane_b32 v47, s54, 1
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_readfirstlane_b32 s50, v35
-; SI-NEXT: v_readfirstlane_b32 s49, v5
-; SI-NEXT: v_readfirstlane_b32 s51, v36
-; SI-NEXT: v_readfirstlane_b32 s52, v4
-; SI-NEXT: v_readfirstlane_b32 s54, v37
-; SI-NEXT: v_readfirstlane_b32 s73, v6
-; SI-NEXT: v_readfirstlane_b32 s35, v2
-; SI-NEXT: v_readfirstlane_b32 s37, v48
-; SI-NEXT: v_readfirstlane_b32 s53, v3
-; SI-NEXT: v_readfirstlane_b32 s69, v7
-; SI-NEXT: v_readfirstlane_b32 s72, v34
-; SI-NEXT: v_readfirstlane_b32 s21, v15
-; SI-NEXT: v_readfirstlane_b32 s87, v26
-; SI-NEXT: v_readfirstlane_b32 s70, v38
-; SI-NEXT: v_readfirstlane_b32 s71, v16
-; SI-NEXT: v_readfirstlane_b32 s82, v27
-; SI-NEXT: v_readfirstlane_b32 s4, v32
-; SI-NEXT: v_writelane_b32 v47, s4, 40
-; SI-NEXT: v_writelane_b32 v47, s13, 41
-; SI-NEXT: v_readfirstlane_b32 s79, v13
-; SI-NEXT: v_writelane_b32 v47, s11, 42
-; SI-NEXT: v_writelane_b32 v47, s12, 43
-; SI-NEXT: v_writelane_b32 v47, s6, 44
-; SI-NEXT: v_writelane_b32 v47, s7, 45
-; SI-NEXT: v_writelane_b32 v47, s8, 46
-; SI-NEXT: v_writelane_b32 v47, s9, 47
-; SI-NEXT: v_readfirstlane_b32 s47, v12
-; SI-NEXT: v_writelane_b32 v47, s10, 48
-; SI-NEXT: v_readfirstlane_b32 s56, v28
-; SI-NEXT: v_writelane_b32 v47, s14, 49
-; SI-NEXT: v_readfirstlane_b32 s89, v30
-; SI-NEXT: v_readfirstlane_b32 s91, v10
-; SI-NEXT: v_readfirstlane_b32 s77, v18
-; SI-NEXT: v_readfirstlane_b32 s25, v31
-; SI-NEXT: v_readfirstlane_b32 s98, v9
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v52
-; SI-NEXT: v_readfirstlane_b32 s30, v21
-; SI-NEXT: v_writelane_b32 v46, s30, 1
-; SI-NEXT: v_writelane_b32 v46, s34, 2
-; SI-NEXT: v_writelane_b32 v46, s35, 3
-; SI-NEXT: v_readfirstlane_b32 s60, v54
-; SI-NEXT: v_writelane_b32 v46, s36, 4
-; SI-NEXT: v_readfirstlane_b32 s61, v19
-; SI-NEXT: v_writelane_b32 v46, s60, 5
-; SI-NEXT: v_writelane_b32 v46, s61, 6
-; SI-NEXT: v_readfirstlane_b32 s38, v17
-; SI-NEXT: v_writelane_b32 v46, s37, 7
+; SI-NEXT: v_readfirstlane_b32 s12, v38
+; SI-NEXT: v_writelane_b32 v47, s83, 2
+; SI-NEXT: v_readfirstlane_b32 s52, v9
+; SI-NEXT: v_writelane_b32 v47, s12, 3
+; SI-NEXT: v_writelane_b32 v47, s52, 4
+; SI-NEXT: v_readfirstlane_b32 s67, v32
+; SI-NEXT: v_readfirstlane_b32 s58, v14
+; SI-NEXT: v_readfirstlane_b32 s59, v26
+; SI-NEXT: v_readfirstlane_b32 s61, v27
+; SI-NEXT: v_readfirstlane_b32 s53, v31
+; SI-NEXT: v_writelane_b32 v47, s53, 5
+; SI-NEXT: v_writelane_b32 v47, s55, 6
+; SI-NEXT: v_writelane_b32 v47, s13, 7
+; SI-NEXT: v_writelane_b32 v47, s67, 8
+; SI-NEXT: v_writelane_b32 v47, s88, 9
+; SI-NEXT: v_writelane_b32 v47, s44, 10
+; SI-NEXT: v_writelane_b32 v47, s45, 11
+; SI-NEXT: v_writelane_b32 v47, s46, 12
+; SI-NEXT: v_writelane_b32 v47, s78, 13
+; SI-NEXT: v_writelane_b32 v47, s66, 14
+; SI-NEXT: v_writelane_b32 v47, s47, 15
+; SI-NEXT: v_writelane_b32 v47, s56, 16
+; SI-NEXT: v_writelane_b32 v47, s57, 17
+; SI-NEXT: v_writelane_b32 v47, s14, 18
+; SI-NEXT: v_writelane_b32 v47, s58, 19
+; SI-NEXT: v_writelane_b32 v47, s59, 20
+; SI-NEXT: v_writelane_b32 v47, s17, 21
+; SI-NEXT: v_writelane_b32 v47, s60, 22
+; SI-NEXT: v_writelane_b32 v47, s15, 23
+; SI-NEXT: v_writelane_b32 v47, s61, 24
+; SI-NEXT: v_readfirstlane_b32 s63, v12
+; SI-NEXT: v_writelane_b32 v47, s62, 25
+; SI-NEXT: v_writelane_b32 v47, s63, 26
+; SI-NEXT: v_writelane_b32 v47, s16, 27
+; SI-NEXT: v_readfirstlane_b32 s92, v2
+; SI-NEXT: v_writelane_b32 v47, vcc_lo, 28
+; SI-NEXT: v_writelane_b32 v47, s72, 29
+; SI-NEXT: v_writelane_b32 v47, s73, 30
+; SI-NEXT: v_writelane_b32 v47, s23, 31
+; SI-NEXT: v_readfirstlane_b32 s74, v13
+; SI-NEXT: v_readfirstlane_b32 s95, v48
+; SI-NEXT: v_writelane_b32 v47, s18, 32
+; SI-NEXT: v_readfirstlane_b32 s64, v28
+; SI-NEXT: v_writelane_b32 v47, s74, 33
+; SI-NEXT: v_writelane_b32 v47, s64, 34
+; SI-NEXT: v_readfirstlane_b32 s41, v30
+; SI-NEXT: v_readfirstlane_b32 s19, v41
+; SI-NEXT: v_writelane_b32 v56, s19, 37
+; SI-NEXT: v_readfirstlane_b32 s43, v51
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_writelane_b32 v56, s42, 38
+; SI-NEXT: v_writelane_b32 v56, s43, 39
+; SI-NEXT: v_readfirstlane_b32 s6, v42
+; SI-NEXT: v_readfirstlane_b32 s7, v23
+; SI-NEXT: v_writelane_b32 v56, s6, 40
+; SI-NEXT: v_readfirstlane_b32 s75, v52
+; SI-NEXT: v_writelane_b32 v56, s7, 41
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s39, v1
-; SI-NEXT: v_writelane_b32 v46, s38, 8
-; SI-NEXT: v_readfirstlane_b32 s48, v49
-; SI-NEXT: v_writelane_b32 v46, s39, 9
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s62, v50
-; SI-NEXT: v_writelane_b32 v46, s48, 10
-; SI-NEXT: v_writelane_b32 v46, s62, 11
-; SI-NEXT: v_writelane_b32 v46, s49, 12
+; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_writelane_b32 v56, s75, 42
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s63, v14
-; SI-NEXT: v_writelane_b32 v46, s50, 13
-; SI-NEXT: v_writelane_b32 v46, s63, 14
-; SI-NEXT: v_writelane_b32 v46, s51, 15
-; SI-NEXT: v_writelane_b32 v46, s52, 16
-; SI-NEXT: v_writelane_b32 v46, s53, 17
-; SI-NEXT: v_writelane_b32 v46, s54, 18
-; SI-NEXT: v_writelane_b32 v46, s55, 19
-; SI-NEXT: v_writelane_b32 v46, s64, 20
-; SI-NEXT: v_writelane_b32 v46, s81, 21
-; SI-NEXT: v_writelane_b32 v46, s72, 22
-; SI-NEXT: v_writelane_b32 v46, s71, 23
-; SI-NEXT: v_writelane_b32 v46, s87, 24
-; SI-NEXT: v_writelane_b32 v46, s80, 25
-; SI-NEXT: v_writelane_b32 v46, s73, 26
-; SI-NEXT: v_writelane_b32 v46, s82, 27
-; SI-NEXT: v_writelane_b32 v46, s79, 28
-; SI-NEXT: v_writelane_b32 v46, s75, 29
-; SI-NEXT: v_writelane_b32 v46, s65, 30
-; SI-NEXT: v_writelane_b32 v46, s44, 31
-; SI-NEXT: v_writelane_b32 v46, s45, 32
-; SI-NEXT: v_writelane_b32 v46, s46, 33
+; SI-NEXT: v_readfirstlane_b32 s89, v22
+; SI-NEXT: v_writelane_b32 v56, s79, 43
+; SI-NEXT: v_readfirstlane_b32 s91, v53
+; SI-NEXT: v_writelane_b32 v56, s89, 44
+; SI-NEXT: v_writelane_b32 v56, s91, 45
+; SI-NEXT: v_writelane_b32 v56, s92, 46
+; SI-NEXT: s_waitcnt vmcnt(10)
+; SI-NEXT: v_readfirstlane_b32 s8, v54
+; SI-NEXT: v_writelane_b32 v56, s93, 47
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_readfirstlane_b32 s9, v20
+; SI-NEXT: v_writelane_b32 v56, s8, 48
+; SI-NEXT: v_writelane_b32 v56, s9, 49
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s16, v29
-; SI-NEXT: v_writelane_b32 v46, s47, 34
-; SI-NEXT: v_readfirstlane_b32 s17, v43
-; SI-NEXT: v_writelane_b32 v47, s16, 50
-; SI-NEXT: v_writelane_b32 v46, s56, 35
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_readfirstlane_b32 s15, v44
-; SI-NEXT: v_writelane_b32 v47, s17, 51
-; SI-NEXT: v_writelane_b32 v46, s74, 36
+; SI-NEXT: v_readfirstlane_b32 s31, v16
+; SI-NEXT: v_writelane_b32 v56, s95, 50
+; SI-NEXT: v_writelane_b32 v56, s31, 51
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s18, v23
-; SI-NEXT: v_writelane_b32 v47, s15, 52
-; SI-NEXT: v_writelane_b32 v46, s89, 37
-; SI-NEXT: v_readfirstlane_b32 s23, v55
-; SI-NEXT: v_writelane_b32 v47, s18, 53
-; SI-NEXT: v_writelane_b32 v46, s57, 38
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_writelane_b32 v56, s80, 52
+; SI-NEXT: v_writelane_b32 v47, s40, 35
+; SI-NEXT: v_readfirstlane_b32 s36, v49
+; SI-NEXT: v_writelane_b32 v56, s34, 53
+; SI-NEXT: v_writelane_b32 v47, s41, 36
+; SI-NEXT: v_readfirstlane_b32 s68, v10
+; SI-NEXT: v_writelane_b32 v56, s36, 54
+; SI-NEXT: v_writelane_b32 v47, s84, 37
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s40, v40
-; SI-NEXT: v_writelane_b32 v47, s23, 54
-; SI-NEXT: v_writelane_b32 v46, s91, 39
+; SI-NEXT: v_readfirstlane_b32 s10, v50
+; SI-NEXT: v_writelane_b32 v56, s81, 55
+; SI-NEXT: v_writelane_b32 v47, s68, 38
+; SI-NEXT: v_readfirstlane_b32 s38, v5
+; SI-NEXT: v_writelane_b32 v56, s10, 56
+; SI-NEXT: v_writelane_b32 v47, s65, 39
+; SI-NEXT: v_writelane_b32 v56, s38, 57
+; SI-NEXT: v_writelane_b32 v47, s90, 40
+; SI-NEXT: v_readfirstlane_b32 s11, v17
+; SI-NEXT: v_writelane_b32 v56, s39, 58
+; SI-NEXT: v_writelane_b32 v47, s69, 41
+; SI-NEXT: v_readfirstlane_b32 s48, v36
+; SI-NEXT: v_writelane_b32 v56, s11, 59
+; SI-NEXT: v_writelane_b32 v47, s94, 42
+; SI-NEXT: v_writelane_b32 v56, s48, 60
+; SI-NEXT: v_writelane_b32 v47, s70, 43
+; SI-NEXT: v_readfirstlane_b32 s35, v19
+; SI-NEXT: v_writelane_b32 v56, s49, 61
+; SI-NEXT: v_writelane_b32 v47, s37, 44
+; SI-NEXT: v_readfirstlane_b32 s71, v15
+; SI-NEXT: v_readfirstlane_b32 s50, v3
+; SI-NEXT: v_readfirstlane_b32 s22, v55
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s41, v22
-; SI-NEXT: v_writelane_b32 v47, s40, 55
-; SI-NEXT: v_writelane_b32 v46, s83, 40
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s42, v25
-; SI-NEXT: v_writelane_b32 v47, s41, 56
-; SI-NEXT: v_writelane_b32 v46, s84, 41
-; SI-NEXT: v_readfirstlane_b32 s43, v41
-; SI-NEXT: v_writelane_b32 v47, s42, 57
-; SI-NEXT: v_writelane_b32 v46, s93, 42
-; SI-NEXT: v_writelane_b32 v47, s43, 58
-; SI-NEXT: v_writelane_b32 v46, s86, 43
-; SI-NEXT: v_readfirstlane_b32 s78, v51
-; SI-NEXT: v_writelane_b32 v47, s77, 59
-; SI-NEXT: v_writelane_b32 v46, s95, 44
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s58, v42
-; SI-NEXT: v_writelane_b32 v47, s78, 60
-; SI-NEXT: v_writelane_b32 v46, s66, 45
-; SI-NEXT: v_readfirstlane_b32 s59, v24
-; SI-NEXT: v_writelane_b32 v47, s58, 61
-; SI-NEXT: v_writelane_b32 v46, s67, 46
-; SI-NEXT: v_writelane_b32 v47, s59, 62
-; SI-NEXT: v_writelane_b32 v46, s21, 47
-; SI-NEXT: v_writelane_b32 v47, vcc_lo, 63
-; SI-NEXT: v_writelane_b32 v46, s31, 48
+; SI-NEXT: v_readfirstlane_b32 s85, v24
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_readfirstlane_b32 s25, v40
+; SI-NEXT: v_readfirstlane_b32 s28, v21
+; SI-NEXT: v_readfirstlane_b32 s87, v25
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v43
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s26, v29
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s27, v44
+; SI-NEXT: v_writelane_b32 v56, s82, 62
+; SI-NEXT: v_writelane_b32 v47, s35, 45
+; SI-NEXT: v_writelane_b32 v56, s50, 63
+; SI-NEXT: v_writelane_b32 v47, s71, 46
; SI-NEXT: s_cbranch_scc0 .LBB97_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readlane_b32 s4, v47, 13
-; SI-NEXT: v_readlane_b32 s5, v47, 12
+; SI-NEXT: v_readlane_b32 s4, v56, 11
+; SI-NEXT: v_readlane_b32 s5, v56, 10
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s20, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 5
-; SI-NEXT: v_readlane_b32 s5, v47, 4
-; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: v_writelane_b32 v47, s21, 47
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 4
+; SI-NEXT: v_writelane_b32 v47, s4, 48
+; SI-NEXT: s_and_b32 s4, s24, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_or_b32 s88, s4, s5
-; SI-NEXT: s_and_b32 s4, s14, 0xff
-; SI-NEXT: s_lshl_b32 s5, s9, 8
-; SI-NEXT: s_or_b32 s94, s4, s5
-; SI-NEXT: s_and_b32 s4, s8, 0xff
-; SI-NEXT: s_lshl_b32 s5, s6, 8
-; SI-NEXT: s_or_b32 s85, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s5, s92, 8
-; SI-NEXT: s_or_b32 s96, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 18
-; SI-NEXT: v_readlane_b32 s5, v47, 17
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 34
+; SI-NEXT: v_writelane_b32 v47, s4, 49
+; SI-NEXT: s_and_b32 s4, s77, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 29
+; SI-NEXT: v_writelane_b32 v47, s4, 50
+; SI-NEXT: s_and_b32 s4, s76, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 51
+; SI-NEXT: v_readlane_b32 s4, v56, 24
+; SI-NEXT: s_and_b32 s5, s4, 0xff
+; SI-NEXT: v_readlane_b32 s4, v56, 23
+; SI-NEXT: s_lshl_b32 s4, s4, 8
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: v_writelane_b32 v47, s4, 52
+; SI-NEXT: v_readlane_b32 s4, v56, 16
+; SI-NEXT: v_readlane_b32 s5, v56, 15
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: v_writelane_b32 v46, s22, 49
-; SI-NEXT: s_or_b32 s22, s4, s5
-; SI-NEXT: s_and_b32 s4, s59, 0xff
-; SI-NEXT: s_lshl_b32 s5, s58, 8
-; SI-NEXT: s_or_b32 s58, s4, s5
-; SI-NEXT: s_and_b32 s4, s61, 0xff
-; SI-NEXT: s_lshl_b32 s5, s60, 8
-; SI-NEXT: s_or_b32 s59, s4, s5
-; SI-NEXT: s_and_b32 s4, s63, 0xff
-; SI-NEXT: s_lshl_b32 s5, s62, 8
-; SI-NEXT: s_or_b32 s60, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xff
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 53
+; SI-NEXT: s_and_b32 s4, s7, 0xff
+; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 54
+; SI-NEXT: s_and_b32 s4, s9, 0xff
+; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 55
+; SI-NEXT: s_and_b32 s4, s11, 0xff
+; SI-NEXT: s_lshl_b32 s5, s10, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 56
+; SI-NEXT: s_and_b32 s4, s13, 0xff
+; SI-NEXT: s_lshl_b32 s5, s12, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 57
+; SI-NEXT: s_and_b32 s4, s15, 0xff
+; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 58
+; SI-NEXT: s_and_b32 s4, s68, 0xff
+; SI-NEXT: s_lshl_b32 s5, s41, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_writelane_b32 v47, s4, 59
+; SI-NEXT: s_and_b32 s4, s71, 0xff
+; SI-NEXT: s_lshl_b32 s5, s35, 8
+; SI-NEXT: s_or_b32 s71, s4, s5
+; SI-NEXT: s_and_b32 s4, s37, 0xff
; SI-NEXT: s_lshl_b32 s5, s70, 8
-; SI-NEXT: s_or_b32 s61, s4, s5
-; SI-NEXT: s_and_b32 s4, s73, 0xff
-; SI-NEXT: s_lshl_b32 s5, s72, 8
-; SI-NEXT: s_or_b32 s62, s4, s5
-; SI-NEXT: s_and_b32 s4, s91, 0xff
-; SI-NEXT: s_lshl_b32 s5, s89, 8
-; SI-NEXT: s_or_b32 s63, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xff
-; SI-NEXT: s_lshl_b32 s5, s67, 8
-; SI-NEXT: s_or_b32 s72, s4, s5
-; SI-NEXT: s_and_b32 s4, s66, 0xff
-; SI-NEXT: s_lshl_b32 s5, s95, 8
-; SI-NEXT: s_or_b32 s73, s4, s5
-; SI-NEXT: s_and_b32 s4, s93, 0xff
-; SI-NEXT: s_lshl_b32 s5, s74, 8
-; SI-NEXT: s_or_b32 s74, s4, s5
-; SI-NEXT: s_and_b32 s4, s99, 0xff
-; SI-NEXT: s_lshl_b32 s5, s75, 8
-; SI-NEXT: s_or_b32 s75, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 9
-; SI-NEXT: v_readlane_b32 s5, v47, 8
-; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_or_b32 s70, s4, s5
+; SI-NEXT: s_and_b32 s4, s69, 0xff
+; SI-NEXT: s_lshl_b32 s5, s40, 8
+; SI-NEXT: s_or_b32 s69, s4, s5
+; SI-NEXT: s_and_b32 s4, s18, 0xff
+; SI-NEXT: s_lshl_b32 s5, s16, 8
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v56, 7
+; SI-NEXT: v_writelane_b32 v47, s4, 60
+; SI-NEXT: s_and_b32 s4, s20, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s5, s4, s5
-; SI-NEXT: v_readlane_b32 s4, v47, 7
+; SI-NEXT: v_readlane_b32 s4, v56, 6
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 6
+; SI-NEXT: v_readlane_b32 s6, v56, 5
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_or_b32 s7, s6, s4
-; SI-NEXT: v_readlane_b32 s4, v47, 11
+; SI-NEXT: v_readlane_b32 s4, v56, 9
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s6, v47, 10
+; SI-NEXT: v_readlane_b32 s6, v56, 8
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: v_writelane_b32 v46, s7, 50
+; SI-NEXT: v_writelane_b32 v47, s7, 61
; SI-NEXT: s_or_b32 s4, s6, s4
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: v_readlane_b32 s6, v47, 1
-; SI-NEXT: v_readlane_b32 s7, v47, 0
+; SI-NEXT: v_readlane_b32 s6, v56, 1
+; SI-NEXT: v_readlane_b32 s7, v56, 0
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s7, s6, s7
-; SI-NEXT: s_and_b32 s6, s10, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 34
+; SI-NEXT: v_readlane_b32 s6, v56, 36
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s8, v56, 35
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_or_b32 s9, s8, s6
-; SI-NEXT: v_readlane_b32 s6, v47, 3
+; SI-NEXT: v_readlane_b32 s6, v56, 3
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v47, 2
+; SI-NEXT: v_readlane_b32 s8, v56, 2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: v_writelane_b32 v46, s9, 51
+; SI-NEXT: v_writelane_b32 v47, s9, 62
; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_readlane_b32 s8, v47, 33
-; SI-NEXT: v_readlane_b32 s9, v47, 32
+; SI-NEXT: v_readlane_b32 s8, v56, 33
+; SI-NEXT: v_readlane_b32 s9, v56, 32
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s9, s8, s9
-; SI-NEXT: v_readlane_b32 s8, v47, 31
+; SI-NEXT: v_readlane_b32 s8, v56, 31
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v47, 30
+; SI-NEXT: v_readlane_b32 s10, v56, 30
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s10, s10, 24
-; SI-NEXT: s_or_b32 s14, s10, s8
-; SI-NEXT: s_and_b32 s8, s12, 0xff
+; SI-NEXT: s_or_b32 s11, s10, s8
+; SI-NEXT: s_and_b32 s8, s99, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s10, s11, 24
+; SI-NEXT: s_lshl_b32 s10, s98, 24
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: v_writelane_b32 v47, s11, 63
; SI-NEXT: s_or_b32 s8, s10, s8
-; SI-NEXT: v_readlane_b32 s10, v47, 28
-; SI-NEXT: v_readlane_b32 s11, v47, 27
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: v_readlane_b32 s10, v56, 28
+; SI-NEXT: v_readlane_b32 s11, v56, 27
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_or_b32 s11, s10, s11
-; SI-NEXT: v_readlane_b32 s10, v47, 26
+; SI-NEXT: v_readlane_b32 s10, v56, 26
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v47, 25
+; SI-NEXT: v_readlane_b32 s12, v56, 25
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: s_or_b32 s91, s12, s10
-; SI-NEXT: s_and_b32 s10, s13, 0xff
-; SI-NEXT: v_readlane_b32 s12, v47, 29
+; SI-NEXT: s_or_b32 s13, s12, s10
+; SI-NEXT: s_and_b32 s10, s97, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_lshl_b32 s12, s96, 24
+; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane
; SI-NEXT: s_or_b32 s10, s12, s10
-; SI-NEXT: v_readlane_b32 s12, v47, 22
-; SI-NEXT: v_readlane_b32 s13, v47, 21
-; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 8
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_or_b32 s13, s12, s13
-; SI-NEXT: v_readlane_b32 s12, v47, 20
-; SI-NEXT: v_writelane_b32 v46, s14, 52
-; SI-NEXT: s_or_b32 s9, s9, s14
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: v_readlane_b32 s12, v56, 20
+; SI-NEXT: v_writelane_b32 v46, s13, 0
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s12, 0xff
+; SI-NEXT: v_readlane_b32 s12, v56, 19
+; SI-NEXT: s_lshl_b32 s12, s12, 8
+; SI-NEXT: s_or_b32 s13, s13, s12
+; SI-NEXT: v_readlane_b32 s12, v56, 18
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v47, 19
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: s_or_b32 s93, s14, s12
-; SI-NEXT: v_readlane_b32 s12, v47, 24
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v56, 17
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s86, s12, s14
+; SI-NEXT: v_readlane_b32 s12, v56, 22
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v47, 23
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: s_or_b32 s12, s14, s12
-; SI-NEXT: v_readlane_b32 s14, v47, 14
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v56, 21
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s12, s12, s14
+; SI-NEXT: v_readlane_b32 s14, v56, 12
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_lshl_b32 s15, s27, 8
; SI-NEXT: s_or_b32 s15, s14, s15
-; SI-NEXT: s_and_b32 s14, s16, 0xff
+; SI-NEXT: s_and_b32 s14, s26, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_mov_b32 s67, s29
-; SI-NEXT: s_mov_b32 s29, s28
-; SI-NEXT: s_mov_b32 s28, s26
-; SI-NEXT: s_mov_b32 s26, s68
-; SI-NEXT: s_mov_b32 s68, s24
-; SI-NEXT: s_mov_b32 s24, s25
-; SI-NEXT: s_lshl_b32 s25, s17, 24
-; SI-NEXT: s_or_b32 s17, s25, s14
-; SI-NEXT: v_readlane_b32 s14, v47, 16
-; SI-NEXT: v_writelane_b32 v46, s90, 53
+; SI-NEXT: s_lshl_b32 s16, vcc_hi, 24
+; SI-NEXT: s_or_b32 s29, s16, s14
+; SI-NEXT: v_readlane_b32 s14, v56, 14
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 15
-; SI-NEXT: v_writelane_b32 v46, s69, 54
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s25, s16, 24
-; SI-NEXT: s_or_b32 s14, s25, s14
-; SI-NEXT: s_and_b32 s25, s41, 0xff
-; SI-NEXT: v_writelane_b32 v46, s27, 55
-; SI-NEXT: s_lshl_b32 s27, s40, 8
-; SI-NEXT: s_or_b32 s25, s25, s27
-; SI-NEXT: s_and_b32 s27, s18, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s18, s23, 24
-; SI-NEXT: s_or_b32 s18, s18, s27
-; SI-NEXT: s_and_b32 s27, s42, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s40, s43, 24
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_or_b32 s40, s40, s27
-; SI-NEXT: s_or_b32 s41, s25, s18
-; SI-NEXT: s_and_b32 s25, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s27, vcc_lo, 8
-; SI-NEXT: s_or_b32 s27, s25, s27
-; SI-NEXT: s_and_b32 s25, s77, 0xff
+; SI-NEXT: s_lshl_b32 s16, s14, 16
+; SI-NEXT: v_readlane_b32 s14, v56, 13
+; SI-NEXT: s_lshl_b32 s14, s14, 24
+; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_and_b32 s16, s28, 0xff
+; SI-NEXT: s_lshl_b32 s18, s25, 8
+; SI-NEXT: s_or_b32 s18, s16, s18
+; SI-NEXT: s_and_b32 s16, s85, 0xff
+; SI-NEXT: v_writelane_b32 v46, s20, 1
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s20, s22, 24
+; SI-NEXT: v_writelane_b32 v46, vcc_hi, 2
+; SI-NEXT: v_writelane_b32 v46, s28, 3
+; SI-NEXT: s_or_b32 s28, s20, s16
+; SI-NEXT: s_and_b32 s20, s87, 0xff
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v46, s24, 4
+; SI-NEXT: s_lshl_b32 s24, s19, 24
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s40, s24, s20
+; SI-NEXT: s_or_b32 s41, s18, s28
+; SI-NEXT: s_and_b32 s18, s79, 0xff
+; SI-NEXT: s_lshl_b32 s20, s75, 8
+; SI-NEXT: s_or_b32 s20, s18, s20
+; SI-NEXT: s_and_b32 s18, s42, 0xff
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s24, s43, 24
+; SI-NEXT: s_or_b32 s19, s24, s18
+; SI-NEXT: s_and_b32 s24, s89, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: v_writelane_b32 v46, s25, 5
+; SI-NEXT: s_lshl_b32 s25, s91, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s42, s25, s24
+; SI-NEXT: s_or_b32 s43, s20, s19
+; SI-NEXT: s_and_b32 s20, s31, 0xff
+; SI-NEXT: s_lshl_b32 s24, s95, 8
+; SI-NEXT: s_or_b32 s20, s20, s24
+; SI-NEXT: s_and_b32 s24, s92, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_lshl_b32 s25, s93, 24
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_and_b32 s25, s34, 0xff
+; SI-NEXT: s_mov_b32 s21, s26
; SI-NEXT: s_lshl_b32 s25, s25, 16
-; SI-NEXT: s_lshl_b32 s42, s78, 24
-; SI-NEXT: s_or_b32 s66, s42, s25
-; SI-NEXT: s_and_b32 s42, s30, 0xff
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_lshl_b32 s43, s34, 24
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_or_b32 s42, s43, s42
-; SI-NEXT: s_or_b32 s43, s27, s66
-; SI-NEXT: s_and_b32 s27, s38, 0xff
-; SI-NEXT: s_lshl_b32 s76, s37, 8
-; SI-NEXT: s_or_b32 s76, s27, s76
-; SI-NEXT: s_and_b32 s27, s35, 0xff
-; SI-NEXT: s_lshl_b32 s27, s27, 16
-; SI-NEXT: s_lshl_b32 s77, s36, 24
-; SI-NEXT: s_or_b32 s90, s77, s27
-; SI-NEXT: s_and_b32 s77, s39, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s48, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s34, s78, s77
-; SI-NEXT: s_or_b32 s35, s76, s90
-; SI-NEXT: s_and_b32 s76, s52, 0xff
-; SI-NEXT: s_lshl_b32 s77, s51, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s49, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s50, 24
-; SI-NEXT: s_or_b32 s69, s78, s77
-; SI-NEXT: s_and_b32 s77, s53, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s54, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s36, s78, s77
-; SI-NEXT: s_or_b32 s37, s76, s69
-; SI-NEXT: s_and_b32 s76, s55, 0xff
-; SI-NEXT: s_lshl_b32 s77, s98, 8
-; SI-NEXT: v_readlane_b32 s16, v47, 40
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_writelane_b32 v46, s70, 56
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s24, 24
-; SI-NEXT: v_readlane_b32 s16, v46, 54
-; SI-NEXT: s_or_b32 s70, s78, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v46, 53
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s38, s78, s77
-; SI-NEXT: s_or_b32 s39, s76, s70
-; SI-NEXT: s_and_b32 s76, s79, 0xff
-; SI-NEXT: s_lshl_b32 s77, s82, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s71, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s87, 24
-; SI-NEXT: s_or_b32 s71, s78, s77
-; SI-NEXT: s_and_b32 s77, s47, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_lshl_b32 s26, s36, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s34, s26, s25
+; SI-NEXT: s_or_b32 s35, s20, s24
+; SI-NEXT: s_and_b32 s20, s49, 0xff
+; SI-NEXT: s_lshl_b32 s25, s48, 8
+; SI-NEXT: s_or_b32 s20, s20, s25
+; SI-NEXT: s_and_b32 s25, s38, 0xff
+; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_lshl_b32 s26, s39, 24
+; SI-NEXT: v_writelane_b32 v46, s27, 6
+; SI-NEXT: s_or_b32 s27, s26, s25
+; SI-NEXT: s_and_b32 s26, s50, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s16, s51, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s36, s16, s26
+; SI-NEXT: s_or_b32 s37, s20, s27
+; SI-NEXT: s_and_b32 s20, s88, 0xff
+; SI-NEXT: s_lshl_b32 s26, s67, 8
+; SI-NEXT: s_or_b32 s20, s20, s26
+; SI-NEXT: s_and_b32 s26, s52, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s16, s53, 24
+; SI-NEXT: s_or_b32 s18, s16, s26
+; SI-NEXT: s_and_b32 s26, s78, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s75, s66, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s38, s75, s26
+; SI-NEXT: s_or_b32 s39, s20, s18
+; SI-NEXT: s_and_b32 s20, s63, 0xff
+; SI-NEXT: s_lshl_b32 s26, s61, 8
+; SI-NEXT: s_or_b32 s20, s20, s26
+; SI-NEXT: s_and_b32 s26, s58, 0xff
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s75, s59, 24
+; SI-NEXT: s_or_b32 s26, s75, s26
+; SI-NEXT: s_and_b32 s75, s74, 0xff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s78, s64, 24
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s48, s78, s75
+; SI-NEXT: s_or_b32 s49, s20, s26
+; SI-NEXT: s_and_b32 s20, s23, 0xff
+; SI-NEXT: s_lshl_b32 s75, vcc_lo, 8
+; SI-NEXT: s_or_b32 s75, s20, s75
+; SI-NEXT: s_and_b32 s20, s60, 0xff
+; SI-NEXT: s_lshl_b32 s20, s20, 16
; SI-NEXT: s_lshl_b32 s78, s56, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s48, s78, s77
-; SI-NEXT: s_or_b32 s49, s76, s71
-; SI-NEXT: s_and_b32 s76, s46, 0xff
-; SI-NEXT: s_lshl_b32 s77, s65, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s80, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s81, 24
-; SI-NEXT: s_or_b32 vcc_hi, s78, s77
-; SI-NEXT: s_and_b32 s77, s86, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s83, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s16, v47, 39
-; SI-NEXT: s_or_b32 s50, s78, s77
-; SI-NEXT: s_or_b32 s51, s76, vcc_hi
-; SI-NEXT: s_and_b32 s76, s31, 0xff
-; SI-NEXT: s_lshl_b32 s77, s16, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s29, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s28, 24
-; SI-NEXT: s_or_b32 s31, s78, s77
-; SI-NEXT: s_and_b32 s77, s84, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s57, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: s_or_b32 s52, s78, s77
-; SI-NEXT: s_or_b32 s53, s76, s31
-; SI-NEXT: s_and_b32 s76, s67, 0xff
-; SI-NEXT: s_lshl_b32 s77, s26, 8
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s68, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 38
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: s_or_b32 s82, s78, s77
-; SI-NEXT: s_and_b32 s77, s45, 0xff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s44, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s16, v47, 37
-; SI-NEXT: s_or_b32 s54, s78, s77
-; SI-NEXT: s_or_b32 s55, s76, s82
-; SI-NEXT: s_and_b32 s76, s19, 0xff
-; SI-NEXT: s_lshl_b32 s77, s16, 8
-; SI-NEXT: v_readlane_b32 s16, v47, 36
+; SI-NEXT: s_or_b32 s20, s78, s20
+; SI-NEXT: s_and_b32 s78, s94, 0xff
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s79, s65, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: s_or_b32 s50, s79, s78
+; SI-NEXT: s_or_b32 s51, s75, s20
+; SI-NEXT: s_and_b32 s75, s62, 0xff
+; SI-NEXT: s_lshl_b32 s78, s17, 8
+; SI-NEXT: s_or_b32 s75, s75, s78
+; SI-NEXT: s_and_b32 s78, s45, 0xff
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s79, s44, 24
+; SI-NEXT: s_or_b32 s78, s79, s78
+; SI-NEXT: s_and_b32 s79, s90, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s88, s84, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 47
+; SI-NEXT: s_or_b32 s52, s88, s79
+; SI-NEXT: s_or_b32 s53, s75, s78
+; SI-NEXT: s_and_b32 s75, s46, 0xff
+; SI-NEXT: s_lshl_b32 s79, s16, 8
+; SI-NEXT: s_or_b32 s75, s75, s79
+; SI-NEXT: s_and_b32 s79, s55, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s88, s54, 24
+; SI-NEXT: s_or_b32 s88, s88, s79
+; SI-NEXT: s_and_b32 s79, s73, 0xff
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s89, s72, 24
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 48
+; SI-NEXT: s_or_b32 s54, s89, s79
+; SI-NEXT: s_or_b32 s55, s75, s88
+; SI-NEXT: s_and_b32 s75, s83, 0xff
+; SI-NEXT: s_lshl_b32 s79, s82, 8
+; SI-NEXT: s_and_b32 s44, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 49
+; SI-NEXT: s_or_b32 s75, s75, s79
+; SI-NEXT: s_and_b32 s79, s81, 0xff
+; SI-NEXT: s_and_b32 s45, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 50
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_lshl_b32 s89, s80, 24
+; SI-NEXT: s_and_b32 s46, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 51
+; SI-NEXT: s_or_b32 s90, s89, s79
+; SI-NEXT: s_lshl_b32 s89, s47, 24
+; SI-NEXT: s_and_b32 s47, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 52
+; SI-NEXT: s_and_b32 s79, s57, 0xff
+; SI-NEXT: s_and_b32 s56, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 53
+; SI-NEXT: s_lshl_b32 s79, s79, 16
+; SI-NEXT: s_and_b32 s57, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 54
+; SI-NEXT: s_or_b32 s64, s89, s79
+; SI-NEXT: s_and_b32 s79, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 55
+; SI-NEXT: s_and_b32 s89, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 56
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 57
+; SI-NEXT: s_and_b32 s91, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 58
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_and_b32 s92, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v47, 59
+; SI-NEXT: s_or_b32 s13, s13, s86
+; SI-NEXT: s_and_b32 s93, s16, 0xffff
+; SI-NEXT: s_mov_b32 s16, s85
+; SI-NEXT: s_lshr_b64 s[84:85], s[40:41], 16
+; SI-NEXT: s_and_b32 s94, s71, 0xffff
+; SI-NEXT: s_and_b32 s95, s70, 0xffff
+; SI-NEXT: s_or_b32 s58, s56, s12
+; SI-NEXT: s_mov_b32 s59, s13
+; SI-NEXT: s_lshr_b64 s[70:71], s[12:13], 16
+; SI-NEXT: s_or_b32 s12, s93, s48
+; SI-NEXT: s_mov_b32 s13, s49
+; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
+; SI-NEXT: s_mov_b32 s85, s16
+; SI-NEXT: v_readlane_b32 s16, v47, 61
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_or_b32 s76, s76, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: v_readlane_b32 s16, v47, 35
-; SI-NEXT: s_or_b32 s15, s15, s17
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s16, 24
-; SI-NEXT: v_readlane_b32 s16, v46, 49
-; SI-NEXT: s_and_b32 s44, s20, 0xffff
-; SI-NEXT: s_mov_b32 s25, s99
-; SI-NEXT: s_or_b32 s87, s78, s77
-; SI-NEXT: s_and_b32 s77, s16, 0xff
-; SI-NEXT: s_and_b32 s57, s22, 0xffff
-; SI-NEXT: s_and_b32 s22, s74, 0xffff
-; SI-NEXT: s_and_b32 s99, s75, 0xffff
+; SI-NEXT: s_mov_b32 s25, s22
+; SI-NEXT: s_and_b32 s75, s75, 0xffff
+; SI-NEXT: v_readlane_b32 s22, v47, 60
+; SI-NEXT: s_or_b32 s60, s47, s10
+; SI-NEXT: s_mov_b32 s61, s11
+; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16
+; SI-NEXT: s_or_b32 s10, s94, s50
+; SI-NEXT: s_mov_b32 s11, s51
+; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
+; SI-NEXT: s_lshr_b32 s49, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v47, 62
+; SI-NEXT: s_or_b32 s15, s15, s29
+; SI-NEXT: s_mov_b32 s23, s21
+; SI-NEXT: s_or_b32 s65, s75, s90
+; SI-NEXT: s_and_b32 s21, s69, 0xffff
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s62, s46, s8
+; SI-NEXT: s_mov_b32 s63, s9
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
+; SI-NEXT: s_or_b32 s8, s95, s52
+; SI-NEXT: s_mov_b32 s9, s53
+; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
+; SI-NEXT: s_lshr_b32 s51, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v47, 63
; SI-NEXT: s_or_b32 s74, s44, s4
; SI-NEXT: s_mov_b32 s75, s5
-; SI-NEXT: s_lshr_b64 s[20:21], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 16
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s77, s77, 16
-; SI-NEXT: s_lshl_b32 s78, s64, 24
-; SI-NEXT: s_and_b32 s76, s76, 0xffff
-; SI-NEXT: v_readlane_b32 s5, v46, 50
-; SI-NEXT: s_or_b32 s11, s11, s91
-; SI-NEXT: s_or_b32 s13, s13, s93
-; SI-NEXT: s_mov_b32 s27, s98
-; SI-NEXT: s_or_b32 s64, s78, s77
-; SI-NEXT: s_or_b32 s65, s76, s87
-; SI-NEXT: s_and_b32 s45, s88, 0xffff
-; SI-NEXT: s_and_b32 s46, s94, 0xffff
-; SI-NEXT: s_and_b32 s47, s85, 0xffff
-; SI-NEXT: s_and_b32 s56, s96, 0xffff
-; SI-NEXT: s_and_b32 vcc_lo, s58, 0xffff
-; SI-NEXT: s_and_b32 s30, s59, 0xffff
-; SI-NEXT: s_and_b32 s96, s60, 0xffff
-; SI-NEXT: s_and_b32 s83, s61, 0xffff
-; SI-NEXT: s_and_b32 s16, s62, 0xffff
-; SI-NEXT: s_and_b32 s86, s63, 0xffff
-; SI-NEXT: s_and_b32 s97, s72, 0xffff
-; SI-NEXT: s_and_b32 s98, s73, 0xffff
-; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
-; SI-NEXT: s_lshr_b32 s23, s5, 16
-; SI-NEXT: v_readlane_b32 s5, v46, 51
+; SI-NEXT: s_lshr_b64 s[82:83], s[4:5], 16
; SI-NEXT: s_or_b32 s72, s45, s6
; SI-NEXT: s_mov_b32 s73, s7
-; SI-NEXT: s_or_b32 s62, s46, s8
-; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
-; SI-NEXT: s_or_b32 s60, s47, s10
-; SI-NEXT: s_mov_b32 s61, s11
-; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16
-; SI-NEXT: s_or_b32 s58, s56, s12
-; SI-NEXT: s_mov_b32 s59, s13
-; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16
; SI-NEXT: s_or_b32 s56, s57, s14
; SI-NEXT: s_mov_b32 s57, s15
-; SI-NEXT: s_or_b32 s46, vcc_lo, s40
-; SI-NEXT: s_mov_b32 s47, s41
-; SI-NEXT: s_lshr_b64 s[6:7], s[40:41], 16
-; SI-NEXT: s_or_b32 s44, s30, s42
+; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 16
+; SI-NEXT: s_or_b32 s44, s89, s42
; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_lshr_b64 s[88:89], s[42:43], 16
-; SI-NEXT: s_or_b32 s42, s96, s34
+; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 16
+; SI-NEXT: s_or_b32 s42, s17, s34
; SI-NEXT: s_mov_b32 s43, s35
-; SI-NEXT: s_lshr_b64 s[84:85], s[34:35], 16
-; SI-NEXT: s_or_b32 s40, s83, s36
-; SI-NEXT: s_mov_b32 s41, s37
-; SI-NEXT: s_lshr_b64 s[8:9], s[36:37], 16
-; SI-NEXT: s_or_b32 s14, s16, s38
+; SI-NEXT: s_lshr_b64 s[34:35], s[34:35], 16
+; SI-NEXT: s_or_b32 s14, s92, s38
; SI-NEXT: s_mov_b32 s15, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16
-; SI-NEXT: s_or_b32 s12, s86, s48
-; SI-NEXT: s_mov_b32 s13, s49
-; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
-; SI-NEXT: s_or_b32 s94, s97, s50
-; SI-NEXT: s_mov_b32 s95, s51
-; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16
-; SI-NEXT: s_or_b32 s36, s98, s52
-; SI-NEXT: s_mov_b32 s37, s53
-; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
-; SI-NEXT: s_or_b32 s34, s22, s54
-; SI-NEXT: s_mov_b32 s35, s55
+; SI-NEXT: s_or_b32 s6, s21, s54
+; SI-NEXT: s_mov_b32 s7, s55
; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
-; SI-NEXT: s_lshr_b32 s77, s5, 16
-; SI-NEXT: v_readlane_b32 s5, v46, 52
-; SI-NEXT: v_readlane_b32 s22, v46, 49
-; SI-NEXT: s_or_b32 s96, s99, s64
-; SI-NEXT: s_mov_b32 s97, s65
+; SI-NEXT: s_or_b32 s4, s22, s64
+; SI-NEXT: s_mov_b32 s5, s65
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
-; SI-NEXT: s_lshr_b32 s5, s5, 16
-; SI-NEXT: s_lshr_b32 s91, s91, 16
-; SI-NEXT: s_lshr_b32 s93, s93, 16
-; SI-NEXT: s_lshr_b32 s11, s17, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s66, 16
-; SI-NEXT: s_lshr_b32 s7, s90, 16
-; SI-NEXT: s_lshr_b32 s9, s69, 16
-; SI-NEXT: s_lshr_b32 s39, s70, 16
-; SI-NEXT: s_mov_b32 s98, s27
-; SI-NEXT: s_mov_b32 s99, s25
-; SI-NEXT: v_readlane_b32 s70, v46, 56
-; SI-NEXT: v_readlane_b32 s27, v46, 55
-; SI-NEXT: s_lshr_b32 s49, s71, 16
-; SI-NEXT: s_lshr_b32 s51, vcc_hi, 16
-; SI-NEXT: s_mov_b32 s25, s24
-; SI-NEXT: s_mov_b32 s24, s68
-; SI-NEXT: s_mov_b32 s68, s26
-; SI-NEXT: s_mov_b32 s26, s28
-; SI-NEXT: s_mov_b32 s28, s29
-; SI-NEXT: s_mov_b32 s29, s67
-; SI-NEXT: v_readlane_b32 s69, v46, 54
-; SI-NEXT: v_readlane_b32 s90, v46, 53
-; SI-NEXT: s_lshr_b32 s53, s31, 16
-; SI-NEXT: s_lshr_b32 s55, s82, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s87, 16
+; SI-NEXT: s_lshr_b32 s53, s16, 16
+; SI-NEXT: v_readlane_b32 s16, v46, 0
+; SI-NEXT: s_or_b32 s46, s79, s40
+; SI-NEXT: s_mov_b32 s47, s41
+; SI-NEXT: s_or_b32 s40, s91, s36
+; SI-NEXT: s_mov_b32 s41, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
+; SI-NEXT: s_lshr_b32 s55, s16, 16
+; SI-NEXT: s_lshr_b32 s65, s86, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_mov_b32 s94, s66
+; SI-NEXT: s_lshr_b32 s79, s28, 16
+; SI-NEXT: v_readlane_b32 s28, v46, 3
+; SI-NEXT: v_readlane_b32 vcc_hi, v46, 2
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: s_lshr_b32 s91, s24, 16
+; SI-NEXT: v_readlane_b32 s24, v46, 4
+; SI-NEXT: s_lshr_b32 s93, s27, 16
+; SI-NEXT: v_readlane_b32 s27, v46, 6
+; SI-NEXT: s_lshr_b32 s95, s18, 16
+; SI-NEXT: s_lshr_b32 s31, s26, 16
+; SI-NEXT: s_lshr_b32 s17, s20, 16
+; SI-NEXT: v_readlane_b32 s20, v46, 1
+; SI-NEXT: s_lshr_b32 s92, s78, 16
+; SI-NEXT: s_lshr_b32 s78, s88, 16
+; SI-NEXT: v_readlane_b32 s21, v47, 47
+; SI-NEXT: s_mov_b32 s26, s23
+; SI-NEXT: s_mov_b32 s22, s25
+; SI-NEXT: v_readlane_b32 s25, v46, 5
+; SI-NEXT: s_lshr_b32 s39, s90, 16
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB97_3
; SI-NEXT: .LBB97_2:
; SI-NEXT: s_mov_b64 s[66:67], -1
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr20
-; SI-NEXT: ; implicit-def: $sgpr23
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr5
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr93
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr17
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: .LBB97_3: ; %Flow
-; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 s17, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s17, 1
+; SI-NEXT: s_and_b64 s[18:19], s[66:67], exec
+; SI-NEXT: s_cselect_b32 s16, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s16, 1
; SI-NEXT: s_cbranch_scc1 .LBB97_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s85, s99, 3
-; SI-NEXT: v_readlane_b32 s5, v46, 29
-; SI-NEXT: s_and_b32 s4, s85, 0xff
+; SI-NEXT: v_readlane_b32 s4, v47, 32
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: v_readlane_b32 s5, v47, 27
+; SI-NEXT: v_readlane_b32 s6, v47, 17
+; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 8
-; SI-NEXT: s_add_i32 s6, s22, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_readlane_b32 s5, v46, 20
+; SI-NEXT: v_readlane_b32 s5, v47, 15
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
@@ -193522,14 +194856,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s5, s5, s6
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s5, s19, 3
-; SI-NEXT: v_readlane_b32 s6, v47, 37
-; SI-NEXT: v_readlane_b32 s7, v47, 36
+; SI-NEXT: v_readlane_b32 s5, v47, 2
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: v_readlane_b32 s6, v56, 62
+; SI-NEXT: v_readlane_b32 s7, v56, 55
; SI-NEXT: s_and_b32 s5, s5, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v47, 35
+; SI-NEXT: v_readlane_b32 s6, v56, 52
; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
@@ -193537,91 +194872,94 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v46, 42
+; SI-NEXT: v_readlane_b32 s6, v47, 41
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: v_readlane_b32 s7, v46, 36
-; SI-NEXT: v_readlane_b32 s8, v46, 32
+; SI-NEXT: v_readlane_b32 s7, v47, 35
+; SI-NEXT: v_readlane_b32 s8, v47, 30
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 8
-; SI-NEXT: s_add_i32 s83, s8, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v46, 31
-; SI-NEXT: s_and_b32 s8, s83, 0xff
+; SI-NEXT: v_readlane_b32 s7, v47, 29
+; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_addk_i32 s6, 0x300
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s7, s29, 3
+; SI-NEXT: v_readlane_b32 s7, v47, 12
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: v_readlane_b32 s9, v47, 6
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s8, s68, 8
-; SI-NEXT: s_add_i32 s9, s24, 3
-; SI-NEXT: s_add_i32 s96, s4, 0x3000000
+; SI-NEXT: s_lshl_b32 s8, s21, 8
+; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s4, v47, 38
+; SI-NEXT: v_readlane_b32 s8, v47, 1
; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s8, s4, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_addk_i32 s7, 0x300
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_readlane_b32 s8, v46, 45
+; SI-NEXT: v_readlane_b32 s8, v47, 44
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: v_readlane_b32 s9, v46, 44
-; SI-NEXT: v_readlane_b32 s10, v46, 41
+; SI-NEXT: v_readlane_b32 s9, v47, 43
+; SI-NEXT: v_readlane_b32 s10, v47, 40
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 8
-; SI-NEXT: s_add_i32 s68, s10, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v46, 38
-; SI-NEXT: s_and_b32 s10, s68, 0xff
+; SI-NEXT: v_readlane_b32 s9, v47, 37
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_addk_i32 s8, 0x300
; SI-NEXT: s_or_b32 s9, s9, s10
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readlane_b32 s9, v46, 48
+; SI-NEXT: v_readlane_b32 s9, v47, 25
; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: v_readlane_b32 s4, v47, 39
+; SI-NEXT: v_readlane_b32 s10, v47, 21
+; SI-NEXT: v_readlane_b32 s11, v47, 11
; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: s_lshl_b32 s10, s4, 8
-; SI-NEXT: s_add_i32 s11, s28, 3
+; SI-NEXT: s_lshl_b32 s10, s10, 8
+; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_or_b32 s9, s10, s9
+; SI-NEXT: v_readlane_b32 s10, v47, 10
; SI-NEXT: s_and_b32 s11, s11, 0xff
-; SI-NEXT: s_lshl_b32 s10, s26, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_addk_i32 s9, 0x300
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_readlane_b32 s10, v46, 47
-; SI-NEXT: s_add_i32 s17, s10, 3
-; SI-NEXT: v_readlane_b32 s11, v46, 46
-; SI-NEXT: v_readlane_b32 s12, v46, 43
-; SI-NEXT: s_and_b32 s10, s17, 0xff
+; SI-NEXT: v_readlane_b32 s10, v47, 46
+; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: v_readlane_b32 s11, v47, 45
+; SI-NEXT: v_readlane_b32 s12, v47, 42
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 8
-; SI-NEXT: s_add_i32 s23, s12, 3
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v46, 40
-; SI-NEXT: s_and_b32 s12, s23, 0xff
+; SI-NEXT: v_readlane_b32 s11, v47, 39
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_addk_i32 s10, 0x300
; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readlane_b32 s11, v46, 33
-; SI-NEXT: s_add_i32 s84, s11, 3
-; SI-NEXT: v_readlane_b32 s12, v46, 30
-; SI-NEXT: v_readlane_b32 s13, v46, 25
-; SI-NEXT: s_and_b32 s11, s84, 0xff
+; SI-NEXT: v_readlane_b32 s11, v47, 31
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: v_readlane_b32 s12, v47, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 22
+; SI-NEXT: s_and_b32 s11, s11, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v46, 21
+; SI-NEXT: v_readlane_b32 s12, v47, 16
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
@@ -193629,31 +194967,31 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readlane_b32 s12, v46, 39
-; SI-NEXT: s_add_i32 s99, s12, 3
-; SI-NEXT: v_readlane_b32 s13, v46, 37
-; SI-NEXT: v_readlane_b32 s14, v46, 34
-; SI-NEXT: s_and_b32 s12, s99, 0xff
+; SI-NEXT: v_readlane_b32 s12, v47, 38
+; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: v_readlane_b32 s13, v47, 36
+; SI-NEXT: v_readlane_b32 s14, v47, 33
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 8
-; SI-NEXT: s_add_i32 s86, s14, 3
+; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v46, 35
-; SI-NEXT: s_and_b32 s14, s86, 0xff
+; SI-NEXT: v_readlane_b32 s13, v47, 34
+; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_addk_i32 s12, 0x300
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readlane_b32 s13, v46, 28
+; SI-NEXT: v_readlane_b32 s13, v47, 26
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: v_readlane_b32 s14, v46, 27
-; SI-NEXT: v_readlane_b32 s15, v46, 23
+; SI-NEXT: v_readlane_b32 s14, v47, 24
+; SI-NEXT: v_readlane_b32 s15, v47, 19
; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v46, 24
+; SI-NEXT: v_readlane_b32 s14, v47, 20
; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_lshl_b32 s15, s15, 16
@@ -193661,41 +194999,47 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_readlane_b32 s14, v46, 26
+; SI-NEXT: v_readlane_b32 s14, v47, 23
; SI-NEXT: s_add_i32 s14, s14, 3
-; SI-NEXT: v_readlane_b32 s15, v46, 22
+; SI-NEXT: v_readlane_b32 s15, v47, 18
+; SI-NEXT: v_readlane_b32 s16, v47, 13
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 8
-; SI-NEXT: s_add_i32 s16, s69, 3
+; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: v_readlane_b32 s15, v47, 14
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s15, s90, 24
+; SI-NEXT: s_lshl_b32 s15, s15, 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_addk_i32 s14, 0x300
; SI-NEXT: s_or_b32 s15, s15, s16
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_readlane_b32 s15, v46, 19
+; SI-NEXT: v_readlane_b32 s15, v47, 9
; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: v_readlane_b32 s4, v47, 40
+; SI-NEXT: v_readlane_b32 s16, v47, 8
+; SI-NEXT: v_readlane_b32 s17, v47, 4
; SI-NEXT: s_and_b32 s15, s15, 0xff
-; SI-NEXT: s_lshl_b32 s16, s98, 8
-; SI-NEXT: s_add_i32 s17, s4, 3
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: v_readlane_b32 s16, v47, 5
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: s_lshl_b32 s16, s25, 24
+; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_addk_i32 s15, 0x300
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_add_i32 s16, s27, 3
-; SI-NEXT: v_readlane_b32 s18, v46, 17
+; SI-NEXT: v_readlane_b32 s16, v47, 7
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s17, v47, 3
+; SI-NEXT: v_readlane_b32 s18, v56, 63
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s70, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 18
+; SI-NEXT: v_readlane_b32 s17, v47, 0
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193704,15 +195048,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s40, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 16
+; SI-NEXT: v_readlane_b32 s16, v56, 61
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 15
-; SI-NEXT: v_readlane_b32 s18, v46, 12
+; SI-NEXT: v_readlane_b32 s17, v56, 60
+; SI-NEXT: v_readlane_b32 s18, v56, 57
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 13
+; SI-NEXT: v_readlane_b32 s17, v56, 58
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193721,15 +195065,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s41, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 14
+; SI-NEXT: v_readlane_b32 s16, v56, 59
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 11
-; SI-NEXT: v_readlane_b32 s18, v46, 9
+; SI-NEXT: v_readlane_b32 s17, v56, 56
+; SI-NEXT: v_readlane_b32 s18, v56, 53
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 10
+; SI-NEXT: v_readlane_b32 s17, v56, 54
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193738,15 +195082,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 8
+; SI-NEXT: v_readlane_b32 s16, v56, 51
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 7
-; SI-NEXT: v_readlane_b32 s18, v46, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 50
+; SI-NEXT: v_readlane_b32 s18, v56, 46
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 4
+; SI-NEXT: v_readlane_b32 s17, v56, 47
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193755,15 +195099,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 6
+; SI-NEXT: v_readlane_b32 s16, v56, 49
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v46, 5
-; SI-NEXT: v_readlane_b32 s18, v46, 1
+; SI-NEXT: v_readlane_b32 s17, v56, 48
+; SI-NEXT: v_readlane_b32 s18, v56, 44
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v46, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 45
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193772,15 +195116,15 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s44, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v46, 0
+; SI-NEXT: v_readlane_b32 s16, v56, 43
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 63
-; SI-NEXT: v_readlane_b32 s18, v47, 59
+; SI-NEXT: v_readlane_b32 s17, v56, 42
+; SI-NEXT: v_readlane_b32 s18, v56, 38
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 60
+; SI-NEXT: v_readlane_b32 s17, v56, 39
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193789,15 +195133,14 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s45, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 62
+; SI-NEXT: v_readlane_b32 s16, v56, 41
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 61
-; SI-NEXT: v_readlane_b32 s18, v47, 57
+; SI-NEXT: v_readlane_b32 s17, v56, 40
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s87, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 58
+; SI-NEXT: v_readlane_b32 s17, v56, 37
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193806,116 +195149,107 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s46, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 56
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 55
-; SI-NEXT: v_readlane_b32 s18, v47, 53
+; SI-NEXT: s_add_i32 s16, s28, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s25, 8
+; SI-NEXT: s_add_i32 s18, s85, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 54
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s22, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s47, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 18
+; SI-NEXT: v_readlane_b32 s16, v56, 16
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 17
-; SI-NEXT: v_readlane_b32 s18, v47, 16
+; SI-NEXT: v_readlane_b32 s17, v56, 15
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 15
-; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 13
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 14
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s56, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 14
+; SI-NEXT: v_readlane_b32 s16, v56, 12
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 52
-; SI-NEXT: v_readlane_b32 s18, v47, 50
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s17, s27, 8
+; SI-NEXT: s_add_i32 s18, s26, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 51
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, vcc_hi, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s57, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 45
+; SI-NEXT: v_readlane_b32 s16, v56, 24
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s18, v47, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s92, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 23
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_and_b32 s17, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 23
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s58, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 22
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 21
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 22
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 21
-; SI-NEXT: v_readlane_b32 s18, v47, 20
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 19
-; SI-NEXT: s_and_b32 s18, s18, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_add_i32 s58, s16, 0x3000000
+; SI-NEXT: v_readlane_b32 s16, v56, 20
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s17, s16, 0xff
+; SI-NEXT: v_readlane_b32 s16, v56, 19
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s59, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 46
+; SI-NEXT: s_and_b32 s17, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v56, 17
+; SI-NEXT: s_lshl_b32 s18, s16, 24
+; SI-NEXT: v_readlane_b32 s16, v56, 18
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 44
-; SI-NEXT: v_readlane_b32 s18, v47, 41
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_add_i32 s59, s16, 0x3000000
+; SI-NEXT: s_add_i32 s16, s76, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 29
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s97, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s4, v47, 29
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s4, 24
+; SI-NEXT: s_lshl_b32 s17, s96, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s60, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 28
+; SI-NEXT: v_readlane_b32 s16, v56, 28
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 27
-; SI-NEXT: v_readlane_b32 s18, v47, 26
+; SI-NEXT: v_readlane_b32 s17, v56, 27
+; SI-NEXT: v_readlane_b32 s18, v56, 26
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 25
+; SI-NEXT: v_readlane_b32 s17, v56, 25
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193924,32 +195258,29 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s61, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 49
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 47
-; SI-NEXT: v_readlane_b32 s18, v47, 43
+; SI-NEXT: s_add_i32 s16, s77, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 34
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_add_i32 s18, s99, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 42
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s98, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s62, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 33
+; SI-NEXT: v_readlane_b32 s16, v56, 33
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 32
-; SI-NEXT: v_readlane_b32 s18, v47, 31
+; SI-NEXT: v_readlane_b32 s17, v56, 32
+; SI-NEXT: v_readlane_b32 s18, v56, 31
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 30
+; SI-NEXT: v_readlane_b32 s17, v56, 30
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193958,15 +195289,14 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s63, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 5
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 4
-; SI-NEXT: v_readlane_b32 s18, v47, 3
+; SI-NEXT: s_add_i32 s16, s24, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 4
+; SI-NEXT: v_readlane_b32 s18, v56, 3
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 2
+; SI-NEXT: v_readlane_b32 s17, v56, 2
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -193975,32 +195305,32 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s72, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 1
+; SI-NEXT: v_readlane_b32 s16, v56, 1
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 0
-; SI-NEXT: v_readlane_b32 s18, v47, 48
+; SI-NEXT: v_readlane_b32 s17, v56, 0
+; SI-NEXT: v_readlane_b32 s18, v56, 36
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s4, v47, 34
+; SI-NEXT: v_readlane_b32 s17, v56, 35
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s4, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s73, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 13
+; SI-NEXT: v_readlane_b32 s16, v56, 11
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 12
-; SI-NEXT: v_readlane_b32 s18, v47, 11
+; SI-NEXT: v_readlane_b32 s17, v56, 10
+; SI-NEXT: v_readlane_b32 s18, v56, 9
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 10
+; SI-NEXT: v_readlane_b32 s17, v56, 8
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
@@ -194009,183 +195339,183 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s74, s16, 0x3000000
-; SI-NEXT: v_readlane_b32 s16, v47, 9
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v47, 8
-; SI-NEXT: v_readlane_b32 s18, v47, 7
+; SI-NEXT: s_add_i32 s16, s20, 3
+; SI-NEXT: v_readlane_b32 s17, v56, 7
+; SI-NEXT: v_readlane_b32 s18, v56, 6
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v47, 6
+; SI-NEXT: v_readlane_b32 s17, v56, 5
; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s17, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_add_i32 s34, s6, 0x3000000
-; SI-NEXT: s_add_i32 s35, s7, 0x3000000
-; SI-NEXT: s_add_i32 s36, s8, 0x3000000
-; SI-NEXT: s_add_i32 s37, s9, 0x3000000
-; SI-NEXT: s_add_i32 s94, s10, 0x3000000
-; SI-NEXT: s_add_i32 s95, s11, 0x3000000
+; SI-NEXT: s_add_i32 s4, s4, 0x3000000
+; SI-NEXT: s_add_i32 s5, s5, 0x3000000
+; SI-NEXT: s_add_i32 s6, s6, 0x3000000
+; SI-NEXT: s_add_i32 s7, s7, 0x3000000
+; SI-NEXT: s_add_i32 s8, s8, 0x3000000
+; SI-NEXT: s_add_i32 s9, s9, 0x3000000
+; SI-NEXT: s_add_i32 s10, s10, 0x3000000
+; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s97, s5, 0x3000000
; SI-NEXT: s_add_i32 s75, s16, 0x3000000
-; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[10:11], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[6:7], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[8:9], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[94:95], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[36:37], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[34:35], 16
-; SI-NEXT: s_lshr_b64 s[20:21], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[96:97], 16
-; SI-NEXT: s_lshr_b32 s23, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s73, 16
-; SI-NEXT: s_lshr_b32 s5, s63, 16
-; SI-NEXT: s_lshr_b32 s91, s61, 16
-; SI-NEXT: s_lshr_b32 s93, s59, 16
-; SI-NEXT: s_lshr_b32 s11, s57, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s47, 16
-; SI-NEXT: s_lshr_b32 s30, s45, 16
-; SI-NEXT: s_lshr_b32 s7, s43, 16
-; SI-NEXT: s_lshr_b32 s9, s41, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s95, 16
-; SI-NEXT: s_lshr_b32 s53, s37, 16
-; SI-NEXT: s_lshr_b32 s55, s35, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s97, 16
+; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[74:75], 16
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[70:71], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[80:81], s[56:57], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s49, s75, 16
+; SI-NEXT: s_lshr_b32 s51, s73, 16
+; SI-NEXT: s_lshr_b32 s53, s63, 16
+; SI-NEXT: s_lshr_b32 s55, s61, 16
+; SI-NEXT: s_lshr_b32 s65, s59, 16
+; SI-NEXT: s_lshr_b32 s35, s57, 16
+; SI-NEXT: s_lshr_b32 s79, s47, 16
+; SI-NEXT: s_lshr_b32 s89, s45, 16
+; SI-NEXT: s_lshr_b32 s91, s43, 16
+; SI-NEXT: s_lshr_b32 s93, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s15, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s17, s11, 16
+; SI-NEXT: s_lshr_b32 s92, s9, 16
+; SI-NEXT: s_lshr_b32 s78, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s5, 16
; SI-NEXT: .LBB97_5: ; %end
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: s_and_b32 s17, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s20, 16
-; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_and_b32 s18, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s23, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_and_b32 s19, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s76, 16
+; SI-NEXT: s_and_b32 s16, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s19, s82, 16
+; SI-NEXT: s_or_b32 s16, s16, s19
+; SI-NEXT: s_and_b32 s19, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s20, s49, 16
; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: s_and_b32 s20, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s77, 16
+; SI-NEXT: s_and_b32 s20, s72, 0xffff
+; SI-NEXT: s_lshl_b32 s21, s30, 16
; SI-NEXT: s_or_b32 s20, s20, s21
-; SI-NEXT: s_and_b32 s21, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s78, 16
+; SI-NEXT: s_and_b32 s21, s73, 0xffff
+; SI-NEXT: s_lshl_b32 s22, s51, 16
; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: s_and_b32 s22, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s5, 16
+; SI-NEXT: s_and_b32 s22, s62, 0xffff
+; SI-NEXT: s_lshl_b32 s23, s94, 16
; SI-NEXT: s_or_b32 s22, s22, s23
-; SI-NEXT: s_and_b32 s23, s60, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s80, 16
+; SI-NEXT: s_and_b32 s23, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s24, s53, 16
; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s91, 16
+; SI-NEXT: s_and_b32 s24, s60, 0xffff
+; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
-; SI-NEXT: s_and_b32 s25, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s10, 16
+; SI-NEXT: s_and_b32 s25, s61, 0xffff
+; SI-NEXT: s_lshl_b32 s26, s55, 16
; SI-NEXT: s_or_b32 s25, s25, s26
-; SI-NEXT: s_and_b32 s26, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s93, 16
+; SI-NEXT: s_and_b32 s26, s58, 0xffff
+; SI-NEXT: s_lshl_b32 s27, s70, 16
; SI-NEXT: s_or_b32 s26, s26, s27
-; SI-NEXT: s_and_b32 s27, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s4, 16
+; SI-NEXT: s_and_b32 s27, s59, 0xffff
+; SI-NEXT: s_lshl_b32 s28, s65, 16
; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: s_and_b32 s28, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s11, 16
+; SI-NEXT: s_and_b32 s28, s56, 0xffff
+; SI-NEXT: s_lshl_b32 s29, s80, 16
; SI-NEXT: s_or_b32 s28, s28, s29
-; SI-NEXT: s_and_b32 s29, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s6, 16
-; SI-NEXT: s_or_b32 s29, s29, s46
-; SI-NEXT: s_and_b32 s46, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s47, vcc_lo, 16
-; SI-NEXT: s_or_b32 s46, s46, s47
+; SI-NEXT: s_and_b32 s29, s57, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s35, 16
+; SI-NEXT: s_or_b32 s29, s29, s56
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s84, 16
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s47, s47, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s79, 16
+; SI-NEXT: s_or_b32 s47, s47, s56
; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s88, 16
-; SI-NEXT: s_or_b32 s44, s44, s47
+; SI-NEXT: s_lshl_b32 s56, s68, 16
+; SI-NEXT: s_or_b32 s44, s44, s56
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s30, 16
-; SI-NEXT: s_or_b32 s45, s45, s47
+; SI-NEXT: s_lshl_b32 s56, s89, 16
+; SI-NEXT: s_or_b32 s45, s45, s56
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s84, 16
-; SI-NEXT: s_or_b32 s42, s42, s47
+; SI-NEXT: s_lshl_b32 s56, s34, 16
+; SI-NEXT: s_or_b32 s42, s42, s56
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s7, 16
-; SI-NEXT: s_or_b32 s43, s43, s47
+; SI-NEXT: s_lshl_b32 s56, s91, 16
+; SI-NEXT: s_or_b32 s43, s43, s56
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s8, 16
-; SI-NEXT: s_or_b32 s40, s40, s47
+; SI-NEXT: s_lshl_b32 s56, s36, 16
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_or_b32 s40, s40, s56
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s9, 16
-; SI-NEXT: s_or_b32 s41, s41, s47
+; SI-NEXT: s_lshl_b32 s56, s93, 16
+; SI-NEXT: s_or_b32 s11, s11, s17
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s52, 16
+; SI-NEXT: s_or_b32 s41, s41, s56
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s38, 16
-; SI-NEXT: s_or_b32 s14, s14, s47
+; SI-NEXT: s_lshl_b32 s56, s38, 16
+; SI-NEXT: s_or_b32 s8, s8, s17
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s92, 16
+; SI-NEXT: s_or_b32 s14, s14, s56
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s47
+; SI-NEXT: s_lshl_b32 s56, s95, 16
+; SI-NEXT: s_or_b32 s9, s9, s17
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s54, 16
+; SI-NEXT: s_or_b32 s15, s15, s56
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s48, 16
-; SI-NEXT: s_or_b32 s12, s12, s47
+; SI-NEXT: s_lshl_b32 s56, s48, 16
+; SI-NEXT: s_or_b32 s6, s6, s17
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s78, 16
+; SI-NEXT: s_or_b32 s12, s12, s56
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s49, 16
-; SI-NEXT: s_or_b32 s13, s13, s47
-; SI-NEXT: s_and_b32 s10, s94, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s50, 16
-; SI-NEXT: s_or_b32 s10, s10, s47
-; SI-NEXT: s_and_b32 s11, s95, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s51, 16
-; SI-NEXT: s_or_b32 s11, s11, s47
-; SI-NEXT: s_and_b32 s8, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s52, 16
-; SI-NEXT: s_or_b32 s8, s8, s47
-; SI-NEXT: s_and_b32 s9, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s53, 16
-; SI-NEXT: s_or_b32 s9, s9, s47
-; SI-NEXT: s_and_b32 s6, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s54, 16
-; SI-NEXT: s_or_b32 s6, s6, s47
-; SI-NEXT: s_and_b32 s7, s35, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s55, 16
-; SI-NEXT: s_or_b32 s7, s7, s47
-; SI-NEXT: s_and_b32 s4, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s47, s64, 16
-; SI-NEXT: s_and_b32 s5, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s16, vcc_hi, 16
-; SI-NEXT: s_or_b32 s4, s4, s47
-; SI-NEXT: s_or_b32 s5, s5, s16
+; SI-NEXT: s_lshl_b32 s56, s31, 16
+; SI-NEXT: s_or_b32 s7, s7, s17
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s64, 16
+; SI-NEXT: s_or_b32 s13, s13, s56
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s50, 16
+; SI-NEXT: s_or_b32 s4, s4, s17
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s39, 16
+; SI-NEXT: s_or_b32 s10, s10, s56
+; SI-NEXT: s_or_b32 s5, s5, s17
; SI-NEXT: v_readlane_b32 s30, v45, 34
-; SI-NEXT: v_mov_b32_e32 v0, s17
-; SI-NEXT: v_mov_b32_e32 v1, s18
-; SI-NEXT: v_mov_b32_e32 v2, s19
-; SI-NEXT: v_mov_b32_e32 v3, s20
-; SI-NEXT: v_mov_b32_e32 v4, s21
-; SI-NEXT: v_mov_b32_e32 v5, s22
-; SI-NEXT: v_mov_b32_e32 v6, s23
-; SI-NEXT: v_mov_b32_e32 v7, s24
-; SI-NEXT: v_mov_b32_e32 v8, s25
-; SI-NEXT: v_mov_b32_e32 v9, s26
-; SI-NEXT: v_mov_b32_e32 v10, s27
-; SI-NEXT: v_mov_b32_e32 v11, s28
-; SI-NEXT: v_mov_b32_e32 v12, s29
-; SI-NEXT: v_mov_b32_e32 v13, s46
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s19
+; SI-NEXT: v_mov_b32_e32 v2, s20
+; SI-NEXT: v_mov_b32_e32 v3, s21
+; SI-NEXT: v_mov_b32_e32 v4, s22
+; SI-NEXT: v_mov_b32_e32 v5, s23
+; SI-NEXT: v_mov_b32_e32 v6, s24
+; SI-NEXT: v_mov_b32_e32 v7, s25
+; SI-NEXT: v_mov_b32_e32 v8, s26
+; SI-NEXT: v_mov_b32_e32 v9, s27
+; SI-NEXT: v_mov_b32_e32 v10, s28
+; SI-NEXT: v_mov_b32_e32 v11, s29
+; SI-NEXT: v_mov_b32_e32 v12, s46
+; SI-NEXT: v_mov_b32_e32 v13, s47
; SI-NEXT: v_mov_b32_e32 v14, s44
; SI-NEXT: v_mov_b32_e32 v15, s45
; SI-NEXT: v_mov_b32_e32 v16, s42
@@ -194243,6 +195573,7 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -194266,32 +195597,28 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
; VI-NEXT: v_readfirstlane_b32 s63, v12
-; VI-NEXT: v_readfirstlane_b32 s8, v0
-; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276
; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12
-; VI-NEXT: v_readfirstlane_b32 s59, v29
-; VI-NEXT: v_readfirstlane_b32 s47, v27
+; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s75, v30
-; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s60, v26
; VI-NEXT: v_readfirstlane_b32 s43, v25
+; VI-NEXT: v_readfirstlane_b32 s59, v29
+; VI-NEXT: v_readfirstlane_b32 s72, v28
+; VI-NEXT: v_readfirstlane_b32 s47, v27
; VI-NEXT: v_readfirstlane_b32 s56, v24
; VI-NEXT: v_readfirstlane_b32 s15, v23
; VI-NEXT: v_readfirstlane_b32 s44, v22
; VI-NEXT: v_readfirstlane_b32 s12, v21
; VI-NEXT: v_readfirstlane_b32 s40, v20
-; VI-NEXT: v_readfirstlane_b32 s76, v18
-; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s9, v19
+; VI-NEXT: v_readfirstlane_b32 s76, v18
; VI-NEXT: v_readfirstlane_b32 s61, v17
+; VI-NEXT: v_readfirstlane_b32 s73, v16
; VI-NEXT: v_readfirstlane_b32 s62, v15
-; VI-NEXT: v_readfirstlane_b32 s74, v14
; VI-NEXT: v_readfirstlane_b32 s57, v13
-; VI-NEXT: v_readfirstlane_b32 s58, v10
; VI-NEXT: v_readfirstlane_b32 s41, v9
; VI-NEXT: v_readfirstlane_b32 s46, v8
; VI-NEXT: v_readfirstlane_b32 s13, v7
@@ -194301,176 +195628,191 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s7, v3
; VI-NEXT: v_readfirstlane_b32 s11, v2
; VI-NEXT: v_readfirstlane_b32 s6, v1
-; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4
+; VI-NEXT: v_readfirstlane_b32 s8, v0
+; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32
-; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328
+; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324
-; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320
-; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316
-; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312
-; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308
-; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304
-; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300
-; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296
-; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292
-; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288
+; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320
+; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:312
+; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:308
+; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:304
+; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:300
+; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:296
+; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:292
+; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:288
; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272
-; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:280
+; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276
+; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:272
+; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:268
+; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:264
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:260
; VI-NEXT: s_and_b64 s[4:5], vcc, exec
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216
-; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212
-; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200
-; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196
-; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192
-; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188
-; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184
-; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180
-; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176
-; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172
-; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168
-; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164
-; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160
-; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156
-; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152
-; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148
-; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144
-; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140
-; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136
-; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132
-; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128
-; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124
-; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120
-; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108
-; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104
-; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100
-; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96
-; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92
-; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88
-; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84
-; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80
-; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76
-; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72
-; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60
-; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56
-; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:256
+; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:252
+; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:248
+; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:244
+; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:240
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:236
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:232
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:228
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:224
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:220
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:216
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:212
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:208
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:204
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:200
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:196
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:192
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:188
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:184
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:180
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:176
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:172
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:168
+; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:164
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:156
+; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:152
+; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:148
+; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:144
+; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:140
+; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:136
+; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:132
+; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:124
+; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:120
+; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:116
+; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:108
+; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:104
+; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:100
+; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:92
+; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:88
+; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:84
+; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:80
+; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:76
+; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:72
+; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:68
+; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:64
+; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:60
+; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:56
+; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:52
+; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:48
+; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:44
+; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:40
+; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:36
+; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:32
+; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:28
+; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:24
+; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:20
+; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:16
+; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20
-; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
; VI-NEXT: s_cbranch_scc0 .LBB97_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, s23
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v0, s17
; VI-NEXT: v_perm_b32 v1, s18, v1, v11
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v2, s21
; VI-NEXT: v_perm_b32 v3, s22, v3, v11
; VI-NEXT: v_perm_b32 v0, s16, v0, v11
@@ -194484,50 +195826,61 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_perm_b32 v3, s26, v3, v11
; VI-NEXT: v_perm_b32 v2, s24, v2, v11
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: v_mov_b32_e32 v3, s29
; VI-NEXT: v_perm_b32 v4, s8, v4, v11
; VI-NEXT: v_perm_b32 v3, s28, v3, v11
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, s10
; VI-NEXT: v_or_b32_e32 v3, v3, v4
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_perm_b32 v5, s14, v5, v11
; VI-NEXT: v_perm_b32 v4, s11, v4, v11
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v6, s41
; VI-NEXT: v_or_b32_e32 v4, v4, v5
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_perm_b32 v6, s46, v6, v11
; VI-NEXT: v_perm_b32 v5, s42, v5, v11
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, s57
; VI-NEXT: v_or_b32_e32 v5, v5, v6
; VI-NEXT: v_mov_b32_e32 v6, s45
; VI-NEXT: v_perm_b32 v7, s63, v7, v11
; VI-NEXT: v_perm_b32 v6, s58, v6, v11
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v8, s61
; VI-NEXT: v_or_b32_e32 v6, v6, v7
; VI-NEXT: v_mov_b32_e32 v7, s62
; VI-NEXT: v_perm_b32 v8, s73, v8, v11
; VI-NEXT: v_perm_b32 v7, s74, v7, v11
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, s12
; VI-NEXT: v_or_b32_e32 v7, v7, v8
; VI-NEXT: v_mov_b32_e32 v8, s9
; VI-NEXT: v_perm_b32 v9, s40, v9, v11
; VI-NEXT: v_perm_b32 v8, s76, v8, v11
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_mov_b32_e32 v43, v10
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v54, v49
+; VI-NEXT: v_mov_b32_e32 v49, v10
; VI-NEXT: v_mov_b32_e32 v10, s43
; VI-NEXT: v_or_b32_e32 v8, v8, v9
; VI-NEXT: v_mov_b32_e32 v9, s15
; VI-NEXT: v_perm_b32 v10, s56, v10, v11
; VI-NEXT: v_perm_b32 v9, s44, v9, v11
+; VI-NEXT: v_mov_b32_e32 v33, v31
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; VI-NEXT: v_mov_b32_e32 v35, v12
+; VI-NEXT: v_mov_b32_e32 v31, v42
+; VI-NEXT: v_mov_b32_e32 v42, v12
; VI-NEXT: v_mov_b32_e32 v12, s59
; VI-NEXT: v_or_b32_e32 v9, v9, v10
; VI-NEXT: v_mov_b32_e32 v10, s47
@@ -194536,169 +195889,185 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_or_b32_e32 v10, v10, v12
-; VI-NEXT: v_perm_b32 v12, v15, v14, s4
+; VI-NEXT: v_perm_b32 v12, v35, v32, s4
; VI-NEXT: v_perm_b32 v11, s75, v13, v11
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v18, v23, v18, s4
-; VI-NEXT: v_perm_b32 v23, v51, v33, s4
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v12, v56, v12, s4
+; VI-NEXT: v_perm_b32 v12, v50, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v13, v47, v13, s4
+; VI-NEXT: v_perm_b32 v13, v39, v36, s4
; VI-NEXT: v_or_b32_e32 v12, v13, v12
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v14, v59, v14, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v15, v32, v15, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v61, v13, s4
+; VI-NEXT: v_perm_b32 v13, v57, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_perm_b32 v14, v17, v60, s4
+; VI-NEXT: v_perm_b32 v32, v52, v38, s4
+; VI-NEXT: v_perm_b32 v14, v14, v53, s4
+; VI-NEXT: v_or_b32_e32 v13, v32, v13
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_perm_b32 v15, v21, v16, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v17, v28, v24, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v21, v58, v46, s4
-; VI-NEXT: v_perm_b32 v24, v36, v49, s4
-; VI-NEXT: v_mov_b32_e32 v28, v52
-; VI-NEXT: v_mov_b32_e32 v52, v53
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v19, v16, s4
-; VI-NEXT: v_perm_b32 v19, v26, v22, s4
-; VI-NEXT: v_or_b32_e32 v17, v19, v17
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_perm_b32 v16, v25, v20, s4
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v16, v18, v16
-; VI-NEXT: v_perm_b32 v18, v45, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v20, v44, v29, s4
-; VI-NEXT: v_perm_b32 v22, v53, v42, s4
-; VI-NEXT: v_mov_b32_e32 v45, v34
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v63, v51, s4
+; VI-NEXT: v_or_b32_e32 v14, v32, v14
+; VI-NEXT: v_perm_b32 v32, v61, v34, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v15, v15, v62, s4
+; VI-NEXT: v_or_b32_e32 v15, v15, v32
+; VI-NEXT: v_perm_b32 v32, v60, v59, s4
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_perm_b32 v28, v58, v28, s4
+; VI-NEXT: v_perm_b32 v17, v17, v16, s4
+; VI-NEXT: v_or_b32_e32 v16, v28, v32
+; VI-NEXT: v_perm_b32 v28, v46, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_perm_b32 v18, v29, v18, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v28
+; VI-NEXT: v_perm_b32 v28, v44, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v43, v19, s4
+; VI-NEXT: v_mov_b32_e32 v43, v20
+; VI-NEXT: v_perm_b32 v20, v23, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v19, v19, v28
+; VI-NEXT: v_perm_b32 v28, v24, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_e32 v20, v20, v28
+; VI-NEXT: v_perm_b32 v28, v26, v25, s4
+; VI-NEXT: v_mov_b32_e32 v37, v54
+; VI-NEXT: v_perm_b32 v29, v49, v54, s4
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_mov_b32_e32 v53, v49
+; VI-NEXT: v_mov_b32_e32 v52, v33
+; VI-NEXT: v_perm_b32 v35, v56, v47, s4
+; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; VI-NEXT: v_or_b32_e32 v17, v17, v35
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v21, v22, v21, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v21, v21, v28
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v19, v30, v19, s4
-; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_perm_b32 v19, v55, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_perm_b32 v20, v39, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_perm_b32 v21, v38, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v21, v22, v21
-; VI-NEXT: v_perm_b32 v22, v54, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v22, v23, v22
-; VI-NEXT: v_perm_b32 v23, v40, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_or_b32_e32 v23, v24, v23
-; VI-NEXT: v_perm_b32 v24, v48, v34, s4
+; VI-NEXT: v_mov_b32_e32 v36, v38
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_mov_b32_e32 v48, v54
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v24, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_mov_b32_e32 v50, v28
+; VI-NEXT: v_perm_b32 v28, v31, v28, s4
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_mov_b32_e32 v48, v25
-; VI-NEXT: v_perm_b32 v25, v25, v41, s4
-; VI-NEXT: v_or_b32_e32 v24, v25, v24
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v33
-; VI-NEXT: v_mov_b32_e32 v33, v26
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_perm_b32 v22, v23, v22, s4
+; VI-NEXT: v_or_b32_e32 v22, v22, v24
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_mov_b32_e32 v53, v25
+; VI-NEXT: v_mov_b32_e32 v57, v31
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v23, v23, v24, s4
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v24, v25, s4
+; VI-NEXT: v_or_b32_e32 v23, v24, v23
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v24, v25, v24, s4
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v24, v25, v24
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v25, v25, v26, s4
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
+; VI-NEXT: v_perm_b32 v26, v26, v27, s4
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: v_or_b32_e32 v25, v26, v25
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v27, v26, s4
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v26, v40, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v27, v27, v41, s4
; VI-NEXT: v_or_b32_e32 v26, v27, v26
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v34, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v29, v27, s4
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v27, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v28, v29, s4
; VI-NEXT: v_or_b32_e32 v27, v28, v27
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v28, v28, v35, s4
+; VI-NEXT: v_perm_b32 v28, v55, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v62, v29, s4
; VI-NEXT: v_or_b32_e32 v28, v29, v28
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, v44
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v43, v29, s4
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v49, v29
+; VI-NEXT: v_perm_b32 v29, v30, v29, s4
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v41, v55, v54, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v33, v30
+; VI-NEXT: v_perm_b32 v30, v31, v30, s4
; VI-NEXT: v_or_b32_e32 v29, v30, v29
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v32, v30
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v35, v31
; VI-NEXT: v_perm_b32 v30, v31, v30, s4
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_mov_b32_e32 v62, v31
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_or_b32_e32 v30, v31, v30
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_mov_b32_e32 v63, v31
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v31, v35, v31, s4
+; VI-NEXT: v_perm_b32 v31, v38, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_mov_b32_e32 v35, v43
-; VI-NEXT: v_perm_b32 v43, v44, v43, s4
-; VI-NEXT: v_or_b32_e32 v31, v43, v31
+; VI-NEXT: v_mov_b32_e32 v51, v38
+; VI-NEXT: v_mov_b32_e32 v38, v55
+; VI-NEXT: v_or_b32_e32 v31, v41, v31
; VI-NEXT: s_mov_b64 s[4:5], 0
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v39, v34
-; VI-NEXT: v_mov_b32_e32 v34, v52
-; VI-NEXT: v_mov_b32_e32 v52, v45
; VI-NEXT: s_branch .LBB97_3
; VI-NEXT: .LBB97_2:
-; VI-NEXT: v_mov_b32_e32 v43, v39
-; VI-NEXT: v_mov_b32_e32 v52, v34
-; VI-NEXT: v_mov_b32_e32 v39, v33
-; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v34, v53
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v51, v4
+; VI-NEXT: v_mov_b32_e32 v39, v55
+; VI-NEXT: v_mov_b32_e32 v53, v10
+; VI-NEXT: v_mov_b32_e32 v38, v3
+; VI-NEXT: v_mov_b32_e32 v52, v31
+; VI-NEXT: v_mov_b32_e32 v35, v8
+; VI-NEXT: v_mov_b32_e32 v63, v1
+; VI-NEXT: v_mov_b32_e32 v37, v49
+; VI-NEXT: v_mov_b32_e32 v36, v6
+; VI-NEXT: v_mov_b32_e32 v48, v0
+; VI-NEXT: v_mov_b32_e32 v34, v54
+; VI-NEXT: v_mov_b32_e32 v32, v5
+; VI-NEXT: v_mov_b32_e32 v50, v11
+; VI-NEXT: v_mov_b32_e32 v57, v9
; VI-NEXT: v_mov_b32_e32 v62, v2
-; VI-NEXT: v_mov_b32_e32 v35, v1
-; VI-NEXT: v_mov_b32_e32 v55, v57
+; VI-NEXT: v_mov_b32_e32 v49, v33
+; VI-NEXT: v_mov_b32_e32 v33, v7
+; VI-NEXT: v_mov_b32_e32 v43, v20
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -194708,9 +196077,26 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: s_cmp_lg_u32 s4, 1
; VI-NEXT: s_cbranch_scc1 .LBB97_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
+; VI-NEXT: v_perm_b32 v0, v0, v63, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
+; VI-NEXT: v_perm_b32 v0, v0, v48, s4
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35
+; VI-NEXT: v_perm_b32 v20, v0, v32, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
+; VI-NEXT: v_perm_b32 v21, v0, v62, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
+; VI-NEXT: v_perm_b32 v22, v0, v49, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v57
+; VI-NEXT: v_perm_b32 v23, v0, v33, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39
+; VI-NEXT: v_perm_b32 v24, v0, v52, s4
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53
+; VI-NEXT: v_perm_b32 v25, v0, v37, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s60, s60, 3
@@ -194732,339 +196118,349 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s20, s20, 3
+; VI-NEXT: v_mov_b32_e32 v57, s21
; VI-NEXT: s_add_i32 s18, s18, 3
+; VI-NEXT: v_mov_b32_e32 v62, s19
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_mov_b32_e32 v18, s17
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_mov_b32_e32 v63, s17
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62
-; VI-NEXT: v_perm_b32 v0, v0, v35, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v62, s21
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v26, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v27, v0, v50, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v28, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v29, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v35, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v30, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v0, v0, v1, s4
-; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v31, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v0, v1, s4
+; VI-NEXT: v_perm_b32 v41, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v26, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v19, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v28, v0, v1, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33
-; VI-NEXT: v_perm_b32 v25, v0, v53, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29
-; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v24, v0, v52, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48
-; VI-NEXT: v_perm_b32 v30, v0, v41, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40
-; VI-NEXT: v_perm_b32 v23, v0, v50, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36
-; VI-NEXT: v_perm_b32 v31, v0, v49, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54
-; VI-NEXT: v_perm_b32 v22, v0, v37, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51
-; VI-NEXT: v_perm_b32 v33, v0, v39, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38
-; VI-NEXT: v_perm_b32 v21, v0, v63, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34
-; VI-NEXT: v_perm_b32 v36, v0, v42, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43
-; VI-NEXT: v_perm_b32 v20, v0, v55, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58
+; VI-NEXT: v_perm_b32 v44, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v63, s19
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
-; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v52, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v45, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v53, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v38, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v46, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: v_perm_b32 v47, v0, v1, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v56, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v18, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v0, v1, s4
+; VI-NEXT: v_perm_b32 v58, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
+; VI-NEXT: v_perm_b32 v59, v0, v43, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v13, v0, v1, s4
+; VI-NEXT: v_perm_b32 v60, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v61, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v40, v1, v0, s4
; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v42, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v10, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v0
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v1, v0, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v14, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v15, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
-; VI-NEXT: v_perm_b32 v16, v0, v60, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61
-; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v54, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59
+; VI-NEXT: v_perm_b32 v32, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v40, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56
+; VI-NEXT: v_perm_b32 v34, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v42, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47
+; VI-NEXT: v_perm_b32 v36, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v43, v0, v1, s4
-; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v0, v1, s4
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v44, v0, v1, s4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v38, v0, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004
-; VI-NEXT: v_perm_b32 v62, s20, v62, v0
-; VI-NEXT: v_perm_b32 v63, s18, v63, v0
+; VI-NEXT: v_perm_b32 v57, s20, v57, v0
+; VI-NEXT: v_perm_b32 v62, s18, v62, v0
+; VI-NEXT: v_lshlrev_b32_e32 v62, 16, v62
+; VI-NEXT: v_add_u32_e32 v57, vcc, 0x300, v57
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v45, s75, v1, v0
+; VI-NEXT: v_perm_b32 v39, s75, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s59
-; VI-NEXT: v_perm_b32 v55, s72, v1, v0
+; VI-NEXT: v_perm_b32 v33, s72, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: v_perm_b32 v41, s60, v1, v0
+; VI-NEXT: v_perm_b32 v35, s60, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v9, s56, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: v_perm_b32 v46, s44, v1, v0
+; VI-NEXT: v_perm_b32 v48, s44, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: v_perm_b32 v8, s40, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_perm_b32 v47, s76, v1, v0
+; VI-NEXT: v_perm_b32 v49, s76, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v7, s73, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s62
-; VI-NEXT: v_perm_b32 v56, s74, v1, v0
+; VI-NEXT: v_perm_b32 v50, s74, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s57
; VI-NEXT: v_perm_b32 v6, s63, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: v_perm_b32 v57, s58, v1, v0
+; VI-NEXT: v_perm_b32 v51, s58, v1, v0
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v51
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v50
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v48
+; VI-NEXT: v_or_b32_sdwa v6, v6, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v7, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v9, v9, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v10
+; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v12
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v13
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
+; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v37
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v33
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v35
+; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v12, v12, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
; VI-NEXT: v_mov_b32_e32 v1, s41
; VI-NEXT: v_perm_b32 v5, s46, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_perm_b32 v58, s42, v1, v0
+; VI-NEXT: v_perm_b32 v52, s42, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s10
; VI-NEXT: v_perm_b32 v4, s14, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: v_perm_b32 v59, s11, v1, v0
+; VI-NEXT: v_perm_b32 v53, s11, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_perm_b32 v3, s8, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: v_perm_b32 v60, s28, v1, v0
+; VI-NEXT: v_perm_b32 v54, s28, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s27
; VI-NEXT: v_perm_b32 v2, s26, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: v_perm_b32 v61, s24, v1, v0
+; VI-NEXT: v_perm_b32 v55, s24, v1, v0
; VI-NEXT: v_mov_b32_e32 v1, s23
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v52
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v49
; VI-NEXT: v_perm_b32 v1, s22, v1, v0
-; VI-NEXT: v_perm_b32 v0, s16, v18, v0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63
+; VI-NEXT: v_perm_b32 v0, s16, v63, v0
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v53
+; VI-NEXT: v_or_b32_sdwa v5, v5, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v8, v8, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v11
+; VI-NEXT: v_lshlrev_b32_e32 v52, 16, v14
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
+; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v34
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v38
+; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0
-; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62
-; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61
-; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v55
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60
-; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59
-; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58
-; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57
-; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56
-; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47
-; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46
-; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10
-; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11
-; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13
-; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40
+; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v54
+; VI-NEXT: v_or_b32_sdwa v4, v4, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42
-; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43
-; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41
-; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44
-; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45
-; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35
-; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36
-; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52
; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v16, v50, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v17, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v20
+; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v21
+; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v22
+; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v23
+; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v24
+; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v25
+; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v26
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v29
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v30
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v31
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v41
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v19
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v44
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v45
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v46
+; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v47
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v56
+; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v18
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v58
+; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v59
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v60
+; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v61
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
+; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v42
+; VI-NEXT: v_or_b32_sdwa v0, v62, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v1, v1, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v2, v2, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v3, v3, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v18, v18, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v19, v19, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v20, v20, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v21, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v22, v22, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v27, v48, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v28, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v29, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v30, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; VI-NEXT: v_or_b32_sdwa v31, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2
@@ -195083,45 +196479,20 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15
; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17
+; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18
+; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22
+; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23
+; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24
+; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25
+; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27
+; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28
+; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29
+; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30
+; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31
; VI-NEXT: .LBB97_5: ; %end
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
@@ -195161,458 +196532,521 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readfirstlane_b32 s42, v13
+; GFX9-NEXT: v_readfirstlane_b32 s46, v12
+; GFX9-NEXT: v_readfirstlane_b32 s61, v11
; GFX9-NEXT: v_readfirstlane_b32 s7, v0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
-; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:8
+; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328
+; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s6, v1
-; GFX9-NEXT: v_readfirstlane_b32 s15, v3
+; GFX9-NEXT: v_readfirstlane_b32 s9, v21
; GFX9-NEXT: v_readfirstlane_b32 s43, v2
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332
+; GFX9-NEXT: v_readfirstlane_b32 s40, v24
+; GFX9-NEXT: v_readfirstlane_b32 s57, v23
+; GFX9-NEXT: v_readfirstlane_b32 s12, v9
+; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s59, v6
-; GFX9-NEXT: v_readfirstlane_b32 s8, v5
+; GFX9-NEXT: v_readfirstlane_b32 s15, v3
; GFX9-NEXT: v_readfirstlane_b32 s10, v4
-; GFX9-NEXT: v_readfirstlane_b32 s42, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s61, v11
+; GFX9-NEXT: v_readfirstlane_b32 s8, v5
; GFX9-NEXT: v_readfirstlane_b32 s63, v10
-; GFX9-NEXT: v_readfirstlane_b32 s12, v9
-; GFX9-NEXT: v_readfirstlane_b32 s14, v8
; GFX9-NEXT: v_readfirstlane_b32 s47, v7
+; GFX9-NEXT: v_readfirstlane_b32 s75, v14
+; GFX9-NEXT: v_readfirstlane_b32 s13, v25
; GFX9-NEXT: v_readfirstlane_b32 s74, v30
; GFX9-NEXT: v_readfirstlane_b32 s44, v29
; GFX9-NEXT: v_readfirstlane_b32 s56, v28
; GFX9-NEXT: v_readfirstlane_b32 s62, v27
; GFX9-NEXT: v_readfirstlane_b32 s72, v26
-; GFX9-NEXT: v_readfirstlane_b32 s13, v25
-; GFX9-NEXT: v_readfirstlane_b32 s40, v24
-; GFX9-NEXT: v_readfirstlane_b32 s57, v23
; GFX9-NEXT: v_readfirstlane_b32 s60, v22
-; GFX9-NEXT: v_readfirstlane_b32 s9, v21
-; GFX9-NEXT: v_readfirstlane_b32 s11, v20
; GFX9-NEXT: v_readfirstlane_b32 s41, v19
; GFX9-NEXT: v_readfirstlane_b32 s76, v18
; GFX9-NEXT: v_readfirstlane_b32 s45, v17
; GFX9-NEXT: v_readfirstlane_b32 s58, v16
; GFX9-NEXT: v_readfirstlane_b32 s73, v15
-; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:288
-; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:284
+; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:288
+; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284
; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:172
-; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:168
-; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:164
-; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:160
-; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:156
-; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:152
-; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:148
-; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:144
-; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:140
-; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:136
-; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:132
-; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:128
-; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:124
-; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:120
-; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:116
-; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:112
-; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:108
-; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:104
-; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100
-; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:96
-; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:92
-; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:88
-; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:84
-; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:80
-; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:76
-; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:72
-; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:68
-; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
-; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:60
-; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:56
-; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52
-; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:48
-; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:44
-; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:40
-; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:36
-; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:32
-; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:28
-; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:24
-; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:20
-; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:16
-; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:12
-; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
-; GFX9-NEXT: s_waitcnt vmcnt(41)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32
-; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:320
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324
+; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:320
-; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:316
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:308
+; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:304
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312
+; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:296
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:308
-; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:304
-; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:300
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:292
+; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
+; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:280
+; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:276
+; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272
+; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:268
+; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:264
+; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:260
+; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:256
+; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:252
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:248
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280
-; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276
-; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:272
-; GFX9-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:268
-; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264
-; GFX9-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:260
-; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:256
-; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:252
-; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:248
-; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:244
-; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:240
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:244
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:240
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:236
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:232
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:228
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:224
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:220
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:216
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:212
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:208
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:204
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:200
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:196
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:192
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:188
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:184
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:180
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:176
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:168
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:164
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:160
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:156
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:152
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:188
-; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:184
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:148
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:144
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:140
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(26)
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(44)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:136
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:132
+; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:128
+; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124
+; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:120
+; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:116
+; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:112
+; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:108
+; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:104
+; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:100
+; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:96
+; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92
+; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:88
+; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:84
+; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:80
+; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:76
+; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:72
+; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:68
+; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:64
+; GFX9-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:60
+; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:56
+; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:52
+; GFX9-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:48
+; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:44
+; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:40
+; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:36
+; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:32
+; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:24
+; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16
+; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:12
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(15)
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB97_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v3, s23
-; GFX9-NEXT: v_mov_b32_e32 v0, s17
-; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11
-; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v2, s21
-; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11
-; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v1, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v24, 0xc0c0004
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v49, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s27
; GFX9-NEXT: v_mov_b32_e32 v2, s25
-; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11
-; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11
+; GFX9-NEXT: v_perm_b32 v3, s26, v3, v24
+; GFX9-NEXT: v_mov_b32_e32 v63, v55
+; GFX9-NEXT: v_mov_b32_e32 v55, v4
+; GFX9-NEXT: v_perm_b32 v2, s24, v2, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v4, s6
; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v3, s29
-; GFX9-NEXT: v_perm_b32 v4, s7, v4, v11
-; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11
+; GFX9-NEXT: v_perm_b32 v4, s7, v4, v24
+; GFX9-NEXT: v_mov_b32_e32 v33, v5
+; GFX9-NEXT: v_perm_b32 v3, s28, v3, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_mov_b32_e32 v5, s8
; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v4, s15
-; GFX9-NEXT: v_perm_b32 v5, s10, v5, v11
-; GFX9-NEXT: v_perm_b32 v4, s43, v4, v11
+; GFX9-NEXT: v_perm_b32 v5, s10, v5, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s17
+; GFX9-NEXT: v_perm_b32 v4, s43, v4, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_mov_b32_e32 v6, s12
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v23, s16, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s19
; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v5, s47
-; GFX9-NEXT: v_perm_b32 v6, s14, v6, v11
-; GFX9-NEXT: v_perm_b32 v5, s59, v5, v11
+; GFX9-NEXT: v_perm_b32 v6, s14, v6, v24
+; GFX9-NEXT: v_perm_b32 v41, s18, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v45, v44
+; GFX9-NEXT: v_mov_b32_e32 v44, v37
+; GFX9-NEXT: v_mov_b32_e32 v37, v7
+; GFX9-NEXT: v_perm_b32 v5, s59, v5, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_mov_b32_e32 v7, s42
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, s21
; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v6, s61
-; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11
-; GFX9-NEXT: v_perm_b32 v6, s63, v6, v11
+; GFX9-NEXT: v_perm_b32 v7, s46, v7, v24
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v21, s20, v41, v24
+; GFX9-NEXT: v_mov_b32_e32 v41, s23
+; GFX9-NEXT: v_perm_b32 v6, s63, v6, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_mov_b32_e32 v8, s45
+; GFX9-NEXT: v_perm_b32 v41, s22, v41, v24
; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v7, s73
-; GFX9-NEXT: v_perm_b32 v8, s58, v8, v11
-; GFX9-NEXT: v_perm_b32 v7, s75, v7, v11
+; GFX9-NEXT: v_perm_b32 v8, s58, v8, v24
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v41
+; GFX9-NEXT: v_mov_b32_e32 v41, v61
+; GFX9-NEXT: v_mov_b32_e32 v61, v47
+; GFX9-NEXT: v_mov_b32_e32 v47, v10
+; GFX9-NEXT: v_perm_b32 v7, s75, v7, v24
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_mov_b32_e32 v10, 0x6050400
; GFX9-NEXT: v_mov_b32_e32 v9, s11
; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v8, s76
; GFX9-NEXT: v_perm_b32 v9, s9, v9, v10
+; GFX9-NEXT: v_or_b32_sdwa v1, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_perm_b32 v8, s41, v8, v10
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX9-NEXT: v_mov_b32_e32 v63, v12
-; GFX9-NEXT: v_mov_b32_e32 v12, s40
+; GFX9-NEXT: v_mov_b32_e32 v20, s40
; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_mov_b32_e32 v9, s57
-; GFX9-NEXT: v_perm_b32 v12, s13, v12, v10
-; GFX9-NEXT: v_perm_b32 v9, s60, v9, v11
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v9, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v12, s72
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v13
-; GFX9-NEXT: v_mov_b32_e32 v13, s56
-; GFX9-NEXT: v_perm_b32 v12, s62, v12, v10
-; GFX9-NEXT: v_perm_b32 v10, s44, v13, v10
-; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v20, s13, v20, v10
; GFX9-NEXT: s_mov_b32 s4, 0x6050400
-; GFX9-NEXT: v_perm_b32 v11, s74, v14, v11
-; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v14, v28, v23, s5
-; GFX9-NEXT: v_perm_b32 v28, v48, v62, s5
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v12, v15, v17, s4
+; GFX9-NEXT: v_perm_b32 v9, s60, v9, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4
+; GFX9-NEXT: v_or_b32_sdwa v9, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v20, s72
+; GFX9-NEXT: v_mov_b32_e32 v21, s56
+; GFX9-NEXT: v_perm_b32 v13, s74, v13, v24
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX9-NEXT: v_perm_b32 v12, v35, v53, s4
+; GFX9-NEXT: v_perm_b32 v20, s62, v20, v10
+; GFX9-NEXT: v_perm_b32 v10, s44, v21, v10
+; GFX9-NEXT: v_or_b32_sdwa v11, v11, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX9-NEXT: v_perm_b32 v13, v20, v24, s4
+; GFX9-NEXT: v_perm_b32 v13, v26, v42, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v13, v16, v19, s4
+; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
+; GFX9-NEXT: v_perm_b32 v13, v39, v34, s4
+; GFX9-NEXT: v_or_b32_sdwa v10, v10, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v14, v18, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: v_perm_b32 v15, v27, v35, s4
-; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v15, v21, v26, s4
+; GFX9-NEXT: v_perm_b32 v20, v27, v28, s5
+; GFX9-NEXT: v_or_b32_sdwa v13, v13, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v62, v52, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v14, v14, v29, s4
+; GFX9-NEXT: v_perm_b32 v15, v15, v56, s4
+; GFX9-NEXT: v_or_b32_sdwa v14, v20, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_perm_b32 v16, v36, v31, s5
-; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v16, v30, v25, s5
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v17, v37, v29, s5
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_perm_b32 v18, v51, v39, s5
+; GFX9-NEXT: v_perm_b32 v20, v30, v31, s5
+; GFX9-NEXT: v_or_b32_sdwa v0, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v43, v38, s5
+; GFX9-NEXT: v_perm_b32 v22, v32, v16, s5
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_perm_b32 v21, v46, v60, s5
+; GFX9-NEXT: v_or_b32_sdwa v16, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v20, v57, v36, s5
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v40, v17, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_perm_b32 v19, v41, v50, s5
-; GFX9-NEXT: v_or_b32_sdwa v16, v16, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v18, v58, v53, s5
-; GFX9-NEXT: v_or_b32_sdwa v17, v17, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_perm_b32 v19, v40, v45, s5
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_or_b32_sdwa v18, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_perm_b32 v19, v46, v36, s5
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX9-NEXT: v_perm_b32 v20, v61, v57, s5
-; GFX9-NEXT: v_or_b32_sdwa v19, v19, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v20, v56, v44, s5
+; GFX9-NEXT: v_or_b32_sdwa v17, v17, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX9-NEXT: v_perm_b32 v21, v54, v55, s5
+; GFX9-NEXT: v_perm_b32 v18, v48, v18, s5
+; GFX9-NEXT: v_or_b32_sdwa v18, v20, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_perm_b32 v19, v51, v19, s5
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v51, v33
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(14)
+; GFX9-NEXT: v_perm_b32 v20, v59, v32, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v23, v58, v23, s5
+; GFX9-NEXT: v_perm_b32 v24, v47, v24, s5
+; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v58, v49
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: v_perm_b32 v20, v54, v57, s5
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: v_perm_b32 v21, v50, v21, s5
; GFX9-NEXT: v_or_b32_sdwa v20, v20, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v21, v60, v47, s5
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_perm_b32 v21, v33, v60, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX9-NEXT: v_perm_b32 v22, v43, v32, s5
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v22, v25, v22, s5
; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_mov_b32_e32 v53, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v25, v25, v26, s4
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v50, v37
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(10)
+; GFX9-NEXT: v_mov_b32_e32 v62, v30
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_mov_b32_e32 v47, v26
+; GFX9-NEXT: v_perm_b32 v26, v44, v26, s5
; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v22, v52, v59, s5
+; GFX9-NEXT: v_mov_b32_e32 v42, v29
+; GFX9-NEXT: v_mov_b32_e32 v44, v45
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v22, v37, v22, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v27, v26, s5
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v23, v38, v37, s5
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v24, v42, v24, s5
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v22, v22, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v27, v49, v27, s4
-; GFX9-NEXT: v_mov_b32_e32 v49, v48
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v25, v25, v61, s4
+; GFX9-NEXT: v_mov_b32_e32 v61, v41
+; GFX9-NEXT: v_mov_b32_e32 v37, v28
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v23, v38, v50, s5
+; GFX9-NEXT: v_mov_b32_e32 v38, v33
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v56, v54
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v23, v55, v23, s5
; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX9-NEXT: v_or_b32_sdwa v23, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v55, v63
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v24, v42, v46, s4
+; GFX9-NEXT: v_perm_b32 v24, v24, v49, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v40, v25, s4
+; GFX9-NEXT: v_perm_b32 v25, v25, v41, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v26, v33, v34, s4
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v26, v45, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v45, v31
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v54, v41, v54, s5
+; GFX9-NEXT: v_mov_b32_e32 v52, v41
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v27, v27, v63, s4
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v53, v28
+; GFX9-NEXT: v_perm_b32 v28, v29, v28, s5
; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v35, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v39, v29
; GFX9-NEXT: v_perm_b32 v28, v28, v29, s4
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v29, v30, v29, s4
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v34, v29
+; GFX9-NEXT: v_perm_b32 v29, v29, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_perm_b32 v29, v51, v39, s4
+; GFX9-NEXT: v_perm_b32 v29, v46, v59, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_mov_b32_e32 v63, v30
; GFX9-NEXT: v_perm_b32 v30, v31, v30, s5
; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v30, v35, v30, s4
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_mov_b32_e32 v49, v30
+; GFX9-NEXT: v_perm_b32 v30, v43, v30, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v31, v33, v31, s4
+; GFX9-NEXT: v_mov_b32_e32 v36, v31
+; GFX9-NEXT: v_perm_b32 v31, v31, v33, s4
; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v63, v31
-; GFX9-NEXT: v_perm_b32 v31, v31, v34, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v62, v33
-; GFX9-NEXT: v_perm_b32 v33, v48, v33, s5
-; GFX9-NEXT: v_or_b32_sdwa v31, v31, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_mov_b32_e32 v33, v31
+; GFX9-NEXT: v_perm_b32 v31, v40, v31, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX9-NEXT: v_or_b32_sdwa v31, v31, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_mov_b64 s[4:5], 0
-; GFX9-NEXT: v_mov_b32_e32 v48, v42
+; GFX9-NEXT: v_mov_b32_e32 v54, v40
; GFX9-NEXT: s_branch .LBB97_3
; GFX9-NEXT: .LBB97_2:
-; GFX9-NEXT: v_mov_b32_e32 v33, v58
-; GFX9-NEXT: v_mov_b32_e32 v58, v40
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v46
-; GFX9-NEXT: v_mov_b32_e32 v36, v52
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: v_mov_b32_e32 v49, v3
-; GFX9-NEXT: v_mov_b32_e32 v63, v1
-; GFX9-NEXT: v_mov_b32_e32 v62, v2
+; GFX9-NEXT: v_mov_b32_e32 v48, v54
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v52, v0
+; GFX9-NEXT: v_mov_b32_e32 v56, v20
+; GFX9-NEXT: v_mov_b32_e32 v62, v8
+; GFX9-NEXT: v_mov_b32_e32 v42, v9
+; GFX9-NEXT: v_mov_b32_e32 v34, v6
+; GFX9-NEXT: v_mov_b32_e32 v38, v1
+; GFX9-NEXT: v_mov_b32_e32 v53, v24
+; GFX9-NEXT: v_mov_b32_e32 v36, v21
+; GFX9-NEXT: v_mov_b32_e32 v39, v33
+; GFX9-NEXT: v_mov_b32_e32 v33, v63
+; GFX9-NEXT: v_mov_b32_e32 v63, v22
+; GFX9-NEXT: v_mov_b32_e32 v37, v2
+; GFX9-NEXT: v_mov_b32_e32 v35, v23
+; GFX9-NEXT: v_mov_b32_e32 v58, v3
+; GFX9-NEXT: v_mov_b32_e32 v50, v7
+; GFX9-NEXT: v_mov_b32_e32 v51, v5
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: v_mov_b32_e32 v53, v33
; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT: .LBB97_3: ; %Flow
@@ -195621,23 +197055,48 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB97_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v0, v0, v62, s5
+; GFX9-NEXT: v_perm_b32 v0, v0, v56, s5
; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v34
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v33
; GFX9-NEXT: s_movk_i32 s4, 0x300
-; GFX9-NEXT: v_perm_b32 v0, v0, v63, s5
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_perm_b32 v0, v0, v54, s5
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: s_add_i32 s74, s74, 3
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_add_i32 s72, s72, 3
-; GFX9-NEXT: s_add_i32 s56, s56, 3
-; GFX9-NEXT: s_add_i32 s60, s60, 3
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
+; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
+; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v49
+; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v0, v0, v43, s5
+; GFX9-NEXT: v_add_u32_sdwa v38, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
+; GFX9-NEXT: v_perm_b32 v0, v0, v63, s5
+; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v59
+; GFX9-NEXT: v_perm_b32 v0, v0, v46, s5
+; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v62
+; GFX9-NEXT: v_perm_b32 v0, v0, v34, s5
+; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
+; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
+; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v42
+; GFX9-NEXT: v_perm_b32 v0, v0, v53, s5
+; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v37
+; GFX9-NEXT: s_add_i32 s74, s74, 3
+; GFX9-NEXT: s_add_i32 s72, s72, 3
+; GFX9-NEXT: s_add_i32 s56, s56, 3
+; GFX9-NEXT: s_add_i32 s60, s60, 3
; GFX9-NEXT: s_add_i32 s40, s40, 3
; GFX9-NEXT: s_add_i32 s76, s76, 3
; GFX9-NEXT: s_add_i32 s11, s11, 3
@@ -195659,260 +197118,219 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v33, s17
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: v_mov_b32_e32 v34, s19
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v35, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v55
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v39
-; GFX9-NEXT: v_perm_b32 v0, v0, v51, s5
-; GFX9-NEXT: v_add_u32_sdwa v35, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v44
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
+; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v26, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v27, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v28, v35, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v29, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v30, v38, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_add_u32_sdwa v39, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v24, v39, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v31, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0
+; GFX9-NEXT: v_add_u32_sdwa v63, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v23, v63, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v40, s5
-; GFX9-NEXT: v_add_u32_sdwa v29, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v50
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v46
-; GFX9-NEXT: v_perm_b32 v0, v0, v48, s5
-; GFX9-NEXT: v_add_u32_sdwa v27, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_sdwa v49, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_or_b32_sdwa v22, v49, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v38
-; GFX9-NEXT: v_perm_b32 v0, v0, v50, s5
-; GFX9-NEXT: v_add_u32_sdwa v25, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v51
+; GFX9-NEXT: v_perm_b32 v0, v0, v60, s5
+; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: v_perm_b32 v0, v0, v37, s5
-; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v52
-; GFX9-NEXT: v_perm_b32 v0, v0, v59, s5
-; GFX9-NEXT: v_add_u32_sdwa v23, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v43
-; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
-; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v60
-; GFX9-NEXT: v_perm_b32 v0, v0, v47, s5
-; GFX9-NEXT: v_add_u32_sdwa v21, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v54
-; GFX9-NEXT: v_perm_b32 v0, v0, v55, s5
+; GFX9-NEXT: v_or_b32_sdwa v21, v50, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v56
-; GFX9-NEXT: v_perm_b32 v0, v0, v44, s5
-; GFX9-NEXT: v_add_u32_sdwa v50, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v61
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v48
; GFX9-NEXT: v_perm_b32 v0, v0, v57, s5
-; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v45
-; GFX9-NEXT: v_perm_b32 v0, v0, v36, s5
-; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v58
-; GFX9-NEXT: v_perm_b32 v0, v0, v41, s5
-; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v53
+; GFX9-NEXT: v_add_u32_sdwa v51, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v20, v51, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: v_add_u32_sdwa v53, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v21, v21, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v22, v23, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v24, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_or_b32_sdwa v23, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v25, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: v_perm_b32 v0, v0, v32, s5
+; GFX9-NEXT: v_add_u32_sdwa v52, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: v_or_b32_sdwa v18, v53, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_or_b32_sdwa v19, v52, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: v_or_b32_sdwa v20, v50, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: v_add_u32_sdwa v62, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: v_or_b32_sdwa v18, v62, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v29, v35, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_or_b32_sdwa v26, v31, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v54, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v17, v54, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_or_b32_sdwa v28, v28, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_or_b32_sdwa v30, v31, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v55, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v16, v55, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v40, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v15, v40, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v41, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v14, v41, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_sdwa v42, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; GFX9-NEXT: v_or_b32_sdwa v13, v42, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_add_u32_e32 v0, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v0, v1, s5
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; GFX9-NEXT: v_add_u32_e32 v1, 3, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v1, v0, s5
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; GFX9-NEXT: v_add_u32_sdwa v43, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0
@@ -195923,10 +197341,12 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0
; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_add_u32_e32 v1, 3, v1
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s5
+; GFX9-NEXT: v_add_u32_e32 v2, 3, v1
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s5
; GFX9-NEXT: v_add_u32_sdwa v44, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_mov_b32_e32 v1, s62
; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0
@@ -195986,8 +197406,8 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1
; GFX9-NEXT: v_or_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0
; GFX9-NEXT: v_add_u32_sdwa v0, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -198978,457 +200398,441 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
+; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v28
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v22
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v30
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v24
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v20
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v17
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v17
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: s_waitcnt vmcnt(7)
-; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v54
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(6)
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v53
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v54
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v53
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v16
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v14
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v13
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v12
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v12
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v11
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v10
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v9
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v8
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v8
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v6
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v31, v7
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v10
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v11
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v12
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v13
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v14
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v15
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, v8
-; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v16
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v16
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v15
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v14
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v13
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v12
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v11
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v10
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v10
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v8
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v7
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v6
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v6
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v5
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, v7
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
; VI-NEXT: v_mov_b32_e32 v7, v5
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v6
-; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
; VI-NEXT: v_lshrrev_b32_e32 v5, 24, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, v3
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v3, v2
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v53
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v54
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v3, v2
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[53:54]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: v_mov_b32_e32 v9, v10
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v11
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v12
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v13
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v19
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v14
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v20
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v15
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v17
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v16
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v18
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v30
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v17
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v9, v8
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v7, v6
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, v4
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v45
+; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v30
+; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v52, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v17
+; VI-NEXT: v_mov_b32_e32 v45, v1
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr5
@@ -199449,646 +200853,634 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v39, 3
-; VI-NEXT: v_add_u16_sdwa v46, v18, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_mov_b32_e32 v35, 3
+; VI-NEXT: v_add_u16_sdwa v33, v18, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v31, 3, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v46
-; VI-NEXT: v_add_u16_sdwa v50, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33
+; VI-NEXT: v_add_u16_sdwa v55, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v18, v31, v18
; VI-NEXT: v_add_u16_e32 v31, 3, v17
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v50
-; VI-NEXT: v_add_u16_sdwa v59, v20, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v55
+; VI-NEXT: v_add_u16_sdwa v50, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v17, v31, v17
; VI-NEXT: v_add_u16_e32 v31, 3, v20
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v59
-; VI-NEXT: v_add_u16_sdwa v49, v19, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v50
+; VI-NEXT: v_add_u16_sdwa v49, v19, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v20, v31, v20
; VI-NEXT: v_add_u16_e32 v31, 3, v19
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v49
-; VI-NEXT: v_add_u16_sdwa v57, v22, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v62, v22, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v19, v31, v19
; VI-NEXT: v_add_u16_e32 v31, 3, v22
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v57
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v62
+; VI-NEXT: v_add_u16_sdwa v63, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v22, v31, v22
; VI-NEXT: v_add_u16_e32 v31, 3, v21
-; VI-NEXT: v_add_u16_sdwa v21, v21, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_add_u16_sdwa v61, v24, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v63
+; VI-NEXT: v_add_u16_sdwa v60, v24, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v21, v31, v21
; VI-NEXT: v_add_u16_e32 v31, 3, v24
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v61
-; VI-NEXT: v_add_u16_sdwa v63, v23, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v60
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v24, v31, v24
; VI-NEXT: v_add_u16_e32 v31, 3, v23
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v63
-; VI-NEXT: v_add_u16_sdwa v51, v26, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v23, v23, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_add_u16_sdwa v58, v26, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v23, v31, v23
; VI-NEXT: v_add_u16_e32 v31, 3, v26
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v51
-; VI-NEXT: v_add_u16_sdwa v62, v25, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v58
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v26, v31, v26
; VI-NEXT: v_add_u16_e32 v31, 3, v25
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v62
-; VI-NEXT: v_add_u16_sdwa v56, v28, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v25, v25, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_add_u16_sdwa v47, v28, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v25, v31, v25
; VI-NEXT: v_add_u16_e32 v31, 3, v28
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v56
-; VI-NEXT: v_add_u16_sdwa v48, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v28, v31, v28
; VI-NEXT: v_add_u16_e32 v31, 3, v27
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v48
-; VI-NEXT: v_add_u16_sdwa v60, v30, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v27, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_add_u16_sdwa v34, v30, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v27, v31, v27
; VI-NEXT: v_add_u16_e32 v31, 3, v30
; VI-NEXT: v_add_u16_e32 v32, 3, v29
-; VI-NEXT: v_add_u16_sdwa v52, v29, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v60
-; VI-NEXT: v_or_b32_e32 v30, v31, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v52
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v29, v29, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v34
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v30, v31, v30
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_add_u16_sdwa v57, v54, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v31, v53, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v29, v32, v29
-; VI-NEXT: v_add_u16_e32 v32, 3, v54
-; VI-NEXT: v_add_u16_sdwa v54, v54, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_sdwa v33, v53, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v54
-; VI-NEXT: v_add_u16_e32 v34, 3, v53
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v32, v32, v31
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v33
-; VI-NEXT: v_add_u16_sdwa v58, v2, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v31, v34, v31
-; VI-NEXT: v_add_u16_e32 v33, 3, v2
-; VI-NEXT: v_add_u16_e32 v34, 3, v1
-; VI-NEXT: v_add_u16_sdwa v53, v1, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v2, v33, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v53
-; VI-NEXT: v_add_u16_sdwa v33, v4, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v1, v34, v1
-; VI-NEXT: v_add_u16_e32 v34, 3, v4
-; VI-NEXT: v_add_u16_e32 v35, 3, v3
-; VI-NEXT: v_add_u16_sdwa v45, v3, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v4, v34, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v45
-; VI-NEXT: v_add_u16_sdwa v34, v6, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v3, v35, v3
-; VI-NEXT: v_add_u16_e32 v35, 3, v6
-; VI-NEXT: v_add_u16_e32 v36, 3, v5
-; VI-NEXT: v_add_u16_sdwa v47, v5, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v34
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v6, v35, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v47
-; VI-NEXT: v_add_u16_sdwa v35, v8, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v5, v36, v5
-; VI-NEXT: v_add_u16_e32 v37, 3, v8
-; VI-NEXT: v_add_u16_e32 v36, 3, v7
-; VI-NEXT: v_add_u16_sdwa v41, v7, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
-; VI-NEXT: v_or_b32_e32 v8, v37, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v41
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v7, v36, v7
-; VI-NEXT: v_add_u16_sdwa v36, v10, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v37, 3, v10
-; VI-NEXT: v_add_u16_e32 v38, 3, v9
-; VI-NEXT: v_add_u16_sdwa v40, v9, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; VI-NEXT: v_add_u16_e32 v36, 3, v54
+; VI-NEXT: v_add_u16_e32 v37, 3, v53
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v57
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_add_u16_sdwa v48, v2, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v32, v36, v32
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v37, v31
+; VI-NEXT: v_add_u16_e32 v37, 3, v2
+; VI-NEXT: v_add_u16_e32 v38, 3, v1
+; VI-NEXT: v_add_u16_sdwa v36, v1, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_or_b32_e32 v2, v37, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v1, v38, v1
+; VI-NEXT: v_add_u16_sdwa v38, v4, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v37, 3, v4
+; VI-NEXT: v_add_u16_e32 v39, 3, v3
+; VI-NEXT: v_add_u16_sdwa v36, v3, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v10, v37, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v40
-; VI-NEXT: v_add_u16_sdwa v37, v12, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v9, v38, v9
-; VI-NEXT: v_add_u16_e32 v55, 3, v12
-; VI-NEXT: v_add_u16_e32 v38, 3, v11
-; VI-NEXT: v_add_u16_sdwa v42, v11, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
-; VI-NEXT: v_or_b32_e32 v12, v55, v11
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v42
-; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v11, v38, v11
-; VI-NEXT: v_add_u16_sdwa v38, v14, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v44, 3, v14
-; VI-NEXT: v_add_u16_e32 v55, 3, v13
-; VI-NEXT: v_add_u16_sdwa v42, v13, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v38
-; VI-NEXT: v_or_b32_e32 v14, v44, v13
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v42
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v13, v55, v13
-; VI-NEXT: v_add_u16_sdwa v55, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_sdwa v44, v15, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v16, 3, v16
-; VI-NEXT: v_add_u16_e32 v43, 3, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v55
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v16, v16, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v44
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v43, v15
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v16
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v15
-; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11
-; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
-; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7
-; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5
-; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v4, v37, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; VI-NEXT: v_add_u16_sdwa v37, v6, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v3, v39, v3
+; VI-NEXT: v_add_u16_e32 v39, 3, v6
+; VI-NEXT: v_add_u16_e32 v51, 3, v5
+; VI-NEXT: v_add_u16_sdwa v36, v5, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; VI-NEXT: v_or_b32_e32 v6, v39, v5
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v36
+; VI-NEXT: v_add_u16_sdwa v36, v8, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v5, v51, v5
+; VI-NEXT: v_add_u16_e32 v51, 3, v8
+; VI-NEXT: v_add_u16_e32 v39, 3, v7
+; VI-NEXT: v_add_u16_sdwa v8, v7, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v36
+; VI-NEXT: v_or_b32_e32 v53, v51, v7
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; VI-NEXT: v_or_b32_e32 v52, v39, v7
+; VI-NEXT: v_add_u16_sdwa v7, v10, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v39, 3, v10
+; VI-NEXT: v_add_u16_sdwa v10, v9, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v7
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v51, 3, v9
+; VI-NEXT: v_or_b32_e32 v9, v39, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v8, v51, v8
+; VI-NEXT: v_add_u16_sdwa v51, v12, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v54, 3, v12
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v51
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v39, 3, v11
+; VI-NEXT: v_add_u16_sdwa v12, v11, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v11, v54, v10
+; VI-NEXT: v_add_u16_sdwa v54, v14, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; VI-NEXT: v_add_u16_e32 v40, 3, v14
+; VI-NEXT: v_add_u16_sdwa v14, v13, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v54
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v10, v39, v10
+; VI-NEXT: v_add_u16_e32 v39, 3, v13
+; VI-NEXT: v_or_b32_e32 v13, v40, v12
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v14
+; VI-NEXT: v_add_u16_sdwa v44, v16, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v12, v39, v12
+; VI-NEXT: v_add_u16_sdwa v35, v15, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v39, 3, v16
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v44
+; VI-NEXT: v_add_u16_e32 v16, 3, v15
+; VI-NEXT: v_or_b32_e32 v15, v39, v14
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v35
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v14, v16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v15
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v14
+; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[14:15]
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v13
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v12
+; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[12:13]
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v11
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v10
+; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[10:11]
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v9
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[8:9]
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v53
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v52
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[52:53]
+; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v6
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v5
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[31:32]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v31, v44
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v55, 8, 8
+; VI-NEXT: v_mov_b32_e32 v32, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v31, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v32, 8, 8
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v35, v7
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v51, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v35, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v36, 8, 8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v38, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v1, v37, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v36, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v35, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v34, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v33, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v58, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v54, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v56, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v38, 8, 8
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v48, 8, 8
+; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v57, 8, 8
+; VI-NEXT: v_mov_b32_e32 v45, v58
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v47, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v45, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v60, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v17
+; VI-NEXT: v_bfe_u32 v58, v34, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v62, 8, 8
+; VI-NEXT: v_bfe_u32 v46, v50, 8, 8
+; VI-NEXT: v_bfe_u32 v52, v33, 8, 8
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v51, 8, 8
-; VI-NEXT: v_mov_b32_e32 v39, v41
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
-; VI-NEXT: v_mov_b32_e32 v41, v45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
-; VI-NEXT: v_mov_b32_e32 v61, v57
-; VI-NEXT: v_mov_b32_e32 v57, v59
-; VI-NEXT: v_bfe_u32 v45, v59, 8, 8
-; VI-NEXT: v_mov_b32_e32 v59, v46
-; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v17
-; VI-NEXT: v_bfe_u32 v60, v60, 8, 8
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
-; VI-NEXT: v_mov_b32_e32 v46, v53
-; VI-NEXT: v_bfe_u32 v56, v59, 8, 8
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: .LBB98_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_perm_b32 v1, v46, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_perm_b32 v5, v5, v6, s4
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_perm_b32 v1, v1, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_perm_b32 v2, v41, v2, s4
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_perm_b32 v2, v2, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(10)
-; VI-NEXT: v_perm_b32 v3, v47, v3, s4
-; VI-NEXT: s_waitcnt vmcnt(8)
-; VI-NEXT: v_perm_b32 v4, v39, v4, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v6, v6, v7, s4
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_perm_b32 v11, v11, v12, s4
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: v_or_b32_e32 v1, v11, v1
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v39, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v6, v6, v7, s4
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v7, v7, v8, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v5, v40, v5, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_perm_b32 v10, v49, v31, s4
-; VI-NEXT: v_perm_b32 v7, v42, v7, s4
-; VI-NEXT: v_perm_b32 v8, v44, v8, s4
-; VI-NEXT: v_perm_b32 v9, v50, v9, s4
+; VI-NEXT: v_perm_b32 v10, v49, v43, s4
+; VI-NEXT: v_perm_b32 v8, v8, v9, s4
+; VI-NEXT: v_perm_b32 v9, v55, v44, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v11, s4
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v58, v11, s4
+; VI-NEXT: v_perm_b32 v11, v48, v11, s4
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; VI-NEXT: v_or_b32_e32 v1, v1, v11
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v11, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v33, v2, s4
+; VI-NEXT: v_perm_b32 v2, v38, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v34, v2, s4
+; VI-NEXT: v_perm_b32 v2, v37, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v35, v2, s4
+; VI-NEXT: v_perm_b32 v2, v36, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v36, v2, s4
+; VI-NEXT: v_perm_b32 v2, v35, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v37, v2, s4
+; VI-NEXT: v_perm_b32 v2, v51, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v38, v2, s4
+; VI-NEXT: v_perm_b32 v2, v32, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v55, v2, s4
+; VI-NEXT: v_perm_b32 v2, v31, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v43, s4
+; VI-NEXT: v_perm_b32 v1, v1, v61, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v59, v56, s4
+; VI-NEXT: v_perm_b32 v2, v33, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v32, s4
+; VI-NEXT: v_perm_b32 v1, v1, v59, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v56, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v57, v45, s4
+; VI-NEXT: v_perm_b32 v2, v50, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v63, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v61, v2, s4
+; VI-NEXT: v_perm_b32 v2, v62, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v63, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v60, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v62, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v51, v2, s4
+; VI-NEXT: v_perm_b32 v2, v45, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v48, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v47, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v52, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v60, s4
+; VI-NEXT: v_perm_b32 v2, v34, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v1, v2, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v57, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -200133,837 +201525,905 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; kill: killed $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr61
; GFX9-NEXT: ; implicit-def: $vgpr60
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr56
; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; kill: killed $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr39
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr48
+; GFX9-NEXT: ; implicit-def: $vgpr37
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(13)
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(33)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB98_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(22)
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30
-; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30
-; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29
-; GFX9-NEXT: v_mov_b32_e32 v43, v54
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(58)
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v18
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v17
+; GFX9-NEXT: v_mov_b32_e32 v34, v41
+; GFX9-NEXT: v_mov_b32_e32 v33, v40
; GFX9-NEXT: .LBB98_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB98_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
+; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
+; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
; GFX9-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: s_waitcnt vmcnt(46)
; GFX9-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
; GFX9-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
+; GFX9-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32
-; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31
-; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30
-; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29
-; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
-; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27
-; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26
-; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25
-; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24
-; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24
-; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23
-; GFX9-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22
-; GFX9-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2
; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22
-; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v1
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v17
; GFX9-NEXT: .LBB98_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
-; GFX9-NEXT: v_perm_b32 v33, v62, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v55, v63, v42, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1
-; GFX9-NEXT: v_perm_b32 v39, v39, v53, s4
-; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
-; GFX9-NEXT: v_perm_b32 v3, v3, v44, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v61, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v60, s4
-; GFX9-NEXT: v_perm_b32 v37, v37, v54, s4
-; GFX9-NEXT: v_perm_b32 v17, v17, v59, s4
-; GFX9-NEXT: v_perm_b32 v18, v18, v58, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v40, v41, v40, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v52, v41, v52, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v8, v8, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v51, v41, v51, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v10, v10, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v50, v41, v50, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v49, v41, v49, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v41, v2, v62, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4
+; GFX9-NEXT: v_perm_b32 v11, v11, v50, s4
+; GFX9-NEXT: v_perm_b32 v10, v10, v51, s4
+; GFX9-NEXT: v_perm_b32 v3, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v59, s4
+; GFX9-NEXT: v_perm_b32 v5, v5, v58, s4
+; GFX9-NEXT: v_perm_b32 v6, v6, v56, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v46, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v43, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v38, s4
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4
+; GFX9-NEXT: v_perm_b32 v33, v33, v40, s4
+; GFX9-NEXT: v_perm_b32 v40, v1, v63, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v60, v60, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v57, v57, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v45, v45, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v53, v53, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v39, v49, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v49, v1, v49, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v48, v41, v48, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v50, v1, v50, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v41, s4
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v41, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v48, v48, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v36, v36, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v40
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v53, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v41
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v1, v60, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v1, v57, 16, v5
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v7
+; GFX9-NEXT: v_lshl_or_b32 v1, v45, 16, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11
+; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v13
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15
+; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v15
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v35, v34, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v43, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v17
+; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v17
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: v_perm_b32 v1, v38, v36, s4
+; GFX9-NEXT: v_perm_b32 v1, v35, v34, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v1, v19, v57, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v19, v47, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: v_perm_b32 v1, v20, v56, s4
+; GFX9-NEXT: v_perm_b32 v1, v20, v44, s4
+; GFX9-NEXT: v_perm_b32 v2, v42, v55, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v21, v47, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v21, v54, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v46, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v52, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v22, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v23, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v24, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; GFX9-NEXT: v_perm_b32 v2, v25, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v3, v26, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v1, s4
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v28, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v29, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v30, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v31, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
+; GFX9-NEXT: v_perm_b32 v3, v32, v1, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
@@ -200987,60 +202447,56 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-LABEL: bitcast_v64i16_to_v128i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Spill
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:96
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:92
-; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:88
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:88
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:84
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:80
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:76
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:72
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:68
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:64
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:60
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:56
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:52
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:48
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:44
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:40
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:36
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:32
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:28
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:24
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:20
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:16
; GFX11-TRUE16-NEXT: ; meta instruction
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
@@ -201083,26 +202539,26 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
@@ -201138,17 +202594,22 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB98_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[7:8]
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v38.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[1:2]
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
@@ -201185,11 +202646,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v32
@@ -201213,25 +202674,22 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v50.l
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[17:18]
@@ -201324,11 +202782,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v32
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v32
@@ -201352,64 +202810,64 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 16, v24
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 16, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 16, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 16, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v17
; GFX11-TRUE16-NEXT: .LBB98_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v45, v67, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v46, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v41, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v63, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v61, v60, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v179, v66, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v1
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v179, v66, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v1
; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v178, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v176, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v3
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v176, v166, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v161, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v161, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v66, 16, v3
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v149, v148, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v65, v149, v148, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v146, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v55, v135, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v64, v135, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v134, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v64, v132, v131, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v35, 16, v4
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v39, 16, v5
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v50, 16, v6
+; GFX11-TRUE16-NEXT: v_perm_b32 v66, v132, v131, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v50, 16, v4
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v55, 16, v5
; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v119, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v117, v52, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v50, v117, v52, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v115, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v39, v113, v103, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v52, v113, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v101, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v50, v99, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v51, v99, v51, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v98, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v51, v97, v96, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v55, 16, v7
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
+; GFX11-TRUE16-NEXT: v_perm_b32 v55, v97, v96, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v65, 16, v6
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v64, 16, v7
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v66, 16, v8
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v35, 16, v9
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v39, 16, v10
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v50, 16, v11
-; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v51, 16, v12
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v50, 16, v9
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v52, 16, v10
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v51, 16, v11
+; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v55, 16, v12
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v13, v87, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v86, v48, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v14, v85, 0xc0c0004
@@ -201418,30 +202876,30 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v81, v36, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v16, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v71, v70, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v77, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v76, v68, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v17, v75, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v74, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v75, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v74, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v72, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v63, v54, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v61, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v58, v53, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v57, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v56, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v18, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v39, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v19, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v57, v54, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v20, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v47, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v21, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v44, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v22, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v42, v41, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v44, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v42, v49, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v23, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v17, v24, v183, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v18, v181, v180, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v25, v177, 0xc0c0004
@@ -201478,77 +202936,71 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x15 ; 88-byte Folded Reload
-; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:96
+; GFX11-TRUE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:88
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v64i16_to_v128i8:
; GFX11-FAKE16: ; %bb.0:
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Spill
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:92
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:88
-; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:84
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16
; GFX11-FAKE16-NEXT: ; meta instruction
-; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12
; GFX11-FAKE16-NEXT: s_clause 0x2
; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
@@ -201600,31 +203052,31 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
@@ -201657,6 +203109,143 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB98_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v51, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-FAKE16-NEXT: .LBB98_2: ; %Flow
+; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
+; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB98_4
+; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
@@ -201668,146 +203257,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
-; GFX11-FAKE16-NEXT: .LBB98_2: ; %Flow
-; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB98_4
-; GFX11-FAKE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v16
@@ -201867,49 +203320,50 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v17
; GFX11-FAKE16-NEXT: .LBB98_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v161, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v149, v147, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v145, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v52, v134, v52, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v132, v131, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v161, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v149, v147, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v131, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v55, 16, v1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v64, 16, v2
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v128, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v119, v118, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v55, v119, v118, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v114, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v114, v113, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v4
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7
; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v36, v103, v36, 0xc0c0004
@@ -201918,17 +203372,16 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v99, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v35, v98, v35, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v97, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v96, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v96, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v55, 16, v6
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v64, 16, v8
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v36, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v48, 16, v12
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v86, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v85, v34, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v84, 0xc0c0004
@@ -201937,33 +203390,33 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: v_perm_b32 v10, v80, v33, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v71, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v76, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v75, v67, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v74, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v51, v67, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v74, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v73, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v62, v66, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v61, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v60, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v57, v65, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v47, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v72, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v61, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v59, v58, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v56, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v46, v45, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v44, v54, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v42, v41, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v43, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v41, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v183, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v181, v180, 0xc0c0004
@@ -201997,28 +203450,26 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
-; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Reload
-; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:12
-; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:16
-; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:20
-; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:24
-; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:28
-; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:32
-; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:36
-; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:40
-; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:44
-; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:48
-; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:52
-; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:56
-; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:60
-; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:64
-; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:68
-; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:72
-; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:76
-; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:80
-; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:84
-; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:88
-; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:92
+; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload
+; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12
+; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16
+; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20
+; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24
+; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28
+; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36
+; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40
+; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44
+; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48
+; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52
+; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56
+; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60
+; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64
+; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
@@ -202084,475 +203535,460 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v20, s99, 33
; SI-NEXT: v_writelane_b32 v20, s30, 34
; SI-NEXT: v_writelane_b32 v20, s31, 35
-; SI-NEXT: s_lshr_b32 s7, s25, 16
-; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s6, s23, 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_writelane_b32 v21, s7, 0
-; SI-NEXT: s_lshr_b32 s9, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s6, 1
-; SI-NEXT: s_lshr_b32 s8, s19, 16
-; SI-NEXT: v_writelane_b32 v21, s9, 2
-; SI-NEXT: s_lshr_b32 s11, s17, 16
-; SI-NEXT: v_writelane_b32 v21, s8, 3
-; SI-NEXT: v_writelane_b32 v21, s11, 4
-; SI-NEXT: v_writelane_b32 v21, s17, 5
+; SI-NEXT: v_readfirstlane_b32 s34, v16
+; SI-NEXT: s_lshr_b32 s4, s34, 16
+; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
+; SI-NEXT: v_readfirstlane_b32 s88, v12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v22, s4, 0
+; SI-NEXT: s_lshr_b32 s4, s88, 16
+; SI-NEXT: v_writelane_b32 v22, s4, 1
+; SI-NEXT: v_writelane_b32 v22, s19, 2
; SI-NEXT: s_lshr_b32 s5, s16, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 6
-; SI-NEXT: s_lshr_b32 s10, s18, 16
-; SI-NEXT: v_writelane_b32 v21, s5, 7
-; SI-NEXT: s_lshr_b32 s12, s20, 16
-; SI-NEXT: v_writelane_b32 v21, s10, 8
-; SI-NEXT: s_lshr_b32 s13, s22, 16
-; SI-NEXT: v_writelane_b32 v21, s12, 9
-; SI-NEXT: s_lshr_b32 s14, s24, 16
-; SI-NEXT: v_writelane_b32 v21, s13, 10
-; SI-NEXT: s_lshr_b32 s15, s26, 16
-; SI-NEXT: v_writelane_b32 v21, s14, 11
-; SI-NEXT: s_lshr_b32 s40, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s51, v1
-; SI-NEXT: v_writelane_b32 v21, s15, 12
+; SI-NEXT: v_writelane_b32 v22, s18, 3
+; SI-NEXT: v_writelane_b32 v22, s5, 4
+; SI-NEXT: v_writelane_b32 v22, s21, 5
+; SI-NEXT: s_lshr_b32 s6, s18, 16
+; SI-NEXT: v_writelane_b32 v22, s20, 6
+; SI-NEXT: v_writelane_b32 v22, s6, 7
+; SI-NEXT: v_writelane_b32 v22, s23, 8
+; SI-NEXT: s_lshr_b32 s7, s20, 16
+; SI-NEXT: v_writelane_b32 v22, s22, 9
+; SI-NEXT: s_lshr_b32 s8, s22, 16
+; SI-NEXT: v_writelane_b32 v22, s7, 10
+; SI-NEXT: v_writelane_b32 v22, s8, 11
+; SI-NEXT: s_lshr_b32 s9, s24, 16
+; SI-NEXT: v_writelane_b32 v22, s27, 12
+; SI-NEXT: s_lshr_b32 s10, s26, 16
+; SI-NEXT: v_writelane_b32 v22, s9, 13
+; SI-NEXT: s_lshr_b32 s11, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s52, v1
+; SI-NEXT: v_writelane_b32 v22, s10, 14
; SI-NEXT: v_readfirstlane_b32 s80, v3
-; SI-NEXT: s_lshr_b32 s41, s51, 16
-; SI-NEXT: v_writelane_b32 v21, s40, 13
-; SI-NEXT: v_readfirstlane_b32 s31, v5
-; SI-NEXT: s_lshr_b32 s42, s80, 16
-; SI-NEXT: v_writelane_b32 v21, s41, 14
+; SI-NEXT: s_lshr_b32 s12, s52, 16
+; SI-NEXT: v_writelane_b32 v22, s11, 15
+; SI-NEXT: v_readfirstlane_b32 s74, v5
+; SI-NEXT: s_lshr_b32 s13, s80, 16
+; SI-NEXT: v_writelane_b32 v22, s12, 16
; SI-NEXT: v_readfirstlane_b32 s84, v7
-; SI-NEXT: s_lshr_b32 s72, s31, 16
-; SI-NEXT: v_writelane_b32 v21, s42, 15
+; SI-NEXT: s_lshr_b32 s14, s74, 16
+; SI-NEXT: v_writelane_b32 v22, s13, 17
; SI-NEXT: v_readfirstlane_b32 s87, v9
-; SI-NEXT: s_lshr_b32 s74, s84, 16
-; SI-NEXT: v_writelane_b32 v21, s72, 16
-; SI-NEXT: v_readfirstlane_b32 s36, v11
-; SI-NEXT: s_lshr_b32 s78, s87, 16
-; SI-NEXT: v_writelane_b32 v21, s74, 17
-; SI-NEXT: v_readfirstlane_b32 s39, v13
-; SI-NEXT: s_lshr_b32 s88, s36, 16
-; SI-NEXT: v_writelane_b32 v21, s78, 18
-; SI-NEXT: v_readfirstlane_b32 s50, v18
-; SI-NEXT: v_readfirstlane_b32 s52, v17
-; SI-NEXT: v_readfirstlane_b32 s48, v16
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v15
-; SI-NEXT: v_readfirstlane_b32 s37, v14
-; SI-NEXT: s_lshr_b32 s90, s39, 16
-; SI-NEXT: v_readfirstlane_b32 s34, v12
+; SI-NEXT: s_lshr_b32 s15, s84, 16
+; SI-NEXT: v_writelane_b32 v22, s14, 18
+; SI-NEXT: v_readfirstlane_b32 s90, v11
+; SI-NEXT: s_lshr_b32 s72, s87, 16
+; SI-NEXT: v_writelane_b32 v22, s15, 19
+; SI-NEXT: v_readfirstlane_b32 s30, v13
+; SI-NEXT: s_lshr_b32 s76, s90, 16
+; SI-NEXT: v_writelane_b32 v22, s72, 20
+; SI-NEXT: v_readfirstlane_b32 s48, v18
+; SI-NEXT: v_readfirstlane_b32 s50, v17
+; SI-NEXT: v_readfirstlane_b32 s38, v15
+; SI-NEXT: v_readfirstlane_b32 s94, v14
+; SI-NEXT: s_lshr_b32 s77, s30, 16
; SI-NEXT: v_readfirstlane_b32 s85, v10
; SI-NEXT: v_readfirstlane_b32 s82, v8
; SI-NEXT: v_readfirstlane_b32 s81, v6
-; SI-NEXT: v_readfirstlane_b32 s86, v4
-; SI-NEXT: v_readfirstlane_b32 s30, v2
-; SI-NEXT: v_writelane_b32 v21, s88, 19
-; SI-NEXT: s_lshr_b32 s99, s29, 16
-; SI-NEXT: s_lshr_b32 s76, s27, 16
-; SI-NEXT: s_lshr_b32 s73, s50, 16
-; SI-NEXT: s_lshr_b32 s38, s52, 16
-; SI-NEXT: s_lshr_b32 s75, s48, 16
-; SI-NEXT: s_lshr_b32 s35, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s77, s37, 16
-; SI-NEXT: s_lshr_b32 s79, s34, 16
-; SI-NEXT: s_lshr_b32 s89, s85, 16
-; SI-NEXT: s_lshr_b32 s91, s82, 16
-; SI-NEXT: s_lshr_b32 s95, s81, 16
-; SI-NEXT: s_lshr_b32 s55, s86, 16
-; SI-NEXT: s_lshr_b32 s71, s30, 16
+; SI-NEXT: v_readfirstlane_b32 s83, v4
+; SI-NEXT: v_readfirstlane_b32 s36, v2
+; SI-NEXT: v_writelane_b32 v22, s76, 21
+; SI-NEXT: s_lshr_b32 s31, s29, 16
+; SI-NEXT: s_lshr_b32 s35, s27, 16
+; SI-NEXT: s_lshr_b32 s37, s25, 16
+; SI-NEXT: s_lshr_b32 s39, s23, 16
+; SI-NEXT: s_lshr_b32 s49, s21, 16
+; SI-NEXT: s_lshr_b32 s51, s19, 16
+; SI-NEXT: s_lshr_b32 s53, s17, 16
+; SI-NEXT: s_lshr_b32 s73, s48, 16
+; SI-NEXT: s_lshr_b32 s79, s50, 16
+; SI-NEXT: s_lshr_b32 s78, s38, 16
+; SI-NEXT: s_lshr_b32 s75, s94, 16
+; SI-NEXT: s_lshr_b32 s98, s85, 16
+; SI-NEXT: s_lshr_b32 s89, s82, 16
+; SI-NEXT: s_lshr_b32 s91, s81, 16
+; SI-NEXT: s_lshr_b32 s95, s83, 16
+; SI-NEXT: s_lshr_b32 s86, s36, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v21, s90, 20
+; SI-NEXT: v_writelane_b32 v22, s77, 22
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v21, s35, 21
-; SI-NEXT: v_writelane_b32 v21, s38, 22
-; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v22, s78, 23
+; SI-NEXT: v_writelane_b32 v22, s79, 24
+; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB99_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s11, 16
+; SI-NEXT: s_lshl_b32 s5, s53, 16
; SI-NEXT: s_or_b32 s65, s4, s5
-; SI-NEXT: s_lshr_b64 s[66:67], s[64:65], 24
-; SI-NEXT: v_writelane_b32 v21, s66, 27
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s10, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 28
-; SI-NEXT: s_lshr_b64 s[66:67], s[64:65], 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s92, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s8, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 25
+; SI-NEXT: s_lshl_b32 s5, s51, 16
; SI-NEXT: s_or_b32 s93, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s12, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 26
-; SI-NEXT: s_lshr_b64 s[66:67], s[64:65], 8
+; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 23
+; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s13, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 24
-; SI-NEXT: s_lshr_b64 s[66:67], s[92:93], 24
+; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 33
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s14, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 34
-; SI-NEXT: s_lshr_b64 s[66:67], s[92:93], 16
+; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 31
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s15, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 32
-; SI-NEXT: s_lshr_b64 s[66:67], s[92:93], 8
+; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 29
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s40, 16
-; SI-NEXT: v_writelane_b32 v21, s67, 30
-; SI-NEXT: s_lshr_b64 s[66:67], s[62:63], 24
+; SI-NEXT: s_lshl_b32 s5, s11, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: v_writelane_b32 v21, s66, 39
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s57, s4, s5
-; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s41, 16
-; SI-NEXT: s_lshr_b32 s16, s65, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 40
-; SI-NEXT: s_lshr_b64 s[66:67], s[62:63], 16
+; SI-NEXT: s_and_b32 s4, s52, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s16, 32
-; SI-NEXT: s_lshr_b32 s16, s93, 8
-; SI-NEXT: v_writelane_b32 v21, s66, 37
+; SI-NEXT: s_and_b32 s4, s36, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s42, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 34
-; SI-NEXT: s_lshr_b32 s16, s63, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 38
-; SI-NEXT: s_lshr_b64 s[66:67], s[62:63], 8
+; SI-NEXT: s_lshl_b32 s5, s13, 16
; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s55, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 36
-; SI-NEXT: s_lshr_b32 s16, s59, 8
-; SI-NEXT: v_writelane_b32 v21, s66, 35
+; SI-NEXT: s_and_b32 s4, s83, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s72, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 38
-; SI-NEXT: s_lshr_b32 s16, s47, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 36
-; SI-NEXT: s_lshr_b64 s[66:67], s[58:59], 24
+; SI-NEXT: s_and_b32 s4, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 40
-; SI-NEXT: s_lshr_b32 s16, s61, 8
-; SI-NEXT: v_writelane_b32 v21, s66, 45
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 42
-; SI-NEXT: s_lshr_b32 s16, s57, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 46
-; SI-NEXT: s_lshr_b64 s[66:67], s[58:59], 16
+; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s14, s4, s5
; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 44
-; SI-NEXT: s_lshr_b32 s16, s45, 8
-; SI-NEXT: v_writelane_b32 v21, s66, 43
+; SI-NEXT: s_lshl_b32 s5, s89, 16
; SI-NEXT: s_or_b32 s15, s4, s5
; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 46
-; SI-NEXT: s_lshr_b32 s16, s43, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 44
-; SI-NEXT: s_lshr_b64 s[66:67], s[58:59], 8
+; SI-NEXT: s_lshl_b32 s5, s72, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 48
-; SI-NEXT: s_lshr_b32 s16, s41, 8
-; SI-NEXT: v_writelane_b32 v21, s66, 41
+; SI-NEXT: s_lshl_b32 s5, s98, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_and_b32 s4, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
-; SI-NEXT: s_mov_b32 vcc_hi, s11
-; SI-NEXT: v_writelane_b32 v22, s16, 50
-; SI-NEXT: s_lshr_b32 s16, s15, 8
-; SI-NEXT: v_writelane_b32 v21, s67, 42
-; SI-NEXT: s_lshr_b64 s[66:67], s[46:47], 24
+; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: v_readlane_b32 s20, v22, 1
; SI-NEXT: s_or_b32 s10, s4, s5
-; SI-NEXT: s_and_b32 s4, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s79, 16
-; SI-NEXT: s_mov_b32 s94, s8
-; SI-NEXT: v_writelane_b32 v22, s16, 52
-; SI-NEXT: s_bfe_u32 s17, vcc_hi, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 51
+; SI-NEXT: s_and_b32 s4, s88, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s20, 16
; SI-NEXT: s_or_b32 s11, s4, s5
-; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: s_mov_b32 s90, s9
-; SI-NEXT: v_writelane_b32 v22, s17, 31
-; SI-NEXT: s_bfe_u32 s17, s94, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 52
-; SI-NEXT: s_lshr_b64 s[66:67], s[46:47], 16
-; SI-NEXT: s_mov_b32 s88, s6
-; SI-NEXT: v_writelane_b32 v22, s17, 33
-; SI-NEXT: s_bfe_u32 s17, s90, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 49
-; SI-NEXT: s_mov_b32 s78, s7
-; SI-NEXT: v_writelane_b32 v22, s17, 35
-; SI-NEXT: s_bfe_u32 s17, s88, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 50
-; SI-NEXT: s_lshr_b64 s[66:67], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v22, s17, 37
-; SI-NEXT: s_bfe_u32 s17, s78, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 47
-; SI-NEXT: v_writelane_b32 v22, s17, 39
-; SI-NEXT: s_bfe_u32 s17, s76, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 48
-; SI-NEXT: s_lshr_b64 s[66:67], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v22, s17, 41
-; SI-NEXT: s_bfe_u32 s17, s99, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 57
-; SI-NEXT: v_writelane_b32 v22, s17, 43
-; SI-NEXT: s_bfe_u32 s17, s71, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 58
-; SI-NEXT: s_lshr_b64 s[66:67], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v22, s17, 45
-; SI-NEXT: s_bfe_u32 s17, s55, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 55
-; SI-NEXT: v_writelane_b32 v22, s17, 47
-; SI-NEXT: s_bfe_u32 s17, s95, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 56
-; SI-NEXT: s_lshr_b64 s[66:67], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v22, s17, 49
-; SI-NEXT: s_bfe_u32 s17, s91, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s66, 53
-; SI-NEXT: v_writelane_b32 v22, s17, 51
-; SI-NEXT: s_bfe_u32 s17, s89, 0x80008
-; SI-NEXT: v_writelane_b32 v21, s67, 54
-; SI-NEXT: s_lshr_b64 s[66:67], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v22, s17, 53
-; SI-NEXT: v_writelane_b32 v21, s66, 63
-; SI-NEXT: v_writelane_b32 v22, s67, 0
-; SI-NEXT: s_lshr_b64 s[66:67], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v21, s66, 61
-; SI-NEXT: v_writelane_b32 v21, s67, 62
-; SI-NEXT: s_lshr_b64 s[66:67], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v21, s66, 59
-; SI-NEXT: v_writelane_b32 v21, s67, 60
-; SI-NEXT: s_lshr_b64 s[66:67], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s66, 5
-; SI-NEXT: v_writelane_b32 v22, s67, 6
-; SI-NEXT: s_lshr_b64 s[66:67], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s66, 3
-; SI-NEXT: v_writelane_b32 v22, s67, 4
-; SI-NEXT: s_lshr_b64 s[66:67], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v22, s66, 1
-; SI-NEXT: v_writelane_b32 v22, s67, 2
-; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s66, 11
-; SI-NEXT: v_writelane_b32 v22, s67, 12
-; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s66, 9
-; SI-NEXT: v_writelane_b32 v22, s67, 10
-; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v22, s66, 7
-; SI-NEXT: v_writelane_b32 v22, s67, 8
-; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s66, 17
-; SI-NEXT: v_writelane_b32 v22, s67, 18
-; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s66, 15
-; SI-NEXT: v_writelane_b32 v22, s67, 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v22, s66, 13
-; SI-NEXT: v_writelane_b32 v22, s67, 14
-; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s66, 23
-; SI-NEXT: v_writelane_b32 v22, s67, 24
-; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s66, 21
-; SI-NEXT: v_writelane_b32 v22, s67, 22
-; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8
-; SI-NEXT: s_and_b32 s4, s39, 0xffff
-; SI-NEXT: v_writelane_b32 v22, s66, 19
-; SI-NEXT: s_or_b32 s8, s4, s5
-; SI-NEXT: s_and_b32 s4, s37, 0xffff
+; SI-NEXT: s_and_b32 s4, s30, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
-; SI-NEXT: v_writelane_b32 v22, s67, 20
-; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 24
+; SI-NEXT: s_lshr_b32 s18, s65, 8
+; SI-NEXT: s_or_b32 s8, s4, s5
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s75, 16
+; SI-NEXT: v_writelane_b32 v21, s18, 42
+; SI-NEXT: s_lshr_b32 s18, s93, 8
; SI-NEXT: s_or_b32 s9, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: v_writelane_b32 v22, s66, 29
+; SI-NEXT: s_and_b32 s4, s38, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: v_readlane_b32 s19, v22, 0
+; SI-NEXT: v_writelane_b32 v21, s18, 44
+; SI-NEXT: s_lshr_b32 s18, s63, 8
; SI-NEXT: s_or_b32 s6, s4, s5
-; SI-NEXT: s_and_b32 s4, s48, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s75, 16
-; SI-NEXT: v_writelane_b32 v22, s67, 30
-; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 16
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s19, 16
+; SI-NEXT: v_writelane_b32 v21, s18, 46
+; SI-NEXT: s_lshr_b32 s18, s59, 8
; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, s52, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s38, 16
-; SI-NEXT: v_writelane_b32 v22, s66, 27
+; SI-NEXT: s_and_b32 s4, s50, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s79, 16
+; SI-NEXT: v_writelane_b32 v21, s18, 48
+; SI-NEXT: s_lshr_b32 s18, s47, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s50, 0xffff
+; SI-NEXT: s_and_b32 s5, s48, 0xffff
; SI-NEXT: s_lshl_b32 s96, s73, 16
-; SI-NEXT: v_writelane_b32 v22, s67, 28
-; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 50
+; SI-NEXT: s_lshr_b32 s18, s61, 8
; SI-NEXT: s_or_b32 s5, s5, s96
-; SI-NEXT: v_writelane_b32 v22, s66, 25
-; SI-NEXT: s_lshr_b32 s72, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s67, 26
-; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 24
-; SI-NEXT: s_mov_b32 s67, s72
-; SI-NEXT: s_mov_b32 s72, s71
-; SI-NEXT: s_lshr_b64 s[70:71], s[10:11], 8
-; SI-NEXT: s_mov_b32 s71, s72
-; SI-NEXT: s_mov_b32 s72, s89
-; SI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24
-; SI-NEXT: s_mov_b32 s89, s72
-; SI-NEXT: s_mov_b32 s72, s91
-; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
-; SI-NEXT: s_mov_b32 s91, s72
-; SI-NEXT: s_mov_b32 s72, s95
-; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
-; SI-NEXT: s_mov_b32 s83, s76
-; SI-NEXT: s_bfe_u32 vcc_hi, s77, 0x80008
-; SI-NEXT: s_mov_b32 s95, s72
-; SI-NEXT: s_mov_b32 s72, s77
-; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
-; SI-NEXT: s_bfe_u32 s17, s79, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 40
+; SI-NEXT: s_lshr_b32 s96, s15, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 52
+; SI-NEXT: s_lshr_b32 s96, s13, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 54
+; SI-NEXT: s_lshr_b32 s96, s11, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 56
+; SI-NEXT: s_lshr_b32 s96, s9, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 58
+; SI-NEXT: s_lshr_b32 s96, s7, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 60
+; SI-NEXT: s_lshr_b32 s96, s5, 8
+; SI-NEXT: v_writelane_b32 v21, s96, 62
+; SI-NEXT: s_bfe_u32 s18, s53, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 41
+; SI-NEXT: s_bfe_u32 s18, s51, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 43
+; SI-NEXT: s_bfe_u32 s18, s49, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 45
+; SI-NEXT: s_bfe_u32 s18, s39, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 47
+; SI-NEXT: s_bfe_u32 s18, s37, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 49
+; SI-NEXT: s_bfe_u32 s18, s35, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 51
+; SI-NEXT: s_bfe_u32 s18, s31, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 39
+; SI-NEXT: s_bfe_u32 s96, s98, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s96, 53
+; SI-NEXT: s_bfe_u32 s96, s20, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s96, 55
+; SI-NEXT: s_bfe_u32 s96, s75, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s96, 57
+; SI-NEXT: s_bfe_u32 s96, s19, 0x80008
+; SI-NEXT: s_lshr_b64 s[18:19], s[64:65], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 29
+; SI-NEXT: v_writelane_b32 v22, s19, 30
+; SI-NEXT: s_lshr_b64 s[18:19], s[64:65], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 27
+; SI-NEXT: v_writelane_b32 v22, s19, 28
+; SI-NEXT: s_lshr_b64 s[18:19], s[64:65], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 25
+; SI-NEXT: v_writelane_b32 v22, s19, 26
+; SI-NEXT: s_lshr_b64 s[18:19], s[92:93], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 35
+; SI-NEXT: v_writelane_b32 v22, s19, 36
+; SI-NEXT: s_lshr_b64 s[18:19], s[92:93], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 33
+; SI-NEXT: v_writelane_b32 v22, s19, 34
+; SI-NEXT: s_lshr_b64 s[18:19], s[92:93], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 31
+; SI-NEXT: v_writelane_b32 v22, s19, 32
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 41
+; SI-NEXT: v_writelane_b32 v22, s19, 42
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 39
+; SI-NEXT: v_writelane_b32 v22, s19, 40
+; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 37
+; SI-NEXT: v_writelane_b32 v22, s19, 38
+; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 47
+; SI-NEXT: v_writelane_b32 v22, s19, 48
+; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 45
+; SI-NEXT: v_writelane_b32 v22, s19, 46
+; SI-NEXT: s_lshr_b64 s[18:19], s[58:59], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 43
+; SI-NEXT: v_writelane_b32 v22, s19, 44
+; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 53
+; SI-NEXT: v_writelane_b32 v22, s19, 54
+; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 51
+; SI-NEXT: v_writelane_b32 v22, s19, 52
+; SI-NEXT: s_lshr_b64 s[18:19], s[46:47], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 49
+; SI-NEXT: v_writelane_b32 v22, s19, 50
+; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 24
+; SI-NEXT: v_writelane_b32 v22, s18, 59
+; SI-NEXT: v_writelane_b32 v22, s19, 60
+; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 57
+; SI-NEXT: v_writelane_b32 v22, s19, 58
+; SI-NEXT: s_lshr_b64 s[18:19], s[60:61], 8
+; SI-NEXT: v_writelane_b32 v22, s18, 55
+; SI-NEXT: v_writelane_b32 v21, s96, 59
+; SI-NEXT: s_bfe_u32 s96, s73, 0x80008
+; SI-NEXT: v_writelane_b32 v22, s19, 56
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 24
+; SI-NEXT: v_writelane_b32 v21, s96, 61
+; SI-NEXT: v_writelane_b32 v22, s18, 63
+; SI-NEXT: v_writelane_b32 v21, s19, 0
+; SI-NEXT: s_lshr_b64 s[18:19], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v22, s18, 61
+; SI-NEXT: v_writelane_b32 v22, s19, 62
+; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 5
+; SI-NEXT: v_writelane_b32 v21, s19, 6
+; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 16
+; SI-NEXT: v_writelane_b32 v21, s18, 3
+; SI-NEXT: v_writelane_b32 v21, s19, 4
+; SI-NEXT: s_lshr_b64 s[18:19], s[44:45], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 1
+; SI-NEXT: v_writelane_b32 v21, s19, 2
+; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 11
+; SI-NEXT: v_writelane_b32 v21, s19, 12
+; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 16
+; SI-NEXT: v_writelane_b32 v21, s18, 9
+; SI-NEXT: v_writelane_b32 v21, s19, 10
+; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 7
+; SI-NEXT: v_writelane_b32 v21, s19, 8
+; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 17
+; SI-NEXT: v_writelane_b32 v21, s19, 18
+; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v21, s18, 15
+; SI-NEXT: v_writelane_b32 v21, s19, 16
+; SI-NEXT: s_lshr_b64 s[18:19], s[40:41], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 13
+; SI-NEXT: v_writelane_b32 v21, s19, 14
+; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 23
+; SI-NEXT: v_writelane_b32 v21, s19, 24
+; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v21, s18, 21
+; SI-NEXT: v_writelane_b32 v21, s19, 22
+; SI-NEXT: s_lshr_b64 s[18:19], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 19
+; SI-NEXT: v_writelane_b32 v21, s19, 20
+; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 29
+; SI-NEXT: v_writelane_b32 v21, s19, 30
+; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 16
+; SI-NEXT: v_writelane_b32 v21, s18, 27
+; SI-NEXT: v_writelane_b32 v21, s19, 28
+; SI-NEXT: s_lshr_b64 s[18:19], s[12:13], 8
+; SI-NEXT: v_writelane_b32 v21, s18, 25
+; SI-NEXT: v_writelane_b32 v21, s19, 26
+; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s18, 35
+; SI-NEXT: s_lshr_b32 s78, s45, 8
+; SI-NEXT: v_writelane_b32 v21, s19, 36
+; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 16
+; SI-NEXT: s_bfe_u32 s76, s95, 0x80008
+; SI-NEXT: s_bfe_u32 vcc_lo, s89, 0x80008
+; SI-NEXT: v_writelane_b32 v21, s18, 33
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 24
+; SI-NEXT: s_mov_b32 s69, s78
+; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s55, s57, 8
+; SI-NEXT: s_lshr_b32 s54, s43, 8
+; SI-NEXT: s_lshr_b32 s72, s41, 8
+; SI-NEXT: v_writelane_b32 v21, s19, 34
+; SI-NEXT: s_lshr_b64 s[18:19], s[10:11], 8
+; SI-NEXT: s_mov_b32 s67, s76
+; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; SI-NEXT: s_mov_b32 s79, vcc_lo
+; SI-NEXT: s_lshr_b64 vcc, s[6:7], 8
+; SI-NEXT: s_bfe_u32 s97, s91, 0x80008
+; SI-NEXT: s_mov_b32 s96, s73
+; SI-NEXT: v_writelane_b32 v21, s18, 31
+; SI-NEXT: s_mov_b32 s21, s55
; SI-NEXT: s_mov_b32 s77, s72
-; SI-NEXT: s_mov_b32 s72, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 8
-; SI-NEXT: s_lshr_b32 s74, s7, 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 16
-; SI-NEXT: s_mov_b32 s79, s72
-; SI-NEXT: s_mov_b32 s72, s55
+; SI-NEXT: s_mov_b32 vcc_hi, s54
; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 24
-; SI-NEXT: s_bfe_u32 s53, s75, 0x80008
-; SI-NEXT: s_mov_b32 s69, s74
-; SI-NEXT: s_mov_b32 s96, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 24
-; SI-NEXT: s_mov_b32 s55, s72
-; SI-NEXT: s_mov_b32 s72, s99
-; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 16
-; SI-NEXT: s_bfe_u32 s35, s73, 0x80008
-; SI-NEXT: s_mov_b32 s99, s72
-; SI-NEXT: s_mov_b32 s75, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s16, s13, 8
-; SI-NEXT: s_lshr_b32 s49, s11, 8
-; SI-NEXT: s_lshr_b32 s38, s9, 8
-; SI-NEXT: s_mov_b32 s73, s75
-; SI-NEXT: s_mov_b32 s75, s96
+; SI-NEXT: s_bfe_u32 s99, s86, 0x80008
+; SI-NEXT: s_lshr_b64 s[70:71], s[56:57], 8
+; SI-NEXT: v_writelane_b32 v21, s19, 32
+; SI-NEXT: s_mov_b32 s55, s97
+; SI-NEXT: s_lshr_b64 s[18:19], s[4:5], 16
+; SI-NEXT: s_mov_b32 s73, s96
; SI-NEXT: s_mov_b64 s[96:97], 0
; SI-NEXT: s_branch .LBB99_3
; SI-NEXT: .LBB99_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b32 s83, s76
-; SI-NEXT: v_writelane_b32 v21, s4, 23
-; SI-NEXT: v_writelane_b32 v21, s5, 24
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_mov_b64 s[96:97], -1
-; SI-NEXT: v_writelane_b32 v21, s4, 25
-; SI-NEXT: v_writelane_b32 v21, s5, 26
+; SI-NEXT: v_writelane_b32 v22, s4, 25
+; SI-NEXT: v_writelane_b32 v22, s5, 26
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr16
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr17
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr21
; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr18
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: v_writelane_b32 v21, s4, 27
-; SI-NEXT: v_writelane_b32 v21, s5, 28
+; SI-NEXT: v_writelane_b32 v22, s4, 27
+; SI-NEXT: v_writelane_b32 v22, s5, 28
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v22, s4, 29
+; SI-NEXT: v_writelane_b32 v22, s5, 30
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 29
-; SI-NEXT: v_writelane_b32 v21, s5, 30
+; SI-NEXT: v_writelane_b32 v22, s4, 31
+; SI-NEXT: v_writelane_b32 v22, s5, 32
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 31
-; SI-NEXT: v_writelane_b32 v21, s5, 32
+; SI-NEXT: v_writelane_b32 v22, s4, 33
+; SI-NEXT: v_writelane_b32 v22, s5, 34
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 33
-; SI-NEXT: v_writelane_b32 v21, s5, 34
+; SI-NEXT: v_writelane_b32 v22, s4, 35
+; SI-NEXT: v_writelane_b32 v22, s5, 36
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 35
-; SI-NEXT: v_writelane_b32 v21, s5, 36
+; SI-NEXT: v_writelane_b32 v22, s4, 37
+; SI-NEXT: v_writelane_b32 v22, s5, 38
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 37
-; SI-NEXT: v_writelane_b32 v21, s5, 38
+; SI-NEXT: v_writelane_b32 v22, s4, 39
+; SI-NEXT: v_writelane_b32 v22, s5, 40
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 39
-; SI-NEXT: v_writelane_b32 v21, s5, 40
+; SI-NEXT: v_writelane_b32 v22, s4, 41
+; SI-NEXT: v_writelane_b32 v22, s5, 42
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 41
-; SI-NEXT: v_writelane_b32 v21, s5, 42
+; SI-NEXT: v_writelane_b32 v22, s4, 43
+; SI-NEXT: v_writelane_b32 v22, s5, 44
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 43
-; SI-NEXT: v_writelane_b32 v21, s5, 44
+; SI-NEXT: v_writelane_b32 v22, s4, 45
+; SI-NEXT: v_writelane_b32 v22, s5, 46
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 45
-; SI-NEXT: v_writelane_b32 v21, s5, 46
+; SI-NEXT: v_writelane_b32 v22, s4, 47
+; SI-NEXT: v_writelane_b32 v22, s5, 48
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
@@ -202588,815 +204024,800 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 47
-; SI-NEXT: v_writelane_b32 v21, s5, 48
+; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 49
-; SI-NEXT: v_writelane_b32 v21, s5, 50
+; SI-NEXT: v_writelane_b32 v22, s4, 49
+; SI-NEXT: v_writelane_b32 v22, s5, 50
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 51
-; SI-NEXT: v_writelane_b32 v21, s5, 52
+; SI-NEXT: v_writelane_b32 v22, s4, 51
+; SI-NEXT: v_writelane_b32 v22, s5, 52
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 53
-; SI-NEXT: v_writelane_b32 v21, s5, 54
+; SI-NEXT: v_writelane_b32 v22, s4, 53
+; SI-NEXT: v_writelane_b32 v22, s5, 54
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 55
-; SI-NEXT: v_writelane_b32 v21, s5, 56
+; SI-NEXT: v_writelane_b32 v22, s4, 55
+; SI-NEXT: v_writelane_b32 v22, s5, 56
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 57
-; SI-NEXT: v_writelane_b32 v21, s5, 58
+; SI-NEXT: v_writelane_b32 v22, s4, 57
+; SI-NEXT: v_writelane_b32 v22, s5, 58
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 59
-; SI-NEXT: v_writelane_b32 v21, s5, 60
+; SI-NEXT: v_writelane_b32 v22, s4, 59
+; SI-NEXT: v_writelane_b32 v22, s5, 60
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 61
-; SI-NEXT: v_writelane_b32 v21, s5, 62
+; SI-NEXT: v_writelane_b32 v22, s4, 61
+; SI-NEXT: v_writelane_b32 v22, s5, 62
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v21, s4, 63
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s5, 0
+; SI-NEXT: v_writelane_b32 v22, s4, 63
+; SI-NEXT: v_writelane_b32 v21, s5, 0
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 1
-; SI-NEXT: v_writelane_b32 v22, s5, 2
+; SI-NEXT: v_writelane_b32 v21, s4, 1
+; SI-NEXT: v_writelane_b32 v21, s5, 2
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 3
-; SI-NEXT: v_writelane_b32 v22, s5, 4
+; SI-NEXT: v_writelane_b32 v21, s4, 3
+; SI-NEXT: v_writelane_b32 v21, s5, 4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 5
-; SI-NEXT: v_writelane_b32 v22, s5, 6
+; SI-NEXT: v_writelane_b32 v21, s4, 5
+; SI-NEXT: v_writelane_b32 v21, s5, 6
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 7
-; SI-NEXT: v_writelane_b32 v22, s5, 8
+; SI-NEXT: v_writelane_b32 v21, s4, 7
+; SI-NEXT: v_writelane_b32 v21, s5, 8
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 9
-; SI-NEXT: v_writelane_b32 v22, s5, 10
+; SI-NEXT: v_writelane_b32 v21, s4, 9
+; SI-NEXT: v_writelane_b32 v21, s5, 10
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 11
-; SI-NEXT: v_writelane_b32 v22, s5, 12
+; SI-NEXT: v_writelane_b32 v21, s4, 11
+; SI-NEXT: v_writelane_b32 v21, s5, 12
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 13
-; SI-NEXT: v_writelane_b32 v22, s5, 14
+; SI-NEXT: v_writelane_b32 v21, s4, 13
+; SI-NEXT: v_writelane_b32 v21, s5, 14
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 15
-; SI-NEXT: v_writelane_b32 v22, s5, 16
+; SI-NEXT: v_writelane_b32 v21, s4, 15
+; SI-NEXT: v_writelane_b32 v21, s5, 16
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 17
-; SI-NEXT: v_writelane_b32 v22, s5, 18
+; SI-NEXT: v_writelane_b32 v21, s4, 17
+; SI-NEXT: v_writelane_b32 v21, s5, 18
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 19
-; SI-NEXT: v_writelane_b32 v22, s5, 20
+; SI-NEXT: v_writelane_b32 v21, s4, 19
+; SI-NEXT: v_writelane_b32 v21, s5, 20
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 21
-; SI-NEXT: v_writelane_b32 v22, s5, 22
+; SI-NEXT: v_writelane_b32 v21, s4, 21
+; SI-NEXT: v_writelane_b32 v21, s5, 22
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 23
-; SI-NEXT: v_writelane_b32 v22, s5, 24
+; SI-NEXT: v_writelane_b32 v21, s4, 23
+; SI-NEXT: v_writelane_b32 v21, s5, 24
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 25
-; SI-NEXT: v_writelane_b32 v22, s5, 26
+; SI-NEXT: v_writelane_b32 v21, s4, 25
+; SI-NEXT: v_writelane_b32 v21, s5, 26
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 27
-; SI-NEXT: v_writelane_b32 v22, s5, 28
+; SI-NEXT: v_writelane_b32 v21, s4, 27
+; SI-NEXT: v_writelane_b32 v21, s5, 28
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s4, 29
-; SI-NEXT: v_writelane_b32 v22, s5, 30
+; SI-NEXT: v_writelane_b32 v21, s4, 29
+; SI-NEXT: v_writelane_b32 v21, s5, 30
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v21, s4, 31
+; SI-NEXT: v_writelane_b32 v21, s5, 32
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v21, s4, 33
+; SI-NEXT: v_writelane_b32 v21, s5, 34
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v21, s4, 35
+; SI-NEXT: v_writelane_b32 v21, s5, 36
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB99_3: ; %Flow
; SI-NEXT: s_and_b64 s[96:97], s[96:97], exec
; SI-NEXT: s_cselect_b32 s96, 1, 0
+; SI-NEXT: v_writelane_b32 v21, s54, 37
; SI-NEXT: s_cmp_lg_u32 s96, 1
-; SI-NEXT: s_mov_b32 s96, s54
-; SI-NEXT: s_mov_b32 s54, s98
-; SI-NEXT: s_mov_b32 s98, s72
-; SI-NEXT: s_mov_b32 s72, s74
-; SI-NEXT: s_mov_b32 s74, s76
+; SI-NEXT: s_mov_b32 s96, s72
+; SI-NEXT: s_mov_b32 s72, s76
; SI-NEXT: s_mov_b32 s76, s78
-; SI-NEXT: s_mov_b32 s78, s88
-; SI-NEXT: s_mov_b32 s88, s90
-; SI-NEXT: s_mov_b32 s90, s94
-; SI-NEXT: s_mov_b32 s94, s66
+; SI-NEXT: s_mov_b32 s78, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s66
; SI-NEXT: s_mov_b32 s66, s68
-; SI-NEXT: s_mov_b32 s68, s70
-; SI-NEXT: s_mov_b32 s70, s35
-; SI-NEXT: s_mov_b32 s35, s83
-; SI-NEXT: s_mov_b32 s83, s38
-; SI-NEXT: s_mov_b32 s38, s49
-; SI-NEXT: s_mov_b32 s49, s16
-; SI-NEXT: s_mov_b32 s97, s17
+; SI-NEXT: s_mov_b32 s68, s20
+; SI-NEXT: s_mov_b32 s20, s70
+; SI-NEXT: v_readlane_b32 s70, v22, 47
+; SI-NEXT: v_writelane_b32 v21, s55, 38
+; SI-NEXT: v_readlane_b32 s71, v22, 48
+; SI-NEXT: s_mov_b32 s54, s18
+; SI-NEXT: v_readlane_b32 s71, v21, 39
+; SI-NEXT: v_readlane_b32 s97, v21, 40
+; SI-NEXT: v_readlane_b32 s18, v22, 29
+; SI-NEXT: v_readlane_b32 s19, v22, 30
; SI-NEXT: s_cbranch_scc1 .LBB99_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s52, s52, 3
-; SI-NEXT: v_readlane_b32 s5, v21, 22
-; SI-NEXT: s_and_b32 s4, s52, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_add_i32 s50, s50, 3
+; SI-NEXT: v_readlane_b32 s5, v22, 24
+; SI-NEXT: s_and_b32 s4, s50, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_add_i32 s48, s48, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s50, 0xffff
+; SI-NEXT: s_and_b32 s5, s48, 0xffff
; SI-NEXT: s_lshl_b32 s6, s73, 16
-; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
-; SI-NEXT: v_readlane_b32 s7, v21, 21
+; SI-NEXT: s_add_i32 s38, s38, 3
+; SI-NEXT: v_readlane_b32 s7, v22, 23
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, vcc_lo, 0xffff
+; SI-NEXT: s_and_b32 s6, s38, 0xffff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_add_i32 s48, s48, 3
+; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: v_readlane_b32 s8, v22, 0
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s48, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s75, 16
-; SI-NEXT: s_add_i32 s39, s39, 3
-; SI-NEXT: v_readlane_b32 s9, v21, 20
+; SI-NEXT: s_and_b32 s7, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_add_i32 s30, s30, 3
+; SI-NEXT: v_readlane_b32 s9, v22, 22
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s39, 0xffff
+; SI-NEXT: s_and_b32 s8, s30, 0xffff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_add_i32 s37, s37, 3
+; SI-NEXT: s_add_i32 s94, s94, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s77, 16
-; SI-NEXT: s_add_i32 s36, s36, 3
-; SI-NEXT: v_readlane_b32 s11, v21, 19
+; SI-NEXT: s_and_b32 s9, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s75, 16
+; SI-NEXT: s_add_i32 s90, s90, 3
+; SI-NEXT: v_readlane_b32 s11, v22, 21
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s36, 0xffff
+; SI-NEXT: s_and_b32 s10, s90, 0xffff
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_add_i32 s88, s88, 3
+; SI-NEXT: v_readlane_b32 s12, v22, 1
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s34, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s79, 16
+; SI-NEXT: s_and_b32 s11, s88, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: v_readlane_b32 s13, v21, 18
+; SI-NEXT: v_readlane_b32 s13, v22, 20
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s87, 0xffff
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_add_i32 s85, s85, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s89, 16
+; SI-NEXT: s_lshl_b32 s14, s98, 16
; SI-NEXT: s_add_i32 s84, s84, 3
-; SI-NEXT: v_readlane_b32 s15, v21, 17
+; SI-NEXT: v_readlane_b32 s15, v22, 19
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s84, 0xffff
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_add_i32 s82, s82, 3
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: s_and_b32 s15, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s91, 16
-; SI-NEXT: s_add_i32 s31, s31, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 16
+; SI-NEXT: s_lshl_b32 s40, s89, 16
+; SI-NEXT: s_add_i32 s74, s74, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 18
; SI-NEXT: s_or_b32 s15, s40, s15
-; SI-NEXT: s_and_b32 s40, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s16, 16
+; SI-NEXT: s_and_b32 s40, s74, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s18, 16
; SI-NEXT: s_add_i32 s81, s81, 3
; SI-NEXT: s_or_b32 s40, s41, s40
; SI-NEXT: s_and_b32 s41, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s95, 16
+; SI-NEXT: s_lshl_b32 s42, s91, 16
; SI-NEXT: s_add_i32 s80, s80, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 15
+; SI-NEXT: v_readlane_b32 s18, v22, 17
; SI-NEXT: s_or_b32 s41, s42, s41
; SI-NEXT: s_and_b32 s42, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s16, 16
-; SI-NEXT: s_add_i32 s70, s86, 3
+; SI-NEXT: s_lshl_b32 s43, s18, 16
+; SI-NEXT: s_add_i32 s70, s83, 3
; SI-NEXT: s_or_b32 s42, s43, s42
; SI-NEXT: s_and_b32 s43, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s55, 16
-; SI-NEXT: s_add_i32 s69, s51, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 14
+; SI-NEXT: s_lshl_b32 s44, s95, 16
+; SI-NEXT: s_add_i32 s69, s52, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 16
; SI-NEXT: s_or_b32 s43, s44, s43
; SI-NEXT: s_and_b32 s44, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s16, 16
-; SI-NEXT: s_add_i32 s67, s30, 3
+; SI-NEXT: s_lshl_b32 s45, s18, 16
+; SI-NEXT: s_add_i32 s67, s36, 3
; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: s_and_b32 s45, s67, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s71, 16
+; SI-NEXT: s_lshl_b32 s46, s86, 16
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 13
+; SI-NEXT: v_readlane_b32 s18, v22, 15
; SI-NEXT: s_or_b32 s45, s46, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s16, 16
+; SI-NEXT: s_lshl_b32 s46, s18, 16
; SI-NEXT: s_or_b32 s28, s46, s28
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s56, s28, 0x30000
; SI-NEXT: s_and_b32 s28, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s99, 16
+; SI-NEXT: s_lshl_b32 s29, s31, 16
; SI-NEXT: s_or_b32 s28, s29, s28
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 12
+; SI-NEXT: v_readlane_b32 s18, v22, 14
; SI-NEXT: s_add_i32 s57, s28, 0x30000
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s16, 16
+; SI-NEXT: s_lshl_b32 s28, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 12
; SI-NEXT: s_or_b32 s26, s28, s26
-; SI-NEXT: s_add_i32 s27, s27, 3
+; SI-NEXT: s_add_i32 s27, s18, 3
; SI-NEXT: s_add_i32 s60, s26, 0x30000
; SI-NEXT: s_and_b32 s26, s27, 0xffff
; SI-NEXT: s_lshl_b32 s27, s35, 16
; SI-NEXT: s_or_b32 s26, s27, s26
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 11
+; SI-NEXT: v_readlane_b32 s18, v22, 13
; SI-NEXT: s_add_i32 s61, s26, 0x30000
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s16, 16
+; SI-NEXT: s_lshl_b32 s26, s18, 16
; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s46, s24, 0x30000
; SI-NEXT: s_and_b32 s24, s25, 0xffff
-; SI-NEXT: v_readlane_b32 s25, v21, 0
-; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_lshl_b32 s25, s37, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 9
; SI-NEXT: s_or_b32 s24, s25, s24
-; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 10
+; SI-NEXT: s_add_i32 s22, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 11
; SI-NEXT: s_add_i32 s47, s24, 0x30000
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s16, 16
+; SI-NEXT: s_lshl_b32 s24, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 8
; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_add_i32 s23, s23, 3
+; SI-NEXT: s_add_i32 s23, s18, 3
; SI-NEXT: s_add_i32 s58, s22, 0x30000
; SI-NEXT: s_and_b32 s22, s23, 0xffff
-; SI-NEXT: v_readlane_b32 s23, v21, 1
-; SI-NEXT: s_lshl_b32 s23, s23, 16
+; SI-NEXT: s_lshl_b32 s23, s39, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 6
; SI-NEXT: s_or_b32 s22, s23, s22
-; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 9
+; SI-NEXT: s_add_i32 s20, s18, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 10
; SI-NEXT: s_add_i32 s59, s22, 0x30000
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s16, 16
+; SI-NEXT: s_lshl_b32 s22, s18, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 5
; SI-NEXT: s_or_b32 s20, s22, s20
-; SI-NEXT: s_add_i32 s21, s21, 3
+; SI-NEXT: s_add_i32 s21, s18, 3
; SI-NEXT: s_add_i32 s62, s20, 0x30000
; SI-NEXT: s_and_b32 s20, s21, 0xffff
-; SI-NEXT: v_readlane_b32 s21, v21, 2
-; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s21, s49, 16
+; SI-NEXT: v_readlane_b32 s18, v22, 3
; SI-NEXT: s_or_b32 s20, s21, s20
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: v_readlane_b32 s16, v21, 8
+; SI-NEXT: v_readlane_b32 s19, v22, 7
; SI-NEXT: s_add_i32 s63, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s16, 16
+; SI-NEXT: s_lshl_b32 s20, s19, 16
; SI-NEXT: s_or_b32 s18, s20, s18
-; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s92, s18, 0x30000
+; SI-NEXT: v_readlane_b32 s18, v22, 2
+; SI-NEXT: s_add_i32 s19, s18, 3
; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 3
-; SI-NEXT: s_lshl_b32 s19, s19, 16
-; SI-NEXT: v_readlane_b32 s16, v21, 6
+; SI-NEXT: s_lshl_b32 s19, s51, 16
; SI-NEXT: s_or_b32 s18, s19, s18
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s17, v21, 7
; SI-NEXT: s_add_i32 s93, s18, 0x30000
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 4
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s17, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s64, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v21, 5
-; SI-NEXT: s_add_i32 s17, s16, 3
; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: v_readlane_b32 s17, v21, 4
-; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s17, s53, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s65, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 27
-; SI-NEXT: v_writelane_b32 v21, s17, 28
; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 25
-; SI-NEXT: v_writelane_b32 v21, s17, 26
+; SI-NEXT: v_writelane_b32 v22, s16, 27
+; SI-NEXT: v_writelane_b32 v22, s17, 28
; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 23
-; SI-NEXT: v_writelane_b32 v21, s17, 24
+; SI-NEXT: v_writelane_b32 v22, s16, 25
+; SI-NEXT: v_writelane_b32 v22, s17, 26
; SI-NEXT: s_lshr_b64 s[16:17], s[92:93], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 33
-; SI-NEXT: v_writelane_b32 v21, s17, 34
+; SI-NEXT: v_writelane_b32 v22, s16, 35
+; SI-NEXT: v_writelane_b32 v22, s17, 36
; SI-NEXT: s_lshr_b64 s[16:17], s[92:93], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 31
-; SI-NEXT: v_writelane_b32 v21, s17, 32
+; SI-NEXT: v_writelane_b32 v22, s16, 33
+; SI-NEXT: v_writelane_b32 v22, s17, 34
; SI-NEXT: s_lshr_b64 s[16:17], s[92:93], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 29
-; SI-NEXT: v_writelane_b32 v21, s17, 30
+; SI-NEXT: v_writelane_b32 v22, s16, 31
+; SI-NEXT: v_writelane_b32 v22, s17, 32
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 39
-; SI-NEXT: v_writelane_b32 v21, s17, 40
+; SI-NEXT: v_writelane_b32 v22, s16, 41
+; SI-NEXT: v_writelane_b32 v22, s17, 42
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 37
-; SI-NEXT: v_writelane_b32 v21, s17, 38
+; SI-NEXT: v_writelane_b32 v22, s16, 39
+; SI-NEXT: v_writelane_b32 v22, s17, 40
; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 35
-; SI-NEXT: v_writelane_b32 v21, s17, 36
-; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 45
-; SI-NEXT: v_writelane_b32 v21, s17, 46
+; SI-NEXT: v_writelane_b32 v22, s16, 37
+; SI-NEXT: v_writelane_b32 v22, s17, 38
; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 43
-; SI-NEXT: v_writelane_b32 v21, s17, 44
+; SI-NEXT: v_writelane_b32 v22, s16, 45
+; SI-NEXT: v_writelane_b32 v22, s17, 46
; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 41
-; SI-NEXT: v_writelane_b32 v21, s17, 42
+; SI-NEXT: v_writelane_b32 v22, s16, 43
+; SI-NEXT: v_writelane_b32 v22, s17, 44
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 51
-; SI-NEXT: v_writelane_b32 v21, s17, 52
+; SI-NEXT: v_writelane_b32 v22, s16, 53
+; SI-NEXT: v_writelane_b32 v22, s17, 54
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 49
-; SI-NEXT: v_writelane_b32 v21, s17, 50
+; SI-NEXT: v_writelane_b32 v22, s16, 51
+; SI-NEXT: v_writelane_b32 v22, s17, 52
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 47
-; SI-NEXT: v_writelane_b32 v21, s17, 48
+; SI-NEXT: v_writelane_b32 v22, s16, 49
+; SI-NEXT: v_writelane_b32 v22, s17, 50
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 57
-; SI-NEXT: v_writelane_b32 v21, s17, 58
+; SI-NEXT: v_writelane_b32 v22, s16, 59
+; SI-NEXT: v_writelane_b32 v22, s17, 60
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 55
-; SI-NEXT: v_writelane_b32 v21, s17, 56
+; SI-NEXT: v_writelane_b32 v22, s16, 57
+; SI-NEXT: v_writelane_b32 v22, s17, 58
; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 53
-; SI-NEXT: v_writelane_b32 v21, s17, 54
+; SI-NEXT: v_writelane_b32 v22, s16, 55
+; SI-NEXT: v_writelane_b32 v22, s17, 56
; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v21, s16, 63
-; SI-NEXT: v_writelane_b32 v22, s17, 0
+; SI-NEXT: v_writelane_b32 v22, s16, 63
+; SI-NEXT: v_writelane_b32 v21, s17, 0
; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v21, s16, 61
-; SI-NEXT: v_writelane_b32 v21, s17, 62
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8
; SI-NEXT: s_add_i32 s44, s44, 0x30000
; SI-NEXT: s_add_i32 s45, s45, 0x30000
-; SI-NEXT: v_writelane_b32 v21, s16, 59
-; SI-NEXT: v_writelane_b32 v21, s17, 60
+; SI-NEXT: v_writelane_b32 v22, s16, 61
+; SI-NEXT: v_writelane_b32 v22, s17, 62
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 5
-; SI-NEXT: v_writelane_b32 v22, s17, 6
+; SI-NEXT: v_writelane_b32 v21, s16, 5
+; SI-NEXT: v_writelane_b32 v21, s17, 6
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 3
-; SI-NEXT: v_writelane_b32 v22, s17, 4
+; SI-NEXT: v_writelane_b32 v21, s16, 3
+; SI-NEXT: v_writelane_b32 v21, s17, 4
; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 8
; SI-NEXT: s_add_i32 s42, s42, 0x30000
; SI-NEXT: s_add_i32 s43, s43, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 1
-; SI-NEXT: v_writelane_b32 v22, s17, 2
+; SI-NEXT: v_writelane_b32 v21, s16, 1
+; SI-NEXT: v_writelane_b32 v21, s17, 2
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 11
-; SI-NEXT: v_writelane_b32 v22, s17, 12
+; SI-NEXT: v_writelane_b32 v21, s16, 11
+; SI-NEXT: v_writelane_b32 v21, s17, 12
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 9
-; SI-NEXT: v_writelane_b32 v22, s17, 10
+; SI-NEXT: v_writelane_b32 v21, s16, 9
+; SI-NEXT: v_writelane_b32 v21, s17, 10
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8
; SI-NEXT: s_add_i32 s40, s40, 0x30000
; SI-NEXT: s_add_i32 s41, s41, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 7
-; SI-NEXT: v_writelane_b32 v22, s17, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 7
+; SI-NEXT: v_writelane_b32 v21, s17, 8
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 17
-; SI-NEXT: v_writelane_b32 v22, s17, 18
+; SI-NEXT: v_writelane_b32 v21, s16, 17
+; SI-NEXT: v_writelane_b32 v21, s17, 18
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 15
-; SI-NEXT: v_writelane_b32 v22, s17, 16
+; SI-NEXT: v_writelane_b32 v21, s16, 15
+; SI-NEXT: v_writelane_b32 v21, s17, 16
; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 8
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 13
-; SI-NEXT: v_writelane_b32 v22, s17, 14
+; SI-NEXT: v_writelane_b32 v21, s16, 13
+; SI-NEXT: v_writelane_b32 v21, s17, 14
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 23
-; SI-NEXT: v_writelane_b32 v22, s17, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 23
+; SI-NEXT: v_writelane_b32 v21, s17, 24
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 21
-; SI-NEXT: v_writelane_b32 v22, s17, 22
+; SI-NEXT: v_writelane_b32 v21, s16, 21
+; SI-NEXT: v_writelane_b32 v21, s17, 22
; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 8
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 19
-; SI-NEXT: v_writelane_b32 v22, s17, 20
+; SI-NEXT: v_writelane_b32 v21, s16, 19
+; SI-NEXT: v_writelane_b32 v21, s17, 20
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v22, s16, 29
-; SI-NEXT: v_writelane_b32 v22, s17, 30
+; SI-NEXT: v_writelane_b32 v21, s16, 29
+; SI-NEXT: v_writelane_b32 v21, s17, 30
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v22, s16, 27
-; SI-NEXT: v_writelane_b32 v22, s17, 28
+; SI-NEXT: v_writelane_b32 v21, s16, 27
+; SI-NEXT: v_writelane_b32 v21, s17, 28
; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v22, s16, 25
-; SI-NEXT: v_writelane_b32 v22, s17, 26
+; SI-NEXT: s_add_i32 s10, s10, 0x30000
+; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: v_writelane_b32 v21, s16, 25
+; SI-NEXT: v_writelane_b32 v21, s17, 26
+; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v21, s16, 35
+; SI-NEXT: v_writelane_b32 v21, s17, 36
+; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
+; SI-NEXT: v_writelane_b32 v21, s16, 33
+; SI-NEXT: v_writelane_b32 v21, s17, 34
+; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8
+; SI-NEXT: s_add_i32 s4, s4, 0x30000
+; SI-NEXT: s_add_i32 s5, s5, 0x30000
+; SI-NEXT: v_writelane_b32 v21, s16, 31
+; SI-NEXT: v_writelane_b32 v21, s17, 32
+; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v21, s16, 37
+; SI-NEXT: v_writelane_b32 v21, s17, 38
; SI-NEXT: s_lshr_b32 s16, s65, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 31
-; SI-NEXT: s_lshr_b32 s16, s65, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 4
+; SI-NEXT: v_writelane_b32 v21, s16, 41
; SI-NEXT: s_lshr_b32 s16, s65, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 32
+; SI-NEXT: v_writelane_b32 v21, s16, 42
; SI-NEXT: s_lshr_b32 s16, s93, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 33
-; SI-NEXT: s_lshr_b32 s16, s93, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 3
+; SI-NEXT: v_writelane_b32 v21, s16, 43
; SI-NEXT: s_lshr_b32 s16, s93, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 34
+; SI-NEXT: v_writelane_b32 v21, s16, 44
; SI-NEXT: s_lshr_b32 s16, s63, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 35
-; SI-NEXT: s_lshr_b32 s16, s63, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 2
+; SI-NEXT: v_writelane_b32 v21, s16, 45
; SI-NEXT: s_lshr_b32 s16, s63, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 36
+; SI-NEXT: v_writelane_b32 v21, s16, 46
; SI-NEXT: s_lshr_b32 s16, s59, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 37
-; SI-NEXT: s_lshr_b32 s16, s59, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 1
+; SI-NEXT: v_writelane_b32 v21, s16, 47
; SI-NEXT: s_lshr_b32 s16, s59, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 38
+; SI-NEXT: v_writelane_b32 v21, s16, 48
; SI-NEXT: s_lshr_b32 s16, s47, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 39
-; SI-NEXT: s_lshr_b32 s16, s47, 16
-; SI-NEXT: v_writelane_b32 v21, s16, 0
+; SI-NEXT: v_writelane_b32 v21, s16, 49
; SI-NEXT: s_lshr_b32 s16, s47, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 40
+; SI-NEXT: v_writelane_b32 v21, s16, 50
; SI-NEXT: s_lshr_b32 s16, s61, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 41
-; SI-NEXT: s_lshr_b32 s16, s61, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 42
-; SI-NEXT: s_lshr_b32 s16, s57, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 43
-; SI-NEXT: s_lshr_b32 s16, s57, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 44
-; SI-NEXT: s_lshr_b32 s16, s45, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 45
-; SI-NEXT: s_lshr_b32 s16, s45, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 46
-; SI-NEXT: s_lshr_b32 s16, s43, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 47
-; SI-NEXT: s_lshr_b32 s16, s43, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 48
-; SI-NEXT: s_lshr_b32 s16, s41, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 49
-; SI-NEXT: s_lshr_b32 s16, s41, 8
-; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
+; SI-NEXT: v_writelane_b32 v21, s16, 51
+; SI-NEXT: s_lshr_b32 s16, s15, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 52
+; SI-NEXT: s_lshr_b32 s16, s13, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 53
+; SI-NEXT: s_lshr_b32 s16, s13, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 54
+; SI-NEXT: s_lshr_b32 s16, s11, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 55
+; SI-NEXT: s_lshr_b32 s16, s11, 16
+; SI-NEXT: s_add_i32 s9, s9, 0x30000
+; SI-NEXT: v_writelane_b32 v22, s16, 1
+; SI-NEXT: s_lshr_b32 s16, s11, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 56
+; SI-NEXT: s_lshr_b32 s16, s9, 24
; SI-NEXT: s_add_i32 s7, s7, 0x30000
+; SI-NEXT: v_writelane_b32 v21, s16, 57
+; SI-NEXT: s_lshr_b32 s16, s9, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 58
+; SI-NEXT: s_lshr_b32 s16, s7, 24
+; SI-NEXT: v_writelane_b32 v21, s16, 59
+; SI-NEXT: s_lshr_b32 s16, s7, 16
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
-; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: s_add_i32 s10, s10, 0x30000
-; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 50
-; SI-NEXT: s_lshr_b32 s16, s15, 24
-; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[88:89], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v22, s16, 0
+; SI-NEXT: s_lshr_b32 s16, s7, 8
+; SI-NEXT: s_lshr_b64 s[70:71], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 8
+; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s16, 51
-; SI-NEXT: s_lshr_b32 s16, s15, 8
+; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v21, s16, 60
+; SI-NEXT: s_lshr_b32 s16, s5, 24
+; SI-NEXT: s_lshr_b64 s[18:19], s[64:65], 24
+; SI-NEXT: s_lshr_b32 s53, s65, 16
+; SI-NEXT: s_lshr_b32 s51, s93, 16
+; SI-NEXT: s_lshr_b32 s49, s63, 16
+; SI-NEXT: s_lshr_b32 s39, s59, 16
+; SI-NEXT: s_lshr_b32 s37, s47, 16
; SI-NEXT: s_lshr_b32 s35, s61, 16
-; SI-NEXT: s_lshr_b32 s99, s57, 16
-; SI-NEXT: s_lshr_b32 s71, s45, 16
-; SI-NEXT: s_lshr_b32 s55, s43, 16
-; SI-NEXT: s_lshr_b32 s95, s41, 16
-; SI-NEXT: s_lshr_b32 s91, s15, 16
-; SI-NEXT: v_writelane_b32 v22, s16, 52
-; SI-NEXT: s_lshr_b32 s16, s13, 24
-; SI-NEXT: s_lshr_b32 s89, s13, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 8
-; SI-NEXT: s_lshr_b32 s97, s11, 24
-; SI-NEXT: s_lshr_b32 s79, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s11, 8
-; SI-NEXT: s_lshr_b32 vcc_hi, s9, 24
-; SI-NEXT: s_lshr_b32 s77, s9, 16
-; SI-NEXT: s_lshr_b32 s83, s9, 8
-; SI-NEXT: s_lshr_b32 s53, s7, 24
-; SI-NEXT: s_lshr_b32 s75, s7, 16
-; SI-NEXT: s_lshr_b32 s69, s7, 8
-; SI-NEXT: s_lshr_b32 s70, s5, 24
+; SI-NEXT: s_lshr_b32 s97, s61, 8
+; SI-NEXT: s_lshr_b32 s71, s57, 24
+; SI-NEXT: s_lshr_b32 s31, s57, 16
+; SI-NEXT: s_lshr_b32 s21, s57, 8
+; SI-NEXT: s_lshr_b32 s99, s45, 24
+; SI-NEXT: s_lshr_b32 s86, s45, 16
+; SI-NEXT: s_lshr_b32 s69, s45, 8
+; SI-NEXT: s_lshr_b32 s67, s43, 24
+; SI-NEXT: s_lshr_b32 s95, s43, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s43, 8
+; SI-NEXT: s_lshr_b32 s55, s41, 24
+; SI-NEXT: s_lshr_b32 s91, s41, 16
+; SI-NEXT: s_lshr_b32 s77, s41, 8
+; SI-NEXT: s_lshr_b32 s79, s15, 24
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s98, s13, 16
+; SI-NEXT: s_lshr_b32 s75, s9, 16
+; SI-NEXT: v_writelane_b32 v21, s16, 61
; SI-NEXT: s_lshr_b32 s73, s5, 16
-; SI-NEXT: s_lshr_b32 s67, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 53
+; SI-NEXT: s_lshr_b32 s16, s5, 8
+; SI-NEXT: v_writelane_b32 v21, s16, 62
; SI-NEXT: .LBB99_5: ; %end
-; SI-NEXT: v_readlane_b32 s18, v21, 23
-; SI-NEXT: v_readlane_b32 s19, v21, 24
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 25
+; SI-NEXT: v_readlane_b32 s24, v22, 25
+; SI-NEXT: v_readlane_b32 s25, v22, 26
; SI-NEXT: s_and_b32 s16, s64, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 26
+; SI-NEXT: s_lshl_b32 s17, s24, 8
+; SI-NEXT: v_readlane_b32 s24, v22, 27
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 27
+; SI-NEXT: s_and_b32 s17, s24, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 32
+; SI-NEXT: v_readlane_b32 s17, v21, 42
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s65, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 4
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 31
-; SI-NEXT: v_readlane_b32 s19, v21, 28
+; SI-NEXT: s_and_b32 s17, s53, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 41
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 29
+; SI-NEXT: v_readlane_b32 s18, v22, 31
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 30
+; SI-NEXT: v_readlane_b32 s19, v22, 32
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 31
+; SI-NEXT: v_readlane_b32 s18, v22, 33
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s92, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 32
+; SI-NEXT: v_readlane_b32 s19, v22, 34
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 33
+; SI-NEXT: v_readlane_b32 s18, v22, 35
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 34
+; SI-NEXT: v_readlane_b32 s17, v21, 44
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s93, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 3
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 33
-; SI-NEXT: v_readlane_b32 s19, v21, 34
+; SI-NEXT: s_and_b32 s17, s51, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 43
+; SI-NEXT: v_readlane_b32 s19, v22, 36
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 35
+; SI-NEXT: v_readlane_b32 s18, v22, 37
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 36
+; SI-NEXT: v_readlane_b32 s19, v22, 38
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 37
+; SI-NEXT: v_readlane_b32 s18, v22, 39
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s62, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 38
+; SI-NEXT: v_readlane_b32 s19, v22, 40
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 39
+; SI-NEXT: v_readlane_b32 s18, v22, 41
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 36
+; SI-NEXT: v_readlane_b32 s17, v21, 46
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s63, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 2
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 35
-; SI-NEXT: v_readlane_b32 s19, v21, 40
+; SI-NEXT: s_and_b32 s17, s49, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 45
+; SI-NEXT: v_readlane_b32 s19, v22, 42
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 41
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 42
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: v_readlane_b32 s18, v22, 43
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 43
+; SI-NEXT: v_readlane_b32 s19, v22, 44
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s58, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 44
+; SI-NEXT: s_lshl_b32 s17, s18, 8
+; SI-NEXT: v_readlane_b32 s18, v22, 45
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 45
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s70, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 38
+; SI-NEXT: v_readlane_b32 s17, v21, 48
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s59, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 1
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 37
-; SI-NEXT: v_readlane_b32 s19, v21, 46
+; SI-NEXT: s_and_b32 s17, s39, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 47
+; SI-NEXT: v_readlane_b32 s19, v22, 46
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 47
+; SI-NEXT: v_readlane_b32 s18, v22, 49
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 48
+; SI-NEXT: v_readlane_b32 s19, v22, 50
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 49
+; SI-NEXT: v_readlane_b32 s18, v22, 51
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s46, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 50
+; SI-NEXT: v_readlane_b32 s19, v22, 52
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 51
+; SI-NEXT: v_readlane_b32 s18, v22, 53
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 40
+; SI-NEXT: v_readlane_b32 s17, v21, 50
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s47, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 0
-; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 39
-; SI-NEXT: v_readlane_b32 s19, v21, 52
+; SI-NEXT: s_and_b32 s17, s37, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 49
+; SI-NEXT: v_readlane_b32 s19, v22, 54
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 53
+; SI-NEXT: v_readlane_b32 s18, v22, 55
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 54
+; SI-NEXT: v_readlane_b32 s19, v22, 56
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 55
+; SI-NEXT: v_readlane_b32 s18, v22, 57
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s60, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 56
+; SI-NEXT: v_readlane_b32 s19, v22, 58
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 57
+; SI-NEXT: v_readlane_b32 s18, v22, 59
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 42
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s61, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s97, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s35, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 41
-; SI-NEXT: v_readlane_b32 s19, v21, 58
+; SI-NEXT: v_readlane_b32 s18, v21, 51
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v21, 59
+; SI-NEXT: v_readlane_b32 s19, v22, 60
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v21, 60
+; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v21, 61
+; SI-NEXT: v_readlane_b32 s18, v22, 61
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s56, 0xff
-; SI-NEXT: v_readlane_b32 s19, v21, 62
+; SI-NEXT: s_lshl_b32 s17, s20, 8
+; SI-NEXT: v_readlane_b32 s19, v22, 62
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 63
+; SI-NEXT: v_readlane_b32 s18, v22, 63
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 44
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s57, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s21, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s99, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 43
-; SI-NEXT: v_readlane_b32 s19, v22, 0
+; SI-NEXT: s_and_b32 s17, s31, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 0
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s71, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 1
+; SI-NEXT: v_readlane_b32 s18, v21, 1
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 2
+; SI-NEXT: v_readlane_b32 s19, v21, 2
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 3
+; SI-NEXT: v_readlane_b32 s18, v21, 3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s44, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 4
+; SI-NEXT: v_readlane_b32 s19, v21, 4
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 5
+; SI-NEXT: v_readlane_b32 s18, v21, 5
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 46
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s69, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s71, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 45
-; SI-NEXT: v_readlane_b32 s19, v22, 6
+; SI-NEXT: s_and_b32 s17, s86, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 6
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s99, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 7
+; SI-NEXT: v_readlane_b32 s18, v21, 7
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 8
+; SI-NEXT: v_readlane_b32 s19, v21, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 9
+; SI-NEXT: v_readlane_b32 s18, v21, 9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 10
+; SI-NEXT: v_readlane_b32 s19, v21, 10
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 11
+; SI-NEXT: v_readlane_b32 s18, v21, 11
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 48
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, vcc_hi, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s55, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 47
-; SI-NEXT: v_readlane_b32 s19, v22, 12
+; SI-NEXT: s_and_b32 s17, s95, 0xff
+; SI-NEXT: v_readlane_b32 s19, v21, 12
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s67, 24
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 13
+; SI-NEXT: v_readlane_b32 s18, v21, 13
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 14
+; SI-NEXT: v_readlane_b32 s19, v21, 14
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 15
+; SI-NEXT: v_readlane_b32 s18, v21, 15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 16
+; SI-NEXT: v_readlane_b32 s19, v21, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 17
+; SI-NEXT: v_readlane_b32 s18, v21, 17
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 50
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_lshl_b32 s17, s77, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s95, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 49
+; SI-NEXT: s_and_b32 s17, s91, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s55, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 19
+; SI-NEXT: v_readlane_b32 s16, v21, 19
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 20
+; SI-NEXT: v_readlane_b32 s17, v21, 20
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 18
+; SI-NEXT: v_readlane_b32 s19, v21, 18
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 21
-; SI-NEXT: v_readlane_b32 s17, v22, 22
+; SI-NEXT: v_readlane_b32 s16, v21, 21
+; SI-NEXT: v_readlane_b32 s17, v21, 22
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 23
+; SI-NEXT: v_readlane_b32 s18, v21, 23
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
@@ -203405,29 +204826,28 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 52
-; SI-NEXT: s_lshl_b32 s15, s15, 8
-; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_and_b32 s15, s91, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 51
+; SI-NEXT: v_readlane_b32 s14, v21, 52
+; SI-NEXT: s_and_b32 s15, s15, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 8
+; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: s_and_b32 s15, s89, 0xff
; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_lshl_b32 s16, s16, 24
+; SI-NEXT: s_lshl_b32 s16, s79, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 25
+; SI-NEXT: v_readlane_b32 s14, v21, 25
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 26
+; SI-NEXT: v_readlane_b32 s15, v21, 26
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 27
-; SI-NEXT: v_readlane_b32 s15, v22, 28
+; SI-NEXT: v_readlane_b32 s14, v21, 27
+; SI-NEXT: v_readlane_b32 s15, v21, 28
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 29
+; SI-NEXT: v_readlane_b32 s16, v21, 29
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
@@ -203436,71 +204856,82 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
-; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s49, 8
-; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_and_b32 s13, s89, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 53
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s14, 24
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: v_readlane_b32 s12, v21, 54
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 8
+; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_and_b32 s13, s12, 0xffff
+; SI-NEXT: s_and_b32 s12, s98, 0xff
+; SI-NEXT: s_lshl_b32 s14, s12, 16
+; SI-NEXT: v_readlane_b32 s12, v21, 53
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s12, s12, s14
+; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
+; SI-NEXT: v_readlane_b32 s12, v21, 31
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: s_lshl_b32 s12, s68, 8
+; SI-NEXT: v_readlane_b32 s13, v21, 32
+; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: s_and_b32 s12, s66, 0xff
+; SI-NEXT: v_readlane_b32 s12, v21, 33
+; SI-NEXT: v_readlane_b32 s13, v21, 34
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: v_readlane_b32 s14, v21, 35
; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s13, s94, 24
+; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
-; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s38, 8
-; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_and_b32 s11, s79, 0xff
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_lshl_b32 s12, s97, 24
-; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_or_b32 s10, s10, s11
+; SI-NEXT: v_readlane_b32 s10, v21, 56
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s10, s10, 8
+; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: s_and_b32 s11, s10, 0xffff
+; SI-NEXT: v_readlane_b32 s10, v22, 1
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_lshl_b32 s12, s10, 16
+; SI-NEXT: v_readlane_b32 s10, v21, 55
+; SI-NEXT: s_lshl_b32 s10, s10, 24
+; SI-NEXT: s_or_b32 s10, s10, s12
+; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: s_lshl_b32 s10, s90, 8
+; SI-NEXT: s_lshl_b32 s10, s68, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: s_and_b32 s10, s88, 0xff
+; SI-NEXT: s_and_b32 s10, s66, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s78, 24
+; SI-NEXT: s_lshl_b32 s11, vcc_lo, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
-; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s83, 8
-; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s77, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, vcc_hi, 24
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: v_readlane_b32 s8, v21, 58
+; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: s_lshl_b32 s8, s8, 8
+; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_and_b32 s9, s8, 0xffff
+; SI-NEXT: s_and_b32 s8, s75, 0xff
+; SI-NEXT: s_lshl_b32 s10, s8, 16
+; SI-NEXT: v_readlane_b32 s8, v21, 57
+; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: s_or_b32 s8, s8, s10
+; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s8, s76, 8
+; SI-NEXT: s_lshl_b32 s8, s78, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s74, 0xff
+; SI-NEXT: s_and_b32 s8, s76, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s72, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
@@ -203509,45 +204940,54 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s69, 8
-; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_and_b32 s7, s75, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s53, 24
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: v_readlane_b32 s6, v21, 60
+; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s7, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v22, 0
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s8, s6, 16
+; SI-NEXT: v_readlane_b32 s6, v21, 59
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s6, s6, s8
+; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s98, 8
+; SI-NEXT: s_lshl_b32 s6, s96, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s54, 0xff
+; SI-NEXT: v_readlane_b32 s8, v21, 37
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s96, 24
+; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s67, 8
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s73, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s70, 24
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s4, v21, 62
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s4, s4, 8
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: s_and_b32 s4, s73, 0xff
+; SI-NEXT: s_lshl_b32 s6, s4, 16
+; SI-NEXT: v_readlane_b32 s4, v21, 61
+; SI-NEXT: s_lshl_b32 s4, s4, 24
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v22, 24
-; SI-NEXT: v_readlane_b32 s17, v22, 30
+; SI-NEXT: v_readlane_b32 s25, v22, 28
+; SI-NEXT: v_readlane_b32 s19, v21, 24
+; SI-NEXT: v_readlane_b32 s17, v21, 30
+; SI-NEXT: v_readlane_b32 s15, v21, 36
+; SI-NEXT: v_readlane_b32 s9, v21, 38
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
@@ -203598,6 +205038,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v32, s34, 0
; VI-NEXT: v_writelane_b32 v32, s35, 1
@@ -203651,345 +205092,434 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s45, v2
; VI-NEXT: s_cmp_lg_u32 s44, 0
; VI-NEXT: v_readfirstlane_b32 s44, v1
+; VI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB99_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s46, s45, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s45, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s45, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s44, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s44, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 32
+; VI-NEXT: s_lshr_b32 s46, s29, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 33
+; VI-NEXT: s_lshr_b32 s46, s29, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 34
+; VI-NEXT: s_lshr_b32 s46, s29, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s28, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 35
; VI-NEXT: s_lshr_b32 s46, s28, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v34, s46, 55
+; VI-NEXT: s_lshr_b32 s46, s27, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 36
+; VI-NEXT: s_lshr_b32 s46, s27, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 37
+; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 56
+; VI-NEXT: s_lshr_b32 s46, s26, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 38
; VI-NEXT: s_lshr_b32 s46, s26, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s25, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 39
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 40
; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 41
; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 42
+; VI-NEXT: s_lshr_b32 s46, s23, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 43
; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v34, s46, 57
+; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 44
; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 32
-; VI-NEXT: s_lshr_b32 s47, s21, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 33
-; VI-NEXT: s_lshr_b32 s47, s20, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 34
-; VI-NEXT: s_lshr_b32 s47, s19, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 35
-; VI-NEXT: s_lshr_b32 s47, s18, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 36
-; VI-NEXT: s_lshr_b32 s47, s17, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 37
-; VI-NEXT: s_lshr_b32 s47, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 26
-; VI-NEXT: s_lshr_b32 s47, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 38
-; VI-NEXT: s_lshr_b32 s47, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 39
-; VI-NEXT: s_lshr_b32 s47, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 40
-; VI-NEXT: s_lshr_b32 s47, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 41
-; VI-NEXT: s_lshr_b32 s47, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 42
-; VI-NEXT: s_lshr_b32 s47, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 43
-; VI-NEXT: s_lshr_b32 s47, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 44
-; VI-NEXT: s_lshr_b32 s47, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 45
-; VI-NEXT: s_lshr_b32 s47, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 46
-; VI-NEXT: s_lshr_b32 s47, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 47
-; VI-NEXT: s_lshr_b32 s47, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 48
-; VI-NEXT: s_lshr_b32 s47, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 49
-; VI-NEXT: s_lshr_b32 s47, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 50
-; VI-NEXT: s_lshr_b32 s47, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 51
-; VI-NEXT: s_lshr_b32 s47, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 52
-; VI-NEXT: s_lshr_b32 s47, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 53
-; VI-NEXT: s_lshr_b32 s47, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 54
-; VI-NEXT: s_lshr_b32 s47, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 55
-; VI-NEXT: s_lshr_b32 s47, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s47, 56
-; VI-NEXT: s_lshr_b32 s47, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 57
-; VI-NEXT: s_lshr_b32 s47, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 58
-; VI-NEXT: s_lshr_b32 s47, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s47, 59
-; VI-NEXT: s_lshr_b32 s47, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 60
-; VI-NEXT: s_lshr_b64 s[30:31], s[44:45], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 8
-; VI-NEXT: v_writelane_b32 v33, s31, 9
-; VI-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 6
-; VI-NEXT: v_writelane_b32 v33, s31, 7
-; VI-NEXT: s_lshr_b64 s[30:31], s[26:27], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 4
-; VI-NEXT: v_writelane_b32 v33, s31, 5
-; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 2
-; VI-NEXT: v_writelane_b32 v33, s31, 3
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 0
-; VI-NEXT: v_writelane_b32 v33, s31, 1
-; VI-NEXT: s_lshr_b64 s[48:49], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s48, 24
-; VI-NEXT: v_writelane_b32 v33, s49, 25
-; VI-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 22
-; VI-NEXT: v_writelane_b32 v33, s31, 23
-; VI-NEXT: s_lshr_b64 s[30:31], s[8:9], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 20
-; VI-NEXT: v_writelane_b32 v33, s31, 21
-; VI-NEXT: s_lshr_b64 s[30:31], s[10:11], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 18
-; VI-NEXT: v_writelane_b32 v33, s31, 19
-; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 16
-; VI-NEXT: v_writelane_b32 v33, s31, 17
-; VI-NEXT: s_lshr_b64 s[30:31], s[14:15], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 14
-; VI-NEXT: v_writelane_b32 v33, s31, 15
-; VI-NEXT: s_lshr_b64 s[30:31], s[40:41], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 12
-; VI-NEXT: v_writelane_b32 v33, s31, 13
-; VI-NEXT: s_lshr_b64 s[30:31], s[42:43], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 10
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s71, s45, 16
-; VI-NEXT: s_lshr_b32 s80, s45, 8
-; VI-NEXT: s_lshr_b32 s83, s44, 16
-; VI-NEXT: s_lshr_b32 s87, s44, 8
-; VI-NEXT: s_lshr_b32 s52, s29, 24
-; VI-NEXT: s_lshr_b32 s82, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s29, 8
-; VI-NEXT: s_lshr_b32 s86, s28, 16
-; VI-NEXT: s_lshr_b32 s65, s27, 24
-; VI-NEXT: s_lshr_b32 s51, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s27, 8
-; VI-NEXT: s_lshr_b32 s85, s26, 16
-; VI-NEXT: s_lshr_b32 s50, s25, 24
-; VI-NEXT: s_lshr_b32 s67, s25, 16
-; VI-NEXT: s_lshr_b32 s54, s24, 16
-; VI-NEXT: s_lshr_b32 s64, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s81, s22, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 60
; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s58, s20, 16
-; VI-NEXT: s_lshr_b32 s60, s19, 24
-; VI-NEXT: s_lshr_b32 s62, s19, 16
-; VI-NEXT: s_lshr_b32 s72, s18, 16
-; VI-NEXT: s_lshr_b32 s74, s17, 24
-; VI-NEXT: s_lshr_b32 s73, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s5, 24
-; VI-NEXT: s_lshr_b32 s68, s5, 16
-; VI-NEXT: s_lshr_b32 s53, s5, 8
-; VI-NEXT: s_lshr_b32 s69, s4, 16
-; VI-NEXT: s_lshr_b32 s56, s4, 8
-; VI-NEXT: s_lshr_b32 s61, s7, 24
-; VI-NEXT: s_lshr_b32 s57, s7, 16
-; VI-NEXT: s_lshr_b32 s59, s7, 8
-; VI-NEXT: s_lshr_b32 s63, s6, 16
-; VI-NEXT: s_lshr_b32 s76, s6, 8
-; VI-NEXT: s_lshr_b32 s77, s9, 24
-; VI-NEXT: s_lshr_b32 s79, s9, 16
-; VI-NEXT: s_lshr_b32 s78, s9, 8
-; VI-NEXT: s_lshr_b32 s91, s8, 16
-; VI-NEXT: s_lshr_b32 s88, s8, 8
-; VI-NEXT: s_lshr_b32 vcc_hi, s11, 24
-; VI-NEXT: s_lshr_b32 s90, s11, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s11, 8
-; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
-; VI-NEXT: v_writelane_b32 v33, s31, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 45
+; VI-NEXT: s_lshr_b32 s46, s21, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 46
+; VI-NEXT: s_lshr_b32 s46, s21, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 61
+; VI-NEXT: s_lshr_b32 s46, s20, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 47
+; VI-NEXT: s_lshr_b32 s46, s20, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 63
+; VI-NEXT: s_lshr_b32 s46, s19, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 48
+; VI-NEXT: s_lshr_b32 s46, s19, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 49
+; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: s_lshr_b32 s46, s18, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 50
+; VI-NEXT: s_lshr_b32 s46, s18, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 6
+; VI-NEXT: s_lshr_b32 s46, s17, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 51
+; VI-NEXT: s_lshr_b32 s46, s17, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 52
+; VI-NEXT: s_lshr_b32 s46, s17, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 9
+; VI-NEXT: s_lshr_b32 s46, s16, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s16, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 10
+; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: v_writelane_b32 v34, s46, 58
+; VI-NEXT: s_lshr_b32 s46, s15, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 59
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: s_lshr_b32 s46, s41, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 62
+; VI-NEXT: s_lshr_b32 s46, s40, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 0
+; VI-NEXT: s_lshr_b32 s46, s40, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 1
+; VI-NEXT: s_lshr_b32 s46, s43, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: s_lshr_b32 s46, s43, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 3
+; VI-NEXT: s_lshr_b32 s46, s43, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 5
+; VI-NEXT: s_lshr_b32 s46, s42, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 7
+; VI-NEXT: s_lshr_b32 s46, s42, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 8
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v34, s47, 3
+; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v34, s47, 1
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s47, 15
+; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s47, 13
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s47, 11
+; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s47, 9
+; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s47, 7
+; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: s_lshr_b32 s75, s5, 24
+; VI-NEXT: s_lshr_b32 s38, s5, 16
+; VI-NEXT: s_lshr_b32 s78, s5, 8
+; VI-NEXT: s_lshr_b32 s79, s4, 16
+; VI-NEXT: s_lshr_b32 s89, s4, 8
+; VI-NEXT: s_lshr_b32 s91, s7, 24
+; VI-NEXT: s_lshr_b32 s58, s7, 16
+; VI-NEXT: s_lshr_b32 s31, s7, 8
+; VI-NEXT: s_lshr_b32 s35, s6, 16
+; VI-NEXT: s_lshr_b32 s90, s6, 8
+; VI-NEXT: s_lshr_b32 s37, s9, 24
+; VI-NEXT: s_lshr_b32 s34, s9, 16
+; VI-NEXT: s_lshr_b32 s36, s9, 8
+; VI-NEXT: s_lshr_b32 s56, s8, 8
+; VI-NEXT: s_lshr_b32 s57, s11, 8
+; VI-NEXT: s_lshr_b64 vcc, s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[64:65], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[68:69], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[80:81], s[20:21], 24
+; VI-NEXT: v_writelane_b32 v34, s47, 5
+; VI-NEXT: s_lshr_b64 s[60:61], s[40:41], 24
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
; VI-NEXT: s_mov_b64 s[48:49], 0
; VI-NEXT: s_branch .LBB99_3
; VI-NEXT: .LBB99_2:
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr30
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: s_mov_b64 s[48:49], -1
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 0
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s31, 1
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr57
+; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr36
+; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr90
+; VI-NEXT: ; implicit-def: $sgpr35
+; VI-NEXT: ; implicit-def: $sgpr31
+; VI-NEXT: ; implicit-def: $sgpr58
+; VI-NEXT: ; implicit-def: $sgpr91
+; VI-NEXT: ; implicit-def: $sgpr89
+; VI-NEXT: ; implicit-def: $sgpr79
+; VI-NEXT: ; implicit-def: $sgpr78
+; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr75
+; VI-NEXT: ; implicit-def: $sgpr80
+; VI-NEXT: ; implicit-def: $sgpr70
+; VI-NEXT: ; implicit-def: $sgpr68
+; VI-NEXT: ; implicit-def: $sgpr66
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $vcc_lo
+; VI-NEXT: ; implicit-def: $sgpr76
+; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 2
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s31, 3
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s30, 4
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s31, 5
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 6
-; VI-NEXT: v_writelane_b32 v33, s31, 7
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 8
-; VI-NEXT: v_writelane_b32 v33, s31, 9
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 10
-; VI-NEXT: v_writelane_b32 v33, s31, 11
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 12
-; VI-NEXT: v_writelane_b32 v33, s31, 13
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 14
-; VI-NEXT: v_writelane_b32 v33, s31, 15
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 16
-; VI-NEXT: v_writelane_b32 v33, s31, 17
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 18
-; VI-NEXT: v_writelane_b32 v33, s31, 19
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 20
-; VI-NEXT: v_writelane_b32 v33, s31, 21
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: v_writelane_b32 v33, s30, 22
-; VI-NEXT: v_writelane_b32 v33, s31, 23
-; VI-NEXT: ; implicit-def: $sgpr30
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr73
-; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr58
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr84
; VI-NEXT: ; implicit-def: $sgpr46
-; VI-NEXT: v_writelane_b32 v33, s30, 24
-; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr67
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr89
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr86
-; VI-NEXT: ; implicit-def: $sgpr75
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr71
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; kill: killed $sgpr47
-; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr90
-; VI-NEXT: ; implicit-def: $vcc_hi
-; VI-NEXT: ; implicit-def: $sgpr88
-; VI-NEXT: ; implicit-def: $sgpr91
-; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr79
-; VI-NEXT: ; implicit-def: $sgpr77
-; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr63
-; VI-NEXT: ; implicit-def: $sgpr59
-; VI-NEXT: ; implicit-def: $sgpr57
-; VI-NEXT: ; implicit-def: $sgpr61
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr69
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: v_writelane_b32 v33, s31, 25
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v34, s47, 1
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v34, s47, 3
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: v_writelane_b32 v34, s47, 5
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 6
+; VI-NEXT: v_writelane_b32 v34, s47, 7
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 8
+; VI-NEXT: v_writelane_b32 v34, s47, 9
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: v_writelane_b32 v34, s47, 11
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: v_writelane_b32 v34, s47, 13
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s47, 15
; VI-NEXT: .LBB99_3: ; %Flow
-; VI-NEXT: s_and_b64 s[48:49], s[48:49], exec
-; VI-NEXT: s_cselect_b32 s47, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s47, 1
-; VI-NEXT: s_mov_b32 s48, s55
-; VI-NEXT: s_mov_b32 s49, s68
-; VI-NEXT: s_mov_b32 s47, s69
-; VI-NEXT: s_mov_b32 s55, s56
-; VI-NEXT: s_mov_b32 s56, s61
-; VI-NEXT: s_mov_b32 s61, s63
-; VI-NEXT: s_mov_b32 s63, s76
-; VI-NEXT: s_mov_b32 s76, s77
-; VI-NEXT: v_readlane_b32 s77, v33, 26
-; VI-NEXT: s_mov_b32 s68, s79
-; VI-NEXT: v_readlane_b32 s79, v33, 27
-; VI-NEXT: s_mov_b32 s69, s91
-; VI-NEXT: s_mov_b32 s91, vcc_hi
-; VI-NEXT: v_readlane_b32 vcc_hi, v33, 28
+; VI-NEXT: v_writelane_b32 v34, s60, 16
+; VI-NEXT: v_writelane_b32 v34, s61, 17
+; VI-NEXT: v_writelane_b32 v34, s57, 18
+; VI-NEXT: v_writelane_b32 v34, s56, 19
+; VI-NEXT: v_writelane_b32 v34, s37, 20
+; VI-NEXT: v_writelane_b32 v34, s36, 21
+; VI-NEXT: v_writelane_b32 v34, s34, 22
+; VI-NEXT: v_writelane_b32 v34, s90, 23
+; VI-NEXT: v_writelane_b32 v34, s35, 24
+; VI-NEXT: v_writelane_b32 v34, s31, 25
+; VI-NEXT: v_writelane_b32 v34, s58, 26
+; VI-NEXT: v_writelane_b32 v34, s91, 27
+; VI-NEXT: v_writelane_b32 v34, s89, 28
+; VI-NEXT: v_writelane_b32 v34, s79, 29
+; VI-NEXT: s_and_b64 s[46:47], s[48:49], exec
+; VI-NEXT: v_writelane_b32 v34, s78, 30
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
+; VI-NEXT: v_readlane_b32 s39, v34, 31
+; VI-NEXT: v_readlane_b32 s54, v34, 32
+; VI-NEXT: v_readlane_b32 s57, v34, 33
+; VI-NEXT: v_readlane_b32 s52, v34, 34
+; VI-NEXT: v_readlane_b32 s56, v34, 35
+; VI-NEXT: v_readlane_b32 vcc_hi, v34, 36
+; VI-NEXT: v_readlane_b32 s78, v34, 37
+; VI-NEXT: v_readlane_b32 s90, v34, 38
+; VI-NEXT: v_readlane_b32 s58, v34, 39
+; VI-NEXT: v_readlane_b32 s30, v34, 40
+; VI-NEXT: v_readlane_b32 s34, v34, 41
+; VI-NEXT: v_readlane_b32 s65, v34, 42
+; VI-NEXT: v_readlane_b32 s55, v34, 43
+; VI-NEXT: s_mov_b32 s77, s38
+; VI-NEXT: v_readlane_b32 s67, v34, 44
+; VI-NEXT: v_readlane_b32 s69, v34, 45
+; VI-NEXT: v_readlane_b32 s60, v34, 46
+; VI-NEXT: v_readlane_b32 s71, v34, 47
+; VI-NEXT: v_readlane_b32 s82, v34, 48
+; VI-NEXT: v_readlane_b32 s81, v34, 49
+; VI-NEXT: v_readlane_b32 s62, v34, 50
+; VI-NEXT: v_readlane_b32 s72, v34, 51
+; VI-NEXT: v_readlane_b32 s59, v34, 52
+; VI-NEXT: v_readlane_b32 s88, v34, 53
+; VI-NEXT: v_readlane_b32 s46, v34, 54
+; VI-NEXT: v_readlane_b32 s37, v34, 55
+; VI-NEXT: v_readlane_b32 s53, v34, 56
+; VI-NEXT: v_readlane_b32 s63, v34, 57
+; VI-NEXT: v_readlane_b32 s49, v34, 58
+; VI-NEXT: v_readlane_b32 s48, v34, 59
+; VI-NEXT: v_readlane_b32 s83, v34, 60
+; VI-NEXT: v_readlane_b32 s73, v34, 61
+; VI-NEXT: v_readlane_b32 s35, v34, 62
+; VI-NEXT: v_readlane_b32 s84, v34, 63
+; VI-NEXT: v_readlane_b32 s47, v33, 0
+; VI-NEXT: v_readlane_b32 s79, v33, 1
+; VI-NEXT: v_readlane_b32 s31, v33, 2
+; VI-NEXT: v_readlane_b32 s91, v33, 3
+; VI-NEXT: v_readlane_b32 s85, v33, 4
+; VI-NEXT: v_readlane_b32 s61, v33, 5
+; VI-NEXT: v_readlane_b32 s86, v33, 6
+; VI-NEXT: v_readlane_b32 s89, v33, 7
+; VI-NEXT: v_readlane_b32 s38, v33, 8
+; VI-NEXT: v_readlane_b32 s87, v33, 9
+; VI-NEXT: v_readlane_b32 s36, v33, 10
+; VI-NEXT: v_readlane_b32 s50, v34, 4
+; VI-NEXT: v_readlane_b32 s51, v34, 5
; VI-NEXT: s_cbranch_scc1 .LBB99_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_and_b32 s46, s43, 0xffff0000
@@ -204118,478 +205648,484 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_or_b32 s45, s46, s45
; VI-NEXT: s_and_b32 s46, s44, 0xffff0000
; VI-NEXT: s_add_i32 s44, s44, 3
-; VI-NEXT: s_add_i32 s25, s25, 0x30000
+; VI-NEXT: s_add_i32 s45, s45, 0x30000
; VI-NEXT: s_and_b32 s44, s44, 0xffff
-; VI-NEXT: s_add_i32 s24, s24, 0x30000
; VI-NEXT: s_or_b32 s44, s46, s44
-; VI-NEXT: s_lshr_b32 s46, s25, 8
-; VI-NEXT: s_add_i32 s23, s23, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 29
-; VI-NEXT: s_lshr_b32 s46, s24, 8
-; VI-NEXT: s_add_i32 s22, s22, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 30
-; VI-NEXT: s_lshr_b32 s46, s23, 8
-; VI-NEXT: s_add_i32 s21, s21, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 31
-; VI-NEXT: s_lshr_b32 s46, s22, 8
-; VI-NEXT: s_add_i32 s20, s20, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 32
-; VI-NEXT: s_lshr_b32 s47, s21, 8
-; VI-NEXT: s_add_i32 s19, s19, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s47, 33
-; VI-NEXT: s_lshr_b32 s47, s20, 8
-; VI-NEXT: s_add_i32 s18, s18, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s47, 34
-; VI-NEXT: s_lshr_b32 s47, s19, 8
-; VI-NEXT: s_add_i32 s17, s17, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s47, 35
-; VI-NEXT: s_lshr_b32 s47, s18, 8
-; VI-NEXT: s_add_i32 s16, s16, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s47, 36
-; VI-NEXT: s_lshr_b32 s47, s17, 8
-; VI-NEXT: s_add_i32 s10, s10, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s47, 37
-; VI-NEXT: s_lshr_b32 s47, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s47, 38
-; VI-NEXT: s_lshr_b32 s30, s10, 16
-; VI-NEXT: s_add_i32 s13, s13, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 39
-; VI-NEXT: s_lshr_b32 s30, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 40
-; VI-NEXT: s_lshr_b32 s30, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s30, 41
-; VI-NEXT: s_lshr_b32 s30, s13, 16
-; VI-NEXT: s_add_i32 s12, s12, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 42
-; VI-NEXT: s_lshr_b32 s30, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 43
-; VI-NEXT: s_lshr_b32 s30, s12, 16
-; VI-NEXT: s_add_i32 s15, s15, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 44
-; VI-NEXT: s_lshr_b32 s30, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 45
-; VI-NEXT: s_lshr_b32 s30, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s30, 46
-; VI-NEXT: s_lshr_b32 s30, s15, 16
-; VI-NEXT: s_add_i32 s14, s14, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 47
-; VI-NEXT: s_lshr_b32 s30, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 48
-; VI-NEXT: s_lshr_b32 s30, s14, 16
-; VI-NEXT: s_add_i32 s41, s41, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 49
-; VI-NEXT: s_lshr_b32 s30, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 50
-; VI-NEXT: s_lshr_b32 s30, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s30, 51
-; VI-NEXT: s_lshr_b32 s30, s41, 16
-; VI-NEXT: s_add_i32 s40, s40, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 52
-; VI-NEXT: s_lshr_b32 s30, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 53
-; VI-NEXT: s_lshr_b32 s30, s40, 16
-; VI-NEXT: s_add_i32 s43, s43, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 54
-; VI-NEXT: s_lshr_b32 s30, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 55
-; VI-NEXT: s_lshr_b32 s30, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s30, 56
-; VI-NEXT: s_lshr_b32 s30, s43, 16
-; VI-NEXT: s_add_i32 s42, s42, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 57
-; VI-NEXT: s_lshr_b32 s30, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 58
-; VI-NEXT: s_lshr_b32 s30, s42, 16
-; VI-NEXT: s_add_i32 s45, s45, 0x30000
-; VI-NEXT: s_add_i32 s44, s44, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 59
-; VI-NEXT: s_lshr_b32 s30, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s30, 60
-; VI-NEXT: s_lshr_b64 s[30:31], s[44:45], 24
+; VI-NEXT: s_lshr_b32 s46, s45, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: s_lshr_b32 s46, s45, 16
; VI-NEXT: s_add_i32 s29, s29, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: s_lshr_b32 s46, s45, 8
; VI-NEXT: s_add_i32 s28, s28, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 8
-; VI-NEXT: v_writelane_b32 v33, s31, 9
-; VI-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
+; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: s_lshr_b32 s46, s29, 8
; VI-NEXT: s_add_i32 s27, s27, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s28, 8
; VI-NEXT: s_add_i32 s26, s26, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 6
-; VI-NEXT: v_writelane_b32 v33, s31, 7
-; VI-NEXT: s_lshr_b64 s[30:31], s[26:27], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 4
-; VI-NEXT: v_writelane_b32 v33, s31, 5
-; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 2
-; VI-NEXT: v_writelane_b32 v33, s31, 3
-; VI-NEXT: s_lshr_b64 s[30:31], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 55
+; VI-NEXT: s_lshr_b32 s46, s27, 8
+; VI-NEXT: s_add_i32 s25, s25, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 56
+; VI-NEXT: s_lshr_b32 s46, s26, 8
+; VI-NEXT: s_add_i32 s24, s24, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: s_lshr_b32 s46, s25, 8
; VI-NEXT: s_add_i32 s5, s5, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: s_lshr_b32 s46, s5, 16
; VI-NEXT: s_add_i32 s4, s4, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 0
-; VI-NEXT: v_writelane_b32 v33, s31, 1
-; VI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 4
+; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: s_add_i32 s7, s7, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 24
-; VI-NEXT: v_writelane_b32 v33, s31, 25
-; VI-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 0x30000
-; VI-NEXT: s_add_i32 s8, s8, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 22
-; VI-NEXT: v_writelane_b32 v33, s31, 23
-; VI-NEXT: s_lshr_b64 s[30:31], s[8:9], 24
-; VI-NEXT: s_add_i32 s11, s11, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s30, 20
-; VI-NEXT: v_writelane_b32 v33, s31, 21
-; VI-NEXT: s_lshr_b64 s[30:31], s[10:11], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 18
-; VI-NEXT: v_writelane_b32 v33, s31, 19
-; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 16
-; VI-NEXT: v_writelane_b32 v33, s31, 17
-; VI-NEXT: s_lshr_b64 s[30:31], s[14:15], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 14
-; VI-NEXT: v_writelane_b32 v33, s31, 15
-; VI-NEXT: s_lshr_b64 s[30:31], s[40:41], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 12
-; VI-NEXT: v_writelane_b32 v33, s31, 13
-; VI-NEXT: s_lshr_b64 s[30:31], s[42:43], 24
-; VI-NEXT: s_lshr_b32 s66, s45, 24
-; VI-NEXT: s_lshr_b32 s71, s45, 16
-; VI-NEXT: s_lshr_b32 s80, s45, 8
-; VI-NEXT: s_lshr_b32 s83, s44, 16
-; VI-NEXT: s_lshr_b32 s87, s44, 8
-; VI-NEXT: s_lshr_b32 s52, s29, 24
-; VI-NEXT: s_lshr_b32 s82, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s29, 8
-; VI-NEXT: s_lshr_b32 s86, s28, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 8
-; VI-NEXT: s_lshr_b32 s65, s27, 24
-; VI-NEXT: s_lshr_b32 s51, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s27, 8
-; VI-NEXT: s_lshr_b32 s85, s26, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s26, 8
-; VI-NEXT: s_lshr_b32 s50, s25, 24
-; VI-NEXT: s_lshr_b32 s67, s25, 16
-; VI-NEXT: s_lshr_b32 s54, s24, 16
-; VI-NEXT: s_lshr_b32 s64, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s81, s22, 16
-; VI-NEXT: s_lshr_b32 s46, s21, 24
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s58, s20, 16
-; VI-NEXT: s_lshr_b32 s60, s19, 24
-; VI-NEXT: s_lshr_b32 s62, s19, 16
-; VI-NEXT: s_lshr_b32 s72, s18, 16
-; VI-NEXT: s_lshr_b32 s74, s17, 24
-; VI-NEXT: s_lshr_b32 s73, s17, 16
-; VI-NEXT: s_lshr_b32 s77, s16, 16
-; VI-NEXT: s_lshr_b32 s48, s5, 24
-; VI-NEXT: s_lshr_b32 s49, s5, 16
-; VI-NEXT: s_lshr_b32 s53, s5, 8
-; VI-NEXT: s_lshr_b32 s47, s4, 16
-; VI-NEXT: s_lshr_b32 s55, s4, 8
-; VI-NEXT: s_lshr_b32 s56, s7, 24
-; VI-NEXT: s_lshr_b32 s57, s7, 16
-; VI-NEXT: s_lshr_b32 s59, s7, 8
-; VI-NEXT: s_lshr_b32 s61, s6, 16
-; VI-NEXT: s_lshr_b32 s63, s6, 8
-; VI-NEXT: s_lshr_b32 s76, s9, 24
-; VI-NEXT: s_lshr_b32 s68, s9, 16
-; VI-NEXT: s_lshr_b32 s78, s9, 8
-; VI-NEXT: s_lshr_b32 s69, s8, 16
-; VI-NEXT: s_lshr_b32 s88, s8, 8
-; VI-NEXT: s_lshr_b32 s91, s11, 24
-; VI-NEXT: s_lshr_b32 s90, s11, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s11, 8
-; VI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[36:37], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[38:39], s[16:17], 24
-; VI-NEXT: v_writelane_b32 v33, s30, 10
-; VI-NEXT: v_writelane_b32 v33, s31, 11
+; VI-NEXT: v_writelane_b32 v34, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: v_writelane_b32 v34, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: s_add_i32 s8, s8, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: s_add_i32 s11, s11, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: s_add_i32 s10, s10, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: v_writelane_b32 v34, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: s_add_i32 s13, s13, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: s_add_i32 s12, s12, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: s_add_i32 s15, s15, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: s_add_i32 s14, s14, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: s_lshr_b32 s46, s14, 16
+; VI-NEXT: s_add_i32 s41, s41, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: s_lshr_b32 s46, s14, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: s_lshr_b32 s46, s41, 24
+; VI-NEXT: s_add_i32 s19, s19, 0x30000
+; VI-NEXT: s_add_i32 s18, s18, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: s_lshr_b32 s46, s41, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24
+; VI-NEXT: s_add_i32 s17, s17, 0x30000
+; VI-NEXT: s_add_i32 s16, s16, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s46, 2
+; VI-NEXT: v_writelane_b32 v34, s47, 3
+; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 0
+; VI-NEXT: v_writelane_b32 v34, s47, 1
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 14
+; VI-NEXT: v_writelane_b32 v34, s47, 15
+; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 12
+; VI-NEXT: s_add_i32 s20, s20, 0x30000
+; VI-NEXT: s_add_i32 s23, s23, 0x30000
+; VI-NEXT: s_add_i32 s22, s22, 0x30000
+; VI-NEXT: s_add_i32 s44, s44, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s47, 13
+; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; VI-NEXT: s_lshr_b32 s88, s27, 24
+; VI-NEXT: s_lshr_b32 s89, s20, 16
+; VI-NEXT: s_lshr_b64 vcc, s[44:45], 24
+; VI-NEXT: s_lshr_b64 s[70:71], s[22:23], 24
+; VI-NEXT: v_writelane_b32 v34, s46, 10
+; VI-NEXT: s_add_i32 s21, s21, 0x30000
+; VI-NEXT: s_lshr_b32 s35, s16, 16
+; VI-NEXT: s_lshr_b32 s37, s15, 8
+; VI-NEXT: s_lshr_b32 s48, s41, 8
+; VI-NEXT: s_mov_b32 vcc_hi, s88
+; VI-NEXT: v_writelane_b32 v34, s47, 11
+; VI-NEXT: s_mov_b32 s71, s89
+; VI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; VI-NEXT: s_add_i32 s42, s42, 0x30000
+; VI-NEXT: s_lshr_b32 s72, s22, 16
+; VI-NEXT: s_lshr_b32 s76, s19, 16
+; VI-NEXT: s_lshr_b32 s77, s17, 24
+; VI-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[80:81], s[20:21], 24
+; VI-NEXT: s_mov_b32 s46, s35
+; VI-NEXT: s_mov_b32 s35, s48
+; VI-NEXT: s_mov_b32 s48, s37
+; VI-NEXT: v_readlane_b32 s37, v34, 55
+; VI-NEXT: v_writelane_b32 v34, s88, 8
+; VI-NEXT: s_lshr_b32 s53, s42, 16
+; VI-NEXT: s_mov_b32 s81, s76
+; VI-NEXT: s_mov_b32 s67, s72
+; VI-NEXT: v_writelane_b32 v34, s89, 9
+; VI-NEXT: s_mov_b32 s72, s77
+; VI-NEXT: s_lshr_b64 s[76:77], s[12:13], 24
+; VI-NEXT: s_add_i32 s40, s40, 0x30000
+; VI-NEXT: s_mov_b32 s89, s53
+; VI-NEXT: v_readlane_b32 s53, v34, 56
+; VI-NEXT: v_readlane_b32 s88, v34, 53
+; VI-NEXT: v_writelane_b32 v34, s76, 6
+; VI-NEXT: v_writelane_b32 v34, s77, 7
+; VI-NEXT: s_lshr_b64 s[76:77], s[40:41], 24
+; VI-NEXT: s_add_i32 s43, s43, 0x30000
+; VI-NEXT: v_writelane_b32 v34, s76, 16
+; VI-NEXT: s_lshr_b32 s59, s23, 24
+; VI-NEXT: s_lshr_b32 s74, s21, 24
+; VI-NEXT: s_lshr_b32 s50, s17, 16
+; VI-NEXT: s_lshr_b32 s51, s40, 16
+; VI-NEXT: s_lshr_b64 s[64:65], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[68:69], s[24:25], 24
+; VI-NEXT: v_writelane_b32 v34, s77, 17
+; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
+; VI-NEXT: s_lshr_b32 s39, s44, 16
+; VI-NEXT: s_lshr_b32 s54, s44, 8
+; VI-NEXT: s_lshr_b32 s57, s29, 24
+; VI-NEXT: s_lshr_b32 s52, s29, 16
+; VI-NEXT: s_lshr_b32 s56, s28, 16
+; VI-NEXT: s_lshr_b32 s78, s27, 16
+; VI-NEXT: s_lshr_b32 s90, s26, 16
+; VI-NEXT: s_lshr_b32 s58, s25, 24
+; VI-NEXT: s_lshr_b32 s30, s25, 16
+; VI-NEXT: s_lshr_b32 s34, s24, 16
+; VI-NEXT: s_lshr_b32 s55, s23, 16
+; VI-NEXT: s_lshr_b32 s63, s23, 8
+; VI-NEXT: s_lshr_b32 s83, s22, 8
+; VI-NEXT: s_lshr_b32 s60, s21, 16
+; VI-NEXT: s_lshr_b32 s73, s21, 8
+; VI-NEXT: s_lshr_b32 s84, s20, 8
+; VI-NEXT: s_lshr_b32 s82, s19, 24
+; VI-NEXT: s_lshr_b32 s85, s19, 8
+; VI-NEXT: s_lshr_b32 s62, s18, 16
+; VI-NEXT: s_lshr_b32 s86, s18, 8
+; VI-NEXT: s_lshr_b32 s87, s17, 8
+; VI-NEXT: s_lshr_b32 s36, s16, 8
+; VI-NEXT: s_lshr_b32 s75, s5, 24
+; VI-NEXT: s_lshr_b32 s49, s15, 16
+; VI-NEXT: s_lshr_b32 s79, s40, 8
+; VI-NEXT: s_lshr_b32 s31, s43, 24
+; VI-NEXT: s_lshr_b32 s91, s43, 16
+; VI-NEXT: s_lshr_b32 s61, s43, 8
+; VI-NEXT: s_lshr_b32 s38, s42, 8
+; VI-NEXT: s_mov_b32 s47, s51
+; VI-NEXT: s_mov_b32 s69, s74
+; VI-NEXT: s_mov_b32 s65, s59
+; VI-NEXT: s_mov_b32 s59, s50
+; VI-NEXT: s_lshr_b64 s[50:51], s[14:15], 24
+; VI-NEXT: v_readlane_b32 s77, v34, 4
; VI-NEXT: .LBB99_5: ; %end
-; VI-NEXT: v_mov_b32_e32 v6, s38
-; VI-NEXT: v_readlane_b32 s31, v33, 38
+; VI-NEXT: s_mov_b32 s74, s50
+; VI-NEXT: v_readlane_b32 s50, v34, 0
+; VI-NEXT: v_mov_b32_e32 v6, s50
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s31
-; VI-NEXT: v_perm_b32 v6, s77, v6, v1
-; VI-NEXT: v_readlane_b32 s31, v33, 37
+; VI-NEXT: v_mov_b32_e32 v2, s36
+; VI-NEXT: v_perm_b32 v6, s46, v6, v1
+; VI-NEXT: v_mov_b32_e32 v4, s87
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
-; VI-NEXT: v_mov_b32_e32 v24, s74
+; VI-NEXT: v_mov_b32_e32 v24, s72
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_mov_b32_e32 v4, s31
-; VI-NEXT: v_perm_b32 v24, s73, v24, v1
-; VI-NEXT: v_or_b32_e32 v3, v3, v6
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
-; VI-NEXT: v_mov_b32_e32 v9, s36
-; VI-NEXT: v_readlane_b32 s16, v33, 36
+; VI-NEXT: v_readlane_b32 s16, v34, 2
+; VI-NEXT: v_perm_b32 v24, s59, v24, v1
+; VI-NEXT: v_or_b32_e32 v3, v3, v6
+; VI-NEXT: v_mov_b32_e32 v10, s16
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, s16
-; VI-NEXT: v_perm_b32 v9, s72, v9, v1
+; VI-NEXT: v_mov_b32_e32 v4, s86
+; VI-NEXT: v_perm_b32 v10, s62, v10, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 35
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
-; VI-NEXT: v_mov_b32_e32 v25, s60
+; VI-NEXT: v_mov_b32_e32 v25, s82
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
-; VI-NEXT: v_mov_b32_e32 v7, s16
-; VI-NEXT: v_perm_b32 v25, s62, v25, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_mov_b32_e32 v7, s85
+; VI-NEXT: v_perm_b32 v25, s81, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
; VI-NEXT: v_perm_b32 v4, s19, v7, v1
-; VI-NEXT: v_mov_b32_e32 v12, s34
-; VI-NEXT: v_readlane_b32 s16, v33, 34
+; VI-NEXT: v_mov_b32_e32 v14, s80
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; VI-NEXT: v_mov_b32_e32 v7, s16
-; VI-NEXT: v_perm_b32 v12, s58, v12, v1
+; VI-NEXT: v_mov_b32_e32 v7, s84
+; VI-NEXT: v_perm_b32 v14, s71, v14, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_readlane_b32 s16, v33, 33
; VI-NEXT: v_perm_b32 v8, s20, v7, v1
-; VI-NEXT: v_mov_b32_e32 v26, s46
+; VI-NEXT: v_mov_b32_e32 v26, s69
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
-; VI-NEXT: v_mov_b32_e32 v10, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 0
-; VI-NEXT: v_perm_b32 v26, s84, v26, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; VI-NEXT: v_mov_b32_e32 v9, s73
+; VI-NEXT: v_perm_b32 v26, s60, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_perm_b32 v7, s21, v10, v1
-; VI-NEXT: v_mov_b32_e32 v15, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 32
+; VI-NEXT: v_perm_b32 v7, s21, v9, v1
+; VI-NEXT: v_mov_b32_e32 v17, s70
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_mov_b32_e32 v10, s16
-; VI-NEXT: v_perm_b32 v15, s81, v15, v1
+; VI-NEXT: v_mov_b32_e32 v9, s83
+; VI-NEXT: v_perm_b32 v17, s67, v17, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 1
-; VI-NEXT: v_readlane_b32 s16, v33, 31
-; VI-NEXT: v_perm_b32 v11, s22, v10, v1
-; VI-NEXT: v_mov_b32_e32 v27, s64
+; VI-NEXT: v_perm_b32 v11, s22, v9, v1
+; VI-NEXT: v_mov_b32_e32 v27, s65
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15
-; VI-NEXT: v_mov_b32_e32 v13, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 2
-; VI-NEXT: v_perm_b32 v27, s70, v27, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; VI-NEXT: v_mov_b32_e32 v12, s63
+; VI-NEXT: v_perm_b32 v27, s55, v27, v1
; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_perm_b32 v10, s23, v13, v1
-; VI-NEXT: v_mov_b32_e32 v20, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 30
+; VI-NEXT: v_perm_b32 v9, s23, v12, v1
+; VI-NEXT: v_mov_b32_e32 v20, s68
+; VI-NEXT: v_readlane_b32 s16, v33, 16
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; VI-NEXT: v_mov_b32_e32 v13, s16
-; VI-NEXT: v_perm_b32 v20, s54, v20, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 3
-; VI-NEXT: v_readlane_b32 s16, v33, 29
-; VI-NEXT: v_perm_b32 v14, s24, v13, v1
-; VI-NEXT: v_mov_b32_e32 v28, s50
+; VI-NEXT: v_mov_b32_e32 v12, s16
+; VI-NEXT: v_perm_b32 v20, s34, v20, v1
+; VI-NEXT: v_or_b32_e32 v2, v9, v2
+; VI-NEXT: v_readlane_b32 s16, v33, 15
+; VI-NEXT: v_perm_b32 v13, s24, v12, v1
+; VI-NEXT: v_mov_b32_e32 v28, s58
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v16, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 4
-; VI-NEXT: v_perm_b32 v28, s67, v28, v1
-; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_perm_b32 v13, s25, v16, v1
-; VI-NEXT: v_mov_b32_e32 v21, s16
+; VI-NEXT: v_mov_b32_e32 v15, s16
+; VI-NEXT: v_perm_b32 v28, s30, v28, v1
+; VI-NEXT: v_or_b32_e32 v2, v13, v2
+; VI-NEXT: v_perm_b32 v12, s25, v15, v1
+; VI-NEXT: v_mov_b32_e32 v21, s66
+; VI-NEXT: v_readlane_b32 s16, v33, 14
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
-; VI-NEXT: v_mov_b32_e32 v16, vcc_hi
-; VI-NEXT: v_perm_b32 v21, s85, v21, v1
-; VI-NEXT: v_or_b32_e32 v2, v13, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 5
-; VI-NEXT: v_perm_b32 v17, s26, v16, v1
-; VI-NEXT: v_mov_b32_e32 v29, s65
+; VI-NEXT: v_mov_b32_e32 v15, s16
+; VI-NEXT: v_perm_b32 v21, s90, v21, v1
+; VI-NEXT: v_or_b32_e32 v2, v12, v2
+; VI-NEXT: v_perm_b32 v16, s26, v15, v1
+; VI-NEXT: v_mov_b32_e32 v29, vcc_hi
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v18, s89
-; VI-NEXT: v_readlane_b32 s16, v33, 6
-; VI-NEXT: v_perm_b32 v29, s51, v29, v1
-; VI-NEXT: v_or_b32_e32 v2, v17, v2
-; VI-NEXT: v_perm_b32 v16, s27, v18, v1
-; VI-NEXT: v_mov_b32_e32 v22, s16
+; VI-NEXT: v_mov_b32_e32 v18, s53
+; VI-NEXT: v_perm_b32 v29, s78, v29, v1
+; VI-NEXT: v_or_b32_e32 v2, v16, v2
+; VI-NEXT: v_perm_b32 v15, s27, v18, v1
+; VI-NEXT: v_mov_b32_e32 v22, s64
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v18, s79
-; VI-NEXT: v_perm_b32 v22, s86, v22, v1
-; VI-NEXT: v_or_b32_e32 v2, v16, v2
-; VI-NEXT: v_readlane_b32 s17, v33, 7
+; VI-NEXT: v_mov_b32_e32 v18, s37
+; VI-NEXT: v_perm_b32 v22, s56, v22, v1
+; VI-NEXT: v_or_b32_e32 v2, v15, v2
; VI-NEXT: v_perm_b32 v19, s28, v18, v1
-; VI-NEXT: v_mov_b32_e32 v30, s52
+; VI-NEXT: v_mov_b32_e32 v30, s57
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s75
-; VI-NEXT: v_readlane_b32 s16, v33, 8
-; VI-NEXT: v_perm_b32 v30, s82, v30, v1
+; VI-NEXT: v_mov_b32_e32 v23, s88
+; VI-NEXT: v_perm_b32 v30, s52, v30, v1
; VI-NEXT: v_or_b32_e32 v2, v19, v2
; VI-NEXT: v_perm_b32 v18, s29, v23, v1
-; VI-NEXT: v_mov_b32_e32 v23, s16
+; VI-NEXT: v_mov_b32_e32 v23, vcc_lo
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
-; VI-NEXT: v_mov_b32_e32 v31, s87
-; VI-NEXT: v_perm_b32 v23, s83, v23, v1
+; VI-NEXT: v_mov_b32_e32 v31, s54
+; VI-NEXT: v_perm_b32 v23, s39, v23, v1
; VI-NEXT: v_or_b32_e32 v2, v18, v2
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s66
+; VI-NEXT: v_readlane_b32 s16, v33, 13
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: v_mov_b32_e32 v2, s80
-; VI-NEXT: v_perm_b32 v3, s71, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 11
+; VI-NEXT: v_mov_b32_e32 v3, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 12
+; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 9
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 60
+; VI-NEXT: v_mov_b32_e32 v3, s76
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 10
-; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 59
-; VI-NEXT: v_perm_b32 v3, s16, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_perm_b32 v3, s89, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 58
+; VI-NEXT: v_mov_b32_e32 v3, s31
+; VI-NEXT: v_readlane_b32 s17, v34, 3
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 56
-; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 57
-; VI-NEXT: v_perm_b32 v3, s16, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s61
+; VI-NEXT: v_perm_b32 v3, s91, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 11
+; VI-NEXT: v_readlane_b32 s16, v34, 16
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 55
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 12
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 54
-; VI-NEXT: v_perm_b32 v3, s16, v3, v1
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: v_mov_b32_e32 v2, s79
+; VI-NEXT: v_perm_b32 v3, s47, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_readlane_b32 s16, v33, 30
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 53
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 51
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 52
+; VI-NEXT: v_readlane_b32 s16, v33, 31
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_mov_b32_e32 v2, s35
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s17, v33, 13
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: v_readlane_b32 s16, v33, 29
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 14
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s14, v33, 49
+; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: v_readlane_b32 s14, v33, 28
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_readlane_b32 s14, v33, 27
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v33, 48
-; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
-; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 46
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 47
-; VI-NEXT: v_perm_b32 v3, s14, v3, v1
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: v_mov_b32_e32 v2, s48
+; VI-NEXT: v_perm_b32 v3, s49, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s14, v33, 45
+; VI-NEXT: v_readlane_b32 s14, v33, 26
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 16
+; VI-NEXT: v_readlane_b32 s14, v34, 6
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s12, v33, 44
+; VI-NEXT: v_readlane_b32 s12, v33, 25
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v33, 43
+; VI-NEXT: v_readlane_b32 s12, v33, 24
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 41
+; VI-NEXT: v_readlane_b32 s12, v33, 22
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 42
+; VI-NEXT: v_readlane_b32 s12, v33, 23
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_readlane_b32 s12, v33, 40
+; VI-NEXT: v_readlane_b32 s12, v33, 21
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 18
+; VI-NEXT: v_readlane_b32 s12, v34, 8
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s10, v33, 39
+; VI-NEXT: v_readlane_b32 s10, v33, 20
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s91
+; VI-NEXT: v_readlane_b32 s10, v34, 18
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
-; VI-NEXT: v_mov_b32_e32 v2, vcc_lo
-; VI-NEXT: v_perm_b32 v3, s90, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 18
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 19
+; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s10, v33, 20
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 19
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
-; VI-NEXT: v_mov_b32_e32 v2, s88
-; VI-NEXT: v_perm_b32 v3, s69, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v34, 10
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: v_readlane_b32 s8, v33, 17
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s76
+; VI-NEXT: v_readlane_b32 s8, v34, 21
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
-; VI-NEXT: v_mov_b32_e32 v2, s78
-; VI-NEXT: v_perm_b32 v3, s68, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 20
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 22
+; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s8, v33, 22
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 23
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
-; VI-NEXT: v_mov_b32_e32 v2, s63
-; VI-NEXT: v_perm_b32 v3, s61, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v34, 12
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: v_readlane_b32 s6, v34, 24
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s56
+; VI-NEXT: v_readlane_b32 s6, v34, 25
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
-; VI-NEXT: v_mov_b32_e32 v2, s59
-; VI-NEXT: v_perm_b32 v3, s57, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 27
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 26
+; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_readlane_b32 s6, v33, 24
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 28
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
-; VI-NEXT: v_mov_b32_e32 v2, s55
-; VI-NEXT: v_perm_b32 v3, s47, v3, v1
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v34, 14
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
+; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: v_readlane_b32 s4, v34, 29
+; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: v_readlane_b32 s4, v34, 30
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
-; VI-NEXT: v_mov_b32_e32 v2, s53
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_mov_b32_e32 v3, s75
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
-; VI-NEXT: v_perm_b32 v1, s49, v3, v1
+; VI-NEXT: v_perm_b32 v1, s77, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_readlane_b32 s51, v34, 1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s17, v33, 15
-; VI-NEXT: v_readlane_b32 s15, v33, 17
-; VI-NEXT: v_readlane_b32 s13, v33, 19
-; VI-NEXT: v_readlane_b32 s11, v33, 21
-; VI-NEXT: v_readlane_b32 s9, v33, 23
-; VI-NEXT: v_readlane_b32 s7, v33, 25
+; VI-NEXT: v_readlane_b32 s17, v34, 17
+; VI-NEXT: v_readlane_b32 s15, v34, 7
+; VI-NEXT: v_readlane_b32 s13, v34, 9
+; VI-NEXT: v_readlane_b32 s11, v34, 11
+; VI-NEXT: v_readlane_b32 s9, v34, 13
+; VI-NEXT: v_readlane_b32 s7, v34, 15
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
@@ -204625,6 +206161,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -204633,8 +206170,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -204709,8 +206246,6 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB99_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 49
; GFX9-NEXT: s_lshr_b32 s46, s5, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
@@ -204808,38 +206343,40 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: s_lshr_b32 s46, s8, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 1
; GFX9-NEXT: s_lshr_b32 s46, s8, 8
+; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 0
-; GFX9-NEXT: s_lshr_b32 s82, s11, 24
-; GFX9-NEXT: s_lshr_b32 s83, s11, 16
-; GFX9-NEXT: s_lshr_b32 s85, s11, 8
-; GFX9-NEXT: s_lshr_b32 s84, s10, 16
-; GFX9-NEXT: s_lshr_b32 s86, s10, 8
-; GFX9-NEXT: s_lshr_b32 s87, s13, 24
-; GFX9-NEXT: s_lshr_b32 s96, s13, 16
-; GFX9-NEXT: s_lshr_b32 s98, s13, 8
-; GFX9-NEXT: s_lshr_b32 s97, s12, 16
-; GFX9-NEXT: s_lshr_b32 s99, s12, 8
-; GFX9-NEXT: s_lshr_b32 s38, s15, 24
-; GFX9-NEXT: s_lshr_b32 s39, s15, 16
-; GFX9-NEXT: s_lshr_b32 s49, s15, 8
-; GFX9-NEXT: s_lshr_b32 s48, s14, 16
-; GFX9-NEXT: s_lshr_b32 s50, s14, 8
-; GFX9-NEXT: s_lshr_b32 s51, s41, 24
-; GFX9-NEXT: s_lshr_b32 s52, s41, 16
-; GFX9-NEXT: s_lshr_b32 s54, s41, 8
-; GFX9-NEXT: s_lshr_b32 s53, s40, 16
-; GFX9-NEXT: s_lshr_b32 s55, s40, 8
-; GFX9-NEXT: s_lshr_b32 s64, s43, 24
-; GFX9-NEXT: s_lshr_b32 s65, s43, 16
-; GFX9-NEXT: s_lshr_b32 s67, s43, 8
-; GFX9-NEXT: s_lshr_b32 s66, s42, 16
-; GFX9-NEXT: s_lshr_b32 s68, s42, 8
-; GFX9-NEXT: s_lshr_b32 s69, s45, 24
-; GFX9-NEXT: s_lshr_b32 s70, s45, 16
-; GFX9-NEXT: s_lshr_b32 s80, s45, 8
-; GFX9-NEXT: s_lshr_b32 s71, s44, 16
-; GFX9-NEXT: s_lshr_b32 s81, s44, 8
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s80, s11, 24
+; GFX9-NEXT: s_lshr_b32 s81, s11, 16
+; GFX9-NEXT: s_lshr_b32 s83, s11, 8
+; GFX9-NEXT: s_lshr_b32 s82, s10, 16
+; GFX9-NEXT: s_lshr_b32 s84, s10, 8
+; GFX9-NEXT: s_lshr_b32 s85, s13, 24
+; GFX9-NEXT: s_lshr_b32 s86, s13, 16
+; GFX9-NEXT: s_lshr_b32 s96, s13, 8
+; GFX9-NEXT: s_lshr_b32 s87, s12, 16
+; GFX9-NEXT: s_lshr_b32 s97, s12, 8
+; GFX9-NEXT: s_lshr_b32 s98, s15, 24
+; GFX9-NEXT: s_lshr_b32 s99, s15, 16
+; GFX9-NEXT: s_lshr_b32 s39, s15, 8
+; GFX9-NEXT: s_lshr_b32 s38, s14, 16
+; GFX9-NEXT: s_lshr_b32 s48, s14, 8
+; GFX9-NEXT: s_lshr_b32 s49, s41, 24
+; GFX9-NEXT: s_lshr_b32 s50, s41, 16
+; GFX9-NEXT: s_lshr_b32 s52, s41, 8
+; GFX9-NEXT: s_lshr_b32 s51, s40, 16
+; GFX9-NEXT: s_lshr_b32 s53, s40, 8
+; GFX9-NEXT: s_lshr_b32 s54, s43, 24
+; GFX9-NEXT: s_lshr_b32 s55, s43, 16
+; GFX9-NEXT: s_lshr_b32 s65, s43, 8
+; GFX9-NEXT: s_lshr_b32 s64, s42, 16
+; GFX9-NEXT: s_lshr_b32 s66, s42, 8
+; GFX9-NEXT: s_lshr_b32 s67, s45, 24
+; GFX9-NEXT: s_lshr_b32 s68, s45, 16
+; GFX9-NEXT: s_lshr_b32 s70, s45, 8
+; GFX9-NEXT: s_lshr_b32 s69, s44, 16
+; GFX9-NEXT: s_lshr_b32 s71, s44, 8
+; GFX9-NEXT: s_mov_b32 s47, s56
; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24
; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24
@@ -204863,36 +206400,37 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: s_mov_b64 s[36:37], -1
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr65
+; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr65
; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr53
; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr53
; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr52
; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr96
; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr84
; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr84
; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr80
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
@@ -205003,12 +206541,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB99_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; GFX9-NEXT: s_cselect_b32 s47, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s47, 1
+; GFX9-NEXT: s_cselect_b32 s57, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s57, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB99_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_pk_add_u16 v26, s5, 3 op_sel_hi:[1,0]
@@ -205016,373 +206552,370 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26]
; GFX9-NEXT: v_pk_add_u16 v28, s29, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v27, s28, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28]
; GFX9-NEXT: v_pk_add_u16 v30, s27, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v29, s26, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: v_pk_add_u16 v32, s25, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v31, s24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32]
-; GFX9-NEXT: v_pk_add_u16 v34, s23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v33, s22, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[33:34]
-; GFX9-NEXT: v_pk_add_u16 v38, s19, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v36, s21, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v35, s20, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v38
-; GFX9-NEXT: v_pk_add_u16 v49, s17, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v38
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30]
; GFX9-NEXT: v_pk_add_u16 v2, s7, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v1, s6, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v49
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v49
+; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[31:32]
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
; GFX9-NEXT: v_pk_add_u16 v4, s9, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1
; GFX9-NEXT: v_pk_add_u16 v3, s8, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v4
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
; GFX9-NEXT: v_pk_add_u16 v6, s11, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v5, s10, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v3
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v3
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v6
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
; GFX9-NEXT: v_pk_add_u16 v8, s13, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v7, s12, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v6
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[7:8]
; GFX9-NEXT: v_pk_add_u16 v10, s15, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v9, s14, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v5
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v8
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
; GFX9-NEXT: v_pk_add_u16 v12, s41, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v11, s40, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v8
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v7
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v7
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
; GFX9-NEXT: v_pk_add_u16 v14, s43, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v13, s42, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v10
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v10
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
; GFX9-NEXT: v_pk_add_u16 v20, s45, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_pk_add_u16 v19, s44, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v9
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[19:20]
+; GFX9-NEXT: v_pk_add_u16 v38, s19, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v38
+; GFX9-NEXT: v_pk_add_u16 v49, s17, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v4
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v3
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v5
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v7
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v10
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v9
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v12
+; GFX9-NEXT: v_mov_b32_e32 v18, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v12
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v12
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v26
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v11
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v11
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v13
+; GFX9-NEXT: v_pk_add_u16 v36, s21, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v35, s20, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v20
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v20
; GFX9-NEXT: v_pk_add_u16 v37, s18, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_pk_add_u16 v34, s23, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[35:36]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v20
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v20
; GFX9-NEXT: v_pk_add_u16 v48, s16, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[37:38]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_pk_add_u16 v33, s22, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[37:38]
+; GFX9-NEXT: v_mov_b32_e32 v24, v16
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v36
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v20
-; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[48:49]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v20
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[33:34]
+; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v36
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v28
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v25
; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27
; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v30
; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v32
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v31
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v31
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v33
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v19
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: s_branch .LBB99_6
; GFX9-NEXT: .LBB99_5:
-; GFX9-NEXT: v_mov_b32_e32 v15, s81
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s71
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s80
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s70
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s69
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s70
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s68
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s66
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s67
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s65
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s66
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s64
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s65
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s55
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s54
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s52
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s53
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s51
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s52
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s50
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s48
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s49
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s39
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s48
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s38
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s39
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s99
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s97
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s98
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s96
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s97
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s87
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s96
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s86
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s84
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s85
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s84
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s82
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s83
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s81
; GFX9-NEXT: v_mov_b32_e32 v25, s4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s82
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s80
; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v17, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
; GFX9-NEXT: v_mov_b32_e32 v50, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: v_mov_b32_e32 v52, s4
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: v_mov_b32_e32 v24, s4
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
; GFX9-NEXT: v_mov_b32_e32 v21, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v15, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
; GFX9-NEXT: v_mov_b32_e32 v61, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
; GFX9-NEXT: v_mov_b32_e32 v23, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: v_mov_b32_e32 v53, s4
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 31
; GFX9-NEXT: v_mov_b32_e32 v60, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 32
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
; GFX9-NEXT: v_mov_b32_e32 v57, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
@@ -205390,71 +206923,80 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
; GFX9-NEXT: v_mov_b32_e32 v56, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 40
; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 41
; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s46
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s56
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s47
+; GFX9-NEXT: v_mov_b32_e32 v19, s44
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s46
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v45, s78
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s56
+; GFX9-NEXT: v_mov_b32_e32 v52, s62
+; GFX9-NEXT: v_mov_b32_e32 v45, v51
+; GFX9-NEXT: v_mov_b32_e32 v51, s88
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s58
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s60
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v18, s58
+; GFX9-NEXT: v_mov_b32_e32 v51, v17
+; GFX9-NEXT: v_mov_b32_e32 v17, s90
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s62
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s92
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s72
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s94
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s78
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, vcc_lo
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v40, s88
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s30
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v19, s44
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v17, s34
; GFX9-NEXT: v_mov_b32_e32 v20, s45
; GFX9-NEXT: v_mov_b32_e32 v13, s42
; GFX9-NEXT: v_mov_b32_e32 v14, s43
@@ -205485,63 +207027,39 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v27, s28
; GFX9-NEXT: v_mov_b32_e32 v28, s29
; GFX9-NEXT: v_mov_b32_e32 v26, s5
-; GFX9-NEXT: v_mov_b32_e32 v43, s74
-; GFX9-NEXT: v_mov_b32_e32 v44, s76
-; GFX9-NEXT: v_mov_b32_e32 v40, v41
-; GFX9-NEXT: v_mov_b32_e32 v41, v45
-; GFX9-NEXT: v_mov_b32_e32 v45, v22
-; GFX9-NEXT: v_mov_b32_e32 v22, s90
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s92
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s94
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, vcc_lo
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s30
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v22, s34
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v24, s60
+; GFX9-NEXT: v_mov_b32_e32 v39, s72
+; GFX9-NEXT: v_mov_b32_e32 v40, s74
+; GFX9-NEXT: v_mov_b32_e32 v41, s76
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB99_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v37, v37, v52, s4
-; GFX9-NEXT: v_perm_b32 v31, v31, v53, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v33, v33, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v21, v35, v21, s4
+; GFX9-NEXT: v_perm_b32 v35, v61, v52, s4
+; GFX9-NEXT: v_perm_b32 v32, v32, v53, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4
; GFX9-NEXT: v_perm_b32 v16, v36, v16, s4
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v24, v38, v24, s4
-; GFX9-NEXT: v_perm_b32 v17, v28, v17, s4
-; GFX9-NEXT: v_perm_b32 v48, v48, v55, s4
+; GFX9-NEXT: v_perm_b32 v22, v22, v41, s4
+; GFX9-NEXT: v_perm_b32 v48, v48, v44, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v48, v22
; GFX9-NEXT: v_perm_b32 v49, v49, v50, s4
-; GFX9-NEXT: v_perm_b32 v50, v54, v43, s4
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v39, v39, v44, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39
-; GFX9-NEXT: v_or_b32_e32 v39, v48, v39
-; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4
-; GFX9-NEXT: v_perm_b32 v32, v32, v59, s4
+; GFX9-NEXT: v_perm_b32 v50, v43, v40, s4
+; GFX9-NEXT: v_perm_b32 v37, v37, v42, s4
+; GFX9-NEXT: v_perm_b32 v38, v38, v55, s4
+; GFX9-NEXT: v_perm_b32 v39, v54, v39, s4
+; GFX9-NEXT: v_perm_b32 v24, v60, v24, s4
+; GFX9-NEXT: v_perm_b32 v31, v31, v59, s4
+; GFX9-NEXT: v_perm_b32 v18, v58, v18, s4
; GFX9-NEXT: v_perm_b32 v29, v29, v57, s4
; GFX9-NEXT: v_perm_b32 v30, v30, v56, s4
; GFX9-NEXT: v_perm_b32 v27, v27, v46, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v45, s4
; GFX9-NEXT: v_readlane_b32 s30, v63, 34
; GFX9-NEXT: v_readlane_b32 s31, v63, 35
; GFX9-NEXT: v_readlane_b32 s99, v63, 33
@@ -205579,271 +207097,270 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v36, v58, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v22, v25, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v35, v61, v35, s4
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4
-; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v18, v21, v18
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v38, v47, v52, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v25, v26, v15, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v34, v60, v54, s4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v28, v51, v52, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v17, v28, v15, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v34, v47, v52, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v25, v15, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v28, v45, v52, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v15, v51, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v26, v26, v15, s4
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v36, v15, v52, s4
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v19, v19, v15, s4
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v20, v20, v15, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4
-; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v39, v39, v48, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39
-; GFX9-NEXT: v_or_b32_e32 v39, v49, v39
-; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v50
-; GFX9-NEXT: v_or_b32_e32 v37, v37, v39
-; GFX9-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v22, v48, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v49, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v22, v37, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v37, v37, v39, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; GFX9-NEXT: v_or_b32_e32 v24, v24, v37
-; GFX9-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v22, v22, v37, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX9-NEXT: v_or_b32_e32 v22, v38, v22
+; GFX9-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v39
+; GFX9-NEXT: v_or_b32_e32 v21, v21, v22
+; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v18, v18, v21, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v16, v16, v18
+; GFX9-NEXT: v_perm_b32 v21, v21, v22, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX9-NEXT: v_or_b32_e32 v16, v16, v21
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v35
; GFX9-NEXT: v_or_b32_e32 v16, v33, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v23, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v24
; GFX9-NEXT: v_or_b32_e32 v16, v31, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
+; GFX9-NEXT: v_perm_b32 v16, v16, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v32, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v18
; GFX9-NEXT: v_or_b32_e32 v16, v29, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v30, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34
; GFX9-NEXT: v_or_b32_e32 v16, v27, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v28
-; GFX9-NEXT: v_or_b32_e32 v16, v22, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX9-NEXT: v_or_b32_e32 v16, v26, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v26
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36
; GFX9-NEXT: v_or_b32_e32 v16, v19, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; GFX9-NEXT: v_or_b32_e32 v16, v20, v16
; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4
; GFX9-NEXT: v_or_b32_e32 v13, v13, v15
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_or_b32_e32 v13, v13, v14
; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX9-NEXT: v_or_b32_e32 v11, v11, v13
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX9-NEXT: v_or_b32_e32 v11, v11, v12
; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX9-NEXT: v_or_b32_e32 v9, v9, v11
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_or_b32_e32 v9, v9, v10
; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX9-NEXT: v_or_b32_e32 v7, v7, v9
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4
; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_or_b32_e32 v3, v3, v5
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: v_perm_b32 v1, v2, v41, s4
-; GFX9-NEXT: v_perm_b32 v2, v40, v42, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v51, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
@@ -205862,8 +207379,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -205971,219 +207488,211 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: v_readfirstlane_b32 s41, v2
; GFX11-NEXT: v_readfirstlane_b32 s40, v1
; GFX11-NEXT: s_cmp_lg_u32 s42, 0
-; GFX11-NEXT: s_mov_b32 s100, 0
-; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane
+; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane
; GFX11-NEXT: s_cbranch_scc0 .LBB99_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-NEXT: s_lshr_b32 s30, s5, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 7
-; GFX11-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-NEXT: s_lshr_b32 s31, s5, 16
-; GFX11-NEXT: s_lshr_b32 s35, s5, 8
-; GFX11-NEXT: s_lshr_b32 s34, s4, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 6
-; GFX11-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-NEXT: s_lshr_b32 s36, s4, 8
-; GFX11-NEXT: s_lshr_b32 s37, s7, 24
-; GFX11-NEXT: s_lshr_b32 s38, s7, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 5
-; GFX11-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-NEXT: s_lshr_b32 s48, s7, 8
-; GFX11-NEXT: s_lshr_b32 s39, s6, 16
-; GFX11-NEXT: s_lshr_b32 s49, s6, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 4
-; GFX11-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-NEXT: s_lshr_b32 s50, s9, 24
-; GFX11-NEXT: s_lshr_b32 s51, s9, 16
-; GFX11-NEXT: s_lshr_b32 s53, s9, 8
-; GFX11-NEXT: v_writelane_b32 v77, s42, 3
-; GFX11-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-NEXT: s_lshr_b32 s52, s8, 16
-; GFX11-NEXT: s_lshr_b32 s54, s8, 8
-; GFX11-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-NEXT: v_writelane_b32 v77, s42, 2
-; GFX11-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-NEXT: s_lshr_b32 s64, s11, 16
-; GFX11-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-NEXT: s_lshr_b32 s65, s10, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 1
-; GFX11-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-NEXT: s_lshr_b32 s67, s10, 8
-; GFX11-NEXT: s_lshr_b32 s68, s13, 24
-; GFX11-NEXT: s_lshr_b32 s69, s13, 16
-; GFX11-NEXT: v_writelane_b32 v77, s42, 0
-; GFX11-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-NEXT: s_lshr_b32 s71, s13, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 31
-; GFX11-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-NEXT: s_lshr_b32 s70, s12, 16
-; GFX11-NEXT: s_lshr_b32 s80, s12, 8
-; GFX11-NEXT: s_lshr_b32 s81, s15, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 30
-; GFX11-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-NEXT: s_lshr_b32 s82, s15, 16
-; GFX11-NEXT: s_lshr_b32 s84, s15, 8
-; GFX11-NEXT: s_lshr_b32 s83, s14, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 29
-; GFX11-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-NEXT: s_lshr_b32 s85, s14, 8
-; GFX11-NEXT: s_lshr_b32 s86, s41, 24
-; GFX11-NEXT: s_lshr_b32 s87, s41, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 28
-; GFX11-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-NEXT: s_lshr_b32 s97, s41, 8
-; GFX11-NEXT: s_lshr_b32 s96, s40, 16
-; GFX11-NEXT: s_lshr_b32 s98, s40, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 27
-; GFX11-NEXT: s_lshr_b32 s42, s22, 16
-; GFX11-NEXT: s_lshr_b32 s99, s29, 24
-; GFX11-NEXT: s_lshr_b32 s101, s29, 16
-; GFX11-NEXT: s_lshr_b32 s103, s29, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 26
-; GFX11-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-NEXT: s_lshr_b32 s102, s28, 16
-; GFX11-NEXT: s_lshr_b32 s104, s28, 8
-; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 25
; GFX11-NEXT: s_lshr_b32 s42, s21, 24
-; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-NEXT: s_lshr_b32 s42, s21, 16
-; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 23
-; GFX11-NEXT: s_lshr_b32 s42, s21, 8
-; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-NEXT: s_lshr_b32 s59, s11, 8
+; GFX11-NEXT: s_lshr_b32 s76, s10, 16
+; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-NEXT: s_lshr_b32 s42, s20, 16
-; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-NEXT: s_lshr_b32 s87, s27, 24
+; GFX11-NEXT: s_lshr_b32 s85, s27, 16
+; GFX11-NEXT: s_lshr_b32 s86, s27, 8
+; GFX11-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-NEXT: s_lshr_b32 s42, s20, 8
-; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
-; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-NEXT: s_lshr_b32 s83, s26, 16
+; GFX11-NEXT: s_lshr_b32 s84, s26, 8
+; GFX11-NEXT: s_lshr_b32 s80, s25, 24
+; GFX11-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-NEXT: s_lshr_b32 s81, s25, 16
+; GFX11-NEXT: s_lshr_b32 s82, s25, 8
+; GFX11-NEXT: s_lshr_b32 s70, s24, 16
+; GFX11-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-NEXT: s_lshr_b32 s42, s19, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-NEXT: s_lshr_b32 s71, s24, 8
+; GFX11-NEXT: s_lshr_b32 s69, s23, 24
+; GFX11-NEXT: s_lshr_b32 s67, s23, 16
+; GFX11-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-NEXT: s_lshr_b32 s68, s23, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 31
; GFX11-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-NEXT: s_lshr_b32 s65, s22, 16
+; GFX11-NEXT: s_lshr_b32 s66, s22, 8
+; GFX11-NEXT: s_lshr_b32 s64, s21, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 30
; GFX11-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-NEXT: s_lshr_b32 s53, s5, 24
+; GFX11-NEXT: s_lshr_b32 s54, s5, 16
+; GFX11-NEXT: s_lshr_b32 s55, s5, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 29
; GFX11-NEXT: s_lshr_b32 s42, s17, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-NEXT: s_lshr_b32 s51, s4, 16
+; GFX11-NEXT: s_lshr_b32 s52, s4, 8
+; GFX11-NEXT: s_lshr_b32 s50, s7, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 28
; GFX11-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-NEXT: s_lshr_b32 s48, s7, 16
+; GFX11-NEXT: s_lshr_b32 s49, s7, 8
+; GFX11-NEXT: s_lshr_b32 s38, s6, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 27
; GFX11-NEXT: s_lshr_b32 s42, s17, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-NEXT: s_lshr_b32 s39, s6, 8
+; GFX11-NEXT: s_lshr_b32 s35, s9, 24
+; GFX11-NEXT: s_lshr_b32 s36, s9, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 26
; GFX11-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-NEXT: s_lshr_b32 s37, s9, 8
+; GFX11-NEXT: s_lshr_b32 s31, s8, 16
+; GFX11-NEXT: s_lshr_b32 s34, s8, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 25
; GFX11-NEXT: s_lshr_b32 s42, s16, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-NEXT: s_lshr_b32 s30, s11, 24
+; GFX11-NEXT: s_lshr_b32 s63, s11, 16
+; GFX11-NEXT: s_lshr_b32 s61, s10, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 24
; GFX11-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-NEXT: s_lshr_b32 s45, s13, 24
+; GFX11-NEXT: s_lshr_b32 s47, s13, 16
+; GFX11-NEXT: s_lshr_b32 s57, s13, 8
+; GFX11-NEXT: v_writelane_b32 v77, s42, 23
; GFX11-NEXT: s_lshr_b32 s42, s3, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-NEXT: s_lshr_b32 s62, s12, 16
+; GFX11-NEXT: s_lshr_b32 s43, s12, 8
+; GFX11-NEXT: s_lshr_b32 s60, s15, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 22
; GFX11-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-NEXT: s_lshr_b32 s56, s15, 16
+; GFX11-NEXT: s_lshr_b32 s58, s15, 8
+; GFX11-NEXT: s_lshr_b32 s44, s14, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 21
; GFX11-NEXT: s_lshr_b32 s42, s2, 16
-; GFX11-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-NEXT: s_lshr_b32 s46, s14, 8
+; GFX11-NEXT: s_lshr_b32 s103, s41, 24
+; GFX11-NEXT: s_lshr_b32 s104, s41, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 20
; GFX11-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-NEXT: s_lshr_b32 s101, s40, 16
+; GFX11-NEXT: s_lshr_b32 s102, s40, 8
+; GFX11-NEXT: s_lshr_b32 s100, s29, 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 19
; GFX11-NEXT: s_lshr_b32 s42, s1, 24
-; GFX11-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-NEXT: s_lshr_b32 s98, s29, 16
+; GFX11-NEXT: s_lshr_b32 s99, s29, 8
+; GFX11-NEXT: s_lshr_b32 s96, s28, 16
+; GFX11-NEXT: v_writelane_b32 v77, s42, 18
; GFX11-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-NEXT: s_lshr_b32 s97, s28, 8
+; GFX11-NEXT: s_mov_b32 s73, s59
+; GFX11-NEXT: s_mov_b32 s59, s76
+; GFX11-NEXT: v_writelane_b32 v77, s42, 17
; GFX11-NEXT: s_lshr_b32 s42, s1, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
+; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
+; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 16
; GFX11-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
+; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 15
; GFX11-NEXT: s_lshr_b32 s42, s0, 8
-; GFX11-NEXT: v_writelane_b32 v76, s42, 0
-; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-NEXT: s_lshr_b64 vcc, s[28:29], 24
+; GFX11-NEXT: v_writelane_b32 v77, s42, 14
+; GFX11-NEXT: s_lshr_b32 s42, s41, 8
+; GFX11-NEXT: v_writelane_b32 v77, s74, 12
+; GFX11-NEXT: v_writelane_b32 v77, s75, 13
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 10
+; GFX11-NEXT: v_writelane_b32 v77, s75, 11
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 8
+; GFX11-NEXT: v_writelane_b32 v77, s75, 9
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[18:19], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 6
+; GFX11-NEXT: v_writelane_b32 v77, s75, 7
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[16:17], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 4
+; GFX11-NEXT: v_writelane_b32 v77, s75, 5
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[2:3], 24
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: v_writelane_b32 v77, s74, 2
+; GFX11-NEXT: v_writelane_b32 v77, s75, 3
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
+; GFX11-NEXT: v_writelane_b32 v77, s74, 0
+; GFX11-NEXT: v_writelane_b32 v77, s75, 1
+; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
+; GFX11-NEXT: s_mov_b32 s75, 0
; GFX11-NEXT: s_branch .LBB99_3
; GFX11-NEXT: .LBB99_2:
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: s_mov_b32 s100, -1
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: s_mov_b32 s75, -1
; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: ; kill: killed $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr42
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr44
+; GFX11-NEXT: ; implicit-def: $sgpr64
+; GFX11-NEXT: ; implicit-def: $sgpr66
+; GFX11-NEXT: ; implicit-def: $sgpr65
+; GFX11-NEXT: ; implicit-def: $sgpr68
+; GFX11-NEXT: ; implicit-def: $sgpr67
+; GFX11-NEXT: ; implicit-def: $sgpr69
+; GFX11-NEXT: ; implicit-def: $sgpr71
+; GFX11-NEXT: ; implicit-def: $sgpr70
+; GFX11-NEXT: ; implicit-def: $sgpr82
+; GFX11-NEXT: ; implicit-def: $sgpr81
+; GFX11-NEXT: ; implicit-def: $sgpr80
+; GFX11-NEXT: ; implicit-def: $sgpr84
+; GFX11-NEXT: ; implicit-def: $sgpr83
+; GFX11-NEXT: ; implicit-def: $sgpr86
+; GFX11-NEXT: ; implicit-def: $sgpr85
+; GFX11-NEXT: ; implicit-def: $sgpr87
+; GFX11-NEXT: ; implicit-def: $sgpr97
+; GFX11-NEXT: ; implicit-def: $sgpr96
+; GFX11-NEXT: ; implicit-def: $sgpr99
+; GFX11-NEXT: ; implicit-def: $sgpr98
+; GFX11-NEXT: ; implicit-def: $sgpr100
+; GFX11-NEXT: ; implicit-def: $sgpr102
+; GFX11-NEXT: ; implicit-def: $sgpr101
+; GFX11-NEXT: ; implicit-def: $sgpr104
+; GFX11-NEXT: ; implicit-def: $sgpr103
; GFX11-NEXT: ; implicit-def: $sgpr46
-; GFX11-NEXT: ; implicit-def: $sgpr56
+; GFX11-NEXT: ; implicit-def: $sgpr44
; GFX11-NEXT: ; implicit-def: $sgpr58
+; GFX11-NEXT: ; implicit-def: $sgpr56
; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr62
-; GFX11-NEXT: ; implicit-def: $sgpr104
-; GFX11-NEXT: ; implicit-def: $sgpr102
-; GFX11-NEXT: ; implicit-def: $sgpr103
-; GFX11-NEXT: ; implicit-def: $sgpr101
-; GFX11-NEXT: ; implicit-def: $sgpr99
-; GFX11-NEXT: ; implicit-def: $sgpr98
-; GFX11-NEXT: ; implicit-def: $sgpr96
-; GFX11-NEXT: ; implicit-def: $sgpr97
-; GFX11-NEXT: ; implicit-def: $sgpr87
-; GFX11-NEXT: ; implicit-def: $sgpr86
-; GFX11-NEXT: ; implicit-def: $sgpr85
-; GFX11-NEXT: ; implicit-def: $sgpr83
-; GFX11-NEXT: ; implicit-def: $sgpr84
-; GFX11-NEXT: ; implicit-def: $sgpr82
-; GFX11-NEXT: ; implicit-def: $sgpr81
-; GFX11-NEXT: ; implicit-def: $sgpr80
-; GFX11-NEXT: ; implicit-def: $sgpr70
-; GFX11-NEXT: ; implicit-def: $sgpr71
-; GFX11-NEXT: ; implicit-def: $sgpr69
-; GFX11-NEXT: ; implicit-def: $sgpr68
-; GFX11-NEXT: ; implicit-def: $sgpr67
-; GFX11-NEXT: ; implicit-def: $sgpr65
-; GFX11-NEXT: ; implicit-def: $sgpr66
-; GFX11-NEXT: ; implicit-def: $sgpr64
-; GFX11-NEXT: ; implicit-def: $sgpr55
-; GFX11-NEXT: ; implicit-def: $sgpr54
-; GFX11-NEXT: ; implicit-def: $sgpr52
-; GFX11-NEXT: ; implicit-def: $sgpr53
-; GFX11-NEXT: ; implicit-def: $sgpr51
-; GFX11-NEXT: ; implicit-def: $sgpr50
-; GFX11-NEXT: ; implicit-def: $sgpr49
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr57
+; GFX11-NEXT: ; implicit-def: $sgpr47
+; GFX11-NEXT: ; implicit-def: $sgpr45
+; GFX11-NEXT: ; implicit-def: $sgpr61
+; GFX11-NEXT: ; implicit-def: $sgpr59
+; GFX11-NEXT: ; implicit-def: $sgpr73
+; GFX11-NEXT: ; implicit-def: $sgpr63
+; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr31
; GFX11-NEXT: ; implicit-def: $sgpr37
; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr34
; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr39
+; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr49
+; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr50
+; GFX11-NEXT: ; implicit-def: $sgpr52
+; GFX11-NEXT: ; implicit-def: $sgpr51
+; GFX11-NEXT: ; implicit-def: $sgpr55
+; GFX11-NEXT: ; implicit-def: $sgpr54
+; GFX11-NEXT: ; implicit-def: $sgpr53
; GFX11-NEXT: ; implicit-def: $sgpr72
; GFX11-NEXT: ; implicit-def: $vcc_lo
; GFX11-NEXT: ; implicit-def: $sgpr94
@@ -206193,86 +207702,85 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: ; implicit-def: $sgpr78
; GFX11-NEXT: ; implicit-def: $sgpr76
; GFX11-NEXT: ; implicit-def: $sgpr74
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-NEXT: v_writelane_b32 v77, s43, 1
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-NEXT: v_writelane_b32 v77, s43, 3
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-NEXT: v_writelane_b32 v77, s43, 5
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-NEXT: v_writelane_b32 v77, s43, 7
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 8
+; GFX11-NEXT: v_writelane_b32 v77, s43, 9
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: ; kill: killed $sgpr42
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 10
+; GFX11-NEXT: v_writelane_b32 v77, s43, 11
+; GFX11-NEXT: ; implicit-def: $sgpr42
+; GFX11-NEXT: v_writelane_b32 v77, s42, 12
+; GFX11-NEXT: v_writelane_b32 v77, s43, 13
+; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
-; GFX11-NEXT: ; implicit-def: $sgpr43
-; GFX11-NEXT: ; kill: killed $sgpr43
; GFX11-NEXT: .LBB99_3: ; %Flow
-; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s43, s100, exec_lo
-; GFX11-NEXT: s_cselect_b32 s43, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s43, 1
+; GFX11-NEXT: s_and_b32 s75, s75, exec_lo
+; GFX11-NEXT: s_cselect_b32 s75, 1, 0
+; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-NEXT: s_cmp_lg_u32 s75, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB99_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v28, s19, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v18, s27, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v17, s26, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v27, s18, 3 op_sel_hi:[1,0]
-; GFX11-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v29, s16, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v20, s25, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v19, s24, 3 op_sel_hi:[1,0]
@@ -206300,6 +207808,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: v_pk_add_u16 v35, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v24, s21, 3 op_sel_hi:[1,0]
; GFX11-NEXT: v_pk_add_u16 v23, s20, 3 op_sel_hi:[1,0]
+; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v30
; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28]
; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
@@ -206319,43 +207828,42 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18
; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18
-; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17
-; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17
; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20
; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20
-; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20
+; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v20
; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19
-; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19
+; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v19
; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22
; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22
; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22
-; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21
+; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21
; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21
; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24
; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23
-; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v23
+; GFX11-NEXT: v_lshrrev_b32_e32 v47, 24, v28
+; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v28
; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28
-; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27
+; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v27
; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27
-; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30
-; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29
-; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34
-; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33
-; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36
-; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35
-; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35
+; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v30
+; GFX11-NEXT: v_lshrrev_b32_e32 v45, 16, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v29
+; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v34
+; GFX11-NEXT: v_lshrrev_b32_e32 v63, 16, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v33
+; GFX11-NEXT: v_lshrrev_b32_e32 v61, 24, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v58, 8, v36
+; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v35
+; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v35
; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2
@@ -206396,195 +207904,186 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16
; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15
; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15
+; GFX11-NEXT: v_mov_b32_e32 v68, v73
; GFX11-NEXT: s_branch .LBB99_6
; GFX11-NEXT: .LBB99_5:
; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1
-; GFX11-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 14
; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29
; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v63, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 15
; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15
; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13
-; GFX11-NEXT: v_mov_b32_e32 v73, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 16
; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 17
; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
-; GFX11-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-NEXT: v_mov_b32_e32 v60, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 18
; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3
; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v72, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 5
+; GFX11-NEXT: v_mov_b32_e32 v61, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 19
; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19
; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
-; GFX11-NEXT: v_mov_b32_e32 v56, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 6
+; GFX11-NEXT: v_mov_b32_e32 v46, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 20
; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23
; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v60, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 7
+; GFX11-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 21
; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27
-; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102
-; GFX11-NEXT: v_mov_b32_e32 v57, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101
-; GFX11-NEXT: v_dual_mov_b32 v144, s99 :: v_dual_mov_b32 v131, s98
+; GFX11-NEXT: v_dual_mov_b32 v134, s97 :: v_dual_mov_b32 v145, s96
+; GFX11-NEXT: v_mov_b32_e32 v56, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 22
+; GFX11-NEXT: v_dual_mov_b32 v132, s99 :: v_dual_mov_b32 v135, s98
+; GFX11-NEXT: v_dual_mov_b32 v144, s100 :: v_dual_mov_b32 v131, s102
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v58, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-NEXT: v_dual_mov_b32 v133, s96 :: v_dual_mov_b32 v128, s97
-; GFX11-NEXT: v_dual_mov_b32 v129, s87 :: v_dual_mov_b32 v130, s86
-; GFX11-NEXT: v_mov_b32_e32 v59, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-NEXT: v_dual_mov_b32 v116, s85 :: v_dual_mov_b32 v119, s83
-; GFX11-NEXT: v_dual_mov_b32 v114, s84 :: v_dual_mov_b32 v117, s82
+; GFX11-NEXT: v_mov_b32_e32 v62, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 23
+; GFX11-NEXT: v_dual_mov_b32 v133, s101 :: v_dual_mov_b32 v128, s42
+; GFX11-NEXT: v_dual_mov_b32 v129, s104 :: v_dual_mov_b32 v130, s103
+; GFX11-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 24
+; GFX11-NEXT: v_dual_mov_b32 v116, s46 :: v_dual_mov_b32 v119, s44
+; GFX11-NEXT: v_dual_mov_b32 v114, s58 :: v_dual_mov_b32 v117, s56
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 25
+; GFX11-NEXT: v_dual_mov_b32 v118, s60 :: v_dual_mov_b32 v113, s43
+; GFX11-NEXT: v_dual_mov_b32 v115, s62 :: v_dual_mov_b32 v102, s57
; GFX11-NEXT: v_mov_b32_e32 v45, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-NEXT: v_dual_mov_b32 v118, s81 :: v_dual_mov_b32 v113, s80
-; GFX11-NEXT: v_dual_mov_b32 v115, s70 :: v_dual_mov_b32 v102, s71
-; GFX11-NEXT: v_mov_b32_e32 v47, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-NEXT: v_dual_mov_b32 v103, s69 :: v_dual_mov_b32 v112, s68
-; GFX11-NEXT: v_dual_mov_b32 v98, s67 :: v_dual_mov_b32 v101, s65
+; GFX11-NEXT: v_readlane_b32 s0, v77, 26
+; GFX11-NEXT: v_dual_mov_b32 v103, s47 :: v_dual_mov_b32 v112, s45
+; GFX11-NEXT: v_dual_mov_b32 v98, s61 :: v_dual_mov_b32 v101, s59
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v40, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-NEXT: v_dual_mov_b32 v96, s66 :: v_dual_mov_b32 v99, s64
-; GFX11-NEXT: v_dual_mov_b32 v100, s55 :: v_dual_mov_b32 v87, s54
-; GFX11-NEXT: v_mov_b32_e32 v44, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-NEXT: v_dual_mov_b32 v97, s52 :: v_dual_mov_b32 v86, s50
-; GFX11-NEXT: v_dual_mov_b32 v83, s53 :: v_dual_mov_b32 v82, s49
+; GFX11-NEXT: v_mov_b32_e32 v68, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 27
+; GFX11-NEXT: v_dual_mov_b32 v96, s73 :: v_dual_mov_b32 v99, s63
+; GFX11-NEXT: v_dual_mov_b32 v100, s30 :: v_dual_mov_b32 v87, s34
+; GFX11-NEXT: v_mov_b32_e32 v41, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 28
+; GFX11-NEXT: v_dual_mov_b32 v97, s31 :: v_dual_mov_b32 v86, s35
+; GFX11-NEXT: v_dual_mov_b32 v83, s37 :: v_dual_mov_b32 v82, s39
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v46, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-NEXT: v_dual_mov_b32 v85, s51 :: v_dual_mov_b32 v84, s39
-; GFX11-NEXT: v_dual_mov_b32 v55, s48 :: v_dual_mov_b32 v80, s38
+; GFX11-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 29
+; GFX11-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v84, s38
+; GFX11-NEXT: v_dual_mov_b32 v55, s49 :: v_dual_mov_b32 v80, s48
; GFX11-NEXT: v_mov_b32_e32 v182, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-NEXT: v_dual_mov_b32 v81, s37 :: v_dual_mov_b32 v32, s36
-; GFX11-NEXT: v_dual_mov_b32 v71, s34 :: v_dual_mov_b32 v26, s35
+; GFX11-NEXT: v_readlane_b32 s0, v77, 30
+; GFX11-NEXT: v_dual_mov_b32 v81, s50 :: v_dual_mov_b32 v32, s52
+; GFX11-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s55
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v43, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-NEXT: v_dual_mov_b32 v39, s31 :: v_dual_mov_b32 v50, s30
-; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62
+; GFX11-NEXT: v_dual_mov_b32 v44, s0 :: v_dual_mov_b32 v167, s64
+; GFX11-NEXT: v_readlane_b32 s0, v77, 31
+; GFX11-NEXT: v_dual_mov_b32 v39, s54 :: v_dual_mov_b32 v50, s53
+; GFX11-NEXT: v_dual_mov_b32 v176, s66 :: v_dual_mov_b32 v165, s67
; GFX11-NEXT: v_mov_b32_e32 v183, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58
-; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v41, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 19
-; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42
-; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88
-; GFX11-NEXT: v_mov_b32_e32 v42, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90
-; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94
+; GFX11-NEXT: v_readlane_b32 s0, v76, 0
+; GFX11-NEXT: v_dual_mov_b32 v164, s68 :: v_dual_mov_b32 v163, s70
+; GFX11-NEXT: v_dual_mov_b32 v166, s69 :: v_dual_mov_b32 v161, s81
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_mov_b32_e32 v43, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 1
+; GFX11-NEXT: v_dual_mov_b32 v160, s71 :: v_dual_mov_b32 v149, s84
+; GFX11-NEXT: v_dual_mov_b32 v177, s65 :: v_dual_mov_b32 v150, s82
+; GFX11-NEXT: v_mov_b32_e32 v151, s83
+; GFX11-NEXT: v_mov_b32_e32 v47, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 2
+; GFX11-NEXT: v_dual_mov_b32 v162, s80 :: v_dual_mov_b32 v147, s85
+; GFX11-NEXT: v_dual_mov_b32 v146, s86 :: v_dual_mov_b32 v51, s72
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_mov_b32_e32 v177, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-NEXT: v_mov_b32_e32 v49, s92
-; GFX11-NEXT: v_mov_b32_e32 v67, vcc_lo
+; GFX11-NEXT: v_mov_b32_e32 v178, s0
+; GFX11-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v38, s88
+; GFX11-NEXT: v_dual_mov_b32 v48, s90 :: v_dual_mov_b32 v49, s92
; GFX11-NEXT: v_mov_b32_e32 v181, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 22
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v167, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 23
+; GFX11-NEXT: v_readlane_b32 s0, v76, 4
+; GFX11-NEXT: v_dual_mov_b32 v66, s94 :: v_dual_mov_b32 v67, vcc_lo
+; GFX11-NEXT: v_mov_b32_e32 v25, s74
+; GFX11-NEXT: v_mov_b32_e32 v31, s76
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_mov_b32_e32 v179, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 24
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s0, v76, 5
; GFX11-NEXT: v_mov_b32_e32 v180, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-NEXT: v_mov_b32_e32 v176, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 26
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v178, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-NEXT: v_mov_b32_e32 v164, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 28
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v165, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 29
-; GFX11-NEXT: v_mov_b32_e32 v166, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 30
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v151, s0
-; GFX11-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-NEXT: v_mov_b32_e32 v163, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v149, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 1
-; GFX11-NEXT: v_mov_b32_e32 v161, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v162, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-NEXT: v_mov_b32_e32 v150, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v160, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 12
+; GFX11-NEXT: v_readlane_b32 s1, v77, 13
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v52, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 10
+; GFX11-NEXT: v_readlane_b32 s1, v77, 11
+; GFX11-NEXT: v_dual_mov_b32 v148, s87 :: v_dual_mov_b32 v53, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 8
+; GFX11-NEXT: v_readlane_b32 s1, v77, 9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v54, s0
; GFX11-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_mov_b32_e32 v147, s0
-; GFX11-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 7
+; GFX11-NEXT: v_mov_b32_e32 v64, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 4
+; GFX11-NEXT: v_readlane_b32 s1, v77, 5
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v65, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 2
+; GFX11-NEXT: v_readlane_b32 s1, v77, 3
+; GFX11-NEXT: v_mov_b32_e32 v69, s0
+; GFX11-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-NEXT: v_readlane_b32 s1, v77, 1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-NEXT: v_mov_b32_e32 v70, s0
; GFX11-NEXT: .LBB99_6: ; %end
-; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_perm_b32 v70, v59, v70, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v69, v63, v69, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v35, v35, v57, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v65, v45, v65, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v64, v44, v64, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70
-; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v46, v33, v46, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004
-; GFX11-NEXT: v_or_b32_e32 v34, v36, v70
-; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v36, v36, v58, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v57, v60, v61, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v58, v62, v72, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v33, v35, v70
+; GFX11-NEXT: v_perm_b32 v29, v29, v40, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65
; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
-; GFX11-NEXT: v_or_b32_e32 v33, v35, v68
-; GFX11-NEXT: v_or_b32_e32 v35, v56, v69
-; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004
+; GFX11-NEXT: v_or_b32_e32 v35, v46, v69
; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v30, v68, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v68, v43, v47, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57
+; GFX11-NEXT: v_perm_b32 v56, v34, v56, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58
; GFX11-NEXT: v_or_b32_e32 v27, v29, v65
; GFX11-NEXT: v_or_b32_e32 v29, v70, v64
; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004
-; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
-; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69
-; GFX11-NEXT: v_or_b32_e32 v36, v57, v58
-; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004
+; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68
+; GFX11-NEXT: v_or_b32_e32 v34, v36, v57
+; GFX11-NEXT: v_or_b32_e32 v36, v56, v58
+; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54
; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64
; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53
-; GFX11-NEXT: v_or_b32_e32 v28, v30, v68
-; GFX11-NEXT: v_or_b32_e32 v30, v182, v69
+; GFX11-NEXT: v_or_b32_e32 v28, v30, v69
+; GFX11-NEXT: v_or_b32_e32 v30, v182, v68
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off
; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16
@@ -206595,13 +208094,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004
; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004
-; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v30, v151, v51, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004
+; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004
; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30
; GFX11-NEXT: v_or_b32_e32 v30, v21, v23
; GFX11-NEXT: v_or_b32_e32 v19, v19, v22
@@ -210211,7 +211710,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -210234,1560 +211733,1659 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; SI-NEXT: v_writelane_b32 v63, s30, 3
; SI-NEXT: v_writelane_b32 v63, s31, 4
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s92, v4
-; SI-NEXT: v_readfirstlane_b32 s78, v7
-; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s28, 16
+; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
+; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
+; SI-NEXT: v_readfirstlane_b32 s60, v12
; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s93
-; SI-NEXT: v_readfirstlane_b32 s46, v15
-; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79
-; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
-; SI-NEXT: v_readfirstlane_b32 s42, v17
-; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47
-; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s28
+; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
-; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s15, s24, 16
-; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
-; SI-NEXT: s_lshl_b32 s23, s23, 16
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12
; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61
; SI-NEXT: v_readfirstlane_b32 s30, v1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s19
+; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s92, s92, 16
-; SI-NEXT: v_readfirstlane_b32 s72, v10
-; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: v_readfirstlane_b32 s60, v12
-; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
-; SI-NEXT: s_lshl_b32 s60, s60, 16
-; SI-NEXT: v_readfirstlane_b32 s56, v14
-; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
-; SI-NEXT: s_lshl_b32 s56, s56, 16
-; SI-NEXT: v_readfirstlane_b32 s58, v13
-; SI-NEXT: v_readfirstlane_b32 s62, v11
+; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
+; SI-NEXT: s_lshl_b32 s15, s24, 16
+; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s23, s23, 16
+; SI-NEXT: s_lshl_b32 s13, s25, 16
+; SI-NEXT: s_lshl_b32 s9, s27, 16
+; SI-NEXT: s_lshl_b32 s5, s29, 16
+; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
+; SI-NEXT: s_lshl_b32 s30, s30, 16
+; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s94, 16
+; SI-NEXT: v_readfirstlane_b32 s90, v5
+; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s90, 16
+; SI-NEXT: v_readfirstlane_b32 s78, v7
+; SI-NEXT: s_and_b32 s79, s78, 0xffff0000
+; SI-NEXT: s_lshl_b32 s78, s78, 16
; SI-NEXT: v_readfirstlane_b32 s74, v9
+; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s74, 16
+; SI-NEXT: v_readfirstlane_b32 s62, v11
+; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s62, 16
+; SI-NEXT: v_readfirstlane_b32 s58, v13
+; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
+; SI-NEXT: s_lshl_b32 s58, s58, 16
+; SI-NEXT: v_readfirstlane_b32 s46, v15
+; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: v_readfirstlane_b32 s42, v17
+; SI-NEXT: v_readfirstlane_b32 s44, v16
+; SI-NEXT: v_readfirstlane_b32 s56, v14
+; SI-NEXT: v_readfirstlane_b32 s72, v10
+; SI-NEXT: v_readfirstlane_b32 s76, v8
; SI-NEXT: v_readfirstlane_b32 s88, v6
-; SI-NEXT: v_readfirstlane_b32 s90, v5
-; SI-NEXT: v_readfirstlane_b32 s94, v3
+; SI-NEXT: v_readfirstlane_b32 s92, v4
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
-; SI-NEXT: s_lshl_b32 s5, s29, 16
-; SI-NEXT: s_lshl_b32 s7, s28, 16
; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
-; SI-NEXT: s_lshl_b32 s9, s27, 16
-; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
-; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s25, s22, 0xffff0000
; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
-; SI-NEXT: s_lshl_b32 s21, s21, 16
; SI-NEXT: s_and_b32 s27, s20, 0xffff0000
; SI-NEXT: s_lshl_b32 s20, s20, 16
-; SI-NEXT: s_and_b32 s28, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s29, s18, 0xffff0000
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s41, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
-; SI-NEXT: s_lshl_b32 s58, s58, 16
-; SI-NEXT: s_and_b32 s63, s62, 0xffff0000
-; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: s_and_b32 s75, s74, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s11
+; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_lshl_b32 s60, s60, 16
+; SI-NEXT: s_and_b32 s73, s72, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s72, 16
+; SI-NEXT: s_and_b32 s77, s76, 0xffff0000
; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s21
; SI-NEXT: s_and_b32 s89, s88, 0xffff0000
; SI-NEXT: s_lshl_b32 s88, s88, 16
-; SI-NEXT: s_and_b32 s91, s90, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s90, 16
-; SI-NEXT: s_and_b32 s95, s94, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s94, 16
-; SI-NEXT: s_and_b32 s31, s30, 0xffff0000
-; SI-NEXT: s_lshl_b32 s30, s30, 16
+; SI-NEXT: s_and_b32 s93, s92, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s92, 16
+; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v62, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, vcc_hi
; SI-NEXT: v_mul_f32_e64 v29, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s75
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v37, 1.0, s59
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s62
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v61, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s57
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s72
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s60
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s56
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s30
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s94
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s90
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB101_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_mov_b32_e32 v43, v44
-; SI-NEXT: v_mov_b32_e32 v60, v2
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v29
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v15
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v42
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v53
-; SI-NEXT: v_mov_b32_e32 v24, v6
-; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v60
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v38
+; SI-NEXT: v_mov_b32_e32 v46, v22
+; SI-NEXT: v_mov_b32_e32 v22, v13
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v5, v14
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v41, v16
+; SI-NEXT: v_mov_b32_e32 v43, v49
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v3
+; SI-NEXT: v_mov_b32_e32 v39, v17
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v48
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v4
+; SI-NEXT: v_mov_b32_e32 v24, v36
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v62
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v9
+; SI-NEXT: v_mov_b32_e32 v49, v9
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshr_b64 v[51:52], v[0:1], 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v52, v51
+; SI-NEXT: v_mov_b32_e32 v51, v50
+; SI-NEXT: v_mov_b32_e32 v50, v4
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[7:8], 16
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v47
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v36
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v21
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v13, v52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[3:4], v[13:14], 16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v42
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v62
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v1, v52
-; SI-NEXT: v_lshr_b64 v[13:14], v[16:17], 16
-; SI-NEXT: v_mov_b32_e32 v52, v15
-; SI-NEXT: v_lshr_b64 v[15:16], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v51
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v10
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_mov_b32_e32 v15, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v56
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v56
+; SI-NEXT: v_lshr_b64 v[40:41], v[15:16], 16
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[45:46], v[35:36], 16
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v32
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[8:9], v[0:1], 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v38
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v16, v37
-; SI-NEXT: v_mov_b32_e32 v46, v12
-; SI-NEXT: v_mov_b32_e32 v0, v50
-; SI-NEXT: v_mov_b32_e32 v5, v9
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
-; SI-NEXT: v_mov_b32_e32 v14, v61
-; SI-NEXT: v_mov_b32_e32 v23, v43
-; SI-NEXT: v_lshr_b64 v[10:11], v[48:49], 16
-; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v26
-; SI-NEXT: v_mov_b32_e32 v11, v26
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v8
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v25
+; SI-NEXT: v_lshr_b64 v[8:9], v[0:1], 16
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v34
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v19, v8
-; SI-NEXT: v_lshr_b64 v[7:8], v[28:29], 16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v16
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v60
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v28
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_lshr_b64 v[8:9], v[0:1], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v8, v2
+; SI-NEXT: v_lshr_b64 v[1:2], v[19:20], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v4, v56
-; SI-NEXT: v_mov_b32_e32 v3, v55
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v4
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v20
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v22
-; SI-NEXT: v_lshr_b64 v[58:59], v[34:35], 16
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v55
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[55:56], v[27:28], 16
-; SI-NEXT: v_mov_b32_e32 v56, v4
-; SI-NEXT: s_waitcnt vmcnt(5) expcnt(4)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v8
-; SI-NEXT: v_lshr_b64 v[36:37], v[25:26], 16
-; SI-NEXT: v_mov_b32_e32 v37, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v39
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
-; SI-NEXT: v_mov_b32_e32 v47, v13
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v19
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v29
+; SI-NEXT: v_mov_b32_e32 v9, v3
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v32
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[11:12], v[0:1], 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v0, v41
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v42
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
-; SI-NEXT: v_lshr_b64 v[49:50], v[31:32], 16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v51
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v2, v8
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v22
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v62
-; SI-NEXT: v_mov_b32_e32 v17, v16
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[0:1], 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v54
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[15:16], v[0:1], 16
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v16, v35
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v30
+; SI-NEXT: v_mov_b32_e32 v2, v0
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, v26
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_mov_b32_e32 v33, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v19, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16
-; SI-NEXT: v_lshr_b64 v[31:32], v[33:34], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v21
-; SI-NEXT: v_mov_b32_e32 v26, v30
-; SI-NEXT: v_mov_b32_e32 v27, v31
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v60
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v21
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v37, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v2
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v31
+; SI-NEXT: v_lshr_b64 v[11:12], v[33:34], 16
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v12, v51
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v6
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_lshr_b64 v[32:33], v[44:45], 16
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v50
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v47
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[28:29], v[37:38], 16
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v49
+; SI-NEXT: v_mov_b32_e32 v49, v40
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v23, v52
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[35:36], v[3:4], 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v3, v46
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v48
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v52
-; SI-NEXT: v_mov_b32_e32 v53, v29
-; SI-NEXT: v_mov_b32_e32 v52, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[34:35], v[35:36], 16
-; SI-NEXT: v_mov_b32_e32 v51, v4
-; SI-NEXT: v_mov_b32_e32 v50, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v21
+; SI-NEXT: v_mov_b32_e32 v36, v22
+; SI-NEXT: v_mov_b32_e32 v48, v39
+; SI-NEXT: v_mov_b32_e32 v22, v51
+; SI-NEXT: v_mov_b32_e32 v46, v43
+; SI-NEXT: v_lshr_b64 v[53:54], v[22:23], 16
+; SI-NEXT: v_mov_b32_e32 v54, v15
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v8, v4
-; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v62
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mov_b32_e32 v5, v10
-; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[50:51], 16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v42
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[46:47], 16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v30
+; SI-NEXT: v_lshr_b64 v[29:30], v[12:13], 16
+; SI-NEXT: v_mov_b32_e32 v30, v35
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v22, v4
-; SI-NEXT: v_mov_b32_e32 v21, v3
-; SI-NEXT: v_mov_b32_e32 v3, v47
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; SI-NEXT: v_mov_b32_e32 v0, v25
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v0
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v47
+; SI-NEXT: v_mov_b32_e32 v47, v44
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v6
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v52, v23
+; SI-NEXT: v_mov_b32_e32 v45, v4
+; SI-NEXT: v_mov_b32_e32 v44, v3
+; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v45
-; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, v49
+; SI-NEXT: v_mov_b32_e32 v43, v45
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v22, v7
-; SI-NEXT: v_mov_b32_e32 v47, v36
-; SI-NEXT: v_lshr_b64 v[35:36], v[0:1], 16
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[3:4], v[44:45], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v50, v19
+; SI-NEXT: v_lshr_b64 v[0:1], v[1:2], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, v11
+; SI-NEXT: v_lshr_b64 v[48:49], v[48:49], 16
+; SI-NEXT: v_mov_b32_e32 v49, v46
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_mov_b32_e32 v44, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v58
-; SI-NEXT: v_lshr_b64 v[57:58], v[57:58], 16
-; SI-NEXT: v_lshr_b64 v[58:59], v[48:49], 16
-; SI-NEXT: v_mov_b32_e32 v59, v53
-; SI-NEXT: v_mov_b32_e32 v48, v0
-; SI-NEXT: v_lshr_b64 v[0:1], v[40:41], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[42:43], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_mov_b32_e32 v21, v10
-; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[44:45], 16
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[0:1], v[32:33], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v44, v23
-; SI-NEXT: v_mov_b32_e32 v23, v38
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_mov_b32_e32 v12, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[3:4], v[18:19], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[3:4], v[14:15], 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v49
-; SI-NEXT: v_lshr_b64 v[49:50], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[6:7], v[54:55], 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[0:1], v[10:11], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[53:54], v[52:53], 16
-; SI-NEXT: v_lshr_b64 v[51:52], v[26:27], 16
-; SI-NEXT: v_mov_b32_e32 v54, v27
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_lshr_b64 v[0:1], v[45:46], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v28
+; SI-NEXT: v_mov_b32_e32 v15, v16
+; SI-NEXT: v_mov_b32_e32 v16, v17
+; SI-NEXT: v_mov_b32_e32 v19, v36
+; SI-NEXT: v_mov_b32_e32 v17, v39
+; SI-NEXT: v_mov_b32_e32 v18, v51
+; SI-NEXT: v_mov_b32_e32 v14, v6
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshr_b64 v[0:1], v[27:28], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[17:18], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_mov_b32_e32 v52, v6
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[0:1], v[34:35], 16
+; SI-NEXT: v_mov_b32_e32 v1, v32
+; SI-NEXT: v_lshr_b64 v[32:33], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[33:34], v[6:7], 16
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v35, v15
+; SI-NEXT: v_mov_b32_e32 v28, v48
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v31, v0
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_mov_b32_e32 v22, v0
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[28:29], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[19:20], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v37, v8
+; SI-NEXT: v_mov_b32_e32 v36, v24
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[14:15], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[12:13], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[15:16], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[24:25], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[25:26], 16
+; SI-NEXT: v_mov_b32_e32 v26, v29
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[60:61], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[59:60], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16
-; SI-NEXT: v_mov_b32_e32 v46, v9
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v9, v28
-; SI-NEXT: v_mov_b32_e32 v3, v32
+; SI-NEXT: v_lshr_b64 v[0:1], v[57:58], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[55:56], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[46:47], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[41:42], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[39:40], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[8:9], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[0:1], v[20:21], 16
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_mov_b32_e32 v50, v6
-; SI-NEXT: v_lshr_b64 v[10:11], v[6:7], 16
-; SI-NEXT: v_mov_b32_e32 v11, v40
-; SI-NEXT: v_lshr_b64 v[40:41], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v16, v41
+; SI-NEXT: v_lshr_b64 v[39:40], v[61:62], 16
+; SI-NEXT: v_mov_b32_e32 v8, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v11, v10
+; SI-NEXT: v_mov_b32_e32 v10, v13
; SI-NEXT: s_branch .LBB101_3
; SI-NEXT: .LBB101_2:
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: v_mov_b32_e32 v11, v40
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v48, v41
+; SI-NEXT: v_mov_b32_e32 v19, v13
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: v_mov_b32_e32 v14, v61
-; SI-NEXT: v_mov_b32_e32 v19, v6
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr12
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_mov_b32_e32 v17, v16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v60, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v9, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v3, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: .LBB101_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB101_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v45
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v23
-; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v19
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v60
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v3
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v24
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v30
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v42
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v37
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v13, v19
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v11
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v61
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v57
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v15
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v16
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(12)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v29
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v22
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v38
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v36
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v11
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v55
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v35
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v25
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v49
+; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v37
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v2
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v59, 0x40c00000, v0
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v2
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v9
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v2
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v44, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v12
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v13
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v1
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(7)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21
+; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v34
+; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v56
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v58
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v57, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v57
+; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v14
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v28
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v14
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v35
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v28
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v17
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v15
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v16
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v29
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v18
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v17
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v18
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v16
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v21
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v16
+; SI-NEXT: v_lshr_b64 v[16:17], v[50:51], 16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v57
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v32
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v44
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17
-; SI-NEXT: v_lshr_b64 v[43:44], v[34:35], 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v24
-; SI-NEXT: v_lshr_b64 v[47:48], v[16:17], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v30
-; SI-NEXT: v_lshr_b64 v[15:16], v[0:1], 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v62, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v27
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v22
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v28
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v30
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v23
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[28:29], v[36:37], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v23
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v30
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v5
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v21
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v6
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v48
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v35
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v30
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v7
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v37
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v47
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v37
+; SI-NEXT: v_lshr_b64 v[46:47], v[10:11], 16
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v33
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v2
+; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v9
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v31
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v2
+; SI-NEXT: v_mov_b32_e32 v2, v1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v48
+; SI-NEXT: v_lshr_b64 v[7:8], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v10, v60
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v10
+; SI-NEXT: v_lshr_b64 v[8:9], v[24:25], 16
+; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[59:60], 16
+; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v36
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v21
+; SI-NEXT: v_lshr_b64 v[36:37], v[26:27], 16
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v22
+; SI-NEXT: v_lshr_b64 v[22:23], v[19:20], 16
+; SI-NEXT: v_lshr_b64 v[18:19], v[38:39], 16
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v35
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v29
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v11
+; SI-NEXT: v_lshr_b64 v[10:11], v[44:45], 16
+; SI-NEXT: v_lshr_b64 v[60:61], v[61:62], 16
+; SI-NEXT: v_mov_b32_e32 v29, v10
+; SI-NEXT: v_mov_b32_e32 v28, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v34
+; SI-NEXT: v_lshr_b64 v[10:11], v[42:43], 16
+; SI-NEXT: v_mov_b32_e32 v39, v46
+; SI-NEXT: v_mov_b32_e32 v43, v22
+; SI-NEXT: v_lshr_b64 v[32:33], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v1, v62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v12
+; SI-NEXT: v_mov_b32_e32 v1, v25
+; SI-NEXT: v_lshr_b64 v[25:26], v[12:13], 16
+; SI-NEXT: v_lshr_b64 v[13:14], v[52:53], 16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[52:53], v[54:55], 16
+; SI-NEXT: v_lshr_b64 v[26:27], v[9:10], 16
+; SI-NEXT: v_mov_b32_e32 v44, v25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v13
+; SI-NEXT: v_mov_b32_e32 v1, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
+; SI-NEXT: v_mov_b32_e32 v30, v32
+; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16
+; SI-NEXT: v_lshr_b64 v[32:33], v[47:48], 16
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v14
+; SI-NEXT: v_mov_b32_e32 v1, v6
+; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v51
+; SI-NEXT: v_lshr_b64 v[50:51], v[40:41], 16
+; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v56
+; SI-NEXT: v_lshr_b64 v[53:54], v[51:52], 16
+; SI-NEXT: v_mov_b32_e32 v54, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v13
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v33
+; SI-NEXT: v_mov_b32_e32 v0, v2
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v14
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v35
-; SI-NEXT: v_lshr_b64 v[34:35], v[22:23], 16
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v10
-; SI-NEXT: v_lshr_b64 v[10:11], v[49:50], 16
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v7
-; SI-NEXT: v_lshr_b64 v[7:8], v[40:41], 16
-; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v14
-; SI-NEXT: v_lshr_b64 v[13:14], v[38:39], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v46
-; SI-NEXT: v_lshr_b64 v[45:46], v[45:46], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v23
-; SI-NEXT: v_lshr_b64 v[22:23], v[25:26], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v37
-; SI-NEXT: v_lshr_b64 v[36:37], v[52:53], 16
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v2
-; SI-NEXT: v_mov_b32_e32 v23, v6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v39
-; SI-NEXT: v_lshr_b64 v[38:39], v[56:57], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v50
-; SI-NEXT: v_lshr_b64 v[50:51], v[18:19], 16
-; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v62
-; SI-NEXT: v_lshr_b64 v[17:18], v[58:59], 16
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v20
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v53
-; SI-NEXT: v_lshr_b64 v[52:53], v[54:55], 16
-; SI-NEXT: v_mov_b32_e32 v54, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v3
+; SI-NEXT: v_lshr_b64 v[2:3], v[17:18], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v19
-; SI-NEXT: v_lshr_b64 v[19:20], v[60:61], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[12:13], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v57
-; SI-NEXT: v_lshr_b64 v[57:58], v[35:36], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[21:22], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v59
-; SI-NEXT: v_lshr_b64 v[58:59], v[9:10], 16
-; SI-NEXT: v_mov_b32_e32 v59, v45
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[24:25], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, v36
+; SI-NEXT: v_mov_b32_e32 v12, v50
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v41
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v61
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v26
-; SI-NEXT: v_mov_b32_e32 v26, v47
-; SI-NEXT: v_lshr_b64 v[46:47], v[49:50], 16
-; SI-NEXT: v_mov_b32_e32 v47, v28
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v55
-; SI-NEXT: v_mov_b32_e32 v55, v34
-; SI-NEXT: v_lshr_b64 v[34:35], v[27:28], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[35:36], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v32
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[31:32], 16
-; SI-NEXT: v_mov_b32_e32 v2, v4
+; SI-NEXT: v_mov_b32_e32 v2, v29
+; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v24, v7
-; SI-NEXT: v_lshr_b64 v[6:7], v[3:4], 16
-; SI-NEXT: v_mov_b32_e32 v4, v52
-; SI-NEXT: v_mov_b32_e32 v8, v6
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, v1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[5:6], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[49:50], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[51:52], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[15:16], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[21:22], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[2:3], v[4:5], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v50, v16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v19
-; SI-NEXT: v_lshr_b64 v[51:52], v[42:43], 16
-; SI-NEXT: v_mov_b32_e32 v5, v22
-; SI-NEXT: v_mov_b32_e32 v21, v38
-; SI-NEXT: v_mov_b32_e32 v22, v13
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[18:19], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, v1
+; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v24
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v8
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[7:8], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v17
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[16:17], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[37:38], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[59:60], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v50
-; SI-NEXT: v_lshr_b64 v[49:50], v[12:13], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v36
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v10
-; SI-NEXT: v_mov_b32_e32 v10, v15
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[0:1], v[54:55], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[44:45], 16
-; SI-NEXT: v_mov_b32_e32 v54, v43
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v48
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: .LBB101_5: ; %end
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v4
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v5
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v8
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v58
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v52
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v18
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v12
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v44
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v50
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v54
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: v_readlane_b32 s30, v63, 3
; SI-NEXT: v_readlane_b32 s31, v63, 4
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v12
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v14
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_or_b32_e32 v0, v0, v1
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v8
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v14
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v14
+; SI-NEXT: v_or_b32_e32 v1, v2, v1
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v21
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v2, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v8
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v14
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v57
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v35
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v8
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_or_b32_e32 v6, v6, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v17
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v7, v7, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v39
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v10, v10, v11
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v39
-; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_or_b32_e32 v6, v6, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; SI-NEXT: v_or_b32_e32 v7, v9, v7
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_or_b32_e32 v8, v8, v9
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v13
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v25
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v10, v10, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v12, v12, v13
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v25
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v28
+; SI-NEXT: v_or_b32_e32 v13, v16, v13
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v14, v14, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16
+; SI-NEXT: v_or_b32_e32 v15, v17, v15
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; SI-NEXT: v_or_b32_e32 v17, v19, v17
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20
+; SI-NEXT: v_or_b32_e32 v19, v21, v19
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_or_b32_e32 v20, v20, v21
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22
+; SI-NEXT: v_or_b32_e32 v21, v23, v21
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v49
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_or_b32_e32 v22, v22, v23
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; SI-NEXT: v_or_b32_e32 v23, v25, v23
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v47
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v27
-; SI-NEXT: v_or_b32_e32 v26, v26, v29
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v26
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26
+; SI-NEXT: v_or_b32_e32 v25, v27, v25
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v39
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
-; SI-NEXT: v_or_b32_e32 v27, v27, v29
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; SI-NEXT: v_or_b32_e32 v28, v29, v28
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v59
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35
-; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
+; SI-NEXT: v_or_b32_e32 v27, v29, v27
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v31
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v30
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v28, v28, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30
+; SI-NEXT: v_or_b32_e32 v29, v31, v29
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v32
; SI-NEXT: v_or_b32_e32 v30, v30, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v54
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -211806,50 +213404,55 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_writelane_b32 v35, s49, 5
; VI-NEXT: v_writelane_b32 v35, s50, 6
; VI-NEXT: v_writelane_b32 v35, s51, 7
-; VI-NEXT: v_writelane_b32 v35, s30, 8
-; VI-NEXT: v_writelane_b32 v35, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB101_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB101_3
; VI-NEXT: .LBB101_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB101_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB101_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000
-; VI-NEXT: s_lshl_b32 s4, s48, 16
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: s_lshl_b32 s20, s16, 16
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
-; VI-NEXT: s_and_b32 s4, s48, 0xffff0000
+; VI-NEXT: s_and_b32 s16, s16, 0xffff0000
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
@@ -211857,52 +213460,52 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; VI-NEXT: s_lshl_b32 s5, s28, 16
+; VI-NEXT: s_lshl_b32 s20, s48, 16
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: s_and_b32 s5, s28, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s48, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; VI-NEXT: v_add_f32_e32 v1, s5, v32
+; VI-NEXT: v_add_f32_e32 v1, s20, v32
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s20, s50, 16
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; VI-NEXT: v_add_f32_e32 v2, s5, v32
+; VI-NEXT: v_add_f32_e32 v2, s20, v32
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; VI-NEXT: s_and_b32 s5, s30, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s50, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; VI-NEXT: v_add_f32_e32 v3, s5, v32
+; VI-NEXT: v_add_f32_e32 v3, s20, v32
; VI-NEXT: v_bfe_u32 v4, v3, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3
-; VI-NEXT: s_and_b32 s5, s26, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s46, 0xffff0000
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s26, 16
+; VI-NEXT: s_lshl_b32 s16, s46, 16
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3]
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -211911,16 +213514,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s24, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s44, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s24, 16
+; VI-NEXT: s_lshl_b32 s16, s44, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -211929,16 +213532,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s22, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s42, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s22, 16
+; VI-NEXT: s_lshl_b32 s16, s42, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -211947,16 +213550,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s20, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s40, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s20, 16
+; VI-NEXT: s_lshl_b32 s16, s40, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -211965,16 +213568,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s18, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s38, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s18, 16
+; VI-NEXT: s_lshl_b32 s16, s38, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -211983,16 +213586,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s16, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s36, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s16, 16
+; VI-NEXT: s_lshl_b32 s16, s36, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; VI-NEXT: v_bfe_u32 v3, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0
@@ -212001,131 +213604,131 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s17, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s37, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v1, s5, v32
+; VI-NEXT: v_add_f32_e32 v1, s20, v32
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_lshl_b32 s4, s17, 16
+; VI-NEXT: s_lshl_b32 s16, s37, 16
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc
-; VI-NEXT: v_add_f32_e32 v3, s4, v32
+; VI-NEXT: v_add_f32_e32 v3, s16, v32
; VI-NEXT: v_bfe_u32 v5, v3, 16, 1
; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5
-; VI-NEXT: s_and_b32 s5, s19, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s39, 0xffff0000
; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; VI-NEXT: v_add_f32_e32 v3, s5, v32
+; VI-NEXT: v_add_f32_e32 v3, s20, v32
; VI-NEXT: v_cndmask_b32_e32 v18, v5, v7, vcc
; VI-NEXT: v_bfe_u32 v5, v3, 16, 1
; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5
-; VI-NEXT: s_lshl_b32 s4, s19, 16
+; VI-NEXT: s_lshl_b32 s16, s39, 16
; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc
-; VI-NEXT: v_add_f32_e32 v5, s4, v32
+; VI-NEXT: v_add_f32_e32 v5, s16, v32
; VI-NEXT: v_bfe_u32 v7, v5, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1
; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7
-; VI-NEXT: s_and_b32 s5, s21, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s41, 0xffff0000
; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5
; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; VI-NEXT: v_add_f32_e32 v5, s5, v32
+; VI-NEXT: v_add_f32_e32 v5, s20, v32
; VI-NEXT: v_mov_b32_e32 v1, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v7, v9, vcc
; VI-NEXT: v_bfe_u32 v7, v5, 16, 1
; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7
-; VI-NEXT: s_lshl_b32 s4, s21, 16
+; VI-NEXT: s_lshl_b32 s16, s41, 16
; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5
; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
-; VI-NEXT: v_add_f32_e32 v7, s4, v32
+; VI-NEXT: v_add_f32_e32 v7, s16, v32
; VI-NEXT: v_bfe_u32 v9, v7, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: s_and_b32 s5, s23, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s43, 0xffff0000
; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7
; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; VI-NEXT: v_add_f32_e32 v7, s5, v32
+; VI-NEXT: v_add_f32_e32 v7, s20, v32
; VI-NEXT: v_mov_b32_e32 v3, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v9, v11, vcc
; VI-NEXT: v_bfe_u32 v9, v7, 16, 1
; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: s_lshl_b32 s4, s23, 16
+; VI-NEXT: s_lshl_b32 s16, s43, 16
; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7
; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc
-; VI-NEXT: v_add_f32_e32 v9, s4, v32
+; VI-NEXT: v_add_f32_e32 v9, s16, v32
; VI-NEXT: v_bfe_u32 v11, v9, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5
; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
-; VI-NEXT: s_and_b32 s5, s25, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s45, 0xffff0000
; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9
; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; VI-NEXT: v_add_f32_e32 v9, s5, v32
+; VI-NEXT: v_add_f32_e32 v9, s20, v32
; VI-NEXT: v_mov_b32_e32 v5, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v11, v13, vcc
; VI-NEXT: v_bfe_u32 v11, v9, 16, 1
; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
-; VI-NEXT: s_lshl_b32 s4, s25, 16
+; VI-NEXT: s_lshl_b32 s16, s45, 16
; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9
; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc
-; VI-NEXT: v_add_f32_e32 v11, s4, v32
+; VI-NEXT: v_add_f32_e32 v11, s16, v32
; VI-NEXT: v_bfe_u32 v13, v11, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v7
; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13
-; VI-NEXT: s_and_b32 s5, s27, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s47, 0xffff0000
; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11
; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; VI-NEXT: v_add_f32_e32 v11, s5, v32
+; VI-NEXT: v_add_f32_e32 v11, s20, v32
; VI-NEXT: v_mov_b32_e32 v7, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v13, v15, vcc
; VI-NEXT: v_bfe_u32 v13, v11, 16, 1
; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13
-; VI-NEXT: s_lshl_b32 s4, s27, 16
+; VI-NEXT: s_lshl_b32 s16, s47, 16
; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11
; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc
-; VI-NEXT: v_add_f32_e32 v13, s4, v32
+; VI-NEXT: v_add_f32_e32 v13, s16, v32
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9
; VI-NEXT: v_bfe_u32 v15, v13, 16, 1
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: s_and_b32 s5, s29, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s49, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v9, v18
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13
; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; VI-NEXT: v_add_f32_e32 v13, s5, v32
+; VI-NEXT: v_add_f32_e32 v13, s20, v32
; VI-NEXT: v_cndmask_b32_e32 v18, v15, v18, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v11
; VI-NEXT: v_bfe_u32 v15, v13, 16, 1
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: s_lshl_b32 s4, s29, 16
+; VI-NEXT: s_lshl_b32 s16, s49, 16
; VI-NEXT: v_mov_b32_e32 v11, v18
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13
; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
; VI-NEXT: v_cndmask_b32_e32 v13, v15, v18, vcc
-; VI-NEXT: v_add_f32_e32 v15, s4, v32
+; VI-NEXT: v_add_f32_e32 v15, s16, v32
; VI-NEXT: v_bfe_u32 v18, v15, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15
; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
@@ -212134,17 +213737,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cndmask_b32_e32 v18, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v13
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
-; VI-NEXT: s_and_b32 s5, s31, 0xffff0000
-; VI-NEXT: v_add_f32_e32 v15, s5, v32
+; VI-NEXT: s_and_b32 s20, s51, 0xffff0000
+; VI-NEXT: v_add_f32_e32 v15, s20, v32
; VI-NEXT: v_mov_b32_e32 v13, v18
; VI-NEXT: v_bfe_u32 v18, v15, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15
; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
-; VI-NEXT: s_lshl_b32 s4, s31, 16
+; VI-NEXT: s_lshl_b32 s16, s51, 16
; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15
; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
; VI-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
-; VI-NEXT: v_add_f32_e32 v18, s4, v32
+; VI-NEXT: v_add_f32_e32 v18, s16, v32
; VI-NEXT: v_bfe_u32 v19, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
@@ -212153,23 +213756,23 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v15
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
-; VI-NEXT: s_and_b32 s5, s50, 0xffff0000
+; VI-NEXT: s_lshl_b32 s16, s18, 16
+; VI-NEXT: s_and_b32 s18, s18, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v15, v18
-; VI-NEXT: v_add_f32_e32 v18, s5, v32
+; VI-NEXT: v_add_f32_e32 v18, s18, v32
; VI-NEXT: v_bfe_u32 v19, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18
-; VI-NEXT: s_lshl_b32 s4, s50, 16
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18
; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
-; VI-NEXT: v_add_f32_e32 v18, s4, v32
+; VI-NEXT: v_add_f32_e32 v18, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v19, v19, v20, vcc
; VI-NEXT: v_bfe_u32 v20, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v20, vcc, v20, v18
-; VI-NEXT: s_and_b32 s4, s46, 0xffff0000
+; VI-NEXT: s_and_b32 s16, s14, 0xffff0000
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x7fff, v20
; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s16, v32
; VI-NEXT: v_or_b32_e32 v21, 0x400000, v18
; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
@@ -212177,11 +213780,11 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s46, 16
+; VI-NEXT: s_lshl_b32 s14, s14, 16
; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19]
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s14, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -212190,16 +213793,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s44, 0xffff0000
+; VI-NEXT: s_and_b32 s14, s12, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s14, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s44, 16
+; VI-NEXT: s_lshl_b32 s12, s12, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s12, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -212208,16 +213811,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s42, 0xffff0000
+; VI-NEXT: s_and_b32 s12, s10, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s12, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s42, 16
+; VI-NEXT: s_lshl_b32 s10, s10, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s10, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -212226,16 +213829,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s40, 0xffff0000
+; VI-NEXT: s_and_b32 s10, s8, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s10, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s40, 16
+; VI-NEXT: s_lshl_b32 s8, s8, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s8, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -212244,16 +213847,16 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s38, 0xffff0000
+; VI-NEXT: s_and_b32 s8, s6, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s8, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s38, 16
+; VI-NEXT: s_lshl_b32 s6, s6, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s6, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -212262,13 +213865,13 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s36, 0xffff0000
+; VI-NEXT: s_and_b32 s6, s4, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s6, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s36, 16
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_add_f32_e32 v16, s4, v32
@@ -212281,20 +213884,20 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cndmask_b32_e32 v16, v19, v21, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17]
-; VI-NEXT: s_and_b32 s4, s37, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s5, 0xffff0000
; VI-NEXT: v_add_f32_e32 v17, s4, v32
; VI-NEXT: v_bfe_u32 v19, v17, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17
; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; VI-NEXT: s_lshl_b32 s4, s37, 16
+; VI-NEXT: s_lshl_b32 s4, s5, 16
; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc
; VI-NEXT: v_add_f32_e32 v19, s4, v32
; VI-NEXT: v_bfe_u32 v21, v19, 16, 1
; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
-; VI-NEXT: s_and_b32 s4, s39, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s7, 0xffff0000
; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19
; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
; VI-NEXT: v_add_f32_e32 v19, s4, v32
@@ -212304,7 +213907,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19
; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; VI-NEXT: s_lshl_b32 s4, s39, 16
+; VI-NEXT: s_lshl_b32 s4, s7, 16
; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc
; VI-NEXT: v_add_f32_e32 v21, s4, v32
; VI-NEXT: v_bfe_u32 v23, v21, 16, 1
@@ -212312,7 +213915,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23
-; VI-NEXT: s_and_b32 s4, s41, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s9, 0xffff0000
; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21
; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
; VI-NEXT: v_add_f32_e32 v21, s4, v32
@@ -212323,7 +213926,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23
; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21
; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
-; VI-NEXT: s_lshl_b32 s4, s41, 16
+; VI-NEXT: s_lshl_b32 s4, s9, 16
; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc
; VI-NEXT: v_add_f32_e32 v23, s4, v32
; VI-NEXT: v_bfe_u32 v25, v23, 16, 1
@@ -212331,7 +213934,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
-; VI-NEXT: s_and_b32 s4, s43, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s11, 0xffff0000
; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23
; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
; VI-NEXT: v_add_f32_e32 v23, s4, v32
@@ -212342,7 +213945,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23
; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; VI-NEXT: s_lshl_b32 s4, s43, 16
+; VI-NEXT: s_lshl_b32 s4, s11, 16
; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc
; VI-NEXT: v_add_f32_e32 v25, s4, v32
; VI-NEXT: v_bfe_u32 v27, v25, 16, 1
@@ -212350,7 +213953,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27
-; VI-NEXT: s_and_b32 s4, s45, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s13, 0xffff0000
; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25
; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
; VI-NEXT: v_add_f32_e32 v25, s4, v32
@@ -212361,7 +213964,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27
; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25
; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
-; VI-NEXT: s_lshl_b32 s4, s45, 16
+; VI-NEXT: s_lshl_b32 s4, s13, 16
; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc
; VI-NEXT: v_add_f32_e32 v27, s4, v32
; VI-NEXT: v_bfe_u32 v29, v27, 16, 1
@@ -212369,7 +213972,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29
-; VI-NEXT: s_and_b32 s4, s47, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s15, 0xffff0000
; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27
; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
; VI-NEXT: v_add_f32_e32 v27, s4, v32
@@ -212380,7 +213983,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29
; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27
; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
-; VI-NEXT: s_lshl_b32 s4, s47, 16
+; VI-NEXT: s_lshl_b32 s4, s15, 16
; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc
; VI-NEXT: v_add_f32_e32 v29, s4, v32
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25
@@ -212388,7 +213991,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31
-; VI-NEXT: s_and_b32 s4, s49, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s17, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v25, v33
; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29
; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29
@@ -212402,7 +214005,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_mov_b32_e32 v27, v33
; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29
; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29
-; VI-NEXT: s_lshl_b32 s4, s49, 16
+; VI-NEXT: s_lshl_b32 s4, s17, 16
; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc
; VI-NEXT: v_add_f32_e32 v31, s4, v32
; VI-NEXT: v_bfe_u32 v33, v31, 16, 1
@@ -212413,13 +214016,13 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
-; VI-NEXT: s_and_b32 s4, s51, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s19, 0xffff0000
; VI-NEXT: v_add_f32_e32 v31, s4, v32
; VI-NEXT: v_mov_b32_e32 v29, v33
; VI-NEXT: v_bfe_u32 v33, v31, 16, 1
; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31
; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33
-; VI-NEXT: s_lshl_b32 s4, s51, 16
+; VI-NEXT: s_lshl_b32 s4, s19, 16
; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31
; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; VI-NEXT: v_add_f32_e32 v31, s4, v32
@@ -212434,41 +214037,39 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32]
; VI-NEXT: s_branch .LBB101_6
; VI-NEXT: .LBB101_5:
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: .LBB101_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v35, 8
-; VI-NEXT: v_readlane_b32 s31, v35, 9
; VI-NEXT: v_readlane_b32 s51, v35, 7
; VI-NEXT: v_readlane_b32 s50, v35, 6
; VI-NEXT: v_readlane_b32 s49, v35, 5
@@ -212497,90 +214098,95 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_writelane_b32 v35, s49, 5
; GFX9-NEXT: v_writelane_b32 v35, s50, 6
; GFX9-NEXT: v_writelane_b32 v35, s51, 7
-; GFX9-NEXT: v_writelane_b32 v35, s30, 8
-; GFX9-NEXT: v_writelane_b32 v35, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB101_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB101_3
; GFX9-NEXT: .LBB101_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB101_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB101_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v16, 0x40c00000
-; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: s_and_b32 s20, s18, 0xffff0000
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: s_lshl_b32 s4, s50, 16
+; GFX9-NEXT: s_lshl_b32 s18, s18, 16
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_cndmask_b32_e32 v18, v1, v2, vcc
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s50, 0xffff0000
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s5, s30, 16
+; GFX9-NEXT: s_lshl_b32 s20, s50, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s51, 0xffff0000
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_add_f32_e32 v2, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v2, s20, v16
; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: s_lshl_b32 s5, s31, 16
+; GFX9-NEXT: s_lshl_b32 s20, s51, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s5, v16
-; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000
+; GFX9-NEXT: v_add_f32_e32 v3, s20, v16
+; GFX9-NEXT: s_and_b32 s18, s49, 0xffff0000
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
; GFX9-NEXT: v_or_b32_sdwa v14, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
@@ -212593,9 +214199,9 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s29, 16
+; GFX9-NEXT: s_lshl_b32 s18, s49, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212603,18 +214209,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s48, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v13, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s28, 16
+; GFX9-NEXT: s_lshl_b32 s18, s48, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212622,18 +214228,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s47, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v12, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s27, 16
+; GFX9-NEXT: s_lshl_b32 s18, s47, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212641,18 +214247,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s46, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v11, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s26, 16
+; GFX9-NEXT: s_lshl_b32 s18, s46, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212660,18 +214266,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s45, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v10, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s25, 16
+; GFX9-NEXT: s_lshl_b32 s18, s45, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212679,18 +214285,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s44, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v9, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s24, 16
+; GFX9-NEXT: s_lshl_b32 s18, s44, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212698,18 +214304,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s43, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v8, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s23, 16
+; GFX9-NEXT: s_lshl_b32 s18, s43, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212717,18 +214323,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s42, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v7, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s22, 16
+; GFX9-NEXT: s_lshl_b32 s18, s42, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212736,18 +214342,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s41, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v6, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s21, 16
+; GFX9-NEXT: s_lshl_b32 s18, s41, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212755,18 +214361,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s40, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v5, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s20, 16
+; GFX9-NEXT: s_lshl_b32 s18, s40, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212774,18 +214380,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s39, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v4, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s19, 16
+; GFX9-NEXT: s_lshl_b32 s18, s39, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212793,18 +214399,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s38, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v3, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s18, 16
+; GFX9-NEXT: s_lshl_b32 s18, s38, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -212812,18 +214418,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v19, vcc
-; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s37, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s17, 16
+; GFX9-NEXT: s_lshl_b32 s18, s37, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s18, v16
; GFX9-NEXT: v_bfe_u32 v19, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v1
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212831,18 +214437,18 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v19, v20, vcc
-; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s36, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s18, v16
; GFX9-NEXT: v_bfe_u32 v19, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v0
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s16, 16
+; GFX9-NEXT: s_lshl_b32 s18, s36, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v19, v20, vcc
-; GFX9-NEXT: v_add_f32_e32 v19, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v19, s18, v16
; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1
; GFX9-NEXT: v_add_u32_e32 v20, v20, v19
; GFX9-NEXT: v_add_u32_e32 v20, 0x7fff, v20
@@ -212850,25 +214456,25 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; GFX9-NEXT: s_and_b32 s4, s51, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s19, 0xffff0000
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_or_b32_sdwa v0, v0, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v19, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v19, s18, v16
; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1
; GFX9-NEXT: v_add_u32_e32 v20, v20, v19
; GFX9-NEXT: v_add_u32_e32 v20, 0x7fff, v20
; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; GFX9-NEXT: s_lshl_b32 s4, s51, 16
+; GFX9-NEXT: s_lshl_b32 s18, s19, 16
; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; GFX9-NEXT: v_add_f32_e32 v20, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v20, s18, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s17, 0xffff0000
; GFX9-NEXT: v_add_u32_e32 v21, v21, v20
; GFX9-NEXT: v_or_b32_sdwa v30, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s18, v16
; GFX9-NEXT: v_add_u32_e32 v21, 0x7fff, v21
; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
@@ -212881,9 +214487,9 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s49, 16
+; GFX9-NEXT: s_lshl_b32 s17, s17, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s17, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212892,17 +214498,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000
+; GFX9-NEXT: s_and_b32 s17, s16, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v29, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s17, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s48, 16
+; GFX9-NEXT: s_lshl_b32 s16, s16, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s16, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212911,17 +214517,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000
+; GFX9-NEXT: s_and_b32 s16, s15, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v28, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s16, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s47, 16
+; GFX9-NEXT: s_lshl_b32 s15, s15, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s15, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212930,17 +214536,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000
+; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v27, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s15, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s46, 16
+; GFX9-NEXT: s_lshl_b32 s14, s14, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s14, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212949,17 +214555,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000
+; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v26, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s14, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s45, 16
+; GFX9-NEXT: s_lshl_b32 s13, s13, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s13, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212968,17 +214574,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000
+; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v25, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s13, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s44, 16
+; GFX9-NEXT: s_lshl_b32 s12, s12, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s12, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -212987,17 +214593,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000
+; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v24, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s12, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s43, 16
+; GFX9-NEXT: s_lshl_b32 s11, s11, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s11, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -213006,17 +214612,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000
+; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v23, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s11, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s42, 16
+; GFX9-NEXT: s_lshl_b32 s10, s10, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s10, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -213025,17 +214631,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000
+; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v22, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s10, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s41, 16
+; GFX9-NEXT: s_lshl_b32 s9, s9, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s9, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -213044,17 +214650,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000
+; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v21, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s9, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s40, 16
+; GFX9-NEXT: s_lshl_b32 s8, s8, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s8, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -213063,17 +214669,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000
+; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v20, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s8, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s39, 16
+; GFX9-NEXT: s_lshl_b32 s7, s7, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s7, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -213082,17 +214688,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000
+; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v19, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s7, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s38, 16
+; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v32, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s6, v16
; GFX9-NEXT: v_bfe_u32 v32, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v32, v32, v18
; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32
@@ -213101,17 +214707,17 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v18, v32, v33, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000
+; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v18, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s6, v16
; GFX9-NEXT: v_bfe_u32 v32, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v32, v32, v17
; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s37, 16
+; GFX9-NEXT: s_lshl_b32 s5, s5, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v32, v33, vcc
-; GFX9-NEXT: v_add_f32_e32 v32, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v32, s5, v16
; GFX9-NEXT: v_bfe_u32 v33, v32, 16, 1
; GFX9-NEXT: v_add_u32_e32 v33, v33, v32
; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33
@@ -213120,12 +214726,12 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_cndmask_b32_e32 v32, v33, v34, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000
+; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX9-NEXT: v_add_f32_e32 v32, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v32, s5, v16
; GFX9-NEXT: v_bfe_u32 v33, v32, 16, 1
; GFX9-NEXT: v_add_u32_e32 v33, v33, v32
-; GFX9-NEXT: s_lshl_b32 s4, s36, 16
+; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33
; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v32
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v32, v32
@@ -213142,41 +214748,39 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %
; GFX9-NEXT: v_or_b32_sdwa v16, v32, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: s_branch .LBB101_6
; GFX9-NEXT: .LBB101_5:
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: .LBB101_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v35, 8
-; GFX9-NEXT: v_readlane_b32 s31, v35, 9
; GFX9-NEXT: v_readlane_b32 s51, v35, 7
; GFX9-NEXT: v_readlane_b32 s50, v35, 6
; GFX9-NEXT: v_readlane_b32 s49, v35, 5
@@ -216022,22 +217626,22 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_writelane_b32 v63, s99, 33
; SI-NEXT: v_writelane_b32 v63, s30, 34
; SI-NEXT: v_writelane_b32 v63, s31, 35
-; SI-NEXT: s_lshr_b32 s5, s16, 16
+; SI-NEXT: s_lshr_b32 s6, s16, 16
; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s6, s17, 16
-; SI-NEXT: v_writelane_b32 v62, s5, 0
-; SI-NEXT: s_lshr_b32 s7, s18, 16
-; SI-NEXT: v_writelane_b32 v62, s6, 1
-; SI-NEXT: s_lshr_b32 s8, s19, 16
-; SI-NEXT: v_writelane_b32 v62, s7, 2
-; SI-NEXT: s_lshr_b32 s9, s20, 16
-; SI-NEXT: v_writelane_b32 v62, s8, 3
-; SI-NEXT: s_lshr_b32 s10, s21, 16
-; SI-NEXT: v_writelane_b32 v62, s9, 4
-; SI-NEXT: s_lshr_b32 s11, s22, 16
-; SI-NEXT: v_readfirstlane_b32 s50, v17
-; SI-NEXT: v_readfirstlane_b32 s38, v16
-; SI-NEXT: v_readfirstlane_b32 s31, v15
+; SI-NEXT: s_lshr_b32 s7, s17, 16
+; SI-NEXT: v_writelane_b32 v62, s6, 0
+; SI-NEXT: s_lshr_b32 s8, s18, 16
+; SI-NEXT: v_writelane_b32 v62, s7, 1
+; SI-NEXT: s_lshr_b32 s9, s19, 16
+; SI-NEXT: v_writelane_b32 v62, s8, 2
+; SI-NEXT: s_lshr_b32 s10, s20, 16
+; SI-NEXT: v_writelane_b32 v62, s9, 3
+; SI-NEXT: s_lshr_b32 s11, s21, 16
+; SI-NEXT: v_writelane_b32 v62, s10, 4
+; SI-NEXT: s_lshr_b32 s12, s22, 16
+; SI-NEXT: v_readfirstlane_b32 s49, v17
+; SI-NEXT: v_readfirstlane_b32 s37, v16
+; SI-NEXT: v_readfirstlane_b32 s4, v15
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v14
; SI-NEXT: v_readfirstlane_b32 s94, v13
; SI-NEXT: v_readfirstlane_b32 s92, v12
@@ -216053,17 +217657,17 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readfirstlane_b32 s56, v2
; SI-NEXT: v_readfirstlane_b32 s46, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
-; SI-NEXT: v_writelane_b32 v62, s10, 5
+; SI-NEXT: v_writelane_b32 v62, s11, 5
; SI-NEXT: s_lshr_b32 s43, s29, 16
; SI-NEXT: s_lshr_b32 s42, s28, 16
; SI-NEXT: s_lshr_b32 s41, s27, 16
; SI-NEXT: s_lshr_b32 s40, s26, 16
; SI-NEXT: s_lshr_b32 s15, s25, 16
; SI-NEXT: s_lshr_b32 s14, s24, 16
-; SI-NEXT: s_lshr_b32 s12, s23, 16
-; SI-NEXT: s_lshr_b32 s53, s50, 16
-; SI-NEXT: s_lshr_b32 s49, s38, 16
-; SI-NEXT: s_lshr_b32 s36, s31, 16
+; SI-NEXT: s_lshr_b32 s13, s23, 16
+; SI-NEXT: s_lshr_b32 s52, s49, 16
+; SI-NEXT: s_lshr_b32 s48, s37, 16
+; SI-NEXT: s_lshr_b32 s35, s4, 16
; SI-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
@@ -216079,149 +217683,151 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_lshr_b32 s57, s56, 16
; SI-NEXT: s_lshr_b32 s47, s46, 16
; SI-NEXT: s_lshr_b32 s45, s44, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_writelane_b32 v62, s11, 6
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v62, s12, 7
+; SI-NEXT: v_readfirstlane_b32 s5, v18
+; SI-NEXT: v_writelane_b32 v62, s12, 6
+; SI-NEXT: s_cmp_lg_u32 s5, 0
+; SI-NEXT: v_writelane_b32 v62, s13, 7
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshl_b32 s4, s16, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 33
-; SI-NEXT: s_lshl_b32 s4, s5, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 32
-; SI-NEXT: s_lshl_b32 s4, s17, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 31
-; SI-NEXT: s_lshl_b32 s4, s6, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 30
-; SI-NEXT: s_lshl_b32 s4, s18, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 29
-; SI-NEXT: s_lshl_b32 s4, s7, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 28
-; SI-NEXT: s_lshl_b32 s4, s19, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 27
-; SI-NEXT: s_lshl_b32 s4, s8, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 26
-; SI-NEXT: s_lshl_b32 s4, s20, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 25
-; SI-NEXT: s_lshl_b32 s4, s9, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 24
-; SI-NEXT: s_lshl_b32 s4, s21, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 23
-; SI-NEXT: s_lshl_b32 s4, s10, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 22
-; SI-NEXT: s_lshl_b32 s4, s22, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 21
-; SI-NEXT: s_lshl_b32 s4, s11, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 20
-; SI-NEXT: s_lshl_b32 s4, s23, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 19
-; SI-NEXT: s_lshl_b32 s4, s12, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 18
-; SI-NEXT: s_lshl_b32 s4, s24, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 17
-; SI-NEXT: s_lshl_b32 s4, s14, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 16
-; SI-NEXT: s_lshl_b32 s4, s25, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 15
-; SI-NEXT: s_lshl_b32 s4, s15, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 14
-; SI-NEXT: s_lshl_b32 s4, s26, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 13
-; SI-NEXT: s_lshl_b32 s4, s40, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 12
-; SI-NEXT: s_lshl_b32 s4, s27, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 11
-; SI-NEXT: s_lshl_b32 s4, s41, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 10
-; SI-NEXT: s_lshl_b32 s4, s28, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 9
-; SI-NEXT: s_lshl_b32 s4, s42, 16
-; SI-NEXT: v_writelane_b32 v62, s4, 8
-; SI-NEXT: s_lshl_b32 s96, s29, 16
-; SI-NEXT: s_lshl_b32 s97, s43, 16
-; SI-NEXT: s_lshl_b32 s98, s44, 16
-; SI-NEXT: s_lshl_b32 s99, s45, 16
-; SI-NEXT: s_lshl_b32 s30, s46, 16
-; SI-NEXT: s_lshl_b32 s34, s47, 16
-; SI-NEXT: s_lshl_b32 s35, s56, 16
-; SI-NEXT: s_lshl_b32 s37, s57, 16
-; SI-NEXT: s_lshl_b32 s39, s58, 16
-; SI-NEXT: s_lshl_b32 s48, s59, 16
-; SI-NEXT: s_lshl_b32 s51, s60, 16
-; SI-NEXT: s_lshl_b32 s52, s61, 16
-; SI-NEXT: s_lshl_b32 s54, s62, 16
-; SI-NEXT: s_lshl_b32 s55, s63, 16
-; SI-NEXT: s_lshl_b32 s64, s72, 16
-; SI-NEXT: s_lshl_b32 s65, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s16, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 33
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 32
+; SI-NEXT: s_lshl_b32 s5, s17, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 31
+; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 30
+; SI-NEXT: s_lshl_b32 s5, s18, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 29
+; SI-NEXT: s_lshl_b32 s5, s8, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 28
+; SI-NEXT: s_lshl_b32 s5, s19, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 27
+; SI-NEXT: s_lshl_b32 s5, s9, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 26
+; SI-NEXT: s_lshl_b32 s5, s20, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 25
+; SI-NEXT: s_lshl_b32 s5, s10, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 24
+; SI-NEXT: s_lshl_b32 s5, s21, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 23
+; SI-NEXT: s_lshl_b32 s5, s11, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 22
+; SI-NEXT: s_lshl_b32 s5, s22, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 21
+; SI-NEXT: s_lshl_b32 s5, s12, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 20
+; SI-NEXT: s_lshl_b32 s5, s23, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 19
+; SI-NEXT: s_lshl_b32 s5, s13, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 18
+; SI-NEXT: s_lshl_b32 s5, s24, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 17
+; SI-NEXT: s_lshl_b32 s5, s14, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s25, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 15
+; SI-NEXT: s_lshl_b32 s5, s15, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 14
+; SI-NEXT: s_lshl_b32 s5, s26, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 13
+; SI-NEXT: s_lshl_b32 s5, s40, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 12
+; SI-NEXT: s_lshl_b32 s5, s27, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 11
+; SI-NEXT: s_lshl_b32 s5, s41, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 10
+; SI-NEXT: s_lshl_b32 s5, s28, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 9
+; SI-NEXT: s_lshl_b32 s5, s42, 16
+; SI-NEXT: v_writelane_b32 v62, s5, 8
+; SI-NEXT: s_lshl_b32 s87, s29, 16
+; SI-NEXT: s_lshl_b32 s96, s43, 16
+; SI-NEXT: s_lshl_b32 s97, s44, 16
+; SI-NEXT: s_lshl_b32 s98, s45, 16
+; SI-NEXT: s_lshl_b32 s99, s46, 16
+; SI-NEXT: s_lshl_b32 s30, s47, 16
+; SI-NEXT: s_lshl_b32 s31, s56, 16
+; SI-NEXT: s_lshl_b32 s36, s57, 16
+; SI-NEXT: s_lshl_b32 s38, s58, 16
+; SI-NEXT: s_lshl_b32 s39, s59, 16
+; SI-NEXT: s_lshl_b32 s50, s60, 16
+; SI-NEXT: s_lshl_b32 s51, s61, 16
+; SI-NEXT: s_lshl_b32 s53, s62, 16
+; SI-NEXT: s_lshl_b32 s54, s63, 16
+; SI-NEXT: s_lshl_b32 s55, s72, 16
+; SI-NEXT: s_lshl_b32 s64, s73, 16
; SI-NEXT: s_lshl_b32 s6, s74, 16
-; SI-NEXT: s_lshl_b32 s66, s75, 16
+; SI-NEXT: s_lshl_b32 s65, s75, 16
; SI-NEXT: s_lshl_b32 s7, s76, 16
-; SI-NEXT: s_lshl_b32 s67, s77, 16
-; SI-NEXT: s_lshl_b32 s68, s78, 16
-; SI-NEXT: s_lshl_b32 s69, s79, 16
+; SI-NEXT: s_lshl_b32 s66, s77, 16
+; SI-NEXT: s_lshl_b32 s67, s78, 16
+; SI-NEXT: s_lshl_b32 s68, s79, 16
; SI-NEXT: s_lshl_b32 s8, s88, 16
-; SI-NEXT: s_lshl_b32 s70, s89, 16
-; SI-NEXT: s_lshl_b32 s71, s90, 16
+; SI-NEXT: s_lshl_b32 s69, s89, 16
+; SI-NEXT: s_lshl_b32 s70, s90, 16
; SI-NEXT: s_lshl_b32 s9, s91, 16
-; SI-NEXT: s_lshl_b32 s80, s92, 16
-; SI-NEXT: s_lshl_b32 s81, s93, 16
+; SI-NEXT: s_lshl_b32 s71, s92, 16
+; SI-NEXT: s_lshl_b32 s80, s93, 16
; SI-NEXT: s_lshl_b32 s10, s94, 16
-; SI-NEXT: s_lshl_b32 s82, s95, 16
-; SI-NEXT: s_lshl_b32 s83, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s81, s95, 16
+; SI-NEXT: s_lshl_b32 s82, vcc_lo, 16
; SI-NEXT: s_lshl_b32 s11, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s84, s31, 16
-; SI-NEXT: s_lshl_b32 s85, s36, 16
-; SI-NEXT: s_lshl_b32 s12, s38, 16
-; SI-NEXT: s_lshl_b32 s86, s49, 16
-; SI-NEXT: s_lshl_b32 s13, s50, 16
-; SI-NEXT: s_lshl_b32 s87, s53, 16
+; SI-NEXT: s_mov_b32 s34, s4
+; SI-NEXT: s_lshl_b32 s83, s4, 16
+; SI-NEXT: s_lshl_b32 s84, s35, 16
+; SI-NEXT: s_lshl_b32 s12, s37, 16
+; SI-NEXT: s_lshl_b32 s85, s48, 16
+; SI-NEXT: s_lshl_b32 s13, s49, 16
+; SI-NEXT: s_lshl_b32 s86, s52, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: s_mov_b32 s34, s4
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr87
; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr97
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr99
; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr85
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: ; implicit-def: $sgpr85
; SI-NEXT: ; implicit-def: $sgpr13
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr6
@@ -216275,9 +217881,9 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB103_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s53
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s50
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s49
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s52
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s49
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s48
; SI-NEXT: v_readlane_b32 s4, v62, 7
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -216291,10 +217897,10 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_cvt_f32_f16_e32 v2, s18
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s38
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s37
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s36
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s35
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -216303,7 +217909,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s34
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, vcc_hi
@@ -216635,7 +218241,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s4, v62, 25
; SI-NEXT: v_mov_b32_e32 v38, s4
; SI-NEXT: v_readlane_b32 s4, v62, 26
-; SI-NEXT: v_mov_b32_e32 v0, s87
+; SI-NEXT: v_mov_b32_e32 v0, s86
; SI-NEXT: v_mov_b32_e32 v48, s4
; SI-NEXT: v_readlane_b32 s4, v62, 27
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
@@ -216645,7 +218251,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s4, v62, 28
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s86
+; SI-NEXT: v_mov_b32_e32 v0, s85
; SI-NEXT: v_mov_b32_e32 v5, s4
; SI-NEXT: v_readlane_b32 s4, v62, 29
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
@@ -216655,12 +218261,12 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_readlane_b32 s4, v62, 30
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s85
+; SI-NEXT: v_mov_b32_e32 v0, s84
; SI-NEXT: v_mov_b32_e32 v3, s4
; SI-NEXT: v_readlane_b32 s4, v62, 31
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s84
+; SI-NEXT: v_mov_b32_e32 v0, s83
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_readlane_b32 s4, v62, 32
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
@@ -216669,37 +218275,37 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s4, v62, 33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v39, s83
-; SI-NEXT: v_mov_b32_e32 v51, s82
+; SI-NEXT: v_mov_b32_e32 v39, s82
+; SI-NEXT: v_mov_b32_e32 v51, s81
; SI-NEXT: v_mov_b32_e32 v49, s10
-; SI-NEXT: v_mov_b32_e32 v53, s81
-; SI-NEXT: v_mov_b32_e32 v52, s80
+; SI-NEXT: v_mov_b32_e32 v53, s80
+; SI-NEXT: v_mov_b32_e32 v52, s71
; SI-NEXT: v_mov_b32_e32 v55, s9
-; SI-NEXT: v_mov_b32_e32 v54, s71
-; SI-NEXT: v_mov_b32_e32 v41, s70
+; SI-NEXT: v_mov_b32_e32 v54, s70
+; SI-NEXT: v_mov_b32_e32 v41, s69
; SI-NEXT: v_mov_b32_e32 v40, s8
-; SI-NEXT: v_mov_b32_e32 v43, s69
-; SI-NEXT: v_mov_b32_e32 v42, s68
-; SI-NEXT: v_mov_b32_e32 v45, s67
+; SI-NEXT: v_mov_b32_e32 v43, s68
+; SI-NEXT: v_mov_b32_e32 v42, s67
+; SI-NEXT: v_mov_b32_e32 v45, s66
; SI-NEXT: v_mov_b32_e32 v44, s7
-; SI-NEXT: v_mov_b32_e32 v47, s66
+; SI-NEXT: v_mov_b32_e32 v47, s65
; SI-NEXT: v_mov_b32_e32 v46, s6
-; SI-NEXT: v_mov_b32_e32 v57, s65
-; SI-NEXT: v_mov_b32_e32 v56, s64
-; SI-NEXT: v_mov_b32_e32 v59, s55
-; SI-NEXT: v_mov_b32_e32 v58, s54
-; SI-NEXT: v_mov_b32_e32 v61, s52
-; SI-NEXT: v_mov_b32_e32 v60, s51
-; SI-NEXT: v_mov_b32_e32 v37, s48
-; SI-NEXT: v_mov_b32_e32 v36, s39
-; SI-NEXT: v_mov_b32_e32 v33, s37
-; SI-NEXT: v_mov_b32_e32 v32, s35
-; SI-NEXT: v_mov_b32_e32 v31, s34
-; SI-NEXT: v_mov_b32_e32 v30, s30
-; SI-NEXT: v_mov_b32_e32 v29, s99
-; SI-NEXT: v_mov_b32_e32 v28, s98
-; SI-NEXT: v_mov_b32_e32 v27, s97
-; SI-NEXT: v_mov_b32_e32 v26, s96
+; SI-NEXT: v_mov_b32_e32 v57, s64
+; SI-NEXT: v_mov_b32_e32 v56, s55
+; SI-NEXT: v_mov_b32_e32 v59, s54
+; SI-NEXT: v_mov_b32_e32 v58, s53
+; SI-NEXT: v_mov_b32_e32 v61, s51
+; SI-NEXT: v_mov_b32_e32 v60, s50
+; SI-NEXT: v_mov_b32_e32 v37, s39
+; SI-NEXT: v_mov_b32_e32 v36, s38
+; SI-NEXT: v_mov_b32_e32 v33, s36
+; SI-NEXT: v_mov_b32_e32 v32, s31
+; SI-NEXT: v_mov_b32_e32 v31, s30
+; SI-NEXT: v_mov_b32_e32 v30, s99
+; SI-NEXT: v_mov_b32_e32 v29, s98
+; SI-NEXT: v_mov_b32_e32 v28, s97
+; SI-NEXT: v_mov_b32_e32 v27, s96
+; SI-NEXT: v_mov_b32_e32 v26, s87
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: .LBB103_6: ; %end
@@ -216939,238 +218545,241 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; VI-NEXT: v_writelane_b32 v33, s49, 5
; VI-NEXT: v_writelane_b32 v33, s50, 6
; VI-NEXT: v_writelane_b32 v33, s51, 7
-; VI-NEXT: v_writelane_b32 v33, s30, 8
-; VI-NEXT: v_writelane_b32 v33, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB103_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB103_3
; VI-NEXT: .LBB103_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB103_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB103_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: s_lshr_b32 s4, s50, 16
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: s_lshr_b32 s4, s30, 16
; VI-NEXT: v_mov_b32_e32 v16, 0x200
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: s_lshr_b32 s4, s31, 16
+; VI-NEXT: v_add_f16_e32 v17, s18, v16
+; VI-NEXT: s_lshr_b32 s18, s18, 16
+; VI-NEXT: v_mov_b32_e32 v0, s18
+; VI-NEXT: s_lshr_b32 s18, s50, 16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: s_lshr_b32 s18, s51, 16
; VI-NEXT: v_add_f16_sdwa v18, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v0, s30, v16
+; VI-NEXT: v_add_f16_e32 v0, s50, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_mov_b32_e32 v3, s4
-; VI-NEXT: s_lshr_b32 s4, s29, 16
+; VI-NEXT: v_mov_b32_e32 v3, s18
+; VI-NEXT: s_lshr_b32 s18, s49, 16
; VI-NEXT: v_or_b32_e32 v14, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s29, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s49, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s28, 16
+; VI-NEXT: s_lshr_b32 s18, s48, 16
; VI-NEXT: v_or_b32_e32 v13, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s28, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s48, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s18, s47, 16
; VI-NEXT: v_or_b32_e32 v12, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s27, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s47, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: s_lshr_b32 s18, s46, 16
; VI-NEXT: v_or_b32_e32 v11, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s26, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s46, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: s_lshr_b32 s18, s45, 16
; VI-NEXT: v_or_b32_e32 v10, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s25, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s45, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: s_lshr_b32 s18, s44, 16
; VI-NEXT: v_or_b32_e32 v9, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s24, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s44, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s18, s43, 16
; VI-NEXT: v_or_b32_e32 v8, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s23, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s43, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s18, s42, 16
; VI-NEXT: v_or_b32_e32 v7, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s22, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s42, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s18, s41, 16
; VI-NEXT: v_or_b32_e32 v6, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s21, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s41, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s20, 16
+; VI-NEXT: s_lshr_b32 s18, s40, 16
; VI-NEXT: v_or_b32_e32 v5, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s20, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s40, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s18, s39, 16
; VI-NEXT: v_or_b32_e32 v4, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v2, s31, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v2, s51, v16
; VI-NEXT: v_add_f16_sdwa v3, v3, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v0, s19, v16
+; VI-NEXT: v_add_f16_e32 v0, s39, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s18, s38, 16
; VI-NEXT: v_or_b32_e32 v15, v2, v3
; VI-NEXT: v_or_b32_e32 v3, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s18, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s38, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s18, s37, 16
; VI-NEXT: v_or_b32_e32 v2, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: s_lshr_b32 s4, s16, 16
-; VI-NEXT: v_mov_b32_e32 v19, s4
-; VI-NEXT: s_lshr_b32 s4, s51, 16
-; VI-NEXT: v_add_f16_e32 v17, s50, v16
-; VI-NEXT: v_mov_b32_e32 v20, s4
-; VI-NEXT: s_lshr_b32 s4, s49, 16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: s_lshr_b32 s18, s36, 16
+; VI-NEXT: v_mov_b32_e32 v19, s18
+; VI-NEXT: s_lshr_b32 s18, s19, 16
+; VI-NEXT: v_mov_b32_e32 v20, s18
+; VI-NEXT: s_lshr_b32 s18, s17, 16
; VI-NEXT: v_or_b32_e32 v30, v17, v18
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s18
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s49, v16
-; VI-NEXT: s_lshr_b32 s4, s48, 16
+; VI-NEXT: v_add_f16_e32 v18, s17, v16
+; VI-NEXT: s_lshr_b32 s17, s16, 16
; VI-NEXT: v_or_b32_e32 v29, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s17
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s48, v16
-; VI-NEXT: s_lshr_b32 s4, s47, 16
+; VI-NEXT: v_add_f16_e32 v18, s16, v16
+; VI-NEXT: s_lshr_b32 s16, s15, 16
; VI-NEXT: v_or_b32_e32 v28, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s16
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s47, v16
-; VI-NEXT: s_lshr_b32 s4, s46, 16
+; VI-NEXT: v_add_f16_e32 v18, s15, v16
+; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: v_or_b32_e32 v27, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s15
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s46, v16
-; VI-NEXT: s_lshr_b32 s4, s45, 16
+; VI-NEXT: v_add_f16_e32 v18, s14, v16
+; VI-NEXT: s_lshr_b32 s14, s13, 16
; VI-NEXT: v_or_b32_e32 v26, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s14
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s45, v16
-; VI-NEXT: s_lshr_b32 s4, s44, 16
+; VI-NEXT: v_add_f16_e32 v18, s13, v16
+; VI-NEXT: s_lshr_b32 s13, s12, 16
; VI-NEXT: v_or_b32_e32 v25, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s13
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s44, v16
-; VI-NEXT: s_lshr_b32 s4, s43, 16
+; VI-NEXT: v_add_f16_e32 v18, s12, v16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: v_or_b32_e32 v24, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s12
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s43, v16
-; VI-NEXT: s_lshr_b32 s4, s42, 16
+; VI-NEXT: v_add_f16_e32 v18, s11, v16
+; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: v_or_b32_e32 v23, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s11
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s42, v16
-; VI-NEXT: s_lshr_b32 s4, s41, 16
+; VI-NEXT: v_add_f16_e32 v18, s10, v16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
; VI-NEXT: v_or_b32_e32 v22, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_add_f16_e32 v0, s17, v16
+; VI-NEXT: v_mov_b32_e32 v17, s10
+; VI-NEXT: v_add_f16_e32 v0, s37, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s41, v16
-; VI-NEXT: s_lshr_b32 s4, s40, 16
+; VI-NEXT: v_add_f16_e32 v18, s9, v16
+; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: v_or_b32_e32 v1, v0, v1
-; VI-NEXT: v_add_f16_e32 v0, s16, v16
+; VI-NEXT: v_add_f16_e32 v0, s36, v16
; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v21, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s9
; VI-NEXT: v_or_b32_e32 v0, v0, v19
-; VI-NEXT: v_add_f16_e32 v19, s51, v16
+; VI-NEXT: v_add_f16_e32 v19, s19, v16
; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s40, v16
-; VI-NEXT: s_lshr_b32 s4, s39, 16
+; VI-NEXT: v_add_f16_e32 v18, s8, v16
+; VI-NEXT: s_lshr_b32 s8, s7, 16
; VI-NEXT: v_or_b32_e32 v31, v19, v20
; VI-NEXT: v_or_b32_e32 v20, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s8
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s39, v16
-; VI-NEXT: s_lshr_b32 s4, s38, 16
+; VI-NEXT: v_add_f16_e32 v18, s7, v16
+; VI-NEXT: s_lshr_b32 s7, s6, 16
; VI-NEXT: v_or_b32_e32 v19, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s7
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s38, v16
-; VI-NEXT: s_lshr_b32 s4, s37, 16
+; VI-NEXT: v_add_f16_e32 v18, s6, v16
+; VI-NEXT: s_lshr_b32 s6, s5, 16
; VI-NEXT: v_or_b32_e32 v18, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s6
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v32, s37, v16
-; VI-NEXT: s_lshr_b32 s4, s36, 16
+; VI-NEXT: v_add_f16_e32 v32, s5, v16
+; VI-NEXT: s_lshr_b32 s5, s4, 16
; VI-NEXT: v_or_b32_e32 v17, v32, v17
-; VI-NEXT: v_mov_b32_e32 v32, s4
+; VI-NEXT: v_mov_b32_e32 v32, s5
; VI-NEXT: v_add_f16_sdwa v32, v32, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s36, v16
+; VI-NEXT: v_add_f16_e32 v16, s4, v16
; VI-NEXT: v_or_b32_e32 v16, v16, v32
; VI-NEXT: s_branch .LBB103_6
; VI-NEXT: .LBB103_5:
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
; VI-NEXT: .LBB103_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v33, 8
-; VI-NEXT: v_readlane_b32 s31, v33, 9
; VI-NEXT: v_readlane_b32 s51, v33, 7
; VI-NEXT: v_readlane_b32 s50, v33, 6
; VI-NEXT: v_readlane_b32 s49, v33, 5
@@ -217199,110 +218808,113 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB103_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB103_3
; GFX9-NEXT: .LBB103_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB103_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB103_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v16, 0x200
-; GFX9-NEXT: v_pk_add_f16 v15, s31, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v14, s30, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v13, s29, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v12, s28, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v11, s27, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v10, s26, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v9, s25, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, s24, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, s23, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, s22, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v5, s21, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v4, s20, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v3, s19, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v2, s18, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v1, s17, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v0, s16, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v31, s51, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v30, s50, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v29, s49, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v28, s48, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v27, s47, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v26, s46, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v25, s45, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v24, s44, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v23, s43, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v22, s42, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v21, s41, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v20, s40, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v19, s39, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v18, s38, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v17, s37, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v16, s36, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v15, s51, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v14, s50, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v13, s49, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v12, s48, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v11, s47, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v10, s46, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v9, s45, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, s44, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, s43, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v6, s42, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v5, s41, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v4, s40, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v3, s39, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v2, s38, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v1, s37, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v0, s36, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v31, s19, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v30, s18, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v29, s17, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v28, s16, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v27, s15, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v26, s14, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v25, s13, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v24, s12, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v23, s11, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v22, s10, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v21, s9, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v20, s8, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v19, s7, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v18, s6, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v17, s5, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v16, s4, v16 op_sel_hi:[1,0]
; GFX9-NEXT: s_branch .LBB103_6
; GFX9-NEXT: .LBB103_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB103_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -220891,7 +222503,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -220917,7 +222529,6 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s15, s24, 16
; SI-NEXT: s_and_b32 s24, s23, 0xffff0000
; SI-NEXT: s_lshl_b32 s23, s23, 16
-; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: v_readfirstlane_b32 s42, v17
; SI-NEXT: v_readfirstlane_b32 s44, v16
; SI-NEXT: v_readfirstlane_b32 s46, v15
@@ -220936,7 +222547,6 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
; SI-NEXT: v_readfirstlane_b32 s30, v1
; SI-NEXT: v_readfirstlane_b32 s34, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
@@ -220946,6 +222556,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
; SI-NEXT: s_lshl_b32 s11, s26, 16
; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
+; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s25, s22, 0xffff0000
; SI-NEXT: s_lshl_b32 s22, s22, 16
; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
@@ -220997,1069 +222608,1090 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v18
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s23
; SI-NEXT: s_cmp_lg_u32 s36, 0
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, s41
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s29
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s27
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_mul_f32_e64 v61, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s14
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v37, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s25
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s30
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v62, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, vcc_lo
; SI-NEXT: v_mul_f32_e64 v31, 1.0, vcc_hi
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s93
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s79
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s77
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s75
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e64 v1, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s59
; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56
; SI-NEXT: v_mul_f32_e64 v9, 1.0, s57
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s46
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s47
; SI-NEXT: v_mul_f32_e64 v3, 1.0, s44
; SI-NEXT: v_mul_f32_e64 v5, 1.0, s45
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s43
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s43
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB105_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v42
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v46
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v38
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v34
+; SI-NEXT: v_mov_b32_e32 v27, v59
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v51
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v42
+; SI-NEXT: v_mov_b32_e32 v48, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v43
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: v_mov_b32_e32 v31, v38
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v61
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v52
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v43
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v55
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v14
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v44
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v41
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v46
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v24
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v19
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v61
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v59
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v33
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v32
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v48
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v12
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v36
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v53
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v18
-; SI-NEXT: v_mov_b32_e32 v48, v59
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v50
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v62
-; SI-NEXT: v_mov_b32_e32 v43, v34
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v56
+; SI-NEXT: v_mov_b32_e32 v56, v59
+; SI-NEXT: v_mov_b32_e32 v59, v27
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v59
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v37
-; SI-NEXT: v_mov_b32_e32 v37, v57
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v49
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v58
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v30
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v37
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v39
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v62
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v47
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v32, v48
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v23
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v23
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v26
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v53
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v51
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v4
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v30
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v41
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v33
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v0
-; SI-NEXT: v_mov_b32_e32 v34, v2
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v18, v0
; SI-NEXT: s_branch .LBB105_3
; SI-NEXT: .LBB105_2:
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v43, v34
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_mov_b32_e32 v6, v25
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; implicit-def: $vgpr5
-; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: .LBB105_3: ; %Flow
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
+; SI-NEXT: v_mov_b32_e32 v24, v53
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB105_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v52
-; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
-; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50
-; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
-; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
-; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v51
-; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v30
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v40
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v60
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v47, 0x40c00000, v0
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v34
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v8
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v29
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v37, v61
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v59
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v0
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v25
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v0
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v10
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
+; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v2
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[59:60], v[33:34], 16
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(9)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v17
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v51
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v23
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v24
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v25
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v15
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v13
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v11
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v10
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v12
+; SI-NEXT: v_lshr_b64 v[54:55], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v0
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v14
+; SI-NEXT: v_lshr_b64 v[29:30], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v5
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v55, v2
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v44, v29
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v16
+; SI-NEXT: v_lshr_b64 v[39:40], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v16
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v37
+; SI-NEXT: v_lshr_b64 v[47:48], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v17
+; SI-NEXT: v_lshr_b64 v[35:36], v[8:9], 16
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v17
+; SI-NEXT: v_mov_b32_e32 v17, v56
+; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v14
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v18
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v18
+; SI-NEXT: v_mov_b32_e32 v18, v57
+; SI-NEXT: v_mov_b32_e32 v56, v3
+; SI-NEXT: v_mov_b32_e32 v3, v27
+; SI-NEXT: v_mov_b32_e32 v2, v26
+; SI-NEXT: v_lshr_b64 v[27:28], v[30:31], 16
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v37
+; SI-NEXT: v_lshr_b64 v[37:38], v[52:53], 16
+; SI-NEXT: v_mov_b32_e32 v28, v27
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v6
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v19
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8
-; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v9
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v20
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v8
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_mov_b32_e32 v8, v50
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v8, v34
+; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v20
+; SI-NEXT: v_mov_b32_e32 v9, v3
+; SI-NEXT: v_lshr_b64 v[49:50], v[49:50], 16
+; SI-NEXT: v_lshr_b64 v[33:34], v[30:31], 16
+; SI-NEXT: v_mov_b32_e32 v50, v39
+; SI-NEXT: v_lshr_b64 v[29:30], v[26:27], 16
+; SI-NEXT: v_mov_b32_e32 v34, v33
+; SI-NEXT: v_mov_b32_e32 v26, v35
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v8, v62
+; SI-NEXT: v_lshr_b64 v[61:62], v[61:62], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v8, v43
+; SI-NEXT: v_lshr_b64 v[42:43], v[42:43], 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[38:39], v[41:42], 16
+; SI-NEXT: v_lshr_b64 v[39:40], v[60:61], 16
+; SI-NEXT: v_mov_b32_e32 v60, v59
+; SI-NEXT: v_lshr_b64 v[58:59], v[58:59], 16
+; SI-NEXT: v_mov_b32_e32 v43, v42
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v20, v7
+; SI-NEXT: v_mov_b32_e32 v19, v6
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v12
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10
-; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v1, v36
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v46
-; SI-NEXT: v_lshr_b64 v[35:36], v[35:36], 16
-; SI-NEXT: v_lshr_b64 v[45:46], v[45:46], 16
-; SI-NEXT: v_mov_b32_e32 v36, v60
-; SI-NEXT: v_mov_b32_e32 v60, v48
-; SI-NEXT: v_mov_b32_e32 v46, v40
-; SI-NEXT: v_mov_b32_e32 v39, v31
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v10
-; SI-NEXT: v_lshr_b64 v[61:62], v[42:43], 16
-; SI-NEXT: v_mov_b32_e32 v42, v21
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v28
-; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v62, v8
+; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v10
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, v59
-; SI-NEXT: v_lshr_b64 v[58:59], v[58:59], 16
-; SI-NEXT: v_mov_b32_e32 v59, v47
-; SI-NEXT: v_mov_b32_e32 v47, v41
-; SI-NEXT: v_mov_b32_e32 v40, v32
-; SI-NEXT: v_mov_b32_e32 v41, v20
-; SI-NEXT: v_mov_b32_e32 v31, v30
-; SI-NEXT: v_mov_b32_e32 v30, v29
-; SI-NEXT: v_mov_b32_e32 v48, v19
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v22
-; SI-NEXT: v_lshr_b64 v[21:22], v[30:31], 16
-; SI-NEXT: v_lshr_b64 v[28:29], v[57:58], 16
-; SI-NEXT: v_mov_b32_e32 v56, v27
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
+; SI-NEXT: v_lshr_b64 v[9:10], v[2:3], 16
+; SI-NEXT: v_mov_b32_e32 v2, v56
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[1:2], v[39:40], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3
-; SI-NEXT: v_lshr_b64 v[3:4], v[52:53], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v5
-; SI-NEXT: v_lshr_b64 v[5:6], v[54:55], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v7
-; SI-NEXT: v_lshr_b64 v[7:8], v[49:50], 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v9
-; SI-NEXT: v_lshr_b64 v[9:10], v[46:47], 16
+; SI-NEXT: v_mov_b32_e32 v2, v5
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v11
-; SI-NEXT: v_lshr_b64 v[11:12], v[23:24], 16
+; SI-NEXT: v_lshr_b64 v[11:12], v[55:56], 16
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v13
-; SI-NEXT: v_mov_b32_e32 v13, v60
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[13:14], v[59:60], 16
+; SI-NEXT: v_lshr_b64 v[13:14], v[4:5], 16
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v15
-; SI-NEXT: v_lshr_b64 v[15:16], v[36:37], 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v17
-; SI-NEXT: v_lshr_b64 v[17:18], v[18:19], 16
-; SI-NEXT: v_mov_b32_e32 v18, v43
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v54, v24
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v25
-; SI-NEXT: v_lshr_b64 v[24:25], v[41:42], 16
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v33
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[23:24], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[20:21], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v55, v1
+; SI-NEXT: v_lshr_b64 v[15:16], v[0:1], 16
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, v18
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[60:61], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v46, v45
-; SI-NEXT: v_mov_b32_e32 v39, v50
-; SI-NEXT: v_lshr_b64 v[22:23], v[4:5], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
-; SI-NEXT: v_lshr_b64 v[32:33], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v59, v58
-; SI-NEXT: v_mov_b32_e32 v36, v35
+; SI-NEXT: v_mov_b32_e32 v1, v20
+; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v23
+; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v24
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v51
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[16:17], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v1, v22
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[14:15], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16
+; SI-NEXT: v_mov_b32_e32 v21, v46
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[21:22], v[45:46], 16
+; SI-NEXT: v_mov_b32_e32 v45, v1
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[22:23], v[32:33], 16
+; SI-NEXT: v_mov_b32_e32 v46, v54
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_mov_b32_e32 v52, v53
+; SI-NEXT: v_lshr_b64 v[56:57], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v57, v37
+; SI-NEXT: v_lshr_b64 v[0:1], v[20:21], 16
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[12:13], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[0:1], v[18:19], 16
+; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[10:11], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[14:15], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[8:9], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[12:13], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[6:7], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[10:11], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[26:27], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[8:9], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[44:45], 16
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[6:7], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[18:19], v[34:35], 16
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[1:2], v[36:37], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v36, v49
+; SI-NEXT: v_lshr_b64 v[48:49], v[48:49], 16
+; SI-NEXT: v_mov_b32_e32 v41, v0
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, v61
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: .LBB105_5: ; %end
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v1
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v56
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v21
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v3
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v5
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v61
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v19
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v17
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v9
-; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v49
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v57
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v34
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v28
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_readlane_b32 s30, v63, 3
; SI-NEXT: v_readlane_b32 s31, v63, 4
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v25
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v25
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v41
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_or_b32_e32 v6, v6, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v25
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v44
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v55
; SI-NEXT: v_or_b32_e32 v9, v10, v9
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v10, v10, v11
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v25
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v11, v12, v11
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v54
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v25
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v47
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v25
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v46
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v16, v16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v62
; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v44
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24
; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v55
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v52
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v50
; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v47
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v29
; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v40
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v28
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_or_b32_e32 v24, v24, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v59
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v26
+; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v38
+; SI-NEXT: v_or_b32_e32 v24, v24, v25
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v43
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v36
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v48
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v27
-; SI-NEXT: v_or_b32_e32 v26, v26, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v56
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v33
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v58
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_or_b32_e32 v28, v28, v29
-; SI-NEXT: v_and_b32_e32 v29, 0xffff, v46
+; SI-NEXT: v_and_b32_e32 v29, 0xffff, v60
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -222076,15 +223708,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v38
-; SI-NEXT: v_or_b32_e32 v30, v30, v32
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v30, v30, v31
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v36
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -222103,50 +223736,55 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_writelane_b32 v35, s49, 5
; VI-NEXT: v_writelane_b32 v35, s50, 6
; VI-NEXT: v_writelane_b32 v35, s51, 7
-; VI-NEXT: v_writelane_b32 v35, s30, 8
-; VI-NEXT: v_writelane_b32 v35, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB105_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB105_3
; VI-NEXT: .LBB105_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB105_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB105_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000
-; VI-NEXT: s_lshl_b32 s4, s48, 16
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: s_lshl_b32 s20, s16, 16
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
-; VI-NEXT: s_and_b32 s4, s48, 0xffff0000
+; VI-NEXT: s_and_b32 s16, s16, 0xffff0000
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
@@ -222154,52 +223792,52 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; VI-NEXT: s_lshl_b32 s5, s28, 16
+; VI-NEXT: s_lshl_b32 s20, s48, 16
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v0
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: s_and_b32 s5, s28, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s48, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; VI-NEXT: v_add_f32_e32 v1, s5, v32
+; VI-NEXT: v_add_f32_e32 v1, s20, v32
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s20, s50, 16
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; VI-NEXT: v_add_f32_e32 v2, s5, v32
+; VI-NEXT: v_add_f32_e32 v2, s20, v32
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; VI-NEXT: s_and_b32 s5, s30, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s50, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; VI-NEXT: v_add_f32_e32 v3, s5, v32
+; VI-NEXT: v_add_f32_e32 v3, s20, v32
; VI-NEXT: v_bfe_u32 v4, v3, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3
-; VI-NEXT: s_and_b32 s5, s26, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s46, 0xffff0000
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s26, 16
+; VI-NEXT: s_lshl_b32 s16, s46, 16
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3]
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -222208,16 +223846,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s24, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s44, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s24, 16
+; VI-NEXT: s_lshl_b32 s16, s44, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -222226,16 +223864,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s22, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s42, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s22, 16
+; VI-NEXT: s_lshl_b32 s16, s42, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -222244,16 +223882,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s20, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s40, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s20, 16
+; VI-NEXT: s_lshl_b32 s16, s40, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -222262,16 +223900,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s18, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s38, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s18, 16
+; VI-NEXT: s_lshl_b32 s16, s38, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; VI-NEXT: v_bfe_u32 v2, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0
@@ -222280,16 +223918,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s16, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s36, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v0, s5, v32
+; VI-NEXT: v_add_f32_e32 v0, s20, v32
; VI-NEXT: v_bfe_u32 v1, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0
-; VI-NEXT: s_lshl_b32 s4, s16, 16
+; VI-NEXT: s_lshl_b32 s16, s36, 16
; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1
; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; VI-NEXT: v_add_f32_e32 v0, s4, v32
+; VI-NEXT: v_add_f32_e32 v0, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; VI-NEXT: v_bfe_u32 v3, v0, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0
@@ -222298,131 +223936,131 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc
; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_and_b32 s5, s17, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s37, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1]
-; VI-NEXT: v_add_f32_e32 v1, s5, v32
+; VI-NEXT: v_add_f32_e32 v1, s20, v32
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_lshl_b32 s4, s17, 16
+; VI-NEXT: s_lshl_b32 s16, s37, 16
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc
-; VI-NEXT: v_add_f32_e32 v3, s4, v32
+; VI-NEXT: v_add_f32_e32 v3, s16, v32
; VI-NEXT: v_bfe_u32 v5, v3, 16, 1
; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5
-; VI-NEXT: s_and_b32 s5, s19, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s39, 0xffff0000
; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; VI-NEXT: v_add_f32_e32 v3, s5, v32
+; VI-NEXT: v_add_f32_e32 v3, s20, v32
; VI-NEXT: v_cndmask_b32_e32 v18, v5, v7, vcc
; VI-NEXT: v_bfe_u32 v5, v3, 16, 1
; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5
-; VI-NEXT: s_lshl_b32 s4, s19, 16
+; VI-NEXT: s_lshl_b32 s16, s39, 16
; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc
-; VI-NEXT: v_add_f32_e32 v5, s4, v32
+; VI-NEXT: v_add_f32_e32 v5, s16, v32
; VI-NEXT: v_bfe_u32 v7, v5, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1
; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7
-; VI-NEXT: s_and_b32 s5, s21, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s41, 0xffff0000
; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5
; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; VI-NEXT: v_add_f32_e32 v5, s5, v32
+; VI-NEXT: v_add_f32_e32 v5, s20, v32
; VI-NEXT: v_mov_b32_e32 v1, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v7, v9, vcc
; VI-NEXT: v_bfe_u32 v7, v5, 16, 1
; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7
-; VI-NEXT: s_lshl_b32 s4, s21, 16
+; VI-NEXT: s_lshl_b32 s16, s41, 16
; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5
; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
-; VI-NEXT: v_add_f32_e32 v7, s4, v32
+; VI-NEXT: v_add_f32_e32 v7, s16, v32
; VI-NEXT: v_bfe_u32 v9, v7, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: s_and_b32 s5, s23, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s43, 0xffff0000
; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7
; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; VI-NEXT: v_add_f32_e32 v7, s5, v32
+; VI-NEXT: v_add_f32_e32 v7, s20, v32
; VI-NEXT: v_mov_b32_e32 v3, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v9, v11, vcc
; VI-NEXT: v_bfe_u32 v9, v7, 16, 1
; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: s_lshl_b32 s4, s23, 16
+; VI-NEXT: s_lshl_b32 s16, s43, 16
; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7
; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc
-; VI-NEXT: v_add_f32_e32 v9, s4, v32
+; VI-NEXT: v_add_f32_e32 v9, s16, v32
; VI-NEXT: v_bfe_u32 v11, v9, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5
; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
-; VI-NEXT: s_and_b32 s5, s25, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s45, 0xffff0000
; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9
; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; VI-NEXT: v_add_f32_e32 v9, s5, v32
+; VI-NEXT: v_add_f32_e32 v9, s20, v32
; VI-NEXT: v_mov_b32_e32 v5, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v11, v13, vcc
; VI-NEXT: v_bfe_u32 v11, v9, 16, 1
; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9
; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
-; VI-NEXT: s_lshl_b32 s4, s25, 16
+; VI-NEXT: s_lshl_b32 s16, s45, 16
; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9
; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc
-; VI-NEXT: v_add_f32_e32 v11, s4, v32
+; VI-NEXT: v_add_f32_e32 v11, s16, v32
; VI-NEXT: v_bfe_u32 v13, v11, 16, 1
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v7
; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13
-; VI-NEXT: s_and_b32 s5, s27, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s47, 0xffff0000
; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11
; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; VI-NEXT: v_add_f32_e32 v11, s5, v32
+; VI-NEXT: v_add_f32_e32 v11, s20, v32
; VI-NEXT: v_mov_b32_e32 v7, v18
; VI-NEXT: v_cndmask_b32_e32 v18, v13, v15, vcc
; VI-NEXT: v_bfe_u32 v13, v11, 16, 1
; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11
; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13
-; VI-NEXT: s_lshl_b32 s4, s27, 16
+; VI-NEXT: s_lshl_b32 s16, s47, 16
; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11
; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc
-; VI-NEXT: v_add_f32_e32 v13, s4, v32
+; VI-NEXT: v_add_f32_e32 v13, s16, v32
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9
; VI-NEXT: v_bfe_u32 v15, v13, 16, 1
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: s_and_b32 s5, s29, 0xffff0000
+; VI-NEXT: s_and_b32 s20, s49, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v9, v18
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13
; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; VI-NEXT: v_add_f32_e32 v13, s5, v32
+; VI-NEXT: v_add_f32_e32 v13, s20, v32
; VI-NEXT: v_cndmask_b32_e32 v18, v15, v18, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v11
; VI-NEXT: v_bfe_u32 v15, v13, 16, 1
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13
; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: s_lshl_b32 s4, s29, 16
+; VI-NEXT: s_lshl_b32 s16, s49, 16
; VI-NEXT: v_mov_b32_e32 v11, v18
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13
; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
; VI-NEXT: v_cndmask_b32_e32 v13, v15, v18, vcc
-; VI-NEXT: v_add_f32_e32 v15, s4, v32
+; VI-NEXT: v_add_f32_e32 v15, s16, v32
; VI-NEXT: v_bfe_u32 v18, v15, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15
; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
@@ -222431,17 +224069,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v18, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v13
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
-; VI-NEXT: s_and_b32 s5, s31, 0xffff0000
-; VI-NEXT: v_add_f32_e32 v15, s5, v32
+; VI-NEXT: s_and_b32 s20, s51, 0xffff0000
+; VI-NEXT: v_add_f32_e32 v15, s20, v32
; VI-NEXT: v_mov_b32_e32 v13, v18
; VI-NEXT: v_bfe_u32 v18, v15, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15
; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
-; VI-NEXT: s_lshl_b32 s4, s31, 16
+; VI-NEXT: s_lshl_b32 s16, s51, 16
; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15
; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
; VI-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
-; VI-NEXT: v_add_f32_e32 v18, s4, v32
+; VI-NEXT: v_add_f32_e32 v18, s16, v32
; VI-NEXT: v_bfe_u32 v19, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
@@ -222450,23 +224088,23 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v15
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
-; VI-NEXT: s_and_b32 s5, s50, 0xffff0000
+; VI-NEXT: s_lshl_b32 s16, s18, 16
+; VI-NEXT: s_and_b32 s18, s18, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v15, v18
-; VI-NEXT: v_add_f32_e32 v18, s5, v32
+; VI-NEXT: v_add_f32_e32 v18, s18, v32
; VI-NEXT: v_bfe_u32 v19, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18
-; VI-NEXT: s_lshl_b32 s4, s50, 16
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18
; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
-; VI-NEXT: v_add_f32_e32 v18, s4, v32
+; VI-NEXT: v_add_f32_e32 v18, s16, v32
; VI-NEXT: v_cndmask_b32_e32 v19, v19, v20, vcc
; VI-NEXT: v_bfe_u32 v20, v18, 16, 1
; VI-NEXT: v_add_u32_e32 v20, vcc, v20, v18
-; VI-NEXT: s_and_b32 s4, s46, 0xffff0000
+; VI-NEXT: s_and_b32 s16, s14, 0xffff0000
; VI-NEXT: v_add_u32_e32 v20, vcc, 0x7fff, v20
; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s16, v32
; VI-NEXT: v_or_b32_e32 v21, 0x400000, v18
; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
@@ -222474,11 +224112,11 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s46, 16
+; VI-NEXT: s_lshl_b32 s14, s14, 16
; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19]
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s14, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -222487,16 +224125,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s44, 0xffff0000
+; VI-NEXT: s_and_b32 s14, s12, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s14, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s44, 16
+; VI-NEXT: s_lshl_b32 s12, s12, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s12, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -222505,16 +224143,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s42, 0xffff0000
+; VI-NEXT: s_and_b32 s12, s10, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s12, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s42, 16
+; VI-NEXT: s_lshl_b32 s10, s10, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s10, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -222523,16 +224161,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s40, 0xffff0000
+; VI-NEXT: s_and_b32 s10, s8, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s10, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s40, 16
+; VI-NEXT: s_lshl_b32 s8, s8, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s8, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -222541,16 +224179,16 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s38, 0xffff0000
+; VI-NEXT: s_and_b32 s8, s6, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s8, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s38, 16
+; VI-NEXT: s_lshl_b32 s6, s6, 16
; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s6, v32
; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc
; VI-NEXT: v_bfe_u32 v18, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16
@@ -222559,13 +224197,13 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: s_and_b32 s4, s36, 0xffff0000
+; VI-NEXT: s_and_b32 s6, s4, 0xffff0000
; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[16:17]
-; VI-NEXT: v_add_f32_e32 v16, s4, v32
+; VI-NEXT: v_add_f32_e32 v16, s6, v32
; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: s_lshl_b32 s4, s36, 16
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16
; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
; VI-NEXT: v_add_f32_e32 v16, s4, v32
@@ -222578,20 +224216,20 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v16, v19, v21, vcc
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17]
-; VI-NEXT: s_and_b32 s4, s37, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s5, 0xffff0000
; VI-NEXT: v_add_f32_e32 v17, s4, v32
; VI-NEXT: v_bfe_u32 v19, v17, 16, 1
; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17
; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17
; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; VI-NEXT: s_lshl_b32 s4, s37, 16
+; VI-NEXT: s_lshl_b32 s4, s5, 16
; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc
; VI-NEXT: v_add_f32_e32 v19, s4, v32
; VI-NEXT: v_bfe_u32 v21, v19, 16, 1
; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
-; VI-NEXT: s_and_b32 s4, s39, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s7, 0xffff0000
; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19
; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
; VI-NEXT: v_add_f32_e32 v19, s4, v32
@@ -222601,7 +224239,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19
; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; VI-NEXT: s_lshl_b32 s4, s39, 16
+; VI-NEXT: s_lshl_b32 s4, s7, 16
; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc
; VI-NEXT: v_add_f32_e32 v21, s4, v32
; VI-NEXT: v_bfe_u32 v23, v21, 16, 1
@@ -222609,7 +224247,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23
-; VI-NEXT: s_and_b32 s4, s41, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s9, 0xffff0000
; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21
; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
; VI-NEXT: v_add_f32_e32 v21, s4, v32
@@ -222620,7 +224258,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23
; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21
; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
-; VI-NEXT: s_lshl_b32 s4, s41, 16
+; VI-NEXT: s_lshl_b32 s4, s9, 16
; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc
; VI-NEXT: v_add_f32_e32 v23, s4, v32
; VI-NEXT: v_bfe_u32 v25, v23, 16, 1
@@ -222628,7 +224266,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
-; VI-NEXT: s_and_b32 s4, s43, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s11, 0xffff0000
; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23
; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
; VI-NEXT: v_add_f32_e32 v23, s4, v32
@@ -222639,7 +224277,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23
; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; VI-NEXT: s_lshl_b32 s4, s43, 16
+; VI-NEXT: s_lshl_b32 s4, s11, 16
; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc
; VI-NEXT: v_add_f32_e32 v25, s4, v32
; VI-NEXT: v_bfe_u32 v27, v25, 16, 1
@@ -222647,7 +224285,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27
-; VI-NEXT: s_and_b32 s4, s45, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s13, 0xffff0000
; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25
; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
; VI-NEXT: v_add_f32_e32 v25, s4, v32
@@ -222658,7 +224296,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27
; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25
; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
-; VI-NEXT: s_lshl_b32 s4, s45, 16
+; VI-NEXT: s_lshl_b32 s4, s13, 16
; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc
; VI-NEXT: v_add_f32_e32 v27, s4, v32
; VI-NEXT: v_bfe_u32 v29, v27, 16, 1
@@ -222666,7 +224304,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29
-; VI-NEXT: s_and_b32 s4, s47, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s15, 0xffff0000
; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27
; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
; VI-NEXT: v_add_f32_e32 v27, s4, v32
@@ -222677,7 +224315,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29
; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27
; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
-; VI-NEXT: s_lshl_b32 s4, s47, 16
+; VI-NEXT: s_lshl_b32 s4, s15, 16
; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc
; VI-NEXT: v_add_f32_e32 v29, s4, v32
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25
@@ -222685,7 +224323,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29
; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31
-; VI-NEXT: s_and_b32 s4, s49, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s17, 0xffff0000
; VI-NEXT: v_mov_b32_e32 v25, v33
; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29
; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29
@@ -222699,7 +224337,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_mov_b32_e32 v27, v33
; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29
; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29
-; VI-NEXT: s_lshl_b32 s4, s49, 16
+; VI-NEXT: s_lshl_b32 s4, s17, 16
; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc
; VI-NEXT: v_add_f32_e32 v31, s4, v32
; VI-NEXT: v_bfe_u32 v33, v31, 16, 1
@@ -222710,13 +224348,13 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29
; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34]
-; VI-NEXT: s_and_b32 s4, s51, 0xffff0000
+; VI-NEXT: s_and_b32 s4, s19, 0xffff0000
; VI-NEXT: v_add_f32_e32 v31, s4, v32
; VI-NEXT: v_mov_b32_e32 v29, v33
; VI-NEXT: v_bfe_u32 v33, v31, 16, 1
; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31
; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33
-; VI-NEXT: s_lshl_b32 s4, s51, 16
+; VI-NEXT: s_lshl_b32 s4, s19, 16
; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31
; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; VI-NEXT: v_add_f32_e32 v31, s4, v32
@@ -222731,41 +224369,39 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32]
; VI-NEXT: s_branch .LBB105_6
; VI-NEXT: .LBB105_5:
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
; VI-NEXT: .LBB105_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v35, 8
-; VI-NEXT: v_readlane_b32 s31, v35, 9
; VI-NEXT: v_readlane_b32 s51, v35, 7
; VI-NEXT: v_readlane_b32 s50, v35, 6
; VI-NEXT: v_readlane_b32 s49, v35, 5
@@ -222794,77 +224430,82 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_writelane_b32 v36, s49, 5
; GFX9-NEXT: v_writelane_b32 v36, s50, 6
; GFX9-NEXT: v_writelane_b32 v36, s51, 7
-; GFX9-NEXT: v_writelane_b32 v36, s30, 8
-; GFX9-NEXT: v_writelane_b32 v36, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB105_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB105_3
; GFX9-NEXT: .LBB105_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB105_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB105_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v16, 0x40c00000
-; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: s_and_b32 s20, s18, 0xffff0000
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000
+; GFX9-NEXT: s_and_b32 s21, s50, 0xffff0000
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s21, v16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s5, s30, 16
+; GFX9-NEXT: s_lshl_b32 s21, s50, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s21, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000
+; GFX9-NEXT: s_and_b32 s21, s51, 0xffff0000
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_add_f32_e32 v2, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v2, s21, v16
; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: s_lshl_b32 s5, s31, 16
+; GFX9-NEXT: s_lshl_b32 s21, s51, 16
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s5, v16
+; GFX9-NEXT: v_add_f32_e32 v3, s21, v16
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s49, 0xffff0000
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
@@ -222872,7 +224513,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_and_or_b32 v14, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
@@ -222881,278 +224522,278 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s29, 16
+; GFX9-NEXT: s_lshl_b32 s20, s49, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s48, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v13, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s28, 16
+; GFX9-NEXT: s_lshl_b32 s20, s48, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s47, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v12, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s27, 16
+; GFX9-NEXT: s_lshl_b32 s20, s47, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s46, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v11, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s26, 16
+; GFX9-NEXT: s_lshl_b32 s20, s46, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s45, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v10, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s25, 16
+; GFX9-NEXT: s_lshl_b32 s20, s45, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s44, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v9, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s24, 16
+; GFX9-NEXT: s_lshl_b32 s20, s44, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s43, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v8, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s23, 16
+; GFX9-NEXT: s_lshl_b32 s20, s43, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s42, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v7, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s22, 16
+; GFX9-NEXT: s_lshl_b32 s20, s42, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s41, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v6, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s21, 16
+; GFX9-NEXT: s_lshl_b32 s20, s41, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s40, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v5, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s20, 16
+; GFX9-NEXT: s_lshl_b32 s20, s40, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s39, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v4, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s19, 16
+; GFX9-NEXT: s_lshl_b32 s20, s39, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s38, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v3, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s18, 16
+; GFX9-NEXT: s_lshl_b32 s20, s38, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v18, vcc
-; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s37, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v2, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s17, 16
+; GFX9-NEXT: s_lshl_b32 s20, s37, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v18, vcc
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v1, s20, v16
; GFX9-NEXT: v_bfe_u32 v18, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v1
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v18, v19, vcc
-; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000
+; GFX9-NEXT: s_and_b32 s20, s36, 0xffff0000
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_and_or_b32 v1, v0, v32, v1
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v0, s20, v16
; GFX9-NEXT: v_bfe_u32 v18, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v0
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_lshl_b32 s4, s16, 16
+; GFX9-NEXT: s_lshl_b32 s20, s36, 16
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s20, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
-; GFX9-NEXT: s_lshl_b32 s4, s50, 16
+; GFX9-NEXT: s_lshl_b32 s18, s18, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; GFX9-NEXT: v_and_or_b32 v0, v0, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s18, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
-; GFX9-NEXT: s_and_b32 s4, s51, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s19, 0xffff0000
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
-; GFX9-NEXT: v_add_f32_e32 v19, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v19, s18, v16
; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1
; GFX9-NEXT: v_add_u32_e32 v20, v20, v19
; GFX9-NEXT: v_add_u32_e32 v20, 0x7fff, v20
; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; GFX9-NEXT: s_lshl_b32 s4, s51, 16
+; GFX9-NEXT: s_lshl_b32 s18, s19, 16
; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; GFX9-NEXT: v_add_f32_e32 v20, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v20, s18, v16
; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1
; GFX9-NEXT: v_add_u32_e32 v21, v21, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000
+; GFX9-NEXT: s_and_b32 s18, s17, 0xffff0000
; GFX9-NEXT: v_add_u32_e32 v21, 0x7fff, v21
; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
; GFX9-NEXT: v_and_or_b32 v30, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s18, v16
; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v20
@@ -223161,9 +224802,9 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s49, 16
+; GFX9-NEXT: s_lshl_b32 s17, s17, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s17, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223171,17 +224812,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000
+; GFX9-NEXT: s_and_b32 s17, s16, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v29, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s17, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s48, 16
+; GFX9-NEXT: s_lshl_b32 s16, s16, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s16, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223189,17 +224830,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000
+; GFX9-NEXT: s_and_b32 s16, s15, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v28, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s16, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s47, 16
+; GFX9-NEXT: s_lshl_b32 s15, s15, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s15, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223207,17 +224848,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000
+; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v27, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s15, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s46, 16
+; GFX9-NEXT: s_lshl_b32 s14, s14, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s14, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223225,17 +224866,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000
+; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v26, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s14, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s45, 16
+; GFX9-NEXT: s_lshl_b32 s13, s13, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s13, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223243,17 +224884,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000
+; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v25, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s13, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s44, 16
+; GFX9-NEXT: s_lshl_b32 s12, s12, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s12, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223261,17 +224902,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000
+; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v24, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s12, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s43, 16
+; GFX9-NEXT: s_lshl_b32 s11, s11, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s11, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223279,17 +224920,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000
+; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v23, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s11, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s42, 16
+; GFX9-NEXT: s_lshl_b32 s10, s10, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s10, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223297,17 +224938,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000
+; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v22, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s10, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s41, 16
+; GFX9-NEXT: s_lshl_b32 s9, s9, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s9, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223315,17 +224956,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000
+; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v21, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s9, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s40, 16
+; GFX9-NEXT: s_lshl_b32 s8, s8, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s8, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223333,17 +224974,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000
+; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v20, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s8, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s39, 16
+; GFX9-NEXT: s_lshl_b32 s7, s7, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s7, v16
; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v19, v19, v18
; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19
@@ -223351,17 +224992,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v33, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000
+; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v19, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s7, v16
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v18, v18, v17
; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s38, 16
+; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v33, vcc
-; GFX9-NEXT: v_add_f32_e32 v18, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v18, s6, v16
; GFX9-NEXT: v_bfe_u32 v33, v18, 16, 1
; GFX9-NEXT: v_add_u32_e32 v33, v33, v18
; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33
@@ -223369,17 +225010,17 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_cndmask_b32_e32 v18, v33, v34, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000
+; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v18, v17, v32, v18
-; GFX9-NEXT: v_add_f32_e32 v17, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v17, s6, v16
; GFX9-NEXT: v_bfe_u32 v33, v17, 16, 1
; GFX9-NEXT: v_add_u32_e32 v33, v33, v17
; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33
; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_lshl_b32 s4, s37, 16
+; GFX9-NEXT: s_lshl_b32 s5, s5, 16
; GFX9-NEXT: v_cndmask_b32_e32 v17, v33, v34, vcc
-; GFX9-NEXT: v_add_f32_e32 v33, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v33, s5, v16
; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1
; GFX9-NEXT: v_add_u32_e32 v34, v34, v33
; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34
@@ -223387,12 +225028,12 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33
; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v33
-; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000
+; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
; GFX9-NEXT: v_and_or_b32 v17, v17, v32, v33
-; GFX9-NEXT: v_add_f32_e32 v33, s4, v16
+; GFX9-NEXT: v_add_f32_e32 v33, s5, v16
; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1
; GFX9-NEXT: v_add_u32_e32 v34, v34, v33
-; GFX9-NEXT: s_lshl_b32 s4, s36, 16
+; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34
; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33
@@ -223408,41 +225049,39 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_and_or_b32 v16, v33, v32, v16
; GFX9-NEXT: s_branch .LBB105_6
; GFX9-NEXT: .LBB105_5:
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
; GFX9-NEXT: .LBB105_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v36, 8
-; GFX9-NEXT: v_readlane_b32 s31, v36, 9
; GFX9-NEXT: v_readlane_b32 s51, v36, 7
; GFX9-NEXT: v_readlane_b32 s50, v36, 6
; GFX9-NEXT: v_readlane_b32 s49, v36, 5
@@ -225781,257 +227420,249 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: v_writelane_b32 v33, s99, 33
; SI-NEXT: v_writelane_b32 v33, s30, 34
; SI-NEXT: v_writelane_b32 v33, s31, 35
-; SI-NEXT: s_lshr_b32 s5, s16, 16
+; SI-NEXT: s_lshr_b32 s4, s16, 16
; SI-NEXT: ; implicit-def: $vgpr34 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s88, s17, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v34, s5, 0
-; SI-NEXT: s_lshr_b32 s89, s18, 16
-; SI-NEXT: v_writelane_b32 v34, s88, 1
-; SI-NEXT: s_lshr_b32 s90, s19, 16
-; SI-NEXT: v_writelane_b32 v34, s89, 2
-; SI-NEXT: s_lshr_b32 s91, s20, 16
-; SI-NEXT: v_writelane_b32 v34, s90, 3
-; SI-NEXT: s_lshr_b32 s92, s21, 16
-; SI-NEXT: v_writelane_b32 v34, s91, 4
-; SI-NEXT: s_lshr_b32 s93, s22, 16
-; SI-NEXT: v_writelane_b32 v34, s92, 5
-; SI-NEXT: s_lshr_b32 s94, s23, 16
-; SI-NEXT: v_writelane_b32 v34, s93, 6
-; SI-NEXT: s_lshr_b32 s95, s24, 16
-; SI-NEXT: v_writelane_b32 v34, s94, 7
-; SI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; SI-NEXT: v_writelane_b32 v34, s95, 8
-; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; SI-NEXT: v_writelane_b32 v34, vcc_lo, 9
-; SI-NEXT: s_lshr_b32 s30, s27, 16
-; SI-NEXT: v_writelane_b32 v34, vcc_hi, 10
-; SI-NEXT: s_lshr_b32 s31, s28, 16
-; SI-NEXT: v_readfirstlane_b32 s79, v17
-; SI-NEXT: v_readfirstlane_b32 s77, v16
-; SI-NEXT: v_readfirstlane_b32 s75, v15
-; SI-NEXT: v_readfirstlane_b32 s73, v14
-; SI-NEXT: v_readfirstlane_b32 s63, v13
-; SI-NEXT: v_readfirstlane_b32 s61, v12
-; SI-NEXT: v_readfirstlane_b32 s59, v11
-; SI-NEXT: v_readfirstlane_b32 s57, v10
-; SI-NEXT: v_readfirstlane_b32 s47, v9
-; SI-NEXT: v_readfirstlane_b32 s45, v8
-; SI-NEXT: v_readfirstlane_b32 s43, v7
-; SI-NEXT: v_readfirstlane_b32 s41, v6
-; SI-NEXT: v_readfirstlane_b32 s15, v5
-; SI-NEXT: v_readfirstlane_b32 s13, v4
-; SI-NEXT: v_readfirstlane_b32 s11, v3
-; SI-NEXT: v_readfirstlane_b32 s9, v2
-; SI-NEXT: v_readfirstlane_b32 s7, v1
-; SI-NEXT: v_readfirstlane_b32 s99, v0
-; SI-NEXT: v_writelane_b32 v34, s30, 11
-; SI-NEXT: s_lshr_b32 s34, s29, 16
-; SI-NEXT: s_lshr_b32 s78, s79, 16
-; SI-NEXT: s_lshr_b32 s76, s77, 16
-; SI-NEXT: s_lshr_b32 s74, s75, 16
-; SI-NEXT: s_lshr_b32 s72, s73, 16
-; SI-NEXT: s_lshr_b32 s62, s63, 16
-; SI-NEXT: s_lshr_b32 s60, s61, 16
-; SI-NEXT: s_lshr_b32 s58, s59, 16
-; SI-NEXT: s_lshr_b32 s56, s57, 16
-; SI-NEXT: s_lshr_b32 s46, s47, 16
-; SI-NEXT: s_lshr_b32 s44, s45, 16
-; SI-NEXT: s_lshr_b32 s42, s43, 16
-; SI-NEXT: s_lshr_b32 s40, s41, 16
-; SI-NEXT: s_lshr_b32 s14, s15, 16
-; SI-NEXT: s_lshr_b32 s12, s13, 16
-; SI-NEXT: s_lshr_b32 s10, s11, 16
-; SI-NEXT: s_lshr_b32 s8, s9, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
-; SI-NEXT: s_lshr_b32 s35, s99, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_writelane_b32 v34, s31, 12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v34, s34, 13
-; SI-NEXT: v_writelane_b32 v34, s35, 14
+; SI-NEXT: s_lshr_b32 s46, s17, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v34, s4, 0
+; SI-NEXT: s_lshr_b32 s47, s18, 16
+; SI-NEXT: v_writelane_b32 v34, s46, 1
+; SI-NEXT: s_lshr_b32 s57, s19, 16
+; SI-NEXT: v_writelane_b32 v34, s47, 2
+; SI-NEXT: s_lshr_b32 s59, s20, 16
+; SI-NEXT: v_writelane_b32 v34, s57, 3
+; SI-NEXT: s_lshr_b32 s61, s21, 16
+; SI-NEXT: v_writelane_b32 v34, s59, 4
+; SI-NEXT: s_lshr_b32 s63, s22, 16
+; SI-NEXT: v_writelane_b32 v34, s61, 5
+; SI-NEXT: s_lshr_b32 s73, s23, 16
+; SI-NEXT: v_writelane_b32 v34, s63, 6
+; SI-NEXT: s_lshr_b32 s75, s24, 16
+; SI-NEXT: v_writelane_b32 v34, s73, 7
+; SI-NEXT: s_lshr_b32 s76, s25, 16
+; SI-NEXT: v_writelane_b32 v34, s75, 8
+; SI-NEXT: s_lshr_b32 s77, s26, 16
+; SI-NEXT: v_writelane_b32 v34, s76, 9
+; SI-NEXT: s_lshr_b32 s78, s27, 16
+; SI-NEXT: v_writelane_b32 v34, s77, 10
+; SI-NEXT: s_lshr_b32 s79, s28, 16
+; SI-NEXT: v_writelane_b32 v34, s78, 11
+; SI-NEXT: s_lshr_b32 s88, s29, 16
+; SI-NEXT: v_readfirstlane_b32 s54, v0
+; SI-NEXT: v_writelane_b32 v34, s79, 12
+; SI-NEXT: v_readfirstlane_b32 s64, v1
+; SI-NEXT: s_lshr_b32 s89, s54, 16
+; SI-NEXT: v_writelane_b32 v34, s88, 13
+; SI-NEXT: v_readfirstlane_b32 s66, v2
+; SI-NEXT: s_lshr_b32 s90, s64, 16
+; SI-NEXT: v_writelane_b32 v34, s89, 14
+; SI-NEXT: v_readfirstlane_b32 s68, v3
+; SI-NEXT: s_lshr_b32 s91, s66, 16
+; SI-NEXT: v_writelane_b32 v34, s90, 15
+; SI-NEXT: v_readfirstlane_b32 s70, v4
+; SI-NEXT: s_lshr_b32 s92, s68, 16
+; SI-NEXT: v_writelane_b32 v34, s91, 16
+; SI-NEXT: v_readfirstlane_b32 s80, v5
+; SI-NEXT: s_lshr_b32 s93, s70, 16
+; SI-NEXT: v_writelane_b32 v34, s92, 17
+; SI-NEXT: v_readfirstlane_b32 s82, v6
+; SI-NEXT: s_lshr_b32 s94, s80, 16
+; SI-NEXT: v_writelane_b32 v34, s93, 18
+; SI-NEXT: v_readfirstlane_b32 s84, v7
+; SI-NEXT: s_lshr_b32 s95, s82, 16
+; SI-NEXT: v_writelane_b32 v34, s94, 19
+; SI-NEXT: v_readfirstlane_b32 s42, v17
+; SI-NEXT: v_readfirstlane_b32 s40, v16
+; SI-NEXT: v_readfirstlane_b32 s14, v15
+; SI-NEXT: v_readfirstlane_b32 s12, v14
+; SI-NEXT: v_readfirstlane_b32 s10, v13
+; SI-NEXT: v_readfirstlane_b32 s8, v12
+; SI-NEXT: v_readfirstlane_b32 s6, v11
+; SI-NEXT: v_readfirstlane_b32 s98, v10
+; SI-NEXT: v_readfirstlane_b32 s96, v9
+; SI-NEXT: v_readfirstlane_b32 s86, v8
+; SI-NEXT: s_lshr_b32 vcc_lo, s84, 16
+; SI-NEXT: v_writelane_b32 v34, s95, 20
+; SI-NEXT: s_lshr_b32 s41, s42, 16
+; SI-NEXT: s_lshr_b32 s15, s40, 16
+; SI-NEXT: s_lshr_b32 s13, s14, 16
+; SI-NEXT: s_lshr_b32 s11, s12, 16
+; SI-NEXT: s_lshr_b32 s9, s10, 16
+; SI-NEXT: s_lshr_b32 s7, s8, 16
+; SI-NEXT: s_lshr_b32 s99, s6, 16
+; SI-NEXT: s_lshr_b32 s97, s98, 16
+; SI-NEXT: s_lshr_b32 s30, s96, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s86, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v18
+; SI-NEXT: v_writelane_b32 v34, vcc_lo, 21
+; SI-NEXT: s_cmp_lg_u32 s5, 0
+; SI-NEXT: v_writelane_b32 v34, vcc_hi, 22
+; SI-NEXT: v_writelane_b32 v34, s30, 23
; SI-NEXT: s_cbranch_scc0 .LBB107_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshl_b32 s4, s16, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 18
-; SI-NEXT: s_lshl_b32 s4, s5, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 17
-; SI-NEXT: s_lshl_b32 s4, s17, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 20
-; SI-NEXT: s_lshl_b32 s4, s88, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 19
-; SI-NEXT: s_lshl_b32 s4, s18, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 22
-; SI-NEXT: s_lshl_b32 s4, s89, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 21
-; SI-NEXT: s_lshl_b32 s4, s19, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 24
-; SI-NEXT: s_lshl_b32 s4, s90, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 23
-; SI-NEXT: s_lshl_b32 s4, s20, 16
+; SI-NEXT: s_lshl_b32 s44, s4, 16
+; SI-NEXT: s_lshl_b32 s4, s24, 16
; SI-NEXT: v_writelane_b32 v34, s4, 26
-; SI-NEXT: s_lshl_b32 s4, s91, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 25
-; SI-NEXT: s_lshl_b32 s4, s21, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 28
-; SI-NEXT: s_lshl_b32 s4, s92, 16
+; SI-NEXT: s_lshl_b32 s4, s25, 16
; SI-NEXT: v_writelane_b32 v34, s4, 27
-; SI-NEXT: s_lshl_b32 s4, s22, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 30
-; SI-NEXT: s_lshl_b32 s4, s93, 16
+; SI-NEXT: s_lshl_b32 s4, s26, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 28
+; SI-NEXT: s_lshl_b32 s4, s27, 16
; SI-NEXT: v_writelane_b32 v34, s4, 29
-; SI-NEXT: s_lshl_b32 s4, s23, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 32
-; SI-NEXT: s_lshl_b32 s4, s94, 16
+; SI-NEXT: s_lshl_b32 s4, s28, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 25
+; SI-NEXT: s_lshl_b32 s4, s79, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 30
+; SI-NEXT: s_lshl_b32 s4, s29, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 24
+; SI-NEXT: s_lshl_b32 s4, s88, 16
; SI-NEXT: v_writelane_b32 v34, s4, 31
-; SI-NEXT: s_lshl_b32 s4, s24, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 16
-; SI-NEXT: s_lshl_b32 s4, s95, 16
+; SI-NEXT: s_lshl_b32 s4, s89, 16
+; SI-NEXT: v_writelane_b32 v34, s4, 32
+; SI-NEXT: s_lshl_b32 s4, s90, 16
+; SI-NEXT: s_lshl_b32 s43, s16, 16
+; SI-NEXT: s_lshl_b32 s45, s17, 16
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s56, s18, 16
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_lshl_b32 s58, s19, 16
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_lshl_b32 s60, s20, 16
+; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_lshl_b32 s62, s21, 16
+; SI-NEXT: s_lshl_b32 s61, s61, 16
+; SI-NEXT: s_lshl_b32 s72, s22, 16
+; SI-NEXT: s_lshl_b32 s63, s63, 16
+; SI-NEXT: s_lshl_b32 s74, s23, 16
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_lshl_b32 s78, s78, 16
+; SI-NEXT: s_lshl_b32 s83, s54, 16
+; SI-NEXT: s_lshl_b32 s71, s64, 16
; SI-NEXT: v_writelane_b32 v34, s4, 33
-; SI-NEXT: s_lshl_b32 s4, s25, 16
-; SI-NEXT: v_writelane_b32 v34, s4, 15
-; SI-NEXT: s_lshl_b32 s98, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s96, s26, 16
-; SI-NEXT: s_lshl_b32 s97, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s85, s27, 16
-; SI-NEXT: s_lshl_b32 s87, s30, 16
-; SI-NEXT: s_lshl_b32 s81, s28, 16
-; SI-NEXT: s_lshl_b32 s86, s31, 16
-; SI-NEXT: s_lshl_b32 s71, s29, 16
-; SI-NEXT: s_lshl_b32 s84, s34, 16
-; SI-NEXT: s_lshl_b32 s69, s99, 16
-; SI-NEXT: s_lshl_b32 s83, s35, 16
-; SI-NEXT: s_lshl_b32 s67, s7, 16
-; SI-NEXT: s_lshl_b32 s82, s6, 16
-; SI-NEXT: s_lshl_b32 s68, s9, 16
-; SI-NEXT: s_lshl_b32 s80, s8, 16
-; SI-NEXT: s_lshl_b32 s55, s11, 16
-; SI-NEXT: s_lshl_b32 s70, s10, 16
-; SI-NEXT: s_lshl_b32 s53, s13, 16
-; SI-NEXT: s_lshl_b32 s65, s12, 16
-; SI-NEXT: s_lshl_b32 s51, s15, 16
-; SI-NEXT: s_lshl_b32 s66, s14, 16
-; SI-NEXT: s_lshl_b32 s49, s41, 16
-; SI-NEXT: s_lshl_b32 s64, s40, 16
-; SI-NEXT: s_lshl_b32 s39, s43, 16
-; SI-NEXT: s_lshl_b32 s54, s42, 16
-; SI-NEXT: s_lshl_b32 s37, s45, 16
-; SI-NEXT: s_lshl_b32 s52, s44, 16
-; SI-NEXT: s_lshl_b32 s35, s47, 16
-; SI-NEXT: s_lshl_b32 s50, s46, 16
-; SI-NEXT: s_lshl_b32 s31, s57, 16
-; SI-NEXT: s_lshl_b32 s48, s56, 16
-; SI-NEXT: s_lshl_b32 vcc_hi, s59, 16
-; SI-NEXT: s_lshl_b32 s38, s58, 16
-; SI-NEXT: s_lshl_b32 s95, s61, 16
-; SI-NEXT: s_lshl_b32 s36, s60, 16
-; SI-NEXT: s_lshl_b32 s93, s63, 16
-; SI-NEXT: s_lshl_b32 s34, s62, 16
-; SI-NEXT: s_lshl_b32 vcc_lo, s73, 16
-; SI-NEXT: s_lshl_b32 s30, s72, 16
-; SI-NEXT: s_lshl_b32 s90, s75, 16
-; SI-NEXT: s_lshl_b32 s94, s74, 16
-; SI-NEXT: s_lshl_b32 s91, s77, 16
-; SI-NEXT: s_lshl_b32 s92, s76, 16
-; SI-NEXT: s_lshl_b32 s88, s79, 16
-; SI-NEXT: s_lshl_b32 s89, s78, 16
+; SI-NEXT: s_lshl_b32 s81, s66, 16
+; SI-NEXT: s_lshl_b32 s87, s91, 16
+; SI-NEXT: s_lshl_b32 s55, s68, 16
+; SI-NEXT: s_lshl_b32 s85, s92, 16
+; SI-NEXT: s_lshl_b32 s52, s70, 16
+; SI-NEXT: s_lshl_b32 s67, s93, 16
+; SI-NEXT: s_lshl_b32 s50, s80, 16
+; SI-NEXT: s_lshl_b32 s69, s94, 16
+; SI-NEXT: s_lshl_b32 s48, s82, 16
+; SI-NEXT: s_lshl_b32 s65, s95, 16
+; SI-NEXT: s_lshl_b32 s38, s84, 16
+; SI-NEXT: s_lshl_b32 s53, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s36, s86, 16
+; SI-NEXT: s_lshl_b32 s51, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s34, s96, 16
+; SI-NEXT: s_lshl_b32 s49, s30, 16
+; SI-NEXT: s_lshl_b32 s30, s98, 16
+; SI-NEXT: s_lshl_b32 s39, s97, 16
+; SI-NEXT: s_lshl_b32 vcc_lo, s6, 16
+; SI-NEXT: s_lshl_b32 s37, s99, 16
+; SI-NEXT: s_lshl_b32 s94, s8, 16
+; SI-NEXT: s_lshl_b32 s35, s7, 16
+; SI-NEXT: s_lshl_b32 s92, s10, 16
+; SI-NEXT: s_lshl_b32 s31, s9, 16
+; SI-NEXT: s_lshl_b32 s95, s12, 16
+; SI-NEXT: s_lshl_b32 vcc_hi, s11, 16
+; SI-NEXT: s_lshl_b32 s89, s14, 16
+; SI-NEXT: s_lshl_b32 s93, s13, 16
+; SI-NEXT: s_lshl_b32 s90, s40, 16
+; SI-NEXT: s_lshl_b32 s91, s15, 16
+; SI-NEXT: s_lshl_b32 s79, s42, 16
+; SI-NEXT: s_lshl_b32 s88, s41, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB107_3
; SI-NEXT: .LBB107_2:
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr97
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; kill: killed $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; kill: killed $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; kill: killed $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; kill: killed $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr87
; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $vcc_hi
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; kill: killed $sgpr88
; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; kill: killed $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: .LBB107_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
-; SI-NEXT: s_mov_b32 s4, s88
-; SI-NEXT: s_mov_b32 s5, s91
-; SI-NEXT: s_mov_b32 s88, s90
-; SI-NEXT: s_mov_b32 s90, vcc_lo
-; SI-NEXT: s_mov_b32 s91, s93
-; SI-NEXT: s_mov_b32 s93, s95
+; SI-NEXT: s_mov_b32 s4, s79
+; SI-NEXT: s_mov_b32 s5, s90
+; SI-NEXT: s_mov_b32 s79, s89
+; SI-NEXT: s_mov_b32 s89, s95
+; SI-NEXT: s_mov_b32 s90, s92
+; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_mov_b32 s94, vcc_lo
; SI-NEXT: s_mov_b32 s95, vcc_hi
; SI-NEXT: s_mov_b32 vcc_lo, s30
; SI-NEXT: s_mov_b32 vcc_hi, s31
@@ -226047,415 +227678,405 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; SI-NEXT: s_mov_b32 s49, s51
; SI-NEXT: s_mov_b32 s50, s52
; SI-NEXT: s_mov_b32 s51, s53
-; SI-NEXT: s_mov_b32 s52, s54
-; SI-NEXT: s_mov_b32 s53, s55
-; SI-NEXT: s_mov_b32 s54, s64
-; SI-NEXT: s_mov_b32 s55, s68
-; SI-NEXT: s_mov_b32 s64, s66
-; SI-NEXT: s_mov_b32 s66, s70
-; SI-NEXT: v_readlane_b32 s68, v34, 15
-; SI-NEXT: v_readlane_b32 s70, v34, 16
+; SI-NEXT: s_mov_b32 s52, s55
+; SI-NEXT: s_mov_b32 s53, s65
+; SI-NEXT: s_mov_b32 s55, s81
+; SI-NEXT: s_mov_b32 s65, s69
+; SI-NEXT: s_mov_b32 s69, s85
+; SI-NEXT: v_readlane_b32 s81, v34, 24
+; SI-NEXT: v_readlane_b32 s85, v34, 25
; SI-NEXT: s_cbranch_scc1 .LBB107_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_add_i32 s99, s99, 3
-; SI-NEXT: v_readlane_b32 s9, v34, 14
-; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_and_b32 s7, s99, 0xffff
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s99, 16
+; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: v_readlane_b32 s11, v34, 13
-; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s9, s29, 0xffff
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: v_readlane_b32 s13, v34, 12
-; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s11, s28, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s10
+; SI-NEXT: s_add_i32 s8, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s98, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s97, 16
+; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_or_b32 s11, s11, s12
+; SI-NEXT: s_or_b32 s6, s10, s6
+; SI-NEXT: s_add_i32 s96, s96, 3
+; SI-NEXT: v_readlane_b32 s12, v34, 23
+; SI-NEXT: s_add_i32 s42, s42, 3
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: v_readlane_b32 s15, v34, 11
-; SI-NEXT: s_or_b32 s11, s13, s11
-; SI-NEXT: s_and_b32 s13, s27, 0xffff
+; SI-NEXT: s_add_i32 s10, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s96, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_and_b32 s4, s42, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s41, 16
+; SI-NEXT: s_add_i32 s40, s40, 3
+; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s6, s12, s6
+; SI-NEXT: s_add_i32 s86, s86, 3
+; SI-NEXT: v_readlane_b32 s14, v34, 22
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_and_b32 s5, s40, 0xffff
; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_add_i32 s12, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s5, s15, s5
+; SI-NEXT: s_or_b32 s6, s14, s6
+; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: v_readlane_b32 s15, v34, 21
+; SI-NEXT: s_add_i32 s14, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s84, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s6, s15, s6
+; SI-NEXT: s_add_i32 s82, s82, 3
+; SI-NEXT: v_readlane_b32 s40, v34, 20
+; SI-NEXT: s_add_i32 s15, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s82, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_or_b32 s6, s40, s6
+; SI-NEXT: s_add_i32 s80, s80, 3
+; SI-NEXT: v_readlane_b32 s41, v34, 19
+; SI-NEXT: s_add_i32 s40, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_or_b32 s6, s41, s6
+; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: v_readlane_b32 s42, v34, 18
+; SI-NEXT: s_add_i32 s41, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s70, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s6, s42, s6
+; SI-NEXT: s_add_i32 s68, s68, 3
+; SI-NEXT: v_readlane_b32 s43, v34, 17
+; SI-NEXT: s_add_i32 s42, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_add_i32 s66, s66, 3
+; SI-NEXT: v_readlane_b32 s43, v34, 16
+; SI-NEXT: s_add_i32 s67, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s66, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_add_i32 s64, s64, 3
+; SI-NEXT: v_readlane_b32 s43, v34, 15
+; SI-NEXT: s_add_i32 s65, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s64, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: v_readlane_b32 s43, v34, 14
+; SI-NEXT: s_add_i32 s88, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s54, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s6, s43, s6
+; SI-NEXT: s_add_i32 s29, s29, 3
+; SI-NEXT: s_add_i32 s90, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s29, 0xffff
+; SI-NEXT: v_readlane_b32 s29, v34, 13
+; SI-NEXT: s_lshl_b32 s29, s29, 16
+; SI-NEXT: s_or_b32 s6, s29, s6
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: s_add_i32 s29, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s28, 0xffff
+; SI-NEXT: v_readlane_b32 s28, v34, 12
+; SI-NEXT: s_lshl_b32 s28, s28, 16
+; SI-NEXT: s_or_b32 s6, s28, s6
+; SI-NEXT: s_add_i32 s27, s27, 3
+; SI-NEXT: s_add_i32 s28, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s27, 0xffff
+; SI-NEXT: v_readlane_b32 s27, v34, 11
+; SI-NEXT: s_lshl_b32 s27, s27, 16
+; SI-NEXT: s_or_b32 s6, s27, s6
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s13, s15, s13
-; SI-NEXT: s_and_b32 s15, s26, 0xffff
+; SI-NEXT: s_add_i32 s27, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s26, 0xffff
; SI-NEXT: v_readlane_b32 s26, v34, 10
; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s15, s26, s15
+; SI-NEXT: s_or_b32 s6, s26, s6
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 9
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s25, s26, s25
+; SI-NEXT: s_add_i32 s26, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s25, 0xffff
+; SI-NEXT: v_readlane_b32 s25, v34, 9
+; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_or_b32 s6, s25, s6
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 8
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s24, s26, s24
+; SI-NEXT: s_add_i32 s25, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v34, 8
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_or_b32 s6, s24, s6
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 7
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s23, s26, s23
+; SI-NEXT: s_add_i32 s24, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s23, 0xffff
+; SI-NEXT: v_readlane_b32 s23, v34, 7
+; SI-NEXT: s_lshl_b32 s23, s23, 16
+; SI-NEXT: s_or_b32 s6, s23, s6
; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 6
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s22, s26, s22
+; SI-NEXT: s_add_i32 s23, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s22, 0xffff
+; SI-NEXT: v_readlane_b32 s22, v34, 6
+; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: s_or_b32 s6, s22, s6
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 5
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s21, s26, s21
+; SI-NEXT: s_add_i32 s22, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s21, 0xffff
+; SI-NEXT: v_readlane_b32 s21, v34, 5
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_or_b32 s6, s21, s6
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 4
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s20, s26, s20
+; SI-NEXT: s_add_i32 s21, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s20, 0xffff
+; SI-NEXT: v_readlane_b32 s20, v34, 4
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: s_or_b32 s6, s20, s6
; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 3
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s19, s26, s19
+; SI-NEXT: s_add_i32 s20, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s19, 0xffff
+; SI-NEXT: v_readlane_b32 s19, v34, 3
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_or_b32 s6, s19, s6
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 2
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s18, s26, s18
+; SI-NEXT: s_add_i32 s19, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s18, 0xffff
+; SI-NEXT: v_readlane_b32 s18, v34, 2
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_or_b32 s6, s18, s6
; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 1
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s17, s26, s17
+; SI-NEXT: s_add_i32 s18, s6, 0x30000
+; SI-NEXT: s_and_b32 s6, s17, 0xffff
+; SI-NEXT: v_readlane_b32 s17, v34, 1
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_or_b32 s6, s17, s6
+; SI-NEXT: s_add_i32 s17, s6, 0x30000
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s26, v34, 0
+; SI-NEXT: v_readlane_b32 s6, v34, 0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s16, s26, s16
-; SI-NEXT: s_add_i32 s16, s16, 0x30000
-; SI-NEXT: s_and_b32 s26, s16, 0xffff0000
-; SI-NEXT: s_add_i32 s17, s17, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s26, 17
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 18
-; SI-NEXT: s_and_b32 s16, s17, 0xffff0000
-; SI-NEXT: s_add_i32 s18, s18, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 19
-; SI-NEXT: s_lshl_b32 s16, s17, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 20
-; SI-NEXT: s_and_b32 s16, s18, 0xffff0000
-; SI-NEXT: s_add_i32 s19, s19, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 21
-; SI-NEXT: s_lshl_b32 s16, s18, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 22
-; SI-NEXT: s_and_b32 s16, s19, 0xffff0000
-; SI-NEXT: s_add_i32 s20, s20, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 23
-; SI-NEXT: s_lshl_b32 s16, s19, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 24
-; SI-NEXT: s_and_b32 s16, s20, 0xffff0000
-; SI-NEXT: s_add_i32 s21, s21, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 25
-; SI-NEXT: s_lshl_b32 s16, s20, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 26
-; SI-NEXT: s_and_b32 s16, s21, 0xffff0000
-; SI-NEXT: s_add_i32 s79, s79, 3
-; SI-NEXT: s_add_i32 s22, s22, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 27
-; SI-NEXT: s_lshl_b32 s16, s21, 16
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
-; SI-NEXT: s_add_i32 s77, s77, 3
-; SI-NEXT: s_add_i32 s75, s75, 3
-; SI-NEXT: s_add_i32 s73, s73, 3
-; SI-NEXT: s_add_i32 s63, s63, 3
-; SI-NEXT: s_add_i32 s61, s61, 3
-; SI-NEXT: s_add_i32 s59, s59, 3
-; SI-NEXT: s_add_i32 s57, s57, 3
-; SI-NEXT: s_add_i32 s47, s47, 3
-; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: s_add_i32 s43, s43, 3
-; SI-NEXT: s_add_i32 s41, s41, 3
-; SI-NEXT: v_writelane_b32 v34, s16, 28
-; SI-NEXT: s_and_b32 s16, s22, 0xffff0000
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s77, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s76, 16
-; SI-NEXT: s_and_b32 s75, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_and_b32 s73, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s72, 16
-; SI-NEXT: s_and_b32 s63, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s62, 16
-; SI-NEXT: s_and_b32 s61, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s60, 16
-; SI-NEXT: s_and_b32 s59, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s58, 16
-; SI-NEXT: s_and_b32 s57, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s56, s56, 16
-; SI-NEXT: s_and_b32 s47, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_add_i32 s23, s23, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 29
-; SI-NEXT: s_lshl_b32 s16, s22, 16
-; SI-NEXT: s_or_b32 s5, s76, s5
-; SI-NEXT: s_or_b32 s74, s74, s75
-; SI-NEXT: s_or_b32 s72, s72, s73
-; SI-NEXT: s_or_b32 s62, s62, s63
-; SI-NEXT: s_or_b32 s60, s60, s61
-; SI-NEXT: s_or_b32 s58, s58, s59
-; SI-NEXT: s_or_b32 s56, s56, s57
-; SI-NEXT: s_or_b32 s46, s46, s47
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_or_b32 s42, s42, s43
-; SI-NEXT: s_or_b32 s40, s40, s41
-; SI-NEXT: v_writelane_b32 v34, s16, 30
-; SI-NEXT: s_and_b32 s16, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s6, s16
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
+; SI-NEXT: s_and_b32 s44, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s43, s6, 16
+; SI-NEXT: s_lshl_b32 s6, s24, 16
+; SI-NEXT: v_writelane_b32 v34, s6, 26
+; SI-NEXT: s_lshl_b32 s6, s25, 16
+; SI-NEXT: v_writelane_b32 v34, s6, 27
+; SI-NEXT: s_lshl_b32 s6, s26, 16
+; SI-NEXT: v_writelane_b32 v34, s6, 28
+; SI-NEXT: s_lshl_b32 s6, s27, 16
+; SI-NEXT: v_writelane_b32 v34, s6, 29
+; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
+; SI-NEXT: v_writelane_b32 v34, s6, 30
+; SI-NEXT: s_and_b32 s6, s29, 0xffff0000
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s74, s74, 0x30000
-; SI-NEXT: s_add_i32 s72, s72, 0x30000
-; SI-NEXT: s_add_i32 s62, s62, 0x30000
-; SI-NEXT: s_add_i32 s60, s60, 0x30000
-; SI-NEXT: s_add_i32 s58, s58, 0x30000
-; SI-NEXT: s_add_i32 s56, s56, 0x30000
-; SI-NEXT: s_add_i32 s46, s46, 0x30000
-; SI-NEXT: s_add_i32 s44, s44, 0x30000
-; SI-NEXT: s_add_i32 s42, s42, 0x30000
-; SI-NEXT: s_add_i32 s40, s40, 0x30000
-; SI-NEXT: s_add_i32 s14, s14, 0x30000
-; SI-NEXT: s_add_i32 s12, s12, 0x30000
-; SI-NEXT: s_add_i32 s10, s10, 0x30000
-; SI-NEXT: s_add_i32 s8, s8, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
-; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: s_add_i32 s11, s11, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: s_add_i32 s25, s25, 0x30000
-; SI-NEXT: s_add_i32 s24, s24, 0x30000
-; SI-NEXT: v_writelane_b32 v34, s16, 31
-; SI-NEXT: s_lshl_b32 s16, s23, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 32
-; SI-NEXT: s_and_b32 s16, s24, 0xffff0000
-; SI-NEXT: s_lshl_b32 s70, s24, 16
-; SI-NEXT: s_and_b32 s98, s25, 0xffff0000
-; SI-NEXT: s_lshl_b32 s68, s25, 16
-; SI-NEXT: s_and_b32 s97, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s96, s15, 16
-; SI-NEXT: s_and_b32 s87, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s85, s13, 16
-; SI-NEXT: s_and_b32 s86, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s81, s11, 16
-; SI-NEXT: s_and_b32 s84, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s71, s9, 16
-; SI-NEXT: s_and_b32 s83, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s69, s7, 16
-; SI-NEXT: s_and_b32 s82, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s67, s6, 16
-; SI-NEXT: s_and_b32 s80, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s55, s8, 16
-; SI-NEXT: s_and_b32 s66, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s53, s10, 16
-; SI-NEXT: s_and_b32 s65, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s51, s12, 16
-; SI-NEXT: s_and_b32 s64, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s49, s14, 16
-; SI-NEXT: s_and_b32 s54, s40, 0xffff0000
-; SI-NEXT: s_lshl_b32 s39, s40, 16
-; SI-NEXT: s_and_b32 s52, s42, 0xffff0000
-; SI-NEXT: s_lshl_b32 s37, s42, 16
-; SI-NEXT: s_and_b32 s50, s44, 0xffff0000
-; SI-NEXT: s_lshl_b32 s35, s44, 16
-; SI-NEXT: s_and_b32 s48, s46, 0xffff0000
-; SI-NEXT: s_lshl_b32 s31, s46, 16
-; SI-NEXT: s_and_b32 s38, s56, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_hi, s56, 16
-; SI-NEXT: s_and_b32 s36, s58, 0xffff0000
-; SI-NEXT: s_lshl_b32 s95, s58, 16
-; SI-NEXT: s_and_b32 s34, s60, 0xffff0000
-; SI-NEXT: s_lshl_b32 s93, s60, 16
-; SI-NEXT: s_and_b32 s30, s62, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s62, 16
-; SI-NEXT: s_and_b32 vcc_lo, s72, 0xffff0000
-; SI-NEXT: s_lshl_b32 s90, s72, 16
-; SI-NEXT: s_and_b32 s94, s74, 0xffff0000
-; SI-NEXT: s_lshl_b32 s88, s74, 16
-; SI-NEXT: s_and_b32 s92, s5, 0xffff0000
+; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_add_i32 s9, s9, 0x30000
+; SI-NEXT: s_add_i32 s7, s7, 0x30000
+; SI-NEXT: v_writelane_b32 v34, s6, 31
+; SI-NEXT: s_and_b32 s6, s90, 0xffff0000
+; SI-NEXT: s_and_b32 s46, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s45, s17, 16
+; SI-NEXT: s_and_b32 s47, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s56, s18, 16
+; SI-NEXT: s_and_b32 s57, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s58, s19, 16
+; SI-NEXT: s_and_b32 s59, s20, 0xffff0000
+; SI-NEXT: s_lshl_b32 s60, s20, 16
+; SI-NEXT: s_and_b32 s61, s21, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s21, 16
+; SI-NEXT: s_and_b32 s63, s22, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s22, 16
+; SI-NEXT: s_and_b32 s73, s23, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s23, 16
+; SI-NEXT: s_and_b32 s75, s24, 0xffff0000
+; SI-NEXT: s_and_b32 s76, s25, 0xffff0000
+; SI-NEXT: s_and_b32 s77, s26, 0xffff0000
+; SI-NEXT: s_and_b32 s78, s27, 0xffff0000
+; SI-NEXT: s_lshl_b32 s85, s28, 16
+; SI-NEXT: s_lshl_b32 s81, s29, 16
+; SI-NEXT: v_writelane_b32 v34, s6, 32
+; SI-NEXT: s_lshl_b32 s83, s90, 16
+; SI-NEXT: s_and_b32 s6, s88, 0xffff0000
+; SI-NEXT: s_lshl_b32 s71, s88, 16
+; SI-NEXT: s_and_b32 s87, s65, 0xffff0000
+; SI-NEXT: s_lshl_b32 s55, s65, 16
+; SI-NEXT: s_and_b32 s69, s67, 0xffff0000
+; SI-NEXT: s_lshl_b32 s52, s67, 16
+; SI-NEXT: s_and_b32 s67, s42, 0xffff0000
+; SI-NEXT: s_lshl_b32 s50, s42, 16
+; SI-NEXT: s_and_b32 s65, s41, 0xffff0000
+; SI-NEXT: s_lshl_b32 s48, s41, 16
+; SI-NEXT: s_and_b32 s53, s40, 0xffff0000
+; SI-NEXT: s_lshl_b32 s38, s40, 16
+; SI-NEXT: s_and_b32 s51, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s36, s15, 16
+; SI-NEXT: s_and_b32 s49, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s34, s14, 16
+; SI-NEXT: s_and_b32 s39, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s30, s12, 16
+; SI-NEXT: s_and_b32 s37, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_lo, s10, 16
+; SI-NEXT: s_and_b32 s35, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s94, s8, 16
+; SI-NEXT: s_and_b32 s31, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 s92, s7, 16
+; SI-NEXT: s_and_b32 vcc_hi, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s9, 16
+; SI-NEXT: s_and_b32 s95, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s89, s11, 16
+; SI-NEXT: s_and_b32 s93, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s79, s13, 16
+; SI-NEXT: s_and_b32 s91, s5, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_and_b32 s89, s4, 0xffff0000
+; SI-NEXT: s_and_b32 s88, s4, 0xffff0000
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_writelane_b32 v34, s16, 33
+; SI-NEXT: v_writelane_b32 v34, s6, 33
; SI-NEXT: .LBB107_5: ; %end
-; SI-NEXT: v_readlane_b32 s6, v34, 17
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 18
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 19
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 20
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s46
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s45
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 21
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 22
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s47
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s56
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 23
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 24
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s57
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s58
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 25
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 26
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s59
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s60
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 27
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 28
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s61
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s62
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 29
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 30
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s63
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s72
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 31
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s6
-; SI-NEXT: v_readlane_b32 s6, v34, 32
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s73
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s74
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_readlane_b32 s6, v34, 33
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s75
+; SI-NEXT: v_readlane_b32 s6, v34, 26
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s70
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s6
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s98
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s76
+; SI-NEXT: v_readlane_b32 s6, v34, 27
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s68
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s6
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s97
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s77
+; SI-NEXT: v_readlane_b32 s6, v34, 28
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s96
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s6
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s87
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s78
+; SI-NEXT: v_readlane_b32 s6, v34, 29
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s85
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s6
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s86
+; SI-NEXT: v_readlane_b32 s6, v34, 30
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s81
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s85
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s84
+; SI-NEXT: v_readlane_b32 s6, v34, 31
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s71
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s81
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s83
+; SI-NEXT: v_readlane_b32 s6, v34, 32
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s69
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s83
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s82
+; SI-NEXT: v_readlane_b32 s6, v34, 33
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s71
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s80
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s87
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s55
; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s66
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s69
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s53
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s52
; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s65
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s67
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s50
; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s64
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s65
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s49
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s48
; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s54
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s53
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v20
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s39
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s38
; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s51
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s37
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s36
; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s50
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s49
; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s34
; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s48
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s39
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s30
; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s38
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s37
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v24
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, vcc_lo
; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s36
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s35
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; SI-NEXT: v_mul_f32_e64 v25, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v25, 1.0, s94
; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s31
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v26
-; SI-NEXT: v_mul_f32_e64 v26, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s92
; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, vcc_hi
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v27
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s90
; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s89
; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s93
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s79
; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s91
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30
; SI-NEXT: v_mul_f32_e64 v30, 1.0, s5
; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s88
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31
; SI-NEXT: v_mul_f32_e64 v31, 1.0, s4
; SI-NEXT: v_readlane_b32 s30, v33, 34
@@ -226769,109 +228390,112 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB107_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB107_3
; GFX9-NEXT: .LBB107_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB107_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB107_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v15, s31, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v14, s30, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v13, s29, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v12, s28, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v31, s51, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v30, s50, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v29, s49, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v28, s48, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v27, s47, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v26, s46, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v25, s45, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v24, s44, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v23, s43, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v22, s42, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v21, s41, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v20, s40, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v19, s39, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v18, s38, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v17, s37, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v16, s36, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v15, s51, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v14, s50, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v13, s49, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v12, s48, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v11, s47, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v10, s46, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v9, s45, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, s44, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, s43, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v6, s42, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v5, s41, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v4, s40, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v3, s39, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v2, s38, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v1, s37, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v0, s36, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v31, s19, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v30, s18, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v29, s17, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v28, s16, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v27, s15, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v26, s14, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v25, s13, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v24, s12, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v23, s11, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v22, s10, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v21, s9, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v20, s8, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v19, s7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v18, s6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v17, s5, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v16, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_branch .LBB107_6
; GFX9-NEXT: .LBB107_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB107_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -227734,7 +229358,7 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -227826,464 +229450,490 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v2, s36
; SI-NEXT: v_cvt_f32_f16_e32 v3, s18
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v29, s76
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0
+; SI-NEXT: v_or_b32_e32 v53, v1, v26
; SI-NEXT: v_cvt_f32_f16_e32 v0, s35
-; SI-NEXT: v_or_b32_e32 v40, v1, v38
; SI-NEXT: v_cvt_f16_f32_e32 v1, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v1
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s20
-; SI-NEXT: v_or_b32_e32 v2, v2, v60
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s34
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_or_b32_e32 v42, v2, v5
; SI-NEXT: v_cvt_f32_f16_e32 v2, s22
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s34
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v8, v1, v56
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_or_b32_e32 v1, v1, v51
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s30
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v0
-; SI-NEXT: v_or_b32_e32 v2, v2, v45
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s63
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s24
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, vcc_hi
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_or_b32_e32 v62, v2, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v2, vcc_hi
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s26
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s26
-; SI-NEXT: v_or_b32_e32 v10, v0, v12
+; SI-NEXT: v_or_b32_e32 v61, v0, v8
; SI-NEXT: v_cvt_f32_f16_e32 v0, s93
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s28
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v2
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v58, v1, v33
; SI-NEXT: v_cvt_f32_f16_e32 v1, s95
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v0
-; SI-NEXT: v_or_b32_e32 v17, v2, v41
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s94
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s28
+; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, vcc_lo
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s91
-; SI-NEXT: v_or_b32_e32 v21, v0, v52
-; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
+; SI-NEXT: v_or_b32_e32 v56, v2, v11
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s94
+; SI-NEXT: v_or_b32_e32 v19, v0, v40
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s91
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s89
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s74
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s79
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s63
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s77
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s92
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s79
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s74
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v7
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s61
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s88
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s78
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v30, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v6, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s59
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s75
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s57
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s61
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s88
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s78
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v20, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s59
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s75
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s57
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v35, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v5
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_or_b32_e32 v59, v2, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s73
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v9
-; SI-NEXT: v_or_b32_e32 v23, v5, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s56
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_or_b32_e32 v22, v0, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s73
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; SI-NEXT: v_or_b32_e32 v16, v2, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s56
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s72
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s47
+; SI-NEXT: v_or_b32_e32 v18, v0, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s62
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s46
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s72
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s47
-; SI-NEXT: v_or_b32_e32 v16, v2, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s62
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_or_b32_e32 v55, v2, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s60
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; SI-NEXT: v_or_b32_e32 v39, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s45
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s58
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s46
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v55, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
-; SI-NEXT: v_or_b32_e32 v37, v5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s60
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v55
-; SI-NEXT: v_or_b32_e32 v19, v4, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s45
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s58
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v47
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s44
-; SI-NEXT: v_or_b32_e32 v50, v2, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s43
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s44
+; SI-NEXT: v_or_b32_e32 v25, v0, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s43
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s29
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v35, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_or_b32_e32 v53, v5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s42
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35
-; SI-NEXT: v_or_b32_e32 v42, v4, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s27
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s41
-; SI-NEXT: v_cvt_f16_f32_e32 v34, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v34
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s25
-; SI-NEXT: v_or_b32_e32 v44, v2, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s40
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s23
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; SI-NEXT: v_or_b32_e32 v13, v5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s15
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v9
-; SI-NEXT: v_or_b32_e32 v46, v4, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s21
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_or_b32_e32 v41, v2, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s42
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; SI-NEXT: v_or_b32_e32 v12, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s27
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s41
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v59, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s25
+; SI-NEXT: v_or_b32_e32 v34, v0, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s40
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v31, s14
-; SI-NEXT: v_cvt_f16_f32_e32 v51, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51
-; SI-NEXT: v_cvt_f32_f16_e32 v32, s19
-; SI-NEXT: v_or_b32_e32 v57, v2, v31
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s13
-; SI-NEXT: v_cvt_f32_f16_e32 v33, s17
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v4
-; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59
+; SI-NEXT: v_or_b32_e32 v9, v2, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s15
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
+; SI-NEXT: v_or_b32_e32 v14, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s21
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s14
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v0
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v57, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s19
+; SI-NEXT: v_or_b32_e32 v52, v0, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s13
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
-; SI-NEXT: v_cvt_f16_f32_e32 v33, v33
-; SI-NEXT: v_cvt_f32_f16_e32 v29, s76
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v27
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s92
-; SI-NEXT: v_or_b32_e32 v61, v32, v31
-; SI-NEXT: v_cvt_f32_f16_e32 v31, s11
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v2
-; SI-NEXT: v_or_b32_e32 v39, v33, v32
-; SI-NEXT: v_cvt_f32_f16_e32 v32, s10
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v60, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s90
-; SI-NEXT: v_cvt_f16_f32_e32 v33, v29
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v31
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
-; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v32
-; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v57
+; SI-NEXT: v_or_b32_e32 v6, v2, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s11
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v60
+; SI-NEXT: v_or_b32_e32 v27, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v2
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_or_b32_e32 v29, v29, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v6
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v31, v31, v32
-; SI-NEXT: v_cvt_f32_f16_e32 v32, s12
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v26, v0, v49
-; SI-NEXT: v_or_b32_e32 v48, v3, v36
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; SI-NEXT: v_or_b32_e32 v29, v0, v2
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7
+; SI-NEXT: v_or_b32_e32 v31, v1, v0
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s12
+; SI-NEXT: v_cvt_f32_f16_e32 v50, s90
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v49
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v20
+; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v50
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_or_b32_e32 v20, v1, v38
+; SI-NEXT: v_or_b32_e32 v49, v0, v17
; SI-NEXT: v_cvt_f32_f16_e32 v0, s9
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s7
-; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
-; SI-NEXT: v_or_b32_e32 v20, v1, v18
; SI-NEXT: v_cvt_f32_f16_e32 v1, s8
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
+; SI-NEXT: v_or_b32_e32 v50, v2, v54
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v24, v32, v15
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v32, s6
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_or_b32_e32 v0, v0, v15
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; SI-NEXT: v_or_b32_e32 v25, v0, v22
-; SI-NEXT: v_or_b32_e32 v0, v3, v28
-; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
-; SI-NEXT: v_or_b32_e32 v54, v1, v58
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v37, v1, v21
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[0:1], v[38:39], 16
-; SI-NEXT: v_mov_b32_e32 v38, v61
-; SI-NEXT: v_lshr_b64 v[60:61], v[60:61], 16
-; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
-; SI-NEXT: v_mov_b32_e32 v1, v40
-; SI-NEXT: v_mov_b32_e32 v40, v57
-; SI-NEXT: v_lshr_b64 v[61:62], v[56:57], 16
-; SI-NEXT: v_lshr_b64 v[56:57], v[45:46], 16
-; SI-NEXT: v_lshr_b64 v[4:5], v[52:53], 16
-; SI-NEXT: v_mov_b32_e32 v57, v44
-; SI-NEXT: v_lshr_b64 v[44:45], v[43:44], 16
-; SI-NEXT: v_mov_b32_e32 v45, v42
-; SI-NEXT: v_lshr_b64 v[42:43], v[41:42], 16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v7, v6
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; SI-NEXT: v_mov_b32_e32 v6, v8
-; SI-NEXT: v_mov_b32_e32 v8, v13
-; SI-NEXT: v_lshr_b64 v[13:14], v[12:13], 16
+; SI-NEXT: v_lshr_b64 v[0:1], v[26:27], 16
+; SI-NEXT: v_or_b32_e32 v36, v2, v28
+; SI-NEXT: v_lshr_b64 v[1:2], v[5:6], 16
+; SI-NEXT: v_mov_b32_e32 v2, v9
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[49:50], 16
-; SI-NEXT: v_mov_b32_e32 v52, v16
-; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_mov_b32_e32 v43, v23
-; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16
-; SI-NEXT: v_or_b32_e32 v32, v32, v30
-; SI-NEXT: v_mov_b32_e32 v14, v17
-; SI-NEXT: v_mov_b32_e32 v17, v21
-; SI-NEXT: v_mov_b32_e32 v21, v37
-; SI-NEXT: v_lshr_b64 v[36:37], v[36:37], 16
-; SI-NEXT: v_mov_b32_e32 v3, v39
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v39, v32
-; SI-NEXT: v_mov_b32_e32 v37, v33
-; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v2, v34
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[4:5], v[18:19], 16
-; SI-NEXT: v_mov_b32_e32 v15, v46
-; SI-NEXT: v_mov_b32_e32 v22, v50
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s6
+; SI-NEXT: v_or_b32_e32 v32, v48, v24
+; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v45, v27
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_mov_b32_e32 v27, v6
+; SI-NEXT: v_lshr_b64 v[9:10], v[33:34], 16
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v12
+; SI-NEXT: v_or_b32_e32 v43, v4, v30
+; SI-NEXT: v_lshr_b64 v[4:5], v[51:52], 16
+; SI-NEXT: v_lshr_b64 v[5:6], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[12:13], v[11:12], 16
+; SI-NEXT: v_mov_b32_e32 v11, v59
+; SI-NEXT: v_mov_b32_e32 v59, v20
+; SI-NEXT: v_mov_b32_e32 v20, v50
+; SI-NEXT: v_mov_b32_e32 v23, v52
+; SI-NEXT: v_mov_b32_e32 v51, v53
+; SI-NEXT: v_mov_b32_e32 v26, v39
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v41
+; SI-NEXT: v_lshr_b64 v[52:53], v[38:39], 16
+; SI-NEXT: v_lshr_b64 v[38:39], v[17:18], 16
+; SI-NEXT: v_mov_b32_e32 v46, v14
+; SI-NEXT: v_lshr_b64 v[13:14], v[40:41], 16
+; SI-NEXT: v_lshr_b64 v[53:54], v[54:55], 16
+; SI-NEXT: v_lshr_b64 v[39:40], v[15:16], 16
+; SI-NEXT: v_mov_b32_e32 v40, v37
+; SI-NEXT: v_mov_b32_e32 v37, v35
+; SI-NEXT: v_mov_b32_e32 v54, v36
+; SI-NEXT: v_lshr_b64 v[35:36], v[30:31], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v25
+; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16
+; SI-NEXT: v_mov_b32_e32 v25, v44
+; SI-NEXT: v_mov_b32_e32 v44, v49
+; SI-NEXT: v_lshr_b64 v[48:49], v[21:22], 16
; SI-NEXT: v_lshr_b64 v[49:50], v[28:29], 16
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v41, v55
-; SI-NEXT: v_mov_b32_e32 v55, v59
-; SI-NEXT: v_lshr_b64 v[58:59], v[58:59], 16
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v50, v7
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v33, v42
+; SI-NEXT: v_mov_b32_e32 v42, v18
+; SI-NEXT: v_mov_b32_e32 v41, v16
+; SI-NEXT: v_mov_b32_e32 v6, v5
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v55
+; SI-NEXT: v_mov_b32_e32 v10, v9
+; SI-NEXT: v_mov_b32_e32 v14, v13
+; SI-NEXT: v_mov_b32_e32 v55, v22
+; SI-NEXT: v_mov_b32_e32 v30, v3
+; SI-NEXT: v_mov_b32_e32 v36, v7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, v1
; SI-NEXT: s_branch .LBB109_6
; SI-NEXT: .LBB109_5:
-; SI-NEXT: v_mov_b32_e32 v6, s20
-; SI-NEXT: v_mov_b32_e32 v7, s25
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v8, s22
+; SI-NEXT: v_mov_b32_e32 v0, s73
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v7, s95
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, s94
-; SI-NEXT: v_mov_b32_e32 v0, s7
-; SI-NEXT: v_mov_b32_e32 v50, s88
-; SI-NEXT: v_mov_b32_e32 v37, s76
-; SI-NEXT: v_mov_b32_e32 v30, s78
-; SI-NEXT: v_mov_b32_e32 v28, s75
-; SI-NEXT: v_mov_b32_e32 v46, s73
-; SI-NEXT: v_mov_b32_e32 v23, s72
-; SI-NEXT: v_mov_b32_e32 v41, s62
-; SI-NEXT: v_mov_b32_e32 v47, s60
-; SI-NEXT: v_mov_b32_e32 v33, s58
-; SI-NEXT: v_mov_b32_e32 v35, s43
-; SI-NEXT: v_mov_b32_e32 v34, s42
+; SI-NEXT: v_mov_b32_e32 v0, s72
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s62
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s60
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s58
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s43
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v0, s9
+; SI-NEXT: v_mov_b32_e32 v1, s25
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s27
+; SI-NEXT: v_mov_b32_e32 v36, s88
+; SI-NEXT: v_mov_b32_e32 v30, s76
+; SI-NEXT: v_mov_b32_e32 v28, s78
+; SI-NEXT: v_mov_b32_e32 v37, s75
; SI-NEXT: v_mov_b32_e32 v11, s41
-; SI-NEXT: v_mov_b32_e32 v9, s40
-; SI-NEXT: v_mov_b32_e32 v51, s15
-; SI-NEXT: v_mov_b32_e32 v27, s14
-; SI-NEXT: v_mov_b32_e32 v2, s13
-; SI-NEXT: v_mov_b32_e32 v39, s6
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v54, s8
-; SI-NEXT: v_mov_b32_e32 v25, s9
-; SI-NEXT: v_mov_b32_e32 v24, s12
-; SI-NEXT: v_mov_b32_e32 v48, s90
-; SI-NEXT: v_mov_b32_e32 v20, s92
-; SI-NEXT: v_mov_b32_e32 v26, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v17, s31
-; SI-NEXT: v_mov_b32_e32 v14, s28
-; SI-NEXT: v_mov_b32_e32 v12, s26
-; SI-NEXT: v_mov_b32_e32 v10, s24
-; SI-NEXT: v_mov_b32_e32 v18, s18
-; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_mov_b32_e32 v3, s17
-; SI-NEXT: v_mov_b32_e32 v38, s19
-; SI-NEXT: v_mov_b32_e32 v40, s21
-; SI-NEXT: v_mov_b32_e32 v15, s23
-; SI-NEXT: v_mov_b32_e32 v57, s27
-; SI-NEXT: v_mov_b32_e32 v45, s29
-; SI-NEXT: v_mov_b32_e32 v53, s44
-; SI-NEXT: v_mov_b32_e32 v22, s45
-; SI-NEXT: v_mov_b32_e32 v19, s46
-; SI-NEXT: v_mov_b32_e32 v21, s47
-; SI-NEXT: v_mov_b32_e32 v52, s56
-; SI-NEXT: v_mov_b32_e32 v43, s57
+; SI-NEXT: v_mov_b32_e32 v25, s40
+; SI-NEXT: v_mov_b32_e32 v47, s15
+; SI-NEXT: v_mov_b32_e32 v57, s14
+; SI-NEXT: v_mov_b32_e32 v60, s13
+; SI-NEXT: v_mov_b32_e32 v43, s6
+; SI-NEXT: v_mov_b32_e32 v54, s7
+; SI-NEXT: v_mov_b32_e32 v40, s8
+; SI-NEXT: v_mov_b32_e32 v44, s12
+; SI-NEXT: v_mov_b32_e32 v20, s90
+; SI-NEXT: v_mov_b32_e32 v59, s92
+; SI-NEXT: v_mov_b32_e32 v32, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v19, s31
+; SI-NEXT: v_mov_b32_e32 v56, s28
+; SI-NEXT: v_mov_b32_e32 v58, s26
+; SI-NEXT: v_mov_b32_e32 v61, s24
+; SI-NEXT: v_mov_b32_e32 v62, s22
+; SI-NEXT: v_mov_b32_e32 v34, s20
+; SI-NEXT: v_mov_b32_e32 v33, s18
+; SI-NEXT: v_mov_b32_e32 v51, s16
+; SI-NEXT: v_mov_b32_e32 v45, s17
+; SI-NEXT: v_mov_b32_e32 v27, s19
+; SI-NEXT: v_mov_b32_e32 v23, s21
+; SI-NEXT: v_mov_b32_e32 v46, s23
+; SI-NEXT: v_mov_b32_e32 v26, s46
+; SI-NEXT: v_mov_b32_e32 v42, s56
+; SI-NEXT: v_mov_b32_e32 v41, s57
; SI-NEXT: v_mov_b32_e32 v55, s59
; SI-NEXT: v_mov_b32_e32 v29, s11
; SI-NEXT: v_mov_b32_e32 v31, s10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v0, s37
-; SI-NEXT: v_mov_b32_e32 v60, s36
-; SI-NEXT: v_mov_b32_e32 v61, s35
-; SI-NEXT: v_mov_b32_e32 v56, s34
-; SI-NEXT: v_mov_b32_e32 v13, s30
-; SI-NEXT: v_mov_b32_e32 v44, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v42, s93
-; SI-NEXT: v_mov_b32_e32 v36, s89
-; SI-NEXT: v_mov_b32_e32 v58, s74
+; SI-NEXT: v_mov_b32_e32 v2, s36
+; SI-NEXT: v_mov_b32_e32 v4, s35
+; SI-NEXT: v_mov_b32_e32 v6, s34
+; SI-NEXT: v_mov_b32_e32 v8, s30
+; SI-NEXT: v_mov_b32_e32 v10, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v12, s93
+; SI-NEXT: v_mov_b32_e32 v14, s95
+; SI-NEXT: v_mov_b32_e32 v24, s94
+; SI-NEXT: v_mov_b32_e32 v52, s91
+; SI-NEXT: v_mov_b32_e32 v53, s89
+; SI-NEXT: v_mov_b32_e32 v38, s79
+; SI-NEXT: v_mov_b32_e32 v39, s77
+; SI-NEXT: v_mov_b32_e32 v48, s74
; SI-NEXT: v_mov_b32_e32 v49, s63
-; SI-NEXT: v_mov_b32_e32 v32, s61
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, s91
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, s79
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v35, s61
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s29
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s45
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s47
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v7, s77
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v0, s37
; SI-NEXT: .LBB109_6: ; %end
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v51
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v60
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v18
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v33
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v38
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v27
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v61
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v40
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v51
-; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v13
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v45
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v17
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v26
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57
+; SI-NEXT: v_or_b32_e32 v3, v3, v5
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(13)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v47
+; SI-NEXT: v_or_b32_e32 v5, v5, v9
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v62
+; SI-NEXT: v_or_b32_e32 v6, v9, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v25
+; SI-NEXT: v_or_b32_e32 v7, v7, v9
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v61
+; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v42
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v41
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_or_b32_e32 v29, v29, v30
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v43
+; SI-NEXT: v_and_b32_e32 v32, 0xffff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v48
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
; SI-NEXT: v_readlane_b32 s30, v63, 4
; SI-NEXT: v_readlane_b32 s31, v63, 5
@@ -228291,66 +229941,78 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_readlane_b32 s36, v63, 2
; SI-NEXT: v_readlane_b32 s35, v63, 1
; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v44
-; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v42
-; SI-NEXT: v_or_b32_e32 v12, v14, v12
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v35
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v53
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v33
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v16
+; SI-NEXT: v_or_b32_e32 v9, v9, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v15
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v36
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v18
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_or_b32_e32 v11, v11, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v56
+; SI-NEXT: v_or_b32_e32 v12, v13, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v34
+; SI-NEXT: v_or_b32_e32 v13, v13, v33
+; SI-NEXT: v_and_b32_e32 v33, 0xffff, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v38
+; SI-NEXT: v_or_b32_e32 v14, v33, v14
+; SI-NEXT: v_or_b32_e32 v19, v19, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v53
+; SI-NEXT: v_or_b32_e32 v20, v21, v20
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v22
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v16, v18, v16
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v47
-; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20
+; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v16, v32, v16
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v33
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v41
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v48
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v44
+; SI-NEXT: v_or_b32_e32 v22, v22, v26
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v23
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v52
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v25
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v17, v17, v18
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v59
+; SI-NEXT: v_or_b32_e32 v18, v18, v32
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v49
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v25
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v40
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -228366,24 +230028,17 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v54
-; SI-NEXT: v_or_b32_e32 v26, v26, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
-; SI-NEXT: v_or_b32_e32 v28, v28, v30
-; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v37
-; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_and_b32_e32 v30, 0xffff, v39
+; SI-NEXT: v_and_b32_e32 v28, 0xffff, v54
+; SI-NEXT: v_or_b32_e32 v28, v28, v32
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v35
; SI-NEXT: v_or_b32_e32 v30, v30, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v36
; SI-NEXT: v_or_b32_e32 v31, v31, v32
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -228402,238 +230057,241 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_writelane_b32 v33, s49, 5
; VI-NEXT: v_writelane_b32 v33, s50, 6
; VI-NEXT: v_writelane_b32 v33, s51, 7
-; VI-NEXT: v_writelane_b32 v33, s30, 8
-; VI-NEXT: v_writelane_b32 v33, s31, 9
-; VI-NEXT: v_readfirstlane_b32 s4, v18
-; VI-NEXT: v_readfirstlane_b32 s51, v17
-; VI-NEXT: v_readfirstlane_b32 s50, v16
-; VI-NEXT: v_readfirstlane_b32 s49, v15
-; VI-NEXT: v_readfirstlane_b32 s48, v14
-; VI-NEXT: v_readfirstlane_b32 s47, v13
-; VI-NEXT: v_readfirstlane_b32 s46, v12
-; VI-NEXT: v_readfirstlane_b32 s45, v11
-; VI-NEXT: v_readfirstlane_b32 s44, v10
-; VI-NEXT: v_readfirstlane_b32 s43, v9
-; VI-NEXT: v_readfirstlane_b32 s42, v8
-; VI-NEXT: v_readfirstlane_b32 s41, v7
-; VI-NEXT: v_readfirstlane_b32 s40, v6
-; VI-NEXT: v_readfirstlane_b32 s39, v5
-; VI-NEXT: v_readfirstlane_b32 s38, v4
-; VI-NEXT: v_readfirstlane_b32 s37, v3
-; VI-NEXT: v_readfirstlane_b32 s36, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: s_mov_b64 s[46:47], s[26:27]
+; VI-NEXT: s_mov_b64 s[44:45], s[24:25]
+; VI-NEXT: s_mov_b64 s[42:43], s[22:23]
+; VI-NEXT: s_mov_b64 s[40:41], s[20:21]
+; VI-NEXT: s_mov_b64 s[38:39], s[18:19]
+; VI-NEXT: s_mov_b64 s[36:37], s[16:17]
+; VI-NEXT: v_readfirstlane_b32 s20, v18
+; VI-NEXT: s_mov_b64 s[48:49], s[28:29]
+; VI-NEXT: v_readfirstlane_b32 s19, v17
+; VI-NEXT: v_readfirstlane_b32 s18, v16
+; VI-NEXT: v_readfirstlane_b32 s17, v15
+; VI-NEXT: v_readfirstlane_b32 s16, v14
+; VI-NEXT: v_readfirstlane_b32 s15, v13
+; VI-NEXT: v_readfirstlane_b32 s14, v12
+; VI-NEXT: v_readfirstlane_b32 s13, v11
+; VI-NEXT: v_readfirstlane_b32 s12, v10
+; VI-NEXT: v_readfirstlane_b32 s11, v9
+; VI-NEXT: v_readfirstlane_b32 s10, v8
+; VI-NEXT: v_readfirstlane_b32 s9, v7
+; VI-NEXT: v_readfirstlane_b32 s8, v6
+; VI-NEXT: v_readfirstlane_b32 s7, v5
+; VI-NEXT: v_readfirstlane_b32 s6, v4
+; VI-NEXT: v_readfirstlane_b32 s5, v3
+; VI-NEXT: v_readfirstlane_b32 s4, v2
+; VI-NEXT: v_readfirstlane_b32 s51, v1
+; VI-NEXT: s_cmp_lg_u32 s20, 0
+; VI-NEXT: v_readfirstlane_b32 s50, v0
; VI-NEXT: s_cbranch_scc0 .LBB109_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_mov_b64 s[4:5], 0
+; VI-NEXT: s_mov_b64 s[20:21], 0
; VI-NEXT: s_branch .LBB109_3
; VI-NEXT: .LBB109_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b64 s[20:21], -1
; VI-NEXT: .LBB109_3: ; %Flow
-; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; VI-NEXT: s_cselect_b32 s4, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; VI-NEXT: s_cselect_b32 s20, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s20, 1
; VI-NEXT: s_cbranch_scc1 .LBB109_5
; VI-NEXT: ; %bb.4: ; %cmp.true
-; VI-NEXT: s_lshr_b32 s4, s50, 16
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: s_lshr_b32 s4, s30, 16
; VI-NEXT: v_mov_b32_e32 v16, 0x200
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: s_lshr_b32 s4, s31, 16
+; VI-NEXT: v_add_f16_e32 v17, s18, v16
+; VI-NEXT: s_lshr_b32 s18, s18, 16
+; VI-NEXT: v_mov_b32_e32 v0, s18
+; VI-NEXT: s_lshr_b32 s18, s50, 16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: s_lshr_b32 s18, s51, 16
; VI-NEXT: v_add_f16_sdwa v18, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v0, s30, v16
+; VI-NEXT: v_add_f16_e32 v0, s50, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_mov_b32_e32 v3, s4
-; VI-NEXT: s_lshr_b32 s4, s29, 16
+; VI-NEXT: v_mov_b32_e32 v3, s18
+; VI-NEXT: s_lshr_b32 s18, s49, 16
; VI-NEXT: v_or_b32_e32 v14, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s29, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s49, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s28, 16
+; VI-NEXT: s_lshr_b32 s18, s48, 16
; VI-NEXT: v_or_b32_e32 v13, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s28, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s48, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s18, s47, 16
; VI-NEXT: v_or_b32_e32 v12, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s27, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s47, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: s_lshr_b32 s18, s46, 16
; VI-NEXT: v_or_b32_e32 v11, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s26, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s46, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: s_lshr_b32 s18, s45, 16
; VI-NEXT: v_or_b32_e32 v10, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s25, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s45, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: s_lshr_b32 s18, s44, 16
; VI-NEXT: v_or_b32_e32 v9, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s24, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s44, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s18, s43, 16
; VI-NEXT: v_or_b32_e32 v8, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s23, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s43, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s18, s42, 16
; VI-NEXT: v_or_b32_e32 v7, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s22, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s42, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s18, s41, 16
; VI-NEXT: v_or_b32_e32 v6, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s21, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s41, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s20, 16
+; VI-NEXT: s_lshr_b32 s18, s40, 16
; VI-NEXT: v_or_b32_e32 v5, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s20, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s40, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s18, s39, 16
; VI-NEXT: v_or_b32_e32 v4, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v2, s31, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v2, s51, v16
; VI-NEXT: v_add_f16_sdwa v3, v3, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v0, s19, v16
+; VI-NEXT: v_add_f16_e32 v0, s39, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s18, s38, 16
; VI-NEXT: v_or_b32_e32 v15, v2, v3
; VI-NEXT: v_or_b32_e32 v3, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: v_add_f16_e32 v0, s18, v16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: v_add_f16_e32 v0, s38, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s18, s37, 16
; VI-NEXT: v_or_b32_e32 v2, v0, v1
-; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: s_lshr_b32 s4, s16, 16
-; VI-NEXT: v_mov_b32_e32 v19, s4
-; VI-NEXT: s_lshr_b32 s4, s51, 16
-; VI-NEXT: v_add_f16_e32 v17, s50, v16
-; VI-NEXT: v_mov_b32_e32 v20, s4
-; VI-NEXT: s_lshr_b32 s4, s49, 16
+; VI-NEXT: v_mov_b32_e32 v1, s18
+; VI-NEXT: s_lshr_b32 s18, s36, 16
+; VI-NEXT: v_mov_b32_e32 v19, s18
+; VI-NEXT: s_lshr_b32 s18, s19, 16
+; VI-NEXT: v_mov_b32_e32 v20, s18
+; VI-NEXT: s_lshr_b32 s18, s17, 16
; VI-NEXT: v_or_b32_e32 v30, v17, v18
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s18
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s49, v16
-; VI-NEXT: s_lshr_b32 s4, s48, 16
+; VI-NEXT: v_add_f16_e32 v18, s17, v16
+; VI-NEXT: s_lshr_b32 s17, s16, 16
; VI-NEXT: v_or_b32_e32 v29, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s17
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s48, v16
-; VI-NEXT: s_lshr_b32 s4, s47, 16
+; VI-NEXT: v_add_f16_e32 v18, s16, v16
+; VI-NEXT: s_lshr_b32 s16, s15, 16
; VI-NEXT: v_or_b32_e32 v28, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s16
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s47, v16
-; VI-NEXT: s_lshr_b32 s4, s46, 16
+; VI-NEXT: v_add_f16_e32 v18, s15, v16
+; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: v_or_b32_e32 v27, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s15
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s46, v16
-; VI-NEXT: s_lshr_b32 s4, s45, 16
+; VI-NEXT: v_add_f16_e32 v18, s14, v16
+; VI-NEXT: s_lshr_b32 s14, s13, 16
; VI-NEXT: v_or_b32_e32 v26, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s14
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s45, v16
-; VI-NEXT: s_lshr_b32 s4, s44, 16
+; VI-NEXT: v_add_f16_e32 v18, s13, v16
+; VI-NEXT: s_lshr_b32 s13, s12, 16
; VI-NEXT: v_or_b32_e32 v25, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s13
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s44, v16
-; VI-NEXT: s_lshr_b32 s4, s43, 16
+; VI-NEXT: v_add_f16_e32 v18, s12, v16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: v_or_b32_e32 v24, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s12
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s43, v16
-; VI-NEXT: s_lshr_b32 s4, s42, 16
+; VI-NEXT: v_add_f16_e32 v18, s11, v16
+; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: v_or_b32_e32 v23, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s11
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s42, v16
-; VI-NEXT: s_lshr_b32 s4, s41, 16
+; VI-NEXT: v_add_f16_e32 v18, s10, v16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
; VI-NEXT: v_or_b32_e32 v22, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
-; VI-NEXT: v_add_f16_e32 v0, s17, v16
+; VI-NEXT: v_mov_b32_e32 v17, s10
+; VI-NEXT: v_add_f16_e32 v0, s37, v16
; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s41, v16
-; VI-NEXT: s_lshr_b32 s4, s40, 16
+; VI-NEXT: v_add_f16_e32 v18, s9, v16
+; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: v_or_b32_e32 v1, v0, v1
-; VI-NEXT: v_add_f16_e32 v0, s16, v16
+; VI-NEXT: v_add_f16_e32 v0, s36, v16
; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v21, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s9
; VI-NEXT: v_or_b32_e32 v0, v0, v19
-; VI-NEXT: v_add_f16_e32 v19, s51, v16
+; VI-NEXT: v_add_f16_e32 v19, s19, v16
; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s40, v16
-; VI-NEXT: s_lshr_b32 s4, s39, 16
+; VI-NEXT: v_add_f16_e32 v18, s8, v16
+; VI-NEXT: s_lshr_b32 s8, s7, 16
; VI-NEXT: v_or_b32_e32 v31, v19, v20
; VI-NEXT: v_or_b32_e32 v20, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s8
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s39, v16
-; VI-NEXT: s_lshr_b32 s4, s38, 16
+; VI-NEXT: v_add_f16_e32 v18, s7, v16
+; VI-NEXT: s_lshr_b32 s7, s6, 16
; VI-NEXT: v_or_b32_e32 v19, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s7
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s38, v16
-; VI-NEXT: s_lshr_b32 s4, s37, 16
+; VI-NEXT: v_add_f16_e32 v18, s6, v16
+; VI-NEXT: s_lshr_b32 s6, s5, 16
; VI-NEXT: v_or_b32_e32 v18, v18, v17
-; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: v_mov_b32_e32 v17, s6
; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v32, s37, v16
-; VI-NEXT: s_lshr_b32 s4, s36, 16
+; VI-NEXT: v_add_f16_e32 v32, s5, v16
+; VI-NEXT: s_lshr_b32 s5, s4, 16
; VI-NEXT: v_or_b32_e32 v17, v32, v17
-; VI-NEXT: v_mov_b32_e32 v32, s4
+; VI-NEXT: v_mov_b32_e32 v32, s5
; VI-NEXT: v_add_f16_sdwa v32, v32, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s36, v16
+; VI-NEXT: v_add_f16_e32 v16, s4, v16
; VI-NEXT: v_or_b32_e32 v16, v16, v32
; VI-NEXT: s_branch .LBB109_6
; VI-NEXT: .LBB109_5:
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v17, s37
-; VI-NEXT: v_mov_b32_e32 v18, s38
-; VI-NEXT: v_mov_b32_e32 v19, s39
-; VI-NEXT: v_mov_b32_e32 v20, s40
-; VI-NEXT: v_mov_b32_e32 v21, s41
-; VI-NEXT: v_mov_b32_e32 v22, s42
-; VI-NEXT: v_mov_b32_e32 v23, s43
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s45
-; VI-NEXT: v_mov_b32_e32 v26, s46
-; VI-NEXT: v_mov_b32_e32 v27, s47
-; VI-NEXT: v_mov_b32_e32 v28, s48
-; VI-NEXT: v_mov_b32_e32 v29, s49
-; VI-NEXT: v_mov_b32_e32 v30, s50
-; VI-NEXT: v_mov_b32_e32 v31, s51
-; VI-NEXT: v_mov_b32_e32 v0, s16
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v2, s18
-; VI-NEXT: v_mov_b32_e32 v3, s19
-; VI-NEXT: v_mov_b32_e32 v4, s20
-; VI-NEXT: v_mov_b32_e32 v5, s21
-; VI-NEXT: v_mov_b32_e32 v6, s22
-; VI-NEXT: v_mov_b32_e32 v7, s23
-; VI-NEXT: v_mov_b32_e32 v8, s24
-; VI-NEXT: v_mov_b32_e32 v9, s25
-; VI-NEXT: v_mov_b32_e32 v10, s26
-; VI-NEXT: v_mov_b32_e32 v11, s27
-; VI-NEXT: v_mov_b32_e32 v12, s28
-; VI-NEXT: v_mov_b32_e32 v13, s29
-; VI-NEXT: v_mov_b32_e32 v14, s30
-; VI-NEXT: v_mov_b32_e32 v15, s31
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v30, s18
+; VI-NEXT: v_mov_b32_e32 v29, s17
+; VI-NEXT: v_mov_b32_e32 v28, s16
+; VI-NEXT: v_mov_b32_e32 v27, s15
+; VI-NEXT: v_mov_b32_e32 v26, s14
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v24, s12
+; VI-NEXT: v_mov_b32_e32 v23, s11
+; VI-NEXT: v_mov_b32_e32 v22, s10
+; VI-NEXT: v_mov_b32_e32 v21, s9
+; VI-NEXT: v_mov_b32_e32 v20, s8
+; VI-NEXT: v_mov_b32_e32 v19, s7
+; VI-NEXT: v_mov_b32_e32 v18, s6
+; VI-NEXT: v_mov_b32_e32 v17, s5
+; VI-NEXT: v_mov_b32_e32 v16, s4
+; VI-NEXT: v_mov_b32_e32 v0, s36
+; VI-NEXT: v_mov_b32_e32 v1, s37
+; VI-NEXT: v_mov_b32_e32 v2, s38
+; VI-NEXT: v_mov_b32_e32 v3, s39
+; VI-NEXT: v_mov_b32_e32 v4, s40
+; VI-NEXT: v_mov_b32_e32 v5, s41
+; VI-NEXT: v_mov_b32_e32 v6, s42
+; VI-NEXT: v_mov_b32_e32 v7, s43
+; VI-NEXT: v_mov_b32_e32 v8, s44
+; VI-NEXT: v_mov_b32_e32 v9, s45
+; VI-NEXT: v_mov_b32_e32 v10, s46
+; VI-NEXT: v_mov_b32_e32 v11, s47
+; VI-NEXT: v_mov_b32_e32 v12, s48
+; VI-NEXT: v_mov_b32_e32 v13, s49
+; VI-NEXT: v_mov_b32_e32 v14, s50
+; VI-NEXT: v_mov_b32_e32 v15, s51
; VI-NEXT: .LBB109_6: ; %end
-; VI-NEXT: v_readlane_b32 s30, v33, 8
-; VI-NEXT: v_readlane_b32 s31, v33, 9
; VI-NEXT: v_readlane_b32 s51, v33, 7
; VI-NEXT: v_readlane_b32 s50, v33, 6
; VI-NEXT: v_readlane_b32 s49, v33, 5
@@ -228662,110 +230320,113 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB109_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB109_3
; GFX9-NEXT: .LBB109_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB109_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB109_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v16, 0x200
-; GFX9-NEXT: v_pk_add_f16 v15, s31, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v14, s30, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v13, s29, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v12, s28, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v11, s27, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v10, s26, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v9, s25, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v8, s24, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v7, s23, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v6, s22, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v5, s21, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v4, s20, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v3, s19, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v2, s18, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v1, s17, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v0, s16, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v31, s51, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v30, s50, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v29, s49, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v28, s48, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v27, s47, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v26, s46, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v25, s45, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v24, s44, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v23, s43, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v22, s42, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v21, s41, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v20, s40, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v19, s39, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v18, s38, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v17, s37, v16 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_f16 v16, s36, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v15, s51, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v14, s50, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v13, s49, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v12, s48, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v11, s47, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v10, s46, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v9, s45, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v8, s44, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v7, s43, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v6, s42, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v5, s41, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v4, s40, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v3, s39, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v2, s38, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v1, s37, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v0, s36, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v31, s19, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v30, s18, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v29, s17, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v28, s16, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v27, s15, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v26, s14, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v25, s13, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v24, s12, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v23, s11, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v22, s10, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v21, s9, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v20, s8, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v19, s7, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v18, s6, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v17, s5, v16 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_f16 v16, s4, v16 op_sel_hi:[1,0]
; GFX9-NEXT: s_branch .LBB109_6
; GFX9-NEXT: .LBB109_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB109_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
@@ -230138,694 +231799,595 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v32, s99, 33
; SI-NEXT: v_writelane_b32 v32, s30, 34
; SI-NEXT: v_writelane_b32 v32, s31, 35
+; SI-NEXT: v_readfirstlane_b32 s68, v0
+; SI-NEXT: v_readfirstlane_b32 s69, v2
+; SI-NEXT: s_lshr_b32 s14, s68, 16
; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: v_readfirstlane_b32 s71, v4
+; SI-NEXT: s_lshr_b32 s12, s69, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v33, s19, 0
-; SI-NEXT: v_writelane_b32 v33, s4, 1
-; SI-NEXT: s_mov_b32 s72, s18
-; SI-NEXT: v_writelane_b32 v33, s16, 2
-; SI-NEXT: s_mov_b32 s73, s20
-; SI-NEXT: v_writelane_b32 v33, s72, 3
-; SI-NEXT: v_writelane_b32 v33, s73, 4
-; SI-NEXT: v_writelane_b32 v33, s22, 5
-; SI-NEXT: s_lshr_b32 s90, s20, 16
-; SI-NEXT: s_lshr_b32 s95, s19, 16
-; SI-NEXT: s_mov_b32 s93, s17
-; SI-NEXT: s_lshr_b32 s53, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s89, v17
-; SI-NEXT: v_readfirstlane_b32 s20, v16
-; SI-NEXT: v_readfirstlane_b32 s19, v15
-; SI-NEXT: v_readfirstlane_b32 s88, v14
-; SI-NEXT: v_readfirstlane_b32 s79, v13
-; SI-NEXT: v_readfirstlane_b32 s51, v12
-; SI-NEXT: v_readfirstlane_b32 s77, v11
-; SI-NEXT: v_readfirstlane_b32 s78, v10
-; SI-NEXT: v_readfirstlane_b32 s16, v9
-; SI-NEXT: v_readfirstlane_b32 s76, v8
-; SI-NEXT: v_readfirstlane_b32 s17, v7
-; SI-NEXT: v_readfirstlane_b32 s82, v6
-; SI-NEXT: v_readfirstlane_b32 s80, v5
-; SI-NEXT: v_readfirstlane_b32 s81, v4
-; SI-NEXT: v_readfirstlane_b32 s70, v3
-; SI-NEXT: v_readfirstlane_b32 s71, v2
-; SI-NEXT: v_readfirstlane_b32 s50, v1
-; SI-NEXT: v_readfirstlane_b32 s69, v0
-; SI-NEXT: v_writelane_b32 v33, s24, 6
-; SI-NEXT: s_lshr_b32 s39, s29, 16
-; SI-NEXT: s_lshr_b32 s30, s28, 16
-; SI-NEXT: s_lshr_b32 s37, s27, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s26, 16
-; SI-NEXT: s_lshr_b32 s35, s25, 16
-; SI-NEXT: s_lshr_b32 s94, s24, 16
-; SI-NEXT: s_lshr_b32 s31, s23, 16
-; SI-NEXT: s_lshr_b32 s92, s22, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s65, s18, 16
-; SI-NEXT: s_lshr_b32 s99, s89, 16
-; SI-NEXT: s_lshr_b32 s74, s20, 16
-; SI-NEXT: s_lshr_b32 s98, s19, 16
-; SI-NEXT: s_lshr_b32 s18, s88, 16
-; SI-NEXT: s_lshr_b32 s97, s79, 16
-; SI-NEXT: s_lshr_b32 s49, s51, 16
-; SI-NEXT: s_lshr_b32 s96, s77, 16
-; SI-NEXT: s_lshr_b32 s91, s78, 16
-; SI-NEXT: s_lshr_b32 s87, s16, 16
-; SI-NEXT: s_lshr_b32 s68, s76, 16
-; SI-NEXT: s_lshr_b32 s86, s17, 16
-; SI-NEXT: s_lshr_b32 s48, s82, 16
-; SI-NEXT: s_lshr_b32 s85, s80, 16
-; SI-NEXT: s_lshr_b32 s38, s81, 16
-; SI-NEXT: s_lshr_b32 s84, s70, 16
-; SI-NEXT: s_lshr_b32 s36, s71, 16
-; SI-NEXT: s_lshr_b32 s83, s50, 16
-; SI-NEXT: s_lshr_b32 s34, s69, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
-; SI-NEXT: v_writelane_b32 v33, s26, 7
-; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v33, s28, 8
-; SI-NEXT: v_writelane_b32 v33, s74, 9
+; SI-NEXT: v_writelane_b32 v33, s14, 0
+; SI-NEXT: v_readfirstlane_b32 s80, v6
+; SI-NEXT: s_lshr_b32 s10, s71, 16
+; SI-NEXT: v_writelane_b32 v33, s12, 1
+; SI-NEXT: v_readfirstlane_b32 s82, v8
+; SI-NEXT: s_lshr_b32 s8, s80, 16
+; SI-NEXT: v_writelane_b32 v33, s10, 2
+; SI-NEXT: v_readfirstlane_b32 s84, v10
+; SI-NEXT: s_lshr_b32 s6, s82, 16
+; SI-NEXT: v_writelane_b32 v33, s8, 3
+; SI-NEXT: s_lshr_b32 s4, s84, 16
+; SI-NEXT: v_writelane_b32 v33, s6, 4
+; SI-NEXT: v_readfirstlane_b32 s15, v1
+; SI-NEXT: v_writelane_b32 v33, s4, 5
+; SI-NEXT: v_readfirstlane_b32 s13, v3
+; SI-NEXT: v_writelane_b32 v33, s15, 6
+; SI-NEXT: v_readfirstlane_b32 s11, v5
+; SI-NEXT: v_writelane_b32 v33, s13, 7
+; SI-NEXT: v_readfirstlane_b32 s9, v7
+; SI-NEXT: v_writelane_b32 v33, s11, 8
+; SI-NEXT: v_readfirstlane_b32 s7, v9
+; SI-NEXT: v_writelane_b32 v33, s9, 9
+; SI-NEXT: v_readfirstlane_b32 s5, v11
+; SI-NEXT: v_writelane_b32 v33, s7, 10
+; SI-NEXT: v_readfirstlane_b32 s75, v13
+; SI-NEXT: v_readfirstlane_b32 s86, v12
+; SI-NEXT: v_writelane_b32 v33, s5, 11
+; SI-NEXT: s_lshr_b32 s74, s86, 16
+; SI-NEXT: v_writelane_b32 v33, s75, 12
+; SI-NEXT: v_readfirstlane_b32 s72, v15
+; SI-NEXT: v_readfirstlane_b32 s96, v14
+; SI-NEXT: v_writelane_b32 v33, s74, 13
+; SI-NEXT: s_lshr_b32 s73, s96, 16
+; SI-NEXT: v_writelane_b32 v33, s72, 14
+; SI-NEXT: v_readfirstlane_b32 s62, v17
+; SI-NEXT: v_readfirstlane_b32 s98, v16
+; SI-NEXT: v_writelane_b32 v33, s73, 15
+; SI-NEXT: s_mov_b32 s76, s16
+; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
+; SI-NEXT: s_lshr_b32 s99, s28, 16
+; SI-NEXT: s_lshr_b32 s95, s27, 16
+; SI-NEXT: s_lshr_b32 s97, s26, 16
+; SI-NEXT: s_lshr_b32 s93, s25, 16
+; SI-NEXT: s_lshr_b32 s87, s24, 16
+; SI-NEXT: s_lshr_b32 s91, s23, 16
+; SI-NEXT: s_lshr_b32 s85, s22, 16
+; SI-NEXT: s_lshr_b32 s89, s21, 16
+; SI-NEXT: s_lshr_b32 s83, s20, 16
+; SI-NEXT: s_lshr_b32 s79, s19, 16
+; SI-NEXT: s_lshr_b32 s81, s18, 16
+; SI-NEXT: s_lshr_b32 s77, s17, 16
+; SI-NEXT: s_lshr_b32 s70, s16, 16
+; SI-NEXT: s_lshr_b32 s65, s62, 16
+; SI-NEXT: s_lshr_b32 s63, s98, 16
+; SI-NEXT: s_lshr_b32 s55, s72, 16
+; SI-NEXT: s_lshr_b32 s53, s75, 16
+; SI-NEXT: s_lshr_b32 s51, s5, 16
+; SI-NEXT: s_lshr_b32 s49, s7, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s37, s11, 16
+; SI-NEXT: s_lshr_b32 s35, s13, 16
+; SI-NEXT: s_lshr_b32 s31, s15, 16
+; SI-NEXT: v_readfirstlane_b32 s16, v18
+; SI-NEXT: v_writelane_b32 v33, s62, 16
+; SI-NEXT: s_cmp_lg_u32 s16, 0
+; SI-NEXT: v_writelane_b32 v33, s17, 17
+; SI-NEXT: v_writelane_b32 v33, s76, 18
; SI-NEXT: s_cbranch_scc0 .LBB111_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readlane_b32 s7, v33, 1
-; SI-NEXT: s_and_b32 s5, s93, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: v_writelane_b32 v33, s51, 36
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: v_readlane_b32 s5, v33, 0
+; SI-NEXT: s_and_b32 s16, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s77, 16
+; SI-NEXT: s_or_b32 s61, s16, s17
+; SI-NEXT: s_and_b32 s16, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s79, 16
+; SI-NEXT: s_or_b32 s59, s16, s17
+; SI-NEXT: s_and_b32 s16, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s89, 16
+; SI-NEXT: s_or_b32 s57, s16, s17
+; SI-NEXT: s_and_b32 s16, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s91, 16
+; SI-NEXT: s_or_b32 s47, s16, s17
+; SI-NEXT: s_and_b32 s16, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s93, 16
+; SI-NEXT: s_or_b32 s45, s16, s17
+; SI-NEXT: s_and_b32 s16, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s95, 16
+; SI-NEXT: s_or_b32 s43, s16, s17
+; SI-NEXT: s_and_b32 s16, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s17, vcc_hi, 16
+; SI-NEXT: s_or_b32 s41, s16, s17
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s31, 16
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s35, 16
+; SI-NEXT: s_or_b32 s13, s13, s16
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s37, 16
+; SI-NEXT: s_or_b32 s11, s11, s16
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s39, 16
+; SI-NEXT: s_or_b32 s9, s9, s16
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s49, 16
+; SI-NEXT: s_or_b32 s7, s7, s16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s95, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s31, 16
-; SI-NEXT: s_or_b32 s47, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s35, 16
-; SI-NEXT: s_or_b32 s45, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s37, 16
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s39, 16
-; SI-NEXT: s_or_b32 s41, s5, s7
-; SI-NEXT: s_and_b32 s5, s50, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s83, 16
-; SI-NEXT: s_or_b32 s15, s5, s7
-; SI-NEXT: s_and_b32 s5, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s84, 16
-; SI-NEXT: s_or_b32 s13, s5, s7
-; SI-NEXT: s_and_b32 s5, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s85, 16
-; SI-NEXT: s_or_b32 s11, s5, s7
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s86, 16
-; SI-NEXT: s_or_b32 s9, s5, s7
-; SI-NEXT: s_and_b32 s5, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s87, 16
-; SI-NEXT: s_or_b32 s7, s5, s7
-; SI-NEXT: s_and_b32 s5, s77, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s96, 16
-; SI-NEXT: s_or_b32 s5, s5, s62
-; SI-NEXT: s_and_b32 s63, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s97, 16
-; SI-NEXT: s_lshl_b32 s60, s53, 16
+; SI-NEXT: s_lshl_b32 s16, s51, 16
+; SI-NEXT: s_or_b32 s5, s5, s16
+; SI-NEXT: s_and_b32 s16, s75, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s53, 16
; SI-NEXT: s_mov_b32 s66, s53
-; SI-NEXT: s_or_b32 s53, s63, s62
-; SI-NEXT: s_and_b32 s63, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s98, 16
-; SI-NEXT: s_mov_b32 s67, s21
-; SI-NEXT: s_or_b32 s55, s63, s62
-; SI-NEXT: s_and_b32 s21, s89, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s99, 16
-; SI-NEXT: v_writelane_b32 v33, s23, 37
-; SI-NEXT: s_lshl_b32 s58, s65, 16
-; SI-NEXT: s_lshl_b32 s56, s90, 16
-; SI-NEXT: s_lshl_b32 s46, s92, 16
-; SI-NEXT: s_lshl_b32 s44, s94, 16
-; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s40, s30, 16
-; SI-NEXT: s_lshl_b32 s14, s34, 16
-; SI-NEXT: s_lshl_b32 s12, s36, 16
-; SI-NEXT: s_lshl_b32 s10, s38, 16
-; SI-NEXT: s_lshl_b32 s8, s48, 16
-; SI-NEXT: s_mov_b32 s23, s48
-; SI-NEXT: s_mov_b32 s48, s38
-; SI-NEXT: s_mov_b32 s38, s36
-; SI-NEXT: s_mov_b32 s36, s34
-; SI-NEXT: s_mov_b32 s34, s30
-; SI-NEXT: s_mov_b32 s30, vcc_lo
-; SI-NEXT: s_mov_b32 vcc_lo, s99
-; SI-NEXT: s_mov_b32 s99, s98
-; SI-NEXT: s_mov_b32 s98, s97
-; SI-NEXT: s_mov_b32 s97, s96
-; SI-NEXT: s_mov_b32 s96, s87
-; SI-NEXT: s_mov_b32 s87, s94
-; SI-NEXT: s_mov_b32 s94, s86
-; SI-NEXT: s_mov_b32 s86, s85
-; SI-NEXT: s_mov_b32 s85, s84
-; SI-NEXT: s_mov_b32 s84, s83
-; SI-NEXT: s_mov_b32 s83, s92
-; SI-NEXT: s_mov_b32 s92, s90
-; SI-NEXT: s_mov_b32 s90, s65
-; SI-NEXT: s_or_b32 s65, s21, s62
-; SI-NEXT: v_readlane_b32 s21, v33, 2
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_or_b32 s62, s21, s60
+; SI-NEXT: s_or_b32 s53, s16, s17
+; SI-NEXT: s_and_b32 s16, s72, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s55, 16
+; SI-NEXT: s_mov_b32 s67, s55
+; SI-NEXT: s_or_b32 s55, s16, s17
+; SI-NEXT: s_and_b32 s16, s62, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s65, 16
+; SI-NEXT: s_lshl_b32 s60, s70, 16
+; SI-NEXT: s_mov_b32 s17, s65
+; SI-NEXT: s_or_b32 s65, s16, s62
+; SI-NEXT: s_and_b32 s62, s76, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s81, 16
+; SI-NEXT: s_or_b32 s62, s62, s60
+; SI-NEXT: s_mov_b32 s72, s77
+; SI-NEXT: s_lshr_b64 s[76:77], s[60:61], 16
+; SI-NEXT: s_and_b32 s60, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s56, s83, 16
+; SI-NEXT: s_lshl_b32 s52, s74, 16
+; SI-NEXT: s_or_b32 s74, s60, s58
+; SI-NEXT: s_mov_b32 s60, s79
+; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16
+; SI-NEXT: s_and_b32 s58, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s85, 16
+; SI-NEXT: s_mov_b32 s77, s72
+; SI-NEXT: s_or_b32 s72, s58, s56
+; SI-NEXT: s_mov_b32 s58, s89
+; SI-NEXT: s_lshr_b64 s[88:89], s[56:57], 16
+; SI-NEXT: s_and_b32 s56, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s87, 16
+; SI-NEXT: s_mov_b32 s79, s60
+; SI-NEXT: s_or_b32 s60, s56, s46
+; SI-NEXT: s_mov_b32 s56, s91
+; SI-NEXT: s_lshr_b64 s[90:91], s[46:47], 16
+; SI-NEXT: s_and_b32 s46, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s97, 16
+; SI-NEXT: s_mov_b32 s89, s58
+; SI-NEXT: s_or_b32 s58, s46, s44
+; SI-NEXT: s_mov_b32 s46, s93
+; SI-NEXT: s_lshr_b64 s[92:93], s[44:45], 16
+; SI-NEXT: s_and_b32 s44, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s99, 16
+; SI-NEXT: s_mov_b32 s91, s56
+; SI-NEXT: s_or_b32 s56, s44, s42
+; SI-NEXT: s_mov_b32 s44, s95
+; SI-NEXT: s_lshr_b64 s[94:95], s[42:43], 16
+; SI-NEXT: s_and_b32 s42, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_mov_b32 s93, s46
+; SI-NEXT: s_or_b32 s46, s42, s40
+; SI-NEXT: s_mov_b32 s42, vcc_hi
+; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16
+; SI-NEXT: s_and_b32 s40, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_mov_b32 s95, s44
+; SI-NEXT: s_or_b32 s44, s40, s14
+; SI-NEXT: s_mov_b32 s40, s31
+; SI-NEXT: s_lshr_b64 s[30:31], s[14:15], 16
+; SI-NEXT: s_and_b32 s14, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_mov_b32 vcc_hi, s42
+; SI-NEXT: s_or_b32 s42, s14, s12
+; SI-NEXT: s_mov_b32 s14, s35
+; SI-NEXT: s_lshr_b64 s[34:35], s[12:13], 16
+; SI-NEXT: s_and_b32 s12, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_mov_b32 s31, s40
+; SI-NEXT: s_or_b32 s40, s12, s10
+; SI-NEXT: s_mov_b32 s12, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[10:11], 16
+; SI-NEXT: s_and_b32 s10, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_mov_b32 s35, s14
+; SI-NEXT: s_or_b32 s14, s10, s8
+; SI-NEXT: s_mov_b32 s10, s39
+; SI-NEXT: s_lshr_b64 s[38:39], s[8:9], 16
+; SI-NEXT: s_and_b32 s8, s82, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_mov_b32 s37, s12
+; SI-NEXT: s_or_b32 s12, s8, s6
+; SI-NEXT: s_mov_b32 s8, s49
+; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16
+; SI-NEXT: s_and_b32 s6, s84, 0xffff
+; SI-NEXT: s_mov_b32 s39, s10
+; SI-NEXT: s_or_b32 s10, s6, s4
+; SI-NEXT: s_mov_b32 s6, s51
+; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
+; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s54, s73, 16
+; SI-NEXT: s_mov_b32 s49, s8
+; SI-NEXT: s_or_b32 s8, s4, s52
+; SI-NEXT: s_and_b32 s4, s96, 0xffff
+; SI-NEXT: s_lshl_b32 s64, s63, 16
+; SI-NEXT: s_mov_b32 s51, s6
+; SI-NEXT: s_or_b32 s6, s4, s54
+; SI-NEXT: s_and_b32 s4, s98, 0xffff
+; SI-NEXT: s_mov_b32 s16, s63
; SI-NEXT: s_mov_b32 s63, s61
-; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v33, s60, 10
-; SI-NEXT: s_and_b32 s21, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s64, s74, 16
-; SI-NEXT: v_writelane_b32 v33, s61, 11
-; SI-NEXT: s_or_b32 s74, s21, s58
; SI-NEXT: s_mov_b32 s75, s59
-; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v33, s58, 12
-; SI-NEXT: s_and_b32 s21, s73, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s59, 13
-; SI-NEXT: s_or_b32 s72, s21, s56
; SI-NEXT: s_mov_b32 s73, s57
-; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v33, s56, 14
-; SI-NEXT: s_and_b32 s21, s22, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s57, 15
-; SI-NEXT: s_or_b32 s60, s21, s46
; SI-NEXT: s_mov_b32 s61, s47
-; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v33, s46, 16
-; SI-NEXT: s_and_b32 s21, s24, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s47, 17
-; SI-NEXT: s_or_b32 s58, s21, s44
; SI-NEXT: s_mov_b32 s59, s45
-; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v33, s44, 18
-; SI-NEXT: s_and_b32 s21, s26, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s45, 19
-; SI-NEXT: s_or_b32 s56, s21, s42
; SI-NEXT: s_mov_b32 s57, s43
-; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v33, s42, 20
-; SI-NEXT: s_and_b32 s21, s28, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s43, 21
-; SI-NEXT: s_or_b32 s46, s21, s40
; SI-NEXT: s_mov_b32 s47, s41
-; SI-NEXT: s_lshr_b64 s[40:41], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v33, s40, 22
-; SI-NEXT: s_and_b32 s21, s69, 0xffff
-; SI-NEXT: v_writelane_b32 v33, s41, 23
-; SI-NEXT: s_or_b32 s44, s21, s14
; SI-NEXT: s_mov_b32 s45, s15
-; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v33, s14, 24
-; SI-NEXT: v_writelane_b32 v33, s15, 25
-; SI-NEXT: s_and_b32 s14, s71, 0xffff
-; SI-NEXT: s_or_b32 s42, s14, s12
; SI-NEXT: s_mov_b32 s43, s13
-; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v33, s12, 26
-; SI-NEXT: v_writelane_b32 v33, s13, 27
-; SI-NEXT: s_and_b32 s12, s81, 0xffff
-; SI-NEXT: s_or_b32 s40, s12, s10
; SI-NEXT: s_mov_b32 s41, s11
-; SI-NEXT: s_lshr_b64 s[10:11], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v33, s10, 28
-; SI-NEXT: v_writelane_b32 v33, s11, 29
-; SI-NEXT: s_and_b32 s10, s82, 0xffff
-; SI-NEXT: s_or_b32 s14, s10, s8
; SI-NEXT: s_mov_b32 s15, s9
-; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v33, s8, 30
-; SI-NEXT: s_lshl_b32 s6, s68, 16
-; SI-NEXT: v_writelane_b32 v33, s9, 31
-; SI-NEXT: s_and_b32 s8, s76, 0xffff
-; SI-NEXT: s_or_b32 s12, s8, s6
; SI-NEXT: s_mov_b32 s13, s7
-; SI-NEXT: s_lshr_b64 s[6:7], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v33, s6, 32
-; SI-NEXT: s_lshl_b32 s4, s91, 16
-; SI-NEXT: v_writelane_b32 v33, s7, 33
-; SI-NEXT: s_and_b32 s6, s78, 0xffff
-; SI-NEXT: s_or_b32 s10, s6, s4
; SI-NEXT: s_mov_b32 s11, s5
-; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_readlane_b32 s51, v33, 36
-; SI-NEXT: v_writelane_b32 v33, s4, 34
-; SI-NEXT: s_lshl_b32 s52, s49, 16
-; SI-NEXT: v_writelane_b32 v33, s5, 35
-; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s54, s18, 16
-; SI-NEXT: s_or_b32 s8, s4, s52
-; SI-NEXT: s_and_b32 s4, s88, 0xffff
-; SI-NEXT: s_or_b32 s6, s4, s54
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_mov_b32 s9, s53
; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16
+; SI-NEXT: s_mov_b32 s7, s55
+; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
; SI-NEXT: s_or_b32 s4, s4, s64
; SI-NEXT: s_mov_b32 s5, s65
; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16
; SI-NEXT: s_mov_b32 s53, s66
-; SI-NEXT: s_mov_b32 s7, s55
-; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16
-; SI-NEXT: s_mov_b32 s21, s67
-; SI-NEXT: s_mov_b32 s65, s90
-; SI-NEXT: s_mov_b32 s90, s92
-; SI-NEXT: s_mov_b32 s92, s83
-; SI-NEXT: s_mov_b32 s83, s84
-; SI-NEXT: s_mov_b32 s84, s85
-; SI-NEXT: s_mov_b32 s85, s86
-; SI-NEXT: s_mov_b32 s86, s94
-; SI-NEXT: s_mov_b32 s94, s87
-; SI-NEXT: s_mov_b32 s87, s96
-; SI-NEXT: s_mov_b32 s96, s97
-; SI-NEXT: s_mov_b32 s97, s98
-; SI-NEXT: s_mov_b32 s98, s99
-; SI-NEXT: s_mov_b32 s99, vcc_lo
-; SI-NEXT: s_mov_b32 vcc_lo, s30
-; SI-NEXT: s_mov_b32 s30, s34
-; SI-NEXT: s_mov_b32 s34, s36
-; SI-NEXT: s_mov_b32 s36, s38
-; SI-NEXT: s_mov_b32 s38, s48
-; SI-NEXT: s_mov_b32 s48, s23
-; SI-NEXT: v_readlane_b32 s23, v33, 37
+; SI-NEXT: s_mov_b32 s55, s67
+; SI-NEXT: s_mov_b32 s65, s17
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB111_3
; SI-NEXT: .LBB111_2:
-; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b32 s16, s63
; SI-NEXT: s_mov_b64 s[66:67], -1
-; SI-NEXT: v_writelane_b32 v33, s4, 10
-; SI-NEXT: v_writelane_b32 v33, s5, 11
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: v_writelane_b32 v33, s4, 12
-; SI-NEXT: v_writelane_b32 v33, s5, 13
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 14
-; SI-NEXT: v_writelane_b32 v33, s5, 15
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 16
-; SI-NEXT: v_writelane_b32 v33, s5, 17
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 18
-; SI-NEXT: v_writelane_b32 v33, s5, 19
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 20
-; SI-NEXT: v_writelane_b32 v33, s5, 21
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 22
-; SI-NEXT: v_writelane_b32 v33, s5, 23
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 24
-; SI-NEXT: v_writelane_b32 v33, s5, 25
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 26
-; SI-NEXT: v_writelane_b32 v33, s5, 27
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 28
-; SI-NEXT: v_writelane_b32 v33, s5, 29
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 30
-; SI-NEXT: v_writelane_b32 v33, s5, 31
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 32
-; SI-NEXT: v_writelane_b32 v33, s5, 33
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v33, s4, 34
-; SI-NEXT: v_writelane_b32 v33, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: .LBB111_3: ; %Flow
; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: v_readlane_b32 s66, v33, 10
-; SI-NEXT: v_readlane_b32 s67, v33, 11
-; SI-NEXT: s_mov_b32 s22, s66
-; SI-NEXT: v_readlane_b32 s66, v33, 12
-; SI-NEXT: v_readlane_b32 s67, v33, 13
-; SI-NEXT: s_mov_b32 s24, s66
-; SI-NEXT: v_readlane_b32 s66, v33, 14
-; SI-NEXT: v_readlane_b32 s67, v33, 15
-; SI-NEXT: s_mov_b32 s26, s66
-; SI-NEXT: v_readlane_b32 s66, v33, 16
-; SI-NEXT: s_cselect_b32 s55, 1, 0
-; SI-NEXT: v_readlane_b32 s67, v33, 17
-; SI-NEXT: s_cmp_lg_u32 s55, 1
-; SI-NEXT: s_mov_b32 s28, s66
-; SI-NEXT: v_readlane_b32 s66, v33, 18
-; SI-NEXT: v_readlane_b32 s67, v33, 19
+; SI-NEXT: s_cselect_b32 s17, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s17, 1
; SI-NEXT: s_cbranch_scc1 .LBB111_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: v_readlane_b32 s5, v33, 9
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_add_i32 s89, s89, 3
+; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_and_b32 s4, s98, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s16, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s89, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s99, 16
-; SI-NEXT: s_add_i32 s88, s88, 3
+; SI-NEXT: v_readlane_b32 s5, v33, 16
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s65, 16
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s88, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s18, 16
-; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s98, 16
-; SI-NEXT: s_add_i32 s18, s51, 3
+; SI-NEXT: s_add_i32 s96, s96, 3
+; SI-NEXT: v_readlane_b32 s6, v33, 15
+; SI-NEXT: s_and_b32 s7, s96, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: v_readlane_b32 s7, v33, 14
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s55, 16
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s49, 16
-; SI-NEXT: s_add_i32 s79, s79, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s97, 16
-; SI-NEXT: s_add_i32 s78, s78, 3
+; SI-NEXT: s_add_i32 s86, s86, 3
+; SI-NEXT: v_readlane_b32 s8, v33, 13
+; SI-NEXT: s_and_b32 s9, s86, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: v_readlane_b32 s9, v33, 12
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s53, 16
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s78, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s91, 16
-; SI-NEXT: s_add_i32 s77, s77, 3
-; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s77, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s96, 16
-; SI-NEXT: s_add_i32 s76, s76, 3
+; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: v_readlane_b32 s10, v33, 5
+; SI-NEXT: s_and_b32 s11, s84, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_or_b32 s10, s10, s11
+; SI-NEXT: v_readlane_b32 s11, v33, 11
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s51, 16
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s76, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s68, 16
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s13, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s87, 16
; SI-NEXT: s_add_i32 s82, s82, 3
+; SI-NEXT: v_readlane_b32 s12, v33, 4
+; SI-NEXT: s_and_b32 s13, s82, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: v_readlane_b32 s13, v33, 10
+; SI-NEXT: s_add_i32 s13, s13, 3
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s49, 16
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s48, 16
-; SI-NEXT: s_add_i32 s17, s17, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s15, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s86, 16
-; SI-NEXT: s_add_i32 s81, s81, 3
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_and_b32 s16, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s38, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s80, s80, 3
+; SI-NEXT: v_readlane_b32 s14, v33, 3
+; SI-NEXT: s_and_b32 s15, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: v_readlane_b32 s15, v33, 9
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s39, 16
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_add_i32 s71, s71, 3
+; SI-NEXT: v_readlane_b32 s16, v33, 2
+; SI-NEXT: s_and_b32 s17, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s40, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s85, 16
+; SI-NEXT: v_readlane_b32 s16, v33, 8
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s37, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s71, s71, 3
; SI-NEXT: s_add_i32 s41, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s36, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s69, s69, 3
+; SI-NEXT: v_readlane_b32 s16, v33, 1
+; SI-NEXT: s_and_b32 s17, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s42, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s84, 16
+; SI-NEXT: v_readlane_b32 s16, v33, 7
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s35, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s69, s69, 3
; SI-NEXT: s_add_i32 s43, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s34, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s68, s50, 3
+; SI-NEXT: s_add_i32 s68, s68, 3
+; SI-NEXT: v_readlane_b32 s16, v33, 0
+; SI-NEXT: s_and_b32 s17, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_add_i32 s44, s16, 0x30000
-; SI-NEXT: s_and_b32 s16, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s83, 16
+; SI-NEXT: v_readlane_b32 s16, v33, 6
+; SI-NEXT: s_add_i32 s16, s16, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s31, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s45, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 8
-; SI-NEXT: s_add_i32 s28, s16, 3
; SI-NEXT: s_and_b32 s16, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s30, 16
+; SI-NEXT: s_lshl_b32 s17, s99, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s46, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s39, 16
+; SI-NEXT: s_lshl_b32 s17, vcc_hi, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s47, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 7
-; SI-NEXT: s_add_i32 s26, s16, 3
; SI-NEXT: s_and_b32 s16, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s17, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s17, s97, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s56, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s37, 16
+; SI-NEXT: s_lshl_b32 s17, s95, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s57, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 6
-; SI-NEXT: s_add_i32 s24, s16, 3
; SI-NEXT: s_and_b32 s16, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s94, 16
+; SI-NEXT: s_lshl_b32 s17, s87, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s58, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s35, 16
+; SI-NEXT: s_lshl_b32 s17, s93, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s59, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 5
-; SI-NEXT: s_add_i32 s22, s16, 3
; SI-NEXT: s_and_b32 s16, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s92, 16
+; SI-NEXT: s_lshl_b32 s17, s85, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s60, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
+; SI-NEXT: s_lshl_b32 s17, s91, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s61, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 4
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s90, 16
+; SI-NEXT: s_and_b32 s16, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s83, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s72, s16, 0x30000
-; SI-NEXT: s_add_i32 s16, s21, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, vcc_hi, 16
+; SI-NEXT: s_and_b32 s16, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s89, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s73, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 3
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s65, 16
+; SI-NEXT: s_and_b32 s16, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s81, 16
; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s74, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 0
-; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s95, 16
+; SI-NEXT: s_and_b32 s16, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s17, s79, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s75, s16, 0x30000
-; SI-NEXT: v_readlane_b32 s16, v33, 2
+; SI-NEXT: v_readlane_b32 s16, v33, 18
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s53, 16
+; SI-NEXT: s_lshl_b32 s17, s70, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s62, s16, 0x30000
-; SI-NEXT: s_add_i32 s16, s93, 3
-; SI-NEXT: v_readlane_b32 s17, v33, 1
+; SI-NEXT: v_readlane_b32 s16, v33, 17
+; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s17, s77, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s63, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v33, s16, 20
-; SI-NEXT: v_writelane_b32 v33, s17, 21
-; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v33, s16, 22
-; SI-NEXT: v_writelane_b32 v33, s17, 23
-; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v33, s16, 24
-; SI-NEXT: v_writelane_b32 v33, s17, 25
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v33, s16, 26
-; SI-NEXT: v_writelane_b32 v33, s17, 27
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16
-; SI-NEXT: s_add_i32 s14, s14, 0x30000
-; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: v_writelane_b32 v33, s16, 28
-; SI-NEXT: v_writelane_b32 v33, s17, 29
-; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16
-; SI-NEXT: s_add_i32 s12, s12, 0x30000
-; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v33, s16, 30
-; SI-NEXT: v_writelane_b32 v33, s17, 31
-; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16
-; SI-NEXT: s_add_i32 s10, s10, 0x30000
-; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: v_writelane_b32 v33, s16, 32
-; SI-NEXT: v_writelane_b32 v33, s17, 33
-; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: v_writelane_b32 v33, s16, 34
-; SI-NEXT: s_lshr_b64 s[22:23], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[26:27], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[28:29], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[58:59], 16
-; SI-NEXT: v_writelane_b32 v33, s17, 35
+; SI-NEXT: s_add_i32 s10, s10, 0x30000
+; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_add_i32 s12, s12, 0x30000
+; SI-NEXT: s_add_i32 s13, s13, 0x30000
+; SI-NEXT: s_add_i32 s14, s14, 0x30000
+; SI-NEXT: s_add_i32 s15, s15, 0x30000
+; SI-NEXT: s_add_i32 s63, s16, 0x30000
+; SI-NEXT: s_lshr_b64 s[76:77], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16
+; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[54:55], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s16, s63, 16
-; SI-NEXT: s_lshr_b32 s95, s75, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s73, 16
-; SI-NEXT: s_lshr_b32 s31, s61, 16
-; SI-NEXT: s_lshr_b32 s35, s59, 16
-; SI-NEXT: s_lshr_b32 s37, s57, 16
-; SI-NEXT: s_lshr_b32 s39, s47, 16
-; SI-NEXT: s_lshr_b32 s83, s45, 16
-; SI-NEXT: s_lshr_b32 s84, s43, 16
-; SI-NEXT: s_lshr_b32 s85, s41, 16
-; SI-NEXT: s_lshr_b32 s86, s15, 16
-; SI-NEXT: s_lshr_b32 s87, s13, 16
-; SI-NEXT: s_lshr_b32 s96, s11, 16
-; SI-NEXT: s_lshr_b32 s97, s9, 16
-; SI-NEXT: s_lshr_b32 s98, s7, 16
-; SI-NEXT: s_lshr_b32 s99, s5, 16
-; SI-NEXT: v_writelane_b32 v33, s16, 1
+; SI-NEXT: s_lshr_b32 s77, s63, 16
+; SI-NEXT: s_lshr_b32 s79, s75, 16
+; SI-NEXT: s_lshr_b32 s89, s73, 16
+; SI-NEXT: s_lshr_b32 s91, s61, 16
+; SI-NEXT: s_lshr_b32 s93, s59, 16
+; SI-NEXT: s_lshr_b32 s95, s57, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s47, 16
+; SI-NEXT: s_lshr_b32 s31, s45, 16
+; SI-NEXT: s_lshr_b32 s35, s43, 16
+; SI-NEXT: s_lshr_b32 s37, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s15, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s51, s11, 16
+; SI-NEXT: s_lshr_b32 s53, s9, 16
+; SI-NEXT: s_lshr_b32 s55, s7, 16
+; SI-NEXT: s_lshr_b32 s65, s5, 16
; SI-NEXT: .LBB111_5: ; %end
; SI-NEXT: s_and_b32 s16, s62, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s22, 16
-; SI-NEXT: v_readlane_b32 s18, v33, 1
+; SI-NEXT: s_lshl_b32 s17, s76, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_lshl_b32 s18, s77, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s74, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s24, 16
+; SI-NEXT: s_lshl_b32 s19, s78, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s95, 16
+; SI-NEXT: s_lshl_b32 s20, s79, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s72, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s26, 16
+; SI-NEXT: s_lshl_b32 s21, s88, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s73, 0xffff
-; SI-NEXT: s_lshl_b32 s22, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s22, s89, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s60, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s28, 16
+; SI-NEXT: s_lshl_b32 s23, s90, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s31, 16
+; SI-NEXT: s_lshl_b32 s24, s91, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s66, 16
+; SI-NEXT: s_lshl_b32 s25, s92, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s35, 16
-; SI-NEXT: v_readlane_b32 s28, v33, 20
+; SI-NEXT: s_lshl_b32 s26, s93, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s28, 16
-; SI-NEXT: v_readlane_b32 s29, v33, 21
+; SI-NEXT: s_lshl_b32 s27, s94, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s37, 16
-; SI-NEXT: v_readlane_b32 s56, v33, 22
+; SI-NEXT: s_lshl_b32 s28, s95, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s56, 16
+; SI-NEXT: s_lshl_b32 s29, vcc_lo, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s29, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s39, 16
+; SI-NEXT: s_lshl_b32 s46, vcc_hi, 16
; SI-NEXT: s_or_b32 s29, s29, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 24
; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: v_readlane_b32 s47, v33, 25
+; SI-NEXT: s_lshl_b32 s46, s30, 16
; SI-NEXT: s_or_b32 s44, s44, s46
; SI-NEXT: s_and_b32 s45, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s83, 16
+; SI-NEXT: s_lshl_b32 s46, s31, 16
; SI-NEXT: s_or_b32 s45, s45, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 26
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: v_readlane_b32 s47, v33, 27
+; SI-NEXT: s_lshl_b32 s46, s34, 16
; SI-NEXT: s_or_b32 s42, s42, s46
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s84, 16
+; SI-NEXT: s_lshl_b32 s46, s35, 16
; SI-NEXT: s_or_b32 s43, s43, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 28
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: v_readlane_b32 s47, v33, 29
+; SI-NEXT: s_lshl_b32 s46, s36, 16
; SI-NEXT: s_or_b32 s40, s40, s46
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s85, 16
+; SI-NEXT: s_lshl_b32 s46, s37, 16
; SI-NEXT: s_or_b32 s41, s41, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 30
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: v_readlane_b32 s47, v33, 31
+; SI-NEXT: s_lshl_b32 s46, s38, 16
; SI-NEXT: s_or_b32 s14, s14, s46
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s86, 16
+; SI-NEXT: s_lshl_b32 s46, s39, 16
; SI-NEXT: s_or_b32 s15, s15, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 32
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: v_readlane_b32 s47, v33, 33
+; SI-NEXT: s_lshl_b32 s46, s48, 16
; SI-NEXT: s_or_b32 s12, s12, s46
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s87, 16
+; SI-NEXT: s_lshl_b32 s46, s49, 16
; SI-NEXT: s_or_b32 s13, s13, s46
-; SI-NEXT: v_readlane_b32 s46, v33, 34
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s46, s50, 16
; SI-NEXT: s_or_b32 s10, s10, s46
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s96, 16
+; SI-NEXT: s_lshl_b32 s46, s51, 16
; SI-NEXT: s_or_b32 s11, s11, s46
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s46, s52, 16
; SI-NEXT: s_or_b32 s8, s8, s46
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s97, 16
+; SI-NEXT: s_lshl_b32 s46, s53, 16
; SI-NEXT: s_or_b32 s9, s9, s46
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s46, s54, 16
; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s98, 16
+; SI-NEXT: s_lshl_b32 s46, s55, 16
; SI-NEXT: s_or_b32 s7, s7, s46
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s46, s64, 16
; SI-NEXT: s_or_b32 s4, s4, s46
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s99, 16
+; SI-NEXT: s_lshl_b32 s46, s65, 16
; SI-NEXT: s_or_b32 s5, s5, s46
; SI-NEXT: v_readlane_b32 s30, v32, 34
-; SI-NEXT: v_readlane_b32 s57, v33, 23
-; SI-NEXT: v_readlane_b32 s47, v33, 35
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -231167,109 +232729,112 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i
; GFX9-NEXT: v_writelane_b32 v32, s49, 5
; GFX9-NEXT: v_writelane_b32 v32, s50, 6
; GFX9-NEXT: v_writelane_b32 v32, s51, 7
-; GFX9-NEXT: v_writelane_b32 v32, s30, 8
-; GFX9-NEXT: v_writelane_b32 v32, s31, 9
-; GFX9-NEXT: v_readfirstlane_b32 s4, v18
-; GFX9-NEXT: v_readfirstlane_b32 s51, v17
-; GFX9-NEXT: v_readfirstlane_b32 s50, v16
-; GFX9-NEXT: v_readfirstlane_b32 s49, v15
-; GFX9-NEXT: v_readfirstlane_b32 s48, v14
-; GFX9-NEXT: v_readfirstlane_b32 s47, v13
-; GFX9-NEXT: v_readfirstlane_b32 s46, v12
-; GFX9-NEXT: v_readfirstlane_b32 s45, v11
-; GFX9-NEXT: v_readfirstlane_b32 s44, v10
-; GFX9-NEXT: v_readfirstlane_b32 s43, v9
-; GFX9-NEXT: v_readfirstlane_b32 s42, v8
-; GFX9-NEXT: v_readfirstlane_b32 s41, v7
-; GFX9-NEXT: v_readfirstlane_b32 s40, v6
-; GFX9-NEXT: v_readfirstlane_b32 s39, v5
-; GFX9-NEXT: v_readfirstlane_b32 s38, v4
-; GFX9-NEXT: v_readfirstlane_b32 s37, v3
-; GFX9-NEXT: v_readfirstlane_b32 s36, v2
-; GFX9-NEXT: v_readfirstlane_b32 s31, v1
-; GFX9-NEXT: s_cmp_lg_u32 s4, 0
-; GFX9-NEXT: v_readfirstlane_b32 s30, v0
+; GFX9-NEXT: s_mov_b64 s[46:47], s[26:27]
+; GFX9-NEXT: s_mov_b64 s[44:45], s[24:25]
+; GFX9-NEXT: s_mov_b64 s[42:43], s[22:23]
+; GFX9-NEXT: s_mov_b64 s[40:41], s[20:21]
+; GFX9-NEXT: s_mov_b64 s[38:39], s[18:19]
+; GFX9-NEXT: s_mov_b64 s[36:37], s[16:17]
+; GFX9-NEXT: v_readfirstlane_b32 s20, v18
+; GFX9-NEXT: s_mov_b64 s[48:49], s[28:29]
+; GFX9-NEXT: v_readfirstlane_b32 s19, v17
+; GFX9-NEXT: v_readfirstlane_b32 s18, v16
+; GFX9-NEXT: v_readfirstlane_b32 s17, v15
+; GFX9-NEXT: v_readfirstlane_b32 s16, v14
+; GFX9-NEXT: v_readfirstlane_b32 s15, v13
+; GFX9-NEXT: v_readfirstlane_b32 s14, v12
+; GFX9-NEXT: v_readfirstlane_b32 s13, v11
+; GFX9-NEXT: v_readfirstlane_b32 s12, v10
+; GFX9-NEXT: v_readfirstlane_b32 s11, v9
+; GFX9-NEXT: v_readfirstlane_b32 s10, v8
+; GFX9-NEXT: v_readfirstlane_b32 s9, v7
+; GFX9-NEXT: v_readfirstlane_b32 s8, v6
+; GFX9-NEXT: v_readfirstlane_b32 s7, v5
+; GFX9-NEXT: v_readfirstlane_b32 s6, v4
+; GFX9-NEXT: v_readfirstlane_b32 s5, v3
+; GFX9-NEXT: v_readfirstlane_b32 s4, v2
+; GFX9-NEXT: v_readfirstlane_b32 s51, v1
+; GFX9-NEXT: s_cmp_lg_u32 s20, 0
+; GFX9-NEXT: v_readfirstlane_b32 s50, v0
; GFX9-NEXT: s_cbranch_scc0 .LBB111_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: s_mov_b64 s[20:21], 0
; GFX9-NEXT: s_branch .LBB111_3
; GFX9-NEXT: .LBB111_2:
-; GFX9-NEXT: s_mov_b64 s[4:5], -1
+; GFX9-NEXT: s_mov_b64 s[20:21], -1
; GFX9-NEXT: .LBB111_3: ; %Flow
-; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
-; GFX9-NEXT: s_cselect_b32 s4, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: s_and_b64 s[20:21], s[20:21], exec
+; GFX9-NEXT: s_cselect_b32 s20, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s20, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB111_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
-; GFX9-NEXT: v_pk_add_u16 v15, s31, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v14, s30, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v13, s29, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v12, s28, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v11, s27, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v10, s26, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v9, s25, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v7, s23, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v6, s22, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v5, s21, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v4, s20, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v3, s19, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v2, s18, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v31, s51, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v30, s50, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v29, s49, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v28, s48, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v27, s47, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v26, s46, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v25, s45, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v24, s44, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v23, s43, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v22, s42, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v21, s41, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v20, s40, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v19, s39, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v18, s38, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v17, s37, 3 op_sel_hi:[1,0]
-; GFX9-NEXT: v_pk_add_u16 v16, s36, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v15, s51, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v14, s50, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v13, s49, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v12, s48, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v11, s47, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v10, s46, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v9, s45, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v8, s44, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v7, s43, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v6, s42, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v5, s41, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v4, s40, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v3, s39, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v2, s38, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v1, s37, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v0, s36, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v31, s19, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v30, s18, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v29, s17, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v28, s16, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v27, s15, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v26, s14, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v25, s13, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v24, s12, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v23, s11, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v22, s10, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v21, s9, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v20, s8, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v19, s7, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v18, s6, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v17, s5, 3 op_sel_hi:[1,0]
+; GFX9-NEXT: v_pk_add_u16 v16, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT: s_branch .LBB111_6
; GFX9-NEXT: .LBB111_5:
-; GFX9-NEXT: v_mov_b32_e32 v16, s36
-; GFX9-NEXT: v_mov_b32_e32 v17, s37
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v19, s39
-; GFX9-NEXT: v_mov_b32_e32 v20, s40
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v22, s42
-; GFX9-NEXT: v_mov_b32_e32 v23, s43
-; GFX9-NEXT: v_mov_b32_e32 v24, s44
-; GFX9-NEXT: v_mov_b32_e32 v25, s45
-; GFX9-NEXT: v_mov_b32_e32 v26, s46
-; GFX9-NEXT: v_mov_b32_e32 v27, s47
-; GFX9-NEXT: v_mov_b32_e32 v28, s48
-; GFX9-NEXT: v_mov_b32_e32 v29, s49
-; GFX9-NEXT: v_mov_b32_e32 v30, s50
-; GFX9-NEXT: v_mov_b32_e32 v31, s51
-; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: v_mov_b32_e32 v2, s18
-; GFX9-NEXT: v_mov_b32_e32 v3, s19
-; GFX9-NEXT: v_mov_b32_e32 v4, s20
-; GFX9-NEXT: v_mov_b32_e32 v5, s21
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v7, s23
-; GFX9-NEXT: v_mov_b32_e32 v8, s24
-; GFX9-NEXT: v_mov_b32_e32 v9, s25
-; GFX9-NEXT: v_mov_b32_e32 v10, s26
-; GFX9-NEXT: v_mov_b32_e32 v11, s27
-; GFX9-NEXT: v_mov_b32_e32 v12, s28
-; GFX9-NEXT: v_mov_b32_e32 v13, s29
-; GFX9-NEXT: v_mov_b32_e32 v14, s30
-; GFX9-NEXT: v_mov_b32_e32 v15, s31
+; GFX9-NEXT: v_mov_b32_e32 v31, s19
+; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v29, s17
+; GFX9-NEXT: v_mov_b32_e32 v28, s16
+; GFX9-NEXT: v_mov_b32_e32 v27, s15
+; GFX9-NEXT: v_mov_b32_e32 v26, s14
+; GFX9-NEXT: v_mov_b32_e32 v25, s13
+; GFX9-NEXT: v_mov_b32_e32 v24, s12
+; GFX9-NEXT: v_mov_b32_e32 v23, s11
+; GFX9-NEXT: v_mov_b32_e32 v22, s10
+; GFX9-NEXT: v_mov_b32_e32 v21, s9
+; GFX9-NEXT: v_mov_b32_e32 v20, s8
+; GFX9-NEXT: v_mov_b32_e32 v19, s7
+; GFX9-NEXT: v_mov_b32_e32 v18, s6
+; GFX9-NEXT: v_mov_b32_e32 v17, s5
+; GFX9-NEXT: v_mov_b32_e32 v16, s4
+; GFX9-NEXT: v_mov_b32_e32 v0, s36
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_mov_b32_e32 v2, s38
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
+; GFX9-NEXT: v_mov_b32_e32 v4, s40
+; GFX9-NEXT: v_mov_b32_e32 v5, s41
+; GFX9-NEXT: v_mov_b32_e32 v6, s42
+; GFX9-NEXT: v_mov_b32_e32 v7, s43
+; GFX9-NEXT: v_mov_b32_e32 v8, s44
+; GFX9-NEXT: v_mov_b32_e32 v9, s45
+; GFX9-NEXT: v_mov_b32_e32 v10, s46
+; GFX9-NEXT: v_mov_b32_e32 v11, s47
+; GFX9-NEXT: v_mov_b32_e32 v12, s48
+; GFX9-NEXT: v_mov_b32_e32 v13, s49
+; GFX9-NEXT: v_mov_b32_e32 v14, s50
+; GFX9-NEXT: v_mov_b32_e32 v15, s51
; GFX9-NEXT: .LBB111_6: ; %end
-; GFX9-NEXT: v_readlane_b32 s30, v32, 8
-; GFX9-NEXT: v_readlane_b32 s31, v32, 9
; GFX9-NEXT: v_readlane_b32 s51, v32, 7
; GFX9-NEXT: v_readlane_b32 s50, v32, 6
; GFX9-NEXT: v_readlane_b32 s49, v32, 5
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
index b18d1409ad094..554a4b2385197 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
@@ -42031,18 +42031,8 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-LABEL: bitcast_v16bf16_to_v32i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_and_b32 s4, s23, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s23, 16
; SI-NEXT: s_and_b32 s6, s22, 0xffff0000
@@ -42060,67 +42050,83 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-NEXT: s_and_b32 s19, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_cmp_lg_u32 s24, 0
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v24, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v5, 1.0, s17
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s14
; SI-NEXT: v_mul_f32_e64 v32, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s12
; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s8
; SI-NEXT: v_mul_f32_e64 v21, 1.0, s9
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s4
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s7
; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5
; SI-NEXT: s_cbranch_scc0 .LBB109_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v37
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v10
+; SI-NEXT: v_lshr_b64 v[50:51], v[18:19], 16
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v28
; SI-NEXT: v_lshr_b64 v[0:1], v[24:25], 16
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v44
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v57
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4
+; SI-NEXT: v_mov_b32_e32 v7, v52
+; SI-NEXT: v_lshr_b64 v[51:52], v[21:22], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[5:6], 16
+; SI-NEXT: v_mov_b32_e32 v52, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v55
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; SI-NEXT: v_lshr_b64 v[53:54], v[40:41], 16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v52
+; SI-NEXT: v_mov_b32_e32 v2, v4
+; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 24
; SI-NEXT: v_lshr_b64 v[8:9], v[32:33], 16
-; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v46
-; SI-NEXT: v_lshr_b64 v[50:51], v[40:41], 16
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v59
-; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
-; SI-NEXT: v_lshr_b64 v[51:52], v[21:22], 16
-; SI-NEXT: v_lshr_b64 v[53:54], v[42:43], 16
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v58
-; SI-NEXT: v_lshr_b64 v[34:35], v[0:1], 16
+; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v12
+; SI-NEXT: v_mov_b32_e32 v7, v55
; SI-NEXT: v_lshr_b64 v[54:55], v[29:30], 16
+; SI-NEXT: v_mov_b32_e32 v4, v2
+; SI-NEXT: v_lshr_b64 v[34:35], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v2, v10
+; SI-NEXT: v_lshr_b64 v[9:10], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[35:36], v[50:51], 16
+; SI-NEXT: v_mov_b32_e32 v55, v7
+; SI-NEXT: v_mov_b32_e32 v7, v28
+; SI-NEXT: v_lshr_b64 v[27:28], v[53:54], 24
+; SI-NEXT: v_mov_b32_e32 v10, v2
+; SI-NEXT: v_mov_b32_e32 v2, v12
+; SI-NEXT: v_lshr_b64 v[11:12], v[8:9], 24
+; SI-NEXT: v_mov_b32_e32 v28, v7
+; SI-NEXT: v_mov_b32_e32 v7, v37
+; SI-NEXT: v_lshr_b64 v[36:37], v[53:54], 16
; SI-NEXT: v_lshr_b64 v[48:49], v[0:1], 8
+; SI-NEXT: v_mov_b32_e32 v12, v2
; SI-NEXT: v_lshr_b64 v[16:17], v[8:9], 16
; SI-NEXT: v_lshr_b64 v[38:39], v[8:9], 8
; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 24
-; SI-NEXT: v_lshr_b64 v[35:36], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[3:4], v[0:1], 24
-; SI-NEXT: v_lshr_b64 v[11:12], v[8:9], 24
-; SI-NEXT: v_lshr_b64 v[17:18], v[50:51], 8
-; SI-NEXT: v_lshr_b64 v[27:28], v[53:54], 24
-; SI-NEXT: v_lshr_b64 v[36:37], v[53:54], 16
+; SI-NEXT: v_mov_b32_e32 v37, v7
+; SI-NEXT: v_mov_b32_e32 v7, v26
; SI-NEXT: v_lshr_b64 v[25:26], v[53:54], 8
-; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v44
-; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v46
+; SI-NEXT: v_mov_b32_e32 v2, v18
+; SI-NEXT: v_lshr_b64 v[17:18], v[50:51], 8
+; SI-NEXT: v_mov_b32_e32 v26, v7
+; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v4
+; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v1
-; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v56
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v28
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v58
+; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v52
; SI-NEXT: v_lshrrev_b32_e32 v39, 8, v51
; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v54
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB109_3
; SI-NEXT: .LBB109_2:
+; SI-NEXT: v_mov_b32_e32 v2, v18
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr34
@@ -42152,26 +42158,26 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB109_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v59
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v58
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v56
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v26
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
@@ -42180,8 +42186,8 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-NEXT: v_lshr_b64 v[8:9], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v46
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v12
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
@@ -42190,7 +42196,7 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v5
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v23
@@ -42221,18 +42227,9 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v15
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v23
; SI-NEXT: .LBB109_5: ; %end
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: v_mov_b32_e32 v4, v1
; SI-NEXT: v_mov_b32_e32 v12, v9
; SI-NEXT: v_mov_b32_e32 v1, v48
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
index c108fb664ca93..fbd957b45be7b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
@@ -15883,10 +15883,9 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v20i16_to_v40i8:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v9
@@ -15916,13 +15915,13 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr16
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr12
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr11
; VI-NEXT: ; implicit-def: $vgpr42
@@ -15936,6 +15935,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
@@ -15951,16 +15951,15 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v2
; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
; VI-NEXT: v_mov_b32_e32 v32, v1
; VI-NEXT: v_mov_b32_e32 v30, v2
; VI-NEXT: v_mov_b32_e32 v38, v3
; VI-NEXT: v_mov_b32_e32 v36, v4
; VI-NEXT: v_mov_b32_e32 v51, v5
; VI-NEXT: v_mov_b32_e32 v50, v6
-; VI-NEXT: v_mov_b32_e32 v41, v7
+; VI-NEXT: v_mov_b32_e32 v16, v7
; VI-NEXT: v_mov_b32_e32 v40, v8
-; VI-NEXT: v_mov_b32_e32 v43, v9
+; VI-NEXT: v_mov_b32_e32 v41, v9
; VI-NEXT: v_mov_b32_e32 v42, v10
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
@@ -15978,16 +15977,16 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_sdwa v23, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v42, 3, v10
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v17
-; VI-NEXT: v_add_u16_e32 v43, 3, v9
+; VI-NEXT: v_add_u16_e32 v41, 3, v9
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v22
; VI-NEXT: v_add_u16_sdwa v19, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v24, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v40, 3, v8
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v18
-; VI-NEXT: v_add_u16_e32 v41, 3, v7
+; VI-NEXT: v_add_u16_e32 v27, 3, v7
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v23
; VI-NEXT: v_or_b32_e32 v10, v42, v10
-; VI-NEXT: v_or_b32_e32 v9, v43, v9
+; VI-NEXT: v_or_b32_e32 v9, v41, v9
; VI-NEXT: v_add_u16_sdwa v21, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v26, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v20, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
@@ -15997,7 +15996,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v51, 3, v5
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v24
; VI-NEXT: v_or_b32_e32 v8, v40, v8
-; VI-NEXT: v_or_b32_e32 v7, v41, v7
+; VI-NEXT: v_or_b32_e32 v7, v27, v7
; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
; VI-NEXT: v_add_u16_e32 v36, 3, v4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v20
@@ -16017,6 +16016,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v32, v1
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
+; VI-NEXT: v_mov_b32_e32 v16, v27
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
@@ -16066,7 +16066,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v23, v12, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v41, v33, s4
+; VI-NEXT: v_perm_b32 v1, v16, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v18, v35, s4
@@ -16076,7 +16076,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v22, v11, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_perm_b32 v1, v43, v28, s4
+; VI-NEXT: v_perm_b32 v1, v41, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v17, v31, s4
@@ -16085,10 +16085,9 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -16572,16 +16571,10 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-LABEL: bitcast_v20i16_to_v40i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v2, s30, 0
-; SI-NEXT: v_writelane_b32 v2, s31, 1
; SI-NEXT: s_lshr_b32 s90, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
+; SI-NEXT: s_lshr_b32 s73, s24, 16
; SI-NEXT: s_lshr_b32 s91, s23, 16
-; SI-NEXT: s_lshr_b32 s30, s22, 16
+; SI-NEXT: s_lshr_b32 s63, s22, 16
; SI-NEXT: s_lshr_b32 s92, s21, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s20, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
@@ -16610,17 +16603,20 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s25, 0xffff
; SI-NEXT: s_lshl_b32 s15, s90, 16
+; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: s_mov_b32 s62, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
@@ -16630,7 +16626,9 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
-; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: s_mov_b32 s73, s62
+; SI-NEXT: s_mov_b32 s74, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
; SI-NEXT: s_lshr_b32 s59, s13, 8
; SI-NEXT: s_lshr_b32 s47, s11, 8
; SI-NEXT: s_lshr_b32 s43, s9, 8
@@ -16641,9 +16639,8 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_bfe_u32 s45, s92, 0x80008
; SI-NEXT: s_bfe_u32 s41, s91, 0x80008
; SI-NEXT: s_bfe_u32 s15, s90, 0x80008
-; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; SI-NEXT: s_mov_b32 s63, s74
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8
; SI-NEXT: s_mov_b64 s[88:89], 0
@@ -16682,13 +16679,13 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[88:89], s[88:89], exec
-; SI-NEXT: s_cselect_b32 s63, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s63, 1
+; SI-NEXT: s_cselect_b32 s75, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s75, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s25, 0xffff
@@ -16696,7 +16693,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_lshl_b32 s7, s63, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s23, 0xffff
@@ -16885,12 +16882,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v2, 0
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; SI-NEXT: v_readlane_b32 s31, v2, 1
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -18883,25 +18875,24 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v27, s34, 0
; SI-NEXT: v_writelane_b32 v27, s35, 1
-; SI-NEXT: v_writelane_b32 v27, s36, 2
-; SI-NEXT: v_writelane_b32 v27, s37, 3
-; SI-NEXT: v_writelane_b32 v27, s38, 4
-; SI-NEXT: v_writelane_b32 v27, s39, 5
-; SI-NEXT: v_writelane_b32 v27, s30, 6
-; SI-NEXT: v_writelane_b32 v27, s31, 7
+; SI-NEXT: v_writelane_b32 v27, s30, 2
+; SI-NEXT: v_writelane_b32 v27, s31, 3
+; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: v_readfirstlane_b32 s4, v26
+; SI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s90, v25
; SI-NEXT: v_readfirstlane_b32 s91, v24
; SI-NEXT: v_readfirstlane_b32 s93, v23
; SI-NEXT: v_readfirstlane_b32 s95, v22
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v21
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v20
-; SI-NEXT: v_readfirstlane_b32 s30, v19
-; SI-NEXT: v_readfirstlane_b32 s31, v18
+; SI-NEXT: v_readfirstlane_b32 s15, v19
+; SI-NEXT: v_readfirstlane_b32 s41, v18
; SI-NEXT: v_readfirstlane_b32 s74, v17
; SI-NEXT: v_readfirstlane_b32 s75, v16
; SI-NEXT: v_readfirstlane_b32 s77, v15
@@ -18918,144 +18909,150 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s73, v4
; SI-NEXT: v_readfirstlane_b32 s76, v3
; SI-NEXT: v_readfirstlane_b32 s78, v2
-; SI-NEXT: v_readfirstlane_b32 s58, v1
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s59, v0
+; SI-NEXT: v_readfirstlane_b32 s8, v0
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v28, s7, 0
+; SI-NEXT: v_writelane_b32 v28, s8, 1
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_lshl_b32 s5, s17, 8
-; SI-NEXT: s_or_b32 s8, s4, s5
+; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s19, 24
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s24, 0xff
; SI-NEXT: s_lshl_b32 s6, s25, 8
-; SI-NEXT: s_or_b32 s9, s5, s6
+; SI-NEXT: s_or_b32 s10, s5, s6
; SI-NEXT: s_and_b32 s5, s26, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s27, 24
; SI-NEXT: s_or_b32 s6, s6, s5
; SI-NEXT: s_and_b32 s5, s78, 0xff
-; SI-NEXT: s_lshl_b32 s7, s76, 8
-; SI-NEXT: s_or_b32 s10, s5, s7
+; SI-NEXT: s_lshl_b32 s11, s76, 8
+; SI-NEXT: s_or_b32 s11, s5, s11
; SI-NEXT: s_and_b32 s5, s73, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s72, 24
-; SI-NEXT: s_or_b32 s42, s7, s5
+; SI-NEXT: s_lshl_b32 s12, s72, 24
+; SI-NEXT: s_or_b32 s42, s12, s5
; SI-NEXT: s_and_b32 s5, s94, 0xff
-; SI-NEXT: s_lshl_b32 s7, s92, 8
-; SI-NEXT: s_or_b32 s11, s5, s7
+; SI-NEXT: s_lshl_b32 s12, s92, 8
+; SI-NEXT: s_or_b32 s12, s5, s12
; SI-NEXT: s_and_b32 s5, s89, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s88, 24
-; SI-NEXT: s_or_b32 s44, s7, s5
-; SI-NEXT: s_and_b32 s5, s31, 0xff
-; SI-NEXT: s_lshl_b32 s7, s30, 8
-; SI-NEXT: s_or_b32 s12, s5, s7
+; SI-NEXT: s_lshl_b32 s13, s88, 24
+; SI-NEXT: s_or_b32 s44, s13, s5
+; SI-NEXT: s_and_b32 s5, s41, 0xff
+; SI-NEXT: s_lshl_b32 s13, s15, 8
+; SI-NEXT: s_or_b32 s13, s5, s13
; SI-NEXT: s_and_b32 s5, s20, 0xff
-; SI-NEXT: s_lshl_b32 s7, s21, 8
-; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: s_and_b32 s7, s22, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s13, s23, 24
-; SI-NEXT: s_or_b32 s56, s13, s7
-; SI-NEXT: s_and_b32 s7, s28, 0xff
-; SI-NEXT: s_lshl_b32 s13, s29, 8
-; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s59, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s58, 24
-; SI-NEXT: s_or_b32 s57, s14, s13
-; SI-NEXT: s_and_b32 s13, s63, 0xff
+; SI-NEXT: s_lshl_b32 s14, s21, 8
+; SI-NEXT: s_or_b32 s5, s5, s14
+; SI-NEXT: s_and_b32 s14, s22, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s40, s23, 24
+; SI-NEXT: s_or_b32 s56, s40, s14
+; SI-NEXT: s_and_b32 s14, s28, 0xff
+; SI-NEXT: s_lshl_b32 s40, s29, 8
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_or_b32 s14, s14, s40
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_or_b32 s57, s7, s8
+; SI-NEXT: s_or_b32 s7, s14, s57
+; SI-NEXT: s_and_b32 s8, s63, 0xff
; SI-NEXT: s_lshl_b32 s14, s62, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s61, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s60, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s34, s15, s14
-; SI-NEXT: s_or_b32 s43, s13, s34
-; SI-NEXT: s_and_b32 s13, s79, 0xff
+; SI-NEXT: s_lshl_b32 s40, s60, 24
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s58, s40, s14
+; SI-NEXT: s_or_b32 s43, s8, s58
+; SI-NEXT: s_and_b32 s8, s79, 0xff
; SI-NEXT: s_lshl_b32 s14, s77, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s75, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s74, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s35, s15, s14
-; SI-NEXT: s_or_b32 s45, s13, s35
-; SI-NEXT: s_and_b32 s13, s95, 0xff
+; SI-NEXT: s_lshl_b32 s40, s74, 24
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s59, s40, s14
+; SI-NEXT: s_or_b32 s45, s8, s59
+; SI-NEXT: s_and_b32 s8, s95, 0xff
; SI-NEXT: s_lshl_b32 s14, s93, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s91, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s90, 24
-; SI-NEXT: s_or_b32 s36, s15, s14
-; SI-NEXT: s_and_b32 s14, vcc_hi, 0xff
+; SI-NEXT: s_lshl_b32 s40, s90, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, vcc_lo, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s5, s5, s56
-; SI-NEXT: s_or_b32 s7, s7, s57
-; SI-NEXT: s_or_b32 s46, s15, s14
-; SI-NEXT: s_or_b32 s47, s13, s36
+; SI-NEXT: s_or_b32 s30, s40, s14
+; SI-NEXT: s_and_b32 s14, vcc_hi, 0xff
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_and_b32 s37, s10, 0xffff
-; SI-NEXT: s_and_b32 s38, s11, 0xffff
-; SI-NEXT: s_and_b32 s39, s12, 0xffff
+; SI-NEXT: s_or_b32 s5, s5, s56
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s40, vcc_lo, 24
+; SI-NEXT: s_or_b32 s47, s8, s30
+; SI-NEXT: s_and_b32 s8, s9, 0xffff
+; SI-NEXT: s_or_b32 s46, s40, s14
+; SI-NEXT: s_and_b32 s9, s10, 0xffff
+; SI-NEXT: s_and_b32 s31, s11, 0xffff
+; SI-NEXT: s_and_b32 s34, s12, 0xffff
+; SI-NEXT: s_and_b32 s35, s13, 0xffff
; SI-NEXT: s_or_b32 s12, s8, s4
-; SI-NEXT: s_mov_b32 s13, s5
+; SI-NEXT: s_mov_b32 s8, s15
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_mov_b32 s4, s41
+; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
+; SI-NEXT: s_mov_b32 s13, s5
+; SI-NEXT: s_mov_b32 s15, s8
; SI-NEXT: s_or_b32 s10, s9, s6
; SI-NEXT: s_mov_b32 s11, s7
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_or_b32 s8, s37, s42
+; SI-NEXT: s_mov_b32 s41, s4
+; SI-NEXT: s_or_b32 s8, s31, s42
; SI-NEXT: s_mov_b32 s9, s43
; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16
-; SI-NEXT: s_or_b32 s6, s38, s44
+; SI-NEXT: s_or_b32 s6, s34, s44
; SI-NEXT: s_mov_b32 s7, s45
; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16
-; SI-NEXT: s_or_b32 s4, s39, s46
+; SI-NEXT: s_or_b32 s4, s35, s46
; SI-NEXT: s_mov_b32 s5, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16
-; SI-NEXT: s_lshr_b32 s41, s56, 16
-; SI-NEXT: s_lshr_b32 s43, s57, 16
-; SI-NEXT: s_lshr_b32 s45, s34, 16
-; SI-NEXT: s_lshr_b32 s47, s35, 16
-; SI-NEXT: s_lshr_b32 s15, s36, 16
+; SI-NEXT: s_lshr_b32 s45, s56, 16
+; SI-NEXT: s_lshr_b32 s47, s57, 16
+; SI-NEXT: s_lshr_b32 s58, s58, 16
+; SI-NEXT: s_lshr_b32 s59, s59, 16
+; SI-NEXT: s_lshr_b32 s43, s30, 16
; SI-NEXT: s_mov_b64 s[56:57], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
; SI-NEXT: s_mov_b64 s[56:57], -1
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: .LBB51_3: ; %Flow
; SI-NEXT: s_and_b64 s[56:57], s[56:57], exec
; SI-NEXT: s_cselect_b32 s56, 1, 0
; SI-NEXT: s_cmp_lg_u32 s56, 1
; SI-NEXT: s_cbranch_scc1 .LBB51_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s31, s31, 3
-; SI-NEXT: s_and_b32 s4, s31, 0xff
-; SI-NEXT: s_lshl_b32 s5, s30, 8
+; SI-NEXT: s_add_i32 s4, s41, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s15, 8
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
@@ -19140,16 +19137,18 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s28, 0xff
; SI-NEXT: s_lshl_b32 s12, s29, 8
-; SI-NEXT: s_add_i32 s59, s59, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s13, s59, 0xff
; SI-NEXT: s_addk_i32 s11, 0x300
-; SI-NEXT: s_lshl_b32 s12, s58, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: s_and_b32 s12, s11, 0xffff
+; SI-NEXT: v_readlane_b32 s11, v28, 0
+; SI-NEXT: s_lshl_b32 s13, s11, 24
+; SI-NEXT: v_readlane_b32 s11, v28, 1
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_or_b32 s11, s13, s11
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s12, s16, 0xff
; SI-NEXT: s_lshl_b32 s13, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -19172,59 +19171,59 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s7, s7, 0x3000000
; SI-NEXT: s_add_i32 s8, s8, 0x3000000
; SI-NEXT: s_add_i32 s9, s9, 0x3000000
+; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_add_i32 s10, s10, 0x3000000
; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
-; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s41, s13, 16
-; SI-NEXT: s_lshr_b32 s43, s11, 16
-; SI-NEXT: s_lshr_b32 s45, s9, 16
-; SI-NEXT: s_lshr_b32 s47, s7, 16
-; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s45, s13, 16
+; SI-NEXT: s_lshr_b32 s47, s11, 16
+; SI-NEXT: s_lshr_b32 s58, s9, 16
+; SI-NEXT: s_lshr_b32 s59, s7, 16
+; SI-NEXT: s_lshr_b32 s43, s5, 16
; SI-NEXT: .LBB51_5: ; %end
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s41, 16
+; SI-NEXT: s_lshl_b32 s14, s45, 16
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s14, s40, 16
; SI-NEXT: s_or_b32 s10, s10, s14
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s43, 16
+; SI-NEXT: s_lshl_b32 s14, s47, 16
; SI-NEXT: s_or_b32 s11, s11, s14
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s14, s42, 16
; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s45, 16
+; SI-NEXT: s_lshl_b32 s14, s58, 16
; SI-NEXT: s_or_b32 s9, s9, s14
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s14, s44, 16
; SI-NEXT: s_or_b32 s6, s6, s14
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s47, 16
+; SI-NEXT: s_lshl_b32 s14, s59, 16
; SI-NEXT: s_or_b32 s7, s7, s14
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s14, s46, 16
; SI-NEXT: s_or_b32 s4, s4, s14
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s15, 16
+; SI-NEXT: s_lshl_b32 s14, s43, 16
; SI-NEXT: s_or_b32 s5, s5, s14
-; SI-NEXT: v_readlane_b32 s30, v27, 6
+; SI-NEXT: v_readlane_b32 s30, v27, 2
; SI-NEXT: v_mov_b32_e32 v0, s12
; SI-NEXT: v_mov_b32_e32 v1, s13
; SI-NEXT: v_mov_b32_e32 v2, s10
@@ -19235,15 +19234,12 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v7, s7
; SI-NEXT: v_mov_b32_e32 v8, s4
; SI-NEXT: v_mov_b32_e32 v9, s5
-; SI-NEXT: v_readlane_b32 s31, v27, 7
-; SI-NEXT: v_readlane_b32 s39, v27, 5
-; SI-NEXT: v_readlane_b32 s38, v27, 4
-; SI-NEXT: v_readlane_b32 s37, v27, 3
-; SI-NEXT: v_readlane_b32 s36, v27, 2
+; SI-NEXT: v_readlane_b32 s31, v27, 3
; SI-NEXT: v_readlane_b32 s35, v27, 1
; SI-NEXT: v_readlane_b32 s34, v27, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -22946,14 +22942,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-LABEL: bitcast_v20f16_to_v40i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v12, s30, 0
-; SI-NEXT: v_writelane_b32 v12, s31, 1
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
+; SI-NEXT: s_lshr_b32 s45, s25, 16
+; SI-NEXT: s_lshr_b32 s47, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
; SI-NEXT: s_lshr_b32 s94, s21, 16
@@ -22977,12 +22967,18 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s11, s4, s5
+; SI-NEXT: s_mov_b32 s4, s47
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_mov_b32 s47, s4
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s94, 16
; SI-NEXT: s_or_b32 s9, s4, s5
+; SI-NEXT: s_mov_b32 s4, s45
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
+; SI-NEXT: s_mov_b32 s45, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s6, s4, s5
@@ -22991,33 +22987,33 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s47, 16
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s30, 16
+; SI-NEXT: s_lshl_b32 s15, s45, 16
+; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: s_bfe_u32 s72, vcc_lo, 0x80008
+; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
-; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: s_bfe_u32 s74, s45, 0x80008
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
; SI-NEXT: s_lshr_b32 s43, s13, 8
; SI-NEXT: s_lshr_b32 s41, s11, 8
; SI-NEXT: s_lshr_b32 s29, s9, 8
; SI-NEXT: s_lshr_b32 s27, s7, 8
; SI-NEXT: s_lshr_b32 s15, s5, 8
-; SI-NEXT: s_bfe_u32 s45, s90, 0x80008
-; SI-NEXT: s_bfe_u32 s47, s92, 0x80008
-; SI-NEXT: s_bfe_u32 s57, s94, 0x80008
-; SI-NEXT: s_bfe_u32 s59, vcc_lo, 0x80008
-; SI-NEXT: s_bfe_u32 s61, s30, 0x80008
-; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
+; SI-NEXT: s_bfe_u32 s57, s90, 0x80008
+; SI-NEXT: s_bfe_u32 s59, s92, 0x80008
+; SI-NEXT: s_bfe_u32 s61, s94, 0x80008
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
+; SI-NEXT: s_mov_b32 s73, s74
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8
; SI-NEXT: s_mov_b64 s[88:89], 0
@@ -23029,40 +23025,40 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr26
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr28
; SI-NEXT: ; implicit-def: $sgpr41
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr29
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr27
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: .LBB61_3: ; %Flow
; SI-NEXT: s_and_b64 s[88:89], s[88:89], exec
-; SI-NEXT: s_cselect_b32 s63, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s63, 1
+; SI-NEXT: s_cselect_b32 s75, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s75, 1
; SI-NEXT: s_cbranch_scc1 .LBB61_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v2, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s31
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s47
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s45
; SI-NEXT: v_cvt_f32_f16_e32 v7, s16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -23187,16 +23183,16 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: v_bfe_u32 v5, v1, 8, 8
; SI-NEXT: s_branch .LBB61_6
; SI-NEXT: .LBB61_5:
-; SI-NEXT: v_mov_b32_e32 v1, s30
+; SI-NEXT: v_mov_b32_e32 v1, s45
; SI-NEXT: v_mov_b32_e32 v2, vcc_lo
; SI-NEXT: v_mov_b32_e32 v3, s94
; SI-NEXT: v_mov_b32_e32 v4, s92
; SI-NEXT: v_mov_b32_e32 v7, s90
-; SI-NEXT: v_mov_b32_e32 v5, s61
-; SI-NEXT: v_mov_b32_e32 v6, s59
-; SI-NEXT: v_mov_b32_e32 v8, s57
-; SI-NEXT: v_mov_b32_e32 v9, s47
-; SI-NEXT: v_mov_b32_e32 v10, s45
+; SI-NEXT: v_mov_b32_e32 v5, s73
+; SI-NEXT: v_mov_b32_e32 v6, s63
+; SI-NEXT: v_mov_b32_e32 v8, s61
+; SI-NEXT: v_mov_b32_e32 v9, s59
+; SI-NEXT: v_mov_b32_e32 v10, s57
; SI-NEXT: .LBB61_6: ; %end
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s16, s40, 8
@@ -23309,13 +23305,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_readlane_b32 s30, v12, 0
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
-; SI-NEXT: v_readlane_b32 s31, v12, 1
-; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -25322,25 +25313,24 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v27, s34, 0
; SI-NEXT: v_writelane_b32 v27, s35, 1
-; SI-NEXT: v_writelane_b32 v27, s36, 2
-; SI-NEXT: v_writelane_b32 v27, s37, 3
-; SI-NEXT: v_writelane_b32 v27, s38, 4
-; SI-NEXT: v_writelane_b32 v27, s39, 5
-; SI-NEXT: v_writelane_b32 v27, s30, 6
-; SI-NEXT: v_writelane_b32 v27, s31, 7
+; SI-NEXT: v_writelane_b32 v27, s30, 2
+; SI-NEXT: v_writelane_b32 v27, s31, 3
+; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: v_readfirstlane_b32 s4, v26
+; SI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; SI-NEXT: v_readfirstlane_b32 s90, v25
; SI-NEXT: v_readfirstlane_b32 s91, v24
; SI-NEXT: v_readfirstlane_b32 s93, v23
; SI-NEXT: v_readfirstlane_b32 s95, v22
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v21
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v20
-; SI-NEXT: v_readfirstlane_b32 s30, v19
-; SI-NEXT: v_readfirstlane_b32 s31, v18
+; SI-NEXT: v_readfirstlane_b32 s15, v19
+; SI-NEXT: v_readfirstlane_b32 s41, v18
; SI-NEXT: v_readfirstlane_b32 s74, v17
; SI-NEXT: v_readfirstlane_b32 s75, v16
; SI-NEXT: v_readfirstlane_b32 s77, v15
@@ -25357,144 +25347,150 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s73, v4
; SI-NEXT: v_readfirstlane_b32 s76, v3
; SI-NEXT: v_readfirstlane_b32 s78, v2
-; SI-NEXT: v_readfirstlane_b32 s58, v1
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s59, v0
+; SI-NEXT: v_readfirstlane_b32 s8, v0
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v28, s7, 0
+; SI-NEXT: v_writelane_b32 v28, s8, 1
; SI-NEXT: s_cbranch_scc0 .LBB63_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xff
; SI-NEXT: s_lshl_b32 s5, s17, 8
-; SI-NEXT: s_or_b32 s8, s4, s5
+; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s5, s19, 24
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s24, 0xff
; SI-NEXT: s_lshl_b32 s6, s25, 8
-; SI-NEXT: s_or_b32 s9, s5, s6
+; SI-NEXT: s_or_b32 s10, s5, s6
; SI-NEXT: s_and_b32 s5, s26, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s27, 24
; SI-NEXT: s_or_b32 s6, s6, s5
; SI-NEXT: s_and_b32 s5, s78, 0xff
-; SI-NEXT: s_lshl_b32 s7, s76, 8
-; SI-NEXT: s_or_b32 s10, s5, s7
+; SI-NEXT: s_lshl_b32 s11, s76, 8
+; SI-NEXT: s_or_b32 s11, s5, s11
; SI-NEXT: s_and_b32 s5, s73, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s72, 24
-; SI-NEXT: s_or_b32 s42, s7, s5
+; SI-NEXT: s_lshl_b32 s12, s72, 24
+; SI-NEXT: s_or_b32 s42, s12, s5
; SI-NEXT: s_and_b32 s5, s94, 0xff
-; SI-NEXT: s_lshl_b32 s7, s92, 8
-; SI-NEXT: s_or_b32 s11, s5, s7
+; SI-NEXT: s_lshl_b32 s12, s92, 8
+; SI-NEXT: s_or_b32 s12, s5, s12
; SI-NEXT: s_and_b32 s5, s89, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s88, 24
-; SI-NEXT: s_or_b32 s44, s7, s5
-; SI-NEXT: s_and_b32 s5, s31, 0xff
-; SI-NEXT: s_lshl_b32 s7, s30, 8
-; SI-NEXT: s_or_b32 s12, s5, s7
+; SI-NEXT: s_lshl_b32 s13, s88, 24
+; SI-NEXT: s_or_b32 s44, s13, s5
+; SI-NEXT: s_and_b32 s5, s41, 0xff
+; SI-NEXT: s_lshl_b32 s13, s15, 8
+; SI-NEXT: s_or_b32 s13, s5, s13
; SI-NEXT: s_and_b32 s5, s20, 0xff
-; SI-NEXT: s_lshl_b32 s7, s21, 8
-; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: s_and_b32 s7, s22, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s13, s23, 24
-; SI-NEXT: s_or_b32 s56, s13, s7
-; SI-NEXT: s_and_b32 s7, s28, 0xff
-; SI-NEXT: s_lshl_b32 s13, s29, 8
-; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s59, 0xff
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s14, s58, 24
-; SI-NEXT: s_or_b32 s57, s14, s13
-; SI-NEXT: s_and_b32 s13, s63, 0xff
+; SI-NEXT: s_lshl_b32 s14, s21, 8
+; SI-NEXT: s_or_b32 s5, s5, s14
+; SI-NEXT: s_and_b32 s14, s22, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s40, s23, 24
+; SI-NEXT: s_or_b32 s56, s40, s14
+; SI-NEXT: s_and_b32 s14, s28, 0xff
+; SI-NEXT: s_lshl_b32 s40, s29, 8
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_or_b32 s14, s14, s40
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_and_b32 s14, s14, 0xffff
+; SI-NEXT: s_or_b32 s57, s7, s8
+; SI-NEXT: s_or_b32 s7, s14, s57
+; SI-NEXT: s_and_b32 s8, s63, 0xff
; SI-NEXT: s_lshl_b32 s14, s62, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s61, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s60, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s34, s15, s14
-; SI-NEXT: s_or_b32 s43, s13, s34
-; SI-NEXT: s_and_b32 s13, s79, 0xff
+; SI-NEXT: s_lshl_b32 s40, s60, 24
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s58, s40, s14
+; SI-NEXT: s_or_b32 s43, s8, s58
+; SI-NEXT: s_and_b32 s8, s79, 0xff
; SI-NEXT: s_lshl_b32 s14, s77, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s75, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s74, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s35, s15, s14
-; SI-NEXT: s_or_b32 s45, s13, s35
-; SI-NEXT: s_and_b32 s13, s95, 0xff
+; SI-NEXT: s_lshl_b32 s40, s74, 24
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s59, s40, s14
+; SI-NEXT: s_or_b32 s45, s8, s59
+; SI-NEXT: s_and_b32 s8, s95, 0xff
; SI-NEXT: s_lshl_b32 s14, s93, 8
-; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s14, s91, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, s90, 24
-; SI-NEXT: s_or_b32 s36, s15, s14
-; SI-NEXT: s_and_b32 s14, vcc_hi, 0xff
+; SI-NEXT: s_lshl_b32 s40, s90, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
-; SI-NEXT: s_lshl_b32 s15, vcc_lo, 24
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s5, s5, s56
-; SI-NEXT: s_or_b32 s7, s7, s57
-; SI-NEXT: s_or_b32 s46, s15, s14
-; SI-NEXT: s_or_b32 s47, s13, s36
+; SI-NEXT: s_or_b32 s30, s40, s14
+; SI-NEXT: s_and_b32 s14, vcc_hi, 0xff
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_and_b32 s37, s10, 0xffff
-; SI-NEXT: s_and_b32 s38, s11, 0xffff
-; SI-NEXT: s_and_b32 s39, s12, 0xffff
+; SI-NEXT: s_or_b32 s5, s5, s56
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s40, vcc_lo, 24
+; SI-NEXT: s_or_b32 s47, s8, s30
+; SI-NEXT: s_and_b32 s8, s9, 0xffff
+; SI-NEXT: s_or_b32 s46, s40, s14
+; SI-NEXT: s_and_b32 s9, s10, 0xffff
+; SI-NEXT: s_and_b32 s31, s11, 0xffff
+; SI-NEXT: s_and_b32 s34, s12, 0xffff
+; SI-NEXT: s_and_b32 s35, s13, 0xffff
; SI-NEXT: s_or_b32 s12, s8, s4
-; SI-NEXT: s_mov_b32 s13, s5
+; SI-NEXT: s_mov_b32 s8, s15
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_mov_b32 s4, s41
+; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
+; SI-NEXT: s_mov_b32 s13, s5
+; SI-NEXT: s_mov_b32 s15, s8
; SI-NEXT: s_or_b32 s10, s9, s6
; SI-NEXT: s_mov_b32 s11, s7
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_or_b32 s8, s37, s42
+; SI-NEXT: s_mov_b32 s41, s4
+; SI-NEXT: s_or_b32 s8, s31, s42
; SI-NEXT: s_mov_b32 s9, s43
; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16
-; SI-NEXT: s_or_b32 s6, s38, s44
+; SI-NEXT: s_or_b32 s6, s34, s44
; SI-NEXT: s_mov_b32 s7, s45
; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16
-; SI-NEXT: s_or_b32 s4, s39, s46
+; SI-NEXT: s_or_b32 s4, s35, s46
; SI-NEXT: s_mov_b32 s5, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16
-; SI-NEXT: s_lshr_b32 s41, s56, 16
-; SI-NEXT: s_lshr_b32 s43, s57, 16
-; SI-NEXT: s_lshr_b32 s45, s34, 16
-; SI-NEXT: s_lshr_b32 s47, s35, 16
-; SI-NEXT: s_lshr_b32 s15, s36, 16
+; SI-NEXT: s_lshr_b32 s45, s56, 16
+; SI-NEXT: s_lshr_b32 s47, s57, 16
+; SI-NEXT: s_lshr_b32 s58, s58, 16
+; SI-NEXT: s_lshr_b32 s59, s59, 16
+; SI-NEXT: s_lshr_b32 s43, s30, 16
; SI-NEXT: s_mov_b64 s[56:57], 0
; SI-NEXT: s_branch .LBB63_3
; SI-NEXT: .LBB63_2:
; SI-NEXT: s_mov_b64 s[56:57], -1
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: .LBB63_3: ; %Flow
; SI-NEXT: s_and_b64 s[56:57], s[56:57], exec
; SI-NEXT: s_cselect_b32 s56, 1, 0
; SI-NEXT: s_cmp_lg_u32 s56, 1
; SI-NEXT: s_cbranch_scc1 .LBB63_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s31, s31, 3
-; SI-NEXT: s_and_b32 s4, s31, 0xff
-; SI-NEXT: s_lshl_b32 s5, s30, 8
+; SI-NEXT: s_add_i32 s4, s41, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s15, 8
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
@@ -25579,16 +25575,18 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s28, 0xff
; SI-NEXT: s_lshl_b32 s12, s29, 8
-; SI-NEXT: s_add_i32 s59, s59, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s13, s59, 0xff
; SI-NEXT: s_addk_i32 s11, 0x300
-; SI-NEXT: s_lshl_b32 s12, s58, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: s_and_b32 s12, s11, 0xffff
+; SI-NEXT: v_readlane_b32 s11, v28, 0
+; SI-NEXT: s_lshl_b32 s13, s11, 24
+; SI-NEXT: v_readlane_b32 s11, v28, 1
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_or_b32 s11, s13, s11
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: s_and_b32 s12, s16, 0xff
; SI-NEXT: s_lshl_b32 s13, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
@@ -25611,59 +25609,59 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s7, s7, 0x3000000
; SI-NEXT: s_add_i32 s8, s8, 0x3000000
; SI-NEXT: s_add_i32 s9, s9, 0x3000000
+; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_add_i32 s10, s10, 0x3000000
; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
-; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s41, s13, 16
-; SI-NEXT: s_lshr_b32 s43, s11, 16
-; SI-NEXT: s_lshr_b32 s45, s9, 16
-; SI-NEXT: s_lshr_b32 s47, s7, 16
-; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s45, s13, 16
+; SI-NEXT: s_lshr_b32 s47, s11, 16
+; SI-NEXT: s_lshr_b32 s58, s9, 16
+; SI-NEXT: s_lshr_b32 s59, s7, 16
+; SI-NEXT: s_lshr_b32 s43, s5, 16
; SI-NEXT: .LBB63_5: ; %end
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_or_b32 s12, s12, s14
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s41, 16
+; SI-NEXT: s_lshl_b32 s14, s45, 16
; SI-NEXT: s_or_b32 s13, s13, s14
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s14, s40, 16
; SI-NEXT: s_or_b32 s10, s10, s14
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s43, 16
+; SI-NEXT: s_lshl_b32 s14, s47, 16
; SI-NEXT: s_or_b32 s11, s11, s14
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s14, s42, 16
; SI-NEXT: s_or_b32 s8, s8, s14
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s45, 16
+; SI-NEXT: s_lshl_b32 s14, s58, 16
; SI-NEXT: s_or_b32 s9, s9, s14
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s14, s44, 16
; SI-NEXT: s_or_b32 s6, s6, s14
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s47, 16
+; SI-NEXT: s_lshl_b32 s14, s59, 16
; SI-NEXT: s_or_b32 s7, s7, s14
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s14, s46, 16
; SI-NEXT: s_or_b32 s4, s4, s14
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s15, 16
+; SI-NEXT: s_lshl_b32 s14, s43, 16
; SI-NEXT: s_or_b32 s5, s5, s14
-; SI-NEXT: v_readlane_b32 s30, v27, 6
+; SI-NEXT: v_readlane_b32 s30, v27, 2
; SI-NEXT: v_mov_b32_e32 v0, s12
; SI-NEXT: v_mov_b32_e32 v1, s13
; SI-NEXT: v_mov_b32_e32 v2, s10
@@ -25674,15 +25672,12 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v7, s7
; SI-NEXT: v_mov_b32_e32 v8, s4
; SI-NEXT: v_mov_b32_e32 v9, s5
-; SI-NEXT: v_readlane_b32 s31, v27, 7
-; SI-NEXT: v_readlane_b32 s39, v27, 5
-; SI-NEXT: v_readlane_b32 s38, v27, 4
-; SI-NEXT: v_readlane_b32 s37, v27, 3
-; SI-NEXT: v_readlane_b32 s36, v27, 2
+; SI-NEXT: v_readlane_b32 s31, v27, 3
; SI-NEXT: v_readlane_b32 s35, v27, 1
; SI-NEXT: v_readlane_b32 s34, v27, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index 280a0f17a4bc8..a025967f98c57 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -7064,22 +7064,11 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-LABEL: bitcast_v32bf16_to_v16i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s42, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
@@ -7116,26 +7105,26 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s40
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21
@@ -7151,40 +7140,62 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42
; SI-NEXT: s_cbranch_scc0 .LBB23_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v34
; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62
-; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; SI-NEXT: v_lshr_b64 v[2:3], v[38:39], 16
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v30
; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
+; SI-NEXT: v_mov_b32_e32 v7, v38
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v26
; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58
+; SI-NEXT: v_mov_b32_e32 v8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
+; SI-NEXT: v_mov_b32_e32 v38, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[35:36], 16
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; SI-NEXT: v_mov_b32_e32 v9, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_mov_b32_e32 v36, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v56
+; SI-NEXT: v_mov_b32_e32 v10, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_mov_b32_e32 v34, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[31:32], 16
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_mov_b32_e32 v11, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_mov_b32_e32 v32, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[29:30], 16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
+; SI-NEXT: v_mov_b32_e32 v12, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v43
+; SI-NEXT: v_mov_b32_e32 v30, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[27:28], 16
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
+; SI-NEXT: v_mov_b32_e32 v13, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; SI-NEXT: v_mov_b32_e32 v28, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[25:26], 16
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v44
+; SI-NEXT: v_mov_b32_e32 v14, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v42
+; SI-NEXT: v_mov_b32_e32 v26, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[23:24], 16
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v41
+; SI-NEXT: v_mov_b32_e32 v24, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[21:22], 16
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v42
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v40
+; SI-NEXT: v_mov_b32_e32 v22, v15
; SI-NEXT: v_lshr_b64 v[14:15], v[19:20], 16
+; SI-NEXT: v_mov_b32_e32 v20, v39
+; SI-NEXT: v_mov_b32_e32 v39, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_mov_b32_e32 v20, v16
+; SI-NEXT: v_mov_b32_e32 v49, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v16, v20
+; SI-NEXT: v_mov_b32_e32 v18, v39
+; SI-NEXT: v_mov_b32_e32 v16, v49
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB23_3
; SI-NEXT: .LBB23_2:
@@ -7196,10 +7207,10 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB23_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
@@ -7208,79 +7219,79 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v28
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v26
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v24
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v31
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v44
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v43
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v18
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v25
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v42
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v41
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v40
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
@@ -7293,22 +7304,11 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: .LBB23_5: ; %end
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -9155,17 +9155,15 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
@@ -9176,6 +9174,8 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
@@ -9195,8 +9195,8 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr29
+; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -9213,11 +9213,11 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v26, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
@@ -9237,26 +9237,27 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB24_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB24_4
@@ -9280,15 +9281,15 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -9307,65 +9308,65 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
; VI-NEXT: .LBB24_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v23, v28, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v23, v63, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v63, v62, s4
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
+; VI-NEXT: v_perm_b32 v1, v60, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_perm_b32 v1, v3, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: v_perm_b32 v2, v56, v47, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v59, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: v_perm_b32 v2, v45, v25, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v56, s4
+; VI-NEXT: v_perm_b32 v1, v5, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: v_perm_b32 v2, v43, v42, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v46, s4
+; VI-NEXT: v_perm_b32 v1, v6, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: v_perm_b32 v2, v40, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v43, s4
+; VI-NEXT: v_perm_b32 v1, v7, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: v_perm_b32 v2, v24, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v41, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v53, v20, s4
@@ -9405,7 +9406,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v24, s4
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
@@ -9451,19 +9452,15 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -9475,6 +9472,8 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -9492,9 +9491,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr29
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -9504,18 +9504,22 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB24_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_mov_b32_e32 v31, v22
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -9532,29 +9536,26 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
; GFX9-NEXT: .LBB24_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB24_4
@@ -9581,13 +9582,13 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_u32_e32 v5, 3, v5
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -9604,60 +9605,59 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB24_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -9684,16 +9684,14 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v29, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -10224,48 +10222,48 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: v_writelane_b32 v4, s70, 20
; SI-NEXT: v_writelane_b32 v4, s71, 21
; SI-NEXT: v_writelane_b32 v4, s80, 22
-; SI-NEXT: v_writelane_b32 v4, s81, 23
-; SI-NEXT: v_writelane_b32 v4, s82, 24
-; SI-NEXT: v_writelane_b32 v4, s83, 25
-; SI-NEXT: v_writelane_b32 v4, s84, 26
-; SI-NEXT: v_writelane_b32 v4, s85, 27
-; SI-NEXT: v_writelane_b32 v4, s30, 28
-; SI-NEXT: v_writelane_b32 v4, s31, 29
+; SI-NEXT: v_writelane_b32 v4, s30, 23
+; SI-NEXT: v_writelane_b32 v4, s31, 24
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: v_readfirstlane_b32 s4, v1
; SI-NEXT: s_cbranch_scc0 .LBB25_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
+; SI-NEXT: s_lshr_b32 s8, s5, 24
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; SI-NEXT: s_lshr_b32 s10, s27, 24
+; SI-NEXT: s_mov_b32 s7, s8
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s12, s23, 24
+; SI-NEXT: s_mov_b32 s9, s10
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8
+; SI-NEXT: s_lshr_b32 s14, s19, 24
+; SI-NEXT: s_mov_b32 s11, s12
; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 24
+; SI-NEXT: s_lshr_b32 s40, s17, 24
+; SI-NEXT: s_mov_b32 s13, s14
; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s38, s5, 16
+; SI-NEXT: s_lshr_b32 s39, s5, 8
+; SI-NEXT: s_lshr_b32 s48, s29, 24
+; SI-NEXT: s_lshr_b32 s49, s29, 16
+; SI-NEXT: s_lshr_b32 s50, s29, 8
+; SI-NEXT: s_lshr_b32 s51, s27, 16
+; SI-NEXT: s_lshr_b32 s52, s27, 8
+; SI-NEXT: s_lshr_b32 s53, s25, 24
+; SI-NEXT: s_lshr_b32 s54, s25, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 8
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s23, 8
+; SI-NEXT: s_lshr_b32 s66, s21, 24
+; SI-NEXT: s_lshr_b32 s67, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s21, 8
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s19, 8
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s17, 8
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 8
; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 24
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16
@@ -10292,36 +10290,36 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr13
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
@@ -10339,10 +10337,14 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: .LBB25_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s7, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s7, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB25_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s29, s29, 3
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -10355,10 +10357,6 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8
@@ -10373,30 +10371,30 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24
; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
+; SI-NEXT: s_lshr_b32 s7, s5, 24
+; SI-NEXT: s_lshr_b32 s38, s5, 16
+; SI-NEXT: s_lshr_b32 s39, s5, 8
+; SI-NEXT: s_lshr_b32 s48, s29, 24
+; SI-NEXT: s_lshr_b32 s49, s29, 16
+; SI-NEXT: s_lshr_b32 s50, s29, 8
+; SI-NEXT: s_lshr_b32 s9, s27, 24
+; SI-NEXT: s_lshr_b32 s51, s27, 16
+; SI-NEXT: s_lshr_b32 s52, s27, 8
+; SI-NEXT: s_lshr_b32 s53, s25, 24
+; SI-NEXT: s_lshr_b32 s54, s25, 16
+; SI-NEXT: s_lshr_b32 s55, s25, 8
+; SI-NEXT: s_lshr_b32 s11, s23, 24
+; SI-NEXT: s_lshr_b32 s64, s23, 16
+; SI-NEXT: s_lshr_b32 s65, s23, 8
+; SI-NEXT: s_lshr_b32 s66, s21, 24
+; SI-NEXT: s_lshr_b32 s67, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s21, 8
+; SI-NEXT: s_lshr_b32 s13, s19, 24
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s19, 8
+; SI-NEXT: s_lshr_b32 s15, s17, 24
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s17, 8
; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
@@ -10408,202 +10406,197 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: .LBB25_5: ; %end
-; SI-NEXT: s_lshl_b32 s7, s34, 8
-; SI-NEXT: s_and_b32 s9, s16, 0xff
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s9, s30, 0xff
-; SI-NEXT: s_lshl_b32 s11, vcc_lo, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s17, 0xff
-; SI-NEXT: s_lshl_b32 s9, s85, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s84, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s83, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v2, s7
-; SI-NEXT: s_lshl_b32 s7, s94, 8
-; SI-NEXT: s_and_b32 s9, s18, 0xff
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s9, s92, 0xff
-; SI-NEXT: s_lshl_b32 s11, s90, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v3, s7
-; SI-NEXT: s_and_b32 s7, s19, 0xff
-; SI-NEXT: s_lshl_b32 s9, s82, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s81, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s80, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_lshl_b32 s41, s34, 8
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: s_and_b32 s41, s30, 0xff
+; SI-NEXT: s_lshl_b32 s43, vcc_lo, 24
+; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: s_or_b32 s41, s43, s41
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s17, 0xff
+; SI-NEXT: s_lshl_b32 s17, s80, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s71, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s15, s15, 24
+; SI-NEXT: s_or_b32 s15, s15, s17
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: v_mov_b32_e32 v2, s15
+; SI-NEXT: s_lshl_b32 s15, s94, 8
+; SI-NEXT: s_and_b32 s16, s18, 0xff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_and_b32 s16, s92, 0xff
+; SI-NEXT: s_lshl_b32 s17, s90, 24
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: v_mov_b32_e32 v3, s15
+; SI-NEXT: s_and_b32 s15, s19, 0xff
+; SI-NEXT: s_lshl_b32 s16, s70, 8
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_and_b32 s16, s69, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s13, s13, 24
+; SI-NEXT: s_or_b32 s13, s13, s16
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_or_b32 s13, s15, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s20, 0xff
-; SI-NEXT: s_lshl_b32 s9, s78, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s76, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s74, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s20, 0xff
+; SI-NEXT: s_lshl_b32 s15, s78, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s76, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s16, s74, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_or_b32 s13, s13, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s21, 0xff
-; SI-NEXT: s_lshl_b32 s9, s71, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s70, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s69, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s21, 0xff
+; SI-NEXT: s_lshl_b32 s15, s68, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s67, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s16, s66, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_or_b32 s13, s13, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s22, 0xff
-; SI-NEXT: s_lshl_b32 s9, s88, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s72, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s62, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s22, 0xff
+; SI-NEXT: s_lshl_b32 s15, s88, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s72, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s16, s62, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_or_b32 s13, s13, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s23, 0xff
-; SI-NEXT: s_lshl_b32 s9, s68, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s67, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s66, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s23, 0xff
+; SI-NEXT: s_lshl_b32 s15, s65, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s64, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s11, s11, s15
+; SI-NEXT: s_or_b32 s11, s13, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s24, 0xff
-; SI-NEXT: s_lshl_b32 s9, s60, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s58, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s56, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s24, 0xff
+; SI-NEXT: s_lshl_b32 s13, s60, 8
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s58, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s15, s56, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_or_b32 s11, s11, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s25, 0xff
-; SI-NEXT: s_lshl_b32 s9, s65, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s64, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s55, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s25, 0xff
+; SI-NEXT: s_lshl_b32 s13, s55, 8
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s54, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s15, s53, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_or_b32 s11, s11, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s26, 0xff
-; SI-NEXT: s_lshl_b32 s9, s46, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s44, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s42, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s26, 0xff
+; SI-NEXT: s_lshl_b32 s13, s46, 8
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s44, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s15, s42, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_or_b32 s11, s11, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s27, 0xff
-; SI-NEXT: s_lshl_b32 s9, s54, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s53, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s52, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s27, 0xff
+; SI-NEXT: s_lshl_b32 s13, s52, 8
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s51, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s13
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s28, 0xff
-; SI-NEXT: s_lshl_b32 s9, s40, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s14, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s12, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s9
+; SI-NEXT: s_and_b32 s9, s28, 0xff
+; SI-NEXT: s_lshl_b32 s11, s40, 8
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_and_b32 s11, s14, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_or_b32 s9, s9, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s29, 0xff
-; SI-NEXT: s_lshl_b32 s9, s51, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s50, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s49, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s9
+; SI-NEXT: s_and_b32 s9, s29, 0xff
+; SI-NEXT: s_lshl_b32 s11, s50, 8
+; SI-NEXT: s_or_b32 s9, s9, s11
+; SI-NEXT: s_and_b32 s11, s49, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s12, s48, 24
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_or_b32 s9, s9, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
+; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s7, s10, 8
-; SI-NEXT: s_or_b32 s4, s4, s7
-; SI-NEXT: s_and_b32 s7, s8, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s10, 8
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_or_b32 s4, s4, s9
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s48, 8
+; SI-NEXT: s_lshl_b32 s5, s39, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s39, 0xff
+; SI-NEXT: s_and_b32 s5, s38, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s38, 24
+; SI-NEXT: s_lshl_b32 s6, s7, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v4, 28
+; SI-NEXT: v_readlane_b32 s30, v4, 23
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v4, 29
-; SI-NEXT: v_readlane_b32 s85, v4, 27
-; SI-NEXT: v_readlane_b32 s84, v4, 26
-; SI-NEXT: v_readlane_b32 s83, v4, 25
-; SI-NEXT: v_readlane_b32 s82, v4, 24
-; SI-NEXT: v_readlane_b32 s81, v4, 23
+; SI-NEXT: v_readlane_b32 s31, v4, 24
; SI-NEXT: v_readlane_b32 s80, v4, 22
; SI-NEXT: v_readlane_b32 s71, v4, 21
; SI-NEXT: v_readlane_b32 s70, v4, 20
@@ -10652,17 +10645,22 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: v_writelane_b32 v4, s52, 10
; VI-NEXT: v_writelane_b32 v4, s53, 11
; VI-NEXT: v_writelane_b32 v4, s54, 12
-; VI-NEXT: v_writelane_b32 v4, s55, 13
-; VI-NEXT: v_writelane_b32 v4, s64, 14
-; VI-NEXT: v_writelane_b32 v4, s65, 15
-; VI-NEXT: v_writelane_b32 v4, s30, 16
-; VI-NEXT: v_writelane_b32 v4, s31, 17
+; VI-NEXT: v_writelane_b32 v4, s30, 13
+; VI-NEXT: v_writelane_b32 v4, s31, 14
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB25_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s8, s23, 8
+; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; VI-NEXT: s_lshr_b32 s10, s19, 24
+; VI-NEXT: s_mov_b32 s7, s8
+; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
+; VI-NEXT: s_lshr_b32 s12, s17, 8
+; VI-NEXT: s_mov_b32 s9, s10
+; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
; VI-NEXT: s_lshr_b32 s56, s5, 24
; VI-NEXT: s_lshr_b32 s57, s5, 16
; VI-NEXT: s_lshr_b32 s58, s5, 8
@@ -10685,27 +10683,22 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
-; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
+; VI-NEXT: s_mov_b32 s11, s12
; VI-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
; VI-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
; VI-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
@@ -10715,28 +10708,28 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: s_branch .LBB25_3
; VI-NEXT: .LBB25_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr44
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr44
+; VI-NEXT: ; implicit-def: $sgpr11
; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr42
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr50
; VI-NEXT: ; implicit-def: $sgpr49
+; VI-NEXT: ; implicit-def: $sgpr42
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr34
; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr14
+; VI-NEXT: ; implicit-def: $sgpr7
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -10765,10 +10758,16 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: .LBB25_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s13, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s13, 1
; VI-NEXT: s_cbranch_scc1 .LBB25_5
; VI-NEXT: ; %bb.4: ; %cmp.true
+; VI-NEXT: s_add_i32 s27, s27, 3
+; VI-NEXT: s_add_i32 s26, s26, 3
+; VI-NEXT: s_add_i32 s29, s29, 3
+; VI-NEXT: s_add_i32 s28, s28, 3
+; VI-NEXT: s_add_i32 s5, s5, 3
+; VI-NEXT: s_add_i32 s4, s4, 3
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_add_i32 s19, s19, 3
@@ -10779,12 +10778,6 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s24, s24, 3
-; VI-NEXT: s_add_i32 s27, s27, 3
-; VI-NEXT: s_add_i32 s26, s26, 3
-; VI-NEXT: s_add_i32 s29, s29, 3
-; VI-NEXT: s_add_i32 s28, s28, 3
-; VI-NEXT: s_add_i32 s5, s5, 3
-; VI-NEXT: s_add_i32 s4, s4, 3
; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
@@ -10815,77 +10808,77 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
+; VI-NEXT: s_lshr_b32 s7, s23, 8
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s9, s19, 24
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s11, s17, 8
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
; VI-NEXT: .LBB25_5: ; %end
; VI-NEXT: v_mov_b32_e32 v2, 0xc0c0004
; VI-NEXT: v_mov_b32_e32 v3, s44
-; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: v_perm_b32 v3, s64, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s54
+; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s16, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s53
+; VI-NEXT: v_mov_b32_e32 v3, s52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: v_perm_b32 v3, s54, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s11
+; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s42
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_mov_b32_e32 v1, s52
-; VI-NEXT: v_perm_b32 v3, s51, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s50
+; VI-NEXT: v_perm_b32 v3, s49, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v3, s9
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: v_perm_b32 v3, s49, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s48
+; VI-NEXT: v_perm_b32 v3, s39, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s40
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_mov_b32_e32 v1, s39
-; VI-NEXT: v_perm_b32 v3, s38, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s38
+; VI-NEXT: v_perm_b32 v3, s37, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s35
+; VI-NEXT: v_mov_b32_e32 v3, s34
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_mov_b32_e32 v1, s37
-; VI-NEXT: v_perm_b32 v3, s36, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s36
+; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s14
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_mov_b32_e32 v1, s34
-; VI-NEXT: v_perm_b32 v3, s31, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s31
+; VI-NEXT: v_perm_b32 v3, s30, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, vcc_lo
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_mov_b32_e32 v1, s30
+; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_perm_b32 v3, vcc_hi, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -10946,12 +10939,9 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_readlane_b32 s30, v4, 16
+; VI-NEXT: v_readlane_b32 s30, v4, 13
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_readlane_b32 s31, v4, 17
-; VI-NEXT: v_readlane_b32 s65, v4, 15
-; VI-NEXT: v_readlane_b32 s64, v4, 14
-; VI-NEXT: v_readlane_b32 s55, v4, 13
+; VI-NEXT: v_readlane_b32 s31, v4, 14
; VI-NEXT: v_readlane_b32 s54, v4, 12
; VI-NEXT: v_readlane_b32 s53, v4, 11
; VI-NEXT: v_readlane_b32 s52, v4, 10
@@ -10986,17 +10976,22 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: v_writelane_b32 v4, s48, 6
; GFX9-NEXT: v_writelane_b32 v4, s49, 7
; GFX9-NEXT: v_writelane_b32 v4, s50, 8
-; GFX9-NEXT: v_writelane_b32 v4, s51, 9
-; GFX9-NEXT: v_writelane_b32 v4, s52, 10
-; GFX9-NEXT: v_writelane_b32 v4, s53, 11
-; GFX9-NEXT: v_writelane_b32 v4, s30, 12
-; GFX9-NEXT: v_writelane_b32 v4, s31, 13
+; GFX9-NEXT: v_writelane_b32 v4, s30, 9
+; GFX9-NEXT: v_writelane_b32 v4, s31, 10
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB25_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s8, s21, 16
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s10, s18, 16
+; GFX9-NEXT: s_mov_b32 s7, s8
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
+; GFX9-NEXT: s_lshr_b32 s12, s16, 16
+; GFX9-NEXT: s_mov_b32 s9, s10
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: s_lshr_b32 s57, s5, 16
; GFX9-NEXT: s_lshr_b32 s58, s5, 8
@@ -11023,23 +11018,18 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s95, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s31, s21, 8
-; GFX9-NEXT: s_lshr_b32 s34, s20, 16
-; GFX9-NEXT: s_lshr_b32 s35, s20, 8
+; GFX9-NEXT: s_lshr_b32 s30, s21, 8
+; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s34, s20, 8
; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s38, s19, 8
-; GFX9-NEXT: s_lshr_b32 s39, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s51, s17, 8
-; GFX9-NEXT: s_lshr_b32 s52, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
+; GFX9-NEXT: s_lshr_b32 s35, s19, 16
+; GFX9-NEXT: s_lshr_b32 s37, s19, 8
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 8
+; GFX9-NEXT: s_mov_b32 s11, s12
; GFX9-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
; GFX9-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
; GFX9-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
@@ -11049,23 +11039,23 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: s_branch .LBB25_3
; GFX9-NEXT: .LBB25_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr44
-; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr44
; GFX9-NEXT: ; implicit-def: $sgpr49
; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr37
-; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr40
; GFX9-NEXT: ; implicit-def: $sgpr31
+; GFX9-NEXT: ; implicit-def: $sgpr40
; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $vcc_hi
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
@@ -11099,10 +11089,16 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: .LBB25_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s13, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s13, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB25_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
+; GFX9-NEXT: s_add_i32 s27, s27, 3
+; GFX9-NEXT: s_add_i32 s26, s26, 3
+; GFX9-NEXT: s_add_i32 s29, s29, 3
+; GFX9-NEXT: s_add_i32 s28, s28, 3
+; GFX9-NEXT: s_add_i32 s5, s5, 3
+; GFX9-NEXT: s_add_i32 s4, s4, 3
; GFX9-NEXT: s_add_i32 s17, s17, 3
; GFX9-NEXT: s_add_i32 s16, s16, 3
; GFX9-NEXT: s_add_i32 s19, s19, 3
@@ -11113,12 +11109,6 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: s_add_i32 s22, s22, 3
; GFX9-NEXT: s_add_i32 s25, s25, 3
; GFX9-NEXT: s_add_i32 s24, s24, 3
-; GFX9-NEXT: s_add_i32 s27, s27, 3
-; GFX9-NEXT: s_add_i32 s26, s26, 3
-; GFX9-NEXT: s_add_i32 s29, s29, 3
-; GFX9-NEXT: s_add_i32 s28, s28, 3
-; GFX9-NEXT: s_add_i32 s5, s5, 3
-; GFX9-NEXT: s_add_i32 s4, s4, 3
; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; GFX9-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
; GFX9-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
@@ -11153,60 +11143,60 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s95, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s31, s21, 8
-; GFX9-NEXT: s_lshr_b32 s34, s20, 16
-; GFX9-NEXT: s_lshr_b32 s35, s20, 8
+; GFX9-NEXT: s_lshr_b32 s7, s21, 16
+; GFX9-NEXT: s_lshr_b32 s30, s21, 8
+; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s34, s20, 8
; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s38, s19, 8
-; GFX9-NEXT: s_lshr_b32 s39, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s51, s17, 8
-; GFX9-NEXT: s_lshr_b32 s52, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
+; GFX9-NEXT: s_lshr_b32 s35, s19, 16
+; GFX9-NEXT: s_lshr_b32 s37, s19, 8
+; GFX9-NEXT: s_lshr_b32 s9, s18, 16
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s11, s16, 16
+; GFX9-NEXT: s_lshr_b32 s50, s16, 8
; GFX9-NEXT: .LBB25_5: ; %end
; GFX9-NEXT: v_mov_b32_e32 v2, 0xc0c0004
; GFX9-NEXT: v_mov_b32_e32 v3, s44
-; GFX9-NEXT: v_mov_b32_e32 v1, s53
-; GFX9-NEXT: v_perm_b32 v3, s52, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s50
+; GFX9-NEXT: v_perm_b32 v3, s11, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s16, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s49
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: v_perm_b32 v3, s50, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s49
+; GFX9-NEXT: v_perm_b32 v3, s48, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s17, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s42
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_perm_b32 v3, s39, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s38
+; GFX9-NEXT: v_perm_b32 v3, s9, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s18, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s36
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_mov_b32_e32 v1, s38
-; GFX9-NEXT: v_perm_b32 v3, s37, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s19, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s40
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_mov_b32_e32 v1, s35
-; GFX9-NEXT: v_perm_b32 v3, s34, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s34
+; GFX9-NEXT: v_perm_b32 v3, s31, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, vcc_hi
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_mov_b32_e32 v1, s31
-; GFX9-NEXT: v_perm_b32 v3, s30, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s30
+; GFX9-NEXT: v_perm_b32 v3, s7, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s21, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
@@ -11280,12 +11270,9 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX9-NEXT: v_perm_b32 v2, s57, v3, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_readlane_b32 s30, v4, 12
+; GFX9-NEXT: v_readlane_b32 s30, v4, 9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_readlane_b32 s31, v4, 13
-; GFX9-NEXT: v_readlane_b32 s53, v4, 11
-; GFX9-NEXT: v_readlane_b32 s52, v4, 10
-; GFX9-NEXT: v_readlane_b32 s51, v4, 9
+; GFX9-NEXT: v_readlane_b32 s31, v4, 10
; GFX9-NEXT: v_readlane_b32 s50, v4, 8
; GFX9-NEXT: v_readlane_b32 s49, v4, 7
; GFX9-NEXT: v_readlane_b32 s48, v4, 6
@@ -11311,15 +11298,18 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: v_writelane_b32 v23, s35, 1
; GFX11-NEXT: v_writelane_b32 v23, s36, 2
; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s30, 7
-; GFX11-NEXT: v_writelane_b32 v23, s31, 8
+; GFX11-NEXT: v_writelane_b32 v23, s30, 4
+; GFX11-NEXT: v_writelane_b32 v23, s31, 5
; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s48, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB25_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-NEXT: s_mov_b32 s5, s6
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-NEXT: s_mov_b32 s7, s8
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
; GFX11-NEXT: s_lshr_b32 s42, s27, 24
; GFX11-NEXT: s_lshr_b32 s44, s27, 16
; GFX11-NEXT: s_lshr_b32 s43, s27, 8
@@ -11352,17 +11342,13 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: s_lshr_b32 s94, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-NEXT: s_lshr_b32 s30, s2, 16
+; GFX11-NEXT: s_lshr_b32 s31, s2, 8
+; GFX11-NEXT: s_lshr_b32 s34, s1, 24
+; GFX11-NEXT: s_lshr_b32 s35, s1, 16
+; GFX11-NEXT: s_lshr_b32 s36, s1, 8
+; GFX11-NEXT: s_lshr_b32 s37, s0, 8
+; GFX11-NEXT: s_mov_b32 s9, 0
; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
@@ -11370,17 +11356,17 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
; GFX11-NEXT: s_branch .LBB25_3
; GFX11-NEXT: .LBB25_2:
-; GFX11-NEXT: s_mov_b32 s48, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr40
+; GFX11-NEXT: s_mov_b32 s9, -1
; GFX11-NEXT: ; implicit-def: $sgpr37
+; GFX11-NEXT: ; implicit-def: $sgpr7
+; GFX11-NEXT: ; implicit-def: $sgpr40
; GFX11-NEXT: ; implicit-def: $sgpr36
; GFX11-NEXT: ; implicit-def: $sgpr35
; GFX11-NEXT: ; implicit-def: $sgpr34
; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr28
; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr28
+; GFX11-NEXT: ; implicit-def: $sgpr5
; GFX11-NEXT: ; implicit-def: $vcc_hi
; GFX11-NEXT: ; implicit-def: $vcc_lo
; GFX11-NEXT: ; implicit-def: $sgpr94
@@ -11421,11 +11407,15 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: .LBB25_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s48, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s9, s9, exec_lo
+; GFX11-NEXT: s_cselect_b32 s9, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s9, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB25_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
+; GFX11-NEXT: s_add_i32 s25, s25, 3
+; GFX11-NEXT: s_add_i32 s27, s27, 3
+; GFX11-NEXT: s_add_i32 s26, s26, 3
+; GFX11-NEXT: s_add_i32 s24, s24, 3
; GFX11-NEXT: s_add_i32 s1, s1, 3
; GFX11-NEXT: s_add_i32 s0, s0, 3
; GFX11-NEXT: s_add_i32 s3, s3, 3
@@ -11438,10 +11428,6 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: s_add_i32 s20, s20, 3
; GFX11-NEXT: s_add_i32 s23, s23, 3
; GFX11-NEXT: s_add_i32 s22, s22, 3
-; GFX11-NEXT: s_add_i32 s25, s25, 3
-; GFX11-NEXT: s_add_i32 s27, s27, 3
-; GFX11-NEXT: s_add_i32 s26, s26, 3
-; GFX11-NEXT: s_add_i32 s24, s24, 3
; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
@@ -11482,25 +11468,24 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: s_lshr_b32 s94, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-NEXT: s_lshr_b32 s30, s2, 16
+; GFX11-NEXT: s_lshr_b32 s31, s2, 8
+; GFX11-NEXT: s_lshr_b32 s34, s1, 24
+; GFX11-NEXT: s_lshr_b32 s35, s1, 16
+; GFX11-NEXT: s_lshr_b32 s36, s1, 8
+; GFX11-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-NEXT: s_lshr_b32 s37, s0, 8
; GFX11-NEXT: .LBB25_5: ; %end
; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s31, s28, v12
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_perm_b32 v5, s30, s28, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v2, s38, s40, v12
-; GFX11-NEXT: v_perm_b32 v4, s36, s35, v12
-; GFX11-NEXT: v_perm_b32 v1, s0, s39, v12
-; GFX11-NEXT: v_perm_b32 v3, s1, s37, v12
-; GFX11-NEXT: v_perm_b32 v6, s2, s34, v12
+; GFX11-NEXT: v_perm_b32 v2, s7, s40, v12
+; GFX11-NEXT: v_perm_b32 v4, s35, s34, v12
+; GFX11-NEXT: v_perm_b32 v1, s0, s37, v12
+; GFX11-NEXT: v_perm_b32 v3, s1, s36, v12
+; GFX11-NEXT: v_perm_b32 v6, s2, s31, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX11-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
@@ -11515,7 +11500,7 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: v_perm_b32 v8, s90, s12, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-NEXT: v_perm_b32 v7, s3, s30, v12
+; GFX11-NEXT: v_perm_b32 v7, s3, s5, v12
; GFX11-NEXT: v_perm_b32 v13, s18, s89, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX11-NEXT: v_or_b32_e32 v5, v6, v9
@@ -11558,15 +11543,13 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; GFX11-NEXT: v_or_b32_e32 v14, v19, v17
; GFX11-NEXT: v_or_b32_e32 v15, v21, v18
; GFX11-NEXT: v_or_b32_e32 v16, v22, v20
-; GFX11-NEXT: v_readlane_b32 s30, v23, 7
+; GFX11-NEXT: v_readlane_b32 s30, v23, 4
; GFX11-NEXT: s_clause 0x3
; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v23, 8
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-NEXT: v_readlane_b32 s31, v23, 5
; GFX11-NEXT: v_readlane_b32 s37, v23, 3
; GFX11-NEXT: v_readlane_b32 s36, v23, 2
; GFX11-NEXT: v_readlane_b32 s35, v23, 1
@@ -22036,22 +22019,11 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-LABEL: bitcast_v32bf16_to_v16f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s42, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
@@ -22088,26 +22060,26 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s40
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21
@@ -22123,40 +22095,62 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v34
; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62
-; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; SI-NEXT: v_lshr_b64 v[2:3], v[38:39], 16
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v30
; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
+; SI-NEXT: v_mov_b32_e32 v7, v38
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v26
; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58
+; SI-NEXT: v_mov_b32_e32 v8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
+; SI-NEXT: v_mov_b32_e32 v38, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[35:36], 16
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; SI-NEXT: v_mov_b32_e32 v9, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_mov_b32_e32 v36, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v56
+; SI-NEXT: v_mov_b32_e32 v10, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_mov_b32_e32 v34, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[31:32], 16
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_mov_b32_e32 v11, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_mov_b32_e32 v32, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[29:30], 16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
+; SI-NEXT: v_mov_b32_e32 v12, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v43
+; SI-NEXT: v_mov_b32_e32 v30, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[27:28], 16
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
+; SI-NEXT: v_mov_b32_e32 v13, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; SI-NEXT: v_mov_b32_e32 v28, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[25:26], 16
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v44
+; SI-NEXT: v_mov_b32_e32 v14, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v42
+; SI-NEXT: v_mov_b32_e32 v26, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[23:24], 16
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v41
+; SI-NEXT: v_mov_b32_e32 v24, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[21:22], 16
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v42
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v40
+; SI-NEXT: v_mov_b32_e32 v22, v15
; SI-NEXT: v_lshr_b64 v[14:15], v[19:20], 16
+; SI-NEXT: v_mov_b32_e32 v20, v39
+; SI-NEXT: v_mov_b32_e32 v39, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_mov_b32_e32 v20, v16
+; SI-NEXT: v_mov_b32_e32 v49, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v16, v20
+; SI-NEXT: v_mov_b32_e32 v18, v39
+; SI-NEXT: v_mov_b32_e32 v16, v49
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
@@ -22168,10 +22162,10 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB47_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
@@ -22180,79 +22174,79 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v28
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v26
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v24
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v31
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v44
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v43
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v18
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v25
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v42
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v41
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v40
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
@@ -22265,22 +22259,11 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: .LBB47_5: ; %end
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -24127,17 +24110,15 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
@@ -24148,6 +24129,8 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
@@ -24167,8 +24150,8 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr29
+; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -24185,11 +24168,11 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v26, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
@@ -24209,26 +24192,27 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB48_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB48_4
@@ -24252,15 +24236,15 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_add_f32_e32 v2, 1.0, v2
; VI-NEXT: v_add_f32_e32 v1, 1.0, v1
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_add_f32_e32 v6, 1.0, v6
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -24279,65 +24263,65 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
; VI-NEXT: .LBB48_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v23, v28, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v23, v63, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v63, v62, s4
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
+; VI-NEXT: v_perm_b32 v1, v60, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_perm_b32 v1, v3, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: v_perm_b32 v2, v56, v47, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v59, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: v_perm_b32 v2, v45, v25, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v56, s4
+; VI-NEXT: v_perm_b32 v1, v5, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: v_perm_b32 v2, v43, v42, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v46, s4
+; VI-NEXT: v_perm_b32 v1, v6, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: v_perm_b32 v2, v40, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v43, s4
+; VI-NEXT: v_perm_b32 v1, v7, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: v_perm_b32 v2, v24, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v41, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v53, v20, s4
@@ -24377,7 +24361,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v24, s4
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
@@ -24423,19 +24407,15 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -24447,6 +24427,8 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -24464,9 +24446,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr29
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -24476,18 +24459,22 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB48_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_mov_b32_e32 v31, v22
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -24504,29 +24491,26 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
; GFX9-NEXT: .LBB48_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB48_4
@@ -24553,13 +24537,13 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -24576,60 +24560,59 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB48_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -24656,16 +24639,14 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v29, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -25155,8 +25136,9 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v40, s34, 0
; SI-NEXT: v_writelane_b32 v40, s35, 1
; SI-NEXT: v_writelane_b32 v40, s36, 2
@@ -25181,45 +25163,48 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_writelane_b32 v40, s71, 21
; SI-NEXT: v_writelane_b32 v40, s80, 22
; SI-NEXT: v_writelane_b32 v40, s81, 23
-; SI-NEXT: v_writelane_b32 v40, s82, 24
-; SI-NEXT: v_writelane_b32 v40, s83, 25
-; SI-NEXT: v_writelane_b32 v40, s84, 26
-; SI-NEXT: v_writelane_b32 v40, s85, 27
-; SI-NEXT: v_writelane_b32 v40, s30, 28
-; SI-NEXT: v_writelane_b32 v40, s31, 29
+; SI-NEXT: v_writelane_b32 v40, s30, 24
+; SI-NEXT: v_writelane_b32 v40, s31, 25
; SI-NEXT: v_readfirstlane_b32 s4, v3
-; SI-NEXT: v_readfirstlane_b32 s35, v2
+; SI-NEXT: v_readfirstlane_b32 s9, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_readfirstlane_b32 s8, v1
+; SI-NEXT: ; implicit-def: $vgpr41 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s82, s35, 24
-; SI-NEXT: s_lshr_b32 s84, s35, 16
-; SI-NEXT: s_lshr_b32 s85, s35, 8
-; SI-NEXT: s_lshr_b32 s71, s29, 24
-; SI-NEXT: s_lshr_b32 s81, s29, 16
-; SI-NEXT: s_lshr_b32 s83, s29, 8
-; SI-NEXT: s_lshr_b32 s68, s27, 24
-; SI-NEXT: s_lshr_b32 s70, s27, 16
-; SI-NEXT: s_lshr_b32 s80, s27, 8
-; SI-NEXT: s_lshr_b32 s65, s25, 24
-; SI-NEXT: s_lshr_b32 s67, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s25, 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v41, s4, 2
+; SI-NEXT: v_writelane_b32 v41, s5, 3
+; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 8
+; SI-NEXT: v_writelane_b32 v41, s30, 0
+; SI-NEXT: s_lshr_b32 s34, s9, 24
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s9, 8
+; SI-NEXT: s_lshr_b32 s37, s29, 24
+; SI-NEXT: s_lshr_b32 s38, s29, 16
+; SI-NEXT: s_lshr_b32 s39, s29, 8
+; SI-NEXT: s_lshr_b32 s48, s27, 24
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s27, 8
+; SI-NEXT: s_lshr_b32 s51, s25, 24
+; SI-NEXT: s_lshr_b32 s52, s25, 16
+; SI-NEXT: s_lshr_b32 s53, s25, 8
; SI-NEXT: s_lshr_b32 s54, s23, 24
-; SI-NEXT: s_lshr_b32 s64, s23, 16
-; SI-NEXT: s_lshr_b32 s66, s23, 8
-; SI-NEXT: s_lshr_b32 s51, s21, 24
-; SI-NEXT: s_lshr_b32 s53, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s21, 8
-; SI-NEXT: s_lshr_b32 s48, s19, 24
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s52, s19, 8
-; SI-NEXT: s_lshr_b32 s38, s17, 24
-; SI-NEXT: s_lshr_b32 s39, s17, 16
-; SI-NEXT: s_lshr_b32 s49, s17, 8
-; SI-NEXT: s_lshr_b64 s[4:5], s[34:35], 24
-; SI-NEXT: s_lshr_b64 s[6:7], s[34:35], 16
-; SI-NEXT: s_lshr_b64 s[8:9], s[34:35], 8
+; SI-NEXT: s_lshr_b32 s55, s23, 16
+; SI-NEXT: s_lshr_b32 s64, s23, 8
+; SI-NEXT: s_lshr_b32 s65, s21, 24
+; SI-NEXT: s_lshr_b32 s66, s21, 16
+; SI-NEXT: s_lshr_b32 s67, s21, 8
+; SI-NEXT: s_lshr_b32 s68, s19, 24
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s19, 8
+; SI-NEXT: s_lshr_b32 s71, s17, 24
+; SI-NEXT: s_lshr_b32 s80, s17, 16
+; SI-NEXT: s_lshr_b32 s81, s17, 8
+; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
+; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
+; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[10:11], s[28:29], 24
; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 8
@@ -25240,44 +25225,26 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 24
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 8
-; SI-NEXT: s_mov_b64 s[36:37], 0
+; SI-NEXT: v_writelane_b32 v41, s31, 1
+; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB49_3
; SI-NEXT: .LBB49_2:
-; SI-NEXT: s_mov_b64 s[36:37], -1
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: s_mov_b64 s[4:5], s[8:9]
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v41, s6, 0
+; SI-NEXT: v_writelane_b32 v41, s7, 1
+; SI-NEXT: s_mov_b64 s[30:31], -1
+; SI-NEXT: v_writelane_b32 v41, s34, 2
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr83
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
@@ -25292,16 +25259,40 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v41, s35, 3
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr69
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: .LBB49_3: ; %Flow
-; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s5, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s5, 1
+; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
+; SI-NEXT: s_cselect_b32 s7, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s7, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v18, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v20, s16, 1.0
-; SI-NEXT: v_add_f32_e64 v14, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v19, s16, 1.0
+; SI-NEXT: v_add_f32_e64 v13, s19, 1.0
; SI-NEXT: v_add_f32_e64 v17, s18, 1.0
; SI-NEXT: v_add_f32_e64 v11, s21, 1.0
; SI-NEXT: v_add_f32_e64 v12, s20, 1.0
@@ -25311,14 +25302,14 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
; SI-NEXT: v_add_f32_e64 v5, s27, 1.0
; SI-NEXT: v_add_f32_e64 v6, s26, 1.0
-; SI-NEXT: v_add_f32_e64 v3, s29, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s29, 1.0
; SI-NEXT: v_add_f32_e64 v4, s28, 1.0
-; SI-NEXT: v_add_f32_e64 v1, s35, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s34, 1.0
-; SI-NEXT: v_readfirstlane_b32 s16, v20
+; SI-NEXT: v_add_f32_e64 v1, s5, 1.0
+; SI-NEXT: v_add_f32_e64 v3, s4, 1.0
+; SI-NEXT: v_readfirstlane_b32 s16, v19
; SI-NEXT: v_readfirstlane_b32 s17, v18
; SI-NEXT: v_readfirstlane_b32 s18, v17
-; SI-NEXT: v_readfirstlane_b32 s19, v14
+; SI-NEXT: v_readfirstlane_b32 s19, v13
; SI-NEXT: v_readfirstlane_b32 s20, v12
; SI-NEXT: v_readfirstlane_b32 s21, v11
; SI-NEXT: v_readfirstlane_b32 s22, v10
@@ -25328,8 +25319,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s26, v6
; SI-NEXT: v_readfirstlane_b32 s27, v5
; SI-NEXT: v_readfirstlane_b32 s14, v4
-; SI-NEXT: v_readfirstlane_b32 s15, v3
-; SI-NEXT: v_readfirstlane_b32 s8, v2
+; SI-NEXT: v_readfirstlane_b32 s15, v2
+; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: v_readfirstlane_b32 s9, v1
; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
@@ -25354,13 +25345,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 24
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 8
-; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v1
+; SI-NEXT: s_lshr_b64 s[16:17], s[16:17], 8
+; SI-NEXT: v_lshrrev_b32_e32 v14, 24, v1
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v1
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
+; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v2
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v5
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v5
@@ -25373,18 +25364,22 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v11
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v11
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v18
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
; SI-NEXT: s_branch .LBB49_6
; SI-NEXT: .LBB49_5:
-; SI-NEXT: v_mov_b32_e32 v20, s16
+; SI-NEXT: v_mov_b32_e32 v19, s16
; SI-NEXT: v_mov_b32_e32 v18, s17
+; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: v_readlane_b32 s16, v41, 0
+; SI-NEXT: v_readlane_b32 s4, v41, 2
; SI-NEXT: v_mov_b32_e32 v17, s18
-; SI-NEXT: v_mov_b32_e32 v14, s19
+; SI-NEXT: v_mov_b32_e32 v13, s19
; SI-NEXT: v_mov_b32_e32 v12, s20
; SI-NEXT: v_mov_b32_e32 v11, s21
; SI-NEXT: v_mov_b32_e32 v10, s22
@@ -25394,43 +25389,43 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v6, s26
; SI-NEXT: v_mov_b32_e32 v5, s27
; SI-NEXT: v_mov_b32_e32 v4, s28
-; SI-NEXT: v_mov_b32_e32 v3, s29
-; SI-NEXT: v_mov_b32_e32 v2, s34
-; SI-NEXT: v_mov_b32_e32 v1, s35
-; SI-NEXT: v_mov_b32_e32 v48, s49
-; SI-NEXT: v_mov_b32_e32 v39, s39
-; SI-NEXT: v_mov_b32_e32 v38, s38
-; SI-NEXT: v_mov_b32_e32 v37, s52
-; SI-NEXT: v_mov_b32_e32 v36, s50
-; SI-NEXT: v_mov_b32_e32 v35, s48
-; SI-NEXT: v_mov_b32_e32 v34, s55
-; SI-NEXT: v_mov_b32_e32 v33, s53
-; SI-NEXT: v_mov_b32_e32 v32, s51
-; SI-NEXT: v_mov_b32_e32 v31, s66
-; SI-NEXT: v_mov_b32_e32 v30, s64
+; SI-NEXT: v_mov_b32_e32 v2, s29
+; SI-NEXT: v_mov_b32_e32 v48, s81
+; SI-NEXT: v_mov_b32_e32 v39, s80
+; SI-NEXT: v_mov_b32_e32 v38, s71
+; SI-NEXT: v_mov_b32_e32 v37, s70
+; SI-NEXT: v_mov_b32_e32 v36, s69
+; SI-NEXT: v_mov_b32_e32 v35, s68
+; SI-NEXT: v_mov_b32_e32 v34, s67
+; SI-NEXT: v_mov_b32_e32 v33, s66
+; SI-NEXT: v_mov_b32_e32 v32, s65
+; SI-NEXT: v_mov_b32_e32 v31, s64
+; SI-NEXT: v_mov_b32_e32 v30, s55
; SI-NEXT: v_mov_b32_e32 v29, s54
-; SI-NEXT: v_mov_b32_e32 v28, s69
-; SI-NEXT: v_mov_b32_e32 v27, s67
-; SI-NEXT: v_mov_b32_e32 v26, s65
-; SI-NEXT: v_mov_b32_e32 v25, s80
-; SI-NEXT: v_mov_b32_e32 v24, s70
-; SI-NEXT: v_mov_b32_e32 v23, s68
-; SI-NEXT: v_mov_b32_e32 v22, s83
-; SI-NEXT: v_mov_b32_e32 v21, s81
-; SI-NEXT: v_mov_b32_e32 v19, s71
-; SI-NEXT: v_mov_b32_e32 v16, s85
-; SI-NEXT: v_mov_b32_e32 v15, s84
-; SI-NEXT: v_mov_b32_e32 v13, s82
+; SI-NEXT: v_mov_b32_e32 v28, s53
+; SI-NEXT: v_mov_b32_e32 v27, s52
+; SI-NEXT: v_mov_b32_e32 v26, s51
+; SI-NEXT: v_mov_b32_e32 v25, s50
+; SI-NEXT: v_mov_b32_e32 v24, s49
+; SI-NEXT: v_mov_b32_e32 v23, s48
+; SI-NEXT: v_mov_b32_e32 v22, s39
+; SI-NEXT: v_mov_b32_e32 v21, s38
+; SI-NEXT: v_mov_b32_e32 v20, s37
+; SI-NEXT: v_mov_b32_e32 v16, s36
+; SI-NEXT: v_mov_b32_e32 v15, s35
+; SI-NEXT: v_mov_b32_e32 v14, s34
+; SI-NEXT: v_readlane_b32 s17, v41, 1
+; SI-NEXT: v_readlane_b32 s5, v41, 3
; SI-NEXT: .LBB49_6: ; %end
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: s_lshl_b32 s5, s30, 8
-; SI-NEXT: v_or_b32_e32 v20, s5, v20
+; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
+; SI-NEXT: s_lshl_b32 s5, s16, 8
+; SI-NEXT: v_or_b32_e32 v19, s5, v19
; SI-NEXT: s_and_b32 s5, vcc_lo, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s94, 24
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v20, s5, v20
+; SI-NEXT: v_or_b32_e32 v19, s5, v19
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: s_lshl_b32 s5, s92, 8
; SI-NEXT: v_or_b32_e32 v17, s5, v17
@@ -25446,163 +25441,159 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_and_b32 s5, s62, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s60, 24
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen
; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v48
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xff, v39
; SI-NEXT: v_or_b32_e32 v12, s5, v12
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: s_lshl_b32 s5, s78, 8
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v38
; SI-NEXT: v_or_b32_e32 v10, s5, v10
; SI-NEXT: s_and_b32 s5, s76, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v38
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s74, 24
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_or_b32_e32 v20, v38, v20
+; SI-NEXT: v_or_b32_e32 v19, v38, v19
; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:8
-; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v37
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s74, 24
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: v_or_b32_e32 v13, v13, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v36
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_or_b32_e32 v14, v14, v17
-; SI-NEXT: v_and_b32_e32 v17, 0xff, v36
-; SI-NEXT: v_or_b32_e32 v10, s5, v10
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: s_lshl_b32 s5, s58, 8
; SI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:4
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v35
-; SI-NEXT: v_or_b32_e32 v8, s5, v8
-; SI-NEXT: s_and_b32 s5, s56, 0xff
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v10, s5, v10
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
+; SI-NEXT: s_lshl_b32 s5, s58, 8
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_or_b32_e32 v17, v18, v17
; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:16
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v34
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s46, 24
-; SI-NEXT: v_or_b32_e32 v14, v14, v17
+; SI-NEXT: v_or_b32_e32 v8, s5, v8
+; SI-NEXT: s_and_b32 s5, s56, 0xff
+; SI-NEXT: v_or_b32_e32 v13, v13, v17
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xff, v33
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s46, 24
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v32
-; SI-NEXT: v_or_b32_e32 v8, s5, v8
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: s_lshl_b32 s5, s44, 8
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v32
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v12, v14, v12
+; SI-NEXT: v_or_b32_e32 v12, v13, v12
; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:24
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v31
-; SI-NEXT: v_or_b32_e32 v6, s5, v6
-; SI-NEXT: s_and_b32 s5, s42, 0xff
+; SI-NEXT: v_or_b32_e32 v8, s5, v8
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
+; SI-NEXT: s_lshl_b32 s5, s44, 8
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v30
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s40, 24
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
+; SI-NEXT: s_and_b32 s5, s42, 0xff
; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v29
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s40, 24
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:32
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v28
-; SI-NEXT: v_or_b32_e32 v6, s5, v6
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: s_lshl_b32 s5, s14, 8
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v27
-; SI-NEXT: v_or_b32_e32 v4, s5, v4
-; SI-NEXT: s_and_b32 s5, s12, 0xff
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: s_lshl_b32 s5, s14, 8
; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v26
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s10, 24
+; SI-NEXT: v_or_b32_e32 v4, s5, v4
+; SI-NEXT: s_and_b32 s5, s12, 0xff
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:40
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v25
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s7, s10, 24
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xff, v24
-; SI-NEXT: v_or_b32_e32 v4, s5, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23
-; SI-NEXT: v_or_b32_e32 v2, s5, v2
-; SI-NEXT: s_and_b32 s5, s6, 0xff
+; SI-NEXT: v_or_b32_e32 v4, s5, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:48
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v22
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v21
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v19
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v20
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
+; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: v_or_b32_e32 v2, s5, v2
+; SI-NEXT: s_and_b32 s5, s6, 0xff
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s4, s4, 24
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_or_b32_e32 v2, s4, v2
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
-; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v13
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v14
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_readlane_b32 s30, v40, 28
+; SI-NEXT: v_readlane_b32 s30, v40, 24
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v40, 29
-; SI-NEXT: v_readlane_b32 s85, v40, 27
-; SI-NEXT: v_readlane_b32 s84, v40, 26
-; SI-NEXT: v_readlane_b32 s83, v40, 25
-; SI-NEXT: v_readlane_b32 s82, v40, 24
+; SI-NEXT: v_readlane_b32 s31, v40, 25
; SI-NEXT: v_readlane_b32 s81, v40, 23
; SI-NEXT: v_readlane_b32 s80, v40, 22
; SI-NEXT: v_readlane_b32 s71, v40, 21
@@ -25629,6 +25620,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_readlane_b32 s34, v40, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -25668,16 +25660,30 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_writelane_b32 v63, s53, 11
; VI-NEXT: v_writelane_b32 v63, s54, 12
; VI-NEXT: v_writelane_b32 v63, s55, 13
-; VI-NEXT: v_writelane_b32 v63, s64, 14
-; VI-NEXT: v_writelane_b32 v63, s65, 15
-; VI-NEXT: v_writelane_b32 v63, s30, 16
-; VI-NEXT: v_writelane_b32 v63, s31, 17
+; VI-NEXT: v_writelane_b32 v63, s30, 14
+; VI-NEXT: v_writelane_b32 v63, s31, 15
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB49_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s46, s19, 16
+; VI-NEXT: s_lshr_b32 s47, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s51, s17, 24
+; VI-NEXT: s_lshr_b32 s52, s17, 16
+; VI-NEXT: s_lshr_b32 s53, s17, 8
+; VI-NEXT: s_lshr_b32 s54, s16, 16
+; VI-NEXT: s_lshr_b32 s55, s16, 8
+; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; VI-NEXT: s_lshr_b32 s56, s5, 24
; VI-NEXT: s_lshr_b32 s57, s5, 16
; VI-NEXT: s_lshr_b32 s59, s5, 8
@@ -25700,58 +25706,50 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s31, s23, 8
-; VI-NEXT: s_lshr_b32 s30, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
+; VI-NEXT: s_lshr_b32 s49, s23, 8
+; VI-NEXT: s_lshr_b32 s39, s22, 16
+; VI-NEXT: s_lshr_b32 s48, s22, 8
+; VI-NEXT: s_lshr_b32 s36, s21, 24
+; VI-NEXT: s_lshr_b32 s37, s21, 16
; VI-NEXT: s_lshr_b32 s38, s21, 8
-; VI-NEXT: s_lshr_b32 s37, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s51, s19, 8
-; VI-NEXT: s_lshr_b32 s50, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s64, s17, 8
-; VI-NEXT: s_lshr_b32 s55, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
-; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_lshr_b32 s34, s20, 16
+; VI-NEXT: s_lshr_b32 s35, s20, 8
+; VI-NEXT: s_lshr_b32 s31, s19, 24
+; VI-NEXT: s_lshr_b32 s30, s19, 8
+; VI-NEXT: s_mov_b32 s9, s55
+; VI-NEXT: s_mov_b32 s15, s53
+; VI-NEXT: s_mov_b32 s7, s54
+; VI-NEXT: s_mov_b32 s13, s52
+; VI-NEXT: s_mov_b32 s11, s51
+; VI-NEXT: s_mov_b32 s43, s50
+; VI-NEXT: s_mov_b32 s41, s47
+; VI-NEXT: s_mov_b32 s45, s46
; VI-NEXT: s_mov_b64 s[46:47], 0
; VI-NEXT: s_branch .LBB49_3
; VI-NEXT: .LBB49_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr9
+; VI-NEXT: ; implicit-def: $sgpr7
; VI-NEXT: ; implicit-def: $sgpr6
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr15
+; VI-NEXT: ; implicit-def: $sgpr13
+; VI-NEXT: ; implicit-def: $sgpr11
+; VI-NEXT: ; implicit-def: $sgpr43
+; VI-NEXT: ; implicit-def: $sgpr41
; VI-NEXT: ; implicit-def: $sgpr8
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr49
-; VI-NEXT: ; implicit-def: $sgpr48
-; VI-NEXT: ; implicit-def: $sgpr39
-; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr31
+; VI-NEXT: ; implicit-def: $sgpr35
+; VI-NEXT: ; implicit-def: $sgpr34
; VI-NEXT: ; implicit-def: $sgpr10
; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr37
; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr35
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr48
+; VI-NEXT: ; implicit-def: $sgpr39
; VI-NEXT: ; implicit-def: $sgpr12
-; VI-NEXT: ; implicit-def: $sgpr31
+; VI-NEXT: ; implicit-def: $sgpr49
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -25780,8 +25778,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: .LBB49_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
; VI-NEXT: s_cbranch_scc1 .LBB49_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_add_f32_e64 v6, s27, 1.0
@@ -25874,24 +25872,24 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v4, s29
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_mov_b32_e32 v2, s5
-; VI-NEXT: v_mov_b32_e32 v15, s65
-; VI-NEXT: v_mov_b32_e32 v16, s55
-; VI-NEXT: v_mov_b32_e32 v62, s64
-; VI-NEXT: v_mov_b32_e32 v59, s54
-; VI-NEXT: v_mov_b32_e32 v60, s53
-; VI-NEXT: v_mov_b32_e32 v58, s52
-; VI-NEXT: v_mov_b32_e32 v61, s50
-; VI-NEXT: v_mov_b32_e32 v57, s51
-; VI-NEXT: v_mov_b32_e32 v47, s49
-; VI-NEXT: v_mov_b32_e32 v56, s48
-; VI-NEXT: v_mov_b32_e32 v46, s39
-; VI-NEXT: v_mov_b32_e32 v45, s37
+; VI-NEXT: v_mov_b32_e32 v15, s9
+; VI-NEXT: v_mov_b32_e32 v16, s7
+; VI-NEXT: v_mov_b32_e32 v62, s15
+; VI-NEXT: v_mov_b32_e32 v59, s13
+; VI-NEXT: v_mov_b32_e32 v60, s11
+; VI-NEXT: v_mov_b32_e32 v58, s43
+; VI-NEXT: v_mov_b32_e32 v61, s41
+; VI-NEXT: v_mov_b32_e32 v57, s30
+; VI-NEXT: v_mov_b32_e32 v47, s45
+; VI-NEXT: v_mov_b32_e32 v56, s31
+; VI-NEXT: v_mov_b32_e32 v46, s35
+; VI-NEXT: v_mov_b32_e32 v45, s34
; VI-NEXT: v_mov_b32_e32 v44, s38
-; VI-NEXT: v_mov_b32_e32 v42, s36
-; VI-NEXT: v_mov_b32_e32 v43, s35
-; VI-NEXT: v_mov_b32_e32 v41, s34
-; VI-NEXT: v_mov_b32_e32 v40, s30
-; VI-NEXT: v_mov_b32_e32 v55, s31
+; VI-NEXT: v_mov_b32_e32 v42, s37
+; VI-NEXT: v_mov_b32_e32 v43, s36
+; VI-NEXT: v_mov_b32_e32 v41, s48
+; VI-NEXT: v_mov_b32_e32 v40, s39
+; VI-NEXT: v_mov_b32_e32 v55, s49
; VI-NEXT: v_mov_b32_e32 v53, vcc_hi
; VI-NEXT: v_mov_b32_e32 v54, vcc_lo
; VI-NEXT: v_mov_b32_e32 v52, s91
@@ -25988,10 +25986,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v3, v34, s4
; VI-NEXT: v_perm_b32 v1, v1, v29, s4
-; VI-NEXT: v_readlane_b32 s30, v63, 16
-; VI-NEXT: v_readlane_b32 s31, v63, 17
-; VI-NEXT: v_readlane_b32 s65, v63, 15
-; VI-NEXT: v_readlane_b32 s64, v63, 14
+; VI-NEXT: v_readlane_b32 s30, v63, 14
+; VI-NEXT: v_readlane_b32 s31, v63, 15
; VI-NEXT: v_readlane_b32 s55, v63, 13
; VI-NEXT: v_readlane_b32 s54, v63, 12
; VI-NEXT: v_readlane_b32 s53, v63, 11
@@ -26080,16 +26076,30 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: v_writelane_b32 v63, s49, 7
; GFX9-NEXT: v_writelane_b32 v63, s50, 8
; GFX9-NEXT: v_writelane_b32 v63, s51, 9
-; GFX9-NEXT: v_writelane_b32 v63, s52, 10
-; GFX9-NEXT: v_writelane_b32 v63, s53, 11
-; GFX9-NEXT: v_writelane_b32 v63, s30, 12
-; GFX9-NEXT: v_writelane_b32 v63, s31, 13
+; GFX9-NEXT: v_writelane_b32 v63, s30, 10
+; GFX9-NEXT: v_writelane_b32 v63, s31, 11
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB49_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: s_lshr_b32 s47, s18, 16
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 16
+; GFX9-NEXT: s_lshr_b32 s51, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: s_lshr_b32 s57, s5, 16
; GFX9-NEXT: s_lshr_b32 s59, s5, 8
@@ -26116,49 +26126,41 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: s_lshr_b32 s94, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s34, s21, 8
-; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s36, s21, 16
+; GFX9-NEXT: s_lshr_b32 s37, s21, 8
+; GFX9-NEXT: s_lshr_b32 s34, s20, 16
; GFX9-NEXT: s_lshr_b32 s35, s20, 8
-; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s39, s19, 8
-; GFX9-NEXT: s_lshr_b32 s38, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s52, s17, 8
-; GFX9-NEXT: s_lshr_b32 s51, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX9-NEXT: s_lshr_b32 s31, s19, 24
+; GFX9-NEXT: s_lshr_b32 s30, s19, 8
+; GFX9-NEXT: s_mov_b32 s9, s51
+; GFX9-NEXT: s_mov_b32 s15, s49
+; GFX9-NEXT: s_mov_b32 s7, s50
+; GFX9-NEXT: s_mov_b32 s13, s48
+; GFX9-NEXT: s_mov_b32 s11, s39
+; GFX9-NEXT: s_mov_b32 s43, s38
+; GFX9-NEXT: s_mov_b32 s41, s47
+; GFX9-NEXT: s_mov_b32 s45, s46
; GFX9-NEXT: s_mov_b64 s[46:47], 0
; GFX9-NEXT: s_branch .LBB49_3
; GFX9-NEXT: .LBB49_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $sgpr6
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr15
+; GFX9-NEXT: ; implicit-def: $sgpr13
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr43
+; GFX9-NEXT: ; implicit-def: $sgpr41
; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr37
-; GFX9-NEXT: ; implicit-def: $sgpr36
-; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $vcc_hi
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -26192,8 +26194,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: .LBB49_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB49_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_add_f32_e64 v6, s27, 1.0
@@ -26289,20 +26291,20 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v4, s29
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_mov_b32_e32 v2, s5
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: v_mov_b32_e32 v16, s51
-; GFX9-NEXT: v_mov_b32_e32 v62, s52
-; GFX9-NEXT: v_mov_b32_e32 v59, s50
-; GFX9-NEXT: v_mov_b32_e32 v60, s49
-; GFX9-NEXT: v_mov_b32_e32 v58, s48
-; GFX9-NEXT: v_mov_b32_e32 v61, s38
-; GFX9-NEXT: v_mov_b32_e32 v57, s39
-; GFX9-NEXT: v_mov_b32_e32 v47, s37
-; GFX9-NEXT: v_mov_b32_e32 v56, s36
+; GFX9-NEXT: v_mov_b32_e32 v15, s9
+; GFX9-NEXT: v_mov_b32_e32 v16, s7
+; GFX9-NEXT: v_mov_b32_e32 v62, s15
+; GFX9-NEXT: v_mov_b32_e32 v59, s13
+; GFX9-NEXT: v_mov_b32_e32 v60, s11
+; GFX9-NEXT: v_mov_b32_e32 v58, s43
+; GFX9-NEXT: v_mov_b32_e32 v61, s41
+; GFX9-NEXT: v_mov_b32_e32 v57, s30
+; GFX9-NEXT: v_mov_b32_e32 v47, s45
+; GFX9-NEXT: v_mov_b32_e32 v56, s31
; GFX9-NEXT: v_mov_b32_e32 v46, s35
-; GFX9-NEXT: v_mov_b32_e32 v45, s31
-; GFX9-NEXT: v_mov_b32_e32 v44, s34
-; GFX9-NEXT: v_mov_b32_e32 v42, s30
+; GFX9-NEXT: v_mov_b32_e32 v45, s34
+; GFX9-NEXT: v_mov_b32_e32 v44, s37
+; GFX9-NEXT: v_mov_b32_e32 v42, s36
; GFX9-NEXT: v_mov_b32_e32 v43, vcc_hi
; GFX9-NEXT: v_mov_b32_e32 v41, vcc_lo
; GFX9-NEXT: v_mov_b32_e32 v40, s94
@@ -26405,10 +26407,8 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4
-; GFX9-NEXT: v_readlane_b32 s30, v63, 12
-; GFX9-NEXT: v_readlane_b32 s31, v63, 13
-; GFX9-NEXT: v_readlane_b32 s53, v63, 11
-; GFX9-NEXT: v_readlane_b32 s52, v63, 10
+; GFX9-NEXT: v_readlane_b32 s30, v63, 10
+; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
; GFX9-NEXT: v_readlane_b32 s50, v63, 8
; GFX9-NEXT: v_readlane_b32 s49, v63, 7
@@ -26482,6 +26482,22 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX11-NEXT: s_mov_b32 s42, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB49_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s31, s3, 8
+; GFX11-NEXT: s_lshr_b32 s34, s2, 16
+; GFX11-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-NEXT: s_lshr_b32 s38, s1, 8
+; GFX11-NEXT: s_lshr_b32 s39, s0, 16
+; GFX11-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: s_lshr_b32 s43, s27, 24
; GFX11-NEXT: s_lshr_b32 s44, s27, 16
; GFX11-NEXT: s_lshr_b32 s46, s27, 8
@@ -26514,35 +26530,27 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-NEXT: s_mov_b32 s5, s48
+; GFX11-NEXT: s_mov_b32 s9, s38
+; GFX11-NEXT: s_mov_b32 s7, s39
+; GFX11-NEXT: s_mov_b32 s11, s37
+; GFX11-NEXT: s_mov_b32 s13, s36
+; GFX11-NEXT: s_mov_b32 s15, s35
+; GFX11-NEXT: s_mov_b32 s41, s31
+; GFX11-NEXT: s_mov_b32 s29, s34
; GFX11-NEXT: s_branch .LBB49_3
; GFX11-NEXT: .LBB49_2:
; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr7
; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr9
+; GFX11-NEXT: ; implicit-def: $sgpr11
+; GFX11-NEXT: ; implicit-def: $sgpr13
+; GFX11-NEXT: ; implicit-def: $sgpr15
+; GFX11-NEXT: ; implicit-def: $sgpr29
; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr41
; GFX11-NEXT: ; implicit-def: $sgpr30
; GFX11-NEXT: ; implicit-def: $vcc_hi
; GFX11-NEXT: ; implicit-def: $vcc_lo
@@ -26583,9 +26591,9 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: .LBB49_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB49_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: v_add_f32_e64 v4, s25, 1.0
@@ -26662,10 +26670,10 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v96, s7
+; GFX11-NEXT: v_dual_mov_b32 v83, s9 :: v_dual_mov_b32 v86, s11
+; GFX11-NEXT: v_dual_mov_b32 v87, s13 :: v_dual_mov_b32 v82, s15
+; GFX11-NEXT: v_dual_mov_b32 v84, s29 :: v_dual_mov_b32 v71, s41
; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
@@ -36322,22 +36330,11 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-LABEL: bitcast_v32bf16_to_v8i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s42, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
@@ -36374,26 +36371,26 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s40
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21
@@ -36409,40 +36406,62 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42
; SI-NEXT: s_cbranch_scc0 .LBB67_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v34
; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62
-; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; SI-NEXT: v_lshr_b64 v[2:3], v[38:39], 16
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v30
; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
+; SI-NEXT: v_mov_b32_e32 v7, v38
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v26
; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58
+; SI-NEXT: v_mov_b32_e32 v8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
+; SI-NEXT: v_mov_b32_e32 v38, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[35:36], 16
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; SI-NEXT: v_mov_b32_e32 v9, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_mov_b32_e32 v36, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v56
+; SI-NEXT: v_mov_b32_e32 v10, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_mov_b32_e32 v34, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[31:32], 16
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_mov_b32_e32 v11, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_mov_b32_e32 v32, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[29:30], 16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
+; SI-NEXT: v_mov_b32_e32 v12, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v43
+; SI-NEXT: v_mov_b32_e32 v30, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[27:28], 16
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
+; SI-NEXT: v_mov_b32_e32 v13, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; SI-NEXT: v_mov_b32_e32 v28, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[25:26], 16
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v44
+; SI-NEXT: v_mov_b32_e32 v14, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v42
+; SI-NEXT: v_mov_b32_e32 v26, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[23:24], 16
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v41
+; SI-NEXT: v_mov_b32_e32 v24, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[21:22], 16
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v42
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v40
+; SI-NEXT: v_mov_b32_e32 v22, v15
; SI-NEXT: v_lshr_b64 v[14:15], v[19:20], 16
+; SI-NEXT: v_mov_b32_e32 v20, v39
+; SI-NEXT: v_mov_b32_e32 v39, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_mov_b32_e32 v20, v16
+; SI-NEXT: v_mov_b32_e32 v49, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v16, v20
+; SI-NEXT: v_mov_b32_e32 v18, v39
+; SI-NEXT: v_mov_b32_e32 v16, v49
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB67_3
; SI-NEXT: .LBB67_2:
@@ -36454,10 +36473,10 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB67_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
@@ -36466,79 +36485,79 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v28
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v26
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v24
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v31
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v44
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v43
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v18
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v25
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v42
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v41
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v40
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
@@ -36551,22 +36570,11 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: .LBB67_5: ; %end
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -38413,17 +38421,15 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
@@ -38434,6 +38440,8 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
@@ -38453,8 +38461,8 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr29
+; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -38471,11 +38479,11 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v26, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
@@ -38495,26 +38503,27 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB68_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB68_4
@@ -38541,12 +38550,12 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -38565,65 +38574,65 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
; VI-NEXT: .LBB68_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v23, v28, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v23, v63, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v63, v62, s4
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
+; VI-NEXT: v_perm_b32 v1, v60, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_perm_b32 v1, v3, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: v_perm_b32 v2, v56, v47, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v59, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: v_perm_b32 v2, v45, v25, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v56, s4
+; VI-NEXT: v_perm_b32 v1, v5, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: v_perm_b32 v2, v43, v42, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v46, s4
+; VI-NEXT: v_perm_b32 v1, v6, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: v_perm_b32 v2, v40, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v43, s4
+; VI-NEXT: v_perm_b32 v1, v7, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: v_perm_b32 v2, v24, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v41, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v53, v20, s4
@@ -38663,7 +38672,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v24, s4
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
@@ -38709,19 +38718,15 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -38733,6 +38738,8 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -38750,9 +38757,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr29
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -38762,18 +38770,22 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB68_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_mov_b32_e32 v31, v22
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -38790,29 +38802,26 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
; GFX9-NEXT: .LBB68_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB68_4
@@ -38839,13 +38848,13 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -38862,60 +38871,59 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB68_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -38942,16 +38950,14 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v29, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -39467,8 +39473,9 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v4, s34, 0
; SI-NEXT: v_writelane_b32 v4, s35, 1
; SI-NEXT: v_writelane_b32 v4, s36, 2
@@ -39488,48 +39495,61 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: v_writelane_b32 v4, s66, 16
; SI-NEXT: v_writelane_b32 v4, s67, 17
; SI-NEXT: v_writelane_b32 v4, s68, 18
-; SI-NEXT: v_writelane_b32 v4, s69, 19
-; SI-NEXT: v_writelane_b32 v4, s70, 20
-; SI-NEXT: v_writelane_b32 v4, s71, 21
-; SI-NEXT: v_writelane_b32 v4, s80, 22
-; SI-NEXT: v_writelane_b32 v4, s81, 23
-; SI-NEXT: v_writelane_b32 v4, s82, 24
-; SI-NEXT: v_writelane_b32 v4, s83, 25
-; SI-NEXT: v_writelane_b32 v4, s84, 26
-; SI-NEXT: v_writelane_b32 v4, s85, 27
-; SI-NEXT: v_writelane_b32 v4, s30, 28
-; SI-NEXT: v_writelane_b32 v4, s31, 29
+; SI-NEXT: v_writelane_b32 v4, s30, 19
+; SI-NEXT: v_writelane_b32 v4, s31, 20
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: v_readfirstlane_b32 s4, v1
+; SI-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB69_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
-; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; SI-NEXT: s_lshr_b32 s8, s29, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v5, s8, 0
+; SI-NEXT: s_lshr_b32 s8, s29, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 1
+; SI-NEXT: s_lshr_b32 s8, s27, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 2
+; SI-NEXT: s_lshr_b32 s8, s27, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 3
+; SI-NEXT: s_lshr_b32 s8, s27, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 4
+; SI-NEXT: s_lshr_b32 s8, s25, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 5
+; SI-NEXT: s_lshr_b32 s8, s25, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 6
+; SI-NEXT: s_lshr_b32 s8, s25, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 7
+; SI-NEXT: s_lshr_b32 s8, s23, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 8
+; SI-NEXT: s_lshr_b32 s8, s23, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 9
+; SI-NEXT: s_lshr_b32 s8, s23, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 10
+; SI-NEXT: s_lshr_b32 s8, s21, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 11
+; SI-NEXT: s_lshr_b32 s8, s21, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 12
+; SI-NEXT: s_lshr_b32 s8, s21, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 13
+; SI-NEXT: s_lshr_b32 s8, s19, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 14
+; SI-NEXT: s_lshr_b32 s8, s19, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 15
+; SI-NEXT: s_lshr_b32 s8, s19, 8
+; SI-NEXT: v_writelane_b32 v5, s8, 16
+; SI-NEXT: s_lshr_b32 s8, s17, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 17
+; SI-NEXT: s_lshr_b32 s8, s17, 16
+; SI-NEXT: v_writelane_b32 v5, s8, 18
+; SI-NEXT: s_lshr_b32 s8, s17, 8
+; SI-NEXT: s_lshr_b32 s48, s5, 24
+; SI-NEXT: s_lshr_b32 s49, s5, 16
+; SI-NEXT: s_lshr_b32 s7, s5, 8
+; SI-NEXT: s_lshr_b32 s6, s29, 24
+; SI-NEXT: v_writelane_b32 v5, s8, 19
+; SI-NEXT: s_lshr_b64 s[58:59], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8
; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 24
@@ -39539,16 +39559,16 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
@@ -39556,45 +39576,28 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_mov_b64 s[36:37], 0
; SI-NEXT: s_branch .LBB69_3
; SI-NEXT: .LBB69_2:
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: s_mov_b64 s[36:37], -1
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr7
; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr44
@@ -39604,11 +39607,72 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: .LBB69_3: ; %Flow
; SI-NEXT: s_and_b64 s[36:37], s[36:37], exec
-; SI-NEXT: s_cselect_b32 s7, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s7, 1
+; SI-NEXT: s_cselect_b32 s9, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s9, 1
+; SI-NEXT: s_mov_b32 s36, s48
+; SI-NEXT: s_mov_b32 s37, s49
+; SI-NEXT: s_mov_b32 s9, s6
+; SI-NEXT: v_readlane_b32 s48, v5, 0
+; SI-NEXT: v_readlane_b32 s59, v5, 1
+; SI-NEXT: v_readlane_b32 s11, v5, 2
+; SI-NEXT: v_readlane_b32 s49, v5, 3
+; SI-NEXT: v_readlane_b32 s50, v5, 4
+; SI-NEXT: v_readlane_b32 s13, v5, 5
+; SI-NEXT: v_readlane_b32 s51, v5, 6
+; SI-NEXT: v_readlane_b32 s52, v5, 7
+; SI-NEXT: v_readlane_b32 s15, v5, 8
+; SI-NEXT: v_readlane_b32 s53, v5, 9
+; SI-NEXT: v_readlane_b32 s54, v5, 10
+; SI-NEXT: v_readlane_b32 s41, v5, 11
+; SI-NEXT: v_readlane_b32 s55, v5, 12
+; SI-NEXT: v_readlane_b32 s64, v5, 13
+; SI-NEXT: v_readlane_b32 s43, v5, 14
+; SI-NEXT: v_readlane_b32 s65, v5, 15
+; SI-NEXT: v_readlane_b32 s66, v5, 16
+; SI-NEXT: v_readlane_b32 s45, v5, 17
+; SI-NEXT: v_readlane_b32 s67, v5, 18
+; SI-NEXT: v_readlane_b32 s68, v5, 19
+; SI-NEXT: s_mov_b32 s6, s58
; SI-NEXT: s_cbranch_scc1 .LBB69_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -39627,255 +39691,254 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
+; SI-NEXT: s_lshr_b32 s8, s5, 8
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; SI-NEXT: s_lshr_b32 s10, s29, 24
+; SI-NEXT: s_mov_b32 s7, s8
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s12, s27, 24
+; SI-NEXT: s_mov_b32 s9, s10
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8
+; SI-NEXT: s_lshr_b32 s14, s25, 24
+; SI-NEXT: s_mov_b32 s11, s12
; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 24
+; SI-NEXT: s_lshr_b32 s40, s23, 24
+; SI-NEXT: s_mov_b32 s13, s14
; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s42, s21, 24
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 8
+; SI-NEXT: s_lshr_b32 s44, s19, 24
+; SI-NEXT: s_mov_b32 s41, s42
; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 24
+; SI-NEXT: s_lshr_b32 s46, s17, 24
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16
+; SI-NEXT: s_lshr_b32 s36, s5, 24
+; SI-NEXT: s_lshr_b32 s37, s5, 16
+; SI-NEXT: s_lshr_b32 s48, s29, 16
+; SI-NEXT: s_lshr_b32 s59, s29, 8
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s27, 8
+; SI-NEXT: s_lshr_b32 s51, s25, 16
+; SI-NEXT: s_lshr_b32 s52, s25, 8
+; SI-NEXT: s_lshr_b32 s53, s23, 16
+; SI-NEXT: s_lshr_b32 s54, s23, 8
+; SI-NEXT: s_lshr_b32 s55, s21, 16
+; SI-NEXT: s_lshr_b32 s64, s21, 8
+; SI-NEXT: s_lshr_b32 s65, s19, 16
+; SI-NEXT: s_lshr_b32 s66, s19, 8
+; SI-NEXT: s_lshr_b32 s67, s17, 16
+; SI-NEXT: s_lshr_b32 s68, s17, 8
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8
; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: .LBB69_5: ; %end
-; SI-NEXT: s_lshl_b32 s7, s34, 8
-; SI-NEXT: s_and_b32 s9, s16, 0xff
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s9, s30, 0xff
-; SI-NEXT: s_lshl_b32 s11, vcc_lo, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s17, 0xff
-; SI-NEXT: s_lshl_b32 s9, s85, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s84, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s83, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v2, s7
-; SI-NEXT: s_lshl_b32 s7, s94, 8
-; SI-NEXT: s_and_b32 s9, s18, 0xff
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s9, s92, 0xff
-; SI-NEXT: s_lshl_b32 s11, s90, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: v_mov_b32_e32 v3, s7
-; SI-NEXT: s_and_b32 s7, s19, 0xff
-; SI-NEXT: s_lshl_b32 s9, s82, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s81, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s80, 24
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_lshl_b32 s47, s34, 8
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_or_b32 s16, s16, s47
+; SI-NEXT: s_and_b32 s47, s30, 0xff
+; SI-NEXT: s_lshl_b32 s57, vcc_lo, 24
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s47, s57, s47
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s47
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s17, 0xff
+; SI-NEXT: s_lshl_b32 s17, s68, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s67, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s45, s45, 24
+; SI-NEXT: s_or_b32 s17, s45, s17
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: s_lshl_b32 s16, s94, 8
+; SI-NEXT: s_and_b32 s17, s18, 0xff
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s17, s90, 0xff
+; SI-NEXT: s_lshl_b32 s18, s92, 24
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_mov_b32_e32 v3, s16
+; SI-NEXT: s_and_b32 s16, s19, 0xff
+; SI-NEXT: s_lshl_b32 s17, s66, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s65, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s18, s43, 24
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s20, 0xff
-; SI-NEXT: s_lshl_b32 s9, s76, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s72, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s62, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s20, 0xff
+; SI-NEXT: s_lshl_b32 s17, s78, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s74, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s18, s72, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s21, 0xff
-; SI-NEXT: s_lshl_b32 s9, s71, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s70, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s69, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s21, 0xff
+; SI-NEXT: s_lshl_b32 s17, s64, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s55, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s18, s41, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s22, 0xff
-; SI-NEXT: s_lshl_b32 s9, s88, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s78, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s74, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s22, 0xff
+; SI-NEXT: s_lshl_b32 s17, s38, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s88, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s18, s76, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s18, s17
+; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s23, 0xff
-; SI-NEXT: s_lshl_b32 s9, s68, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s67, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s66, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: s_and_b32 s16, s23, 0xff
+; SI-NEXT: s_lshl_b32 s17, s54, 8
+; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_and_b32 s17, s53, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s15, s15, 24
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s15, s15, s17
+; SI-NEXT: s_or_b32 s15, s16, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s24, 0xff
-; SI-NEXT: s_lshl_b32 s9, s60, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s58, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s56, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s15
+; SI-NEXT: s_and_b32 s15, s24, 0xff
+; SI-NEXT: s_lshl_b32 s16, s62, 8
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_and_b32 s16, s60, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s17, s56, 24
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_or_b32 s15, s15, s16
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s25, 0xff
-; SI-NEXT: s_lshl_b32 s9, s65, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s64, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s55, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s15
+; SI-NEXT: s_and_b32 s15, s25, 0xff
+; SI-NEXT: s_lshl_b32 s16, s52, 8
+; SI-NEXT: s_or_b32 s15, s15, s16
+; SI-NEXT: s_and_b32 s16, s51, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_lshl_b32 s13, s13, 24
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_or_b32 s13, s13, s16
+; SI-NEXT: s_or_b32 s13, s15, s13
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s26, 0xff
-; SI-NEXT: s_lshl_b32 s9, s46, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s44, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s42, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s26, 0xff
+; SI-NEXT: s_lshl_b32 s15, s46, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s44, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s16, s42, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s15, s16, s15
+; SI-NEXT: s_or_b32 s13, s13, s15
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s27, 0xff
-; SI-NEXT: s_lshl_b32 s9, s54, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s53, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s52, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s13
+; SI-NEXT: s_and_b32 s13, s27, 0xff
+; SI-NEXT: s_lshl_b32 s15, s50, 8
+; SI-NEXT: s_or_b32 s13, s13, s15
+; SI-NEXT: s_and_b32 s15, s49, 0xff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s11, s11, s15
+; SI-NEXT: s_or_b32 s11, s13, s11
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s28, 0xff
-; SI-NEXT: s_lshl_b32 s9, s40, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s14, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s12, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s28, 0xff
+; SI-NEXT: s_lshl_b32 s13, s40, 8
+; SI-NEXT: s_or_b32 s11, s11, s13
+; SI-NEXT: s_and_b32 s13, s14, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
-; SI-NEXT: s_and_b32 s7, s29, 0xff
-; SI-NEXT: s_lshl_b32 s9, s51, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s50, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s49, 24
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: v_mov_b32_e32 v1, s11
+; SI-NEXT: s_and_b32 s11, s29, 0xff
+; SI-NEXT: s_lshl_b32 s12, s59, 8
+; SI-NEXT: s_or_b32 s11, s11, s12
+; SI-NEXT: s_and_b32 s12, s48, 0xff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s12
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v1, s7
+; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s7, s10, 8
-; SI-NEXT: s_or_b32 s4, s4, s7
-; SI-NEXT: s_and_b32 s7, s8, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s10, 8
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_or_b32 s4, s4, s9
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s48, 8
+; SI-NEXT: s_lshl_b32 s5, s7, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s39, 0xff
+; SI-NEXT: s_and_b32 s5, s37, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s38, 24
+; SI-NEXT: s_lshl_b32 s6, s36, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v4, 28
+; SI-NEXT: v_readlane_b32 s30, v4, 19
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v4, 29
-; SI-NEXT: v_readlane_b32 s85, v4, 27
-; SI-NEXT: v_readlane_b32 s84, v4, 26
-; SI-NEXT: v_readlane_b32 s83, v4, 25
-; SI-NEXT: v_readlane_b32 s82, v4, 24
-; SI-NEXT: v_readlane_b32 s81, v4, 23
-; SI-NEXT: v_readlane_b32 s80, v4, 22
-; SI-NEXT: v_readlane_b32 s71, v4, 21
-; SI-NEXT: v_readlane_b32 s70, v4, 20
-; SI-NEXT: v_readlane_b32 s69, v4, 19
+; SI-NEXT: v_readlane_b32 s31, v4, 20
; SI-NEXT: v_readlane_b32 s68, v4, 18
; SI-NEXT: v_readlane_b32 s67, v4, 17
; SI-NEXT: v_readlane_b32 s66, v4, 16
@@ -39897,6 +39960,7 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: v_readlane_b32 s34, v4, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -39920,17 +39984,22 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: v_writelane_b32 v4, s52, 10
; VI-NEXT: v_writelane_b32 v4, s53, 11
; VI-NEXT: v_writelane_b32 v4, s54, 12
-; VI-NEXT: v_writelane_b32 v4, s55, 13
-; VI-NEXT: v_writelane_b32 v4, s64, 14
-; VI-NEXT: v_writelane_b32 v4, s65, 15
-; VI-NEXT: v_writelane_b32 v4, s30, 16
-; VI-NEXT: v_writelane_b32 v4, s31, 17
+; VI-NEXT: v_writelane_b32 v4, s30, 13
+; VI-NEXT: v_writelane_b32 v4, s31, 14
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB69_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s8, s23, 8
+; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; VI-NEXT: s_lshr_b32 s10, s19, 24
+; VI-NEXT: s_mov_b32 s7, s8
+; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
+; VI-NEXT: s_lshr_b32 s12, s17, 8
+; VI-NEXT: s_mov_b32 s9, s10
+; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
; VI-NEXT: s_lshr_b32 s56, s5, 24
; VI-NEXT: s_lshr_b32 s57, s5, 16
; VI-NEXT: s_lshr_b32 s58, s5, 8
@@ -39953,27 +40022,22 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
-; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
+; VI-NEXT: s_mov_b32 s11, s12
; VI-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
; VI-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
; VI-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
@@ -39983,28 +40047,28 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: s_branch .LBB69_3
; VI-NEXT: .LBB69_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr44
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr44
+; VI-NEXT: ; implicit-def: $sgpr11
; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr42
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr50
; VI-NEXT: ; implicit-def: $sgpr49
+; VI-NEXT: ; implicit-def: $sgpr42
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr34
; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr14
+; VI-NEXT: ; implicit-def: $sgpr7
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -40033,8 +40097,8 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: .LBB69_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s13, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s13, 1
; VI-NEXT: s_cbranch_scc1 .LBB69_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s16, s16, 3
@@ -40083,77 +40147,77 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
+; VI-NEXT: s_lshr_b32 s7, s23, 8
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s9, s19, 24
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s11, s17, 8
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
; VI-NEXT: .LBB69_5: ; %end
; VI-NEXT: v_mov_b32_e32 v2, 0xc0c0004
; VI-NEXT: v_mov_b32_e32 v3, s44
-; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: v_perm_b32 v3, s64, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s54
+; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s16, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s53
+; VI-NEXT: v_mov_b32_e32 v3, s52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: v_perm_b32 v3, s54, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s11
+; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s42
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_mov_b32_e32 v1, s52
-; VI-NEXT: v_perm_b32 v3, s51, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s50
+; VI-NEXT: v_perm_b32 v3, s49, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v3, s9
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: v_perm_b32 v3, s49, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s48
+; VI-NEXT: v_perm_b32 v3, s39, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s40
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_mov_b32_e32 v1, s39
-; VI-NEXT: v_perm_b32 v3, s38, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s38
+; VI-NEXT: v_perm_b32 v3, s37, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s35
+; VI-NEXT: v_mov_b32_e32 v3, s34
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_mov_b32_e32 v1, s37
-; VI-NEXT: v_perm_b32 v3, s36, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s36
+; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s14
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_mov_b32_e32 v1, s34
-; VI-NEXT: v_perm_b32 v3, s31, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s31
+; VI-NEXT: v_perm_b32 v3, s30, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, vcc_lo
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_mov_b32_e32 v1, s30
+; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_perm_b32 v3, vcc_hi, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -40214,12 +40278,9 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_readlane_b32 s30, v4, 16
+; VI-NEXT: v_readlane_b32 s30, v4, 13
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_readlane_b32 s31, v4, 17
-; VI-NEXT: v_readlane_b32 s65, v4, 15
-; VI-NEXT: v_readlane_b32 s64, v4, 14
-; VI-NEXT: v_readlane_b32 s55, v4, 13
+; VI-NEXT: v_readlane_b32 s31, v4, 14
; VI-NEXT: v_readlane_b32 s54, v4, 12
; VI-NEXT: v_readlane_b32 s53, v4, 11
; VI-NEXT: v_readlane_b32 s52, v4, 10
@@ -40254,17 +40315,22 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: v_writelane_b32 v4, s48, 6
; GFX9-NEXT: v_writelane_b32 v4, s49, 7
; GFX9-NEXT: v_writelane_b32 v4, s50, 8
-; GFX9-NEXT: v_writelane_b32 v4, s51, 9
-; GFX9-NEXT: v_writelane_b32 v4, s52, 10
-; GFX9-NEXT: v_writelane_b32 v4, s53, 11
-; GFX9-NEXT: v_writelane_b32 v4, s30, 12
-; GFX9-NEXT: v_writelane_b32 v4, s31, 13
+; GFX9-NEXT: v_writelane_b32 v4, s30, 9
+; GFX9-NEXT: v_writelane_b32 v4, s31, 10
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB69_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s8, s21, 16
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; GFX9-NEXT: s_lshr_b32 s10, s18, 16
+; GFX9-NEXT: s_mov_b32 s7, s8
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
+; GFX9-NEXT: s_lshr_b32 s12, s16, 16
+; GFX9-NEXT: s_mov_b32 s9, s10
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: s_lshr_b32 s57, s5, 16
; GFX9-NEXT: s_lshr_b32 s58, s5, 8
@@ -40291,23 +40357,18 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: s_lshr_b32 s95, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s31, s21, 8
-; GFX9-NEXT: s_lshr_b32 s34, s20, 16
-; GFX9-NEXT: s_lshr_b32 s35, s20, 8
+; GFX9-NEXT: s_lshr_b32 s30, s21, 8
+; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s34, s20, 8
; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s38, s19, 8
-; GFX9-NEXT: s_lshr_b32 s39, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s51, s17, 8
-; GFX9-NEXT: s_lshr_b32 s52, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
+; GFX9-NEXT: s_lshr_b32 s35, s19, 16
+; GFX9-NEXT: s_lshr_b32 s37, s19, 8
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 8
+; GFX9-NEXT: s_mov_b32 s11, s12
; GFX9-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
; GFX9-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
; GFX9-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
@@ -40317,23 +40378,23 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: s_branch .LBB69_3
; GFX9-NEXT: .LBB69_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr44
-; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr44
; GFX9-NEXT: ; implicit-def: $sgpr49
; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr37
-; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr40
; GFX9-NEXT: ; implicit-def: $sgpr31
+; GFX9-NEXT: ; implicit-def: $sgpr40
; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $vcc_hi
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
@@ -40367,8 +40428,8 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: .LBB69_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s13, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s13, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB69_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_u32 s16, s16, 3
@@ -40421,60 +40482,60 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: s_lshr_b32 s95, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s31, s21, 8
-; GFX9-NEXT: s_lshr_b32 s34, s20, 16
-; GFX9-NEXT: s_lshr_b32 s35, s20, 8
+; GFX9-NEXT: s_lshr_b32 s7, s21, 16
+; GFX9-NEXT: s_lshr_b32 s30, s21, 8
+; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s34, s20, 8
; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s38, s19, 8
-; GFX9-NEXT: s_lshr_b32 s39, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s51, s17, 8
-; GFX9-NEXT: s_lshr_b32 s52, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
+; GFX9-NEXT: s_lshr_b32 s35, s19, 16
+; GFX9-NEXT: s_lshr_b32 s37, s19, 8
+; GFX9-NEXT: s_lshr_b32 s9, s18, 16
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s11, s16, 16
+; GFX9-NEXT: s_lshr_b32 s50, s16, 8
; GFX9-NEXT: .LBB69_5: ; %end
; GFX9-NEXT: v_mov_b32_e32 v2, 0xc0c0004
; GFX9-NEXT: v_mov_b32_e32 v3, s44
-; GFX9-NEXT: v_mov_b32_e32 v1, s53
-; GFX9-NEXT: v_perm_b32 v3, s52, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s50
+; GFX9-NEXT: v_perm_b32 v3, s11, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s16, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
-; GFX9-NEXT: v_mov_b32_e32 v3, s49
+; GFX9-NEXT: v_mov_b32_e32 v3, s39
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: v_perm_b32 v3, s50, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s49
+; GFX9-NEXT: v_perm_b32 v3, s48, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s17, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s42
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_perm_b32 v3, s39, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s38
+; GFX9-NEXT: v_perm_b32 v3, s9, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s18, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s36
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_mov_b32_e32 v1, s38
-; GFX9-NEXT: v_perm_b32 v3, s37, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s37
+; GFX9-NEXT: v_perm_b32 v3, s35, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s19, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, s40
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_mov_b32_e32 v1, s35
-; GFX9-NEXT: v_perm_b32 v3, s34, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s34
+; GFX9-NEXT: v_perm_b32 v3, s31, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s20, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v3, vcc_hi
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_mov_b32_e32 v1, s31
-; GFX9-NEXT: v_perm_b32 v3, s30, v3, v2
+; GFX9-NEXT: v_mov_b32_e32 v1, s30
+; GFX9-NEXT: v_perm_b32 v3, s7, v3, v2
; GFX9-NEXT: v_perm_b32 v1, s21, v1, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
@@ -40548,12 +40609,9 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX9-NEXT: v_perm_b32 v2, s57, v3, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX9-NEXT: v_readlane_b32 s30, v4, 12
+; GFX9-NEXT: v_readlane_b32 s30, v4, 9
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_readlane_b32 s31, v4, 13
-; GFX9-NEXT: v_readlane_b32 s53, v4, 11
-; GFX9-NEXT: v_readlane_b32 s52, v4, 10
-; GFX9-NEXT: v_readlane_b32 s51, v4, 9
+; GFX9-NEXT: v_readlane_b32 s31, v4, 10
; GFX9-NEXT: v_readlane_b32 s50, v4, 8
; GFX9-NEXT: v_readlane_b32 s49, v4, 7
; GFX9-NEXT: v_readlane_b32 s48, v4, 6
@@ -40579,15 +40637,18 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: v_writelane_b32 v23, s35, 1
; GFX11-NEXT: v_writelane_b32 v23, s36, 2
; GFX11-NEXT: v_writelane_b32 v23, s37, 3
-; GFX11-NEXT: v_writelane_b32 v23, s38, 4
-; GFX11-NEXT: v_writelane_b32 v23, s39, 5
-; GFX11-NEXT: v_writelane_b32 v23, s48, 6
-; GFX11-NEXT: v_writelane_b32 v23, s30, 7
-; GFX11-NEXT: v_writelane_b32 v23, s31, 8
+; GFX11-NEXT: v_writelane_b32 v23, s30, 4
+; GFX11-NEXT: v_writelane_b32 v23, s31, 5
; GFX11-NEXT: s_cmp_lg_u32 s28, 0
-; GFX11-NEXT: s_mov_b32 s48, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB69_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s6, s3, 8
+; GFX11-NEXT: s_lshr_b32 s8, s0, 16
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
+; GFX11-NEXT: s_mov_b32 s5, s6
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
+; GFX11-NEXT: s_mov_b32 s7, s8
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
; GFX11-NEXT: s_lshr_b32 s42, s27, 24
; GFX11-NEXT: s_lshr_b32 s44, s27, 16
; GFX11-NEXT: s_lshr_b32 s43, s27, 8
@@ -40620,17 +40681,13 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: s_lshr_b32 s94, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[22:23], 24
+; GFX11-NEXT: s_lshr_b32 s30, s2, 16
+; GFX11-NEXT: s_lshr_b32 s31, s2, 8
+; GFX11-NEXT: s_lshr_b32 s34, s1, 24
+; GFX11-NEXT: s_lshr_b32 s35, s1, 16
+; GFX11-NEXT: s_lshr_b32 s36, s1, 8
+; GFX11-NEXT: s_lshr_b32 s37, s0, 8
+; GFX11-NEXT: s_mov_b32 s9, 0
; GFX11-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
; GFX11-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
; GFX11-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
@@ -40638,17 +40695,17 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: s_lshr_b64 s[40:41], s[0:1], 24
; GFX11-NEXT: s_branch .LBB69_3
; GFX11-NEXT: .LBB69_2:
-; GFX11-NEXT: s_mov_b32 s48, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr38
-; GFX11-NEXT: ; implicit-def: $sgpr40
+; GFX11-NEXT: s_mov_b32 s9, -1
; GFX11-NEXT: ; implicit-def: $sgpr37
+; GFX11-NEXT: ; implicit-def: $sgpr7
+; GFX11-NEXT: ; implicit-def: $sgpr40
; GFX11-NEXT: ; implicit-def: $sgpr36
; GFX11-NEXT: ; implicit-def: $sgpr35
; GFX11-NEXT: ; implicit-def: $sgpr34
; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr28
; GFX11-NEXT: ; implicit-def: $sgpr30
+; GFX11-NEXT: ; implicit-def: $sgpr28
+; GFX11-NEXT: ; implicit-def: $sgpr5
; GFX11-NEXT: ; implicit-def: $vcc_hi
; GFX11-NEXT: ; implicit-def: $vcc_lo
; GFX11-NEXT: ; implicit-def: $sgpr94
@@ -40689,9 +40746,9 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: ; implicit-def: $sgpr42
; GFX11-NEXT: .LBB69_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s48, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s9, s9, exec_lo
+; GFX11-NEXT: s_cselect_b32 s9, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s9, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB69_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: s_add_u32 s0, s0, 3
@@ -40750,25 +40807,24 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: s_lshr_b32 s94, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_lo, s3, 24
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 16
-; GFX11-NEXT: s_lshr_b32 s30, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s34, s2, 8
-; GFX11-NEXT: s_lshr_b32 s35, s1, 24
-; GFX11-NEXT: s_lshr_b32 s36, s1, 16
-; GFX11-NEXT: s_lshr_b32 s37, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
+; GFX11-NEXT: s_lshr_b32 s5, s3, 8
+; GFX11-NEXT: s_lshr_b32 s30, s2, 16
+; GFX11-NEXT: s_lshr_b32 s31, s2, 8
+; GFX11-NEXT: s_lshr_b32 s34, s1, 24
+; GFX11-NEXT: s_lshr_b32 s35, s1, 16
+; GFX11-NEXT: s_lshr_b32 s36, s1, 8
+; GFX11-NEXT: s_lshr_b32 s7, s0, 16
+; GFX11-NEXT: s_lshr_b32 s37, s0, 8
; GFX11-NEXT: .LBB69_5: ; %end
; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004
-; GFX11-NEXT: v_readlane_b32 s48, v23, 6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-NEXT: v_perm_b32 v5, s31, s28, v12
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_perm_b32 v5, s30, s28, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-NEXT: v_perm_b32 v2, s38, s40, v12
-; GFX11-NEXT: v_perm_b32 v4, s36, s35, v12
-; GFX11-NEXT: v_perm_b32 v1, s0, s39, v12
-; GFX11-NEXT: v_perm_b32 v3, s1, s37, v12
-; GFX11-NEXT: v_perm_b32 v6, s2, s34, v12
+; GFX11-NEXT: v_perm_b32 v2, s7, s40, v12
+; GFX11-NEXT: v_perm_b32 v4, s35, s34, v12
+; GFX11-NEXT: v_perm_b32 v1, s0, s37, v12
+; GFX11-NEXT: v_perm_b32 v3, s1, s36, v12
+; GFX11-NEXT: v_perm_b32 v6, s2, s31, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX11-NEXT: v_perm_b32 v8, vcc_hi, vcc_lo, v12
@@ -40783,7 +40839,7 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: v_perm_b32 v8, s90, s12, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v5
-; GFX11-NEXT: v_perm_b32 v7, s3, s30, v12
+; GFX11-NEXT: v_perm_b32 v7, s3, s5, v12
; GFX11-NEXT: v_perm_b32 v13, s18, s89, v12
; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX11-NEXT: v_or_b32_e32 v5, v6, v9
@@ -40826,15 +40882,13 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; GFX11-NEXT: v_or_b32_e32 v14, v19, v17
; GFX11-NEXT: v_or_b32_e32 v15, v21, v18
; GFX11-NEXT: v_or_b32_e32 v16, v22, v20
-; GFX11-NEXT: v_readlane_b32 s30, v23, 7
+; GFX11-NEXT: v_readlane_b32 s30, v23, 4
; GFX11-NEXT: s_clause 0x3
; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-NEXT: v_readlane_b32 s31, v23, 8
-; GFX11-NEXT: v_readlane_b32 s39, v23, 5
-; GFX11-NEXT: v_readlane_b32 s38, v23, 4
+; GFX11-NEXT: v_readlane_b32 s31, v23, 5
; GFX11-NEXT: v_readlane_b32 s37, v23, 3
; GFX11-NEXT: v_readlane_b32 s36, v23, 2
; GFX11-NEXT: v_readlane_b32 s35, v23, 1
@@ -49648,22 +49702,11 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-LABEL: bitcast_v32bf16_to_v8f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s42, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
@@ -49700,26 +49743,26 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s40
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21
@@ -49735,40 +49778,62 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42
; SI-NEXT: s_cbranch_scc0 .LBB83_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v34
; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62
-; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v32
+; SI-NEXT: v_lshr_b64 v[2:3], v[38:39], 16
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v30
; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v28
; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59
+; SI-NEXT: v_mov_b32_e32 v7, v38
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v26
; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58
+; SI-NEXT: v_mov_b32_e32 v8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v24
+; SI-NEXT: v_mov_b32_e32 v38, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[35:36], 16
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v57
+; SI-NEXT: v_mov_b32_e32 v9, v34
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
+; SI-NEXT: v_mov_b32_e32 v36, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16
-; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v56
+; SI-NEXT: v_mov_b32_e32 v10, v32
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
+; SI-NEXT: v_mov_b32_e32 v34, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[31:32], 16
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_mov_b32_e32 v11, v30
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_mov_b32_e32 v32, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[29:30], 16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v46
+; SI-NEXT: v_mov_b32_e32 v12, v28
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v43
+; SI-NEXT: v_mov_b32_e32 v30, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[27:28], 16
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v45
+; SI-NEXT: v_mov_b32_e32 v13, v26
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v18
+; SI-NEXT: v_mov_b32_e32 v28, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[25:26], 16
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v44
+; SI-NEXT: v_mov_b32_e32 v14, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v42
+; SI-NEXT: v_mov_b32_e32 v26, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[23:24], 16
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; SI-NEXT: v_mov_b32_e32 v15, v22
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v41
+; SI-NEXT: v_mov_b32_e32 v24, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[21:22], 16
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v42
+; SI-NEXT: v_mov_b32_e32 v39, v20
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v40
+; SI-NEXT: v_mov_b32_e32 v22, v15
; SI-NEXT: v_lshr_b64 v[14:15], v[19:20], 16
+; SI-NEXT: v_mov_b32_e32 v20, v39
+; SI-NEXT: v_mov_b32_e32 v39, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_mov_b32_e32 v20, v16
+; SI-NEXT: v_mov_b32_e32 v49, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v16, v20
+; SI-NEXT: v_mov_b32_e32 v18, v39
+; SI-NEXT: v_mov_b32_e32 v16, v49
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB83_3
; SI-NEXT: .LBB83_2:
@@ -49780,10 +49845,10 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB83_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48
@@ -49792,79 +49857,79 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v28
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v26
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v24
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v33
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v31
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v44
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v43
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v18
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v25
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v42
; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v23
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v43
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v41
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v21
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v40
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
@@ -49877,22 +49942,11 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg %
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: .LBB83_5: ; %end
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -51731,17 +51785,15 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
@@ -51752,6 +51804,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
@@ -51771,8 +51825,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr29
+; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -51789,11 +51843,11 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v26, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
@@ -51813,26 +51867,27 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB84_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB84_4
@@ -51853,10 +51908,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -51875,65 +51930,65 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
; VI-NEXT: .LBB84_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v23, v28, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v23, v63, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v63, v62, s4
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
+; VI-NEXT: v_perm_b32 v1, v60, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_perm_b32 v1, v3, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: v_perm_b32 v2, v56, v47, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v59, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: v_perm_b32 v2, v45, v25, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v56, s4
+; VI-NEXT: v_perm_b32 v1, v5, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: v_perm_b32 v2, v43, v42, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v46, s4
+; VI-NEXT: v_perm_b32 v1, v6, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: v_perm_b32 v2, v40, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v43, s4
+; VI-NEXT: v_perm_b32 v1, v7, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: v_perm_b32 v2, v24, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v41, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v53, v20, s4
@@ -51973,7 +52028,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v24, s4
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
@@ -52021,17 +52076,15 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr17
; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -52043,6 +52096,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -52059,9 +52114,9 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
+; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -52072,18 +52127,22 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB84_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v8
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_mov_b32_e32 v27, v30
+; GFX9-NEXT: v_mov_b32_e32 v22, v29
+; GFX9-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -52100,29 +52159,26 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 24, v16
; GFX9-NEXT: .LBB84_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB84_4
@@ -52132,22 +52188,23 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_add_f64 v[11:12], v[11:12], 1.0
; GFX9-NEXT: v_add_f64 v[9:10], v[9:10], 1.0
; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
-; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; GFX9-NEXT: v_add_f64 v[1:2], v[1:2], 1.0
; GFX9-NEXT: v_add_f64 v[5:6], v[5:6], 1.0
+; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2]
; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 24, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -52164,60 +52221,59 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB84_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v29, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v26, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -52244,16 +52300,17 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -52743,68 +52800,71 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v40, s34, 0
; SI-NEXT: v_writelane_b32 v40, s35, 1
; SI-NEXT: v_writelane_b32 v40, s36, 2
; SI-NEXT: v_writelane_b32 v40, s37, 3
-; SI-NEXT: v_writelane_b32 v40, s38, 4
-; SI-NEXT: v_writelane_b32 v40, s39, 5
-; SI-NEXT: v_writelane_b32 v40, s48, 6
-; SI-NEXT: v_writelane_b32 v40, s49, 7
-; SI-NEXT: v_writelane_b32 v40, s50, 8
-; SI-NEXT: v_writelane_b32 v40, s51, 9
-; SI-NEXT: v_writelane_b32 v40, s52, 10
-; SI-NEXT: v_writelane_b32 v40, s53, 11
-; SI-NEXT: v_writelane_b32 v40, s54, 12
-; SI-NEXT: v_writelane_b32 v40, s55, 13
-; SI-NEXT: v_writelane_b32 v40, s64, 14
-; SI-NEXT: v_writelane_b32 v40, s65, 15
-; SI-NEXT: v_writelane_b32 v40, s66, 16
-; SI-NEXT: v_writelane_b32 v40, s67, 17
-; SI-NEXT: v_writelane_b32 v40, s68, 18
-; SI-NEXT: v_writelane_b32 v40, s69, 19
-; SI-NEXT: v_writelane_b32 v40, s70, 20
-; SI-NEXT: v_writelane_b32 v40, s71, 21
-; SI-NEXT: v_writelane_b32 v40, s80, 22
-; SI-NEXT: v_writelane_b32 v40, s81, 23
-; SI-NEXT: v_writelane_b32 v40, s82, 24
-; SI-NEXT: v_writelane_b32 v40, s83, 25
-; SI-NEXT: v_writelane_b32 v40, s84, 26
-; SI-NEXT: v_writelane_b32 v40, s85, 27
-; SI-NEXT: v_writelane_b32 v40, s30, 28
-; SI-NEXT: v_writelane_b32 v40, s31, 29
+; SI-NEXT: v_writelane_b32 v40, s30, 4
+; SI-NEXT: v_writelane_b32 v40, s31, 5
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: v_readfirstlane_b32 s4, v1
+; SI-NEXT: ; implicit-def: $vgpr41 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB85_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
+; SI-NEXT: s_lshr_b32 s6, s5, 24
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v41, s6, 0
+; SI-NEXT: s_lshr_b32 s6, s5, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 1
+; SI-NEXT: s_lshr_b32 s6, s5, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 2
+; SI-NEXT: s_lshr_b32 s6, s29, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 3
+; SI-NEXT: s_lshr_b32 s6, s29, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 4
+; SI-NEXT: s_lshr_b32 s6, s29, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 5
+; SI-NEXT: s_lshr_b32 s6, s27, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 6
+; SI-NEXT: s_lshr_b32 s6, s27, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 7
+; SI-NEXT: s_lshr_b32 s6, s27, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 8
+; SI-NEXT: s_lshr_b32 s6, s25, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 9
+; SI-NEXT: s_lshr_b32 s6, s25, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 10
+; SI-NEXT: s_lshr_b32 s6, s25, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 11
+; SI-NEXT: s_lshr_b32 s6, s23, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 12
+; SI-NEXT: s_lshr_b32 s6, s23, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 13
+; SI-NEXT: s_lshr_b32 s6, s23, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 14
+; SI-NEXT: s_lshr_b32 s6, s21, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 15
+; SI-NEXT: s_lshr_b32 s6, s21, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 16
+; SI-NEXT: s_lshr_b32 s6, s21, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 17
+; SI-NEXT: s_lshr_b32 s6, s19, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 18
+; SI-NEXT: s_lshr_b32 s6, s19, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 19
+; SI-NEXT: s_lshr_b32 s6, s19, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 20
+; SI-NEXT: s_lshr_b32 s6, s17, 24
+; SI-NEXT: v_writelane_b32 v41, s6, 21
+; SI-NEXT: s_lshr_b32 s6, s17, 16
+; SI-NEXT: v_writelane_b32 v41, s6, 22
+; SI-NEXT: s_lshr_b32 s6, s17, 8
+; SI-NEXT: v_writelane_b32 v41, s6, 23
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 8
@@ -52832,40 +52892,20 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_mov_b64 s[90:91], 0
; SI-NEXT: s_branch .LBB85_3
; SI-NEXT: .LBB85_2:
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: s_mov_b64 s[90:91], -1
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr83
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr71
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr67
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
@@ -52881,6 +52921,50 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; kill: killed $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: .LBB85_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
; SI-NEXT: s_cselect_b32 s7, 1, 0
@@ -52927,30 +53011,30 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: v_lshr_b64 v[29:30], v[7:8], 8
; SI-NEXT: v_lshr_b64 v[38:39], v[19:20], 8
; SI-NEXT: v_lshr_b64 v[53:54], v[31:32], 8
-; SI-NEXT: s_lshr_b32 s38, s5, 24
-; SI-NEXT: s_lshr_b32 s39, s5, 16
-; SI-NEXT: s_lshr_b32 s48, s5, 8
-; SI-NEXT: s_lshr_b32 s49, s29, 24
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s29, 8
-; SI-NEXT: s_lshr_b32 s52, s27, 24
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s54, s27, 8
-; SI-NEXT: s_lshr_b32 s55, s25, 24
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s25, 8
-; SI-NEXT: s_lshr_b32 s66, s23, 24
-; SI-NEXT: s_lshr_b32 s67, s23, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 8
-; SI-NEXT: s_lshr_b32 s69, s21, 24
-; SI-NEXT: s_lshr_b32 s70, s21, 16
-; SI-NEXT: s_lshr_b32 s71, s21, 8
-; SI-NEXT: s_lshr_b32 s80, s19, 24
-; SI-NEXT: s_lshr_b32 s81, s19, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 8
-; SI-NEXT: s_lshr_b32 s83, s17, 24
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s17, 8
+; SI-NEXT: s_lshr_b32 s4, s5, 24
+; SI-NEXT: s_lshr_b32 s6, s5, 16
+; SI-NEXT: s_lshr_b32 s7, s5, 8
+; SI-NEXT: s_lshr_b32 s8, s29, 24
+; SI-NEXT: s_lshr_b32 s9, s29, 16
+; SI-NEXT: s_lshr_b32 s10, s29, 8
+; SI-NEXT: s_lshr_b32 s11, s27, 24
+; SI-NEXT: s_lshr_b32 s12, s27, 16
+; SI-NEXT: s_lshr_b32 s13, s27, 8
+; SI-NEXT: s_lshr_b32 s14, s25, 24
+; SI-NEXT: s_lshr_b32 s15, s25, 16
+; SI-NEXT: s_lshr_b32 s16, s25, 8
+; SI-NEXT: s_lshr_b32 s18, s23, 24
+; SI-NEXT: s_lshr_b32 s20, s23, 16
+; SI-NEXT: s_lshr_b32 s22, s23, 8
+; SI-NEXT: s_lshr_b32 s24, s21, 24
+; SI-NEXT: s_lshr_b32 s26, s21, 16
+; SI-NEXT: s_lshr_b32 s28, s21, 8
+; SI-NEXT: s_lshr_b32 s40, s19, 24
+; SI-NEXT: s_lshr_b32 s41, s19, 16
+; SI-NEXT: s_lshr_b32 s42, s19, 8
+; SI-NEXT: s_lshr_b32 s43, s17, 24
+; SI-NEXT: s_lshr_b32 s44, s17, 16
+; SI-NEXT: s_lshr_b32 s45, s17, 8
; SI-NEXT: s_branch .LBB85_6
; SI-NEXT: .LBB85_5:
; SI-NEXT: v_mov_b32_e32 v31, s16
@@ -52985,222 +53069,223 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v11, s14
; SI-NEXT: v_mov_b32_e32 v10, s10
; SI-NEXT: v_mov_b32_e32 v9, s6
+; SI-NEXT: v_readlane_b32 s4, v41, 0
+; SI-NEXT: v_readlane_b32 s6, v41, 1
+; SI-NEXT: v_readlane_b32 s7, v41, 2
+; SI-NEXT: v_readlane_b32 s8, v41, 3
+; SI-NEXT: v_readlane_b32 s9, v41, 4
+; SI-NEXT: v_readlane_b32 s10, v41, 5
+; SI-NEXT: v_readlane_b32 s11, v41, 6
+; SI-NEXT: v_readlane_b32 s12, v41, 7
+; SI-NEXT: v_readlane_b32 s13, v41, 8
+; SI-NEXT: v_readlane_b32 s14, v41, 9
+; SI-NEXT: v_readlane_b32 s15, v41, 10
+; SI-NEXT: v_readlane_b32 s16, v41, 11
+; SI-NEXT: v_readlane_b32 s18, v41, 12
+; SI-NEXT: v_readlane_b32 s20, v41, 13
+; SI-NEXT: v_readlane_b32 s22, v41, 14
+; SI-NEXT: v_readlane_b32 s24, v41, 15
+; SI-NEXT: v_readlane_b32 s26, v41, 16
+; SI-NEXT: v_readlane_b32 s28, v41, 17
+; SI-NEXT: v_readlane_b32 s40, v41, 18
+; SI-NEXT: v_readlane_b32 s41, v41, 19
+; SI-NEXT: v_readlane_b32 s42, v41, 20
+; SI-NEXT: v_readlane_b32 s43, v41, 21
+; SI-NEXT: v_readlane_b32 s44, v41, 22
+; SI-NEXT: v_readlane_b32 s45, v41, 23
; SI-NEXT: .LBB85_6: ; %end
; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v53
-; SI-NEXT: s_and_b32 s4, s17, 0xff
-; SI-NEXT: s_lshl_b32 s6, s85, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v52
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s84, 0xff
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: s_lshl_b32 s45, s45, 8
+; SI-NEXT: s_and_b32 s44, s44, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v51
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s83, 24
+; SI-NEXT: s_or_b32 s17, s17, s45
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_lshl_b32 s43, s43, 24
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s43, s43, s44
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s17, s17, s43
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s17
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v26
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v50
-; SI-NEXT: s_and_b32 s4, s19, 0xff
-; SI-NEXT: s_lshl_b32 s6, s82, 8
+; SI-NEXT: s_and_b32 s17, s19, 0xff
+; SI-NEXT: s_lshl_b32 s19, s42, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v49
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s81, 0xff
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_and_b32 s19, s41, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v48
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s80, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s40, s40, 24
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s19, s40, s19
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s17
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v38
-; SI-NEXT: s_and_b32 s4, s21, 0xff
-; SI-NEXT: s_lshl_b32 s6, s71, 8
+; SI-NEXT: s_and_b32 s17, s21, 0xff
+; SI-NEXT: s_lshl_b32 s19, s28, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v37
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s70, 0xff
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_and_b32 s19, s26, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s69, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s21, s24, 24
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s19, s21, s19
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s17, s17, s19
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s17
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v35
-; SI-NEXT: s_and_b32 s4, s23, 0xff
-; SI-NEXT: s_lshl_b32 s6, s68, 8
+; SI-NEXT: s_and_b32 s17, s23, 0xff
+; SI-NEXT: s_lshl_b32 s19, s22, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v34
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s67, 0xff
+; SI-NEXT: s_or_b32 s17, s17, s19
+; SI-NEXT: s_and_b32 s19, s20, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v33
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s66, 24
+; SI-NEXT: s_lshl_b32 s19, s19, 16
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s17
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v29
-; SI-NEXT: s_and_b32 s4, s25, 0xff
-; SI-NEXT: s_lshl_b32 s6, s65, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v28
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s64, 0xff
+; SI-NEXT: s_and_b32 s17, s25, 0xff
+; SI-NEXT: s_lshl_b32 s16, s16, 8
+; SI-NEXT: s_and_b32 s15, s15, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v24
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s55, 24
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s14, s16, s14
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s14
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v23
-; SI-NEXT: s_and_b32 s4, s27, 0xff
-; SI-NEXT: s_lshl_b32 s6, s54, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v22
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s53, 0xff
+; SI-NEXT: s_and_b32 s14, s27, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 8
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v21
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s52, 24
+; SI-NEXT: s_or_b32 s13, s14, s13
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_or_b32 s11, s11, s12
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s11, s13, s11
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s11
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v17
-; SI-NEXT: s_and_b32 s4, s29, 0xff
-; SI-NEXT: s_lshl_b32 s6, s51, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v16
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s50, 0xff
+; SI-NEXT: s_and_b32 s11, s29, 0xff
+; SI-NEXT: s_lshl_b32 s10, s10, 8
+; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v15
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s49, 24
+; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: s_or_b32 s8, s10, s8
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v2, s8
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v11
-; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s48, 8
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v10
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s39, 0xff
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v9
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s38, 24
+; SI-NEXT: s_or_b32 s5, s5, s7
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s5, s6, s5
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v40, 28
+; SI-NEXT: v_readlane_b32 s30, v40, 4
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v40, 29
-; SI-NEXT: v_readlane_b32 s85, v40, 27
-; SI-NEXT: v_readlane_b32 s84, v40, 26
-; SI-NEXT: v_readlane_b32 s83, v40, 25
-; SI-NEXT: v_readlane_b32 s82, v40, 24
-; SI-NEXT: v_readlane_b32 s81, v40, 23
-; SI-NEXT: v_readlane_b32 s80, v40, 22
-; SI-NEXT: v_readlane_b32 s71, v40, 21
-; SI-NEXT: v_readlane_b32 s70, v40, 20
-; SI-NEXT: v_readlane_b32 s69, v40, 19
-; SI-NEXT: v_readlane_b32 s68, v40, 18
-; SI-NEXT: v_readlane_b32 s67, v40, 17
-; SI-NEXT: v_readlane_b32 s66, v40, 16
-; SI-NEXT: v_readlane_b32 s65, v40, 15
-; SI-NEXT: v_readlane_b32 s64, v40, 14
-; SI-NEXT: v_readlane_b32 s55, v40, 13
-; SI-NEXT: v_readlane_b32 s54, v40, 12
-; SI-NEXT: v_readlane_b32 s53, v40, 11
-; SI-NEXT: v_readlane_b32 s52, v40, 10
-; SI-NEXT: v_readlane_b32 s51, v40, 9
-; SI-NEXT: v_readlane_b32 s50, v40, 8
-; SI-NEXT: v_readlane_b32 s49, v40, 7
-; SI-NEXT: v_readlane_b32 s48, v40, 6
-; SI-NEXT: v_readlane_b32 s39, v40, 5
-; SI-NEXT: v_readlane_b32 s38, v40, 4
+; SI-NEXT: v_readlane_b32 s31, v40, 5
; SI-NEXT: v_readlane_b32 s37, v40, 3
; SI-NEXT: v_readlane_b32 s36, v40, 2
; SI-NEXT: v_readlane_b32 s35, v40, 1
; SI-NEXT: v_readlane_b32 s34, v40, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -53240,120 +53325,126 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: v_writelane_b32 v63, s53, 11
; VI-NEXT: v_writelane_b32 v63, s54, 12
; VI-NEXT: v_writelane_b32 v63, s55, 13
-; VI-NEXT: v_writelane_b32 v63, s64, 14
-; VI-NEXT: v_writelane_b32 v63, s65, 15
-; VI-NEXT: v_writelane_b32 v63, s30, 16
-; VI-NEXT: v_writelane_b32 v63, s31, 17
+; VI-NEXT: v_writelane_b32 v63, s30, 14
+; VI-NEXT: v_writelane_b32 v63, s31, 15
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB85_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s31, s5, 24
-; VI-NEXT: s_lshr_b32 s30, s5, 16
+; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: s_lshr_b32 s47, s22, 8
+; VI-NEXT: s_lshr_b32 s50, s20, 16
+; VI-NEXT: s_lshr_b32 s51, s20, 8
+; VI-NEXT: s_lshr_b32 s52, s18, 16
+; VI-NEXT: s_lshr_b32 s53, s18, 8
+; VI-NEXT: s_lshr_b32 s54, s16, 16
+; VI-NEXT: s_lshr_b32 s55, s16, 8
+; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_lshr_b32 s39, s5, 24
+; VI-NEXT: s_lshr_b32 s37, s5, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s5, 8
-; VI-NEXT: s_lshr_b32 s35, s4, 16
-; VI-NEXT: s_lshr_b32 s34, s4, 8
+; VI-NEXT: s_lshr_b32 s49, s4, 16
+; VI-NEXT: s_lshr_b32 s48, s4, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s29, 24
; VI-NEXT: s_lshr_b32 s91, s29, 16
; VI-NEXT: s_lshr_b32 s90, s29, 8
-; VI-NEXT: s_lshr_b32 s37, s28, 16
+; VI-NEXT: s_lshr_b32 s38, s28, 16
; VI-NEXT: s_lshr_b32 s36, s28, 8
; VI-NEXT: s_lshr_b32 s89, s27, 24
; VI-NEXT: s_lshr_b32 s88, s27, 16
; VI-NEXT: s_lshr_b32 s79, s27, 8
-; VI-NEXT: s_lshr_b32 s39, s26, 16
-; VI-NEXT: s_lshr_b32 s38, s26, 8
+; VI-NEXT: s_lshr_b32 s35, s26, 16
+; VI-NEXT: s_lshr_b32 s34, s26, 8
; VI-NEXT: s_lshr_b32 s78, s25, 24
; VI-NEXT: s_lshr_b32 s77, s25, 16
; VI-NEXT: s_lshr_b32 s76, s25, 8
-; VI-NEXT: s_lshr_b32 s49, s24, 16
-; VI-NEXT: s_lshr_b32 s48, s24, 8
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s30, s24, 8
; VI-NEXT: s_lshr_b32 s75, s23, 24
; VI-NEXT: s_lshr_b32 s74, s23, 16
; VI-NEXT: s_lshr_b32 s73, s23, 8
-; VI-NEXT: s_lshr_b32 s51, s22, 16
-; VI-NEXT: s_lshr_b32 s50, s22, 8
; VI-NEXT: s_lshr_b32 s72, s21, 24
; VI-NEXT: s_lshr_b32 s63, s21, 16
; VI-NEXT: s_lshr_b32 s62, s21, 8
-; VI-NEXT: s_lshr_b32 s53, s20, 16
-; VI-NEXT: s_lshr_b32 s52, s20, 8
; VI-NEXT: s_lshr_b32 s61, s19, 24
; VI-NEXT: s_lshr_b32 s60, s19, 16
; VI-NEXT: s_lshr_b32 s59, s19, 8
-; VI-NEXT: s_lshr_b32 s55, s18, 16
-; VI-NEXT: s_lshr_b32 s54, s18, 8
; VI-NEXT: s_lshr_b32 s58, s17, 24
; VI-NEXT: s_lshr_b32 s57, s17, 16
; VI-NEXT: s_lshr_b32 s56, s17, 8
-; VI-NEXT: s_lshr_b32 s65, s16, 16
-; VI-NEXT: s_lshr_b32 s64, s16, 8
-; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_mov_b32 s9, s54
+; VI-NEXT: s_mov_b32 s7, s55
+; VI-NEXT: s_mov_b32 s13, s52
+; VI-NEXT: s_mov_b32 s11, s53
+; VI-NEXT: s_mov_b32 s41, s50
+; VI-NEXT: s_mov_b32 s15, s51
+; VI-NEXT: s_mov_b32 s45, s46
+; VI-NEXT: s_mov_b32 s43, s47
; VI-NEXT: s_mov_b64 s[46:47], 0
; VI-NEXT: s_branch .LBB85_3
; VI-NEXT: .LBB85_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr7
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr6
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr11
+; VI-NEXT: ; implicit-def: $sgpr13
; VI-NEXT: ; implicit-def: $sgpr8
; VI-NEXT: ; implicit-def: $sgpr59
; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr61
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr15
+; VI-NEXT: ; implicit-def: $sgpr41
; VI-NEXT: ; implicit-def: $sgpr10
; VI-NEXT: ; implicit-def: $sgpr62
; VI-NEXT: ; implicit-def: $sgpr63
; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr51
+; VI-NEXT: ; implicit-def: $sgpr43
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: ; implicit-def: $sgpr12
; VI-NEXT: ; implicit-def: $sgpr73
; VI-NEXT: ; implicit-def: $sgpr74
; VI-NEXT: ; implicit-def: $sgpr75
-; VI-NEXT: ; implicit-def: $sgpr48
-; VI-NEXT: ; implicit-def: $sgpr49
+; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr31
; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $sgpr76
; VI-NEXT: ; implicit-def: $sgpr77
; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr79
; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: ; implicit-def: $sgpr89
; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr42
; VI-NEXT: ; implicit-def: $sgpr90
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $vcc_lo
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr35
+; VI-NEXT: ; implicit-def: $sgpr48
+; VI-NEXT: ; implicit-def: $sgpr49
; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $vcc_hi
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; implicit-def: $sgpr31
+; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr39
; VI-NEXT: .LBB85_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
; VI-NEXT: s_cbranch_scc1 .LBB85_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
@@ -53420,7 +53511,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v15
; VI-NEXT: s_branch .LBB85_6
; VI-NEXT: .LBB85_5:
-; VI-NEXT: v_mov_b32_e32 v26, s35
+; VI-NEXT: v_mov_b32_e32 v26, s49
; VI-NEXT: v_mov_b32_e32 v25, s40
; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -53441,23 +53532,23 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v10, s21
; VI-NEXT: v_mov_b32_e32 v14, s19
; VI-NEXT: v_mov_b32_e32 v16, s17
-; VI-NEXT: v_mov_b32_e32 v57, s65
-; VI-NEXT: v_mov_b32_e32 v59, s64
-; VI-NEXT: v_mov_b32_e32 v56, s55
-; VI-NEXT: v_mov_b32_e32 v47, s54
-; VI-NEXT: v_mov_b32_e32 v42, s53
-; VI-NEXT: v_mov_b32_e32 v43, s52
-; VI-NEXT: v_mov_b32_e32 v50, s51
-; VI-NEXT: v_mov_b32_e32 v51, s50
-; VI-NEXT: v_mov_b32_e32 v38, s49
-; VI-NEXT: v_mov_b32_e32 v48, s48
-; VI-NEXT: v_mov_b32_e32 v35, s39
-; VI-NEXT: v_mov_b32_e32 v36, s38
-; VI-NEXT: v_mov_b32_e32 v30, s37
+; VI-NEXT: v_mov_b32_e32 v57, s9
+; VI-NEXT: v_mov_b32_e32 v59, s7
+; VI-NEXT: v_mov_b32_e32 v56, s13
+; VI-NEXT: v_mov_b32_e32 v47, s11
+; VI-NEXT: v_mov_b32_e32 v42, s41
+; VI-NEXT: v_mov_b32_e32 v43, s15
+; VI-NEXT: v_mov_b32_e32 v50, s45
+; VI-NEXT: v_mov_b32_e32 v51, s43
+; VI-NEXT: v_mov_b32_e32 v38, s31
+; VI-NEXT: v_mov_b32_e32 v48, s30
+; VI-NEXT: v_mov_b32_e32 v35, s35
+; VI-NEXT: v_mov_b32_e32 v36, s34
+; VI-NEXT: v_mov_b32_e32 v30, s38
; VI-NEXT: v_mov_b32_e32 v31, s36
-; VI-NEXT: v_mov_b32_e32 v27, s34
-; VI-NEXT: v_mov_b32_e32 v19, s31
-; VI-NEXT: v_mov_b32_e32 v28, s30
+; VI-NEXT: v_mov_b32_e32 v27, s48
+; VI-NEXT: v_mov_b32_e32 v19, s39
+; VI-NEXT: v_mov_b32_e32 v28, s37
; VI-NEXT: v_mov_b32_e32 v29, vcc_hi
; VI-NEXT: v_mov_b32_e32 v32, vcc_lo
; VI-NEXT: v_mov_b32_e32 v33, s91
@@ -53546,10 +53637,8 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v3, v36, s4
; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_readlane_b32 s30, v63, 16
-; VI-NEXT: v_readlane_b32 s31, v63, 17
-; VI-NEXT: v_readlane_b32 s65, v63, 15
-; VI-NEXT: v_readlane_b32 s64, v63, 14
+; VI-NEXT: v_readlane_b32 s30, v63, 14
+; VI-NEXT: v_readlane_b32 s31, v63, 15
; VI-NEXT: v_readlane_b32 s55, v63, 13
; VI-NEXT: v_readlane_b32 s54, v63, 12
; VI-NEXT: v_readlane_b32 s53, v63, 11
@@ -53651,16 +53740,30 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: v_writelane_b32 v63, s49, 7
; GFX9-NEXT: v_writelane_b32 v63, s50, 8
; GFX9-NEXT: v_writelane_b32 v63, s51, 9
-; GFX9-NEXT: v_writelane_b32 v63, s52, 10
-; GFX9-NEXT: v_writelane_b32 v63, s53, 11
-; GFX9-NEXT: v_writelane_b32 v63, s30, 12
-; GFX9-NEXT: v_writelane_b32 v63, s31, 13
+; GFX9-NEXT: v_writelane_b32 v63, s30, 10
+; GFX9-NEXT: v_writelane_b32 v63, s31, 11
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB85_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s46, s22, 16
+; GFX9-NEXT: s_lshr_b32 s47, s22, 8
+; GFX9-NEXT: s_lshr_b32 s38, s20, 16
+; GFX9-NEXT: s_lshr_b32 s39, s20, 8
+; GFX9-NEXT: s_lshr_b32 s48, s18, 16
+; GFX9-NEXT: s_lshr_b32 s49, s18, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 16
+; GFX9-NEXT: s_lshr_b32 s51, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; GFX9-NEXT: s_lshr_b32 s95, s5, 24
; GFX9-NEXT: s_lshr_b32 s94, s5, 16
; GFX9-NEXT: s_lshr_b32 s93, s5, 8
@@ -53669,8 +53772,8 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s92, s29, 24
; GFX9-NEXT: s_lshr_b32 s91, s29, 16
; GFX9-NEXT: s_lshr_b32 s90, s29, 8
-; GFX9-NEXT: s_lshr_b32 s31, s28, 16
-; GFX9-NEXT: s_lshr_b32 s30, s28, 8
+; GFX9-NEXT: s_lshr_b32 s37, s28, 16
+; GFX9-NEXT: s_lshr_b32 s36, s28, 8
; GFX9-NEXT: s_lshr_b32 s89, s27, 24
; GFX9-NEXT: s_lshr_b32 s88, s27, 16
; GFX9-NEXT: s_lshr_b32 s79, s27, 8
@@ -53679,66 +53782,58 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s78, s25, 24
; GFX9-NEXT: s_lshr_b32 s77, s25, 16
; GFX9-NEXT: s_lshr_b32 s76, s25, 8
-; GFX9-NEXT: s_lshr_b32 s37, s24, 16
-; GFX9-NEXT: s_lshr_b32 s36, s24, 8
+; GFX9-NEXT: s_lshr_b32 s31, s24, 16
+; GFX9-NEXT: s_lshr_b32 s30, s24, 8
; GFX9-NEXT: s_lshr_b32 s75, s23, 24
; GFX9-NEXT: s_lshr_b32 s74, s23, 16
; GFX9-NEXT: s_lshr_b32 s73, s23, 8
-; GFX9-NEXT: s_lshr_b32 s39, s22, 16
-; GFX9-NEXT: s_lshr_b32 s38, s22, 8
; GFX9-NEXT: s_lshr_b32 s72, s21, 24
; GFX9-NEXT: s_lshr_b32 s63, s21, 16
; GFX9-NEXT: s_lshr_b32 s62, s21, 8
-; GFX9-NEXT: s_lshr_b32 s49, s20, 16
-; GFX9-NEXT: s_lshr_b32 s48, s20, 8
; GFX9-NEXT: s_lshr_b32 s61, s19, 24
; GFX9-NEXT: s_lshr_b32 s60, s19, 16
; GFX9-NEXT: s_lshr_b32 s59, s19, 8
-; GFX9-NEXT: s_lshr_b32 s51, s18, 16
-; GFX9-NEXT: s_lshr_b32 s50, s18, 8
; GFX9-NEXT: s_lshr_b32 s58, s17, 24
; GFX9-NEXT: s_lshr_b32 s57, s17, 16
; GFX9-NEXT: s_lshr_b32 s56, s17, 8
-; GFX9-NEXT: s_lshr_b32 s53, s16, 16
-; GFX9-NEXT: s_lshr_b32 s52, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX9-NEXT: s_mov_b32 s9, s50
+; GFX9-NEXT: s_mov_b32 s7, s51
+; GFX9-NEXT: s_mov_b32 s13, s48
+; GFX9-NEXT: s_mov_b32 s11, s49
+; GFX9-NEXT: s_mov_b32 s41, s38
+; GFX9-NEXT: s_mov_b32 s15, s39
+; GFX9-NEXT: s_mov_b32 s45, s46
+; GFX9-NEXT: s_mov_b32 s43, s47
; GFX9-NEXT: s_mov_b64 s[46:47], 0
; GFX9-NEXT: s_branch .LBB85_3
; GFX9-NEXT: .LBB85_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr53
+; GFX9-NEXT: ; implicit-def: $sgpr7
+; GFX9-NEXT: ; implicit-def: $sgpr9
; GFX9-NEXT: ; implicit-def: $sgpr6
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr58
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr13
; GFX9-NEXT: ; implicit-def: $sgpr8
; GFX9-NEXT: ; implicit-def: $sgpr59
; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr61
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr15
+; GFX9-NEXT: ; implicit-def: $sgpr41
; GFX9-NEXT: ; implicit-def: $sgpr10
; GFX9-NEXT: ; implicit-def: $sgpr62
; GFX9-NEXT: ; implicit-def: $sgpr63
; GFX9-NEXT: ; implicit-def: $sgpr72
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr43
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr12
; GFX9-NEXT: ; implicit-def: $sgpr73
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr36
-; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr31
; GFX9-NEXT: ; implicit-def: $sgpr14
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr77
@@ -53749,8 +53844,8 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: ; implicit-def: $sgpr79
; GFX9-NEXT: ; implicit-def: $sgpr88
; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr30
-; GFX9-NEXT: ; implicit-def: $sgpr31
+; GFX9-NEXT: ; implicit-def: $sgpr36
+; GFX9-NEXT: ; implicit-def: $sgpr37
; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr90
; GFX9-NEXT: ; implicit-def: $sgpr91
@@ -53763,8 +53858,8 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: .LBB85_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB85_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
@@ -53856,20 +53951,20 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v10, s21
; GFX9-NEXT: v_mov_b32_e32 v14, s19
; GFX9-NEXT: v_mov_b32_e32 v16, s17
-; GFX9-NEXT: v_mov_b32_e32 v57, s53
-; GFX9-NEXT: v_mov_b32_e32 v59, s52
-; GFX9-NEXT: v_mov_b32_e32 v56, s51
-; GFX9-NEXT: v_mov_b32_e32 v47, s50
-; GFX9-NEXT: v_mov_b32_e32 v42, s49
-; GFX9-NEXT: v_mov_b32_e32 v43, s48
-; GFX9-NEXT: v_mov_b32_e32 v50, s39
-; GFX9-NEXT: v_mov_b32_e32 v51, s38
-; GFX9-NEXT: v_mov_b32_e32 v38, s37
-; GFX9-NEXT: v_mov_b32_e32 v48, s36
+; GFX9-NEXT: v_mov_b32_e32 v57, s9
+; GFX9-NEXT: v_mov_b32_e32 v59, s7
+; GFX9-NEXT: v_mov_b32_e32 v56, s13
+; GFX9-NEXT: v_mov_b32_e32 v47, s11
+; GFX9-NEXT: v_mov_b32_e32 v42, s41
+; GFX9-NEXT: v_mov_b32_e32 v43, s15
+; GFX9-NEXT: v_mov_b32_e32 v50, s45
+; GFX9-NEXT: v_mov_b32_e32 v51, s43
+; GFX9-NEXT: v_mov_b32_e32 v38, s31
+; GFX9-NEXT: v_mov_b32_e32 v48, s30
; GFX9-NEXT: v_mov_b32_e32 v35, s35
; GFX9-NEXT: v_mov_b32_e32 v36, s34
-; GFX9-NEXT: v_mov_b32_e32 v30, s31
-; GFX9-NEXT: v_mov_b32_e32 v31, s30
+; GFX9-NEXT: v_mov_b32_e32 v30, s37
+; GFX9-NEXT: v_mov_b32_e32 v31, s36
; GFX9-NEXT: v_mov_b32_e32 v27, vcc_lo
; GFX9-NEXT: v_mov_b32_e32 v19, s95
; GFX9-NEXT: v_mov_b32_e32 v28, s94
@@ -53964,10 +54059,8 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v3, v3, v36, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_readlane_b32 s30, v63, 12
-; GFX9-NEXT: v_readlane_b32 s31, v63, 13
-; GFX9-NEXT: v_readlane_b32 s53, v63, 11
-; GFX9-NEXT: v_readlane_b32 s52, v63, 10
+; GFX9-NEXT: v_readlane_b32 s30, v63, 10
+; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
; GFX9-NEXT: v_readlane_b32 s50, v63, 8
; GFX9-NEXT: v_readlane_b32 s49, v63, 7
@@ -54054,6 +54147,22 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX11-NEXT: s_mov_b32 s42, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB85_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s31, s18, 16
+; GFX11-NEXT: s_lshr_b32 s34, s18, 8
+; GFX11-NEXT: s_lshr_b32 s35, s16, 16
+; GFX11-NEXT: s_lshr_b32 s36, s16, 8
+; GFX11-NEXT: s_lshr_b32 s37, s2, 16
+; GFX11-NEXT: s_lshr_b32 s38, s2, 8
+; GFX11-NEXT: s_lshr_b32 s39, s0, 16
+; GFX11-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: s_lshr_b32 s90, s27, 24
; GFX11-NEXT: s_lshr_b32 s89, s27, 16
; GFX11-NEXT: s_lshr_b32 s88, s27, 8
@@ -54077,54 +54186,46 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX11-NEXT: s_lshr_b32 s62, s19, 24
; GFX11-NEXT: s_lshr_b32 s61, s19, 16
; GFX11-NEXT: s_lshr_b32 s60, s19, 8
-; GFX11-NEXT: s_lshr_b32 s34, s18, 16
-; GFX11-NEXT: s_lshr_b32 s31, s18, 8
; GFX11-NEXT: s_lshr_b32 s59, s17, 24
; GFX11-NEXT: s_lshr_b32 s58, s17, 16
; GFX11-NEXT: s_lshr_b32 s57, s17, 8
-; GFX11-NEXT: s_lshr_b32 s36, s16, 16
-; GFX11-NEXT: s_lshr_b32 s35, s16, 8
; GFX11-NEXT: s_lshr_b32 s56, s3, 24
; GFX11-NEXT: s_lshr_b32 s47, s3, 16
; GFX11-NEXT: s_lshr_b32 s46, s3, 8
-; GFX11-NEXT: s_lshr_b32 s38, s2, 16
-; GFX11-NEXT: s_lshr_b32 s37, s2, 8
; GFX11-NEXT: s_lshr_b32 s45, s1, 24
; GFX11-NEXT: s_lshr_b32 s44, s1, 16
; GFX11-NEXT: s_lshr_b32 s43, s1, 8
-; GFX11-NEXT: s_lshr_b32 s48, s0, 16
-; GFX11-NEXT: s_lshr_b32 s39, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-NEXT: s_mov_b32 s7, s39
+; GFX11-NEXT: s_mov_b32 s5, s48
+; GFX11-NEXT: s_mov_b32 s11, s37
+; GFX11-NEXT: s_mov_b32 s9, s38
+; GFX11-NEXT: s_mov_b32 s15, s35
+; GFX11-NEXT: s_mov_b32 s13, s36
+; GFX11-NEXT: s_mov_b32 s41, s31
+; GFX11-NEXT: s_mov_b32 s29, s34
; GFX11-NEXT: s_branch .LBB85_3
; GFX11-NEXT: .LBB85_2:
; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr48
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr7
; GFX11-NEXT: ; implicit-def: $sgpr4
; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: ; implicit-def: $sgpr44
; GFX11-NEXT: ; implicit-def: $sgpr45
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr9
+; GFX11-NEXT: ; implicit-def: $sgpr11
; GFX11-NEXT: ; implicit-def: $sgpr6
; GFX11-NEXT: ; implicit-def: $sgpr46
; GFX11-NEXT: ; implicit-def: $sgpr47
; GFX11-NEXT: ; implicit-def: $sgpr56
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr36
+; GFX11-NEXT: ; implicit-def: $sgpr13
+; GFX11-NEXT: ; implicit-def: $sgpr15
; GFX11-NEXT: ; implicit-def: $sgpr8
; GFX11-NEXT: ; implicit-def: $sgpr57
; GFX11-NEXT: ; implicit-def: $sgpr58
; GFX11-NEXT: ; implicit-def: $sgpr59
-; GFX11-NEXT: ; implicit-def: $sgpr31
-; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr29
+; GFX11-NEXT: ; implicit-def: $sgpr41
; GFX11-NEXT: ; implicit-def: $sgpr10
; GFX11-NEXT: ; implicit-def: $sgpr60
; GFX11-NEXT: ; implicit-def: $sgpr61
@@ -54155,9 +54256,9 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX11-NEXT: ; implicit-def: $sgpr90
; GFX11-NEXT: .LBB85_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB85_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: v_add_f64 v[7:8], s[20:21], 1.0
@@ -54226,10 +54327,10 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v16, s17
; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v18, s3
; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v22, s1
-; GFX11-NEXT: v_dual_mov_b32 v82, s48 :: v_dual_mov_b32 v81, s39
-; GFX11-NEXT: v_dual_mov_b32 v69, s38 :: v_dual_mov_b32 v68, s37
-; GFX11-NEXT: v_dual_mov_b32 v64, s36 :: v_dual_mov_b32 v55, s35
-; GFX11-NEXT: v_dual_mov_b32 v54, s34 :: v_dual_mov_b32 v53, s31
+; GFX11-NEXT: v_dual_mov_b32 v82, s7 :: v_dual_mov_b32 v81, s5
+; GFX11-NEXT: v_dual_mov_b32 v69, s11 :: v_dual_mov_b32 v68, s9
+; GFX11-NEXT: v_dual_mov_b32 v64, s15 :: v_dual_mov_b32 v55, s13
+; GFX11-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v53, s29
; GFX11-NEXT: v_dual_mov_b32 v49, s30 :: v_dual_mov_b32 v30, s93
; GFX11-NEXT: v_dual_mov_b32 v39, vcc_hi :: v_dual_mov_b32 v14, s92
; GFX11-NEXT: v_dual_mov_b32 v37, vcc_lo :: v_dual_mov_b32 v10, s91
@@ -58735,18 +58836,16 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v16, s34, 0
; SI-NEXT: v_writelane_b32 v16, s35, 1
-; SI-NEXT: v_writelane_b32 v16, s36, 2
-; SI-NEXT: v_writelane_b32 v16, s37, 3
-; SI-NEXT: v_writelane_b32 v16, s30, 4
-; SI-NEXT: v_writelane_b32 v16, s31, 5
-; SI-NEXT: v_readfirstlane_b32 s35, v1
-; SI-NEXT: v_readfirstlane_b32 s37, v0
+; SI-NEXT: v_writelane_b32 v16, s30, 2
+; SI-NEXT: v_writelane_b32 v16, s31, 3
+; SI-NEXT: v_readfirstlane_b32 s63, v1
+; SI-NEXT: v_readfirstlane_b32 s59, v0
; SI-NEXT: s_lshr_b32 s92, s29, 16
-; SI-NEXT: s_lshr_b32 s34, s28, 16
+; SI-NEXT: s_lshr_b32 s57, s28, 16
; SI-NEXT: s_lshr_b32 s91, s27, 16
-; SI-NEXT: s_lshr_b32 s31, s26, 16
+; SI-NEXT: s_lshr_b32 s47, s26, 16
; SI-NEXT: s_lshr_b32 s90, s25, 16
-; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s45, s24, 16
; SI-NEXT: s_lshr_b32 s89, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
; SI-NEXT: s_lshr_b32 s88, s21, 16
@@ -58755,76 +58854,88 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s18, 16
; SI-NEXT: s_lshr_b32 s78, s17, 16
; SI-NEXT: s_lshr_b32 s94, s16, 16
-; SI-NEXT: s_lshr_b32 s93, s35, 16
-; SI-NEXT: s_lshr_b32 s36, s37, 16
+; SI-NEXT: s_lshr_b32 s93, s63, 16
+; SI-NEXT: s_lshr_b32 s73, s59, 16
; SI-NEXT: v_readfirstlane_b32 s4, v2
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB89_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s5, s17, 0xffff
; SI-NEXT: s_lshl_b32 s7, s78, 16
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s94, 16
-; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_or_b32 s75, s5, s7
; SI-NEXT: s_and_b32 s5, s19, 0xffff
; SI-NEXT: s_lshl_b32 s7, s79, 16
-; SI-NEXT: s_or_b32 s14, s4, s44
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s95, 16
-; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_or_b32 s77, s5, s7
; SI-NEXT: s_and_b32 s5, s21, 0xffff
; SI-NEXT: s_lshl_b32 s7, s88, 16
-; SI-NEXT: s_or_b32 s12, s4, s46
+; SI-NEXT: s_or_b32 s31, s5, s7
+; SI-NEXT: s_and_b32 s7, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s89, 16
+; SI-NEXT: s_mov_b32 s5, s59
+; SI-NEXT: s_or_b32 s59, s7, s9
+; SI-NEXT: s_and_b32 s7, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s90, 16
+; SI-NEXT: s_or_b32 s61, s7, s9
+; SI-NEXT: s_and_b32 s7, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s91, 16
+; SI-NEXT: s_and_b32 s4, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s94, 16
+; SI-NEXT: s_or_b32 s43, s7, s9
+; SI-NEXT: s_and_b32 s7, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s92, 16
+; SI-NEXT: s_or_b32 s14, s4, s74
+; SI-NEXT: s_and_b32 s4, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s95, 16
+; SI-NEXT: s_or_b32 s41, s7, s9
+; SI-NEXT: s_and_b32 s7, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s93, 16
+; SI-NEXT: s_or_b32 s12, s4, s76
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s56, vcc_lo, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s89, 16
-; SI-NEXT: s_or_b32 s10, s4, s56
+; SI-NEXT: s_lshl_b32 s30, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s60, s45, 16
+; SI-NEXT: s_or_b32 s35, s7, s9
+; SI-NEXT: s_mov_b32 s7, s45
+; SI-NEXT: s_lshr_b64 s[44:45], s[74:75], 16
+; SI-NEXT: s_or_b32 s10, s4, s30
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s58, vcc_hi, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s90, 16
+; SI-NEXT: s_lshl_b32 s42, s47, 16
+; SI-NEXT: s_mov_b32 s45, s7
+; SI-NEXT: s_mov_b32 s7, s47
+; SI-NEXT: s_lshr_b64 s[46:47], s[76:77], 16
; SI-NEXT: s_or_b32 s8, s4, s58
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s30, 16
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s91, 16
+; SI-NEXT: s_lshl_b32 s40, s57, 16
+; SI-NEXT: s_mov_b32 s47, s7
+; SI-NEXT: s_mov_b32 s7, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[30:31], 16
; SI-NEXT: s_or_b32 s6, s4, s60
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s31, 16
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s92, 16
+; SI-NEXT: s_mov_b32 s57, s7
+; SI-NEXT: s_mov_b32 s9, s59
+; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
+; SI-NEXT: s_mov_b32 s7, s61
+; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
; SI-NEXT: s_or_b32 s4, s4, s42
-; SI-NEXT: s_lshl_b32 s40, s34, 16
-; SI-NEXT: s_or_b32 s41, s5, s7
-; SI-NEXT: s_and_b32 s5, s35, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s93, 16
+; SI-NEXT: s_mov_b32 s59, s5
+; SI-NEXT: s_mov_b32 s61, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16
; SI-NEXT: s_and_b32 s42, s28, 0xffff
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_lshl_b32 s74, s36, 16
+; SI-NEXT: s_lshl_b32 s34, s73, 16
+; SI-NEXT: s_mov_b32 s63, s61
; SI-NEXT: s_or_b32 s42, s42, s40
+; SI-NEXT: s_mov_b32 s61, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_and_b32 s40, s37, 0xffff
-; SI-NEXT: s_mov_b32 s15, s45
-; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16
-; SI-NEXT: s_mov_b32 s13, s47
-; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16
-; SI-NEXT: s_mov_b32 s11, s57
-; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
-; SI-NEXT: s_mov_b32 s9, s59
-; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
-; SI-NEXT: s_mov_b32 s7, s61
-; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
+; SI-NEXT: s_and_b32 s40, s59, 0xffff
+; SI-NEXT: s_mov_b32 s15, s75
+; SI-NEXT: s_mov_b32 s13, s77
+; SI-NEXT: s_mov_b32 s11, s31
; SI-NEXT: s_mov_b32 s5, s43
; SI-NEXT: s_mov_b32 s43, s41
-; SI-NEXT: s_or_b32 s40, s40, s74
-; SI-NEXT: s_mov_b32 s41, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
+; SI-NEXT: s_mov_b32 s73, s61
+; SI-NEXT: s_or_b32 s40, s40, s34
+; SI-NEXT: s_mov_b32 s41, s35
+; SI-NEXT: s_lshr_b64 s[74:75], s[34:35], 16
; SI-NEXT: s_mov_b64 s[76:77], 0
; SI-NEXT: s_branch .LBB89_3
; SI-NEXT: .LBB89_2:
@@ -58847,23 +58958,23 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: .LBB89_3: ; %Flow
; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
-; SI-NEXT: s_cselect_b32 s45, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: s_cselect_b32 s61, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s61, 1
; SI-NEXT: s_cbranch_scc1 .LBB89_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s37, s37, 3
-; SI-NEXT: s_and_b32 s4, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s36, 16
+; SI-NEXT: s_add_i32 s4, s59, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s35, s35, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_add_i32 s4, s63, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s57, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
@@ -58873,7 +58984,7 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s47, 16
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s27, 0xffff
@@ -58881,7 +58992,7 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_lshl_b32 s7, s45, 16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s25, 0xffff
@@ -58996,7 +59107,7 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: s_and_b32 s19, s41, 0xffff
; SI-NEXT: s_lshl_b32 s20, s93, 16
; SI-NEXT: s_or_b32 s19, s19, s20
-; SI-NEXT: v_readlane_b32 s30, v16, 4
+; SI-NEXT: v_readlane_b32 s30, v16, 2
; SI-NEXT: v_mov_b32_e32 v0, s14
; SI-NEXT: v_mov_b32_e32 v1, s15
; SI-NEXT: v_mov_b32_e32 v2, s12
@@ -59013,9 +59124,7 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v13, s17
; SI-NEXT: v_mov_b32_e32 v14, s18
; SI-NEXT: v_mov_b32_e32 v15, s19
-; SI-NEXT: v_readlane_b32 s31, v16, 5
-; SI-NEXT: v_readlane_b32 s37, v16, 3
-; SI-NEXT: v_readlane_b32 s36, v16, 2
+; SI-NEXT: v_readlane_b32 s31, v16, 3
; SI-NEXT: v_readlane_b32 s35, v16, 1
; SI-NEXT: v_readlane_b32 s34, v16, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
@@ -60553,10 +60662,10 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: v_writelane_b32 v17, s37, 3
; SI-NEXT: v_writelane_b32 v17, s30, 4
; SI-NEXT: v_writelane_b32 v17, s31, 5
-; SI-NEXT: v_readfirstlane_b32 s37, v1
-; SI-NEXT: v_readfirstlane_b32 s35, v0
-; SI-NEXT: s_lshr_b32 s31, s29, 16
-; SI-NEXT: s_lshr_b32 s30, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s36, v1
+; SI-NEXT: v_readfirstlane_b32 s34, v0
+; SI-NEXT: s_lshr_b32 s30, s29, 16
+; SI-NEXT: s_lshr_b32 s4, s28, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s26, 16
; SI-NEXT: s_lshr_b32 s95, s25, 16
@@ -60568,104 +60677,114 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s18, 16
; SI-NEXT: s_lshr_b32 s79, s17, 16
-; SI-NEXT: s_lshr_b32 s78, s16, 16
-; SI-NEXT: s_lshr_b32 s36, s37, 16
-; SI-NEXT: s_lshr_b32 s34, s35, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v2
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s37, s16, 16
+; SI-NEXT: s_lshr_b32 s35, s36, 16
+; SI-NEXT: s_lshr_b32 s31, s34, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v2
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB93_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshl_b32 s73, s16, 16
-; SI-NEXT: s_lshl_b32 s77, s78, 16
-; SI-NEXT: s_lshl_b32 s63, s17, 16
-; SI-NEXT: s_lshl_b32 s76, s79, 16
-; SI-NEXT: s_lshl_b32 s61, s18, 16
-; SI-NEXT: s_lshl_b32 s75, s88, 16
-; SI-NEXT: s_lshl_b32 s59, s19, 16
-; SI-NEXT: s_lshl_b32 s74, s89, 16
-; SI-NEXT: s_lshl_b32 s57, s20, 16
-; SI-NEXT: s_lshl_b32 s72, s90, 16
-; SI-NEXT: s_lshl_b32 s47, s21, 16
-; SI-NEXT: s_lshl_b32 s62, s91, 16
-; SI-NEXT: s_lshl_b32 s45, s22, 16
-; SI-NEXT: s_lshl_b32 s60, s92, 16
-; SI-NEXT: s_lshl_b32 s43, s23, 16
-; SI-NEXT: s_lshl_b32 s58, s93, 16
-; SI-NEXT: s_lshl_b32 s41, s24, 16
-; SI-NEXT: s_lshl_b32 s56, s94, 16
-; SI-NEXT: s_lshl_b32 s15, s25, 16
-; SI-NEXT: s_lshl_b32 s46, s95, 16
-; SI-NEXT: s_lshl_b32 s13, s26, 16
-; SI-NEXT: s_lshl_b32 s44, vcc_lo, 16
-; SI-NEXT: s_lshl_b32 s11, s27, 16
-; SI-NEXT: s_lshl_b32 s42, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s10, s28, 16
-; SI-NEXT: s_lshl_b32 s40, s30, 16
-; SI-NEXT: s_lshl_b32 s8, s29, 16
-; SI-NEXT: s_lshl_b32 s14, s31, 16
-; SI-NEXT: s_lshl_b32 s7, s35, 16
-; SI-NEXT: s_lshl_b32 s12, s34, 16
-; SI-NEXT: s_lshl_b32 s6, s37, 16
-; SI-NEXT: s_lshl_b32 s9, s36, 16
+; SI-NEXT: s_lshl_b32 s74, s16, 16
+; SI-NEXT: s_lshl_b32 s78, s37, 16
+; SI-NEXT: s_lshl_b32 s72, s17, 16
+; SI-NEXT: s_lshl_b32 s77, s79, 16
+; SI-NEXT: s_lshl_b32 s62, s18, 16
+; SI-NEXT: s_lshl_b32 s76, s88, 16
+; SI-NEXT: s_lshl_b32 s60, s19, 16
+; SI-NEXT: s_lshl_b32 s75, s89, 16
+; SI-NEXT: s_lshl_b32 s58, s20, 16
+; SI-NEXT: s_lshl_b32 s73, s90, 16
+; SI-NEXT: s_lshl_b32 s56, s21, 16
+; SI-NEXT: s_lshl_b32 s63, s91, 16
+; SI-NEXT: s_lshl_b32 s46, s22, 16
+; SI-NEXT: s_lshl_b32 s61, s92, 16
+; SI-NEXT: s_lshl_b32 s44, s23, 16
+; SI-NEXT: s_lshl_b32 s59, s93, 16
+; SI-NEXT: s_lshl_b32 s42, s24, 16
+; SI-NEXT: s_lshl_b32 s57, s94, 16
+; SI-NEXT: s_lshl_b32 s43, s25, 16
+; SI-NEXT: s_lshl_b32 s47, s95, 16
+; SI-NEXT: s_lshl_b32 s14, s26, 16
+; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s12, s27, 16
+; SI-NEXT: s_lshl_b32 s40, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s15, s28, 16
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s41, s4, 16
+; SI-NEXT: s_lshl_b32 s9, s29, 16
+; SI-NEXT: s_lshl_b32 s13, s30, 16
+; SI-NEXT: s_lshl_b32 s10, s34, 16
+; SI-NEXT: s_lshl_b32 s11, s31, 16
+; SI-NEXT: s_lshl_b32 s7, s36, 16
+; SI-NEXT: s_lshl_b32 s8, s35, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB93_3
; SI-NEXT: .LBB93_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr15
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr9
+; SI-NEXT: ; implicit-def: $sgpr13
+; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr11
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: .LBB93_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
; SI-NEXT: s_cmp_lg_u32 s4, 1
+; SI-NEXT: s_mov_b32 s4, s7
+; SI-NEXT: s_mov_b32 s5, s10
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s15
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s43
+; SI-NEXT: s_mov_b32 s15, s41
; SI-NEXT: s_cbranch_scc1 .LBB93_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s37, s37, 3
-; SI-NEXT: s_and_b32 s4, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s36, 16
-; SI-NEXT: s_add_i32 s35, s35, 3
+; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: s_and_b32 s4, s36, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_add_i32 s34, s34, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s35, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s34, 16
-; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s29, 0xffff
+; SI-NEXT: s_and_b32 s5, s34, 0xffff
; SI-NEXT: s_lshl_b32 s7, s31, 16
-; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s28, 0xffff
+; SI-NEXT: s_add_i32 s29, s29, 3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: s_and_b32 s7, s29, 0xffff
; SI-NEXT: s_lshl_b32 s8, s30, 16
-; SI-NEXT: s_add_i32 s27, s27, 3
+; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_or_b32 s7, s8, s7
+; SI-NEXT: s_and_b32 s8, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_add_i32 s27, s27, 3
+; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_and_b32 s8, s27, 0xffff
; SI-NEXT: s_lshl_b32 s9, vcc_hi, 16
; SI-NEXT: s_add_i32 s26, s26, 3
@@ -60711,12 +60830,12 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s17, s20, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s78, 16
+; SI-NEXT: s_lshl_b32 s20, s37, 16
; SI-NEXT: s_or_b32 s16, s20, s16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
@@ -60729,102 +60848,102 @@ define inreg <32 x bfloat> @bitcast_v32i16_to_v32bf16_scalar(<32 x i16> inreg %a
; SI-NEXT: s_add_i32 s18, s18, 0x30000
; SI-NEXT: s_add_i32 s17, s17, 0x30000
; SI-NEXT: s_add_i32 s16, s16, 0x30000
-; SI-NEXT: s_and_b32 s77, s16, 0xffff0000
-; SI-NEXT: s_lshl_b32 s73, s16, 16
-; SI-NEXT: s_and_b32 s76, s17, 0xffff0000
-; SI-NEXT: s_lshl_b32 s63, s17, 16
-; SI-NEXT: s_and_b32 s75, s18, 0xffff0000
-; SI-NEXT: s_lshl_b32 s61, s18, 16
-; SI-NEXT: s_and_b32 s74, s19, 0xffff0000
-; SI-NEXT: s_lshl_b32 s59, s19, 16
-; SI-NEXT: s_and_b32 s72, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s57, s15, 16
-; SI-NEXT: s_and_b32 s62, s14, 0xffff0000
-; SI-NEXT: s_lshl_b32 s47, s14, 16
-; SI-NEXT: s_and_b32 s60, s13, 0xffff0000
-; SI-NEXT: s_lshl_b32 s45, s13, 16
-; SI-NEXT: s_and_b32 s58, s12, 0xffff0000
-; SI-NEXT: s_lshl_b32 s43, s12, 16
-; SI-NEXT: s_and_b32 s56, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s41, s11, 16
-; SI-NEXT: s_and_b32 s46, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s15, s10, 16
-; SI-NEXT: s_and_b32 s44, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s13, s9, 16
-; SI-NEXT: s_and_b32 s42, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s11, s8, 16
-; SI-NEXT: s_and_b32 s40, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s10, s7, 16
-; SI-NEXT: s_and_b32 s14, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s8, s6, 16
-; SI-NEXT: s_and_b32 s12, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s7, s5, 16
-; SI-NEXT: s_and_b32 s9, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s6, s4, 16
+; SI-NEXT: s_and_b32 s78, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s16, 16
+; SI-NEXT: s_and_b32 s77, s17, 0xffff0000
+; SI-NEXT: s_lshl_b32 s72, s17, 16
+; SI-NEXT: s_and_b32 s76, s18, 0xffff0000
+; SI-NEXT: s_lshl_b32 s62, s18, 16
+; SI-NEXT: s_and_b32 s75, s19, 0xffff0000
+; SI-NEXT: s_lshl_b32 s60, s19, 16
+; SI-NEXT: s_and_b32 s73, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s58, s15, 16
+; SI-NEXT: s_and_b32 s63, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s56, s14, 16
+; SI-NEXT: s_and_b32 s61, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s46, s13, 16
+; SI-NEXT: s_and_b32 s59, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s44, s12, 16
+; SI-NEXT: s_and_b32 s57, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s42, s11, 16
+; SI-NEXT: s_and_b32 s47, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s14, s10, 16
+; SI-NEXT: s_and_b32 s45, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s12, s9, 16
+; SI-NEXT: s_and_b32 s40, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s10, s8, 16
+; SI-NEXT: s_and_b32 s15, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s6, 16
+; SI-NEXT: s_and_b32 s13, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_and_b32 s11, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_and_b32 s8, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: .LBB93_5: ; %end
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s78
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s76
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s77
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s72
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s76
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s62
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s75
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s59
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s60
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s73
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s57
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s58
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s63
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s47
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s56
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s61
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s46
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s59
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s44
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s56
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s57
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s42
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s47
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s45
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s40
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s15
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s9
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s7
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s11
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s5
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s8
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s4
; SI-NEXT: v_readlane_b32 s30, v17, 4
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
; SI-NEXT: v_readlane_b32 s31, v17, 5
@@ -62607,22 +62726,20 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-LABEL: bitcast_v32bf16_to_v32i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s42, v1
; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
@@ -62659,33 +62776,32 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v63, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s16
; SI-NEXT: v_mul_f32_e64 v6, 1.0, s41
; SI-NEXT: v_mul_f32_e64 v50, 1.0, s17
; SI-NEXT: v_mul_f32_e64 v4, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s18
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s29
; SI-NEXT: v_mul_f32_e64 v2, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v61, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s20
; SI-NEXT: v_mul_f32_e64 v14, 1.0, s27
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21
; SI-NEXT: v_mul_f32_e64 v22, 1.0, s26
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s25
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s14
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s13
; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s10
; SI-NEXT: v_mul_f32_e64 v32, 1.0, s9
; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s6
; SI-NEXT: v_mul_f32_e64 v30, 1.0, s5
; SI-NEXT: v_mul_f32_e64 v18, 1.0, s4
; SI-NEXT: v_mul_f32_e64 v44, 1.0, s44
@@ -62694,28 +62810,41 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43
; SI-NEXT: s_cbranch_scc0 .LBB95_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v63
+; SI-NEXT: v_mov_b32_e32 v9, v17
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v62
+; SI-NEXT: v_mov_b32_e32 v62, v23
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v61
+; SI-NEXT: v_mov_b32_e32 v59, v13
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v60
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59
+; SI-NEXT: v_mov_b32_e32 v56, v21
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21
+; SI-NEXT: v_mov_b32_e32 v46, v5
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v58
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v57
+; SI-NEXT: v_mov_b32_e32 v45, v19
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v19
+; SI-NEXT: v_mov_b32_e32 v5, v15
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v15
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v56
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v47
+; SI-NEXT: v_mov_b32_e32 v61, v3
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v3
+; SI-NEXT: v_mov_b32_e32 v60, v1
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v1
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v46
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v45
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18
+; SI-NEXT: v_mov_b32_e32 v58, v11
+; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v11
+; SI-NEXT: v_mov_b32_e32 v57, v7
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v44
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
@@ -62725,15 +62854,36 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v34
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v48
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v32
-; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v30
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v55
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v30
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18
; SI-NEXT: s_branch .LBB95_3
; SI-NEXT: .LBB95_2:
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v60, v1
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_mov_b32_e32 v9, v17
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v62, v23
+; SI-NEXT: v_mov_b32_e32 v59, v13
+; SI-NEXT: v_mov_b32_e32 v56, v21
+; SI-NEXT: v_mov_b32_e32 v46, v5
+; SI-NEXT: v_mov_b32_e32 v45, v19
+; SI-NEXT: v_mov_b32_e32 v5, v15
+; SI-NEXT: v_mov_b32_e32 v61, v3
+; SI-NEXT: v_mov_b32_e32 v58, v11
+; SI-NEXT: v_mov_b32_e32 v57, v7
; SI-NEXT: s_mov_b64 s[4:5], -1
-; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr13
@@ -62768,181 +62918,195 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB95_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v63
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39
-; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9
+; SI-NEXT: v_lshr_b64 v[6:7], v[23:24], 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v61
-; SI-NEXT: v_lshr_b64 v[9:10], v[6:7], 16
+; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v59
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v1
; SI-NEXT: v_lshr_b64 v[13:14], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v59
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v46
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v56
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v7
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v21
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; SI-NEXT: v_lshr_b64 v[23:24], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v57
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v58
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v7
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v45
+; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v38
; SI-NEXT: v_lshr_b64 v[24:25], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v47
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v56
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
-; SI-NEXT: v_lshr_b64 v[25:26], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v45
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v46
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v11
-; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v28
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v44
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v7
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v14
-; SI-NEXT: v_lshr_b64 v[27:28], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v18
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v12
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v48
-; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v20
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v61
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v7
+; SI-NEXT: v_lshr_b64 v[25:26], v[5:6], 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v58
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v10
+; SI-NEXT: v_lshr_b64 v[26:27], v[5:6], 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v44
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v11
+; SI-NEXT: v_lshr_b64 v[27:28], v[5:6], 16
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v55
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v12
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v48
+; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5
; SI-NEXT: v_lshr_b64 v[19:20], v[35:36], 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v8
; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50
-; SI-NEXT: v_lshr_b64 v[7:8], v[34:35], 16
+; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v5
; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
+; SI-NEXT: v_lshr_b64 v[7:8], v[34:35], 16
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v37
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16
; SI-NEXT: v_lshr_b64 v[17:18], v[30:31], 16
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v21
-; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22
+; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v22
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v11
; SI-NEXT: v_lshr_b64 v[11:12], v[32:33], 16
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v38
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3
; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39
; SI-NEXT: v_lshr_b64 v[39:40], v[6:7], 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9
; SI-NEXT: v_lshr_b64 v[40:41], v[18:19], 16
; SI-NEXT: v_lshr_b64 v[21:22], v[37:38], 16
; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
; SI-NEXT: v_lshr_b64 v[41:42], v[10:11], 16
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[42:43], v[16:17], 16
; SI-NEXT: v_lshr_b64 v[54:55], v[20:21], 16
; SI-NEXT: v_lshr_b64 v[43:44], v[14:15], 16
; SI-NEXT: .LBB95_5: ; %end
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v1
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v5
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v43
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v54
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v36
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v31
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v9
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v49
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v40
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v41
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v43
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v54
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v4, v4, v5
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v36
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v26
; SI-NEXT: v_or_b32_e32 v12, v12, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v31
; SI-NEXT: v_or_b32_e32 v13, v13, v14
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v27
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v29
; SI-NEXT: v_or_b32_e32 v15, v15, v16
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -65056,43 +65220,35 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; kill: killed $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v14
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v10
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v9
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v8
-; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v7
-; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4
@@ -65101,117 +65257,128 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v1
; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; kill: killed $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr20
+; VI-NEXT: ; kill: killed $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr17
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; kill: killed $vgpr19
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr19
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr25
+; VI-NEXT: ; kill: killed $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr20
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; kill: killed $vgpr21
; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr21
-; VI-NEXT: ; implicit-def: $vgpr20
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v12
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v3
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v6
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v1
-; VI-NEXT: v_mov_b32_e32 v25, v18
-; VI-NEXT: v_mov_b32_e32 v43, v1
-; VI-NEXT: v_mov_b32_e32 v41, v2
-; VI-NEXT: v_mov_b32_e32 v50, v3
-; VI-NEXT: v_mov_b32_e32 v63, v4
-; VI-NEXT: v_mov_b32_e32 v54, v5
-; VI-NEXT: v_mov_b32_e32 v57, v6
-; VI-NEXT: v_mov_b32_e32 v62, v7
-; VI-NEXT: v_mov_b32_e32 v60, v8
-; VI-NEXT: v_mov_b32_e32 v53, v9
-; VI-NEXT: v_mov_b32_e32 v52, v10
-; VI-NEXT: v_mov_b32_e32 v42, v11
-; VI-NEXT: v_mov_b32_e32 v55, v12
-; VI-NEXT: v_mov_b32_e32 v47, v13
-; VI-NEXT: v_mov_b32_e32 v46, v14
-; VI-NEXT: v_mov_b32_e32 v18, v15
-; VI-NEXT: v_mov_b32_e32 v59, v16
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v1
+; VI-NEXT: v_mov_b32_e32 v55, v1
+; VI-NEXT: v_mov_b32_e32 v17, v2
+; VI-NEXT: v_mov_b32_e32 v42, v3
+; VI-NEXT: v_mov_b32_e32 v43, v4
+; VI-NEXT: v_mov_b32_e32 v46, v5
+; VI-NEXT: v_mov_b32_e32 v18, v6
+; VI-NEXT: v_mov_b32_e32 v19, v7
+; VI-NEXT: v_mov_b32_e32 v40, v8
+; VI-NEXT: v_mov_b32_e32 v44, v9
+; VI-NEXT: v_mov_b32_e32 v25, v10
+; VI-NEXT: v_mov_b32_e32 v20, v11
+; VI-NEXT: v_mov_b32_e32 v41, v12
+; VI-NEXT: v_mov_b32_e32 v56, v13
+; VI-NEXT: v_mov_b32_e32 v45, v14
+; VI-NEXT: v_mov_b32_e32 v52, v15
+; VI-NEXT: v_mov_b32_e32 v51, v16
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr5
@@ -65224,238 +65391,246 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v17, 3
-; VI-NEXT: v_add_u16_sdwa v26, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v32, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v59, 3, v16
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v26
-; VI-NEXT: v_add_u16_e32 v18, 3, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v32
-; VI-NEXT: v_or_b32_e32 v16, v59, v16
-; VI-NEXT: v_or_b32_e32 v15, v18, v15
-; VI-NEXT: v_add_u16_sdwa v27, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v33, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
-; VI-NEXT: v_add_u16_e32 v46, 3, v14
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v27
-; VI-NEXT: v_add_u16_e32 v47, 3, v13
+; VI-NEXT: v_mov_b32_e32 v20, 3
+; VI-NEXT: v_add_u16_sdwa v48, v3, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v42, 3, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; VI-NEXT: v_add_u16_sdwa v31, v6, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v18, v42, v3
+; VI-NEXT: v_add_u16_e32 v50, 3, v6
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v31
+; VI-NEXT: v_add_u16_sdwa v37, v5, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v26, v16, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v6, v50, v3
+; VI-NEXT: v_add_u16_e32 v46, 3, v5
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
+; VI-NEXT: v_add_u16_sdwa v30, v8, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v56, 3, v13
+; VI-NEXT: v_add_u16_sdwa v60, v13, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v51, 3, v16
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v26
+; VI-NEXT: v_add_u16_sdwa v33, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v5, v46, v3
+; VI-NEXT: v_add_u16_e32 v40, 3, v8
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v30
+; VI-NEXT: v_add_u16_sdwa v36, v7, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v45, 3, v14
+; VI-NEXT: v_add_u16_sdwa v27, v14, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v14, v51, v13
+; VI-NEXT: v_add_u16_e32 v52, 3, v15
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
-; VI-NEXT: v_or_b32_e32 v14, v46, v14
-; VI-NEXT: v_or_b32_e32 v13, v47, v13
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_sdwa v28, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v34, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14]
-; VI-NEXT: v_add_u16_sdwa v29, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v35, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v55, 3, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v28
-; VI-NEXT: v_add_u16_e32 v42, 3, v11
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
-; VI-NEXT: v_add_u16_sdwa v30, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v36, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v52, 3, v10
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v29
-; VI-NEXT: v_add_u16_e32 v53, 3, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v35
-; VI-NEXT: v_or_b32_e32 v12, v55, v12
-; VI-NEXT: v_or_b32_e32 v11, v42, v11
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_sdwa v31, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v37, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v60, 3, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v30
-; VI-NEXT: v_add_u16_e32 v62, 3, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v36
-; VI-NEXT: v_or_b32_e32 v10, v52, v10
-; VI-NEXT: v_or_b32_e32 v9, v53, v9
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_add_u16_sdwa v38, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v48, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v57, 3, v6
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v31
-; VI-NEXT: v_add_u16_e32 v54, 3, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
-; VI-NEXT: v_or_b32_e32 v8, v60, v8
-; VI-NEXT: v_or_b32_e32 v7, v62, v7
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_add_u16_sdwa v39, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v49, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v63, 3, v4
+; VI-NEXT: v_or_b32_e32 v8, v40, v3
+; VI-NEXT: v_add_u16_e32 v53, 3, v7
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v36
+; VI-NEXT: v_add_u16_sdwa v29, v10, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v13, v52, v13
+; VI-NEXT: v_or_b32_e32 v7, v53, v3
+; VI-NEXT: v_add_u16_e32 v47, 3, v10
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v29
+; VI-NEXT: v_add_u16_sdwa v35, v9, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v54, 3, v11
+; VI-NEXT: v_add_u16_sdwa v34, v11, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v27
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
+; VI-NEXT: v_add_u16_sdwa v38, v4, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v10, v47, v3
+; VI-NEXT: v_add_u16_e32 v44, 3, v9
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v35
+; VI-NEXT: v_add_u16_e32 v41, 3, v12
+; VI-NEXT: v_add_u16_sdwa v28, v12, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v12, v45, v11
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
+; VI-NEXT: v_add_u16_e32 v43, 3, v4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
-; VI-NEXT: v_add_u16_e32 v50, 3, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
-; VI-NEXT: v_or_b32_e32 v6, v57, v6
-; VI-NEXT: v_or_b32_e32 v5, v54, v5
+; VI-NEXT: v_or_b32_e32 v9, v44, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v28
+; VI-NEXT: v_or_b32_e32 v11, v56, v11
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v19, v43, v4
+; VI-NEXT: v_or_b32_e32 v4, v41, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v34
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v11
+; VI-NEXT: v_or_b32_e32 v3, v54, v3
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v4
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v3
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v10
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v9
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[9:10]
+; VI-NEXT: v_add_u16_sdwa v39, v2, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v49, v1, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_add_u16_e32 v41, 3, v2
+; VI-NEXT: v_add_u16_e32 v17, 3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v39
-; VI-NEXT: v_add_u16_e32 v43, 3, v1
+; VI-NEXT: v_add_u16_e32 v55, 3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
-; VI-NEXT: v_or_b32_e32 v4, v63, v4
-; VI-NEXT: v_or_b32_e32 v3, v50, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
-; VI-NEXT: v_or_b32_e32 v2, v41, v2
-; VI-NEXT: v_or_b32_e32 v1, v43, v1
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v1
+; VI-NEXT: v_or_b32_e32 v2, v17, v2
+; VI-NEXT: v_or_b32_e32 v1, v55, v1
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[18:19]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v1
; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; VI-NEXT: v_bfe_u32 v1, v27, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v28, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v29, 8, 8
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v30, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v15
+; VI-NEXT: v_bfe_u32 v1, v26, 8, 8
; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
-; VI-NEXT: v_bfe_u32 v25, v26, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v31, 8, 8
-; VI-NEXT: v_bfe_u32 v58, v38, 8, 8
-; VI-NEXT: v_bfe_u32 v61, v39, 8, 8
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v2
+; VI-NEXT: v_mov_b32_e32 v20, v54
+; VI-NEXT: v_mov_b32_e32 v54, v4
+; VI-NEXT: v_mov_b32_e32 v25, v47
+; VI-NEXT: v_mov_b32_e32 v19, v53
+; VI-NEXT: v_mov_b32_e32 v18, v50
+; VI-NEXT: v_mov_b32_e32 v47, v3
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v27, 8, 8
+; VI-NEXT: v_bfe_u32 v57, v28, 8, 8
+; VI-NEXT: v_bfe_u32 v59, v29, 8, 8
+; VI-NEXT: v_bfe_u32 v61, v30, 8, 8
+; VI-NEXT: v_bfe_u32 v63, v31, 8, 8
+; VI-NEXT: v_bfe_u32 v50, v38, 8, 8
+; VI-NEXT: v_bfe_u32 v53, v39, 8, 8
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: .LBB96_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v1, v49, v24, s4
-; VI-NEXT: v_perm_b32 v3, v43, v56, s4
+; VI-NEXT: v_perm_b32 v3, v55, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v3, v1
-; VI-NEXT: v_perm_b32 v3, v39, v61, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v41, v17, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v39, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_perm_b32 v2, v48, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v17, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v50, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v42, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v38, v58, s4
+; VI-NEXT: v_perm_b32 v2, v38, v50, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v63, v45, s4
+; VI-NEXT: v_perm_b32 v1, v43, v32, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v37, v22, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v54, v40, s4
+; VI-NEXT: v_perm_b32 v1, v46, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v31, v63, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v57, v1, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v31, v2, s4
+; VI-NEXT: v_perm_b32 v1, v18, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v36, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v62, v44, s4
+; VI-NEXT: v_perm_b32 v1, v19, v47, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v60, v1, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v30, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v35, v20, s4
+; VI-NEXT: v_perm_b32 v2, v30, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v53, v1, s4
+; VI-NEXT: v_perm_b32 v1, v40, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v52, v1, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v29, v2, s4
+; VI-NEXT: v_perm_b32 v2, v35, v2, s4
+; VI-NEXT: v_perm_b32 v1, v44, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v34, v19, s4
+; VI-NEXT: v_perm_b32 v2, v29, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v42, v1, s4
+; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v55, v1, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: v_perm_b32 v2, v34, v2, s4
+; VI-NEXT: v_perm_b32 v1, v20, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v28, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v41, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v33, v2, s4
-; VI-NEXT: v_perm_b32 v1, v47, v1, s4
+; VI-NEXT: v_perm_b32 v2, v60, v2, s4
+; VI-NEXT: v_perm_b32 v1, v56, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v46, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v27, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v45, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v27, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v32, v2, s4
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
+; VI-NEXT: v_perm_b32 v2, v33, v2, s4
+; VI-NEXT: v_perm_b32 v1, v52, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v59, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v51, v1, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v26, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
@@ -65497,19 +65672,15 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -65521,6 +65692,8 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -65538,9 +65711,10 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr29
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -65550,18 +65724,22 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB96_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_mov_b32_e32 v31, v22
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -65578,29 +65756,26 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
; GFX9-NEXT: .LBB96_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB96_4
@@ -65627,13 +65802,13 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -65650,60 +65825,59 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB96_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -65730,16 +65904,14 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v29, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -66277,167 +66449,192 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: v_writelane_b32 v4, s84, 26
; SI-NEXT: v_writelane_b32 v4, s85, 27
; SI-NEXT: v_writelane_b32 v4, s86, 28
-; SI-NEXT: v_writelane_b32 v4, s87, 29
-; SI-NEXT: v_writelane_b32 v4, s96, 30
-; SI-NEXT: v_writelane_b32 v4, s97, 31
-; SI-NEXT: v_writelane_b32 v4, s98, 32
-; SI-NEXT: v_writelane_b32 v4, s99, 33
-; SI-NEXT: v_writelane_b32 v4, s30, 34
-; SI-NEXT: v_writelane_b32 v4, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s46, v2
-; SI-NEXT: v_readfirstlane_b32 s58, v1
-; SI-NEXT: s_lshr_b32 s68, s29, 16
-; SI-NEXT: s_lshr_b32 s44, s28, 16
-; SI-NEXT: s_lshr_b32 s70, s27, 16
-; SI-NEXT: s_lshr_b32 s97, s26, 16
-; SI-NEXT: s_lshr_b32 s71, s25, 16
-; SI-NEXT: s_lshr_b32 s96, s24, 16
-; SI-NEXT: s_lshr_b32 s80, s23, 16
-; SI-NEXT: s_lshr_b32 s87, s22, 16
-; SI-NEXT: s_lshr_b32 s81, s21, 16
-; SI-NEXT: s_lshr_b32 s86, s20, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 16
-; SI-NEXT: s_lshr_b32 s85, s18, 16
-; SI-NEXT: s_lshr_b32 s83, s17, 16
-; SI-NEXT: s_lshr_b32 s84, s16, 16
-; SI-NEXT: s_lshr_b32 s69, s46, 16
-; SI-NEXT: s_lshr_b32 s56, s58, 16
+; SI-NEXT: v_writelane_b32 v4, s30, 29
+; SI-NEXT: v_writelane_b32 v4, s31, 30
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: s_lshr_b32 s45, s29, 16
+; SI-NEXT: s_lshr_b32 s6, s28, 16
+; SI-NEXT: s_lshr_b32 s68, s27, 16
+; SI-NEXT: s_lshr_b32 s53, s26, 16
+; SI-NEXT: s_lshr_b32 s57, s25, 16
+; SI-NEXT: s_lshr_b32 s37, s24, 16
+; SI-NEXT: s_lshr_b32 s59, s23, 16
+; SI-NEXT: s_lshr_b32 s31, s22, 16
+; SI-NEXT: s_lshr_b32 s61, s21, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s20, 16
+; SI-NEXT: s_lshr_b32 s63, s19, 16
+; SI-NEXT: s_lshr_b32 s95, s18, 16
+; SI-NEXT: s_lshr_b32 s73, s17, 16
+; SI-NEXT: s_lshr_b32 s69, s16, 16
+; SI-NEXT: s_lshr_b32 s47, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s30, s34, 16
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB97_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v5, s4, 4
-; SI-NEXT: v_writelane_b32 v5, s5, 5
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v5, s4, 2
-; SI-NEXT: v_writelane_b32 v5, s5, 3
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 8
; SI-NEXT: v_writelane_b32 v5, s4, 0
; SI-NEXT: v_writelane_b32 v5, s5, 1
+; SI-NEXT: s_mov_b32 s4, s59
+; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8
+; SI-NEXT: s_mov_b32 s59, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v5, s4, 6
-; SI-NEXT: v_writelane_b32 v5, s5, 7
+; SI-NEXT: s_mov_b32 s4, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24
+; SI-NEXT: s_mov_b32 s57, s4
+; SI-NEXT: s_mov_b32 s4, s61
+; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
+; SI-NEXT: s_mov_b32 s61, s4
+; SI-NEXT: s_mov_b32 s4, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
+; SI-NEXT: s_mov_b32 s73, s4
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s13, s4, s5
+; SI-NEXT: s_mov_b32 s4, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
+; SI-NEXT: s_mov_b32 s63, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s9, s4, s5
+; SI-NEXT: s_mov_b32 s4, s95
+; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
+; SI-NEXT: s_mov_b32 s95, s4
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s14, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s57, 16
; SI-NEXT: s_or_b32 s15, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s53, 16
; SI-NEXT: s_or_b32 s10, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s44, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_mov_b32 s44, s6
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s45, 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
; SI-NEXT: s_or_b32 s7, s4, s5
-; SI-NEXT: s_and_b32 s4, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s56, 16
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s69, 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
-; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s47, 16
+; SI-NEXT: s_mov_b32 s82, s30
+; SI-NEXT: s_mov_b32 s83, vcc_lo
+; SI-NEXT: s_or_b32 s5, s5, s75
+; SI-NEXT: s_bfe_u32 s30, s63, 0x80008
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
+; SI-NEXT: s_mov_b32 vcc_lo, s53
+; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s36, s15, 8
+; SI-NEXT: s_mov_b32 s53, vcc_lo
+; SI-NEXT: s_mov_b32 s65, s30
+; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
+; SI-NEXT: s_mov_b32 s30, vcc_hi
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
+; SI-NEXT: s_mov_b32 vcc_hi, s30
+; SI-NEXT: s_mov_b32 s39, s36
+; SI-NEXT: s_mov_b32 s36, s31
+; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_or_b32 s5, s5, s45
-; SI-NEXT: s_lshr_b32 s98, s43, 8
-; SI-NEXT: s_lshr_b32 s93, s41, 8
-; SI-NEXT: s_lshr_b32 s89, s13, 8
-; SI-NEXT: s_lshr_b32 s77, s9, 8
-; SI-NEXT: s_lshr_b32 s73, s15, 8
-; SI-NEXT: s_lshr_b32 s61, s11, 8
-; SI-NEXT: s_lshr_b32 s57, s7, 8
-; SI-NEXT: s_lshr_b32 s45, s5, 8
-; SI-NEXT: s_bfe_u32 s99, s83, 0x80008
-; SI-NEXT: s_bfe_u32 s95, s82, 0x80008
-; SI-NEXT: s_bfe_u32 s91, s81, 0x80008
-; SI-NEXT: s_bfe_u32 s79, s80, 0x80008
-; SI-NEXT: s_bfe_u32 s75, s71, 0x80008
-; SI-NEXT: s_bfe_u32 s63, s70, 0x80008
-; SI-NEXT: s_bfe_u32 s59, s68, 0x80008
-; SI-NEXT: s_bfe_u32 s47, s69, 0x80008
-; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
+; SI-NEXT: s_mov_b32 s46, s34
+; SI-NEXT: s_lshr_b32 s66, s9, 8
+; SI-NEXT: s_bfe_u32 s67, s61, 0x80008
+; SI-NEXT: s_bfe_u32 s81, s59, 0x80008
+; SI-NEXT: s_bfe_u32 s86, s57, 0x80008
; SI-NEXT: s_lshr_b64 s[48:49], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
-; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
+; SI-NEXT: s_mov_b32 s31, s36
+; SI-NEXT: s_mov_b32 s55, s37
; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b32 s80, s43, 8
+; SI-NEXT: s_lshr_b32 s71, s41, 8
+; SI-NEXT: s_lshr_b32 s70, s13, 8
+; SI-NEXT: s_lshr_b32 s91, s11, 8
+; SI-NEXT: s_lshr_b32 s79, s7, 8
+; SI-NEXT: s_lshr_b32 s75, s5, 8
+; SI-NEXT: s_bfe_u32 s85, s73, 0x80008
+; SI-NEXT: s_bfe_u32 s93, s68, 0x80008
+; SI-NEXT: s_bfe_u32 s89, s45, 0x80008
+; SI-NEXT: s_bfe_u32 s77, s47, 0x80008
+; SI-NEXT: s_mov_b32 s35, s86
+; SI-NEXT: s_mov_b32 s49, s81
+; SI-NEXT: s_mov_b32 s51, s66
+; SI-NEXT: s_mov_b32 s37, s55
+; SI-NEXT: s_mov_b32 s55, s67
; SI-NEXT: s_mov_b64 s[66:67], 0
; SI-NEXT: s_branch .LBB97_3
; SI-NEXT: .LBB97_2:
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b32 s46, s34
+; SI-NEXT: s_mov_b32 s82, s30
+; SI-NEXT: s_mov_b32 s83, vcc_lo
+; SI-NEXT: s_mov_b32 s44, s6
; SI-NEXT: s_mov_b64 s[66:67], -1
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v5, s4, 0
-; SI-NEXT: v_writelane_b32 v5, s5, 1
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: v_writelane_b32 v5, s5, 1
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr85
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr65
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr79
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr57
-; SI-NEXT: ; implicit-def: $sgpr59
-; SI-NEXT: ; implicit-def: $sgpr45
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr78
@@ -66453,33 +66650,25 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: v_writelane_b32 v5, s4, 2
-; SI-NEXT: v_writelane_b32 v5, s5, 3
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v5, s4, 4
-; SI-NEXT: v_writelane_b32 v5, s5, 5
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v5, s4, 6
-; SI-NEXT: v_writelane_b32 v5, s5, 7
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB97_3: ; %Flow
; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 vcc_hi, 1, 0
-; SI-NEXT: s_cmp_lg_u32 vcc_hi, 1
-; SI-NEXT: v_readlane_b32 s66, v5, 4
-; SI-NEXT: v_readlane_b32 s67, v5, 5
+; SI-NEXT: s_cselect_b32 s66, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s66, 1
+; SI-NEXT: v_readlane_b32 s66, v5, 0
+; SI-NEXT: v_readlane_b32 s67, v5, 1
; SI-NEXT: s_cbranch_scc1 .LBB97_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s58, s58, 3
-; SI-NEXT: s_and_b32 s4, s58, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s56, 16
-; SI-NEXT: s_add_i32 s46, s46, 3
+; SI-NEXT: s_add_i32 s4, s46, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s46, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_add_i32 s5, s83, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s47, 16
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s28, 0xffff
@@ -66487,79 +66676,75 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s68, 16
+; SI-NEXT: s_lshl_b32 s8, s45, 16
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s97, 16
+; SI-NEXT: s_lshl_b32 s9, s53, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s10, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s70, 16
+; SI-NEXT: s_lshl_b32 s9, s68, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s11, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s96, 16
+; SI-NEXT: s_lshl_b32 s9, s37, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s14, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s71, 16
+; SI-NEXT: s_lshl_b32 s9, s57, 16
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s15, s8, 0x30000
; SI-NEXT: s_and_b32 s8, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s87, 16
+; SI-NEXT: s_lshl_b32 s9, s31, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s80, 16
+; SI-NEXT: s_lshl_b32 s12, s59, 16
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_and_b32 s12, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s86, 16
+; SI-NEXT: s_lshl_b32 s13, vcc_hi, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s81, 16
+; SI-NEXT: s_lshl_b32 s20, s61, 16
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s13, s20, s13
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s85, 16
+; SI-NEXT: s_lshl_b32 s20, s95, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s40, s18, 0x30000
; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s82, 16
+; SI-NEXT: s_lshl_b32 s19, s63, 16
; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s41, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s84, 16
+; SI-NEXT: s_lshl_b32 s18, s69, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s42, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s83, 16
+; SI-NEXT: s_lshl_b32 s17, s73, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s43, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v5, s16, 2
-; SI-NEXT: v_writelane_b32 v5, s17, 3
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
+; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v5, s16, 0
+; SI-NEXT: s_add_i32 s43, s16, 0x30000
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
-; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: v_writelane_b32 v5, s17, 1
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
@@ -66567,54 +66752,49 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v5, s16, 6
; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[48:49], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s99, s43, 24
-; SI-NEXT: s_lshr_b32 s83, s43, 16
-; SI-NEXT: s_lshr_b32 s98, s43, 8
-; SI-NEXT: s_lshr_b32 s95, s41, 24
-; SI-NEXT: s_lshr_b32 s82, s41, 16
-; SI-NEXT: s_lshr_b32 s93, s41, 8
-; SI-NEXT: s_lshr_b32 s91, s13, 24
-; SI-NEXT: s_lshr_b32 s81, s13, 16
-; SI-NEXT: s_lshr_b32 s89, s13, 8
-; SI-NEXT: s_lshr_b32 s79, s9, 24
-; SI-NEXT: s_lshr_b32 s80, s9, 16
-; SI-NEXT: s_lshr_b32 s77, s9, 8
-; SI-NEXT: s_lshr_b32 s75, s15, 24
-; SI-NEXT: s_lshr_b32 s71, s15, 16
-; SI-NEXT: s_lshr_b32 s73, s15, 8
-; SI-NEXT: s_lshr_b32 s63, s11, 24
-; SI-NEXT: s_lshr_b32 s70, s11, 16
-; SI-NEXT: s_lshr_b32 s61, s11, 8
-; SI-NEXT: s_lshr_b32 s59, s7, 24
-; SI-NEXT: s_lshr_b32 s68, s7, 16
-; SI-NEXT: s_lshr_b32 s57, s7, 8
-; SI-NEXT: s_lshr_b32 s47, s5, 24
-; SI-NEXT: s_lshr_b32 s69, s5, 16
-; SI-NEXT: s_lshr_b32 s45, s5, 8
-; SI-NEXT: v_writelane_b32 v5, s17, 7
+; SI-NEXT: s_lshr_b32 s85, s43, 24
+; SI-NEXT: s_lshr_b32 s73, s43, 16
+; SI-NEXT: s_lshr_b32 s80, s43, 8
+; SI-NEXT: s_lshr_b32 s65, s41, 24
+; SI-NEXT: s_lshr_b32 s63, s41, 16
+; SI-NEXT: s_lshr_b32 s71, s41, 8
+; SI-NEXT: s_lshr_b32 s55, s13, 24
+; SI-NEXT: s_lshr_b32 s61, s13, 16
+; SI-NEXT: s_lshr_b32 s70, s13, 8
+; SI-NEXT: s_lshr_b32 s49, s9, 24
+; SI-NEXT: s_lshr_b32 s59, s9, 16
+; SI-NEXT: s_lshr_b32 s51, s9, 8
+; SI-NEXT: s_lshr_b32 s35, s15, 24
+; SI-NEXT: s_lshr_b32 s57, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s15, 8
+; SI-NEXT: s_lshr_b32 s93, s11, 24
+; SI-NEXT: s_lshr_b32 s68, s11, 16
+; SI-NEXT: s_lshr_b32 s91, s11, 8
+; SI-NEXT: s_lshr_b32 s89, s7, 24
+; SI-NEXT: s_lshr_b32 s45, s7, 16
+; SI-NEXT: s_lshr_b32 s79, s7, 8
+; SI-NEXT: s_lshr_b32 s77, s5, 24
+; SI-NEXT: s_lshr_b32 s47, s5, 16
+; SI-NEXT: s_lshr_b32 s75, s5, 8
; SI-NEXT: .LBB97_5: ; %end
-; SI-NEXT: v_readlane_b32 s18, v5, 0
-; SI-NEXT: v_readlane_b32 s19, v5, 1
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v5, 2
+; SI-NEXT: s_lshl_b32 s17, s58, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
+; SI-NEXT: s_and_b32 s17, s84, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s66, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -66622,15 +66802,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s98, 8
+; SI-NEXT: s_lshl_b32 s17, s80, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s83, 0xff
+; SI-NEXT: s_and_b32 s17, s73, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s99, 24
+; SI-NEXT: s_lshl_b32 s18, s85, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v5, 3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
@@ -66638,9 +66817,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s17, s72, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s60, 0xff
-; SI-NEXT: v_readlane_b32 s18, v5, 6
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s56, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -66648,11 +66826,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s93, 8
+; SI-NEXT: s_lshl_b32 s17, s71, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s82, 0xff
+; SI-NEXT: s_and_b32 s17, s63, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s95, 24
+; SI-NEXT: s_lshl_b32 s18, s65, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -66672,11 +66850,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s89, 8
+; SI-NEXT: s_lshl_b32 s13, s70, 8
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_and_b32 s13, s81, 0xff
+; SI-NEXT: s_and_b32 s13, s61, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s16, s91, 24
+; SI-NEXT: s_lshl_b32 s16, s55, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s16, s13
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -66696,11 +66874,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s77, 8
+; SI-NEXT: s_lshl_b32 s9, s51, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s80, 0xff
+; SI-NEXT: s_and_b32 s9, s59, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s12, s79, 24
+; SI-NEXT: s_lshl_b32 s12, s49, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66720,11 +66898,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s15, 0xff
-; SI-NEXT: s_lshl_b32 s9, s73, 8
+; SI-NEXT: s_lshl_b32 s9, s39, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s71, 0xff
+; SI-NEXT: s_and_b32 s9, s57, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s12, s75, 24
+; SI-NEXT: s_lshl_b32 s12, s35, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66744,11 +66922,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s11, 0xff
-; SI-NEXT: s_lshl_b32 s9, s61, 8
+; SI-NEXT: s_lshl_b32 s9, s91, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_and_b32 s9, s70, 0xff
+; SI-NEXT: s_and_b32 s9, s68, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s63, 24
+; SI-NEXT: s_lshl_b32 s10, s93, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -66768,11 +66946,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s57, 8
+; SI-NEXT: s_lshl_b32 s7, s79, 8
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_and_b32 s7, s68, 0xff
+; SI-NEXT: s_and_b32 s7, s45, 0xff
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_lshl_b32 s8, s59, 24
+; SI-NEXT: s_lshl_b32 s8, s89, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -66792,26 +66970,20 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s45, 8
+; SI-NEXT: s_lshl_b32 s5, s75, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s69, 0xff
+; SI-NEXT: s_and_b32 s5, s47, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s47, 24
+; SI-NEXT: s_lshl_b32 s6, s77, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v4, 34
-; SI-NEXT: v_readlane_b32 s19, v5, 7
+; SI-NEXT: v_readlane_b32 s30, v4, 29
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v4, 35
-; SI-NEXT: v_readlane_b32 s99, v4, 33
-; SI-NEXT: v_readlane_b32 s98, v4, 32
-; SI-NEXT: v_readlane_b32 s97, v4, 31
-; SI-NEXT: v_readlane_b32 s96, v4, 30
-; SI-NEXT: v_readlane_b32 s87, v4, 29
+; SI-NEXT: v_readlane_b32 s31, v4, 30
; SI-NEXT: v_readlane_b32 s86, v4, 28
; SI-NEXT: v_readlane_b32 s85, v4, 27
; SI-NEXT: v_readlane_b32 s84, v4, 26
@@ -66867,17 +67039,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: v_writelane_b32 v4, s52, 10
; VI-NEXT: v_writelane_b32 v4, s53, 11
; VI-NEXT: v_writelane_b32 v4, s54, 12
-; VI-NEXT: v_writelane_b32 v4, s55, 13
-; VI-NEXT: v_writelane_b32 v4, s64, 14
-; VI-NEXT: v_writelane_b32 v4, s65, 15
-; VI-NEXT: v_writelane_b32 v4, s30, 16
-; VI-NEXT: v_writelane_b32 v4, s31, 17
+; VI-NEXT: v_writelane_b32 v4, s30, 13
+; VI-NEXT: v_writelane_b32 v4, s31, 14
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB97_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s8, s23, 8
+; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
+; VI-NEXT: s_lshr_b32 s10, s19, 24
+; VI-NEXT: s_mov_b32 s7, s8
+; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
+; VI-NEXT: s_lshr_b32 s12, s17, 8
+; VI-NEXT: s_mov_b32 s9, s10
+; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
; VI-NEXT: s_lshr_b32 s56, s5, 24
; VI-NEXT: s_lshr_b32 s57, s5, 16
; VI-NEXT: s_lshr_b32 s58, s5, 8
@@ -66900,27 +67077,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
-; VI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[26:27], 24
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
+; VI-NEXT: s_mov_b32 s11, s12
; VI-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
; VI-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
; VI-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
@@ -66930,28 +67102,28 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: s_branch .LBB97_3
; VI-NEXT: .LBB97_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr44
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr44
+; VI-NEXT: ; implicit-def: $sgpr11
; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr42
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr50
; VI-NEXT: ; implicit-def: $sgpr49
+; VI-NEXT: ; implicit-def: $sgpr42
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr34
; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr14
+; VI-NEXT: ; implicit-def: $sgpr7
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -66980,8 +67152,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: .LBB97_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s13, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s13, 1
; VI-NEXT: s_cbranch_scc1 .LBB97_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s7, s17, 3
@@ -67094,77 +67266,77 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: s_lshr_b32 s91, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
; VI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; VI-NEXT: s_lshr_b32 s30, s23, 8
-; VI-NEXT: s_lshr_b32 s31, s22, 16
-; VI-NEXT: s_lshr_b32 s34, s22, 8
-; VI-NEXT: s_lshr_b32 s35, s21, 24
-; VI-NEXT: s_lshr_b32 s36, s21, 16
-; VI-NEXT: s_lshr_b32 s37, s21, 8
-; VI-NEXT: s_lshr_b32 s38, s20, 16
-; VI-NEXT: s_lshr_b32 s39, s20, 8
-; VI-NEXT: s_lshr_b32 s48, s19, 24
-; VI-NEXT: s_lshr_b32 s49, s19, 16
-; VI-NEXT: s_lshr_b32 s50, s19, 8
-; VI-NEXT: s_lshr_b32 s51, s18, 16
-; VI-NEXT: s_lshr_b32 s52, s18, 8
-; VI-NEXT: s_lshr_b32 s53, s17, 24
-; VI-NEXT: s_lshr_b32 s54, s17, 16
-; VI-NEXT: s_lshr_b32 s55, s17, 8
-; VI-NEXT: s_lshr_b32 s64, s16, 16
-; VI-NEXT: s_lshr_b32 s65, s16, 8
+; VI-NEXT: s_lshr_b32 s7, s23, 8
+; VI-NEXT: s_lshr_b32 s30, s22, 16
+; VI-NEXT: s_lshr_b32 s31, s22, 8
+; VI-NEXT: s_lshr_b32 s34, s21, 24
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s36, s21, 8
+; VI-NEXT: s_lshr_b32 s37, s20, 16
+; VI-NEXT: s_lshr_b32 s38, s20, 8
+; VI-NEXT: s_lshr_b32 s9, s19, 24
+; VI-NEXT: s_lshr_b32 s39, s19, 16
+; VI-NEXT: s_lshr_b32 s48, s19, 8
+; VI-NEXT: s_lshr_b32 s49, s18, 16
+; VI-NEXT: s_lshr_b32 s50, s18, 8
+; VI-NEXT: s_lshr_b32 s52, s17, 24
+; VI-NEXT: s_lshr_b32 s51, s17, 16
+; VI-NEXT: s_lshr_b32 s11, s17, 8
+; VI-NEXT: s_lshr_b32 s53, s16, 16
+; VI-NEXT: s_lshr_b32 s54, s16, 8
; VI-NEXT: .LBB97_5: ; %end
; VI-NEXT: v_mov_b32_e32 v2, 0xc0c0004
; VI-NEXT: v_mov_b32_e32 v3, s44
-; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: v_perm_b32 v3, s64, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s54
+; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s16, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s53
+; VI-NEXT: v_mov_b32_e32 v3, s52
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: v_perm_b32 v3, s54, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s11
+; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s42
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_mov_b32_e32 v1, s52
-; VI-NEXT: v_perm_b32 v3, s51, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s50
+; VI-NEXT: v_perm_b32 v3, s49, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s48
+; VI-NEXT: v_mov_b32_e32 v3, s9
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: v_perm_b32 v3, s49, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s48
+; VI-NEXT: v_perm_b32 v3, s39, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s40
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_mov_b32_e32 v1, s39
-; VI-NEXT: v_perm_b32 v3, s38, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s38
+; VI-NEXT: v_perm_b32 v3, s37, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_mov_b32_e32 v3, s35
+; VI-NEXT: v_mov_b32_e32 v3, s34
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_mov_b32_e32 v1, s37
-; VI-NEXT: v_perm_b32 v3, s36, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s36
+; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, s14
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_mov_b32_e32 v1, s34
-; VI-NEXT: v_perm_b32 v3, s31, v3, v2
+; VI-NEXT: v_mov_b32_e32 v1, s31
+; VI-NEXT: v_perm_b32 v3, s30, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
; VI-NEXT: v_mov_b32_e32 v3, vcc_lo
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_mov_b32_e32 v1, s30
+; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_perm_b32 v3, vcc_hi, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -67225,12 +67397,9 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_readlane_b32 s30, v4, 16
+; VI-NEXT: v_readlane_b32 s30, v4, 13
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; VI-NEXT: v_readlane_b32 s31, v4, 17
-; VI-NEXT: v_readlane_b32 s65, v4, 15
-; VI-NEXT: v_readlane_b32 s64, v4, 14
-; VI-NEXT: v_readlane_b32 s55, v4, 13
+; VI-NEXT: v_readlane_b32 s31, v4, 14
; VI-NEXT: v_readlane_b32 s54, v4, 12
; VI-NEXT: v_readlane_b32 s53, v4, 11
; VI-NEXT: v_readlane_b32 s52, v4, 10
@@ -67281,16 +67450,30 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: v_writelane_b32 v63, s49, 7
; GFX9-NEXT: v_writelane_b32 v63, s50, 8
; GFX9-NEXT: v_writelane_b32 v63, s51, 9
-; GFX9-NEXT: v_writelane_b32 v63, s52, 10
-; GFX9-NEXT: v_writelane_b32 v63, s53, 11
-; GFX9-NEXT: v_writelane_b32 v63, s30, 12
-; GFX9-NEXT: v_writelane_b32 v63, s31, 13
+; GFX9-NEXT: v_writelane_b32 v63, s30, 10
+; GFX9-NEXT: v_writelane_b32 v63, s31, 11
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB97_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: s_lshr_b32 s47, s18, 16
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 16
+; GFX9-NEXT: s_lshr_b32 s51, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: s_lshr_b32 s57, s5, 16
; GFX9-NEXT: s_lshr_b32 s59, s5, 8
@@ -67317,49 +67500,41 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s94, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s34, s21, 8
-; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s36, s21, 16
+; GFX9-NEXT: s_lshr_b32 s37, s21, 8
+; GFX9-NEXT: s_lshr_b32 s34, s20, 16
; GFX9-NEXT: s_lshr_b32 s35, s20, 8
-; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s39, s19, 8
-; GFX9-NEXT: s_lshr_b32 s38, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s52, s17, 8
-; GFX9-NEXT: s_lshr_b32 s51, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX9-NEXT: s_lshr_b32 s31, s19, 24
+; GFX9-NEXT: s_lshr_b32 s30, s19, 8
+; GFX9-NEXT: s_mov_b32 s9, s51
+; GFX9-NEXT: s_mov_b32 s15, s49
+; GFX9-NEXT: s_mov_b32 s7, s50
+; GFX9-NEXT: s_mov_b32 s13, s48
+; GFX9-NEXT: s_mov_b32 s11, s39
+; GFX9-NEXT: s_mov_b32 s43, s38
+; GFX9-NEXT: s_mov_b32 s41, s47
+; GFX9-NEXT: s_mov_b32 s45, s46
; GFX9-NEXT: s_mov_b64 s[46:47], 0
; GFX9-NEXT: s_branch .LBB97_3
; GFX9-NEXT: .LBB97_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $sgpr6
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr15
+; GFX9-NEXT: ; implicit-def: $sgpr13
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr43
+; GFX9-NEXT: ; implicit-def: $sgpr41
; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr37
-; GFX9-NEXT: ; implicit-def: $sgpr36
-; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $vcc_hi
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -67393,8 +67568,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: .LBB97_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB97_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_pk_add_u16 v6, s27, 3 op_sel_hi:[1,0]
@@ -67490,20 +67665,20 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v4, s29
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_mov_b32_e32 v2, s5
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: v_mov_b32_e32 v16, s51
-; GFX9-NEXT: v_mov_b32_e32 v62, s52
-; GFX9-NEXT: v_mov_b32_e32 v59, s50
-; GFX9-NEXT: v_mov_b32_e32 v60, s49
-; GFX9-NEXT: v_mov_b32_e32 v58, s48
-; GFX9-NEXT: v_mov_b32_e32 v61, s38
-; GFX9-NEXT: v_mov_b32_e32 v57, s39
-; GFX9-NEXT: v_mov_b32_e32 v47, s37
-; GFX9-NEXT: v_mov_b32_e32 v56, s36
+; GFX9-NEXT: v_mov_b32_e32 v15, s9
+; GFX9-NEXT: v_mov_b32_e32 v16, s7
+; GFX9-NEXT: v_mov_b32_e32 v62, s15
+; GFX9-NEXT: v_mov_b32_e32 v59, s13
+; GFX9-NEXT: v_mov_b32_e32 v60, s11
+; GFX9-NEXT: v_mov_b32_e32 v58, s43
+; GFX9-NEXT: v_mov_b32_e32 v61, s41
+; GFX9-NEXT: v_mov_b32_e32 v57, s30
+; GFX9-NEXT: v_mov_b32_e32 v47, s45
+; GFX9-NEXT: v_mov_b32_e32 v56, s31
; GFX9-NEXT: v_mov_b32_e32 v46, s35
-; GFX9-NEXT: v_mov_b32_e32 v45, s31
-; GFX9-NEXT: v_mov_b32_e32 v44, s34
-; GFX9-NEXT: v_mov_b32_e32 v42, s30
+; GFX9-NEXT: v_mov_b32_e32 v45, s34
+; GFX9-NEXT: v_mov_b32_e32 v44, s37
+; GFX9-NEXT: v_mov_b32_e32 v42, s36
; GFX9-NEXT: v_mov_b32_e32 v43, vcc_hi
; GFX9-NEXT: v_mov_b32_e32 v41, vcc_lo
; GFX9-NEXT: v_mov_b32_e32 v40, s94
@@ -67606,10 +67781,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4
-; GFX9-NEXT: v_readlane_b32 s30, v63, 12
-; GFX9-NEXT: v_readlane_b32 s31, v63, 13
-; GFX9-NEXT: v_readlane_b32 s53, v63, 11
-; GFX9-NEXT: v_readlane_b32 s52, v63, 10
+; GFX9-NEXT: v_readlane_b32 s30, v63, 10
+; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
; GFX9-NEXT: v_readlane_b32 s50, v63, 8
; GFX9-NEXT: v_readlane_b32 s49, v63, 7
@@ -67683,6 +67856,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX11-NEXT: s_mov_b32 s42, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB97_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s31, s3, 8
+; GFX11-NEXT: s_lshr_b32 s34, s2, 16
+; GFX11-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-NEXT: s_lshr_b32 s38, s1, 8
+; GFX11-NEXT: s_lshr_b32 s39, s0, 16
+; GFX11-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: s_lshr_b32 s43, s27, 24
; GFX11-NEXT: s_lshr_b32 s44, s27, 16
; GFX11-NEXT: s_lshr_b32 s46, s27, 8
@@ -67715,35 +67904,27 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-NEXT: s_mov_b32 s5, s48
+; GFX11-NEXT: s_mov_b32 s9, s38
+; GFX11-NEXT: s_mov_b32 s7, s39
+; GFX11-NEXT: s_mov_b32 s11, s37
+; GFX11-NEXT: s_mov_b32 s13, s36
+; GFX11-NEXT: s_mov_b32 s15, s35
+; GFX11-NEXT: s_mov_b32 s41, s31
+; GFX11-NEXT: s_mov_b32 s29, s34
; GFX11-NEXT: s_branch .LBB97_3
; GFX11-NEXT: .LBB97_2:
; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr7
; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr9
+; GFX11-NEXT: ; implicit-def: $sgpr11
+; GFX11-NEXT: ; implicit-def: $sgpr13
+; GFX11-NEXT: ; implicit-def: $sgpr15
+; GFX11-NEXT: ; implicit-def: $sgpr29
; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr41
; GFX11-NEXT: ; implicit-def: $sgpr30
; GFX11-NEXT: ; implicit-def: $vcc_hi
; GFX11-NEXT: ; implicit-def: $vcc_lo
@@ -67784,9 +67965,9 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: .LBB97_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB97_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: v_pk_add_u16 v4, s25, 3 op_sel_hi:[1,0]
@@ -67863,10 +68044,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v96, s7
+; GFX11-NEXT: v_dual_mov_b32 v83, s9 :: v_dual_mov_b32 v86, s11
+; GFX11-NEXT: v_dual_mov_b32 v87, s13 :: v_dual_mov_b32 v82, s15
+; GFX11-NEXT: v_dual_mov_b32 v84, s29 :: v_dual_mov_b32 v71, s41
; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
@@ -70539,572 +70720,532 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
+; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: s_mov_b32 s96, s27
-; SI-NEXT: v_writelane_b32 v44, s28, 0
-; SI-NEXT: v_writelane_b32 v44, s26, 1
-; SI-NEXT: v_writelane_b32 v44, s23, 2
-; SI-NEXT: v_writelane_b32 v44, s22, 3
-; SI-NEXT: v_writelane_b32 v44, s16, 4
-; SI-NEXT: s_mov_b32 s27, s25
-; SI-NEXT: s_mov_b32 s85, s24
-; SI-NEXT: v_readfirstlane_b32 s69, v30
-; SI-NEXT: v_readfirstlane_b32 s55, v29
-; SI-NEXT: v_readfirstlane_b32 s65, v28
-; SI-NEXT: v_readfirstlane_b32 s71, v27
-; SI-NEXT: v_readfirstlane_b32 s67, v26
-; SI-NEXT: v_readfirstlane_b32 s38, v25
-; SI-NEXT: v_readfirstlane_b32 s68, v24
-; SI-NEXT: v_readfirstlane_b32 s49, v23
-; SI-NEXT: v_readfirstlane_b32 s94, v22
-; SI-NEXT: v_readfirstlane_b32 s50, v21
-; SI-NEXT: v_readfirstlane_b32 s88, v20
-; SI-NEXT: v_readfirstlane_b32 s66, v19
-; SI-NEXT: v_readfirstlane_b32 s54, v18
-; SI-NEXT: v_readfirstlane_b32 s86, v17
-; SI-NEXT: v_readfirstlane_b32 s31, v16
-; SI-NEXT: v_readfirstlane_b32 s37, v15
-; SI-NEXT: v_readfirstlane_b32 s39, v14
-; SI-NEXT: v_readfirstlane_b32 s34, v13
-; SI-NEXT: v_readfirstlane_b32 s36, v12
-; SI-NEXT: v_readfirstlane_b32 s53, v11
-; SI-NEXT: v_readfirstlane_b32 s64, v10
-; SI-NEXT: v_readfirstlane_b32 s89, v9
-; SI-NEXT: v_readfirstlane_b32 s90, v8
-; SI-NEXT: v_readfirstlane_b32 s16, v7
-; SI-NEXT: v_readfirstlane_b32 s91, v6
-; SI-NEXT: v_readfirstlane_b32 s28, v5
-; SI-NEXT: v_readfirstlane_b32 s93, v4
-; SI-NEXT: v_readfirstlane_b32 s35, v3
-; SI-NEXT: v_readfirstlane_b32 s51, v2
-; SI-NEXT: v_readfirstlane_b32 s23, v1
-; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_readfirstlane_b32 s74, v0
+; SI-NEXT: v_writelane_b32 v44, s7, 0
+; SI-NEXT: v_readfirstlane_b32 s9, v9
+; SI-NEXT: v_writelane_b32 v44, s74, 1
+; SI-NEXT: v_readfirstlane_b32 s56, v8
+; SI-NEXT: v_writelane_b32 v44, s9, 2
+; SI-NEXT: v_readfirstlane_b32 s58, v7
+; SI-NEXT: v_writelane_b32 v44, s56, 3
+; SI-NEXT: v_readfirstlane_b32 s72, v6
+; SI-NEXT: v_writelane_b32 v44, s58, 4
+; SI-NEXT: v_readfirstlane_b32 s8, v5
+; SI-NEXT: v_writelane_b32 v44, s72, 5
+; SI-NEXT: v_readfirstlane_b32 s10, v4
+; SI-NEXT: v_writelane_b32 v44, s8, 6
+; SI-NEXT: v_readfirstlane_b32 s11, v17
+; SI-NEXT: v_writelane_b32 v44, s10, 7
+; SI-NEXT: v_readfirstlane_b32 s46, v16
+; SI-NEXT: v_writelane_b32 v44, s11, 8
+; SI-NEXT: v_readfirstlane_b32 s60, v2
+; SI-NEXT: v_writelane_b32 v44, s46, 9
+; SI-NEXT: v_readfirstlane_b32 s63, v30
+; SI-NEXT: v_readfirstlane_b32 s52, v29
+; SI-NEXT: v_readfirstlane_b32 s51, v28
+; SI-NEXT: v_readfirstlane_b32 s53, v27
+; SI-NEXT: v_readfirstlane_b32 s54, v26
+; SI-NEXT: v_readfirstlane_b32 s34, v25
+; SI-NEXT: v_readfirstlane_b32 s61, v24
+; SI-NEXT: v_readfirstlane_b32 s37, v23
+; SI-NEXT: v_readfirstlane_b32 s38, v22
+; SI-NEXT: v_readfirstlane_b32 s48, v21
+; SI-NEXT: v_readfirstlane_b32 s39, v20
+; SI-NEXT: v_readfirstlane_b32 s49, v19
+; SI-NEXT: v_readfirstlane_b32 s50, v18
+; SI-NEXT: v_readfirstlane_b32 s47, v15
+; SI-NEXT: v_readfirstlane_b32 s57, v14
+; SI-NEXT: v_readfirstlane_b32 s30, v13
+; SI-NEXT: v_readfirstlane_b32 s59, v12
+; SI-NEXT: v_readfirstlane_b32 s35, v11
+; SI-NEXT: v_readfirstlane_b32 s36, v10
+; SI-NEXT: v_readfirstlane_b32 s45, v3
+; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; SI-NEXT: v_readfirstlane_b32 s58, v32
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s84, v33
-; SI-NEXT: v_readfirstlane_b32 s47, v34
-; SI-NEXT: v_readfirstlane_b32 s30, v35
-; SI-NEXT: v_readfirstlane_b32 s25, v36
+; SI-NEXT: v_readfirstlane_b32 s12, v32
+; SI-NEXT: v_readfirstlane_b32 s14, v33
+; SI-NEXT: v_readfirstlane_b32 s40, v34
+; SI-NEXT: v_readfirstlane_b32 s41, v35
+; SI-NEXT: v_readfirstlane_b32 s13, v36
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s98, v37
+; SI-NEXT: v_readfirstlane_b32 s15, v37
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s26, v38
+; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s22, v39
+; SI-NEXT: v_readfirstlane_b32 s76, v39
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_readfirstlane_b32 s99, v48
+; SI-NEXT: v_readfirstlane_b32 s31, v48
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s70, v49
+; SI-NEXT: v_readfirstlane_b32 s73, v49
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_readfirstlane_b32 s75, v50
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s56, v51
-; SI-NEXT: v_writelane_b32 v44, s56, 5
+; SI-NEXT: v_readfirstlane_b32 s44, v51
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_readfirstlane_b32 s42, v52
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s57, v53
-; SI-NEXT: v_writelane_b32 v44, s57, 6
-; SI-NEXT: v_readfirstlane_b32 s59, v52
-; SI-NEXT: v_writelane_b32 v44, s58, 7
-; SI-NEXT: v_readfirstlane_b32 s78, v50
+; SI-NEXT: v_readfirstlane_b32 s43, v53
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s44, v54
+; SI-NEXT: v_readfirstlane_b32 s65, v54
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s87, v55
+; SI-NEXT: v_readfirstlane_b32 s66, v55
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v40
+; SI-NEXT: v_readfirstlane_b32 s55, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v41
+; SI-NEXT: v_readfirstlane_b32 s82, v41
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s83, v42
-; SI-NEXT: v_writelane_b32 v44, s59, 8
-; SI-NEXT: v_writelane_b32 v44, s47, 9
+; SI-NEXT: v_readfirstlane_b32 s64, v42
+; SI-NEXT: v_writelane_b32 v44, s76, 11
; SI-NEXT: s_cbranch_scc0 .LBB99_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readlane_b32 s4, v44, 4
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s17, 8
-; SI-NEXT: s_or_b32 s12, s4, s5
+; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_lshl_b32 s6, s17, 8
+; SI-NEXT: s_or_b32 vcc_hi, s4, s6
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s19, 24
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s85, 0xff
-; SI-NEXT: s_lshl_b32 s6, s27, 8
-; SI-NEXT: s_or_b32 s13, s5, s6
-; SI-NEXT: v_readlane_b32 s5, v44, 1
-; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s96, 24
-; SI-NEXT: s_or_b32 s6, s6, s5
-; SI-NEXT: s_and_b32 s5, s51, 0xff
-; SI-NEXT: s_lshl_b32 s7, s35, 8
-; SI-NEXT: s_or_b32 s14, s5, s7
-; SI-NEXT: s_and_b32 s5, s93, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s28, 24
-; SI-NEXT: s_or_b32 s8, s7, s5
-; SI-NEXT: s_and_b32 s5, s64, 0xff
-; SI-NEXT: s_lshl_b32 s7, s53, 8
-; SI-NEXT: s_or_b32 s15, s5, s7
-; SI-NEXT: s_and_b32 s5, s36, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s34, 24
-; SI-NEXT: s_or_b32 s10, s7, s5
-; SI-NEXT: s_and_b32 s5, s54, 0xff
-; SI-NEXT: s_lshl_b32 s7, s66, 8
-; SI-NEXT: s_or_b32 s40, s5, s7
-; SI-NEXT: s_and_b32 s5, s88, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s50, 24
-; SI-NEXT: s_or_b32 s60, s7, s5
-; SI-NEXT: s_and_b32 s5, s67, 0xff
-; SI-NEXT: s_lshl_b32 s7, s71, 8
-; SI-NEXT: s_or_b32 s41, s5, s7
-; SI-NEXT: s_and_b32 s5, s65, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s55, 24
-; SI-NEXT: s_or_b32 s62, s7, s5
-; SI-NEXT: s_and_b32 s5, s87, 0xff
-; SI-NEXT: s_lshl_b32 s7, s44, 8
-; SI-NEXT: s_or_b32 s42, s5, s7
-; SI-NEXT: s_and_b32 s5, s22, 0xff
-; SI-NEXT: s_lshl_b32 s7, s26, 8
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s20, 0xff
-; SI-NEXT: s_lshl_b32 s7, s21, 8
-; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: v_readlane_b32 s7, v44, 3
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v44, 2
-; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s6, s19, 24
+; SI-NEXT: s_or_b32 s4, s6, s4
+; SI-NEXT: s_and_b32 s6, s24, 0xff
+; SI-NEXT: s_lshl_b32 s62, s25, 8
+; SI-NEXT: s_or_b32 s67, s6, s62
+; SI-NEXT: s_and_b32 s6, s26, 0xff
+; SI-NEXT: s_and_b32 s72, s72, 0xff
+; SI-NEXT: s_lshl_b32 s58, s58, 8
+; SI-NEXT: s_and_b32 s56, s56, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s62, s27, 24
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_or_b32 s58, s72, s58
+; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s76, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v44, 0
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s9, s29, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s79, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s23, 24
-; SI-NEXT: s_or_b32 s77, s11, s9
-; SI-NEXT: s_and_b32 s9, s91, 0xff
-; SI-NEXT: s_lshl_b32 s11, s16, 8
-; SI-NEXT: s_or_b32 s9, s9, s11
-; SI-NEXT: s_and_b32 s11, s90, 0xff
-; SI-NEXT: s_mov_b32 s24, s85
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_mov_b32 s85, s26
-; SI-NEXT: s_mov_b32 s26, s44
-; SI-NEXT: s_lshl_b32 s44, s89, 24
-; SI-NEXT: v_writelane_b32 v44, s55, 10
-; SI-NEXT: s_mov_b32 s55, s34
-; SI-NEXT: s_mov_b32 s34, s23
-; SI-NEXT: s_or_b32 s23, s44, s11
-; SI-NEXT: s_and_b32 s11, s39, 0xff
-; SI-NEXT: s_lshl_b32 s44, s37, 8
-; SI-NEXT: s_or_b32 s11, s11, s44
-; SI-NEXT: s_and_b32 s44, s31, 0xff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_lshl_b32 s45, s86, 24
-; SI-NEXT: v_writelane_b32 v44, s67, 11
-; SI-NEXT: v_writelane_b32 v44, s50, 12
-; SI-NEXT: s_mov_b32 s50, s21
-; SI-NEXT: s_or_b32 s21, s45, s44
-; SI-NEXT: s_and_b32 s44, s94, 0xff
-; SI-NEXT: s_lshl_b32 s45, s49, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s68, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s38, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_mov_b32 s95, s20
-; SI-NEXT: s_or_b32 s20, s46, s45
-; SI-NEXT: s_or_b32 s61, s44, s20
-; SI-NEXT: s_and_b32 s44, s69, 0xff
-; SI-NEXT: s_lshl_b32 s45, s83, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, vcc_lo, 24
-; SI-NEXT: s_mov_b32 s52, s35
-; SI-NEXT: s_mov_b32 s35, s24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_mov_b32 s24, s69
-; SI-NEXT: s_mov_b32 s69, s53
-; SI-NEXT: s_mov_b32 s53, s31
-; SI-NEXT: s_mov_b32 s31, s96
-; SI-NEXT: s_mov_b32 s96, s18
-; SI-NEXT: s_or_b32 s18, s46, s45
-; SI-NEXT: s_or_b32 s63, s44, s18
-; SI-NEXT: s_and_b32 s44, s56, 0xff
-; SI-NEXT: s_lshl_b32 s45, s78, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s70, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s99, 24
-; SI-NEXT: s_mov_b32 s56, s22
-; SI-NEXT: s_mov_b32 s22, s87
-; SI-NEXT: s_mov_b32 s87, s83
-; SI-NEXT: s_mov_b32 s83, s54
-; SI-NEXT: s_mov_b32 s54, s39
-; SI-NEXT: s_mov_b32 s39, s90
-; SI-NEXT: s_mov_b32 s90, s19
-; SI-NEXT: s_or_b32 s19, s46, s45
-; SI-NEXT: s_and_b32 s45, s57, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s59, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_or_b32 s72, s46, s45
-; SI-NEXT: s_or_b32 s73, s44, s19
-; SI-NEXT: s_and_b32 s44, s30, 0xff
-; SI-NEXT: s_lshl_b32 s45, s47, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s84, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s58, 24
-; SI-NEXT: s_mov_b32 s97, s70
-; SI-NEXT: s_mov_b32 s70, s66
-; SI-NEXT: s_mov_b32 s66, s36
-; SI-NEXT: s_mov_b32 s36, s89
-; SI-NEXT: s_mov_b32 s89, s17
-; SI-NEXT: s_or_b32 s17, s46, s45
-; SI-NEXT: s_and_b32 s45, s98, 0xff
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s25, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_or_b32 s6, s62, s6
+; SI-NEXT: s_and_b32 s60, s60, 0xff
+; SI-NEXT: s_lshl_b32 s62, s45, 8
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: s_and_b32 s58, s58, 0xffff
+; SI-NEXT: s_or_b32 s87, s9, s56
+; SI-NEXT: s_or_b32 s70, s60, s62
+; SI-NEXT: s_or_b32 s8, s8, s10
+; SI-NEXT: s_and_b32 s10, s36, 0xff
+; SI-NEXT: s_lshl_b32 s60, s35, 8
+; SI-NEXT: s_or_b32 s9, s58, s87
+; SI-NEXT: s_and_b32 s56, s57, 0xff
+; SI-NEXT: s_lshl_b32 s58, s47, 8
+; SI-NEXT: s_and_b32 s46, s46, 0xff
+; SI-NEXT: s_or_b32 s71, s10, s60
+; SI-NEXT: s_and_b32 s10, s59, 0xff
+; SI-NEXT: s_or_b32 s56, s56, s58
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_lshl_b32 s60, s30, 24
+; SI-NEXT: s_and_b32 s56, s56, 0xffff
+; SI-NEXT: s_or_b32 s96, s11, s46
+; SI-NEXT: s_or_b32 s10, s60, s10
+; SI-NEXT: s_and_b32 s60, s50, 0xff
+; SI-NEXT: s_lshl_b32 s62, s49, 8
+; SI-NEXT: s_or_b32 s11, s56, s96
+; SI-NEXT: s_and_b32 s46, s38, 0xff
+; SI-NEXT: s_lshl_b32 s56, s37, 8
+; SI-NEXT: s_or_b32 s80, s60, s62
+; SI-NEXT: s_and_b32 s60, s39, 0xff
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s56, s61, 0xff
+; SI-NEXT: s_lshl_b32 s60, s60, 16
+; SI-NEXT: s_lshl_b32 s62, s48, 24
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_lshl_b32 s58, s34, 24
+; SI-NEXT: s_or_b32 s60, s62, s60
+; SI-NEXT: s_and_b32 s62, s54, 0xff
+; SI-NEXT: s_lshl_b32 s77, s53, 8
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_or_b32 s97, s58, s56
+; SI-NEXT: s_or_b32 s81, s62, s77
+; SI-NEXT: s_and_b32 s62, s51, 0xff
+; SI-NEXT: s_and_b32 s76, s76, 0xff
+; SI-NEXT: s_mov_b32 s79, s5
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_mov_b32 s72, s61
+; SI-NEXT: s_or_b32 s61, s46, s97
+; SI-NEXT: s_and_b32 s46, s63, 0xff
+; SI-NEXT: s_lshl_b32 s56, s64, 8
+; SI-NEXT: s_lshl_b32 s62, s62, 16
+; SI-NEXT: s_lshl_b32 s77, s52, 24
+; SI-NEXT: s_or_b32 s84, s76, s5
+; SI-NEXT: s_and_b32 s5, s20, 0xff
+; SI-NEXT: s_lshl_b32 s76, s21, 8
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s56, s82, 0xff
+; SI-NEXT: s_or_b32 s62, s77, s62
+; SI-NEXT: s_and_b32 s77, s66, 0xff
+; SI-NEXT: s_lshl_b32 s78, s65, 8
; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_or_b32 s7, s7, s77
-; SI-NEXT: s_or_b32 s9, s9, s23
-; SI-NEXT: s_mov_b32 s67, s27
-; SI-NEXT: s_or_b32 s11, s11, s21
-; SI-NEXT: s_mov_b32 s82, s65
-; SI-NEXT: s_mov_b32 s65, s38
-; SI-NEXT: s_mov_b32 s38, s91
-; SI-NEXT: s_mov_b32 s91, s29
-; SI-NEXT: s_or_b32 s74, s46, s45
-; SI-NEXT: s_or_b32 s75, s44, s17
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_and_b32 s58, s15, 0xffff
-; SI-NEXT: s_mov_b32 s48, s16
-; SI-NEXT: s_and_b32 s16, s40, 0xffff
-; SI-NEXT: s_and_b32 s29, s41, 0xffff
-; SI-NEXT: s_mov_b32 s45, s98
-; SI-NEXT: s_mov_b32 s98, s28
-; SI-NEXT: s_and_b32 s28, s42, 0xffff
-; SI-NEXT: s_and_b32 s27, s43, 0xffff
-; SI-NEXT: s_mov_b32 s44, s93
+; SI-NEXT: s_and_b32 s76, s22, 0xff
+; SI-NEXT: s_and_b32 s74, s74, 0xff
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_lshl_b32 s58, s55, 24
+; SI-NEXT: s_mov_b32 s91, s14
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_or_b32 s83, s77, s78
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_lshl_b32 s77, s23, 24
+; SI-NEXT: s_lshl_b32 s74, s74, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_or_b32 s98, s58, s56
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_mov_b32 s94, s12
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s85, s77, s76
+; SI-NEXT: s_and_b32 s76, s28, 0xff
+; SI-NEXT: s_lshl_b32 s77, s29, 8
+; SI-NEXT: s_or_b32 s86, s7, s74
+; SI-NEXT: s_mov_b32 s74, s63
+; SI-NEXT: s_or_b32 s63, s46, s98
+; SI-NEXT: s_mov_b32 s88, s44
+; SI-NEXT: s_and_b32 s44, s44, 0xff
+; SI-NEXT: s_lshl_b32 s46, s75, 8
+; SI-NEXT: s_mov_b32 s92, s41
+; SI-NEXT: s_and_b32 s41, s41, 0xff
+; SI-NEXT: s_mov_b32 s93, s40
+; SI-NEXT: s_lshl_b32 s40, s40, 8
+; SI-NEXT: s_or_b32 s78, s12, s14
+; SI-NEXT: s_and_b32 s12, s15, 0xff
+; SI-NEXT: s_or_b32 s76, s76, s77
+; SI-NEXT: s_or_b32 s44, s44, s46
+; SI-NEXT: s_and_b32 s46, s73, 0xff
+; SI-NEXT: s_mov_b32 s89, s43
+; SI-NEXT: s_and_b32 s43, s43, 0xff
+; SI-NEXT: s_or_b32 s40, s41, s40
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_lshl_b32 s13, s13, 24
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_and_b32 s76, s76, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s56, s31, 24
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_mov_b32 s90, s42
+; SI-NEXT: s_lshl_b32 s42, s42, 24
+; SI-NEXT: s_or_b32 s68, s13, s12
+; SI-NEXT: s_and_b32 s12, s40, 0xffff
+; SI-NEXT: s_or_b32 s5, s5, s85
+; SI-NEXT: s_or_b32 s7, s76, s86
+; SI-NEXT: s_or_b32 s99, s56, s46
+; SI-NEXT: s_or_b32 s76, s42, s43
+; SI-NEXT: s_and_b32 s42, s44, 0xffff
+; SI-NEXT: s_or_b32 s69, s12, s78
+; SI-NEXT: s_and_b32 s12, vcc_hi, 0xffff
+; SI-NEXT: s_or_b32 s77, s42, s99
; SI-NEXT: s_or_b32 s42, s12, s4
-; SI-NEXT: s_mov_b32 s43, s5
-; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 16
-; SI-NEXT: s_or_b32 s40, s13, s6
-; SI-NEXT: s_mov_b32 s41, s7
+; SI-NEXT: s_mov_b32 s12, s45
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_mov_b32 s4, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_and_b32 s13, s67, 0xffff
+; SI-NEXT: s_and_b32 s14, s70, 0xffff
+; SI-NEXT: s_and_b32 s58, s71, 0xffff
+; SI-NEXT: s_and_b32 vcc_hi, s80, 0xffff
+; SI-NEXT: s_and_b32 s67, s81, 0xffff
+; SI-NEXT: s_mov_b32 s47, s4
+; SI-NEXT: s_mov_b32 s4, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_mov_b32 s95, s15
+; SI-NEXT: s_and_b32 s70, s83, 0xffff
+; SI-NEXT: s_mov_b32 s45, s12
+; SI-NEXT: s_or_b32 s40, s13, s6
; SI-NEXT: s_or_b32 s14, s14, s8
; SI-NEXT: s_mov_b32 s15, s9
-; SI-NEXT: s_lshr_b64 s[92:93], s[8:9], 16
+; SI-NEXT: s_mov_b32 s57, s4
; SI-NEXT: s_or_b32 s12, s58, s10
; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s4, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_or_b32 s10, s16, s60
+; SI-NEXT: s_or_b32 s10, vcc_hi, s60
; SI-NEXT: s_mov_b32 s11, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_or_b32 s8, s29, s62
+; SI-NEXT: s_or_b32 s8, s67, s62
; SI-NEXT: s_mov_b32 s9, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_or_b32 s6, s28, s72
-; SI-NEXT: s_mov_b32 s7, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_or_b32 s4, s27, s74
-; SI-NEXT: s_mov_b32 s5, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_mov_b32 s16, s48
-; SI-NEXT: s_mov_b32 s93, s44
-; SI-NEXT: s_mov_b32 s44, s26
-; SI-NEXT: s_mov_b32 s26, s85
-; SI-NEXT: s_mov_b32 s28, s98
-; SI-NEXT: s_mov_b32 s98, s45
-; SI-NEXT: s_lshr_b32 s47, s76, 16
-; SI-NEXT: s_lshr_b32 s57, s77, 16
-; SI-NEXT: s_lshr_b32 s59, s23, 16
-; SI-NEXT: s_mov_b32 s23, s34
-; SI-NEXT: s_mov_b32 s34, s55
-; SI-NEXT: v_readlane_b32 s55, v44, 10
-; SI-NEXT: s_lshr_b32 s61, s21, 16
-; SI-NEXT: s_mov_b32 s21, s50
-; SI-NEXT: s_mov_b32 s27, s67
-; SI-NEXT: v_readlane_b32 s50, v44, 12
-; SI-NEXT: v_readlane_b32 s67, v44, 11
-; SI-NEXT: s_lshr_b32 s63, s20, 16
-; SI-NEXT: s_mov_b32 s20, s95
-; SI-NEXT: s_mov_b32 s85, s35
-; SI-NEXT: s_mov_b32 s35, s52
-; SI-NEXT: s_lshr_b32 s73, s18, 16
-; SI-NEXT: s_mov_b32 s18, s96
-; SI-NEXT: s_mov_b32 s96, s31
-; SI-NEXT: s_mov_b32 s31, s53
-; SI-NEXT: s_mov_b32 s53, s69
-; SI-NEXT: s_mov_b32 s69, s24
-; SI-NEXT: s_mov_b32 s29, s91
-; SI-NEXT: s_mov_b32 s91, s38
-; SI-NEXT: s_mov_b32 s38, s65
-; SI-NEXT: s_mov_b32 s65, s82
-; SI-NEXT: s_lshr_b32 s75, s19, 16
-; SI-NEXT: s_mov_b32 s19, s90
-; SI-NEXT: s_mov_b32 s90, s39
-; SI-NEXT: s_mov_b32 s39, s54
-; SI-NEXT: s_mov_b32 s54, s83
-; SI-NEXT: s_mov_b32 s83, s87
-; SI-NEXT: s_mov_b32 s87, s22
-; SI-NEXT: s_mov_b32 s22, s56
-; SI-NEXT: s_lshr_b32 s45, s17, 16
-; SI-NEXT: s_mov_b32 s17, s89
-; SI-NEXT: s_mov_b32 s89, s36
-; SI-NEXT: s_mov_b32 s36, s66
-; SI-NEXT: s_mov_b32 s66, s70
-; SI-NEXT: s_mov_b32 s70, s97
+; SI-NEXT: s_and_b32 s71, s84, 0xffff
+; SI-NEXT: s_mov_b32 s59, s4
+; SI-NEXT: s_mov_b32 s61, s72
+; SI-NEXT: s_mov_b32 s63, s74
+; SI-NEXT: s_or_b32 s6, s70, s76
+; SI-NEXT: s_mov_b32 s4, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[76:77], 16
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_lshr_b64 s[74:75], s[68:69], 16
+; SI-NEXT: s_mov_b32 s43, s5
+; SI-NEXT: s_mov_b32 s41, s7
+; SI-NEXT: s_mov_b32 s7, s77
+; SI-NEXT: s_mov_b32 s73, s4
+; SI-NEXT: s_or_b32 s4, s71, s68
+; SI-NEXT: s_mov_b32 s5, s69
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b32 s71, s85, 16
+; SI-NEXT: s_lshr_b32 s70, s86, 16
+; SI-NEXT: s_lshr_b32 s68, s87, 16
+; SI-NEXT: s_lshr_b32 s69, s96, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s97, 16
+; SI-NEXT: s_lshr_b32 s67, s98, 16
+; SI-NEXT: s_lshr_b32 s80, s99, 16
+; SI-NEXT: s_lshr_b32 s81, s78, 16
; SI-NEXT: s_mov_b64 s[76:77], 0
; SI-NEXT: s_branch .LBB99_3
; SI-NEXT: .LBB99_2:
+; SI-NEXT: s_mov_b32 s79, s5
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s95, s15
+; SI-NEXT: s_mov_b32 s92, s41
+; SI-NEXT: s_mov_b32 s93, s40
+; SI-NEXT: s_mov_b32 s94, s12
+; SI-NEXT: s_mov_b32 s91, s14
+; SI-NEXT: s_mov_b32 s90, s42
+; SI-NEXT: s_mov_b32 s89, s43
+; SI-NEXT: s_mov_b32 s88, s44
; SI-NEXT: s_mov_b64 s[76:77], -1
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: .LBB99_3: ; %Flow
; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
; SI-NEXT: s_cselect_b32 s76, 1, 0
; SI-NEXT: s_cmp_lg_u32 s76, 1
; SI-NEXT: s_cbranch_scc1 .LBB99_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_and_b32 s4, s22, 0xff
-; SI-NEXT: s_lshl_b32 s5, s26, 8
-; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: v_readlane_b32 s4, v44, 11
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s79, 8
+; SI-NEXT: s_add_i32 s6, s95, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s6, s98, 0xff
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
-; SI-NEXT: s_lshl_b32 s5, s25, 24
+; SI-NEXT: s_lshl_b32 s5, vcc_lo, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s5, s6
-; SI-NEXT: s_add_i32 s97, s30, 3
-; SI-NEXT: v_readlane_b32 s6, v44, 9
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s97, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 8
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s5, s92, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s6, s93, 8
+; SI-NEXT: s_add_i32 s7, s91, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v44, 7
-; SI-NEXT: s_and_b32 s7, s84, 0xff
+; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s94, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: v_readlane_b32 s8, v44, 6
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s87, 0xff
-; SI-NEXT: s_lshl_b32 s7, s44, 8
-; SI-NEXT: s_add_i32 s82, s8, 3
+; SI-NEXT: s_add_i32 s6, s66, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s65, 8
+; SI-NEXT: s_add_i32 s8, s89, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v44, 8
-; SI-NEXT: s_and_b32 s8, s82, 0xff
+; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s7, s90, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v44, 5
-; SI-NEXT: s_add_i32 s81, s7, 3
-; SI-NEXT: s_and_b32 s7, s81, 0xff
-; SI-NEXT: s_lshl_b32 s8, s78, 8
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s7, s88, 3
+; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_lshl_b32 s8, s75, 8
+; SI-NEXT: s_add_i32 s9, s73, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s9, s70, 0xff
+; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s99, 24
+; SI-NEXT: s_lshl_b32 s8, s31, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_add_i32 s67, s67, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s67, 0xff
-; SI-NEXT: s_lshl_b32 s9, s71, 8
-; SI-NEXT: s_add_i32 s65, s65, 3
+; SI-NEXT: s_add_i32 s8, s54, 3
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_lshl_b32 s9, s53, 8
+; SI-NEXT: s_add_i32 s10, s51, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s10, s65, 0xff
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s9, s55, 24
+; SI-NEXT: s_lshl_b32 s9, s52, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s9, s10
-; SI-NEXT: s_add_i32 s55, s69, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s55, 0xff
-; SI-NEXT: s_lshl_b32 s10, s83, 8
-; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
+; SI-NEXT: s_add_i32 s9, s63, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: s_lshl_b32 s10, s64, 8
+; SI-NEXT: s_add_i32 s82, s82, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s11, vcc_hi, 0xff
+; SI-NEXT: s_and_b32 s11, s82, 0xff
; SI-NEXT: s_addk_i32 s9, 0x300
-; SI-NEXT: s_lshl_b32 s10, vcc_lo, 24
+; SI-NEXT: s_lshl_b32 s10, s55, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_add_i32 s54, s54, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s54, 0xff
-; SI-NEXT: s_lshl_b32 s11, s66, 8
-; SI-NEXT: s_add_i32 s52, s88, 3
+; SI-NEXT: s_add_i32 s10, s50, 3
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_lshl_b32 s11, s49, 8
+; SI-NEXT: s_add_i32 s12, s39, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s12, s52, 0xff
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s10, 0x300
-; SI-NEXT: s_lshl_b32 s11, s50, 24
+; SI-NEXT: s_lshl_b32 s11, s48, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s11, s12
-; SI-NEXT: s_add_i32 s50, s94, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s50, 0xff
-; SI-NEXT: s_lshl_b32 s12, s49, 8
+; SI-NEXT: s_add_i32 s11, s38, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s12, s37, 8
+; SI-NEXT: s_add_i32 s13, s61, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_lshl_b32 s12, s38, 24
-; SI-NEXT: s_add_i32 s38, s68, 3
-; SI-NEXT: s_and_b32 s13, s38, 0xff
+; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_addk_i32 s11, 0x300
+; SI-NEXT: s_lshl_b32 s12, s34, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_add_i32 s49, s64, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s49, 0xff
-; SI-NEXT: s_lshl_b32 s13, s53, 8
-; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: s_add_i32 s12, s36, 3
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: s_lshl_b32 s13, s35, 8
+; SI-NEXT: s_add_i32 s14, s59, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s14, s36, 0xff
+; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_addk_i32 s12, 0x300
-; SI-NEXT: s_lshl_b32 s13, s34, 24
+; SI-NEXT: s_lshl_b32 s13, s30, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s13, s14
-; SI-NEXT: s_add_i32 s34, s39, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s13, s34, 0xff
-; SI-NEXT: s_lshl_b32 s14, s37, 8
-; SI-NEXT: s_add_i32 s95, s31, 3
+; SI-NEXT: s_add_i32 s13, s57, 3
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s14, s47, 8
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s15, s95, 0xff
; SI-NEXT: s_addk_i32 s13, 0x300
-; SI-NEXT: s_lshl_b32 s14, s86, 24
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_add_i32 vcc_lo, s51, 3
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, vcc_lo, 0xff
-; SI-NEXT: s_lshl_b32 s15, s35, 8
-; SI-NEXT: s_add_i32 s93, s93, 3
+; SI-NEXT: s_and_b32 s14, s13, 0xffff
+; SI-NEXT: v_readlane_b32 s13, v44, 8
+; SI-NEXT: s_lshl_b32 s15, s13, 24
+; SI-NEXT: v_readlane_b32 s13, v44, 9
+; SI-NEXT: s_add_i32 s13, s13, 3
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: v_readlane_b32 s14, v44, 10
+; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s15, s45, 8
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s22, s93, 0xff
; SI-NEXT: s_addk_i32 s14, 0x300
-; SI-NEXT: s_lshl_b32 s15, s28, 24
-; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_or_b32 s15, s15, s22
-; SI-NEXT: s_add_i32 s91, s91, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s15, s91, 0xff
-; SI-NEXT: s_lshl_b32 s22, s16, 8
-; SI-NEXT: s_or_b32 s15, s22, s15
-; SI-NEXT: s_lshl_b32 s22, s89, 24
-; SI-NEXT: s_add_i32 s89, s90, 3
-; SI-NEXT: s_and_b32 s40, s89, 0xff
+; SI-NEXT: s_and_b32 s15, s14, 0xffff
+; SI-NEXT: v_readlane_b32 s14, v44, 6
+; SI-NEXT: s_lshl_b32 s40, s14, 24
+; SI-NEXT: v_readlane_b32 s14, v44, 7
+; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s14, s40, s14
+; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: v_readlane_b32 s15, v44, 5
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_and_b32 s40, s15, 0xff
+; SI-NEXT: v_readlane_b32 s15, v44, 4
+; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_or_b32 s15, s15, s40
; SI-NEXT: s_addk_i32 s15, 0x300
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: v_readlane_b32 s16, v44, 0
-; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s40
-; SI-NEXT: s_add_i32 s24, s85, 3
-; SI-NEXT: v_readlane_b32 s25, v44, 1
-; SI-NEXT: s_add_i32 s28, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v44, 4
-; SI-NEXT: s_or_b32 s15, s22, s15
-; SI-NEXT: s_and_b32 s22, s24, 0xff
-; SI-NEXT: s_lshl_b32 s24, s27, 8
-; SI-NEXT: s_add_i32 s26, s25, 3
+; SI-NEXT: s_and_b32 s40, s15, 0xffff
+; SI-NEXT: v_readlane_b32 s15, v44, 2
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: s_lshl_b32 s41, s15, 24
+; SI-NEXT: v_readlane_b32 s15, v44, 3
+; SI-NEXT: s_and_b32 s24, s24, 0xff
+; SI-NEXT: s_lshl_b32 s25, s25, 8
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_and_b32 s26, s26, 0xff
+; SI-NEXT: s_and_b32 s15, s15, 0xff
+; SI-NEXT: s_addk_i32 s24, 0x300
+; SI-NEXT: s_lshl_b32 s25, s27, 24
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s26
+; SI-NEXT: s_or_b32 s15, s41, s15
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_and_b32 s25, s26, 0xff
+; SI-NEXT: s_or_b32 s15, s15, s40
+; SI-NEXT: s_add_i32 s40, s24, 0x3000000
+; SI-NEXT: s_and_b32 s24, s28, 0xff
+; SI-NEXT: s_lshl_b32 s25, s29, 8
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_addk_i32 s22, 0x300
-; SI-NEXT: s_lshl_b32 s24, s96, 24
-; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_or_b32 s24, s25, s24
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_addk_i32 s24, 0x300
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s19, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_or_b32 s22, s24, s22
+; SI-NEXT: s_and_b32 s25, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v44, 0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_add_i32 s40, s22, 0x3000000
-; SI-NEXT: s_and_b32 s22, s28, 0xff
-; SI-NEXT: s_lshl_b32 s24, s29, 8
-; SI-NEXT: s_add_i32 s79, s79, 3
+; SI-NEXT: s_lshl_b32 s26, s24, 24
+; SI-NEXT: v_readlane_b32 s24, v44, 1
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: v_readlane_b32 s18, v44, 3
-; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_and_b32 s24, s79, 0xff
+; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
; SI-NEXT: s_and_b32 s16, s20, 0xff
; SI-NEXT: s_lshl_b32 s17, s21, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_addk_i32 s22, 0x300
-; SI-NEXT: s_lshl_b32 s23, s23, 24
-; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_and_b32 s24, s24, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v44, 2
-; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s24
+; SI-NEXT: s_and_b32 s18, s22, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s23, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_or_b32 s22, s23, s22
+; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
@@ -71115,78 +71256,77 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
-; SI-NEXT: s_add_i32 s41, s22, 0x3000000
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
+; SI-NEXT: s_add_i32 s41, s24, 0x3000000
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
+; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s47, s43, 16
-; SI-NEXT: s_lshr_b32 s57, s41, 16
-; SI-NEXT: s_lshr_b32 s59, s15, 16
-; SI-NEXT: s_lshr_b32 s61, s13, 16
-; SI-NEXT: s_lshr_b32 s63, s11, 16
-; SI-NEXT: s_lshr_b32 s73, s9, 16
-; SI-NEXT: s_lshr_b32 s75, s7, 16
-; SI-NEXT: s_lshr_b32 s45, s5, 16
+; SI-NEXT: s_lshr_b32 s71, s43, 16
+; SI-NEXT: s_lshr_b32 s70, s41, 16
+; SI-NEXT: s_lshr_b32 s68, s15, 16
+; SI-NEXT: s_lshr_b32 s69, s13, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s11, 16
+; SI-NEXT: s_lshr_b32 s67, s9, 16
+; SI-NEXT: s_lshr_b32 s80, s7, 16
+; SI-NEXT: s_lshr_b32 s81, s5, 16
; SI-NEXT: .LBB99_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s16, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s80, 16
+; SI-NEXT: s_lshl_b32 s17, s44, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s47, 16
+; SI-NEXT: s_lshl_b32 s18, s71, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s40, 0xffff
; SI-NEXT: s_lshl_b32 s19, s46, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s57, 16
+; SI-NEXT: s_lshl_b32 s20, s70, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s92, 16
+; SI-NEXT: s_lshl_b32 s20, s56, 16
; SI-NEXT: s_or_b32 s14, s14, s20
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s59, 16
+; SI-NEXT: s_lshl_b32 s20, s68, 16
; SI-NEXT: s_or_b32 s15, s15, s20
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s20, s58, 16
; SI-NEXT: s_or_b32 s12, s12, s20
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s61, 16
+; SI-NEXT: s_lshl_b32 s20, s69, 16
; SI-NEXT: s_or_b32 s13, s13, s20
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s20, s60, 16
; SI-NEXT: s_or_b32 s10, s10, s20
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s63, 16
+; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT: s_or_b32 s11, s11, s20
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s20, s62, 16
; SI-NEXT: s_or_b32 s8, s8, s20
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s73, 16
+; SI-NEXT: s_lshl_b32 s20, s67, 16
; SI-NEXT: s_or_b32 s9, s9, s20
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s20, s72, 16
; SI-NEXT: s_or_b32 s6, s6, s20
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s75, 16
+; SI-NEXT: s_lshl_b32 s20, s80, 16
; SI-NEXT: s_or_b32 s7, s7, s20
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s20, s74, 16
; SI-NEXT: s_or_b32 s4, s4, s20
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s45, 16
+; SI-NEXT: s_lshl_b32 s20, s81, 16
; SI-NEXT: s_or_b32 s5, s5, s20
; SI-NEXT: v_readlane_b32 s30, v43, 34
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -75049,26 +75189,16 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
-; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
-; SI-NEXT: s_lshl_b32 s11, s26, 16
-; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
-; SI-NEXT: v_readfirstlane_b32 s44, v0
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s40
-; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s26
; SI-NEXT: v_readfirstlane_b32 s42, v1
-; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s8
+; SI-NEXT: v_readfirstlane_b32 s44, v0
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
; SI-NEXT: s_lshl_b32 s7, s28, 16
+; SI-NEXT: s_and_b32 s8, s27, 0xffff0000
; SI-NEXT: s_lshl_b32 s9, s27, 16
+; SI-NEXT: s_and_b32 s10, s26, 0xffff0000
+; SI-NEXT: s_lshl_b32 s11, s26, 16
; SI-NEXT: s_and_b32 s12, s25, 0xffff0000
; SI-NEXT: s_lshl_b32 s13, s25, 16
; SI-NEXT: s_and_b32 s14, s24, 0xffff0000
@@ -75077,6 +75207,7 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: s_lshl_b32 s23, s23, 16
; SI-NEXT: s_and_b32 s25, s22, 0xffff0000
; SI-NEXT: s_lshl_b32 s22, s22, 16
+; SI-NEXT: s_and_b32 s26, s21, 0xffff0000
; SI-NEXT: s_lshl_b32 s21, s21, 16
; SI-NEXT: s_and_b32 s27, s20, 0xffff0000
; SI-NEXT: s_lshl_b32 s20, s20, 16
@@ -75084,256 +75215,190 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: s_lshl_b32 s19, s19, 16
; SI-NEXT: s_and_b32 s29, s18, 0xffff0000
; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: s_and_b32 s40, s17, 0xffff0000
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_and_b32 s41, s16, 0xffff0000
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v2
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45
; SI-NEXT: s_cmp_lg_u32 s46, 0
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s41
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s40
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s29
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s19
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s27
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s14
; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s4
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v63, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v14, 1.0, s43
; SI-NEXT: v_mul_f32_e64 v48, 1.0, s21
; SI-NEXT: v_mul_f32_e64 v38, 1.0, s23
; SI-NEXT: v_mul_f32_e64 v36, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v62, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v62, 1.0, s44
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB103_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v8, v13
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v62, v2
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43
-; SI-NEXT: v_mov_b32_e32 v13, v10
-; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v13
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v28
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v44
-; SI-NEXT: v_lshr_b64 v[24:25], v[38:39], 16
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v14
-; SI-NEXT: v_mov_b32_e32 v55, v14
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v17
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; SI-NEXT: v_lshr_b64 v[4:5], v[34:35], 16
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v14
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v54
+; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v50
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v53
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v47
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
-; SI-NEXT: v_lshr_b64 v[51:52], v[36:37], 16
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43
-; SI-NEXT: v_mov_b32_e32 v25, v8
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v17
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v41
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v47
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v41
-; SI-NEXT: v_mov_b32_e32 v29, v20
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v47
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17
+; SI-NEXT: v_lshr_b64 v[21:22], v[36:37], 16
+; SI-NEXT: v_mov_b32_e32 v46, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v53
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v31
+; SI-NEXT: v_lshr_b64 v[19:20], v[20:21], 16
+; SI-NEXT: v_mov_b32_e32 v20, v46
+; SI-NEXT: v_lshr_b64 v[45:46], v[44:45], 16
+; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v54
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v50
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v63
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[45:46], v[60:61], 16
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v63
+; SI-NEXT: v_mov_b32_e32 v18, v63
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v55
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v55
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 s[4:5], 0
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16
-; SI-NEXT: v_mov_b32_e32 v30, v1
-; SI-NEXT: v_mov_b32_e32 v31, v2
-; SI-NEXT: v_lshr_b64 v[1:2], v[60:61], 16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40
-; SI-NEXT: v_lshr_b64 v[9:10], v[0:1], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[57:58], v[48:49], 16
-; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v12
-; SI-NEXT: v_mov_b32_e32 v61, v49
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshr_b64 v[59:60], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v2, v28
-; SI-NEXT: v_lshr_b64 v[27:28], v[15:16], 16
-; SI-NEXT: v_mov_b32_e32 v28, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v3, v13
-; SI-NEXT: v_lshr_b64 v[15:16], v[5:6], 16
-; SI-NEXT: v_mov_b32_e32 v6, v43
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
-; SI-NEXT: v_mov_b32_e32 v16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[4:5], v[23:24], 16
-; SI-NEXT: v_mov_b32_e32 v23, v18
-; SI-NEXT: v_mov_b32_e32 v60, v48
-; SI-NEXT: v_mov_b32_e32 v49, v39
-; SI-NEXT: v_mov_b32_e32 v48, v38
-; SI-NEXT: v_mov_b32_e32 v39, v37
-; SI-NEXT: v_mov_b32_e32 v38, v36
-; SI-NEXT: v_lshr_b64 v[36:37], v[30:31], 16
-; SI-NEXT: v_lshr_b64 v[11:12], v[56:57], 16
-; SI-NEXT: v_lshr_b64 v[12:13], v[26:27], 16
-; SI-NEXT: v_mov_b32_e32 v37, v39
-; SI-NEXT: v_mov_b32_e32 v30, v40
-; SI-NEXT: v_mov_b32_e32 v40, v17
-; SI-NEXT: v_mov_b32_e32 v5, v32
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v2
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v2
-; SI-NEXT: v_mov_b32_e32 v2, v24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, v51
-; SI-NEXT: v_mov_b32_e32 v24, v19
-; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16
-; SI-NEXT: v_lshr_b64 v[50:51], v[58:59], 16
-; SI-NEXT: v_lshr_b64 v[51:52], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[13:14], v[62:63], 16
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v17, v53
-; SI-NEXT: v_mov_b32_e32 v18, v54
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v14, v55
-; SI-NEXT: v_lshr_b64 v[54:55], v[21:22], 16
-; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[52:53], v[32:33], 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[54:55], v[45:46], 16
-; SI-NEXT: v_mov_b32_e32 v20, v29
-; SI-NEXT: v_mov_b32_e32 v13, v25
-; SI-NEXT: v_mov_b32_e32 v25, v12
-; SI-NEXT: v_mov_b32_e32 v12, v16
-; SI-NEXT: v_mov_b32_e32 v16, v17
-; SI-NEXT: v_lshr_b64 v[55:56], v[17:18], 16
-; SI-NEXT: v_mov_b32_e32 v29, v59
-; SI-NEXT: v_mov_b32_e32 v53, v51
-; SI-NEXT: v_mov_b32_e32 v17, v40
-; SI-NEXT: v_mov_b32_e32 v40, v30
-; SI-NEXT: v_mov_b32_e32 v22, v4
-; SI-NEXT: v_mov_b32_e32 v18, v19
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v10, v3
+; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16
+; SI-NEXT: v_mov_b32_e32 v29, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v16
+; SI-NEXT: v_lshr_b64 v[1:2], v[8:9], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v30
+; SI-NEXT: v_mov_b32_e32 v2, v16
+; SI-NEXT: v_lshr_b64 v[15:16], v[51:52], 16
+; SI-NEXT: v_mov_b32_e32 v16, v2
+; SI-NEXT: v_lshr_b64 v[2:3], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[25:26], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v0, v13
+; SI-NEXT: v_lshr_b64 v[12:13], v[10:11], 16
+; SI-NEXT: v_lshr_b64 v[13:14], v[14:15], 16
+; SI-NEXT: v_mov_b32_e32 v14, v29
+; SI-NEXT: v_mov_b32_e32 v29, v2
+; SI-NEXT: v_lshr_b64 v[2:3], v[56:57], 16
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[42:43], 16
+; SI-NEXT: v_lshr_b64 v[2:3], v[32:33], 16
+; SI-NEXT: v_lshr_b64 v[7:8], v[38:39], 16
+; SI-NEXT: v_mov_b32_e32 v8, v43
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v30
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v10, v9
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16
+; SI-NEXT: v_lshr_b64 v[2:3], v[42:43], 16
+; SI-NEXT: v_mov_b32_e32 v43, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[2:3], v[23:24], 16
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v16
+; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[2:3], v[40:41], 16
+; SI-NEXT: v_mov_b32_e32 v61, v13
+; SI-NEXT: v_mov_b32_e32 v13, v0
+; SI-NEXT: v_mov_b32_e32 v0, v42
+; SI-NEXT: v_lshr_b64 v[41:42], v[62:63], 16
+; SI-NEXT: v_lshr_b64 v[26:27], v[27:28], 16
+; SI-NEXT: v_mov_b32_e32 v45, v5
+; SI-NEXT: v_lshr_b64 v[5:6], v[58:59], 16
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, v62
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v24, v36
-; SI-NEXT: v_mov_b32_e32 v36, v38
-; SI-NEXT: v_mov_b32_e32 v38, v48
-; SI-NEXT: v_mov_b32_e32 v39, v49
-; SI-NEXT: v_mov_b32_e32 v48, v60
-; SI-NEXT: v_mov_b32_e32 v49, v61
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v43, v6
-; SI-NEXT: v_mov_b32_e32 v8, v23
+; SI-NEXT: v_mov_b32_e32 v63, v18
+; SI-NEXT: v_mov_b32_e32 v42, v0
; SI-NEXT: s_branch .LBB103_3
; SI-NEXT: .LBB103_2:
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v5, v32
-; SI-NEXT: v_mov_b32_e32 v8, v18
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v16, v53
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr11
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: .LBB103_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
@@ -75341,41 +75406,43 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB103_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v31
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v60
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v0
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v54
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; SI-NEXT: v_lshr_b64 v[52:53], v[1:2], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v47
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21
+; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v55
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v58
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4
+; SI-NEXT: v_lshr_b64 v[44:45], v[1:2], 16
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v56
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v17
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
-; SI-NEXT: v_lshr_b64 v[17:18], v[1:2], 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v28
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v6
@@ -75383,8 +75450,8 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v42
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7
@@ -75392,8 +75459,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v41
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v40
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_mov_b32_e32 v18, v8
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v8
@@ -75401,56 +75470,48 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v8
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v5
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v2
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9
-; SI-NEXT: v_lshr_b64 v[55:56], v[1:2], 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1
+; SI-NEXT: v_lshr_b64 v[41:42], v[1:2], 16
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v51
+; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v8
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v9
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshr_b64 v[15:16], v[51:52], 16
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v4
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; SI-NEXT: v_lshr_b64 v[61:62], v[14:15], 16
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 16
-; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v1
; SI-NEXT: v_mov_b32_e32 v1, v12
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62
-; SI-NEXT: v_add_f32_e32 v62, 0x40c00000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[27:28], v[11:12], 16
-; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v7
-; SI-NEXT: v_lshr_b64 v[53:54], v[14:15], 16
-; SI-NEXT: v_mov_b32_e32 v54, v17
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[28:29], v[11:12], 16
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; SI-NEXT: v_mov_b32_e32 v1, v9
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v20
@@ -75458,116 +75519,114 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v47
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v48
; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshr_b64 v[11:12], v[8:9], 16
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; SI-NEXT: v_lshr_b64 v[7:8], v[38:39], 16
-; SI-NEXT: v_lshr_b64 v[29:30], v[62:63], 16
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v3
-; SI-NEXT: v_lshr_b64 v[19:20], v[36:37], 16
-; SI-NEXT: v_lshr_b64 v[22:23], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[50:51], v[28:29], 16
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v18
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[21:22], v[36:37], 16
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v5
+; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16
+; SI-NEXT: v_lshr_b64 v[45:46], v[6:7], 16
+; SI-NEXT: v_lshr_b64 v[22:23], v[23:24], 16
+; SI-NEXT: v_lshr_b64 v[19:20], v[20:21], 16
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v60
-; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v1
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
-; SI-NEXT: v_lshr_b64 v[1:2], v[60:61], 16
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; SI-NEXT: v_lshr_b64 v[1:2], v[8:9], 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[9:10], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[57:58], v[48:49], 16
-; SI-NEXT: v_lshr_b64 v[11:12], v[56:57], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v2
-; SI-NEXT: v_mov_b32_e32 v2, v7
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[31:32], v[34:35], 16
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, v19
-; SI-NEXT: v_lshr_b64 v[24:25], v[30:31], 16
-; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16
-; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[4:5], v[34:35], 16
+; SI-NEXT: v_lshr_b64 v[25:26], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[29:30], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[12:13], v[10:11], 16
+; SI-NEXT: v_lshr_b64 v[26:27], v[27:28], 16
+; SI-NEXT: v_mov_b32_e32 v5, v44
; SI-NEXT: .LBB103_5: ; %end
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v1
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v31
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v52
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v22
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v61
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
; SI-NEXT: v_or_b32_e32 v1, v3, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v61
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v25
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v2, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v22
; SI-NEXT: v_or_b32_e32 v4, v4, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v54
-; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v8
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v45
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v19
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v8, v8, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v29
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v21
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v50
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v13
; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v26
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_or_b32_e32 v12, v12, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v28
+; SI-NEXT: v_or_b32_e32 v13, v13, v14
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v41
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -75584,19 +75643,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg %
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v25
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v27
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v55
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v52
; SI-NEXT: v_or_b32_e32 v15, v15, v16
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v32bf16_to_v32f16_scalar:
@@ -77798,32 +77848,32 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v1
; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr22
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr25
+; VI-NEXT: ; implicit-def: $vgpr27
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
@@ -77833,40 +77883,41 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB104_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v14
; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v12
; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v12
; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v5
; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v2
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v24, v53
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v1
; VI-NEXT: .LBB104_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB104_4
@@ -77900,11 +77951,11 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
; VI-NEXT: v_add_f16_sdwa v39, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v54, v8, v18
+; VI-NEXT: v_or_b32_e32 v41, v8, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v39
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
; VI-NEXT: v_add_f16_sdwa v32, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v53, v7, v18
+; VI-NEXT: v_or_b32_e32 v40, v7, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v32
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
; VI-NEXT: v_add_f16_sdwa v38, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
@@ -77916,105 +77967,111 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v31
; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
; VI-NEXT: v_add_f16_sdwa v37, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v44, v12, v18
+; VI-NEXT: v_or_b32_e32 v43, v12, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v37
; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
; VI-NEXT: v_add_f16_sdwa v30, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v43, v11, v18
+; VI-NEXT: v_or_b32_e32 v42, v11, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30
; VI-NEXT: v_add_f16_e32 v14, 0x200, v14
; VI-NEXT: v_add_f16_sdwa v36, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v41, v14, v18
+; VI-NEXT: v_or_b32_e32 v45, v14, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v36
; VI-NEXT: v_add_f16_e32 v13, 0x200, v13
; VI-NEXT: v_add_f16_sdwa v29, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_sdwa v35, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v40, v13, v18
+; VI-NEXT: v_or_b32_e32 v44, v13, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29
; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v35
; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
-; VI-NEXT: v_or_b32_e32 v46, v16, v18
-; VI-NEXT: v_or_b32_e32 v45, v15, v17
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[45:46]
-; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[40:41]
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v46
+; VI-NEXT: v_or_b32_e32 v54, v16, v18
+; VI-NEXT: v_or_b32_e32 v53, v15, v17
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[53:54]
+; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[44:45]
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v53
; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v45
; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[43:44]
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v41
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v44
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v21
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[42:43]
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v42
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v21
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[21:22]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v43
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v43
; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v22
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[53:54]
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v23
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[40:41]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[23:24]
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v26
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[25:26]
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v54
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v44
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v41
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v24
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[27:28]
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v54
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v53
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v27
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v40
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v25
+; VI-NEXT: v_mov_b32_e32 v25, v47
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v27
+; VI-NEXT: v_mov_b32_e32 v26, v59
+; VI-NEXT: v_mov_b32_e32 v24, v42
+; VI-NEXT: v_mov_b32_e32 v42, v58
+; VI-NEXT: v_mov_b32_e32 v41, v56
+; VI-NEXT: v_mov_b32_e32 v40, v45
; VI-NEXT: v_bfe_u32 v27, v29, 8, 8
; VI-NEXT: v_bfe_u32 v28, v30, 8, 8
-; VI-NEXT: v_bfe_u32 v46, v31, 8, 8
+; VI-NEXT: v_bfe_u32 v45, v31, 8, 8
; VI-NEXT: v_bfe_u32 v56, v32, 8, 8
; VI-NEXT: v_bfe_u32 v58, v33, 8, 8
-; VI-NEXT: v_bfe_u32 v59, v34, 8, 8
+; VI-NEXT: v_bfe_u32 v61, v34, 8, 8
; VI-NEXT: v_bfe_u32 v63, v48, 8, 8
-; VI-NEXT: v_bfe_u32 v54, v50, 8, 8
+; VI-NEXT: v_bfe_u32 v59, v50, 8, 8
; VI-NEXT: .LBB104_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v23, v52, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v26, s4
+; VI-NEXT: v_perm_b32 v1, v1, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v50, v54, s4
-; VI-NEXT: v_perm_b32 v2, v2, v53, s4
+; VI-NEXT: v_perm_b32 v1, v50, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v47, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v51, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v62, s4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v48, v63, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v61, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v49, v25, s4
+; VI-NEXT: v_perm_b32 v2, v49, v54, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v60, s4
+; VI-NEXT: v_perm_b32 v1, v5, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v34, v59, s4
+; VI-NEXT: v_perm_b32 v2, v34, v61, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v57, s4
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v39, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v47, s4
+; VI-NEXT: v_perm_b32 v1, v7, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v33, v58, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v45, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v38, v20, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
-; VI-NEXT: v_perm_b32 v1, v9, v44, s4
+; VI-NEXT: v_perm_b32 v1, v9, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v32, v56, s4
@@ -78027,7 +78084,7 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v11, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v31, v46, s4
+; VI-NEXT: v_perm_b32 v2, v31, v45, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_perm_b32 v1, v12, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -78037,24 +78094,24 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v13, v40, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v30, v28, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; VI-NEXT: v_perm_b32 v1, v14, v55, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v30, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v14, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v15, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v29, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: v_perm_b32 v1, v16, v25, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -78097,19 +78154,15 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr24
-; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr62
-; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr25
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr58
; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr56
@@ -78121,6 +78174,8 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr27
+; GFX9-NEXT: ; implicit-def: $vgpr22
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr53
@@ -78138,9 +78193,10 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr32
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr27
-; GFX9-NEXT: ; implicit-def: $vgpr25
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr29
+; GFX9-NEXT: ; implicit-def: $vgpr30
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -78150,18 +78206,22 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB104_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v8
+; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
+; GFX9-NEXT: v_mov_b32_e32 v31, v22
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -78178,29 +78238,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: v_mov_b32_e32 v27, v22
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
+; GFX9-NEXT: v_mov_b32_e32 v25, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
; GFX9-NEXT: .LBB104_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB104_4
@@ -78228,13 +78285,13 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v16
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14
@@ -78251,60 +78308,59 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: .LBB104_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
+; GFX9-NEXT: v_perm_b32 v2, v2, v62, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4
+; GFX9-NEXT: v_perm_b32 v1, v60, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v61, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4
+; GFX9-NEXT: v_perm_b32 v1, v3, v25, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4
+; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4
+; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4
+; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4
+; GFX9-NEXT: v_perm_b32 v2, v27, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4
@@ -78331,16 +78387,14 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v31, v29, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -78866,53 +78920,36 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_writelane_b32 v18, s64, 14
; SI-NEXT: v_writelane_b32 v18, s65, 15
; SI-NEXT: v_writelane_b32 v18, s66, 16
-; SI-NEXT: v_writelane_b32 v18, s67, 17
-; SI-NEXT: v_writelane_b32 v18, s68, 18
-; SI-NEXT: v_writelane_b32 v18, s69, 19
-; SI-NEXT: v_writelane_b32 v18, s70, 20
-; SI-NEXT: v_writelane_b32 v18, s71, 21
-; SI-NEXT: v_writelane_b32 v18, s80, 22
-; SI-NEXT: v_writelane_b32 v18, s81, 23
-; SI-NEXT: v_writelane_b32 v18, s82, 24
-; SI-NEXT: v_writelane_b32 v18, s83, 25
-; SI-NEXT: v_writelane_b32 v18, s84, 26
-; SI-NEXT: v_writelane_b32 v18, s85, 27
-; SI-NEXT: v_writelane_b32 v18, s86, 28
-; SI-NEXT: v_writelane_b32 v18, s87, 29
-; SI-NEXT: v_writelane_b32 v18, s96, 30
-; SI-NEXT: v_writelane_b32 v18, s97, 31
-; SI-NEXT: v_writelane_b32 v18, s98, 32
-; SI-NEXT: v_writelane_b32 v18, s99, 33
-; SI-NEXT: v_writelane_b32 v18, s30, 34
-; SI-NEXT: v_writelane_b32 v18, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s98, v2
+; SI-NEXT: v_writelane_b32 v18, s30, 17
+; SI-NEXT: v_writelane_b32 v18, s31, 18
+; SI-NEXT: v_readfirstlane_b32 s31, v2
; SI-NEXT: v_readfirstlane_b32 s44, v1
-; SI-NEXT: s_lshr_b32 s96, s29, 16
-; SI-NEXT: s_lshr_b32 s97, s28, 16
-; SI-NEXT: s_lshr_b32 s86, s27, 16
-; SI-NEXT: s_lshr_b32 s87, s26, 16
-; SI-NEXT: s_lshr_b32 s84, s25, 16
-; SI-NEXT: s_lshr_b32 s85, s24, 16
-; SI-NEXT: s_lshr_b32 s82, s23, 16
-; SI-NEXT: s_lshr_b32 s83, s22, 16
-; SI-NEXT: s_lshr_b32 s80, s21, 16
-; SI-NEXT: s_lshr_b32 s81, s20, 16
-; SI-NEXT: s_lshr_b32 s70, s19, 16
-; SI-NEXT: s_lshr_b32 s71, s18, 16
-; SI-NEXT: s_lshr_b32 s68, s17, 16
-; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s99, s98, 16
-; SI-NEXT: s_lshr_b32 s46, s44, 16
+; SI-NEXT: s_lshr_b32 s75, s29, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s28, 16
+; SI-NEXT: s_lshr_b32 s48, s27, 16
+; SI-NEXT: s_lshr_b32 s73, s26, 16
+; SI-NEXT: s_lshr_b32 s39, s25, 16
+; SI-NEXT: s_lshr_b32 s63, s24, 16
+; SI-NEXT: s_lshr_b32 s38, s23, 16
+; SI-NEXT: s_lshr_b32 s61, s22, 16
+; SI-NEXT: s_lshr_b32 s37, s21, 16
+; SI-NEXT: s_lshr_b32 s59, s20, 16
+; SI-NEXT: s_lshr_b32 s36, s19, 16
+; SI-NEXT: s_lshr_b32 s57, s18, 16
+; SI-NEXT: s_lshr_b32 s45, s17, 16
+; SI-NEXT: s_lshr_b32 s47, s16, 16
+; SI-NEXT: s_lshr_b32 s49, s31, 16
+; SI-NEXT: s_lshr_b32 s50, s44, 16
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: ; implicit-def: $vgpr19 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB105_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s47, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s45, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 24
; SI-NEXT: s_waitcnt expcnt(0)
@@ -78925,165 +78962,211 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_writelane_b32 v19, s4, 0
; SI-NEXT: v_writelane_b32 v19, s5, 1
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s57, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s36, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
+; SI-NEXT: v_writelane_b32 v19, s4, 10
+; SI-NEXT: v_writelane_b32 v19, s5, 11
+; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 16
+; SI-NEXT: v_writelane_b32 v19, s4, 8
+; SI-NEXT: v_writelane_b32 v19, s5, 9
+; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 8
; SI-NEXT: v_writelane_b32 v19, s4, 6
; SI-NEXT: v_writelane_b32 v19, s5, 7
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s14, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s15, s4, s5
+; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 24
+; SI-NEXT: v_writelane_b32 v19, s4, 16
+; SI-NEXT: v_writelane_b32 v19, s5, 17
+; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 16
+; SI-NEXT: v_writelane_b32 v19, s4, 14
+; SI-NEXT: v_writelane_b32 v19, s5, 15
+; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v19, s4, 12
+; SI-NEXT: v_writelane_b32 v19, s5, 13
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s10, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s38, 16
; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s13, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s8, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, s48, 16
; SI-NEXT: s_or_b32 s9, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s6, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s75, 16
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s46, 16
+; SI-NEXT: s_lshl_b32 s5, s50, 16
+; SI-NEXT: s_mov_b32 s76, s44
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s99, 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
+; SI-NEXT: s_and_b32 s5, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s49, 16
+; SI-NEXT: s_or_b32 s5, s5, s44
+; SI-NEXT: s_lshr_b32 s44, s43, 8
+; SI-NEXT: v_writelane_b32 v19, s44, 19
+; SI-NEXT: s_lshr_b32 s44, s41, 8
+; SI-NEXT: v_writelane_b32 v19, s44, 18
+; SI-NEXT: s_bfe_u32 s51, s45, 0x80008
+; SI-NEXT: s_mov_b32 s46, s45
+; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8
+; SI-NEXT: s_mov_b32 s45, s46
+; SI-NEXT: s_mov_b32 s46, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 24
+; SI-NEXT: s_mov_b32 s57, s46
+; SI-NEXT: s_mov_b32 s58, s47
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_mov_b32 s47, s58
+; SI-NEXT: s_mov_b32 s58, s31
+; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 8
+; SI-NEXT: s_mov_b32 s31, s58
+; SI-NEXT: s_mov_b32 s58, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 24
+; SI-NEXT: s_mov_b32 s63, s58
+; SI-NEXT: s_mov_b32 s58, s61
+; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16
+; SI-NEXT: s_mov_b32 s61, s58
+; SI-NEXT: s_mov_b32 s72, s59
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 8
+; SI-NEXT: s_mov_b32 s59, s72
+; SI-NEXT: s_mov_b32 s72, vcc_hi
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
+; SI-NEXT: s_bfe_u32 s65, s75, 0x80008
+; SI-NEXT: s_mov_b32 vcc_hi, s72
+; SI-NEXT: s_mov_b32 s72, s75
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_or_b32 s5, s5, s45
-; SI-NEXT: s_lshr_b32 s75, s43, 8
-; SI-NEXT: s_lshr_b32 s73, s41, 8
-; SI-NEXT: s_lshr_b32 s63, s15, 8
-; SI-NEXT: s_lshr_b32 s61, s11, 8
-; SI-NEXT: s_lshr_b32 s59, s13, 8
-; SI-NEXT: s_lshr_b32 s57, s9, 8
-; SI-NEXT: s_lshr_b32 s47, s7, 8
-; SI-NEXT: s_lshr_b32 s45, s5, 8
-; SI-NEXT: s_bfe_u32 s77, s68, 0x80008
-; SI-NEXT: s_bfe_u32 s79, s70, 0x80008
-; SI-NEXT: s_bfe_u32 s89, s80, 0x80008
-; SI-NEXT: s_bfe_u32 s91, s82, 0x80008
-; SI-NEXT: s_bfe_u32 s93, s84, 0x80008
-; SI-NEXT: s_bfe_u32 s95, s86, 0x80008
-; SI-NEXT: s_bfe_u32 s56, s96, 0x80008
-; SI-NEXT: s_bfe_u32 s58, s99, 0x80008
-; SI-NEXT: s_lshr_b64 s[64:65], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
-; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
-; SI-NEXT: s_mov_b64 s[66:67], 0
+; SI-NEXT: s_mov_b32 s75, s72
+; SI-NEXT: s_mov_b32 s34, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 8
+; SI-NEXT: s_lshr_b32 s95, s15, 8
+; SI-NEXT: s_lshr_b32 s93, s11, 8
+; SI-NEXT: s_lshr_b32 s91, s13, 8
+; SI-NEXT: s_lshr_b32 s89, s9, 8
+; SI-NEXT: s_lshr_b32 s79, s7, 8
+; SI-NEXT: s_lshr_b32 s77, s5, 8
+; SI-NEXT: s_bfe_u32 s52, s36, 0x80008
+; SI-NEXT: s_bfe_u32 s53, s37, 0x80008
+; SI-NEXT: s_bfe_u32 s54, s38, 0x80008
+; SI-NEXT: s_bfe_u32 s55, s39, 0x80008
+; SI-NEXT: s_bfe_u32 s64, s48, 0x80008
+; SI-NEXT: s_bfe_u32 s66, s49, 0x80008
+; SI-NEXT: s_mov_b32 s73, s34
+; SI-NEXT: s_mov_b64 s[34:35], 0
; SI-NEXT: s_branch .LBB105_3
; SI-NEXT: .LBB105_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b64 s[66:67], -1
+; SI-NEXT: s_mov_b32 s76, s44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v19, s4, 0
; SI-NEXT: v_writelane_b32 v19, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: s_mov_b64 s[34:35], -1
+; SI-NEXT: v_writelane_b32 v19, s4, 2
+; SI-NEXT: v_writelane_b32 v19, s5, 3
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr75
-; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr73
-; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr63
-; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr57
-; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr47
-; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr45
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr65
+; SI-NEXT: ; implicit-def: $sgpr77
+; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: v_writelane_b32 v19, s4, 2
-; SI-NEXT: v_writelane_b32 v19, s5, 3
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v19, s4, 4
; SI-NEXT: v_writelane_b32 v19, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v19, s4, 6
; SI-NEXT: v_writelane_b32 v19, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 8
+; SI-NEXT: v_writelane_b32 v19, s5, 9
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 10
+; SI-NEXT: v_writelane_b32 v19, s5, 11
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 12
+; SI-NEXT: v_writelane_b32 v19, s5, 13
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 14
+; SI-NEXT: v_writelane_b32 v19, s5, 15
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v19, s4, 16
+; SI-NEXT: v_writelane_b32 v19, s5, 17
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB105_3: ; %Flow
-; SI-NEXT: s_and_b64 s[66:67], s[66:67], exec
-; SI-NEXT: s_cselect_b32 vcc_hi, 1, 0
-; SI-NEXT: s_cmp_lg_u32 vcc_hi, 1
+; SI-NEXT: s_and_b64 s[34:35], s[34:35], exec
+; SI-NEXT: s_cselect_b32 s34, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s34, 1
; SI-NEXT: s_cbranch_scc1 .LBB105_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s44
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s46
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s99
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s76
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s50
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s49
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s47
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s98
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s97
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v3, vcc_hi
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -79098,14 +79181,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_cvt_f32_f16_e32 v2, s28
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s96
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s75
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
; SI-NEXT: v_readfirstlane_b32 s7, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s87
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s73
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -79118,14 +79201,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s86
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s48
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v3
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
; SI-NEXT: v_cvt_f32_f16_e32 v4, s27
; SI-NEXT: v_readfirstlane_b32 s9, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s85
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s63
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -79138,14 +79221,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_cvt_f32_f16_e32 v4, s24
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: v_readfirstlane_b32 s10, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s84
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s39
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v6, v4
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
; SI-NEXT: v_cvt_f32_f16_e32 v5, s25
; SI-NEXT: v_readfirstlane_b32 s11, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s83
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s61
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
@@ -79158,14 +79241,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_or_b32 s13, s11, s10
; SI-NEXT: v_readfirstlane_b32 s10, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s82
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s38
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s23
; SI-NEXT: v_readfirstlane_b32 s11, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s59
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
@@ -79178,14 +79261,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
; SI-NEXT: s_or_b32 s11, s14, s11
; SI-NEXT: v_readfirstlane_b32 s14, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s37
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_readfirstlane_b32 s15, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s57
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
@@ -79199,7 +79282,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s18, v8
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s70
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s36
; SI-NEXT: s_or_b32 s15, s20, s15
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_readfirstlane_b32 s20, v7
@@ -79219,7 +79302,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_or_b32 s41, s16, s18
; SI-NEXT: v_readfirstlane_b32 s16, v9
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s45
; SI-NEXT: v_cvt_f32_f16_e32 v10, s17
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_readfirstlane_b32 s17, v7
@@ -79232,38 +79315,38 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_readfirstlane_b32 s17, v7
; SI-NEXT: s_or_b32 s43, s17, s16
-; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[20:21], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 8
-; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[18:19], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[26:27], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[28:29], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[20:21], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[22:23], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[24:25], s[6:7], 8
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
-; SI-NEXT: s_lshr_b32 s75, s43, 8
-; SI-NEXT: s_lshr_b32 s73, s41, 8
-; SI-NEXT: s_lshr_b32 s63, s15, 8
-; SI-NEXT: s_lshr_b32 s61, s11, 8
-; SI-NEXT: s_lshr_b32 s59, s13, 8
-; SI-NEXT: s_lshr_b32 s57, s9, 8
-; SI-NEXT: s_lshr_b32 s47, s7, 8
-; SI-NEXT: s_lshr_b32 s45, s5, 8
+; SI-NEXT: s_lshr_b32 s19, s43, 8
+; SI-NEXT: s_lshr_b32 s17, s41, 8
+; SI-NEXT: s_lshr_b32 s95, s15, 8
+; SI-NEXT: s_lshr_b32 s93, s11, 8
+; SI-NEXT: s_lshr_b32 s91, s13, 8
+; SI-NEXT: s_lshr_b32 s89, s9, 8
+; SI-NEXT: s_lshr_b32 s79, s7, 8
+; SI-NEXT: s_lshr_b32 s77, s5, 8
; SI-NEXT: v_bfe_u32 v16, v12, 8, 8
; SI-NEXT: v_bfe_u32 v15, v8, 8, 8
; SI-NEXT: v_bfe_u32 v14, v6, 8, 8
@@ -79274,87 +79357,107 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_bfe_u32 v7, v1, 8, 8
; SI-NEXT: s_branch .LBB105_6
; SI-NEXT: .LBB105_5:
-; SI-NEXT: v_readlane_b32 s18, v19, 4
-; SI-NEXT: v_readlane_b32 s20, v19, 2
-; SI-NEXT: v_readlane_b32 s22, v19, 6
-; SI-NEXT: v_readlane_b32 s24, v19, 0
-; SI-NEXT: v_mov_b32_e32 v1, s99
-; SI-NEXT: v_mov_b32_e32 v2, s96
-; SI-NEXT: v_mov_b32_e32 v3, s86
-; SI-NEXT: v_mov_b32_e32 v4, s84
-; SI-NEXT: v_mov_b32_e32 v5, s82
-; SI-NEXT: v_mov_b32_e32 v6, s80
-; SI-NEXT: v_mov_b32_e32 v8, s70
-; SI-NEXT: v_mov_b32_e32 v12, s68
-; SI-NEXT: v_mov_b32_e32 v7, s58
-; SI-NEXT: v_mov_b32_e32 v9, s56
-; SI-NEXT: v_mov_b32_e32 v10, s95
-; SI-NEXT: v_mov_b32_e32 v11, s93
-; SI-NEXT: v_mov_b32_e32 v13, s91
-; SI-NEXT: v_mov_b32_e32 v14, s89
-; SI-NEXT: v_mov_b32_e32 v15, s79
-; SI-NEXT: v_mov_b32_e32 v16, s77
-; SI-NEXT: v_readlane_b32 s19, v19, 5
-; SI-NEXT: v_readlane_b32 s21, v19, 3
-; SI-NEXT: v_readlane_b32 s23, v19, 7
-; SI-NEXT: v_readlane_b32 s25, v19, 1
+; SI-NEXT: v_mov_b32_e32 v2, s75
+; SI-NEXT: v_mov_b32_e32 v6, s37
+; SI-NEXT: v_mov_b32_e32 v8, s36
+; SI-NEXT: s_mov_b32 s16, s74
+; SI-NEXT: s_mov_b32 s20, s62
+; SI-NEXT: s_mov_b32 s18, s72
+; SI-NEXT: s_mov_b32 s22, s60
+; SI-NEXT: s_mov_b32 s26, s56
+; SI-NEXT: s_mov_b32 s24, s58
+; SI-NEXT: s_mov_b32 s28, s46
+; SI-NEXT: v_readlane_b32 s72, v19, 4
+; SI-NEXT: v_readlane_b32 s74, v19, 2
+; SI-NEXT: v_readlane_b32 s58, v19, 10
+; SI-NEXT: v_readlane_b32 s34, v19, 0
+; SI-NEXT: v_readlane_b32 s60, v19, 8
+; SI-NEXT: v_readlane_b32 s46, v19, 16
+; SI-NEXT: v_readlane_b32 s62, v19, 6
+; SI-NEXT: v_readlane_b32 s56, v19, 14
+; SI-NEXT: v_readlane_b32 s36, v19, 12
+; SI-NEXT: v_mov_b32_e32 v1, s49
+; SI-NEXT: v_mov_b32_e32 v3, s48
+; SI-NEXT: v_mov_b32_e32 v4, s39
+; SI-NEXT: v_mov_b32_e32 v5, s38
+; SI-NEXT: v_mov_b32_e32 v12, s45
+; SI-NEXT: v_mov_b32_e32 v7, s66
+; SI-NEXT: v_mov_b32_e32 v9, s65
+; SI-NEXT: v_mov_b32_e32 v10, s64
+; SI-NEXT: v_mov_b32_e32 v11, s55
+; SI-NEXT: v_mov_b32_e32 v13, s54
+; SI-NEXT: v_mov_b32_e32 v14, s53
+; SI-NEXT: v_mov_b32_e32 v15, s52
+; SI-NEXT: v_mov_b32_e32 v16, s51
+; SI-NEXT: v_readlane_b32 s73, v19, 5
+; SI-NEXT: v_readlane_b32 s75, v19, 3
+; SI-NEXT: v_readlane_b32 s59, v19, 11
+; SI-NEXT: v_readlane_b32 s35, v19, 1
+; SI-NEXT: v_readlane_b32 s61, v19, 9
+; SI-NEXT: v_readlane_b32 s47, v19, 17
+; SI-NEXT: v_readlane_b32 s63, v19, 7
+; SI-NEXT: v_readlane_b32 s57, v19, 15
+; SI-NEXT: v_readlane_b32 s17, v19, 18
+; SI-NEXT: v_readlane_b32 s19, v19, 19
+; SI-NEXT: v_readlane_b32 s37, v19, 13
+; SI-NEXT: s_mov_b32 s76, s36
; SI-NEXT: .LBB105_6: ; %end
-; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s24, 8
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s20, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_mov_b32_e32 v17, s16
-; SI-NEXT: s_and_b32 s16, s43, 0xff
-; SI-NEXT: s_lshl_b32 s17, s75, 8
+; SI-NEXT: s_and_b32 s21, s42, 0xff
+; SI-NEXT: s_lshl_b32 s23, s34, 8
+; SI-NEXT: s_or_b32 s21, s21, s23
+; SI-NEXT: s_and_b32 s23, s74, 0xff
+; SI-NEXT: s_lshl_b32 s23, s23, 16
+; SI-NEXT: s_lshl_b32 s25, s72, 24
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_or_b32 s23, s25, s23
+; SI-NEXT: s_or_b32 s21, s21, s23
+; SI-NEXT: v_mov_b32_e32 v17, s21
+; SI-NEXT: s_and_b32 s21, s43, 0xff
+; SI-NEXT: s_lshl_b32 s19, s19, 8
; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
-; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_or_b32 s19, s21, s19
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
; SI-NEXT: v_or_b32_e32 v12, v16, v12
-; SI-NEXT: v_or_b32_e32 v12, s16, v12
-; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s72, 8
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s60, 0xff
-; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s22, 24
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_or_b32_e32 v12, s19, v12
+; SI-NEXT: s_and_b32 s19, s40, 0xff
+; SI-NEXT: s_lshl_b32 s21, s62, 8
+; SI-NEXT: s_or_b32 s19, s19, s21
+; SI-NEXT: s_and_b32 s21, s60, 0xff
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_lshl_b32 s23, s58, 24
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_or_b32 s21, s23, s21
+; SI-NEXT: s_or_b32 s19, s19, s21
; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v12, s16
-; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s73, 8
+; SI-NEXT: v_mov_b32_e32 v12, s19
+; SI-NEXT: s_and_b32 s19, s41, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:8
-; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: s_or_b32 s17, s19, s17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v15
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
; SI-NEXT: v_or_b32_e32 v8, v12, v8
-; SI-NEXT: v_or_b32_e32 v8, s16, v8
+; SI-NEXT: v_or_b32_e32 v8, s17, v8
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s16, s76, 8
-; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_and_b32 s16, s74, 0xff
-; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s62, 24
+; SI-NEXT: s_lshl_b32 s17, s76, 8
+; SI-NEXT: s_or_b32 s14, s14, s17
+; SI-NEXT: s_and_b32 s17, s56, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 16
+; SI-NEXT: s_lshl_b32 s19, s46, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_or_b32 s14, s14, s16
+; SI-NEXT: s_or_b32 s17, s19, s17
+; SI-NEXT: s_or_b32 s14, s14, s17
; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: s_lshl_b32 s15, s63, 8
+; SI-NEXT: s_lshl_b32 s15, s95, 8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_or_b32 s14, s14, s15
@@ -79377,7 +79480,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v6, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s61, 8
+; SI-NEXT: s_lshl_b32 s11, s93, 8
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -79388,7 +79491,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v5, s10, v5
; SI-NEXT: s_and_b32 s10, s12, 0xff
-; SI-NEXT: s_lshl_b32 s11, s64, 8
+; SI-NEXT: s_lshl_b32 s11, s44, 8
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s92, 0xff
; SI-NEXT: s_lshl_b32 s11, s11, 16
@@ -79400,7 +79503,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v5, s10
; SI-NEXT: s_and_b32 s10, s13, 0xff
-; SI-NEXT: s_lshl_b32 s11, s59, 8
+; SI-NEXT: s_lshl_b32 s11, s91, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -79411,11 +79514,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v4, s10, v4
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: s_lshl_b32 s10, s54, 8
+; SI-NEXT: s_lshl_b32 s10, s30, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: s_and_b32 s10, s52, 0xff
+; SI-NEXT: s_and_b32 s10, s28, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s48, 24
+; SI-NEXT: s_lshl_b32 s11, s26, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_or_b32 s8, s8, s10
@@ -79423,7 +79526,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s57, 8
+; SI-NEXT: s_lshl_b32 s9, s89, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -79434,11 +79537,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v3, s8, v3
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s8, s50, 8
+; SI-NEXT: s_lshl_b32 s8, s24, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s38, 0xff
+; SI-NEXT: s_and_b32 s8, s22, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s34, 24
+; SI-NEXT: s_lshl_b32 s9, s20, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s6, s6, s8
@@ -79446,7 +79549,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s47, 8
+; SI-NEXT: s_lshl_b32 s7, s79, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -79457,9 +79560,9 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v2, s6, v2
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s36, 8
+; SI-NEXT: s_lshl_b32 s6, s18, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s30, 0xff
+; SI-NEXT: s_and_b32 s6, s16, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, vcc_lo, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
@@ -79469,7 +79572,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s45, 8
+; SI-NEXT: s_lshl_b32 s5, s77, 8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -79479,27 +79582,10 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_readlane_b32 s30, v18, 34
+; SI-NEXT: v_readlane_b32 s30, v18, 17
; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
-; SI-NEXT: v_readlane_b32 s31, v18, 35
-; SI-NEXT: v_readlane_b32 s99, v18, 33
-; SI-NEXT: v_readlane_b32 s98, v18, 32
-; SI-NEXT: v_readlane_b32 s97, v18, 31
-; SI-NEXT: v_readlane_b32 s96, v18, 30
-; SI-NEXT: v_readlane_b32 s87, v18, 29
-; SI-NEXT: v_readlane_b32 s86, v18, 28
-; SI-NEXT: v_readlane_b32 s85, v18, 27
-; SI-NEXT: v_readlane_b32 s84, v18, 26
-; SI-NEXT: v_readlane_b32 s83, v18, 25
-; SI-NEXT: v_readlane_b32 s82, v18, 24
-; SI-NEXT: v_readlane_b32 s81, v18, 23
-; SI-NEXT: v_readlane_b32 s80, v18, 22
-; SI-NEXT: v_readlane_b32 s71, v18, 21
-; SI-NEXT: v_readlane_b32 s70, v18, 20
-; SI-NEXT: v_readlane_b32 s69, v18, 19
-; SI-NEXT: v_readlane_b32 s68, v18, 18
-; SI-NEXT: v_readlane_b32 s67, v18, 17
+; SI-NEXT: v_readlane_b32 s31, v18, 18
; SI-NEXT: v_readlane_b32 s66, v18, 16
; SI-NEXT: v_readlane_b32 s65, v18, 15
; SI-NEXT: v_readlane_b32 s64, v18, 14
@@ -79559,120 +79645,126 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_writelane_b32 v63, s53, 11
; VI-NEXT: v_writelane_b32 v63, s54, 12
; VI-NEXT: v_writelane_b32 v63, s55, 13
-; VI-NEXT: v_writelane_b32 v63, s64, 14
-; VI-NEXT: v_writelane_b32 v63, s65, 15
-; VI-NEXT: v_writelane_b32 v63, s30, 16
-; VI-NEXT: v_writelane_b32 v63, s31, 17
+; VI-NEXT: v_writelane_b32 v63, s30, 14
+; VI-NEXT: v_writelane_b32 v63, s31, 15
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB105_2
; VI-NEXT: ; %bb.1: ; %cmp.false
+; VI-NEXT: s_lshr_b32 s46, s21, 16
+; VI-NEXT: s_lshr_b32 s47, s20, 16
+; VI-NEXT: s_lshr_b32 s50, s19, 24
+; VI-NEXT: s_lshr_b32 s51, s19, 16
+; VI-NEXT: s_lshr_b32 s52, s18, 16
+; VI-NEXT: s_lshr_b32 s53, s17, 24
+; VI-NEXT: s_lshr_b32 s54, s17, 16
+; VI-NEXT: s_lshr_b32 s55, s16, 16
+; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; VI-NEXT: s_lshr_b32 s88, s5, 24
-; VI-NEXT: s_lshr_b32 s34, s5, 16
+; VI-NEXT: s_lshr_b32 s49, s5, 16
; VI-NEXT: s_lshr_b32 s63, s5, 8
-; VI-NEXT: s_lshr_b32 s35, s4, 16
+; VI-NEXT: s_lshr_b32 s48, s4, 16
; VI-NEXT: s_lshr_b32 s79, s4, 8
; VI-NEXT: s_lshr_b32 s89, s29, 24
-; VI-NEXT: s_lshr_b32 s36, s29, 16
+; VI-NEXT: s_lshr_b32 s39, s29, 16
; VI-NEXT: s_lshr_b32 s62, s29, 8
-; VI-NEXT: s_lshr_b32 s37, s28, 16
+; VI-NEXT: s_lshr_b32 s38, s28, 16
; VI-NEXT: s_lshr_b32 s78, s28, 8
; VI-NEXT: s_lshr_b32 s90, s27, 24
-; VI-NEXT: s_lshr_b32 s38, s27, 16
+; VI-NEXT: s_lshr_b32 s37, s27, 16
; VI-NEXT: s_lshr_b32 s61, s27, 8
-; VI-NEXT: s_lshr_b32 s39, s26, 16
+; VI-NEXT: s_lshr_b32 s36, s26, 16
; VI-NEXT: s_lshr_b32 s77, s26, 8
; VI-NEXT: s_lshr_b32 s91, s25, 24
-; VI-NEXT: s_lshr_b32 s48, s25, 16
+; VI-NEXT: s_lshr_b32 s35, s25, 16
; VI-NEXT: s_lshr_b32 s60, s25, 8
-; VI-NEXT: s_lshr_b32 s49, s24, 16
+; VI-NEXT: s_lshr_b32 s34, s24, 16
; VI-NEXT: s_lshr_b32 s76, s24, 8
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24
-; VI-NEXT: s_lshr_b32 s50, s23, 16
+; VI-NEXT: s_lshr_b32 s31, s23, 16
; VI-NEXT: s_lshr_b32 s59, s23, 8
-; VI-NEXT: s_lshr_b32 s51, s22, 16
+; VI-NEXT: s_lshr_b32 s30, s22, 16
; VI-NEXT: s_lshr_b32 s75, s22, 8
; VI-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; VI-NEXT: s_lshr_b32 s52, s21, 16
; VI-NEXT: s_lshr_b32 s58, s21, 8
-; VI-NEXT: s_lshr_b32 s53, s20, 16
; VI-NEXT: s_lshr_b32 s74, s20, 8
-; VI-NEXT: s_lshr_b32 s30, s19, 24
-; VI-NEXT: s_lshr_b32 s54, s19, 16
; VI-NEXT: s_lshr_b32 s57, s19, 8
-; VI-NEXT: s_lshr_b32 s55, s18, 16
; VI-NEXT: s_lshr_b32 s73, s18, 8
-; VI-NEXT: s_lshr_b32 s31, s17, 24
-; VI-NEXT: s_lshr_b32 s64, s17, 16
; VI-NEXT: s_lshr_b32 s56, s17, 8
-; VI-NEXT: s_lshr_b32 s65, s16, 16
; VI-NEXT: s_lshr_b32 s72, s16, 8
-; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_mov_b32 s11, s55
+; VI-NEXT: s_mov_b32 s13, s54
+; VI-NEXT: s_mov_b32 s15, s52
+; VI-NEXT: s_mov_b32 s41, s51
+; VI-NEXT: s_mov_b32 s43, s47
+; VI-NEXT: s_mov_b32 s45, s46
+; VI-NEXT: s_mov_b32 s7, s53
+; VI-NEXT: s_mov_b32 s9, s50
; VI-NEXT: s_mov_b64 s[46:47], 0
; VI-NEXT: s_branch .LBB105_3
; VI-NEXT: .LBB105_2:
; VI-NEXT: s_mov_b64 s[46:47], -1
; VI-NEXT: ; implicit-def: $sgpr72
-; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr11
; VI-NEXT: ; implicit-def: $sgpr6
; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr31
+; VI-NEXT: ; implicit-def: $sgpr13
+; VI-NEXT: ; implicit-def: $sgpr7
; VI-NEXT: ; implicit-def: $sgpr73
-; VI-NEXT: ; implicit-def: $sgpr55
+; VI-NEXT: ; implicit-def: $sgpr15
; VI-NEXT: ; implicit-def: $sgpr8
; VI-NEXT: ; implicit-def: $sgpr57
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr41
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr74
-; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr43
; VI-NEXT: ; implicit-def: $sgpr10
; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $sgpr75
-; VI-NEXT: ; implicit-def: $sgpr51
+; VI-NEXT: ; implicit-def: $sgpr30
; VI-NEXT: ; implicit-def: $sgpr12
; VI-NEXT: ; implicit-def: $sgpr59
-; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr31
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr76
-; VI-NEXT: ; implicit-def: $sgpr49
+; VI-NEXT: ; implicit-def: $sgpr34
; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $sgpr60
-; VI-NEXT: ; implicit-def: $sgpr48
+; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $sgpr77
-; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr40
; VI-NEXT: ; implicit-def: $sgpr61
-; VI-NEXT: ; implicit-def: $sgpr38
+; VI-NEXT: ; implicit-def: $sgpr37
; VI-NEXT: ; implicit-def: $sgpr90
; VI-NEXT: ; implicit-def: $sgpr78
-; VI-NEXT: ; implicit-def: $sgpr37
+; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr42
; VI-NEXT: ; implicit-def: $sgpr62
-; VI-NEXT: ; implicit-def: $sgpr36
+; VI-NEXT: ; implicit-def: $sgpr39
; VI-NEXT: ; implicit-def: $sgpr89
; VI-NEXT: ; implicit-def: $sgpr79
-; VI-NEXT: ; implicit-def: $sgpr35
+; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $sgpr63
-; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr49
; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: .LBB105_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
; VI-NEXT: s_cbranch_scc1 .LBB105_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_lshr_b32 s6, s17, 16
@@ -79798,22 +79890,22 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v1, s79
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v37, s65
-; VI-NEXT: v_mov_b32_e32 v25, s64
-; VI-NEXT: v_mov_b32_e32 v38, s55
-; VI-NEXT: v_mov_b32_e32 v29, s54
-; VI-NEXT: v_mov_b32_e32 v24, s53
-; VI-NEXT: v_mov_b32_e32 v11, s52
-; VI-NEXT: v_mov_b32_e32 v15, s51
-; VI-NEXT: v_mov_b32_e32 v12, s50
-; VI-NEXT: v_mov_b32_e32 v17, s49
-; VI-NEXT: v_mov_b32_e32 v13, s48
-; VI-NEXT: v_mov_b32_e32 v20, s39
-; VI-NEXT: v_mov_b32_e32 v14, s38
-; VI-NEXT: v_mov_b32_e32 v22, s37
-; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_mov_b32_e32 v26, s35
-; VI-NEXT: v_mov_b32_e32 v19, s34
+; VI-NEXT: v_mov_b32_e32 v37, s11
+; VI-NEXT: v_mov_b32_e32 v25, s13
+; VI-NEXT: v_mov_b32_e32 v38, s15
+; VI-NEXT: v_mov_b32_e32 v29, s41
+; VI-NEXT: v_mov_b32_e32 v24, s43
+; VI-NEXT: v_mov_b32_e32 v11, s45
+; VI-NEXT: v_mov_b32_e32 v15, s30
+; VI-NEXT: v_mov_b32_e32 v12, s31
+; VI-NEXT: v_mov_b32_e32 v17, s34
+; VI-NEXT: v_mov_b32_e32 v13, s35
+; VI-NEXT: v_mov_b32_e32 v20, s36
+; VI-NEXT: v_mov_b32_e32 v14, s37
+; VI-NEXT: v_mov_b32_e32 v22, s38
+; VI-NEXT: v_mov_b32_e32 v16, s39
+; VI-NEXT: v_mov_b32_e32 v26, s48
+; VI-NEXT: v_mov_b32_e32 v19, s49
; VI-NEXT: v_mov_b32_e32 v48, s16
; VI-NEXT: v_mov_b32_e32 v35, s17
; VI-NEXT: v_mov_b32_e32 v49, s18
@@ -79836,8 +79928,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v44, s91
; VI-NEXT: v_mov_b32_e32 v46, vcc_lo
; VI-NEXT: v_mov_b32_e32 v56, vcc_hi
-; VI-NEXT: v_mov_b32_e32 v59, s30
-; VI-NEXT: v_mov_b32_e32 v62, s31
+; VI-NEXT: v_mov_b32_e32 v59, s9
+; VI-NEXT: v_mov_b32_e32 v62, s7
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v52, s63
; VI-NEXT: v_mov_b32_e32 v54, s78
@@ -79936,10 +80028,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_readlane_b32 s30, v63, 16
-; VI-NEXT: v_readlane_b32 s31, v63, 17
-; VI-NEXT: v_readlane_b32 s65, v63, 15
-; VI-NEXT: v_readlane_b32 s64, v63, 14
+; VI-NEXT: v_readlane_b32 s30, v63, 14
+; VI-NEXT: v_readlane_b32 s31, v63, 15
; VI-NEXT: v_readlane_b32 s55, v63, 13
; VI-NEXT: v_readlane_b32 s54, v63, 12
; VI-NEXT: v_readlane_b32 s53, v63, 11
@@ -80017,16 +80107,30 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: v_writelane_b32 v63, s49, 7
; GFX9-NEXT: v_writelane_b32 v63, s50, 8
; GFX9-NEXT: v_writelane_b32 v63, s51, 9
-; GFX9-NEXT: v_writelane_b32 v63, s52, 10
-; GFX9-NEXT: v_writelane_b32 v63, s53, 11
-; GFX9-NEXT: v_writelane_b32 v63, s30, 12
-; GFX9-NEXT: v_writelane_b32 v63, s31, 13
+; GFX9-NEXT: v_writelane_b32 v63, s30, 10
+; GFX9-NEXT: v_writelane_b32 v63, s31, 11
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB105_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: s_lshr_b32 s47, s18, 16
+; GFX9-NEXT: s_lshr_b32 s38, s18, 8
+; GFX9-NEXT: s_lshr_b32 s39, s17, 24
+; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s49, s17, 8
+; GFX9-NEXT: s_lshr_b32 s50, s16, 16
+; GFX9-NEXT: s_lshr_b32 s51, s16, 8
+; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; GFX9-NEXT: s_lshr_b32 s56, s5, 24
; GFX9-NEXT: s_lshr_b32 s57, s5, 16
; GFX9-NEXT: s_lshr_b32 s59, s5, 8
@@ -80053,49 +80157,41 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: s_lshr_b32 s94, s22, 16
; GFX9-NEXT: s_lshr_b32 vcc_lo, s22, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s21, 24
-; GFX9-NEXT: s_lshr_b32 s30, s21, 16
-; GFX9-NEXT: s_lshr_b32 s34, s21, 8
-; GFX9-NEXT: s_lshr_b32 s31, s20, 16
+; GFX9-NEXT: s_lshr_b32 s36, s21, 16
+; GFX9-NEXT: s_lshr_b32 s37, s21, 8
+; GFX9-NEXT: s_lshr_b32 s34, s20, 16
; GFX9-NEXT: s_lshr_b32 s35, s20, 8
-; GFX9-NEXT: s_lshr_b32 s36, s19, 24
-; GFX9-NEXT: s_lshr_b32 s37, s19, 16
-; GFX9-NEXT: s_lshr_b32 s39, s19, 8
-; GFX9-NEXT: s_lshr_b32 s38, s18, 16
-; GFX9-NEXT: s_lshr_b32 s48, s18, 8
-; GFX9-NEXT: s_lshr_b32 s49, s17, 24
-; GFX9-NEXT: s_lshr_b32 s50, s17, 16
-; GFX9-NEXT: s_lshr_b32 s52, s17, 8
-; GFX9-NEXT: s_lshr_b32 s51, s16, 16
-; GFX9-NEXT: s_lshr_b32 s53, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX9-NEXT: s_lshr_b32 s31, s19, 24
+; GFX9-NEXT: s_lshr_b32 s30, s19, 8
+; GFX9-NEXT: s_mov_b32 s9, s51
+; GFX9-NEXT: s_mov_b32 s15, s49
+; GFX9-NEXT: s_mov_b32 s7, s50
+; GFX9-NEXT: s_mov_b32 s13, s48
+; GFX9-NEXT: s_mov_b32 s11, s39
+; GFX9-NEXT: s_mov_b32 s43, s38
+; GFX9-NEXT: s_mov_b32 s41, s47
+; GFX9-NEXT: s_mov_b32 s45, s46
; GFX9-NEXT: s_mov_b64 s[46:47], 0
; GFX9-NEXT: s_branch .LBB105_3
; GFX9-NEXT: .LBB105_2:
; GFX9-NEXT: s_mov_b64 s[46:47], -1
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $sgpr6
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr15
+; GFX9-NEXT: ; implicit-def: $sgpr13
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr43
+; GFX9-NEXT: ; implicit-def: $sgpr41
; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr37
-; GFX9-NEXT: ; implicit-def: $sgpr36
-; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr34
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $vcc_hi
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -80129,8 +80225,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: .LBB105_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB105_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: v_mov_b32_e32 v1, 0x200
@@ -80227,20 +80323,20 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: v_mov_b32_e32 v4, s29
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_mov_b32_e32 v2, s5
-; GFX9-NEXT: v_mov_b32_e32 v15, s53
-; GFX9-NEXT: v_mov_b32_e32 v16, s51
-; GFX9-NEXT: v_mov_b32_e32 v62, s52
-; GFX9-NEXT: v_mov_b32_e32 v59, s50
-; GFX9-NEXT: v_mov_b32_e32 v60, s49
-; GFX9-NEXT: v_mov_b32_e32 v58, s48
-; GFX9-NEXT: v_mov_b32_e32 v61, s38
-; GFX9-NEXT: v_mov_b32_e32 v57, s39
-; GFX9-NEXT: v_mov_b32_e32 v47, s37
-; GFX9-NEXT: v_mov_b32_e32 v56, s36
+; GFX9-NEXT: v_mov_b32_e32 v15, s9
+; GFX9-NEXT: v_mov_b32_e32 v16, s7
+; GFX9-NEXT: v_mov_b32_e32 v62, s15
+; GFX9-NEXT: v_mov_b32_e32 v59, s13
+; GFX9-NEXT: v_mov_b32_e32 v60, s11
+; GFX9-NEXT: v_mov_b32_e32 v58, s43
+; GFX9-NEXT: v_mov_b32_e32 v61, s41
+; GFX9-NEXT: v_mov_b32_e32 v57, s30
+; GFX9-NEXT: v_mov_b32_e32 v47, s45
+; GFX9-NEXT: v_mov_b32_e32 v56, s31
; GFX9-NEXT: v_mov_b32_e32 v46, s35
-; GFX9-NEXT: v_mov_b32_e32 v45, s31
-; GFX9-NEXT: v_mov_b32_e32 v44, s34
-; GFX9-NEXT: v_mov_b32_e32 v42, s30
+; GFX9-NEXT: v_mov_b32_e32 v45, s34
+; GFX9-NEXT: v_mov_b32_e32 v44, s37
+; GFX9-NEXT: v_mov_b32_e32 v42, s36
; GFX9-NEXT: v_mov_b32_e32 v43, vcc_hi
; GFX9-NEXT: v_mov_b32_e32 v41, vcc_lo
; GFX9-NEXT: v_mov_b32_e32 v40, s94
@@ -80343,10 +80439,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4
-; GFX9-NEXT: v_readlane_b32 s30, v63, 12
-; GFX9-NEXT: v_readlane_b32 s31, v63, 13
-; GFX9-NEXT: v_readlane_b32 s53, v63, 11
-; GFX9-NEXT: v_readlane_b32 s52, v63, 10
+; GFX9-NEXT: v_readlane_b32 s30, v63, 10
+; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
; GFX9-NEXT: v_readlane_b32 s50, v63, 8
; GFX9-NEXT: v_readlane_b32 s49, v63, 7
@@ -80420,6 +80514,22 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX11-NEXT: s_mov_b32 s42, 0
; GFX11-NEXT: s_cbranch_scc0 .LBB105_2
; GFX11-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-NEXT: s_lshr_b32 s31, s3, 8
+; GFX11-NEXT: s_lshr_b32 s34, s2, 16
+; GFX11-NEXT: s_lshr_b32 s35, s2, 8
+; GFX11-NEXT: s_lshr_b32 s36, s1, 24
+; GFX11-NEXT: s_lshr_b32 s37, s1, 16
+; GFX11-NEXT: s_lshr_b32 s38, s1, 8
+; GFX11-NEXT: s_lshr_b32 s39, s0, 16
+; GFX11-NEXT: s_lshr_b32 s48, s0, 8
+; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-NEXT: s_lshr_b32 s43, s27, 24
; GFX11-NEXT: s_lshr_b32 s44, s27, 16
; GFX11-NEXT: s_lshr_b32 s46, s27, 8
@@ -80452,35 +80562,27 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX11-NEXT: s_lshr_b32 vcc_lo, s16, 8
; GFX11-NEXT: s_lshr_b32 vcc_hi, s3, 24
; GFX11-NEXT: s_lshr_b32 s30, s3, 16
-; GFX11-NEXT: s_lshr_b32 s34, s3, 8
-; GFX11-NEXT: s_lshr_b32 s31, s2, 16
-; GFX11-NEXT: s_lshr_b32 s35, s2, 8
-; GFX11-NEXT: s_lshr_b32 s36, s1, 24
-; GFX11-NEXT: s_lshr_b32 s37, s1, 16
-; GFX11-NEXT: s_lshr_b32 s39, s1, 8
-; GFX11-NEXT: s_lshr_b32 s38, s0, 16
-; GFX11-NEXT: s_lshr_b32 s48, s0, 8
-; GFX11-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-NEXT: s_mov_b32 s5, s48
+; GFX11-NEXT: s_mov_b32 s9, s38
+; GFX11-NEXT: s_mov_b32 s7, s39
+; GFX11-NEXT: s_mov_b32 s11, s37
+; GFX11-NEXT: s_mov_b32 s13, s36
+; GFX11-NEXT: s_mov_b32 s15, s35
+; GFX11-NEXT: s_mov_b32 s41, s31
+; GFX11-NEXT: s_mov_b32 s29, s34
; GFX11-NEXT: s_branch .LBB105_3
; GFX11-NEXT: .LBB105_2:
; GFX11-NEXT: s_mov_b32 s42, -1
-; GFX11-NEXT: ; implicit-def: $sgpr48
-; GFX11-NEXT: ; implicit-def: $sgpr38
+; GFX11-NEXT: ; implicit-def: $sgpr5
+; GFX11-NEXT: ; implicit-def: $sgpr7
; GFX11-NEXT: ; implicit-def: $sgpr4
-; GFX11-NEXT: ; implicit-def: $sgpr39
-; GFX11-NEXT: ; implicit-def: $sgpr37
-; GFX11-NEXT: ; implicit-def: $sgpr36
-; GFX11-NEXT: ; implicit-def: $sgpr35
-; GFX11-NEXT: ; implicit-def: $sgpr31
+; GFX11-NEXT: ; implicit-def: $sgpr9
+; GFX11-NEXT: ; implicit-def: $sgpr11
+; GFX11-NEXT: ; implicit-def: $sgpr13
+; GFX11-NEXT: ; implicit-def: $sgpr15
+; GFX11-NEXT: ; implicit-def: $sgpr29
; GFX11-NEXT: ; implicit-def: $sgpr6
-; GFX11-NEXT: ; implicit-def: $sgpr34
+; GFX11-NEXT: ; implicit-def: $sgpr41
; GFX11-NEXT: ; implicit-def: $sgpr30
; GFX11-NEXT: ; implicit-def: $vcc_hi
; GFX11-NEXT: ; implicit-def: $vcc_lo
@@ -80521,9 +80623,9 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX11-NEXT: ; implicit-def: $sgpr43
; GFX11-NEXT: .LBB105_3: ; %Flow
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-NEXT: s_cbranch_scc1 .LBB105_5
; GFX11-NEXT: ; %bb.4: ; %cmp.true
; GFX11-NEXT: v_pk_add_f16 v4, 0x200, s25 op_sel_hi:[0,1]
@@ -80600,10 +80702,10 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; GFX11-NEXT: v_dual_mov_b32 v5, s22 :: v_dual_mov_b32 v6, s23
; GFX11-NEXT: v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v4, s25
; GFX11-NEXT: v_dual_mov_b32 v1, s26 :: v_dual_mov_b32 v2, s27
-; GFX11-NEXT: v_dual_mov_b32 v85, s48 :: v_dual_mov_b32 v96, s38
-; GFX11-NEXT: v_dual_mov_b32 v83, s39 :: v_dual_mov_b32 v86, s37
-; GFX11-NEXT: v_dual_mov_b32 v87, s36 :: v_dual_mov_b32 v82, s35
-; GFX11-NEXT: v_dual_mov_b32 v84, s31 :: v_dual_mov_b32 v71, s34
+; GFX11-NEXT: v_dual_mov_b32 v85, s5 :: v_dual_mov_b32 v96, s7
+; GFX11-NEXT: v_dual_mov_b32 v83, s9 :: v_dual_mov_b32 v86, s11
+; GFX11-NEXT: v_dual_mov_b32 v87, s13 :: v_dual_mov_b32 v82, s15
+; GFX11-NEXT: v_dual_mov_b32 v84, s29 :: v_dual_mov_b32 v71, s41
; GFX11-NEXT: v_dual_mov_b32 v80, s30 :: v_dual_mov_b32 v81, vcc_hi
; GFX11-NEXT: v_dual_mov_b32 v67, vcc_lo :: v_dual_mov_b32 v70, s94
; GFX11-NEXT: v_dual_mov_b32 v65, s95 :: v_dual_mov_b32 v68, s93
@@ -83276,572 +83378,532 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
+; SI-NEXT: v_readfirstlane_b32 s7, v1
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: s_mov_b32 s96, s27
-; SI-NEXT: v_writelane_b32 v44, s28, 0
-; SI-NEXT: v_writelane_b32 v44, s26, 1
-; SI-NEXT: v_writelane_b32 v44, s23, 2
-; SI-NEXT: v_writelane_b32 v44, s22, 3
-; SI-NEXT: v_writelane_b32 v44, s16, 4
-; SI-NEXT: s_mov_b32 s27, s25
-; SI-NEXT: s_mov_b32 s85, s24
-; SI-NEXT: v_readfirstlane_b32 s69, v30
-; SI-NEXT: v_readfirstlane_b32 s55, v29
-; SI-NEXT: v_readfirstlane_b32 s65, v28
-; SI-NEXT: v_readfirstlane_b32 s71, v27
-; SI-NEXT: v_readfirstlane_b32 s67, v26
-; SI-NEXT: v_readfirstlane_b32 s38, v25
-; SI-NEXT: v_readfirstlane_b32 s68, v24
-; SI-NEXT: v_readfirstlane_b32 s49, v23
-; SI-NEXT: v_readfirstlane_b32 s94, v22
-; SI-NEXT: v_readfirstlane_b32 s50, v21
-; SI-NEXT: v_readfirstlane_b32 s88, v20
-; SI-NEXT: v_readfirstlane_b32 s66, v19
-; SI-NEXT: v_readfirstlane_b32 s54, v18
-; SI-NEXT: v_readfirstlane_b32 s86, v17
-; SI-NEXT: v_readfirstlane_b32 s31, v16
-; SI-NEXT: v_readfirstlane_b32 s37, v15
-; SI-NEXT: v_readfirstlane_b32 s39, v14
-; SI-NEXT: v_readfirstlane_b32 s34, v13
-; SI-NEXT: v_readfirstlane_b32 s36, v12
-; SI-NEXT: v_readfirstlane_b32 s53, v11
-; SI-NEXT: v_readfirstlane_b32 s64, v10
-; SI-NEXT: v_readfirstlane_b32 s89, v9
-; SI-NEXT: v_readfirstlane_b32 s90, v8
-; SI-NEXT: v_readfirstlane_b32 s16, v7
-; SI-NEXT: v_readfirstlane_b32 s91, v6
-; SI-NEXT: v_readfirstlane_b32 s28, v5
-; SI-NEXT: v_readfirstlane_b32 s93, v4
-; SI-NEXT: v_readfirstlane_b32 s35, v3
-; SI-NEXT: v_readfirstlane_b32 s51, v2
-; SI-NEXT: v_readfirstlane_b32 s23, v1
-; SI-NEXT: v_readfirstlane_b32 s79, v0
+; SI-NEXT: v_readfirstlane_b32 s74, v0
+; SI-NEXT: v_writelane_b32 v44, s7, 0
+; SI-NEXT: v_readfirstlane_b32 s9, v9
+; SI-NEXT: v_writelane_b32 v44, s74, 1
+; SI-NEXT: v_readfirstlane_b32 s56, v8
+; SI-NEXT: v_writelane_b32 v44, s9, 2
+; SI-NEXT: v_readfirstlane_b32 s58, v7
+; SI-NEXT: v_writelane_b32 v44, s56, 3
+; SI-NEXT: v_readfirstlane_b32 s72, v6
+; SI-NEXT: v_writelane_b32 v44, s58, 4
+; SI-NEXT: v_readfirstlane_b32 s8, v5
+; SI-NEXT: v_writelane_b32 v44, s72, 5
+; SI-NEXT: v_readfirstlane_b32 s10, v4
+; SI-NEXT: v_writelane_b32 v44, s8, 6
+; SI-NEXT: v_readfirstlane_b32 s11, v17
+; SI-NEXT: v_writelane_b32 v44, s10, 7
+; SI-NEXT: v_readfirstlane_b32 s46, v16
+; SI-NEXT: v_writelane_b32 v44, s11, 8
+; SI-NEXT: v_readfirstlane_b32 s60, v2
+; SI-NEXT: v_writelane_b32 v44, s46, 9
+; SI-NEXT: v_readfirstlane_b32 s63, v30
+; SI-NEXT: v_readfirstlane_b32 s52, v29
+; SI-NEXT: v_readfirstlane_b32 s51, v28
+; SI-NEXT: v_readfirstlane_b32 s53, v27
+; SI-NEXT: v_readfirstlane_b32 s54, v26
+; SI-NEXT: v_readfirstlane_b32 s34, v25
+; SI-NEXT: v_readfirstlane_b32 s61, v24
+; SI-NEXT: v_readfirstlane_b32 s37, v23
+; SI-NEXT: v_readfirstlane_b32 s38, v22
+; SI-NEXT: v_readfirstlane_b32 s48, v21
+; SI-NEXT: v_readfirstlane_b32 s39, v20
+; SI-NEXT: v_readfirstlane_b32 s49, v19
+; SI-NEXT: v_readfirstlane_b32 s50, v18
+; SI-NEXT: v_readfirstlane_b32 s47, v15
+; SI-NEXT: v_readfirstlane_b32 s57, v14
+; SI-NEXT: v_readfirstlane_b32 s30, v13
+; SI-NEXT: v_readfirstlane_b32 s59, v12
+; SI-NEXT: v_readfirstlane_b32 s35, v11
+; SI-NEXT: v_readfirstlane_b32 s36, v10
+; SI-NEXT: v_readfirstlane_b32 s45, v3
+; SI-NEXT: v_writelane_b32 v44, s60, 10
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; SI-NEXT: v_readfirstlane_b32 s58, v32
; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s84, v33
-; SI-NEXT: v_readfirstlane_b32 s47, v34
-; SI-NEXT: v_readfirstlane_b32 s30, v35
-; SI-NEXT: v_readfirstlane_b32 s25, v36
+; SI-NEXT: v_readfirstlane_b32 s12, v32
+; SI-NEXT: v_readfirstlane_b32 s14, v33
+; SI-NEXT: v_readfirstlane_b32 s40, v34
+; SI-NEXT: v_readfirstlane_b32 s41, v35
+; SI-NEXT: v_readfirstlane_b32 s13, v36
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s98, v37
+; SI-NEXT: v_readfirstlane_b32 s15, v37
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s26, v38
+; SI-NEXT: v_readfirstlane_b32 s5, v38
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s22, v39
+; SI-NEXT: v_readfirstlane_b32 s76, v39
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_readfirstlane_b32 s99, v48
+; SI-NEXT: v_readfirstlane_b32 s31, v48
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s70, v49
+; SI-NEXT: v_readfirstlane_b32 s73, v49
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_readfirstlane_b32 s75, v50
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s56, v51
-; SI-NEXT: v_writelane_b32 v44, s56, 5
+; SI-NEXT: v_readfirstlane_b32 s44, v51
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_readfirstlane_b32 s42, v52
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s57, v53
-; SI-NEXT: v_writelane_b32 v44, s57, 6
-; SI-NEXT: v_readfirstlane_b32 s59, v52
-; SI-NEXT: v_writelane_b32 v44, s58, 7
-; SI-NEXT: v_readfirstlane_b32 s78, v50
+; SI-NEXT: v_readfirstlane_b32 s43, v53
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s44, v54
+; SI-NEXT: v_readfirstlane_b32 s65, v54
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s87, v55
+; SI-NEXT: v_readfirstlane_b32 s66, v55
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 vcc_lo, v40
+; SI-NEXT: v_readfirstlane_b32 s55, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 vcc_hi, v41
+; SI-NEXT: v_readfirstlane_b32 s82, v41
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s83, v42
-; SI-NEXT: v_writelane_b32 v44, s59, 8
-; SI-NEXT: v_writelane_b32 v44, s47, 9
+; SI-NEXT: v_readfirstlane_b32 s64, v42
+; SI-NEXT: v_writelane_b32 v44, s76, 11
; SI-NEXT: s_cbranch_scc0 .LBB107_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: v_readlane_b32 s4, v44, 4
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s5, s17, 8
-; SI-NEXT: s_or_b32 s12, s4, s5
+; SI-NEXT: s_and_b32 s4, s16, 0xff
+; SI-NEXT: s_lshl_b32 s6, s17, 8
+; SI-NEXT: s_or_b32 vcc_hi, s4, s6
; SI-NEXT: s_and_b32 s4, s18, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s19, 24
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s85, 0xff
-; SI-NEXT: s_lshl_b32 s6, s27, 8
-; SI-NEXT: s_or_b32 s13, s5, s6
-; SI-NEXT: v_readlane_b32 s5, v44, 1
-; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s96, 24
-; SI-NEXT: s_or_b32 s6, s6, s5
-; SI-NEXT: s_and_b32 s5, s51, 0xff
-; SI-NEXT: s_lshl_b32 s7, s35, 8
-; SI-NEXT: s_or_b32 s14, s5, s7
-; SI-NEXT: s_and_b32 s5, s93, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s28, 24
-; SI-NEXT: s_or_b32 s8, s7, s5
-; SI-NEXT: s_and_b32 s5, s64, 0xff
-; SI-NEXT: s_lshl_b32 s7, s53, 8
-; SI-NEXT: s_or_b32 s15, s5, s7
-; SI-NEXT: s_and_b32 s5, s36, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s34, 24
-; SI-NEXT: s_or_b32 s10, s7, s5
-; SI-NEXT: s_and_b32 s5, s54, 0xff
-; SI-NEXT: s_lshl_b32 s7, s66, 8
-; SI-NEXT: s_or_b32 s40, s5, s7
-; SI-NEXT: s_and_b32 s5, s88, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s50, 24
-; SI-NEXT: s_or_b32 s60, s7, s5
-; SI-NEXT: s_and_b32 s5, s67, 0xff
-; SI-NEXT: s_lshl_b32 s7, s71, 8
-; SI-NEXT: s_or_b32 s41, s5, s7
-; SI-NEXT: s_and_b32 s5, s65, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s55, 24
-; SI-NEXT: s_or_b32 s62, s7, s5
-; SI-NEXT: s_and_b32 s5, s87, 0xff
-; SI-NEXT: s_lshl_b32 s7, s44, 8
-; SI-NEXT: s_or_b32 s42, s5, s7
-; SI-NEXT: s_and_b32 s5, s22, 0xff
-; SI-NEXT: s_lshl_b32 s7, s26, 8
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s20, 0xff
-; SI-NEXT: s_lshl_b32 s7, s21, 8
-; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: v_readlane_b32 s7, v44, 3
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s9, v44, 2
-; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s6, s19, 24
+; SI-NEXT: s_or_b32 s4, s6, s4
+; SI-NEXT: s_and_b32 s6, s24, 0xff
+; SI-NEXT: s_lshl_b32 s62, s25, 8
+; SI-NEXT: s_or_b32 s67, s6, s62
+; SI-NEXT: s_and_b32 s6, s26, 0xff
+; SI-NEXT: s_and_b32 s72, s72, 0xff
+; SI-NEXT: s_lshl_b32 s58, s58, 8
+; SI-NEXT: s_and_b32 s56, s56, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s62, s27, 24
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_or_b32 s58, s72, s58
+; SI-NEXT: s_lshl_b32 s56, s56, 16
; SI-NEXT: s_lshl_b32 s9, s9, 24
-; SI-NEXT: s_or_b32 s76, s9, s7
-; SI-NEXT: v_readlane_b32 s7, v44, 0
-; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: s_lshl_b32 s9, s29, 8
-; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: s_and_b32 s9, s79, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s11, s23, 24
-; SI-NEXT: s_or_b32 s77, s11, s9
-; SI-NEXT: s_and_b32 s9, s91, 0xff
-; SI-NEXT: s_lshl_b32 s11, s16, 8
-; SI-NEXT: s_or_b32 s9, s9, s11
-; SI-NEXT: s_and_b32 s11, s90, 0xff
-; SI-NEXT: s_mov_b32 s24, s85
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_mov_b32 s85, s26
-; SI-NEXT: s_mov_b32 s26, s44
-; SI-NEXT: s_lshl_b32 s44, s89, 24
-; SI-NEXT: v_writelane_b32 v44, s55, 10
-; SI-NEXT: s_mov_b32 s55, s34
-; SI-NEXT: s_mov_b32 s34, s23
-; SI-NEXT: s_or_b32 s23, s44, s11
-; SI-NEXT: s_and_b32 s11, s39, 0xff
-; SI-NEXT: s_lshl_b32 s44, s37, 8
-; SI-NEXT: s_or_b32 s11, s11, s44
-; SI-NEXT: s_and_b32 s44, s31, 0xff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_lshl_b32 s45, s86, 24
-; SI-NEXT: v_writelane_b32 v44, s67, 11
-; SI-NEXT: v_writelane_b32 v44, s50, 12
-; SI-NEXT: s_mov_b32 s50, s21
-; SI-NEXT: s_or_b32 s21, s45, s44
-; SI-NEXT: s_and_b32 s44, s94, 0xff
-; SI-NEXT: s_lshl_b32 s45, s49, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s68, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s38, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_mov_b32 s95, s20
-; SI-NEXT: s_or_b32 s20, s46, s45
-; SI-NEXT: s_or_b32 s61, s44, s20
-; SI-NEXT: s_and_b32 s44, s69, 0xff
-; SI-NEXT: s_lshl_b32 s45, s83, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, vcc_hi, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, vcc_lo, 24
-; SI-NEXT: s_mov_b32 s52, s35
-; SI-NEXT: s_mov_b32 s35, s24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_mov_b32 s24, s69
-; SI-NEXT: s_mov_b32 s69, s53
-; SI-NEXT: s_mov_b32 s53, s31
-; SI-NEXT: s_mov_b32 s31, s96
-; SI-NEXT: s_mov_b32 s96, s18
-; SI-NEXT: s_or_b32 s18, s46, s45
-; SI-NEXT: s_or_b32 s63, s44, s18
-; SI-NEXT: s_and_b32 s44, s56, 0xff
-; SI-NEXT: s_lshl_b32 s45, s78, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s70, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s99, 24
-; SI-NEXT: s_mov_b32 s56, s22
-; SI-NEXT: s_mov_b32 s22, s87
-; SI-NEXT: s_mov_b32 s87, s83
-; SI-NEXT: s_mov_b32 s83, s54
-; SI-NEXT: s_mov_b32 s54, s39
-; SI-NEXT: s_mov_b32 s39, s90
-; SI-NEXT: s_mov_b32 s90, s19
-; SI-NEXT: s_or_b32 s19, s46, s45
-; SI-NEXT: s_and_b32 s45, s57, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s59, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
-; SI-NEXT: s_or_b32 s72, s46, s45
-; SI-NEXT: s_or_b32 s73, s44, s19
-; SI-NEXT: s_and_b32 s44, s30, 0xff
-; SI-NEXT: s_lshl_b32 s45, s47, 8
-; SI-NEXT: s_or_b32 s44, s44, s45
-; SI-NEXT: s_and_b32 s45, s84, 0xff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s58, 24
-; SI-NEXT: s_mov_b32 s97, s70
-; SI-NEXT: s_mov_b32 s70, s66
-; SI-NEXT: s_mov_b32 s66, s36
-; SI-NEXT: s_mov_b32 s36, s89
-; SI-NEXT: s_mov_b32 s89, s17
-; SI-NEXT: s_or_b32 s17, s46, s45
-; SI-NEXT: s_and_b32 s45, s98, 0xff
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s45, 16
-; SI-NEXT: s_lshl_b32 s46, s25, 24
-; SI-NEXT: s_and_b32 s44, s44, 0xffff
+; SI-NEXT: s_or_b32 s6, s62, s6
+; SI-NEXT: s_and_b32 s60, s60, 0xff
+; SI-NEXT: s_lshl_b32 s62, s45, 8
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: s_and_b32 s58, s58, 0xffff
+; SI-NEXT: s_or_b32 s87, s9, s56
+; SI-NEXT: s_or_b32 s70, s60, s62
+; SI-NEXT: s_or_b32 s8, s8, s10
+; SI-NEXT: s_and_b32 s10, s36, 0xff
+; SI-NEXT: s_lshl_b32 s60, s35, 8
+; SI-NEXT: s_or_b32 s9, s58, s87
+; SI-NEXT: s_and_b32 s56, s57, 0xff
+; SI-NEXT: s_lshl_b32 s58, s47, 8
+; SI-NEXT: s_and_b32 s46, s46, 0xff
+; SI-NEXT: s_or_b32 s71, s10, s60
+; SI-NEXT: s_and_b32 s10, s59, 0xff
+; SI-NEXT: s_or_b32 s56, s56, s58
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s11, s11, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_lshl_b32 s60, s30, 24
+; SI-NEXT: s_and_b32 s56, s56, 0xffff
+; SI-NEXT: s_or_b32 s96, s11, s46
+; SI-NEXT: s_or_b32 s10, s60, s10
+; SI-NEXT: s_and_b32 s60, s50, 0xff
+; SI-NEXT: s_lshl_b32 s62, s49, 8
+; SI-NEXT: s_or_b32 s11, s56, s96
+; SI-NEXT: s_and_b32 s46, s38, 0xff
+; SI-NEXT: s_lshl_b32 s56, s37, 8
+; SI-NEXT: s_or_b32 s80, s60, s62
+; SI-NEXT: s_and_b32 s60, s39, 0xff
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s56, s61, 0xff
+; SI-NEXT: s_lshl_b32 s60, s60, 16
+; SI-NEXT: s_lshl_b32 s62, s48, 24
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_lshl_b32 s58, s34, 24
+; SI-NEXT: s_or_b32 s60, s62, s60
+; SI-NEXT: s_and_b32 s62, s54, 0xff
+; SI-NEXT: s_lshl_b32 s77, s53, 8
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_or_b32 s97, s58, s56
+; SI-NEXT: s_or_b32 s81, s62, s77
+; SI-NEXT: s_and_b32 s62, s51, 0xff
+; SI-NEXT: s_and_b32 s76, s76, 0xff
+; SI-NEXT: s_mov_b32 s79, s5
+; SI-NEXT: s_lshl_b32 s5, s5, 8
+; SI-NEXT: s_mov_b32 s72, s61
+; SI-NEXT: s_or_b32 s61, s46, s97
+; SI-NEXT: s_and_b32 s46, s63, 0xff
+; SI-NEXT: s_lshl_b32 s56, s64, 8
+; SI-NEXT: s_lshl_b32 s62, s62, 16
+; SI-NEXT: s_lshl_b32 s77, s52, 24
+; SI-NEXT: s_or_b32 s84, s76, s5
+; SI-NEXT: s_and_b32 s5, s20, 0xff
+; SI-NEXT: s_lshl_b32 s76, s21, 8
+; SI-NEXT: s_or_b32 s46, s46, s56
+; SI-NEXT: s_and_b32 s56, s82, 0xff
+; SI-NEXT: s_or_b32 s62, s77, s62
+; SI-NEXT: s_and_b32 s77, s66, 0xff
+; SI-NEXT: s_lshl_b32 s78, s65, 8
; SI-NEXT: s_or_b32 s5, s5, s76
-; SI-NEXT: s_or_b32 s7, s7, s77
-; SI-NEXT: s_or_b32 s9, s9, s23
-; SI-NEXT: s_mov_b32 s67, s27
-; SI-NEXT: s_or_b32 s11, s11, s21
-; SI-NEXT: s_mov_b32 s82, s65
-; SI-NEXT: s_mov_b32 s65, s38
-; SI-NEXT: s_mov_b32 s38, s91
-; SI-NEXT: s_mov_b32 s91, s29
-; SI-NEXT: s_or_b32 s74, s46, s45
-; SI-NEXT: s_or_b32 s75, s44, s17
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_and_b32 s58, s15, 0xffff
-; SI-NEXT: s_mov_b32 s48, s16
-; SI-NEXT: s_and_b32 s16, s40, 0xffff
-; SI-NEXT: s_and_b32 s29, s41, 0xffff
-; SI-NEXT: s_mov_b32 s45, s98
-; SI-NEXT: s_mov_b32 s98, s28
-; SI-NEXT: s_and_b32 s28, s42, 0xffff
-; SI-NEXT: s_and_b32 s27, s43, 0xffff
-; SI-NEXT: s_mov_b32 s44, s93
+; SI-NEXT: s_and_b32 s76, s22, 0xff
+; SI-NEXT: s_and_b32 s74, s74, 0xff
+; SI-NEXT: s_lshl_b32 s56, s56, 16
+; SI-NEXT: s_lshl_b32 s58, s55, 24
+; SI-NEXT: s_mov_b32 s91, s14
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_or_b32 s83, s77, s78
+; SI-NEXT: s_lshl_b32 s76, s76, 16
+; SI-NEXT: s_lshl_b32 s77, s23, 24
+; SI-NEXT: s_lshl_b32 s74, s74, 16
+; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_and_b32 s46, s46, 0xffff
+; SI-NEXT: s_or_b32 s98, s58, s56
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_mov_b32 s94, s12
+; SI-NEXT: s_lshl_b32 s12, s12, 24
+; SI-NEXT: s_or_b32 s85, s77, s76
+; SI-NEXT: s_and_b32 s76, s28, 0xff
+; SI-NEXT: s_lshl_b32 s77, s29, 8
+; SI-NEXT: s_or_b32 s86, s7, s74
+; SI-NEXT: s_mov_b32 s74, s63
+; SI-NEXT: s_or_b32 s63, s46, s98
+; SI-NEXT: s_mov_b32 s88, s44
+; SI-NEXT: s_and_b32 s44, s44, 0xff
+; SI-NEXT: s_lshl_b32 s46, s75, 8
+; SI-NEXT: s_mov_b32 s92, s41
+; SI-NEXT: s_and_b32 s41, s41, 0xff
+; SI-NEXT: s_mov_b32 s93, s40
+; SI-NEXT: s_lshl_b32 s40, s40, 8
+; SI-NEXT: s_or_b32 s78, s12, s14
+; SI-NEXT: s_and_b32 s12, s15, 0xff
+; SI-NEXT: s_or_b32 s76, s76, s77
+; SI-NEXT: s_or_b32 s44, s44, s46
+; SI-NEXT: s_and_b32 s46, s73, 0xff
+; SI-NEXT: s_mov_b32 s89, s43
+; SI-NEXT: s_and_b32 s43, s43, 0xff
+; SI-NEXT: s_or_b32 s40, s41, s40
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_lshl_b32 s13, s13, 24
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_and_b32 s76, s76, 0xffff
+; SI-NEXT: s_lshl_b32 s46, s46, 16
+; SI-NEXT: s_lshl_b32 s56, s31, 24
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_mov_b32 s90, s42
+; SI-NEXT: s_lshl_b32 s42, s42, 24
+; SI-NEXT: s_or_b32 s68, s13, s12
+; SI-NEXT: s_and_b32 s12, s40, 0xffff
+; SI-NEXT: s_or_b32 s5, s5, s85
+; SI-NEXT: s_or_b32 s7, s76, s86
+; SI-NEXT: s_or_b32 s99, s56, s46
+; SI-NEXT: s_or_b32 s76, s42, s43
+; SI-NEXT: s_and_b32 s42, s44, 0xffff
+; SI-NEXT: s_or_b32 s69, s12, s78
+; SI-NEXT: s_and_b32 s12, vcc_hi, 0xffff
+; SI-NEXT: s_or_b32 s77, s42, s99
; SI-NEXT: s_or_b32 s42, s12, s4
-; SI-NEXT: s_mov_b32 s43, s5
-; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 16
-; SI-NEXT: s_or_b32 s40, s13, s6
-; SI-NEXT: s_mov_b32 s41, s7
+; SI-NEXT: s_mov_b32 s12, s45
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_mov_b32 s4, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_and_b32 s13, s67, 0xffff
+; SI-NEXT: s_and_b32 s14, s70, 0xffff
+; SI-NEXT: s_and_b32 s58, s71, 0xffff
+; SI-NEXT: s_and_b32 vcc_hi, s80, 0xffff
+; SI-NEXT: s_and_b32 s67, s81, 0xffff
+; SI-NEXT: s_mov_b32 s47, s4
+; SI-NEXT: s_mov_b32 s4, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_mov_b32 s95, s15
+; SI-NEXT: s_and_b32 s70, s83, 0xffff
+; SI-NEXT: s_mov_b32 s45, s12
+; SI-NEXT: s_or_b32 s40, s13, s6
; SI-NEXT: s_or_b32 s14, s14, s8
; SI-NEXT: s_mov_b32 s15, s9
-; SI-NEXT: s_lshr_b64 s[92:93], s[8:9], 16
+; SI-NEXT: s_mov_b32 s57, s4
; SI-NEXT: s_or_b32 s12, s58, s10
; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s4, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_or_b32 s10, s16, s60
+; SI-NEXT: s_or_b32 s10, vcc_hi, s60
; SI-NEXT: s_mov_b32 s11, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_or_b32 s8, s29, s62
+; SI-NEXT: s_or_b32 s8, s67, s62
; SI-NEXT: s_mov_b32 s9, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_or_b32 s6, s28, s72
-; SI-NEXT: s_mov_b32 s7, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_or_b32 s4, s27, s74
-; SI-NEXT: s_mov_b32 s5, s75
-; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_mov_b32 s16, s48
-; SI-NEXT: s_mov_b32 s93, s44
-; SI-NEXT: s_mov_b32 s44, s26
-; SI-NEXT: s_mov_b32 s26, s85
-; SI-NEXT: s_mov_b32 s28, s98
-; SI-NEXT: s_mov_b32 s98, s45
-; SI-NEXT: s_lshr_b32 s47, s76, 16
-; SI-NEXT: s_lshr_b32 s57, s77, 16
-; SI-NEXT: s_lshr_b32 s59, s23, 16
-; SI-NEXT: s_mov_b32 s23, s34
-; SI-NEXT: s_mov_b32 s34, s55
-; SI-NEXT: v_readlane_b32 s55, v44, 10
-; SI-NEXT: s_lshr_b32 s61, s21, 16
-; SI-NEXT: s_mov_b32 s21, s50
-; SI-NEXT: s_mov_b32 s27, s67
-; SI-NEXT: v_readlane_b32 s50, v44, 12
-; SI-NEXT: v_readlane_b32 s67, v44, 11
-; SI-NEXT: s_lshr_b32 s63, s20, 16
-; SI-NEXT: s_mov_b32 s20, s95
-; SI-NEXT: s_mov_b32 s85, s35
-; SI-NEXT: s_mov_b32 s35, s52
-; SI-NEXT: s_lshr_b32 s73, s18, 16
-; SI-NEXT: s_mov_b32 s18, s96
-; SI-NEXT: s_mov_b32 s96, s31
-; SI-NEXT: s_mov_b32 s31, s53
-; SI-NEXT: s_mov_b32 s53, s69
-; SI-NEXT: s_mov_b32 s69, s24
-; SI-NEXT: s_mov_b32 s29, s91
-; SI-NEXT: s_mov_b32 s91, s38
-; SI-NEXT: s_mov_b32 s38, s65
-; SI-NEXT: s_mov_b32 s65, s82
-; SI-NEXT: s_lshr_b32 s75, s19, 16
-; SI-NEXT: s_mov_b32 s19, s90
-; SI-NEXT: s_mov_b32 s90, s39
-; SI-NEXT: s_mov_b32 s39, s54
-; SI-NEXT: s_mov_b32 s54, s83
-; SI-NEXT: s_mov_b32 s83, s87
-; SI-NEXT: s_mov_b32 s87, s22
-; SI-NEXT: s_mov_b32 s22, s56
-; SI-NEXT: s_lshr_b32 s45, s17, 16
-; SI-NEXT: s_mov_b32 s17, s89
-; SI-NEXT: s_mov_b32 s89, s36
-; SI-NEXT: s_mov_b32 s36, s66
-; SI-NEXT: s_mov_b32 s66, s70
-; SI-NEXT: s_mov_b32 s70, s97
+; SI-NEXT: s_and_b32 s71, s84, 0xffff
+; SI-NEXT: s_mov_b32 s59, s4
+; SI-NEXT: s_mov_b32 s61, s72
+; SI-NEXT: s_mov_b32 s63, s74
+; SI-NEXT: s_or_b32 s6, s70, s76
+; SI-NEXT: s_mov_b32 s4, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[76:77], 16
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_lshr_b64 s[74:75], s[68:69], 16
+; SI-NEXT: s_mov_b32 s43, s5
+; SI-NEXT: s_mov_b32 s41, s7
+; SI-NEXT: s_mov_b32 s7, s77
+; SI-NEXT: s_mov_b32 s73, s4
+; SI-NEXT: s_or_b32 s4, s71, s68
+; SI-NEXT: s_mov_b32 s5, s69
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b32 s71, s85, 16
+; SI-NEXT: s_lshr_b32 s70, s86, 16
+; SI-NEXT: s_lshr_b32 s68, s87, 16
+; SI-NEXT: s_lshr_b32 s69, s96, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s97, 16
+; SI-NEXT: s_lshr_b32 s67, s98, 16
+; SI-NEXT: s_lshr_b32 s80, s99, 16
+; SI-NEXT: s_lshr_b32 s81, s78, 16
; SI-NEXT: s_mov_b64 s[76:77], 0
; SI-NEXT: s_branch .LBB107_3
; SI-NEXT: .LBB107_2:
+; SI-NEXT: s_mov_b32 s79, s5
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s95, s15
+; SI-NEXT: s_mov_b32 s92, s41
+; SI-NEXT: s_mov_b32 s93, s40
+; SI-NEXT: s_mov_b32 s94, s12
+; SI-NEXT: s_mov_b32 s91, s14
+; SI-NEXT: s_mov_b32 s90, s42
+; SI-NEXT: s_mov_b32 s89, s43
+; SI-NEXT: s_mov_b32 s88, s44
; SI-NEXT: s_mov_b64 s[76:77], -1
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr47
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr71
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr61
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr63
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr73
+; SI-NEXT: ; implicit-def: $sgpr67
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr75
+; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr81
; SI-NEXT: .LBB107_3: ; %Flow
; SI-NEXT: s_and_b64 s[76:77], s[76:77], exec
; SI-NEXT: s_cselect_b32 s76, 1, 0
; SI-NEXT: s_cmp_lg_u32 s76, 1
; SI-NEXT: s_cbranch_scc1 .LBB107_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_and_b32 s4, s22, 0xff
-; SI-NEXT: s_lshl_b32 s5, s26, 8
-; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: v_readlane_b32 s4, v44, 11
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s5, s79, 8
+; SI-NEXT: s_add_i32 s6, s95, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s6, s98, 0xff
+; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
-; SI-NEXT: s_lshl_b32 s5, s25, 24
+; SI-NEXT: s_lshl_b32 s5, vcc_lo, 24
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s5, s6
-; SI-NEXT: s_add_i32 s97, s30, 3
-; SI-NEXT: v_readlane_b32 s6, v44, 9
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s97, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 8
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s5, s92, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xff
+; SI-NEXT: s_lshl_b32 s6, s93, 8
+; SI-NEXT: s_add_i32 s7, s91, 3
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_readlane_b32 s6, v44, 7
-; SI-NEXT: s_and_b32 s7, s84, 0xff
+; SI-NEXT: s_and_b32 s7, s7, 0xff
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s6, s94, 24
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: v_readlane_b32 s8, v44, 6
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s87, 0xff
-; SI-NEXT: s_lshl_b32 s7, s44, 8
-; SI-NEXT: s_add_i32 s82, s8, 3
+; SI-NEXT: s_add_i32 s6, s66, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s7, s65, 8
+; SI-NEXT: s_add_i32 s8, s89, 3
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v44, 8
-; SI-NEXT: s_and_b32 s8, s82, 0xff
+; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s7, 24
+; SI-NEXT: s_lshl_b32 s7, s90, 24
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s8
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_readlane_b32 s7, v44, 5
-; SI-NEXT: s_add_i32 s81, s7, 3
-; SI-NEXT: s_and_b32 s7, s81, 0xff
-; SI-NEXT: s_lshl_b32 s8, s78, 8
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s7, s88, 3
+; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_lshl_b32 s8, s75, 8
+; SI-NEXT: s_add_i32 s9, s73, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s9, s70, 0xff
+; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s8, s99, 24
+; SI-NEXT: s_lshl_b32 s8, s31, 24
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: s_add_i32 s67, s67, 3
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s67, 0xff
-; SI-NEXT: s_lshl_b32 s9, s71, 8
-; SI-NEXT: s_add_i32 s65, s65, 3
+; SI-NEXT: s_add_i32 s8, s54, 3
+; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: s_lshl_b32 s9, s53, 8
+; SI-NEXT: s_add_i32 s10, s51, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s10, s65, 0xff
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_addk_i32 s8, 0x300
-; SI-NEXT: s_lshl_b32 s9, s55, 24
+; SI-NEXT: s_lshl_b32 s9, s52, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s9, s10
-; SI-NEXT: s_add_i32 s55, s69, 3
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s55, 0xff
-; SI-NEXT: s_lshl_b32 s10, s83, 8
-; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
+; SI-NEXT: s_add_i32 s9, s63, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xff
+; SI-NEXT: s_lshl_b32 s10, s64, 8
+; SI-NEXT: s_add_i32 s82, s82, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s11, vcc_hi, 0xff
+; SI-NEXT: s_and_b32 s11, s82, 0xff
; SI-NEXT: s_addk_i32 s9, 0x300
-; SI-NEXT: s_lshl_b32 s10, vcc_lo, 24
+; SI-NEXT: s_lshl_b32 s10, s55, 24
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: s_add_i32 s54, s54, 3
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s54, 0xff
-; SI-NEXT: s_lshl_b32 s11, s66, 8
-; SI-NEXT: s_add_i32 s52, s88, 3
+; SI-NEXT: s_add_i32 s10, s50, 3
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_lshl_b32 s11, s49, 8
+; SI-NEXT: s_add_i32 s12, s39, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s12, s52, 0xff
+; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_addk_i32 s10, 0x300
-; SI-NEXT: s_lshl_b32 s11, s50, 24
+; SI-NEXT: s_lshl_b32 s11, s48, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s11, s12
-; SI-NEXT: s_add_i32 s50, s94, 3
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s50, 0xff
-; SI-NEXT: s_lshl_b32 s12, s49, 8
+; SI-NEXT: s_add_i32 s11, s38, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xff
+; SI-NEXT: s_lshl_b32 s12, s37, 8
+; SI-NEXT: s_add_i32 s13, s61, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_lshl_b32 s12, s38, 24
-; SI-NEXT: s_add_i32 s38, s68, 3
-; SI-NEXT: s_and_b32 s13, s38, 0xff
+; SI-NEXT: s_and_b32 s13, s13, 0xff
; SI-NEXT: s_addk_i32 s11, 0x300
+; SI-NEXT: s_lshl_b32 s12, s34, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_add_i32 s49, s64, 3
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s49, 0xff
-; SI-NEXT: s_lshl_b32 s13, s53, 8
-; SI-NEXT: s_add_i32 s36, s36, 3
+; SI-NEXT: s_add_i32 s12, s36, 3
+; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: s_lshl_b32 s13, s35, 8
+; SI-NEXT: s_add_i32 s14, s59, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s14, s36, 0xff
+; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_addk_i32 s12, 0x300
-; SI-NEXT: s_lshl_b32 s13, s34, 24
+; SI-NEXT: s_lshl_b32 s13, s30, 24
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s13, s14
-; SI-NEXT: s_add_i32 s34, s39, 3
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: s_and_b32 s13, s34, 0xff
-; SI-NEXT: s_lshl_b32 s14, s37, 8
-; SI-NEXT: s_add_i32 s95, s31, 3
+; SI-NEXT: s_add_i32 s13, s57, 3
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s14, s47, 8
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s15, s95, 0xff
; SI-NEXT: s_addk_i32 s13, 0x300
-; SI-NEXT: s_lshl_b32 s14, s86, 24
-; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: s_add_i32 vcc_lo, s51, 3
-; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, vcc_lo, 0xff
-; SI-NEXT: s_lshl_b32 s15, s35, 8
-; SI-NEXT: s_add_i32 s93, s93, 3
+; SI-NEXT: s_and_b32 s14, s13, 0xffff
+; SI-NEXT: v_readlane_b32 s13, v44, 8
+; SI-NEXT: s_lshl_b32 s15, s13, 24
+; SI-NEXT: v_readlane_b32 s13, v44, 9
+; SI-NEXT: s_add_i32 s13, s13, 3
+; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_or_b32 s13, s15, s13
+; SI-NEXT: s_or_b32 s13, s13, s14
+; SI-NEXT: v_readlane_b32 s14, v44, 10
+; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s15, s45, 8
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s22, s93, 0xff
; SI-NEXT: s_addk_i32 s14, 0x300
-; SI-NEXT: s_lshl_b32 s15, s28, 24
-; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_or_b32 s15, s15, s22
-; SI-NEXT: s_add_i32 s91, s91, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: s_and_b32 s15, s91, 0xff
-; SI-NEXT: s_lshl_b32 s22, s16, 8
-; SI-NEXT: s_or_b32 s15, s22, s15
-; SI-NEXT: s_lshl_b32 s22, s89, 24
-; SI-NEXT: s_add_i32 s89, s90, 3
-; SI-NEXT: s_and_b32 s40, s89, 0xff
+; SI-NEXT: s_and_b32 s15, s14, 0xffff
+; SI-NEXT: v_readlane_b32 s14, v44, 6
+; SI-NEXT: s_lshl_b32 s40, s14, 24
+; SI-NEXT: v_readlane_b32 s14, v44, 7
+; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_and_b32 s14, s14, 0xff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s14, s40, s14
+; SI-NEXT: s_or_b32 s14, s14, s15
+; SI-NEXT: v_readlane_b32 s15, v44, 5
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_and_b32 s40, s15, 0xff
+; SI-NEXT: v_readlane_b32 s15, v44, 4
+; SI-NEXT: s_lshl_b32 s15, s15, 8
+; SI-NEXT: s_or_b32 s15, s15, s40
; SI-NEXT: s_addk_i32 s15, 0x300
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: v_readlane_b32 s16, v44, 0
-; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s40
-; SI-NEXT: s_add_i32 s24, s85, 3
-; SI-NEXT: v_readlane_b32 s25, v44, 1
-; SI-NEXT: s_add_i32 s28, s16, 3
-; SI-NEXT: v_readlane_b32 s16, v44, 4
-; SI-NEXT: s_or_b32 s15, s22, s15
-; SI-NEXT: s_and_b32 s22, s24, 0xff
-; SI-NEXT: s_lshl_b32 s24, s27, 8
-; SI-NEXT: s_add_i32 s26, s25, 3
+; SI-NEXT: s_and_b32 s40, s15, 0xffff
+; SI-NEXT: v_readlane_b32 s15, v44, 2
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: s_lshl_b32 s41, s15, 24
+; SI-NEXT: v_readlane_b32 s15, v44, 3
+; SI-NEXT: s_and_b32 s24, s24, 0xff
+; SI-NEXT: s_lshl_b32 s25, s25, 8
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: s_add_i32 s15, s15, 3
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_and_b32 s26, s26, 0xff
+; SI-NEXT: s_and_b32 s15, s15, 0xff
+; SI-NEXT: s_addk_i32 s24, 0x300
+; SI-NEXT: s_lshl_b32 s25, s27, 24
+; SI-NEXT: s_lshl_b32 s26, s26, 16
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s26
+; SI-NEXT: s_or_b32 s15, s41, s15
+; SI-NEXT: s_or_b32 s24, s25, s24
+; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_and_b32 s25, s26, 0xff
+; SI-NEXT: s_or_b32 s15, s15, s40
+; SI-NEXT: s_add_i32 s40, s24, 0x3000000
+; SI-NEXT: s_and_b32 s24, s28, 0xff
+; SI-NEXT: s_lshl_b32 s25, s29, 8
; SI-NEXT: s_and_b32 s16, s16, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_addk_i32 s22, 0x300
-; SI-NEXT: s_lshl_b32 s24, s96, 24
-; SI-NEXT: s_lshl_b32 s25, s25, 16
+; SI-NEXT: s_or_b32 s24, s25, s24
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_addk_i32 s24, 0x300
; SI-NEXT: s_addk_i32 s16, 0x300
; SI-NEXT: s_lshl_b32 s17, s19, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_or_b32 s22, s24, s22
+; SI-NEXT: s_and_b32 s25, s24, 0xffff
+; SI-NEXT: v_readlane_b32 s24, v44, 0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
-; SI-NEXT: s_add_i32 s40, s22, 0x3000000
-; SI-NEXT: s_and_b32 s22, s28, 0xff
-; SI-NEXT: s_lshl_b32 s24, s29, 8
-; SI-NEXT: s_add_i32 s79, s79, 3
+; SI-NEXT: s_lshl_b32 s26, s24, 24
+; SI-NEXT: v_readlane_b32 s24, v44, 1
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: v_readlane_b32 s18, v44, 3
-; SI-NEXT: s_or_b32 s22, s24, s22
-; SI-NEXT: s_and_b32 s24, s79, 0xff
+; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s42, s16, 0x3000000
; SI-NEXT: s_and_b32 s16, s20, 0xff
; SI-NEXT: s_lshl_b32 s17, s21, 8
-; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_addk_i32 s22, 0x300
-; SI-NEXT: s_lshl_b32 s23, s23, 24
-; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_and_b32 s24, s24, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_readlane_b32 s17, v44, 2
-; SI-NEXT: s_and_b32 s18, s18, 0xff
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s23, s23, s24
+; SI-NEXT: s_and_b32 s18, s22, 0xff
+; SI-NEXT: s_lshl_b32 s24, s24, 16
; SI-NEXT: s_addk_i32 s16, 0x300
-; SI-NEXT: s_lshl_b32 s17, s17, 24
+; SI-NEXT: s_lshl_b32 s17, s23, 24
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_or_b32 s22, s23, s22
+; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
; SI-NEXT: s_add_i32 s6, s6, 0x3000000
@@ -83852,78 +83914,77 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32
; SI-NEXT: s_add_i32 s11, s11, 0x3000000
; SI-NEXT: s_add_i32 s12, s12, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 0x3000000
-; SI-NEXT: s_add_i32 s41, s22, 0x3000000
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s14, s14, 0x3000000
; SI-NEXT: s_add_i32 s15, s15, 0x3000000
+; SI-NEXT: s_add_i32 s41, s24, 0x3000000
; SI-NEXT: s_add_i32 s43, s16, 0x3000000
+; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
-; SI-NEXT: s_lshr_b32 s47, s43, 16
-; SI-NEXT: s_lshr_b32 s57, s41, 16
-; SI-NEXT: s_lshr_b32 s59, s15, 16
-; SI-NEXT: s_lshr_b32 s61, s13, 16
-; SI-NEXT: s_lshr_b32 s63, s11, 16
-; SI-NEXT: s_lshr_b32 s73, s9, 16
-; SI-NEXT: s_lshr_b32 s75, s7, 16
-; SI-NEXT: s_lshr_b32 s45, s5, 16
+; SI-NEXT: s_lshr_b32 s71, s43, 16
+; SI-NEXT: s_lshr_b32 s70, s41, 16
+; SI-NEXT: s_lshr_b32 s68, s15, 16
+; SI-NEXT: s_lshr_b32 s69, s13, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s11, 16
+; SI-NEXT: s_lshr_b32 s67, s9, 16
+; SI-NEXT: s_lshr_b32 s80, s7, 16
+; SI-NEXT: s_lshr_b32 s81, s5, 16
; SI-NEXT: .LBB107_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s16, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s80, 16
+; SI-NEXT: s_lshl_b32 s17, s44, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s47, 16
+; SI-NEXT: s_lshl_b32 s18, s71, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s40, 0xffff
; SI-NEXT: s_lshl_b32 s19, s46, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s57, 16
+; SI-NEXT: s_lshl_b32 s20, s70, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s92, 16
+; SI-NEXT: s_lshl_b32 s20, s56, 16
; SI-NEXT: s_or_b32 s14, s14, s20
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s59, 16
+; SI-NEXT: s_lshl_b32 s20, s68, 16
; SI-NEXT: s_or_b32 s15, s15, s20
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s20, s58, 16
; SI-NEXT: s_or_b32 s12, s12, s20
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s61, 16
+; SI-NEXT: s_lshl_b32 s20, s69, 16
; SI-NEXT: s_or_b32 s13, s13, s20
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s20, s60, 16
; SI-NEXT: s_or_b32 s10, s10, s20
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s63, 16
+; SI-NEXT: s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT: s_or_b32 s11, s11, s20
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s20, s62, 16
; SI-NEXT: s_or_b32 s8, s8, s20
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s73, 16
+; SI-NEXT: s_lshl_b32 s20, s67, 16
; SI-NEXT: s_or_b32 s9, s9, s20
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s20, s72, 16
; SI-NEXT: s_or_b32 s6, s6, s20
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s75, 16
+; SI-NEXT: s_lshl_b32 s20, s80, 16
; SI-NEXT: s_or_b32 s7, s7, s20
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s20, s74, 16
; SI-NEXT: s_or_b32 s4, s4, s20
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s45, 16
+; SI-NEXT: s_lshl_b32 s20, s81, 16
; SI-NEXT: s_or_b32 s5, s5, s20
; SI-NEXT: v_readlane_b32 s30, v43, 34
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -85991,17 +86052,15 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr28
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr47
@@ -86012,6 +86071,8 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr53
@@ -86031,8 +86092,8 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr29
+; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
@@ -86049,11 +86110,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v26, v23
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
@@ -86073,26 +86134,27 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
+; VI-NEXT: v_mov_b32_e32 v26, v29
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: v_mov_b32_e32 v24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
; VI-NEXT: .LBB108_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB108_4
@@ -86392,12 +86454,12 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
@@ -86416,65 +86478,65 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v1
; VI-NEXT: .LBB108_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v23, v28, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v23, v63, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v63, v62, s4
-; VI-NEXT: v_perm_b32 v2, v2, v27, s4
+; VI-NEXT: v_perm_b32 v1, v60, v59, s4
+; VI-NEXT: v_perm_b32 v2, v2, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
-; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_perm_b32 v1, v3, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: v_perm_b32 v2, v56, v47, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
-; VI-NEXT: v_perm_b32 v1, v4, v59, s4
+; VI-NEXT: v_perm_b32 v1, v4, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: v_perm_b32 v2, v45, v25, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
-; VI-NEXT: v_perm_b32 v1, v5, v56, s4
+; VI-NEXT: v_perm_b32 v1, v5, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: v_perm_b32 v2, v43, v42, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
-; VI-NEXT: v_perm_b32 v1, v6, v46, s4
+; VI-NEXT: v_perm_b32 v1, v6, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: v_perm_b32 v2, v40, v21, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
-; VI-NEXT: v_perm_b32 v1, v7, v43, s4
+; VI-NEXT: v_perm_b32 v1, v7, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: v_perm_b32 v2, v24, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
-; VI-NEXT: v_perm_b32 v1, v8, v41, s4
+; VI-NEXT: v_perm_b32 v1, v8, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: v_perm_b32 v2, v53, v20, s4
@@ -86514,7 +86576,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v26, v24, s4
+; VI-NEXT: v_perm_b32 v2, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
@@ -86564,48 +86626,47 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: ; implicit-def: $vgpr17
; GFX9-NEXT: ; kill: killed $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr17
-; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr17
; GFX9-NEXT: ; implicit-def: $vgpr28
; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr29
; GFX9-NEXT: ; implicit-def: $vgpr61
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr58
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr57
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr42
; GFX9-NEXT: ; implicit-def: $vgpr48
; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr40
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr45
+; GFX9-NEXT: ; implicit-def: $vgpr27
; GFX9-NEXT: ; implicit-def: $vgpr26
+; GFX9-NEXT: ; implicit-def: $vgpr22
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
; GFX9-NEXT: ; implicit-def: $vgpr19
@@ -86615,57 +86676,57 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB108_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
-; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v14
+; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v12
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v12
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
-; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[5:6]
+; GFX9-NEXT: v_mov_b32_e32 v22, v25
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
; GFX9-NEXT: .LBB108_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -86835,7 +86896,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v38
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v38, v38
; GFX9-NEXT: v_bfe_u32 v38, v11, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v52, v48, v49, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v40, v48, v49, vcc
; GFX9-NEXT: v_add3_u32 v38, v38, v11, s6
; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v11
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
@@ -86874,10 +86935,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_bfe_u32 v51, v50, 16, 1
; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; GFX9-NEXT: v_add3_u32 v51, v51, v50, s6
-; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v50
+; GFX9-NEXT: v_or_b32_e32 v52, 0x400000, v50
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
; GFX9-NEXT: v_bfe_u32 v50, v16, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v55, v51, v55, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v51, v52, vcc
; GFX9-NEXT: v_add3_u32 v50, v50, v16, s6
; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v16
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
@@ -86885,20 +86946,20 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v15
; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX9-NEXT: v_bfe_u32 v40, v50, 16, 1
+; GFX9-NEXT: v_bfe_u32 v55, v50, 16, 1
; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX9-NEXT: v_add3_u32 v40, v40, v50, s6
+; GFX9-NEXT: v_add3_u32 v55, v55, v50, s6
; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v50
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
; GFX9-NEXT: v_bfe_u32 v50, v15, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v40, v40, v41, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v55, v55, v41, vcc
; GFX9-NEXT: v_add3_u32 v50, v50, v15, s6
; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v15
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_cndmask_b32_e32 v15, v50, v41, vcc
-; GFX9-NEXT: v_perm_b32 v51, v16, v55, s7
-; GFX9-NEXT: v_perm_b32 v50, v15, v40, s7
+; GFX9-NEXT: v_perm_b32 v51, v16, v52, s7
+; GFX9-NEXT: v_perm_b32 v50, v15, v55, s7
; GFX9-NEXT: v_perm_b32 v29, v2, v17, s7
; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7
; GFX9-NEXT: v_perm_b32 v49, v14, v53, s7
@@ -86910,8 +86971,8 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
; GFX9-NEXT: v_perm_b32 v31, v4, v19, s7
; GFX9-NEXT: v_perm_b32 v39, v12, v27, s7
-; GFX9-NEXT: v_perm_b32 v38, v11, v52, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX9-NEXT: v_perm_b32 v38, v11, v40, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v19
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[48:49]
; GFX9-NEXT: v_perm_b32 v30, v3, v20, s7
@@ -86919,109 +86980,109 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v34, v7, v24, s7
; GFX9-NEXT: v_perm_b32 v37, v10, v25, s7
; GFX9-NEXT: v_perm_b32 v36, v9, v26, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[38:39]
; GFX9-NEXT: v_perm_b32 v33, v6, v21, s7
; GFX9-NEXT: v_perm_b32 v32, v5, v22, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[36:37]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[34:35]
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[32:33]
+; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[32:33]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[30:31]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[28:29]
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v55
-; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v53
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v55
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v27
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v40
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v26
+; GFX9-NEXT: v_mov_b32_e32 v26, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v50
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v31
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v28
; GFX9-NEXT: .LBB108_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v63, v24, s4
+; GFX9-NEXT: v_perm_b32 v24, v63, v24, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
+; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1
; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v61, v53, s4
+; GFX9-NEXT: v_perm_b32 v1, v61, v50, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v60, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_perm_b32 v1, v3, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_perm_b32 v1, v4, v31, s4
-; GFX9-NEXT: v_perm_b32 v2, v58, v52, s4
+; GFX9-NEXT: v_perm_b32 v2, v60, v51, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_perm_b32 v1, v5, v32, s4
-; GFX9-NEXT: v_perm_b32 v2, v47, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v59, v52, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_perm_b32 v1, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v2, v44, v51, s4
+; GFX9-NEXT: v_perm_b32 v2, v58, v45, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_perm_b32 v1, v7, v34, s4
-; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
+; GFX9-NEXT: v_perm_b32 v2, v57, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_perm_b32 v1, v8, v35, s4
-; GFX9-NEXT: v_perm_b32 v2, v42, v50, s4
+; GFX9-NEXT: v_perm_b32 v2, v56, v44, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v36, s4
-; GFX9-NEXT: v_perm_b32 v2, v41, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v47, v20, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; GFX9-NEXT: v_perm_b32 v1, v10, v37, s4
-; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4
+; GFX9-NEXT: v_perm_b32 v2, v46, v43, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; GFX9-NEXT: v_perm_b32 v1, v11, v38, s4
@@ -87029,31 +87090,29 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; GFX9-NEXT: v_perm_b32 v1, v12, v39, s4
-; GFX9-NEXT: v_perm_b32 v2, v54, v59, s4
+; GFX9-NEXT: v_perm_b32 v2, v54, v42, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v13, v48, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v18, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v14, v49, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v57, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v15, v56, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v15, v40, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v46, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v27, s4
+; GFX9-NEXT: v_perm_b32 v2, v26, v22, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -88823,36 +88882,42 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_writelane_b32 v63, s53, 11
; VI-NEXT: v_writelane_b32 v63, s54, 12
; VI-NEXT: v_writelane_b32 v63, s55, 13
-; VI-NEXT: v_writelane_b32 v63, s64, 14
-; VI-NEXT: v_writelane_b32 v63, s65, 15
-; VI-NEXT: v_writelane_b32 v63, s30, 16
-; VI-NEXT: v_writelane_b32 v63, s31, 17
+; VI-NEXT: v_writelane_b32 v63, s30, 14
+; VI-NEXT: v_writelane_b32 v63, s31, 15
; VI-NEXT: v_readfirstlane_b32 s4, v3
; VI-NEXT: v_readfirstlane_b32 s5, v2
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s4, v1
; VI-NEXT: s_cbranch_scc0 .LBB109_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s55, s5, 24
-; VI-NEXT: s_lshr_b32 s54, s5, 16
-; VI-NEXT: s_lshr_b32 s53, s5, 8
-; VI-NEXT: s_lshr_b32 s65, s4, 16
-; VI-NEXT: s_lshr_b32 s64, s4, 8
-; VI-NEXT: s_lshr_b32 s50, s29, 24
-; VI-NEXT: s_lshr_b32 s49, s29, 16
-; VI-NEXT: s_lshr_b32 s48, s29, 8
-; VI-NEXT: s_lshr_b32 s52, s28, 16
-; VI-NEXT: s_lshr_b32 s51, s28, 8
-; VI-NEXT: s_lshr_b32 s37, s27, 24
-; VI-NEXT: s_lshr_b32 s36, s27, 16
-; VI-NEXT: s_lshr_b32 s35, s27, 8
-; VI-NEXT: s_lshr_b32 s39, s26, 16
-; VI-NEXT: s_lshr_b32 s38, s26, 8
-; VI-NEXT: s_lshr_b32 s30, s25, 24
+; VI-NEXT: s_lshr_b32 s46, s27, 24
+; VI-NEXT: s_lshr_b32 s47, s27, 16
+; VI-NEXT: s_lshr_b32 s50, s27, 8
+; VI-NEXT: s_lshr_b32 s51, s26, 16
+; VI-NEXT: s_lshr_b32 s52, s26, 8
+; VI-NEXT: s_lshr_b32 s53, s25, 24
+; VI-NEXT: s_lshr_b32 s54, s24, 16
+; VI-NEXT: s_lshr_b32 s55, s24, 8
+; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_lshr_b32 s49, s5, 24
+; VI-NEXT: s_lshr_b32 s48, s5, 16
+; VI-NEXT: s_lshr_b32 s38, s5, 8
+; VI-NEXT: s_lshr_b32 s39, s4, 16
+; VI-NEXT: s_lshr_b32 s37, s4, 8
+; VI-NEXT: s_lshr_b32 s36, s29, 24
+; VI-NEXT: s_lshr_b32 s35, s29, 16
+; VI-NEXT: s_lshr_b32 s31, s29, 8
+; VI-NEXT: s_lshr_b32 s34, s28, 16
+; VI-NEXT: s_lshr_b32 s30, s28, 8
; VI-NEXT: s_lshr_b32 vcc_hi, s25, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 8
-; VI-NEXT: s_lshr_b32 s34, s24, 16
-; VI-NEXT: s_lshr_b32 s31, s24, 8
; VI-NEXT: s_lshr_b32 s89, s23, 24
; VI-NEXT: s_lshr_b32 s88, s23, 16
; VI-NEXT: s_lshr_b32 s79, s23, 8
@@ -88873,14 +88938,14 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: s_lshr_b32 s56, s17, 8
; VI-NEXT: s_lshr_b32 s60, s16, 16
; VI-NEXT: s_lshr_b32 s59, s16, 8
-; VI-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; VI-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; VI-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; VI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; VI-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; VI-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; VI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; VI-NEXT: s_mov_b32 s41, s51
+; VI-NEXT: s_mov_b32 s13, s52
+; VI-NEXT: s_mov_b32 s45, s46
+; VI-NEXT: s_mov_b32 s43, s47
+; VI-NEXT: s_mov_b32 s15, s50
+; VI-NEXT: s_mov_b32 s9, s54
+; VI-NEXT: s_mov_b32 s7, s55
+; VI-NEXT: s_mov_b32 s11, s53
; VI-NEXT: s_mov_b64 s[46:47], 0
; VI-NEXT: s_branch .LBB109_3
; VI-NEXT: .LBB109_2:
@@ -88909,34 +88974,34 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: ; implicit-def: $sgpr79
; VI-NEXT: ; implicit-def: $sgpr88
; VI-NEXT: ; implicit-def: $sgpr89
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr7
+; VI-NEXT: ; implicit-def: $sgpr9
; VI-NEXT: ; implicit-def: $sgpr14
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $vcc_hi
-; VI-NEXT: ; implicit-def: $sgpr30
-; VI-NEXT: ; implicit-def: $sgpr38
-; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr11
+; VI-NEXT: ; implicit-def: $sgpr13
+; VI-NEXT: ; implicit-def: $sgpr41
; VI-NEXT: ; implicit-def: $sgpr40
+; VI-NEXT: ; implicit-def: $sgpr15
+; VI-NEXT: ; implicit-def: $sgpr43
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr34
+; VI-NEXT: ; implicit-def: $sgpr42
+; VI-NEXT: ; implicit-def: $sgpr31
; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: ; implicit-def: $sgpr36
; VI-NEXT: ; implicit-def: $sgpr37
-; VI-NEXT: ; implicit-def: $sgpr51
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr42
+; VI-NEXT: ; implicit-def: $sgpr39
+; VI-NEXT: ; implicit-def: $sgpr44
+; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr49
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr44
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: .LBB109_3: ; %Flow
; VI-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; VI-NEXT: s_cselect_b32 s7, 1, 0
-; VI-NEXT: s_cmp_lg_u32 s7, 1
+; VI-NEXT: s_cselect_b32 s46, 1, 0
+; VI-NEXT: s_cmp_lg_u32 s46, 1
; VI-NEXT: s_cbranch_scc1 .LBB109_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_lshl_b32 s6, s17, 16
@@ -89288,26 +89353,26 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; VI-NEXT: s_branch .LBB109_6
; VI-NEXT: .LBB109_5:
-; VI-NEXT: v_mov_b32_e32 v1, s55
+; VI-NEXT: v_mov_b32_e32 v1, s49
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s54
-; VI-NEXT: v_mov_b32_e32 v11, s65
-; VI-NEXT: v_mov_b32_e32 v13, s64
+; VI-NEXT: v_mov_b32_e32 v1, s48
+; VI-NEXT: v_mov_b32_e32 v11, s39
+; VI-NEXT: v_mov_b32_e32 v13, s37
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v8, s53
-; VI-NEXT: v_mov_b32_e32 v23, s52
-; VI-NEXT: v_mov_b32_e32 v34, s51
-; VI-NEXT: v_mov_b32_e32 v15, s50
-; VI-NEXT: v_mov_b32_e32 v17, s49
-; VI-NEXT: v_mov_b32_e32 v20, s48
-; VI-NEXT: v_mov_b32_e32 v38, s39
-; VI-NEXT: v_mov_b32_e32 v39, s38
-; VI-NEXT: v_mov_b32_e32 v35, s37
-; VI-NEXT: v_mov_b32_e32 v36, s36
-; VI-NEXT: v_mov_b32_e32 v37, s35
-; VI-NEXT: v_mov_b32_e32 v51, s34
-; VI-NEXT: v_mov_b32_e32 v52, s31
-; VI-NEXT: v_mov_b32_e32 v48, s30
+; VI-NEXT: v_mov_b32_e32 v8, s38
+; VI-NEXT: v_mov_b32_e32 v23, s34
+; VI-NEXT: v_mov_b32_e32 v34, s30
+; VI-NEXT: v_mov_b32_e32 v15, s36
+; VI-NEXT: v_mov_b32_e32 v17, s35
+; VI-NEXT: v_mov_b32_e32 v20, s31
+; VI-NEXT: v_mov_b32_e32 v38, s41
+; VI-NEXT: v_mov_b32_e32 v39, s13
+; VI-NEXT: v_mov_b32_e32 v35, s45
+; VI-NEXT: v_mov_b32_e32 v36, s43
+; VI-NEXT: v_mov_b32_e32 v37, s15
+; VI-NEXT: v_mov_b32_e32 v51, s9
+; VI-NEXT: v_mov_b32_e32 v52, s7
+; VI-NEXT: v_mov_b32_e32 v48, s11
; VI-NEXT: v_mov_b32_e32 v49, vcc_hi
; VI-NEXT: v_mov_b32_e32 v50, vcc_lo
; VI-NEXT: v_mov_b32_e32 v40, s91
@@ -89434,10 +89499,8 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v1, v24, v8, s4
-; VI-NEXT: v_readlane_b32 s30, v63, 16
-; VI-NEXT: v_readlane_b32 s31, v63, 17
-; VI-NEXT: v_readlane_b32 s65, v63, 15
-; VI-NEXT: v_readlane_b32 s64, v63, 14
+; VI-NEXT: v_readlane_b32 s30, v63, 14
+; VI-NEXT: v_readlane_b32 s31, v63, 15
; VI-NEXT: v_readlane_b32 s55, v63, 13
; VI-NEXT: v_readlane_b32 s54, v63, 12
; VI-NEXT: v_readlane_b32 s53, v63, 11
@@ -89482,7 +89545,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
@@ -89509,64 +89572,70 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_writelane_b32 v63, s49, 7
; GFX9-NEXT: v_writelane_b32 v63, s50, 8
; GFX9-NEXT: v_writelane_b32 v63, s51, 9
-; GFX9-NEXT: v_writelane_b32 v63, s52, 10
-; GFX9-NEXT: v_writelane_b32 v63, s53, 11
-; GFX9-NEXT: v_writelane_b32 v63, s30, 12
-; GFX9-NEXT: v_writelane_b32 v63, s31, 13
+; GFX9-NEXT: v_writelane_b32 v63, s30, 10
+; GFX9-NEXT: v_writelane_b32 v63, s31, 11
; GFX9-NEXT: v_readfirstlane_b32 s4, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s4, v1
; GFX9-NEXT: s_cbranch_scc0 .LBB109_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
+; GFX9-NEXT: s_lshr_b32 s46, s25, 16
+; GFX9-NEXT: s_lshr_b32 s47, s24, 16
+; GFX9-NEXT: s_lshr_b32 s38, s23, 16
+; GFX9-NEXT: s_lshr_b32 s39, s22, 16
+; GFX9-NEXT: s_lshr_b32 s48, s21, 16
+; GFX9-NEXT: s_lshr_b32 s49, s20, 16
+; GFX9-NEXT: s_lshr_b32 s50, s19, 16
+; GFX9-NEXT: s_lshr_b32 s51, s18, 16
+; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
+; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
+; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
+; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
+; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; GFX9-NEXT: s_lshr_b32 s91, s5, 24
-; GFX9-NEXT: s_lshr_b32 s52, s5, 16
+; GFX9-NEXT: s_lshr_b32 s37, s5, 16
; GFX9-NEXT: s_lshr_b32 s93, s5, 8
-; GFX9-NEXT: s_lshr_b32 s53, s4, 16
+; GFX9-NEXT: s_lshr_b32 s36, s4, 16
; GFX9-NEXT: s_lshr_b32 s95, s4, 8
; GFX9-NEXT: s_lshr_b32 s88, s29, 24
-; GFX9-NEXT: s_lshr_b32 s50, s29, 16
+; GFX9-NEXT: s_lshr_b32 s35, s29, 16
; GFX9-NEXT: s_lshr_b32 s90, s29, 8
-; GFX9-NEXT: s_lshr_b32 s51, s28, 16
+; GFX9-NEXT: s_lshr_b32 s34, s28, 16
; GFX9-NEXT: s_lshr_b32 s94, s28, 8
; GFX9-NEXT: s_lshr_b32 s77, s27, 24
-; GFX9-NEXT: s_lshr_b32 s48, s27, 16
+; GFX9-NEXT: s_lshr_b32 s31, s27, 16
; GFX9-NEXT: s_lshr_b32 s79, s27, 8
-; GFX9-NEXT: s_lshr_b32 s49, s26, 16
+; GFX9-NEXT: s_lshr_b32 s30, s26, 16
; GFX9-NEXT: s_lshr_b32 s92, s26, 8
; GFX9-NEXT: s_lshr_b32 s74, s25, 24
-; GFX9-NEXT: s_lshr_b32 s38, s25, 16
; GFX9-NEXT: s_lshr_b32 s76, s25, 8
-; GFX9-NEXT: s_lshr_b32 s39, s24, 16
; GFX9-NEXT: s_lshr_b32 s89, s24, 8
; GFX9-NEXT: s_lshr_b32 s63, s23, 24
-; GFX9-NEXT: s_lshr_b32 s36, s23, 16
; GFX9-NEXT: s_lshr_b32 s73, s23, 8
-; GFX9-NEXT: s_lshr_b32 s37, s22, 16
; GFX9-NEXT: s_lshr_b32 s78, s22, 8
; GFX9-NEXT: s_lshr_b32 s60, s21, 24
-; GFX9-NEXT: s_lshr_b32 s34, s21, 16
; GFX9-NEXT: s_lshr_b32 s62, s21, 8
-; GFX9-NEXT: s_lshr_b32 s35, s20, 16
; GFX9-NEXT: s_lshr_b32 s75, s20, 8
; GFX9-NEXT: s_lshr_b32 s58, s19, 24
-; GFX9-NEXT: s_lshr_b32 s30, s19, 16
; GFX9-NEXT: s_lshr_b32 s59, s19, 8
-; GFX9-NEXT: s_lshr_b32 s31, s18, 16
; GFX9-NEXT: s_lshr_b32 s72, s18, 8
; GFX9-NEXT: s_lshr_b32 s56, s17, 24
; GFX9-NEXT: s_lshr_b32 vcc_lo, s17, 16
; GFX9-NEXT: s_lshr_b32 s57, s17, 8
; GFX9-NEXT: s_lshr_b32 vcc_hi, s16, 16
; GFX9-NEXT: s_lshr_b32 s61, s16, 8
-; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
-; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
-; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX9-NEXT: s_lshr_b64 s[14:15], s[24:25], 24
-; GFX9-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
-; GFX9-NEXT: s_lshr_b64 s[10:11], s[20:21], 24
-; GFX9-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
-; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
+; GFX9-NEXT: s_mov_b32 s43, s47
+; GFX9-NEXT: s_mov_b32 s45, s46
+; GFX9-NEXT: s_mov_b32 s15, s39
+; GFX9-NEXT: s_mov_b32 s41, s38
+; GFX9-NEXT: s_mov_b32 s11, s49
+; GFX9-NEXT: s_mov_b32 s13, s48
+; GFX9-NEXT: s_mov_b32 s7, s51
+; GFX9-NEXT: s_mov_b32 s9, s50
; GFX9-NEXT: s_mov_b64 s[46:47], 0
; GFX9-NEXT: s_branch .LBB109_3
; GFX9-NEXT: .LBB109_2:
@@ -89578,51 +89647,51 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr72
-; GFX9-NEXT: ; implicit-def: $sgpr31
+; GFX9-NEXT: ; implicit-def: $sgpr7
; GFX9-NEXT: ; implicit-def: $sgpr8
; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr9
; GFX9-NEXT: ; implicit-def: $sgpr58
; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr35
+; GFX9-NEXT: ; implicit-def: $sgpr11
; GFX9-NEXT: ; implicit-def: $sgpr10
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr34
+; GFX9-NEXT: ; implicit-def: $sgpr13
; GFX9-NEXT: ; implicit-def: $sgpr60
; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr15
; GFX9-NEXT: ; implicit-def: $sgpr12
; GFX9-NEXT: ; implicit-def: $sgpr73
-; GFX9-NEXT: ; implicit-def: $sgpr36
+; GFX9-NEXT: ; implicit-def: $sgpr41
; GFX9-NEXT: ; implicit-def: $sgpr63
; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr43
; GFX9-NEXT: ; implicit-def: $sgpr14
; GFX9-NEXT: ; implicit-def: $sgpr76
-; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr92
-; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $sgpr40
; GFX9-NEXT: ; implicit-def: $sgpr79
-; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr31
; GFX9-NEXT: ; implicit-def: $sgpr77
; GFX9-NEXT: ; implicit-def: $sgpr94
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr42
; GFX9-NEXT: ; implicit-def: $sgpr90
-; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr88
; GFX9-NEXT: ; implicit-def: $sgpr95
-; GFX9-NEXT: ; implicit-def: $sgpr53
+; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr44
; GFX9-NEXT: ; implicit-def: $sgpr93
-; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr37
; GFX9-NEXT: ; implicit-def: $sgpr91
; GFX9-NEXT: .LBB109_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[46:47], s[46:47], exec
-; GFX9-NEXT: s_cselect_b32 s7, 1, 0
-; GFX9-NEXT: s_cmp_lg_u32 s7, 1
+; GFX9-NEXT: s_cselect_b32 s46, 1, 0
+; GFX9-NEXT: s_cmp_lg_u32 s46, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB109_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000
@@ -89648,10 +89717,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v4, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
@@ -89665,10 +89734,11 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v3, v2, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_or_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89677,7 +89747,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89686,7 +89756,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v29
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
; GFX9-NEXT: v_or_b32_sdwa v11, v2, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
@@ -89717,7 +89787,8 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s21, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v2
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89725,11 +89796,12 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v15, v2, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v15, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
@@ -89865,10 +89937,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v55
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v23, v2, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v23, v2, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89877,7 +89949,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89885,10 +89957,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v2
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v40
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v43
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v26, v2, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v26, v2, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89897,7 +89969,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89905,10 +89977,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v45
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v25, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v25, v2, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89917,129 +89989,139 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
-; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v6, v6, v2
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
+; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v44
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_or_b32_sdwa v58, v2, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_or_b32_sdwa v57, v2, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
-; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v6, v6, v2
+; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
+; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc
; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v2
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v6, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v1
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v41
+; GFX9-NEXT: v_or_b32_sdwa v56, v1, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[56:57]
+; GFX9-NEXT: v_mov_b32_e32 v2, v5
; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[25:26]
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v47
; GFX9-NEXT: v_lshrrev_b64 v[6:7], 24, v[23:24]
-; GFX9-NEXT: v_or_b32_sdwa v57, v1, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[21:22]
-; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11]
-; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58]
; GFX9-NEXT: v_lshrrev_b64 v[8:9], 24, v[19:20]
; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[14:15]
+; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11]
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 24, v24
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v58
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v57
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v57
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v3
+; GFX9-NEXT: v_mov_b32_e32 v11, v30
+; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v10, v29
+; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v4, v28
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v3, v27
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v56
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
; GFX9-NEXT: s_branch .LBB109_6
; GFX9-NEXT: .LBB109_5:
-; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, vcc_lo
-; GFX9-NEXT: v_mov_b32_e32 v56, s4
-; GFX9-NEXT: v_mov_b32_e32 v47, s53
-; GFX9-NEXT: v_mov_b32_e32 v46, s5
-; GFX9-NEXT: v_mov_b32_e32 v44, s52
-; GFX9-NEXT: v_mov_b32_e32 v45, s28
-; GFX9-NEXT: v_mov_b32_e32 v43, s51
-; GFX9-NEXT: v_mov_b32_e32 v42, s29
-; GFX9-NEXT: v_mov_b32_e32 v40, s50
-; GFX9-NEXT: v_mov_b32_e32 v41, s26
-; GFX9-NEXT: v_mov_b32_e32 v55, s49
+; GFX9-NEXT: v_mov_b32_e32 v1, s9
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s16
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: v_mov_b32_e32 v41, s36
+; GFX9-NEXT: v_mov_b32_e32 v40, s5
+; GFX9-NEXT: v_mov_b32_e32 v2, s37
+; GFX9-NEXT: v_mov_b32_e32 v46, s28
+; GFX9-NEXT: v_mov_b32_e32 v45, s34
+; GFX9-NEXT: v_mov_b32_e32 v44, s29
+; GFX9-NEXT: v_mov_b32_e32 v43, s35
+; GFX9-NEXT: v_mov_b32_e32 v47, s26
+; GFX9-NEXT: v_mov_b32_e32 v55, s30
; GFX9-NEXT: v_mov_b32_e32 v54, s27
-; GFX9-NEXT: v_mov_b32_e32 v52, s48
+; GFX9-NEXT: v_mov_b32_e32 v52, s31
; GFX9-NEXT: v_mov_b32_e32 v53, s24
-; GFX9-NEXT: v_mov_b32_e32 v51, s39
+; GFX9-NEXT: v_mov_b32_e32 v51, s43
; GFX9-NEXT: v_mov_b32_e32 v49, s25
-; GFX9-NEXT: v_mov_b32_e32 v39, s38
+; GFX9-NEXT: v_mov_b32_e32 v39, s45
; GFX9-NEXT: v_mov_b32_e32 v48, s22
-; GFX9-NEXT: v_mov_b32_e32 v38, s37
+; GFX9-NEXT: v_mov_b32_e32 v38, s15
; GFX9-NEXT: v_mov_b32_e32 v34, s23
-; GFX9-NEXT: v_mov_b32_e32 v33, s36
+; GFX9-NEXT: v_mov_b32_e32 v33, s41
; GFX9-NEXT: v_mov_b32_e32 v50, s20
-; GFX9-NEXT: v_mov_b32_e32 v36, s35
-; GFX9-NEXT: v_mov_b32_e32 v28, s21
-; GFX9-NEXT: v_mov_b32_e32 v27, s34
+; GFX9-NEXT: v_mov_b32_e32 v36, s11
+; GFX9-NEXT: v_mov_b32_e32 v30, s21
+; GFX9-NEXT: v_mov_b32_e32 v29, s13
; GFX9-NEXT: v_mov_b32_e32 v35, s18
-; GFX9-NEXT: v_mov_b32_e32 v37, s31
+; GFX9-NEXT: v_mov_b32_e32 v37, s7
; GFX9-NEXT: v_mov_b32_e32 v32, s19
-; GFX9-NEXT: v_mov_b32_e32 v29, s30
-; GFX9-NEXT: v_mov_b32_e32 v30, s16
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v31, vcc_hi
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v13, s95
-; GFX9-NEXT: v_mov_b32_e32 v2, s91
-; GFX9-NEXT: v_mov_b32_e32 v9, s93
-; GFX9-NEXT: v_mov_b32_e32 v58, s94
-; GFX9-NEXT: v_mov_b32_e32 v18, s88
-; GFX9-NEXT: v_mov_b32_e32 v57, s90
+; GFX9-NEXT: v_mov_b32_e32 v28, s17
+; GFX9-NEXT: v_mov_b32_e32 v27, vcc_lo
+; GFX9-NEXT: v_mov_b32_e32 v18, s95
+; GFX9-NEXT: v_mov_b32_e32 v9, s91
+; GFX9-NEXT: v_mov_b32_e32 v13, s93
+; GFX9-NEXT: v_mov_b32_e32 v10, s94
+; GFX9-NEXT: v_mov_b32_e32 v3, s88
+; GFX9-NEXT: v_mov_b32_e32 v4, s90
; GFX9-NEXT: v_mov_b32_e32 v23, s92
-; GFX9-NEXT: v_mov_b32_e32 v59, s77
+; GFX9-NEXT: v_mov_b32_e32 v11, s77
; GFX9-NEXT: v_mov_b32_e32 v24, s79
; GFX9-NEXT: v_mov_b32_e32 v21, s89
-; GFX9-NEXT: v_mov_b32_e32 v60, s74
+; GFX9-NEXT: v_mov_b32_e32 v56, s74
; GFX9-NEXT: v_mov_b32_e32 v22, s76
; GFX9-NEXT: v_mov_b32_e32 v19, s78
-; GFX9-NEXT: v_mov_b32_e32 v61, s63
+; GFX9-NEXT: v_mov_b32_e32 v60, s63
; GFX9-NEXT: v_mov_b32_e32 v20, s73
; GFX9-NEXT: v_mov_b32_e32 v14, s75
-; GFX9-NEXT: v_mov_b32_e32 v62, s60
+; GFX9-NEXT: v_mov_b32_e32 v25, s60
; GFX9-NEXT: v_mov_b32_e32 v15, s62
-; GFX9-NEXT: v_mov_b32_e32 v10, s72
-; GFX9-NEXT: v_mov_b32_e32 v25, s58
-; GFX9-NEXT: v_mov_b32_e32 v11, s59
-; GFX9-NEXT: v_mov_b32_e32 v3, s61
-; GFX9-NEXT: v_mov_b32_e32 v26, s56
-; GFX9-NEXT: v_mov_b32_e32 v4, s57
+; GFX9-NEXT: v_mov_b32_e32 v59, s72
+; GFX9-NEXT: v_mov_b32_e32 v57, s58
+; GFX9-NEXT: v_mov_b32_e32 v58, s59
+; GFX9-NEXT: v_mov_b32_e32 v26, s61
+; GFX9-NEXT: v_mov_b32_e32 v61, s56
+; GFX9-NEXT: v_mov_b32_e32 v62, s57
; GFX9-NEXT: v_mov_b32_e32 v1, s44
; GFX9-NEXT: v_mov_b32_e32 v5, s42
; GFX9-NEXT: v_mov_b32_e32 v6, s40
@@ -90051,20 +90133,35 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: .LBB109_6: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
; GFX9-NEXT: v_perm_b32 v17, v31, v17, s4
-; GFX9-NEXT: v_perm_b32 v3, v30, v3, s4
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v17
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v16, v37, v16, s4
-; GFX9-NEXT: v_perm_b32 v1, v47, v1, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: v_perm_b32 v12, v36, v12, s4
+; GFX9-NEXT: v_perm_b32 v14, v50, v14, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_or_b32_e32 v12, v14, v12
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v14, v29, v25, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: v_perm_b32 v8, v38, v8, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_perm_b32 v7, v51, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: v_perm_b32 v6, v55, v6, s4
+; GFX9-NEXT: v_perm_b32 v3, v43, v3, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX9-NEXT: v_perm_b32 v4, v44, v4, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_or_b32_e32 v3, v4, v3
+; GFX9-NEXT: v_perm_b32 v1, v41, v1, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4
+; GFX9-NEXT: v_perm_b32 v5, v45, v5, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v9, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_readlane_b32 s30, v63, 12
-; GFX9-NEXT: v_readlane_b32 s31, v63, 13
-; GFX9-NEXT: v_readlane_b32 s53, v63, 11
-; GFX9-NEXT: v_readlane_b32 s52, v63, 10
+; GFX9-NEXT: v_readlane_b32 s30, v63, 10
+; GFX9-NEXT: v_readlane_b32 s31, v63, 11
; GFX9-NEXT: v_readlane_b32 s51, v63, 9
; GFX9-NEXT: v_readlane_b32 s50, v63, 8
; GFX9-NEXT: v_readlane_b32 s49, v63, 7
@@ -90076,78 +90173,62 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_readlane_b32 s35, v63, 1
; GFX9-NEXT: v_readlane_b32 s34, v63, 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
-; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v4, v4, v26, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v3, v35, v10, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v16
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v29, v25, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v3, v32, v11, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v36, v12, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v3, v50, v14, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v27, v62, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v3, v28, v15, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v38, v8, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v3, v48, v19, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v33, v61, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v3, v34, v20, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v51, v7, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_perm_b32 v3, v53, v21, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v39, v60, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: v_perm_b32 v3, v49, v22, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v55, v6, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_perm_b32 v3, v41, v23, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v52, v59, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: v_perm_b32 v3, v54, v24, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v43, v5, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_perm_b32 v3, v45, v58, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v40, v18, s4
-; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v3, v42, v57, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX9-NEXT: v_perm_b32 v26, v31, v26, s4
+; GFX9-NEXT: v_or_b32_e32 v17, v26, v17
+; GFX9-NEXT: v_perm_b32 v26, v27, v61, s4
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen
+; GFX9-NEXT: v_perm_b32 v17, v28, v62, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX9-NEXT: v_or_b32_e32 v17, v17, v26
+; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_perm_b32 v17, v35, v59, s4
+; GFX9-NEXT: v_or_b32_e32 v16, v17, v16
+; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v16, v32, v58, s4
+; GFX9-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:16
+; GFX9-NEXT: v_perm_b32 v12, v30, v15, s4
+; GFX9-NEXT: v_or_b32_e32 v12, v12, v14
+; GFX9-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_perm_b32 v12, v48, v19, s4
+; GFX9-NEXT: v_or_b32_e32 v8, v12, v8
+; GFX9-NEXT: v_perm_b32 v12, v33, v60, s4
+; GFX9-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: v_perm_b32 v8, v34, v20, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX9-NEXT: v_or_b32_e32 v8, v8, v12
+; GFX9-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_perm_b32 v8, v53, v21, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX9-NEXT: v_perm_b32 v8, v39, v56, s4
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: v_perm_b32 v7, v49, v22, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_perm_b32 v7, v47, v23, s4
+; GFX9-NEXT: v_or_b32_e32 v6, v7, v6
+; GFX9-NEXT: v_perm_b32 v7, v52, v11, s4
+; GFX9-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: v_perm_b32 v6, v54, v24, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v3, v56, v13, s4
+; GFX9-NEXT: v_perm_b32 v3, v42, v18, s4
+; GFX9-NEXT: v_or_b32_e32 v6, v6, v7
; GFX9-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX9-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_perm_b32 v6, v46, v10, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_perm_b32 v1, v46, v9, s4
+; GFX9-NEXT: v_perm_b32 v1, v40, v13, s4
+; GFX9-NEXT: v_or_b32_e32 v5, v6, v5
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; GFX9-NEXT: s_waitcnt vmcnt(12)
+; GFX9-NEXT: v_perm_b32 v17, v17, v57, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX9-NEXT: v_or_b32_e32 v16, v16, v17
+; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -90164,7 +90245,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
@@ -90188,30 +90269,38 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: s_mov_b32 s42, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s27, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s26, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s26, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s25, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s24, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s24, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s23, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s22, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s22, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s21, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s20, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s20, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s19, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s19, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s18, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s18, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s17, 16
@@ -90228,14 +90317,14 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s0, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s0, 8
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_mov_b32 s41, s31
+; GFX11-TRUE16-NEXT: s_mov_b32 s15, s35
+; GFX11-TRUE16-NEXT: s_mov_b32 s29, s34
+; GFX11-TRUE16-NEXT: s_mov_b32 s11, s37
+; GFX11-TRUE16-NEXT: s_mov_b32 s13, s36
+; GFX11-TRUE16-NEXT: s_mov_b32 s7, s39
+; GFX11-TRUE16-NEXT: s_mov_b32 s9, s38
+; GFX11-TRUE16-NEXT: s_mov_b32 s5, s48
; GFX11-TRUE16-NEXT: s_branch .LBB109_3
; GFX11-TRUE16-NEXT: .LBB109_2:
; GFX11-TRUE16-NEXT: s_mov_b32 s42, -1
@@ -90258,40 +90347,40 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr29
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: .LBB109_3: ; %Flow
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-TRUE16-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-TRUE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-TRUE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s1, 16
@@ -90648,14 +90737,14 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: s_branch .LBB109_6
; GFX11-TRUE16-NEXT: .LBB109_5:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s26 :: v_dual_mov_b32 v51, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s48 :: v_dual_mov_b32 v53, s39
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v50, s38
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v53, s30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v50, s15
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v48, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s37 :: v_dual_mov_b32 v38, s36
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v37, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v36, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v33, s31
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s18 :: v_dual_mov_b32 v32, s30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v38, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v37, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v36, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v33, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s18 :: v_dual_mov_b32 v32, s5
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, vcc_hi
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s16 :: v_dual_mov_b32 v27, vcc_lo
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v22, s2
@@ -90785,30 +90874,38 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: s_mov_b32 s42, 0
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_2
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s27, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s27, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s26, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s26, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s25, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s24, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s24, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s23, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s22, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s22, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s21, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s21, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s21, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s20, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s19, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s19, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s18, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s18, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s17, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 16
@@ -90825,14 +90922,14 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s0, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 8
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
-; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_mov_b32 s41, s31
+; GFX11-FAKE16-NEXT: s_mov_b32 s15, s35
+; GFX11-FAKE16-NEXT: s_mov_b32 s29, s34
+; GFX11-FAKE16-NEXT: s_mov_b32 s11, s37
+; GFX11-FAKE16-NEXT: s_mov_b32 s13, s36
+; GFX11-FAKE16-NEXT: s_mov_b32 s7, s39
+; GFX11-FAKE16-NEXT: s_mov_b32 s9, s38
+; GFX11-FAKE16-NEXT: s_mov_b32 s5, s48
; GFX11-FAKE16-NEXT: s_branch .LBB109_3
; GFX11-FAKE16-NEXT: .LBB109_2:
; GFX11-FAKE16-NEXT: s_mov_b32 s42, -1
@@ -90855,40 +90952,40 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: .LBB109_3: ; %Flow
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: s_and_b32 s5, s42, exec_lo
-; GFX11-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
-; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s5, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s42, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s42, 1, 0
+; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 1
; GFX11-FAKE16-NEXT: s_cbranch_scc1 .LBB109_5
; GFX11-FAKE16-NEXT: ; %bb.4: ; %cmp.true
; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s1, 16
@@ -91250,14 +91347,14 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: s_branch .LBB109_6
; GFX11-FAKE16-NEXT: .LBB109_5:
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s26 :: v_dual_mov_b32 v49, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s48 :: v_dual_mov_b32 v51, s39
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v48, s38
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v39, s37
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s22 :: v_dual_mov_b32 v38, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s41 :: v_dual_mov_b32 v51, s30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v48, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v39, s29
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s22 :: v_dual_mov_b32 v38, s11
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s23 :: v_dual_mov_b32 v34, s20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s35 :: v_dual_mov_b32 v28, s21
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s34 :: v_dual_mov_b32 v30, s18
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s31 :: v_dual_mov_b32 v32, s30
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s13 :: v_dual_mov_b32 v28, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s7 :: v_dual_mov_b32 v30, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s9 :: v_dual_mov_b32 v32, s5
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s19 :: v_dual_mov_b32 v25, s16
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, vcc_hi :: v_dual_mov_b32 v27, vcc_lo
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s17 :: v_dual_mov_b32 v20, s2
@@ -93918,11 +94015,8 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a,
; SI-NEXT: v_writelane_b32 v43, s86, 28
; SI-NEXT: v_writelane_b32 v43, s87, 29
; SI-NEXT: v_writelane_b32 v43, s96, 30
-; SI-NEXT: v_writelane_b32 v43, s97, 31
-; SI-NEXT: v_writelane_b32 v43, s98, 32
-; SI-NEXT: v_writelane_b32 v43, s99, 33
-; SI-NEXT: v_writelane_b32 v43, s30, 34
-; SI-NEXT: v_writelane_b32 v43, s31, 35
+; SI-NEXT: v_writelane_b32 v43, s30, 31
+; SI-NEXT: v_writelane_b32 v43, s31, 32
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:72
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68
@@ -93947,644 +94041,576 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32
; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane
-; SI-NEXT: s_mov_b32 s6, s19
-; SI-NEXT: v_writelane_b32 v44, s18, 0
-; SI-NEXT: v_readfirstlane_b32 s34, v30
-; SI-NEXT: v_readfirstlane_b32 s72, v29
-; SI-NEXT: v_readfirstlane_b32 s73, v28
-; SI-NEXT: v_readfirstlane_b32 s76, v27
-; SI-NEXT: v_readfirstlane_b32 s78, v26
+; SI-NEXT: v_readfirstlane_b32 s9, v1
+; SI-NEXT: v_readfirstlane_b32 s6, v5
+; SI-NEXT: v_readfirstlane_b32 s7, v4
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_readfirstlane_b32 s89, v30
+; SI-NEXT: v_readfirstlane_b32 s63, v29
+; SI-NEXT: v_readfirstlane_b32 s72, v28
+; SI-NEXT: v_readfirstlane_b32 s75, v27
+; SI-NEXT: v_readfirstlane_b32 s77, v26
; SI-NEXT: v_readfirstlane_b32 s59, v25
; SI-NEXT: v_readfirstlane_b32 s60, v24
-; SI-NEXT: v_readfirstlane_b32 s63, v23
-; SI-NEXT: v_readfirstlane_b32 s75, v22
+; SI-NEXT: v_readfirstlane_b32 s62, v23
+; SI-NEXT: v_readfirstlane_b32 s73, v22
; SI-NEXT: v_readfirstlane_b32 s47, v21
; SI-NEXT: v_readfirstlane_b32 s56, v20
-; SI-NEXT: v_readfirstlane_b32 s62, v19
+; SI-NEXT: v_readfirstlane_b32 s58, v19
; SI-NEXT: v_readfirstlane_b32 s61, v18
; SI-NEXT: v_readfirstlane_b32 s43, v17
; SI-NEXT: v_readfirstlane_b32 s44, v16
-; SI-NEXT: v_readfirstlane_b32 s58, v15
+; SI-NEXT: v_readfirstlane_b32 s46, v15
; SI-NEXT: v_readfirstlane_b32 s57, v14
; SI-NEXT: v_readfirstlane_b32 s15, v13
; SI-NEXT: v_readfirstlane_b32 s40, v12
-; SI-NEXT: v_readfirstlane_b32 s46, v11
+; SI-NEXT: v_readfirstlane_b32 s42, v11
; SI-NEXT: v_readfirstlane_b32 s45, v10
-; SI-NEXT: v_readfirstlane_b32 s11, v9
-; SI-NEXT: v_readfirstlane_b32 s12, v8
-; SI-NEXT: v_readfirstlane_b32 s42, v7
+; SI-NEXT: v_readfirstlane_b32 s5, v9
+; SI-NEXT: v_readfirstlane_b32 s87, v8
+; SI-NEXT: v_readfirstlane_b32 s14, v7
; SI-NEXT: v_readfirstlane_b32 s41, v6
-; SI-NEXT: v_readfirstlane_b32 s8, v5
-; SI-NEXT: v_readfirstlane_b32 s9, v4
-; SI-NEXT: v_readfirstlane_b32 s14, v3
; SI-NEXT: v_readfirstlane_b32 s13, v2
-; SI-NEXT: v_readfirstlane_b32 s10, v1
-; SI-NEXT: v_readfirstlane_b32 s19, v0
-; SI-NEXT: v_writelane_b32 v44, s6, 1
-; SI-NEXT: v_writelane_b32 v44, s63, 2
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; SI-NEXT: s_and_b64 s[4:5], vcc, exec
-; SI-NEXT: v_readfirstlane_b32 s84, v32
-; SI-NEXT: v_readfirstlane_b32 s83, v33
-; SI-NEXT: v_readfirstlane_b32 s96, v34
-; SI-NEXT: v_readfirstlane_b32 s97, v35
-; SI-NEXT: v_readfirstlane_b32 s80, v36
+; SI-NEXT: s_and_b64 s[10:11], vcc, exec
+; SI-NEXT: v_readfirstlane_b32 s10, v0
+; SI-NEXT: v_writelane_b32 v44, s10, 0
+; SI-NEXT: v_writelane_b32 v44, s9, 1
+; SI-NEXT: v_writelane_b32 v44, s6, 2
+; SI-NEXT: v_writelane_b32 v44, s7, 3
+; SI-NEXT: v_readfirstlane_b32 s55, v32
+; SI-NEXT: v_readfirstlane_b32 s54, v33
+; SI-NEXT: v_readfirstlane_b32 s64, v34
+; SI-NEXT: v_readfirstlane_b32 s65, v35
+; SI-NEXT: v_readfirstlane_b32 s51, v36
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_readfirstlane_b32 s71, v37
+; SI-NEXT: v_readfirstlane_b32 s50, v37
; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_readfirstlane_b32 s82, v38
+; SI-NEXT: v_readfirstlane_b32 s52, v38
; SI-NEXT: s_waitcnt vmcnt(11)
-; SI-NEXT: v_readfirstlane_b32 s87, v39
+; SI-NEXT: v_readfirstlane_b32 s53, v39
; SI-NEXT: s_waitcnt vmcnt(10)
-; SI-NEXT: v_readfirstlane_b32 s66, v48
+; SI-NEXT: v_readfirstlane_b32 s39, v48
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_readfirstlane_b32 s65, v49
+; SI-NEXT: v_readfirstlane_b32 s38, v49
; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_readfirstlane_b32 s68, v50
+; SI-NEXT: v_readfirstlane_b32 s48, v50
; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_readfirstlane_b32 s70, v51
+; SI-NEXT: v_readfirstlane_b32 s49, v51
; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_readfirstlane_b32 s36, v52
+; SI-NEXT: v_readfirstlane_b32 s35, v52
; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_readfirstlane_b32 s50, v53
+; SI-NEXT: v_readfirstlane_b32 s34, v53
; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_readfirstlane_b32 s54, v54
+; SI-NEXT: v_readfirstlane_b32 s36, v54
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s64, v55
+; SI-NEXT: v_readfirstlane_b32 s37, v55
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s37, v40
+; SI-NEXT: v_readfirstlane_b32 s30, v40
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_readfirstlane_b32 s39, v41
+; SI-NEXT: v_readfirstlane_b32 s4, v41
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s49, v42
+; SI-NEXT: v_readfirstlane_b32 s31, v42
+; SI-NEXT: v_writelane_b32 v44, s8, 4
+; SI-NEXT: v_writelane_b32 v44, s5, 5
; SI-NEXT: s_cbranch_scc0 .LBB111_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s17, 24
-; SI-NEXT: s_or_b32 s98, s5, s4
-; SI-NEXT: v_readlane_b32 s4, v44, 0
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s6, 24
-; SI-NEXT: s_or_b32 s85, s5, s4
-; SI-NEXT: s_and_b32 s4, s20, 0xff
-; SI-NEXT: s_lshl_b32 s5, s21, 8
-; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s22, 0xff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s23, 24
-; SI-NEXT: s_or_b32 s88, s6, s5
-; SI-NEXT: s_and_b32 s5, s24, 0xff
+; SI-NEXT: s_and_b32 s11, s16, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s12, s17, 24
+; SI-NEXT: s_or_b32 s74, s12, s11
+; SI-NEXT: s_and_b32 s11, s18, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s12, s19, 24
+; SI-NEXT: s_or_b32 s76, s12, s11
+; SI-NEXT: s_and_b32 s11, s20, 0xff
+; SI-NEXT: s_lshl_b32 s12, s21, 8
+; SI-NEXT: s_or_b32 s12, s11, s12
+; SI-NEXT: s_and_b32 s11, s22, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s78, s23, 24
+; SI-NEXT: s_or_b32 s79, s78, s11
+; SI-NEXT: s_and_b32 s11, s24, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s78, s25, 24
+; SI-NEXT: s_and_b32 s10, s10, 0xff
+; SI-NEXT: s_or_b32 s78, s78, s11
+; SI-NEXT: s_and_b32 s11, s26, 0xff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_lshl_b32 s9, s9, 24
+; SI-NEXT: s_and_b32 s7, s7, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s88, s27, 24
+; SI-NEXT: s_or_b32 s91, s9, s10
+; SI-NEXT: s_and_b32 s9, s13, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_or_b32 s88, s88, s11
+; SI-NEXT: s_and_b32 s11, s28, 0xff
+; SI-NEXT: s_lshl_b32 s90, s29, 8
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: s_or_b32 s92, s6, s7
+; SI-NEXT: s_and_b32 s6, s41, 0xff
+; SI-NEXT: s_lshl_b32 s7, s14, 8
+; SI-NEXT: s_or_b32 s67, s11, s90
+; SI-NEXT: s_or_b32 s90, s8, s9
+; SI-NEXT: s_or_b32 s8, s6, s7
+; SI-NEXT: s_and_b32 s6, s87, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s5, 24
+; SI-NEXT: s_or_b32 s94, s5, s6
+; SI-NEXT: s_and_b32 s5, s45, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s25, 24
-; SI-NEXT: s_or_b32 s79, s6, s5
-; SI-NEXT: s_and_b32 s5, s26, 0xff
+; SI-NEXT: s_lshl_b32 s6, s42, 24
+; SI-NEXT: s_or_b32 s93, s6, s5
+; SI-NEXT: s_and_b32 s5, s40, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s27, 24
-; SI-NEXT: s_or_b32 s90, s6, s5
-; SI-NEXT: s_and_b32 s5, s28, 0xff
-; SI-NEXT: s_lshl_b32 s6, s29, 8
+; SI-NEXT: s_lshl_b32 s6, s15, 24
+; SI-NEXT: s_or_b32 s95, s6, s5
+; SI-NEXT: s_and_b32 s5, s57, 0xff
+; SI-NEXT: s_lshl_b32 s6, s46, 8
; SI-NEXT: s_or_b32 s5, s5, s6
-; SI-NEXT: s_and_b32 s6, s19, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s10, 24
-; SI-NEXT: s_or_b32 s92, s7, s6
-; SI-NEXT: s_and_b32 s6, s13, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s14, 24
-; SI-NEXT: s_or_b32 s91, s7, s6
-; SI-NEXT: s_and_b32 s6, s9, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s8, 24
-; SI-NEXT: s_or_b32 s93, s7, s6
-; SI-NEXT: s_and_b32 s6, s41, 0xff
-; SI-NEXT: s_lshl_b32 s7, s42, 8
-; SI-NEXT: s_or_b32 s69, s6, s7
-; SI-NEXT: s_and_b32 s6, s12, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s11, 24
-; SI-NEXT: s_or_b32 s95, s7, s6
-; SI-NEXT: s_and_b32 s6, s45, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s46, 24
-; SI-NEXT: s_or_b32 s94, s7, s6
-; SI-NEXT: s_and_b32 s6, s40, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s15, 24
-; SI-NEXT: s_or_b32 vcc_lo, s7, s6
-; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: s_lshl_b32 s7, s58, 8
-; SI-NEXT: s_or_b32 s81, s6, s7
; SI-NEXT: s_and_b32 s6, s44, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s43, 24
-; SI-NEXT: s_or_b32 s30, s7, s6
+; SI-NEXT: s_or_b32 vcc_hi, s7, s6
; SI-NEXT: s_and_b32 s6, s61, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s62, 24
-; SI-NEXT: s_or_b32 vcc_hi, s7, s6
+; SI-NEXT: s_lshl_b32 s7, s58, 24
+; SI-NEXT: s_or_b32 vcc_lo, s7, s6
; SI-NEXT: s_and_b32 s6, s56, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s47, 24
-; SI-NEXT: s_or_b32 s31, s7, s6
-; SI-NEXT: s_and_b32 s6, s75, 0xff
-; SI-NEXT: s_lshl_b32 s7, s63, 8
-; SI-NEXT: s_or_b32 s86, s6, s7
+; SI-NEXT: s_or_b32 s86, s7, s6
+; SI-NEXT: s_and_b32 s6, s73, 0xff
+; SI-NEXT: s_lshl_b32 s7, s62, 8
+; SI-NEXT: s_or_b32 s10, s6, s7
; SI-NEXT: s_and_b32 s6, s60, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s59, 24
-; SI-NEXT: s_or_b32 s35, s7, s6
-; SI-NEXT: s_and_b32 s6, s78, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s76, 24
-; SI-NEXT: s_or_b32 s99, s7, s6
-; SI-NEXT: s_and_b32 s6, s73, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s72, 24
-; SI-NEXT: s_or_b32 s38, s7, s6
-; SI-NEXT: s_and_b32 s6, s34, 0xff
-; SI-NEXT: s_lshl_b32 s7, s49, 8
-; SI-NEXT: s_or_b32 s18, s6, s7
-; SI-NEXT: s_and_b32 s6, s39, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s37, 24
-; SI-NEXT: s_or_b32 s48, s7, s6
-; SI-NEXT: s_and_b32 s6, s64, 0xff
+; SI-NEXT: s_or_b32 s85, s7, s6
+; SI-NEXT: s_and_b32 s6, s77, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s54, 24
-; SI-NEXT: s_or_b32 s89, s7, s6
-; SI-NEXT: s_and_b32 s6, s50, 0xff
+; SI-NEXT: s_lshl_b32 s7, s75, 24
+; SI-NEXT: s_or_b32 s83, s7, s6
+; SI-NEXT: s_and_b32 s6, s72, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s7, s63, 24
+; SI-NEXT: s_or_b32 s84, s7, s6
+; SI-NEXT: s_and_b32 s6, s89, 0xff
+; SI-NEXT: s_lshl_b32 s7, s31, 8
+; SI-NEXT: s_or_b32 s81, s6, s7
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_lshl_b32 s7, s30, 24
+; SI-NEXT: s_or_b32 s82, s7, s4
+; SI-NEXT: s_and_b32 s4, s37, 0xff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_lshl_b32 s7, s36, 24
-; SI-NEXT: s_or_b32 s51, s7, s6
-; SI-NEXT: s_and_b32 s6, s70, 0xff
-; SI-NEXT: s_lshl_b32 s7, s68, 8
-; SI-NEXT: s_mov_b32 s74, s60
-; SI-NEXT: s_mov_b32 s60, s57
-; SI-NEXT: s_mov_b32 s57, s58
-; SI-NEXT: s_mov_b32 s58, s44
-; SI-NEXT: s_mov_b32 s44, s41
-; SI-NEXT: s_mov_b32 s41, s42
-; SI-NEXT: s_mov_b32 s42, s12
-; SI-NEXT: s_mov_b32 s12, s9
-; SI-NEXT: s_mov_b32 s9, s10
-; SI-NEXT: s_mov_b32 s10, s28
-; SI-NEXT: s_mov_b32 s28, s24
-; SI-NEXT: s_mov_b32 s24, s26
-; SI-NEXT: s_mov_b32 s26, s23
-; SI-NEXT: s_mov_b32 s23, s17
-; SI-NEXT: s_or_b32 s17, s6, s7
-; SI-NEXT: s_and_b32 s6, s65, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s66, 24
-; SI-NEXT: s_or_b32 s53, s7, s6
-; SI-NEXT: s_and_b32 s6, s87, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s82, 24
-; SI-NEXT: s_or_b32 s52, s7, s6
-; SI-NEXT: s_and_b32 s6, s71, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s80, 24
-; SI-NEXT: s_or_b32 s55, s7, s6
-; SI-NEXT: s_and_b32 s6, s97, 0xff
-; SI-NEXT: s_lshl_b32 s7, s96, 8
-; SI-NEXT: s_mov_b32 s63, s59
-; SI-NEXT: s_mov_b32 s59, s47
-; SI-NEXT: s_mov_b32 s47, s43
-; SI-NEXT: s_mov_b32 s43, s15
-; SI-NEXT: s_mov_b32 s15, s11
-; SI-NEXT: s_mov_b32 s11, s19
-; SI-NEXT: s_mov_b32 s19, s29
-; SI-NEXT: s_mov_b32 s29, s27
-; SI-NEXT: s_mov_b32 s27, s21
-; SI-NEXT: s_mov_b32 s21, s16
-; SI-NEXT: s_or_b32 s16, s6, s7
-; SI-NEXT: s_and_b32 s6, s83, 0xff
-; SI-NEXT: s_mov_b32 s77, s76
-; SI-NEXT: s_mov_b32 s76, s75
-; SI-NEXT: s_mov_b32 s75, s73
-; SI-NEXT: s_mov_b32 s73, s72
-; SI-NEXT: s_mov_b32 s72, s61
-; SI-NEXT: s_mov_b32 s61, s62
-; SI-NEXT: s_mov_b32 s62, s56
-; SI-NEXT: s_mov_b32 s56, s45
-; SI-NEXT: s_mov_b32 s45, s46
-; SI-NEXT: s_mov_b32 s46, s40
-; SI-NEXT: s_mov_b32 s40, s13
-; SI-NEXT: s_mov_b32 s13, s14
-; SI-NEXT: s_mov_b32 s14, s8
-; SI-NEXT: s_mov_b32 s8, s25
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s84, 24
-; SI-NEXT: s_or_b32 s67, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s4, 16
-; SI-NEXT: s_lshl_b32 s6, s5, 16
-; SI-NEXT: s_lshl_b32 s69, s69, 16
+; SI-NEXT: s_or_b32 s71, s7, s4
+; SI-NEXT: s_and_b32 s4, s34, 0xff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_lshl_b32 s7, s35, 24
+; SI-NEXT: s_or_b32 s80, s7, s4
+; SI-NEXT: s_and_b32 s4, s49, 0xff
+; SI-NEXT: s_lshl_b32 s7, s48, 8
+; SI-NEXT: s_or_b32 s4, s4, s7
+; SI-NEXT: s_and_b32 s7, s38, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s39, 24
+; SI-NEXT: s_or_b32 s68, s9, s7
+; SI-NEXT: s_and_b32 s7, s53, 0xff
+; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s9, s52, 24
+; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_and_b32 s9, s50, 0xff
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s11, s51, 24
+; SI-NEXT: s_or_b32 s66, s11, s9
+; SI-NEXT: s_and_b32 s9, s65, 0xff
+; SI-NEXT: s_lshl_b32 s11, s64, 8
+; SI-NEXT: s_or_b32 s96, s9, s11
+; SI-NEXT: s_and_b32 s9, s54, 0xff
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_lshl_b32 s11, s55, 24
+; SI-NEXT: s_or_b32 s11, s11, s9
+; SI-NEXT: s_lshl_b32 s69, s12, 16
+; SI-NEXT: s_lshl_b32 s70, s67, 16
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_lshl_b32 s9, s5, 16
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s81, s81, 16
-; SI-NEXT: s_lshl_b32 s86, s86, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: s_mov_b32 s25, s8
-; SI-NEXT: s_mov_b32 s8, s14
-; SI-NEXT: s_mov_b32 s14, s13
-; SI-NEXT: s_mov_b32 s13, s40
-; SI-NEXT: s_mov_b32 s40, s46
-; SI-NEXT: s_mov_b32 s46, s45
-; SI-NEXT: s_mov_b32 s45, s56
-; SI-NEXT: s_mov_b32 s56, s62
-; SI-NEXT: s_mov_b32 s62, s61
-; SI-NEXT: s_mov_b32 s61, s72
-; SI-NEXT: s_mov_b32 s72, s73
-; SI-NEXT: s_mov_b32 s73, s75
-; SI-NEXT: s_mov_b32 s75, s76
-; SI-NEXT: s_mov_b32 s76, s77
-; SI-NEXT: s_mov_b32 s77, s85
-; SI-NEXT: s_lshl_b32 s85, s17, 16
-; SI-NEXT: s_mov_b32 s17, s23
-; SI-NEXT: s_mov_b32 s23, s26
-; SI-NEXT: s_mov_b32 s26, s24
-; SI-NEXT: s_mov_b32 s24, s28
-; SI-NEXT: s_mov_b32 s28, s10
-; SI-NEXT: s_mov_b32 s10, s9
-; SI-NEXT: s_mov_b32 s9, s12
-; SI-NEXT: s_mov_b32 s12, s42
-; SI-NEXT: s_mov_b32 s42, s41
-; SI-NEXT: s_mov_b32 s41, s44
-; SI-NEXT: s_mov_b32 s44, s58
-; SI-NEXT: s_mov_b32 s58, s57
-; SI-NEXT: s_mov_b32 s57, s60
-; SI-NEXT: s_mov_b32 s60, s74
-; SI-NEXT: s_mov_b32 s74, s98
-; SI-NEXT: s_lshl_b32 s98, s16, 16
-; SI-NEXT: s_mov_b32 s16, s21
-; SI-NEXT: s_mov_b32 s21, s27
-; SI-NEXT: s_mov_b32 s27, s29
-; SI-NEXT: s_mov_b32 s29, s19
-; SI-NEXT: s_mov_b32 s19, s11
-; SI-NEXT: s_mov_b32 s11, s15
-; SI-NEXT: s_mov_b32 s15, s43
-; SI-NEXT: s_mov_b32 s43, s47
-; SI-NEXT: s_mov_b32 s47, s59
-; SI-NEXT: s_mov_b32 s59, s63
+; SI-NEXT: s_lshl_b32 s67, s4, 16
+; SI-NEXT: s_lshl_b32 s12, s96, 16
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB111_3
; SI-NEXT: .LBB111_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr77
-; SI-NEXT: ; implicit-def: $sgpr7
-; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr8
+; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr69
; SI-NEXT: ; implicit-def: $sgpr95
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr81
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr9
; SI-NEXT: ; implicit-def: $vcc_hi
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr99
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr85
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr83
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr81
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr71
+; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr67
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: .LBB111_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
+; SI-NEXT: s_mov_b32 s5, s11
+; SI-NEXT: s_mov_b32 s11, s10
+; SI-NEXT: s_mov_b32 s10, s9
; SI-NEXT: s_cmp_lg_u32 s4, 1
+; SI-NEXT: s_mov_b32 s9, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s69
+; SI-NEXT: s_mov_b32 s69, s11
; SI-NEXT: s_cbranch_scc1 .LBB111_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s97, s97, 3
-; SI-NEXT: s_and_b32 s4, s97, 0xff
-; SI-NEXT: s_lshl_b32 s5, s96, 8
+; SI-NEXT: s_add_i32 s65, s65, 3
+; SI-NEXT: s_and_b32 s4, s65, 0xff
+; SI-NEXT: s_lshl_b32 s5, s64, 8
+; SI-NEXT: s_add_i32 s54, s54, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_lshl_b32 s5, s84, 24
-; SI-NEXT: s_add_i32 s84, s83, 3
-; SI-NEXT: s_and_b32 s6, s84, 0xff
+; SI-NEXT: s_and_b32 s7, s54, 0xff
; SI-NEXT: s_addk_i32 s4, 0x300
-; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s55, 24
+; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_or_b32 s5, s5, s6
-; SI-NEXT: s_add_i32 s83, s87, 3
+; SI-NEXT: s_or_b32 s5, s5, s7
+; SI-NEXT: s_add_i32 s53, s53, 3
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s83, 0xff
-; SI-NEXT: s_lshl_b32 s6, s82, 8
-; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s7, s71, 0xff
+; SI-NEXT: s_and_b32 s5, s53, 0xff
+; SI-NEXT: s_lshl_b32 s7, s52, 8
+; SI-NEXT: s_add_i32 s50, s50, 3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: s_and_b32 s8, s50, 0xff
; SI-NEXT: s_addk_i32 s5, 0x300
-; SI-NEXT: s_lshl_b32 s6, s80, 24
-; SI-NEXT: s_lshl_b32 s7, s7, 16
+; SI-NEXT: s_lshl_b32 s7, s51, 24
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: s_add_i32 s70, s70, 3
-; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s70, 0xff
-; SI-NEXT: s_lshl_b32 s7, s68, 8
-; SI-NEXT: s_add_i32 s65, s65, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s74, s65, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s66, 24
-; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s74
-; SI-NEXT: s_add_i32 s64, s64, 3
-; SI-NEXT: s_or_b32 s52, s7, s6
-; SI-NEXT: s_and_b32 s6, s64, 0xff
-; SI-NEXT: s_lshl_b32 s7, s54, 8
-; SI-NEXT: s_add_i32 s50, s50, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s74, s50, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s36, 24
-; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s74
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s89, s34, 3
-; SI-NEXT: s_add_i32 s36, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s89, 0xff
-; SI-NEXT: s_lshl_b32 s7, s49, 8
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s37, 24
-; SI-NEXT: s_add_i32 s37, s39, 3
-; SI-NEXT: s_and_b32 s74, s37, 0xff
-; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s74, s74, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s74
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s77, s78, 3
-; SI-NEXT: s_add_i32 s89, s6, 0x3000000
+; SI-NEXT: s_or_b32 s7, s7, s8
+; SI-NEXT: s_add_i32 s49, s49, 3
+; SI-NEXT: s_or_b32 s5, s7, s5
+; SI-NEXT: s_and_b32 s7, s49, 0xff
+; SI-NEXT: s_lshl_b32 s8, s48, 8
+; SI-NEXT: s_add_i32 s38, s38, 3
+; SI-NEXT: s_or_b32 s7, s8, s7
+; SI-NEXT: s_and_b32 s9, s38, 0xff
+; SI-NEXT: s_addk_i32 s7, 0x300
+; SI-NEXT: s_lshl_b32 s8, s39, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_add_i32 s37, s37, 3
+; SI-NEXT: s_or_b32 s7, s8, s7
+; SI-NEXT: s_and_b32 s8, s37, 0xff
+; SI-NEXT: s_lshl_b32 s9, s36, 8
+; SI-NEXT: s_add_i32 s34, s34, 3
+; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_and_b32 s10, s34, 0xff
+; SI-NEXT: s_addk_i32 s8, 0x300
+; SI-NEXT: s_lshl_b32 s9, s35, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s9, s9, s10
+; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_add_i32 s89, s89, 3
+; SI-NEXT: s_add_i32 s11, s8, 0x3000000
+; SI-NEXT: s_and_b32 s8, s89, 0xff
+; SI-NEXT: s_lshl_b32 s9, s31, 8
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_addk_i32 s8, 0x300
+; SI-NEXT: s_lshl_b32 s9, s30, 24
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_or_b32 s6, s9, s6
+; SI-NEXT: s_or_b32 s6, s6, s8
+; SI-NEXT: s_add_i32 s77, s77, 3
+; SI-NEXT: s_add_i32 s12, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s77, 0xff
-; SI-NEXT: s_lshl_b32 s7, s76, 8
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s72, 24
-; SI-NEXT: s_add_i32 s72, s73, 3
-; SI-NEXT: s_and_b32 s63, s72, 0xff
+; SI-NEXT: s_lshl_b32 s8, s75, 8
+; SI-NEXT: s_add_i32 s72, s72, 3
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_and_b32 s9, s72, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s63, s63, 16
+; SI-NEXT: s_lshl_b32 s8, s63, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s63
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_add_i32 s73, s75, 3
-; SI-NEXT: v_readlane_b32 s7, v44, 2
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s63, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s73, 0xff
-; SI-NEXT: s_lshl_b32 s7, s7, 8
+; SI-NEXT: s_lshl_b32 s8, s62, 8
; SI-NEXT: s_add_i32 s60, s60, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s59, 24
-; SI-NEXT: s_and_b32 s59, s60, 0xff
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_and_b32 s9, s60, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s59, s59, 16
+; SI-NEXT: s_lshl_b32 s8, s59, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s59
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_add_i32 s61, s61, 3
; SI-NEXT: s_add_i32 s59, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s61, 0xff
-; SI-NEXT: s_lshl_b32 s7, s62, 8
+; SI-NEXT: s_lshl_b32 s8, s58, 8
; SI-NEXT: s_add_i32 s56, s56, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s47, 24
-; SI-NEXT: s_and_b32 s47, s56, 0xff
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_and_b32 s9, s56, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_lshl_b32 s8, s47, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s47
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_add_i32 s57, s57, 3
; SI-NEXT: s_add_i32 s47, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: s_lshl_b32 s7, s58, 8
+; SI-NEXT: s_lshl_b32 s8, s46, 8
; SI-NEXT: s_add_i32 s44, s44, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s43, 24
-; SI-NEXT: s_and_b32 s43, s44, 0xff
+; SI-NEXT: s_or_b32 s6, s8, s6
+; SI-NEXT: s_and_b32 s9, s44, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_lshl_b32 s8, s43, 24
+; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s43
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: s_add_i32 s43, s6, 0x3000000
+; SI-NEXT: s_add_i32 s8, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s45, 0xff
-; SI-NEXT: s_lshl_b32 s7, s46, 8
+; SI-NEXT: s_lshl_b32 s9, s42, 8
; SI-NEXT: s_add_i32 s40, s40, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s15, 24
-; SI-NEXT: s_and_b32 s15, s40, 0xff
+; SI-NEXT: s_or_b32 s6, s9, s6
+; SI-NEXT: s_and_b32 s10, s40, 0xff
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_lshl_b32 s9, s15, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s15
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s9, s9, s10
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_add_i32 s41, s41, 3
; SI-NEXT: s_add_i32 s15, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s41, 0xff
-; SI-NEXT: s_lshl_b32 s7, s42, 8
-; SI-NEXT: s_add_i32 s12, s12, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s11, 24
-; SI-NEXT: s_and_b32 s11, s12, 0xff
+; SI-NEXT: s_lshl_b32 s9, s14, 8
+; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s11
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_and_b32 s9, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v44, 5
+; SI-NEXT: s_and_b32 s10, s87, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 24
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_or_b32 s6, s6, s10
+; SI-NEXT: s_or_b32 s6, s6, s9
+; SI-NEXT: s_add_i32 s9, s6, 0x3000000
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: s_add_i32 s11, s6, 0x3000000
-; SI-NEXT: s_and_b32 s6, s13, 0xff
-; SI-NEXT: s_lshl_b32 s7, s14, 8
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_lshl_b32 s7, s8, 24
-; SI-NEXT: s_and_b32 s8, s9, 0xff
+; SI-NEXT: v_readlane_b32 s6, v44, 4
+; SI-NEXT: s_and_b32 s10, s13, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: s_or_b32 s6, s6, s10
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s8
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_and_b32 s10, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v44, 2
+; SI-NEXT: s_lshl_b32 s13, s6, 24
+; SI-NEXT: v_readlane_b32 s6, v44, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s13, s6
+; SI-NEXT: s_or_b32 s6, s6, s10
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s8, s6, 0x3000000
+; SI-NEXT: s_add_i32 s13, s6, 0x3000000
; SI-NEXT: s_and_b32 s6, s28, 0xff
-; SI-NEXT: s_lshl_b32 s7, s29, 8
-; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s9, s19, 0xff
+; SI-NEXT: s_lshl_b32 s10, s29, 8
+; SI-NEXT: s_or_b32 s6, s10, s6
; SI-NEXT: s_addk_i32 s6, 0x300
-; SI-NEXT: s_lshl_b32 s7, s10, 24
-; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_or_b32 s7, s7, s9
+; SI-NEXT: s_and_b32 s10, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v44, 1
+; SI-NEXT: s_lshl_b32 s14, s6, 24
+; SI-NEXT: v_readlane_b32 s6, v44, 0
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s14, s6
; SI-NEXT: s_add_i32 s24, s24, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s24, 0xff
-; SI-NEXT: s_lshl_b32 s9, s25, 8
+; SI-NEXT: s_or_b32 s6, s6, s10
+; SI-NEXT: s_and_b32 s10, s24, 0xff
+; SI-NEXT: s_lshl_b32 s14, s25, 8
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_and_b32 s10, s26, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s9, s27, 24
-; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s9, s9, s10
-; SI-NEXT: s_or_b32 s7, s9, s7
+; SI-NEXT: s_or_b32 s10, s14, s10
+; SI-NEXT: s_and_b32 s24, s26, 0xff
+; SI-NEXT: s_addk_i32 s10, 0x300
+; SI-NEXT: s_lshl_b32 s14, s27, 24
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s24
+; SI-NEXT: s_or_b32 s10, s14, s10
; SI-NEXT: s_add_i32 s20, s20, 3
-; SI-NEXT: s_add_i32 s9, s7, 0x3000000
-; SI-NEXT: s_and_b32 s7, s20, 0xff
-; SI-NEXT: s_lshl_b32 s10, s21, 8
-; SI-NEXT: s_add_i32 s22, s22, 3
-; SI-NEXT: s_or_b32 s7, s10, s7
-; SI-NEXT: s_and_b32 s12, s22, 0xff
-; SI-NEXT: s_addk_i32 s7, 0x300
-; SI-NEXT: s_lshl_b32 s10, s23, 24
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: v_readlane_b32 s13, v44, 0
-; SI-NEXT: s_or_b32 s7, s10, s7
-; SI-NEXT: s_and_b32 s10, s16, 0xff
-; SI-NEXT: s_lshl_b32 s12, s17, 8
-; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: s_or_b32 s10, s12, s10
-; SI-NEXT: v_readlane_b32 s12, v44, 1
-; SI-NEXT: s_and_b32 s13, s13, 0xff
+; SI-NEXT: s_add_i32 s14, s10, 0x3000000
+; SI-NEXT: s_and_b32 s10, s20, 0xff
+; SI-NEXT: s_lshl_b32 s20, s21, 8
+; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_and_b32 s16, s16, 0xff
+; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_or_b32 s10, s20, s10
+; SI-NEXT: s_and_b32 s21, s22, 0xff
+; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_and_b32 s18, s18, 0xff
; SI-NEXT: s_addk_i32 s10, 0x300
-; SI-NEXT: s_lshl_b32 s12, s12, 24
-; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_lshl_b32 s20, s23, 24
+; SI-NEXT: s_lshl_b32 s21, s21, 16
+; SI-NEXT: s_addk_i32 s16, 0x300
+; SI-NEXT: s_lshl_b32 s17, s19, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: s_or_b32 s10, s12, s10
+; SI-NEXT: s_or_b32 s20, s20, s21
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s18
+; SI-NEXT: s_or_b32 s10, s20, s10
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x3000000
; SI-NEXT: s_add_i32 s5, s5, 0x3000000
-; SI-NEXT: s_add_i32 s52, s52, 0x3000000
-; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s7, s7, 0x3000000
+; SI-NEXT: s_add_i32 s6, s6, 0x3000000
; SI-NEXT: s_add_i32 s10, s10, 0x3000000
-; SI-NEXT: s_and_b32 s77, s10, 0xffff0000
-; SI-NEXT: s_lshl_b32 s74, s10, 16
-; SI-NEXT: s_and_b32 s88, s7, 0xffff0000
-; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: s_and_b32 s90, s9, 0xffff0000
-; SI-NEXT: s_lshl_b32 s79, s9, 16
-; SI-NEXT: s_and_b32 s92, s6, 0xffff0000
-; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_and_b32 s93, s8, 0xffff0000
-; SI-NEXT: s_lshl_b32 s91, s8, 16
-; SI-NEXT: s_and_b32 s95, s11, 0xffff0000
-; SI-NEXT: s_lshl_b32 s69, s11, 16
-; SI-NEXT: s_and_b32 vcc_lo, s15, 0xffff0000
-; SI-NEXT: s_lshl_b32 s94, s15, 16
-; SI-NEXT: s_and_b32 s30, s43, 0xffff0000
-; SI-NEXT: s_lshl_b32 s81, s43, 16
-; SI-NEXT: s_and_b32 s31, s47, 0xffff0000
-; SI-NEXT: s_lshl_b32 vcc_hi, s47, 16
-; SI-NEXT: s_and_b32 s35, s59, 0xffff0000
-; SI-NEXT: s_lshl_b32 s86, s59, 16
-; SI-NEXT: s_and_b32 s38, s63, 0xffff0000
-; SI-NEXT: s_lshl_b32 s99, s63, 16
-; SI-NEXT: s_and_b32 s48, s89, 0xffff0000
-; SI-NEXT: s_lshl_b32 s18, s89, 16
-; SI-NEXT: s_and_b32 s51, s36, 0xffff0000
-; SI-NEXT: s_lshl_b32 s89, s36, 16
-; SI-NEXT: s_and_b32 s53, s52, 0xffff0000
-; SI-NEXT: s_lshl_b32 s85, s52, 16
-; SI-NEXT: s_and_b32 s55, s5, 0xffff0000
-; SI-NEXT: s_lshl_b32 s52, s5, 16
-; SI-NEXT: s_and_b32 s67, s4, 0xffff0000
-; SI-NEXT: s_lshl_b32 s98, s4, 16
+; SI-NEXT: s_add_i32 s16, s16, 0x3000000
+; SI-NEXT: s_and_b32 s76, s16, 0xffff0000
+; SI-NEXT: s_lshl_b32 s74, s16, 16
+; SI-NEXT: s_and_b32 s79, s10, 0xffff0000
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_and_b32 s88, s14, 0xffff0000
+; SI-NEXT: s_lshl_b32 s78, s14, 16
+; SI-NEXT: s_and_b32 s91, s6, 0xffff0000
+; SI-NEXT: s_lshl_b32 s70, s6, 16
+; SI-NEXT: s_and_b32 s92, s13, 0xffff0000
+; SI-NEXT: s_lshl_b32 s90, s13, 16
+; SI-NEXT: s_and_b32 s94, s9, 0xffff0000
+; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: s_and_b32 s95, s15, 0xffff0000
+; SI-NEXT: s_lshl_b32 s93, s15, 16
+; SI-NEXT: s_and_b32 vcc_hi, s8, 0xffff0000
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_and_b32 s86, s47, 0xffff0000
+; SI-NEXT: s_lshl_b32 vcc_lo, s47, 16
+; SI-NEXT: s_and_b32 s85, s59, 0xffff0000
+; SI-NEXT: s_lshl_b32 s69, s59, 16
+; SI-NEXT: s_and_b32 s84, s63, 0xffff0000
+; SI-NEXT: s_lshl_b32 s83, s63, 16
+; SI-NEXT: s_and_b32 s82, s12, 0xffff0000
+; SI-NEXT: s_lshl_b32 s81, s12, 16
+; SI-NEXT: s_and_b32 s80, s11, 0xffff0000
+; SI-NEXT: s_lshl_b32 s71, s11, 16
+; SI-NEXT: s_and_b32 s68, s7, 0xffff0000
+; SI-NEXT: s_lshl_b32 s67, s7, 16
+; SI-NEXT: s_and_b32 s66, s5, 0xffff0000
+; SI-NEXT: s_lshl_b32 s7, s5, 16
+; SI-NEXT: s_and_b32 s5, s4, 0xffff0000
+; SI-NEXT: s_lshl_b32 s12, s4, 16
; SI-NEXT: .LBB111_5: ; %end
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; SI-NEXT: v_mul_f32_e64 v0, 1.0, s74
; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s79
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; SI-NEXT: v_mul_f32_e64 v1, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v1, 1.0, s10
; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s88
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, s78
; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s91
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s70
; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s92
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s90
; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s94
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s69
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s9
; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s95
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s93
; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, vcc_hi
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s81
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s8
; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s86
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, vcc_lo
; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s85
; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s86
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s69
; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s38
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s84
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10
-; SI-NEXT: v_mul_f32_e64 v10, 1.0, s99
+; SI-NEXT: v_mul_f32_e64 v10, 1.0, s83
; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s48
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s82
; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s18
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s81
; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s51
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s80
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s71
; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s53
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s68
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v13
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s85
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s67
; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s55
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s66
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s52
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s7
; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s67
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s98
-; SI-NEXT: v_readlane_b32 s30, v43, 34
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s12
+; SI-NEXT: v_readlane_b32 s30, v43, 31
; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16
-; SI-NEXT: v_readlane_b32 s31, v43, 35
-; SI-NEXT: v_readlane_b32 s99, v43, 33
-; SI-NEXT: v_readlane_b32 s98, v43, 32
-; SI-NEXT: v_readlane_b32 s97, v43, 31
+; SI-NEXT: v_readlane_b32 s31, v43, 32
; SI-NEXT: v_readlane_b32 s96, v43, 30
; SI-NEXT: v_readlane_b32 s87, v43, 29
; SI-NEXT: v_readlane_b32 s86, v43, 28
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
index 9b079dccf1023..481668e99733d 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
@@ -29979,109 +29979,117 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v18, s34, 0
; SI-NEXT: v_writelane_b32 v18, s35, 1
; SI-NEXT: v_writelane_b32 v18, s36, 2
; SI-NEXT: v_writelane_b32 v18, s37, 3
; SI-NEXT: v_writelane_b32 v18, s38, 4
; SI-NEXT: v_writelane_b32 v18, s39, 5
-; SI-NEXT: v_writelane_b32 v18, s48, 6
-; SI-NEXT: v_writelane_b32 v18, s49, 7
-; SI-NEXT: v_writelane_b32 v18, s50, 8
-; SI-NEXT: v_writelane_b32 v18, s51, 9
-; SI-NEXT: v_writelane_b32 v18, s52, 10
-; SI-NEXT: v_writelane_b32 v18, s53, 11
-; SI-NEXT: v_writelane_b32 v18, s30, 12
-; SI-NEXT: v_writelane_b32 v18, s31, 13
-; SI-NEXT: v_readfirstlane_b32 s51, v3
-; SI-NEXT: v_readfirstlane_b32 s53, v2
-; SI-NEXT: v_readfirstlane_b32 s48, v1
-; SI-NEXT: v_readfirstlane_b32 s50, v0
+; SI-NEXT: v_writelane_b32 v18, s30, 6
+; SI-NEXT: v_writelane_b32 v18, s31, 7
+; SI-NEXT: v_readfirstlane_b32 s79, v3
+; SI-NEXT: v_readfirstlane_b32 s39, v2
+; SI-NEXT: v_readfirstlane_b32 s77, v1
+; SI-NEXT: v_readfirstlane_b32 s38, v0
; SI-NEXT: s_lshr_b32 vcc_lo, s29, 16
-; SI-NEXT: s_lshr_b32 s39, s28, 16
+; SI-NEXT: s_lshr_b32 s37, s28, 16
; SI-NEXT: s_lshr_b32 s95, s27, 16
-; SI-NEXT: s_lshr_b32 s38, s26, 16
+; SI-NEXT: s_lshr_b32 s36, s26, 16
; SI-NEXT: s_lshr_b32 s94, s25, 16
-; SI-NEXT: s_lshr_b32 s37, s24, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
; SI-NEXT: s_lshr_b32 s93, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
; SI-NEXT: s_lshr_b32 s92, s21, 16
-; SI-NEXT: s_lshr_b32 s35, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s20, 16
; SI-NEXT: s_lshr_b32 s91, s19, 16
-; SI-NEXT: s_lshr_b32 s34, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s18, 16
; SI-NEXT: s_lshr_b32 s90, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s30, s51, 16
-; SI-NEXT: s_lshr_b32 s52, s53, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s48, 16
-; SI-NEXT: s_lshr_b32 s49, s50, 16
+; SI-NEXT: s_lshr_b32 s47, s16, 16
+; SI-NEXT: s_lshr_b32 s75, s79, 16
+; SI-NEXT: s_lshr_b32 s5, s39, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s77, 16
+; SI-NEXT: s_lshr_b32 s57, s38, 16
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: ; implicit-def: $vgpr19 : SGPR spill to VGPR lane
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v19, s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s90, 16
+; SI-NEXT: s_and_b32 s9, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s90, 16
+; SI-NEXT: s_lshl_b32 s46, s47, 16
+; SI-NEXT: s_mov_b32 s7, s47
+; SI-NEXT: s_or_b32 s47, s9, s11
+; SI-NEXT: s_and_b32 s11, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s91, 16
+; SI-NEXT: s_lshl_b32 s42, s57, 16
+; SI-NEXT: s_mov_b32 s9, s57
+; SI-NEXT: s_or_b32 s57, s11, s13
+; SI-NEXT: s_and_b32 s11, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s92, 16
+; SI-NEXT: s_or_b32 s59, s11, s13
+; SI-NEXT: s_and_b32 s11, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s93, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s31, 16
-; SI-NEXT: s_or_b32 s47, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s91, 16
+; SI-NEXT: s_or_b32 s61, s11, s13
+; SI-NEXT: s_and_b32 s11, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s94, 16
; SI-NEXT: s_or_b32 s40, s4, s46
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s56, s34, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s92, 16
+; SI-NEXT: s_lshl_b32 s56, s30, 16
+; SI-NEXT: s_or_b32 s63, s11, s13
+; SI-NEXT: s_and_b32 s11, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s95, 16
; SI-NEXT: s_or_b32 s14, s4, s56
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s35, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s93, 16
+; SI-NEXT: s_lshl_b32 s58, s31, 16
+; SI-NEXT: s_or_b32 s73, s11, s13
+; SI-NEXT: s_and_b32 s11, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s13, vcc_lo, 16
; SI-NEXT: s_or_b32 s12, s4, s58
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s36, 16
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_lshl_b32 s60, s34, 16
+; SI-NEXT: s_or_b32 s45, s11, s13
+; SI-NEXT: s_and_b32 s11, s77, 0xffff
+; SI-NEXT: s_lshl_b32 s13, vcc_hi, 16
; SI-NEXT: s_or_b32 s10, s4, s60
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s37, 16
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s95, 16
+; SI-NEXT: s_lshl_b32 s62, s35, 16
+; SI-NEXT: s_or_b32 s43, s11, s13
+; SI-NEXT: s_and_b32 s11, s79, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s75, 16
; SI-NEXT: s_or_b32 s8, s4, s62
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s38, 16
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s72, s36, 16
+; SI-NEXT: s_lshl_b32 s44, s37, 16
+; SI-NEXT: s_or_b32 s89, s11, s13
+; SI-NEXT: s_mov_b32 s13, s59
+; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
; SI-NEXT: s_or_b32 s6, s4, s72
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s39, 16
-; SI-NEXT: s_or_b32 s45, s5, s7
-; SI-NEXT: s_and_b32 s5, s48, 0xffff
-; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
-; SI-NEXT: s_or_b32 s4, s4, s44
-; SI-NEXT: s_lshl_b32 s42, s49, 16
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_mov_b32 s59, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s50, 0xffff
-; SI-NEXT: s_or_b32 s79, s5, s7
-; SI-NEXT: s_lshl_b32 s78, s52, 16
-; SI-NEXT: s_or_b32 s44, s44, s42
+; SI-NEXT: s_or_b32 s4, s4, s44
+; SI-NEXT: s_lshl_b32 s88, s5, 16
+; SI-NEXT: s_mov_b32 s75, s59
+; SI-NEXT: s_and_b32 s44, s38, 0xffff
+; SI-NEXT: s_mov_b32 s59, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
-; SI-NEXT: s_and_b32 s42, s53, 0xffff
; SI-NEXT: s_mov_b32 s41, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16
; SI-NEXT: s_mov_b32 s15, s57
; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
-; SI-NEXT: s_mov_b32 s13, s59
-; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
+; SI-NEXT: s_or_b32 s44, s44, s42
+; SI-NEXT: s_mov_b32 s77, s59
+; SI-NEXT: s_and_b32 s42, s39, 0xffff
+; SI-NEXT: s_mov_b32 s59, s79
+; SI-NEXT: s_lshr_b64 s[78:79], s[88:89], 16
+; SI-NEXT: s_mov_b32 s47, s7
+; SI-NEXT: s_mov_b32 s57, s9
; SI-NEXT: s_mov_b32 s11, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
; SI-NEXT: s_mov_b32 s9, s63
@@ -30090,9 +30098,9 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT: s_mov_b32 s5, s45
; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_or_b32 s42, s42, s78
-; SI-NEXT: s_mov_b32 s43, s79
-; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16
+; SI-NEXT: s_or_b32 s42, s42, s88
+; SI-NEXT: s_mov_b32 s43, s89
+; SI-NEXT: s_mov_b32 s79, s59
; SI-NEXT: s_mov_b64 s[88:89], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
@@ -30117,33 +30125,34 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[88:89], s[88:89], exec
-; SI-NEXT: s_cselect_b32 s47, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s47, 1
+; SI-NEXT: s_cselect_b32 s59, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s59, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s53, s53, 3
-; SI-NEXT: s_and_b32 s4, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s52, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s51, s51, 3
+; SI-NEXT: s_add_i32 s4, s39, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v19, 0
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_add_i32 s4, s79, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s75, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s50, s50, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s50, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s49, 16
+; SI-NEXT: s_add_i32 s4, s38, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s57, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s48, s48, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s48, 0xffff
+; SI-NEXT: s_add_i32 s4, s77, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s39, 16
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s29, 0xffff
@@ -30151,7 +30160,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s38, 16
+; SI-NEXT: s_lshl_b32 s7, s36, 16
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s27, 0xffff
@@ -30159,7 +30168,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s37, 16
+; SI-NEXT: s_lshl_b32 s9, s35, 16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s25, 0xffff
@@ -30167,7 +30176,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s36, 16
+; SI-NEXT: s_lshl_b32 s11, s34, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s23, 0xffff
@@ -30175,7 +30184,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s35, 16
+; SI-NEXT: s_lshl_b32 s13, s31, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s21, 0xffff
@@ -30183,7 +30192,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s34, 16
+; SI-NEXT: s_lshl_b32 s15, s30, 16
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: s_and_b32 s15, s19, 0xffff
@@ -30191,15 +30200,15 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s15, s18, s15
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s31, 16
+; SI-NEXT: s_lshl_b32 s18, s47, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s40, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
; SI-NEXT: s_lshl_b32 s17, s90, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
@@ -30211,13 +30220,13 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_add_i32 s41, s16, 0x30000
+; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16
; SI-NEXT: s_lshr_b32 s90, s41, 16
@@ -30228,7 +30237,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s7, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s45, 16
-; SI-NEXT: s_lshr_b32 s30, s43, 16
+; SI-NEXT: s_lshr_b32 s75, s43, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s16, s40, 0xffff
; SI-NEXT: s_lshl_b32 s17, s46, 16
@@ -30282,9 +30291,9 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s21, s78, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s30, 16
+; SI-NEXT: s_lshl_b32 s22, s75, 16
; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: v_readlane_b32 s30, v18, 12
+; SI-NEXT: v_readlane_b32 s30, v18, 6
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s14
@@ -30303,13 +30312,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v15, s19
; SI-NEXT: v_mov_b32_e32 v16, s20
; SI-NEXT: v_mov_b32_e32 v17, s21
-; SI-NEXT: v_readlane_b32 s31, v18, 13
-; SI-NEXT: v_readlane_b32 s53, v18, 11
-; SI-NEXT: v_readlane_b32 s52, v18, 10
-; SI-NEXT: v_readlane_b32 s51, v18, 9
-; SI-NEXT: v_readlane_b32 s50, v18, 8
-; SI-NEXT: v_readlane_b32 s49, v18, 7
-; SI-NEXT: v_readlane_b32 s48, v18, 6
+; SI-NEXT: v_readlane_b32 s31, v18, 7
; SI-NEXT: v_readlane_b32 s39, v18, 5
; SI-NEXT: v_readlane_b32 s38, v18, 4
; SI-NEXT: v_readlane_b32 s37, v18, 3
@@ -30318,6 +30321,7 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v18, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -31612,12 +31616,7 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; SI-LABEL: bitcast_v36f16_to_v36i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: v_readfirstlane_b32 s6, v2
; SI-NEXT: v_readfirstlane_b32 s9, v1
@@ -31762,52 +31761,58 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v51
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s58
; SI-NEXT: v_or_b32_e32 v15, v15, v21
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v20, s22
; SI-NEXT: v_or_b32_e32 v17, v17, v21
; SI-NEXT: v_cvt_f32_f16_e32 v21, s24
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s58
+; SI-NEXT: v_cvt_f32_f16_e32 v20, s22
+; SI-NEXT: v_cvt_f32_f16_e32 v22, s26
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v45, v18, v2
-; SI-NEXT: v_or_b32_e32 v43, v19, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v18, s26
-; SI-NEXT: v_or_b32_e32 v42, v20, v6
+; SI-NEXT: v_cvt_f32_f16_e32 v23, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v24, s6
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_or_b32_e32 v55, v21, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v19, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v20, s7
-; SI-NEXT: v_cvt_f32_f16_e32 v21, s6
-; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
+; SI-NEXT: v_cvt_f32_f16_e32 v21, s28
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
+; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
+; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; SI-NEXT: v_or_b32_e32 v44, v18, v10
-; SI-NEXT: v_or_b32_e32 v41, v19, v12
-; SI-NEXT: v_or_b32_e32 v40, v20, v14
-; SI-NEXT: v_or_b32_e32 v54, v21, v16
+; SI-NEXT: v_or_b32_e32 v18, v18, v2
+; SI-NEXT: v_or_b32_e32 v19, v19, v4
+; SI-NEXT: v_or_b32_e32 v20, v20, v6
+; SI-NEXT: v_or_b32_e32 v22, v22, v10
+; SI-NEXT: v_or_b32_e32 v21, v21, v12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v40, v23, v14
+; SI-NEXT: v_or_b32_e32 v54, v24, v16
; SI-NEXT: v_lshr_b64 v[34:35], v[0:1], 16
; SI-NEXT: v_lshr_b64 v[32:33], v[2:3], 16
+; SI-NEXT: v_mov_b32_e32 v2, v18
; SI-NEXT: v_lshr_b64 v[30:31], v[4:5], 16
+; SI-NEXT: v_mov_b32_e32 v4, v19
; SI-NEXT: v_lshr_b64 v[28:29], v[6:7], 16
+; SI-NEXT: v_mov_b32_e32 v6, v20
; SI-NEXT: v_lshr_b64 v[26:27], v[8:9], 16
; SI-NEXT: v_lshr_b64 v[24:25], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v10, v22
; SI-NEXT: v_lshr_b64 v[22:23], v[12:13], 16
+; SI-NEXT: v_mov_b32_e32 v12, v21
; SI-NEXT: v_lshr_b64 v[20:21], v[14:15], 16
; SI-NEXT: v_lshr_b64 v[18:19], v[16:17], 16
+; SI-NEXT: v_mov_b32_e32 v14, v40
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
; SI-NEXT: v_mov_b32_e32 v37, s47
@@ -31821,17 +31826,13 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v53, s10
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v54, s6
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v40, s7
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v41, s28
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v44, s26
+; SI-NEXT: v_mov_b32_e32 v14, s7
+; SI-NEXT: v_mov_b32_e32 v12, s28
+; SI-NEXT: v_mov_b32_e32 v10, s26
; SI-NEXT: v_mov_b32_e32 v55, s24
-; SI-NEXT: v_mov_b32_e32 v42, s22
-; SI-NEXT: v_mov_b32_e32 v43, s20
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v45, s18
+; SI-NEXT: v_mov_b32_e32 v6, s22
+; SI-NEXT: v_mov_b32_e32 v4, s20
+; SI-NEXT: v_mov_b32_e32 v2, s18
; SI-NEXT: v_mov_b32_e32 v36, s16
; SI-NEXT: v_mov_b32_e32 v3, s19
; SI-NEXT: v_mov_b32_e32 v5, s21
@@ -31851,55 +31852,51 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v20, s44
; SI-NEXT: v_mov_b32_e32 v18, s42
; SI-NEXT: .LBB59_6: ; %end
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v34
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v36
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v36
+; SI-NEXT: v_or_b32_e32 v0, v8, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v53
+; SI-NEXT: v_or_b32_e32 v1, v1, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v2, v8
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v52
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v30
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v52
+; SI-NEXT: v_or_b32_e32 v3, v3, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v30
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_or_b32_e32 v4, v4, v8
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v50
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v28
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v42
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v50
+; SI-NEXT: v_or_b32_e32 v5, v5, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v28
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v49
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v26
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v55
+; SI-NEXT: v_or_b32_e32 v8, v16, v8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v48
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v24
-; SI-NEXT: v_or_b32_e32 v10, v10, v12
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
+; SI-NEXT: v_or_b32_e32 v9, v9, v16
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24
+; SI-NEXT: v_or_b32_e32 v10, v10, v16
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v39
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; SI-NEXT: v_or_b32_e32 v11, v11, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22
+; SI-NEXT: v_or_b32_e32 v12, v12, v16
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v38
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; SI-NEXT: v_or_b32_e32 v13, v13, v16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v20
; SI-NEXT: v_or_b32_e32 v14, v14, v16
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
index 78b54755887fc..71d2f2ed140f2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
@@ -5429,6 +5429,7 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v20, s36, 0
; VI-NEXT: v_writelane_b32 v20, s37, 1
@@ -5446,73 +5447,71 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v20, s65, 13
; VI-NEXT: v_writelane_b32 v20, s66, 14
; VI-NEXT: v_writelane_b32 v20, s67, 15
-; VI-NEXT: v_writelane_b32 v20, s30, 16
-; VI-NEXT: v_writelane_b32 v20, s31, 17
; VI-NEXT: v_readfirstlane_b32 s7, v5
-; VI-NEXT: v_readfirstlane_b32 s9, v4
+; VI-NEXT: v_readfirstlane_b32 vcc_hi, v4
; VI-NEXT: v_readfirstlane_b32 s12, v3
; VI-NEXT: v_readfirstlane_b32 s15, v2
; VI-NEXT: v_readfirstlane_b32 s74, v1
; VI-NEXT: v_readfirstlane_b32 s77, v0
; VI-NEXT: s_lshr_b32 s11, s29, 16
; VI-NEXT: s_lshr_b32 s13, s28, 16
-; VI-NEXT: s_lshr_b32 s72, s27, 16
-; VI-NEXT: s_lshr_b32 s75, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s27, 16
+; VI-NEXT: s_lshr_b32 s60, s26, 16
+; VI-NEXT: s_lshr_b32 s89, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s72, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s78, s19, 16
+; VI-NEXT: s_lshr_b32 s79, s18, 16
+; VI-NEXT: s_lshr_b32 s56, s17, 16
+; VI-NEXT: s_lshr_b32 s57, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
-; VI-NEXT: s_lshr_b32 s8, s9, 16
+; VI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; VI-NEXT: s_lshr_b32 s10, s12, 16
; VI-NEXT: s_lshr_b32 s14, s15, 16
-; VI-NEXT: s_lshr_b32 s73, s74, 16
-; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s59, s74, 16
+; VI-NEXT: s_lshr_b32 s61, s77, 16
; VI-NEXT: v_readfirstlane_b32 s4, v6
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
; VI-NEXT: s_lshl_b32 s5, s13, 16
@@ -5521,10 +5520,10 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s49, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
@@ -5532,7 +5531,7 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s12
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
@@ -5541,8 +5540,49 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; VI-NEXT: s_mov_b32 s73, s57
+; VI-NEXT: v_writelane_b32 v21, s72, 0
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s13
+; VI-NEXT: s_mov_b32 s13, s11
+; VI-NEXT: s_mov_b32 s11, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s56
+; VI-NEXT: s_mov_b32 s76, s58
+; VI-NEXT: s_mov_b32 s75, s59
+; VI-NEXT: v_writelane_b32 v21, s77, 1
+; VI-NEXT: s_mov_b32 s77, s74
+; VI-NEXT: s_mov_b32 s74, s15
+; VI-NEXT: s_mov_b32 s15, s12
+; VI-NEXT: s_mov_b32 s12, s79
+; VI-NEXT: s_mov_b32 s79, s60
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, s78
+; VI-NEXT: s_mov_b32 s78, s61
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b32 s61, s78
+; VI-NEXT: s_mov_b32 s78, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: s_mov_b32 s60, s79
+; VI-NEXT: s_mov_b32 s79, s12
+; VI-NEXT: s_mov_b32 s12, s15
+; VI-NEXT: s_mov_b32 s15, s74
+; VI-NEXT: s_mov_b32 s74, s77
+; VI-NEXT: v_readlane_b32 s77, v21, 1
+; VI-NEXT: s_mov_b32 s59, s75
+; VI-NEXT: s_mov_b32 s58, s76
+; VI-NEXT: s_mov_b32 s57, s73
+; VI-NEXT: s_mov_b32 s56, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s11
+; VI-NEXT: s_mov_b32 s11, s13
+; VI-NEXT: s_mov_b32 s13, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: v_readlane_b32 s72, v21, 0
; VI-NEXT: .LBB15_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -5551,62 +5591,62 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -5618,39 +5658,38 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s12, 0xffff
+; VI-NEXT: s_add_i32 s4, s12, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, vcc_hi, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v20, 16
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -5671,7 +5710,6 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v17, s53
; VI-NEXT: v_mov_b32_e32 v18, s54
; VI-NEXT: v_mov_b32_e32 v19, s55
-; VI-NEXT: v_readlane_b32 s31, v20, 17
; VI-NEXT: v_readlane_b32 s67, v20, 15
; VI-NEXT: v_readlane_b32 s66, v20, 14
; VI-NEXT: v_readlane_b32 s65, v20, 13
@@ -5690,6 +5728,7 @@ define inreg <20 x i32> @bitcast_v40i16_to_v20i32_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_readlane_b32 s36, v20, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -8693,24 +8732,25 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s91, s20, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s30, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: s_lshr_b32 s75, s73, 16
; VI-NEXT: s_lshr_b32 s78, s76, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v6
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v6
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s30, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s37, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s18
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s38, s4, s5
@@ -8763,11 +8803,12 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB19_3
; VI-NEXT: .LBB19_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -8777,8 +8818,8 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v19, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s31
-; VI-NEXT: v_mov_b32_e32 v2, s30
+; VI-NEXT: v_mov_b32_e32 v0, s30
+; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v19
; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -8853,7 +8894,7 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v18, v18, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, s8, v19
; VI-NEXT: v_or_b32_e32 v18, v20, v18
-; VI-NEXT: v_mov_b32_e32 v20, s7
+; VI-NEXT: v_mov_b32_e32 v20, s31
; VI-NEXT: v_add_f16_sdwa v20, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, s6, v19
; VI-NEXT: v_or_b32_e32 v19, v19, v20
@@ -14218,6 +14259,7 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v20, s36, 0
; VI-NEXT: v_writelane_b32 v20, s37, 1
@@ -14235,73 +14277,71 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v20, s65, 13
; VI-NEXT: v_writelane_b32 v20, s66, 14
; VI-NEXT: v_writelane_b32 v20, s67, 15
-; VI-NEXT: v_writelane_b32 v20, s30, 16
-; VI-NEXT: v_writelane_b32 v20, s31, 17
; VI-NEXT: v_readfirstlane_b32 s7, v5
-; VI-NEXT: v_readfirstlane_b32 s9, v4
+; VI-NEXT: v_readfirstlane_b32 vcc_hi, v4
; VI-NEXT: v_readfirstlane_b32 s12, v3
; VI-NEXT: v_readfirstlane_b32 s15, v2
; VI-NEXT: v_readfirstlane_b32 s74, v1
; VI-NEXT: v_readfirstlane_b32 s77, v0
; VI-NEXT: s_lshr_b32 s11, s29, 16
; VI-NEXT: s_lshr_b32 s13, s28, 16
-; VI-NEXT: s_lshr_b32 s72, s27, 16
-; VI-NEXT: s_lshr_b32 s75, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s27, 16
+; VI-NEXT: s_lshr_b32 s60, s26, 16
+; VI-NEXT: s_lshr_b32 s89, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s72, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s78, s19, 16
+; VI-NEXT: s_lshr_b32 s79, s18, 16
+; VI-NEXT: s_lshr_b32 s56, s17, 16
+; VI-NEXT: s_lshr_b32 s57, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
-; VI-NEXT: s_lshr_b32 s8, s9, 16
+; VI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; VI-NEXT: s_lshr_b32 s10, s12, 16
; VI-NEXT: s_lshr_b32 s14, s15, 16
-; VI-NEXT: s_lshr_b32 s73, s74, 16
-; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s59, s74, 16
+; VI-NEXT: s_lshr_b32 s61, s77, 16
; VI-NEXT: v_readfirstlane_b32 s4, v6
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
; VI-NEXT: s_lshl_b32 s5, s13, 16
@@ -14310,10 +14350,10 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s49, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
@@ -14321,7 +14361,7 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s12
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
@@ -14330,8 +14370,49 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; VI-NEXT: s_mov_b32 s73, s57
+; VI-NEXT: v_writelane_b32 v21, s72, 0
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s13
+; VI-NEXT: s_mov_b32 s13, s11
+; VI-NEXT: s_mov_b32 s11, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s56
+; VI-NEXT: s_mov_b32 s76, s58
+; VI-NEXT: s_mov_b32 s75, s59
+; VI-NEXT: v_writelane_b32 v21, s77, 1
+; VI-NEXT: s_mov_b32 s77, s74
+; VI-NEXT: s_mov_b32 s74, s15
+; VI-NEXT: s_mov_b32 s15, s12
+; VI-NEXT: s_mov_b32 s12, s79
+; VI-NEXT: s_mov_b32 s79, s60
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, s78
+; VI-NEXT: s_mov_b32 s78, s61
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b32 s61, s78
+; VI-NEXT: s_mov_b32 s78, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: s_mov_b32 s60, s79
+; VI-NEXT: s_mov_b32 s79, s12
+; VI-NEXT: s_mov_b32 s12, s15
+; VI-NEXT: s_mov_b32 s15, s74
+; VI-NEXT: s_mov_b32 s74, s77
+; VI-NEXT: v_readlane_b32 s77, v21, 1
+; VI-NEXT: s_mov_b32 s59, s75
+; VI-NEXT: s_mov_b32 s58, s76
+; VI-NEXT: s_mov_b32 s57, s73
+; VI-NEXT: s_mov_b32 s56, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s11
+; VI-NEXT: s_mov_b32 s11, s13
+; VI-NEXT: s_mov_b32 s13, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: v_readlane_b32 s72, v21, 0
; VI-NEXT: .LBB31_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -14340,62 +14421,62 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -14407,39 +14488,38 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s12, 0xffff
+; VI-NEXT: s_add_i32 s4, s12, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, vcc_hi, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v20, 16
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -14460,7 +14540,6 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v17, s53
; VI-NEXT: v_mov_b32_e32 v18, s54
; VI-NEXT: v_mov_b32_e32 v19, s55
-; VI-NEXT: v_readlane_b32 s31, v20, 17
; VI-NEXT: v_readlane_b32 s67, v20, 15
; VI-NEXT: v_readlane_b32 s66, v20, 14
; VI-NEXT: v_readlane_b32 s65, v20, 13
@@ -14479,6 +14558,7 @@ define inreg <20 x float> @bitcast_v40i16_to_v20f32_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v20, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -17705,24 +17785,25 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s91, s20, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s30, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: s_lshr_b32 s75, s73, 16
; VI-NEXT: s_lshr_b32 s78, s76, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v6
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v6
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s30, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s37, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s18
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s38, s4, s5
@@ -17775,11 +17856,12 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB35_3
; VI-NEXT: .LBB35_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -17789,8 +17871,8 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v19, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s31
-; VI-NEXT: v_mov_b32_e32 v2, s30
+; VI-NEXT: v_mov_b32_e32 v0, s30
+; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v19
; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -17865,7 +17947,7 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v18, v18, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, s8, v19
; VI-NEXT: v_or_b32_e32 v18, v20, v18
-; VI-NEXT: v_mov_b32_e32 v20, s7
+; VI-NEXT: v_mov_b32_e32 v20, s31
; VI-NEXT: v_add_f16_sdwa v20, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, s6, v19
; VI-NEXT: v_or_b32_e32 v19, v19, v20
@@ -21734,6 +21816,7 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v20, s36, 0
; VI-NEXT: v_writelane_b32 v20, s37, 1
@@ -21751,73 +21834,71 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v20, s65, 13
; VI-NEXT: v_writelane_b32 v20, s66, 14
; VI-NEXT: v_writelane_b32 v20, s67, 15
-; VI-NEXT: v_writelane_b32 v20, s30, 16
-; VI-NEXT: v_writelane_b32 v20, s31, 17
; VI-NEXT: v_readfirstlane_b32 s7, v5
-; VI-NEXT: v_readfirstlane_b32 s9, v4
+; VI-NEXT: v_readfirstlane_b32 vcc_hi, v4
; VI-NEXT: v_readfirstlane_b32 s12, v3
; VI-NEXT: v_readfirstlane_b32 s15, v2
; VI-NEXT: v_readfirstlane_b32 s74, v1
; VI-NEXT: v_readfirstlane_b32 s77, v0
; VI-NEXT: s_lshr_b32 s11, s29, 16
; VI-NEXT: s_lshr_b32 s13, s28, 16
-; VI-NEXT: s_lshr_b32 s72, s27, 16
-; VI-NEXT: s_lshr_b32 s75, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s27, 16
+; VI-NEXT: s_lshr_b32 s60, s26, 16
+; VI-NEXT: s_lshr_b32 s89, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s72, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s78, s19, 16
+; VI-NEXT: s_lshr_b32 s79, s18, 16
+; VI-NEXT: s_lshr_b32 s56, s17, 16
+; VI-NEXT: s_lshr_b32 s57, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
-; VI-NEXT: s_lshr_b32 s8, s9, 16
+; VI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; VI-NEXT: s_lshr_b32 s10, s12, 16
; VI-NEXT: s_lshr_b32 s14, s15, 16
-; VI-NEXT: s_lshr_b32 s73, s74, 16
-; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s59, s74, 16
+; VI-NEXT: s_lshr_b32 s61, s77, 16
; VI-NEXT: v_readfirstlane_b32 s4, v6
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
; VI-NEXT: s_lshl_b32 s5, s13, 16
@@ -21826,10 +21907,10 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s49, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
@@ -21837,7 +21918,7 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s12
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
@@ -21846,8 +21927,49 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; VI-NEXT: s_mov_b32 s73, s57
+; VI-NEXT: v_writelane_b32 v21, s72, 0
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s13
+; VI-NEXT: s_mov_b32 s13, s11
+; VI-NEXT: s_mov_b32 s11, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s56
+; VI-NEXT: s_mov_b32 s76, s58
+; VI-NEXT: s_mov_b32 s75, s59
+; VI-NEXT: v_writelane_b32 v21, s77, 1
+; VI-NEXT: s_mov_b32 s77, s74
+; VI-NEXT: s_mov_b32 s74, s15
+; VI-NEXT: s_mov_b32 s15, s12
+; VI-NEXT: s_mov_b32 s12, s79
+; VI-NEXT: s_mov_b32 s79, s60
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, s78
+; VI-NEXT: s_mov_b32 s78, s61
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b32 s61, s78
+; VI-NEXT: s_mov_b32 s78, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: s_mov_b32 s60, s79
+; VI-NEXT: s_mov_b32 s79, s12
+; VI-NEXT: s_mov_b32 s12, s15
+; VI-NEXT: s_mov_b32 s15, s74
+; VI-NEXT: s_mov_b32 s74, s77
+; VI-NEXT: v_readlane_b32 s77, v21, 1
+; VI-NEXT: s_mov_b32 s59, s75
+; VI-NEXT: s_mov_b32 s58, s76
+; VI-NEXT: s_mov_b32 s57, s73
+; VI-NEXT: s_mov_b32 s56, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s11
+; VI-NEXT: s_mov_b32 s11, s13
+; VI-NEXT: s_mov_b32 s13, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: v_readlane_b32 s72, v21, 0
; VI-NEXT: .LBB43_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -21856,62 +21978,62 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -21923,39 +22045,38 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s12, 0xffff
+; VI-NEXT: s_add_i32 s4, s12, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, vcc_hi, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v20, 16
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -21976,7 +22097,6 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v17, s53
; VI-NEXT: v_mov_b32_e32 v18, s54
; VI-NEXT: v_mov_b32_e32 v19, s55
-; VI-NEXT: v_readlane_b32 s31, v20, 17
; VI-NEXT: v_readlane_b32 s67, v20, 15
; VI-NEXT: v_readlane_b32 s66, v20, 14
; VI-NEXT: v_readlane_b32 s65, v20, 13
@@ -21995,6 +22115,7 @@ define inreg <10 x i64> @bitcast_v40i16_to_v10i64_scalar(<40 x i16> inreg %a, i3
; VI-NEXT: v_readlane_b32 s36, v20, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -25008,24 +25129,25 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s91, s20, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s30, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: s_lshr_b32 s75, s73, 16
; VI-NEXT: s_lshr_b32 s78, s76, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v6
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v6
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB47_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s30, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s37, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s18
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s38, s4, s5
@@ -25078,11 +25200,12 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB47_3
; VI-NEXT: .LBB47_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB47_3: ; %Flow
@@ -25092,8 +25215,8 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB47_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v19, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s31
-; VI-NEXT: v_mov_b32_e32 v2, s30
+; VI-NEXT: v_mov_b32_e32 v0, s30
+; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v19
; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -25168,7 +25291,7 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v18, v18, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, s8, v19
; VI-NEXT: v_or_b32_e32 v18, v20, v18
-; VI-NEXT: v_mov_b32_e32 v20, s7
+; VI-NEXT: v_mov_b32_e32 v20, s31
; VI-NEXT: v_add_f16_sdwa v20, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, s6, v19
; VI-NEXT: v_or_b32_e32 v19, v19, v20
@@ -28178,6 +28301,7 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v20, s36, 0
; VI-NEXT: v_writelane_b32 v20, s37, 1
@@ -28195,73 +28319,71 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v20, s65, 13
; VI-NEXT: v_writelane_b32 v20, s66, 14
; VI-NEXT: v_writelane_b32 v20, s67, 15
-; VI-NEXT: v_writelane_b32 v20, s30, 16
-; VI-NEXT: v_writelane_b32 v20, s31, 17
; VI-NEXT: v_readfirstlane_b32 s7, v5
-; VI-NEXT: v_readfirstlane_b32 s9, v4
+; VI-NEXT: v_readfirstlane_b32 vcc_hi, v4
; VI-NEXT: v_readfirstlane_b32 s12, v3
; VI-NEXT: v_readfirstlane_b32 s15, v2
; VI-NEXT: v_readfirstlane_b32 s74, v1
; VI-NEXT: v_readfirstlane_b32 s77, v0
; VI-NEXT: s_lshr_b32 s11, s29, 16
; VI-NEXT: s_lshr_b32 s13, s28, 16
-; VI-NEXT: s_lshr_b32 s72, s27, 16
-; VI-NEXT: s_lshr_b32 s75, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s27, 16
+; VI-NEXT: s_lshr_b32 s60, s26, 16
+; VI-NEXT: s_lshr_b32 s89, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s72, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s78, s19, 16
+; VI-NEXT: s_lshr_b32 s79, s18, 16
+; VI-NEXT: s_lshr_b32 s56, s17, 16
+; VI-NEXT: s_lshr_b32 s57, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
-; VI-NEXT: s_lshr_b32 s8, s9, 16
+; VI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; VI-NEXT: s_lshr_b32 s10, s12, 16
; VI-NEXT: s_lshr_b32 s14, s15, 16
-; VI-NEXT: s_lshr_b32 s73, s74, 16
-; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s59, s74, 16
+; VI-NEXT: s_lshr_b32 s61, s77, 16
; VI-NEXT: v_readfirstlane_b32 s4, v6
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB51_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
; VI-NEXT: s_lshl_b32 s5, s13, 16
@@ -28270,10 +28392,10 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s49, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
@@ -28281,7 +28403,7 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s12
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
@@ -28290,8 +28412,49 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB51_3
; VI-NEXT: .LBB51_2:
-; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; VI-NEXT: s_mov_b32 s73, s57
+; VI-NEXT: v_writelane_b32 v21, s72, 0
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s13
+; VI-NEXT: s_mov_b32 s13, s11
+; VI-NEXT: s_mov_b32 s11, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s56
+; VI-NEXT: s_mov_b32 s76, s58
+; VI-NEXT: s_mov_b32 s75, s59
+; VI-NEXT: v_writelane_b32 v21, s77, 1
+; VI-NEXT: s_mov_b32 s77, s74
+; VI-NEXT: s_mov_b32 s74, s15
+; VI-NEXT: s_mov_b32 s15, s12
+; VI-NEXT: s_mov_b32 s12, s79
+; VI-NEXT: s_mov_b32 s79, s60
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, s78
+; VI-NEXT: s_mov_b32 s78, s61
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: s_mov_b32 s61, s78
+; VI-NEXT: s_mov_b32 s78, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: s_mov_b32 s60, s79
+; VI-NEXT: s_mov_b32 s79, s12
+; VI-NEXT: s_mov_b32 s12, s15
+; VI-NEXT: s_mov_b32 s15, s74
+; VI-NEXT: s_mov_b32 s74, s77
+; VI-NEXT: v_readlane_b32 s77, v21, 1
+; VI-NEXT: s_mov_b32 s59, s75
+; VI-NEXT: s_mov_b32 s58, s76
+; VI-NEXT: s_mov_b32 s57, s73
+; VI-NEXT: s_mov_b32 s56, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s11
+; VI-NEXT: s_mov_b32 s11, s13
+; VI-NEXT: s_mov_b32 s13, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: v_readlane_b32 s72, v21, 0
; VI-NEXT: .LBB51_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -28300,62 +28463,62 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s57, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s56, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
@@ -28367,39 +28530,38 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s11, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s12, s12, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s12, 0xffff
+; VI-NEXT: s_add_i32 s4, s12, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, vcc_hi, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: .LBB51_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v20, 16
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -28420,7 +28582,6 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v17, s53
; VI-NEXT: v_mov_b32_e32 v18, s54
; VI-NEXT: v_mov_b32_e32 v19, s55
-; VI-NEXT: v_readlane_b32 s31, v20, 17
; VI-NEXT: v_readlane_b32 s67, v20, 15
; VI-NEXT: v_readlane_b32 s66, v20, 14
; VI-NEXT: v_readlane_b32 s65, v20, 13
@@ -28439,6 +28600,7 @@ define inreg <10 x double> @bitcast_v40i16_to_v10f64_scalar(<40 x i16> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v20, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -31585,24 +31747,25 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a
; VI-NEXT: s_lshr_b32 s91, s20, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s17, 16
+; VI-NEXT: s_lshr_b32 s30, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s12, s11, 16
; VI-NEXT: s_lshr_b32 s15, s14, 16
; VI-NEXT: s_lshr_b32 s75, s73, 16
; VI-NEXT: s_lshr_b32 s78, s76, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v6
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v6
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB55_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s30, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s37, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s18
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s38, s4, s5
@@ -31655,11 +31818,12 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB55_3
; VI-NEXT: .LBB55_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB55_3: ; %Flow
@@ -31669,8 +31833,8 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a
; VI-NEXT: s_cbranch_scc1 .LBB55_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v19, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s31
-; VI-NEXT: v_mov_b32_e32 v2, s30
+; VI-NEXT: v_mov_b32_e32 v0, s30
+; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v19
; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -31745,7 +31909,7 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v18, v18, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, s8, v19
; VI-NEXT: v_or_b32_e32 v18, v20, v18
-; VI-NEXT: v_mov_b32_e32 v20, s7
+; VI-NEXT: v_mov_b32_e32 v20, s31
; VI-NEXT: v_add_f16_sdwa v20, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, s6, v19
; VI-NEXT: v_or_b32_e32 v19, v19, v20
@@ -33028,8 +33192,9 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v20, s34, 0
; SI-NEXT: v_writelane_b32 v20, s35, 1
; SI-NEXT: v_writelane_b32 v20, s36, 2
@@ -33038,130 +33203,140 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v20, s39, 5
; SI-NEXT: v_writelane_b32 v20, s48, 6
; SI-NEXT: v_writelane_b32 v20, s49, 7
-; SI-NEXT: v_writelane_b32 v20, s50, 8
-; SI-NEXT: v_writelane_b32 v20, s51, 9
-; SI-NEXT: v_writelane_b32 v20, s52, 10
-; SI-NEXT: v_writelane_b32 v20, s53, 11
-; SI-NEXT: v_writelane_b32 v20, s54, 12
-; SI-NEXT: v_writelane_b32 v20, s55, 13
-; SI-NEXT: v_writelane_b32 v20, s64, 14
-; SI-NEXT: v_writelane_b32 v20, s65, 15
-; SI-NEXT: v_writelane_b32 v20, s66, 16
-; SI-NEXT: v_writelane_b32 v20, s67, 17
-; SI-NEXT: v_writelane_b32 v20, s68, 18
-; SI-NEXT: v_writelane_b32 v20, s69, 19
-; SI-NEXT: v_writelane_b32 v20, s30, 20
-; SI-NEXT: v_writelane_b32 v20, s31, 21
-; SI-NEXT: v_readfirstlane_b32 s67, v5
-; SI-NEXT: v_readfirstlane_b32 s69, v4
-; SI-NEXT: v_readfirstlane_b32 s64, v3
-; SI-NEXT: v_readfirstlane_b32 s66, v2
-; SI-NEXT: v_readfirstlane_b32 s53, v1
-; SI-NEXT: v_readfirstlane_b32 s55, v0
-; SI-NEXT: s_lshr_b32 s34, s29, 16
-; SI-NEXT: s_lshr_b32 s52, s28, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s51, s26, 16
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s50, s24, 16
+; SI-NEXT: v_writelane_b32 v20, s30, 8
+; SI-NEXT: v_writelane_b32 v20, s31, 9
+; SI-NEXT: v_readfirstlane_b32 s11, v1
+; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane
+; SI-NEXT: v_readfirstlane_b32 s5, v5
+; SI-NEXT: v_readfirstlane_b32 s49, v4
+; SI-NEXT: v_readfirstlane_b32 s9, v3
+; SI-NEXT: v_readfirstlane_b32 s48, v2
+; SI-NEXT: v_readfirstlane_b32 s38, v0
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v21, s11, 0
+; SI-NEXT: s_lshr_b32 s77, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s28, 16
+; SI-NEXT: s_lshr_b32 s75, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s26, 16
+; SI-NEXT: s_lshr_b32 s73, s25, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s21, 16
-; SI-NEXT: s_lshr_b32 s48, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s20, 16
; SI-NEXT: s_lshr_b32 s95, s19, 16
-; SI-NEXT: s_lshr_b32 s39, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s18, 16
; SI-NEXT: s_lshr_b32 s94, s17, 16
-; SI-NEXT: s_lshr_b32 s38, s16, 16
-; SI-NEXT: s_lshr_b32 s37, s67, 16
-; SI-NEXT: s_lshr_b32 s68, s69, 16
-; SI-NEXT: s_lshr_b32 s36, s64, 16
-; SI-NEXT: s_lshr_b32 s65, s66, 16
-; SI-NEXT: s_lshr_b32 s35, s53, 16
-; SI-NEXT: s_lshr_b32 s54, s55, 16
+; SI-NEXT: s_lshr_b32 s57, s16, 16
+; SI-NEXT: s_lshr_b32 s91, s5, 16
+; SI-NEXT: s_lshr_b32 s7, s49, 16
+; SI-NEXT: s_lshr_b32 s89, s9, 16
+; SI-NEXT: s_lshr_b32 s39, s48, 16
+; SI-NEXT: s_lshr_b32 s79, s11, 16
+; SI-NEXT: s_lshr_b32 s59, s38, 16
; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: v_writelane_b32 v21, s9, 1
; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_writelane_b32 v21, s5, 2
+; SI-NEXT: v_writelane_b32 v21, s7, 3
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_and_b32 s15, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s94, 16
+; SI-NEXT: s_lshl_b32 s56, s57, 16
+; SI-NEXT: s_mov_b32 s13, s57
+; SI-NEXT: s_or_b32 s57, s15, s41
+; SI-NEXT: s_and_b32 s41, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s95, 16
+; SI-NEXT: s_lshl_b32 s46, s59, 16
+; SI-NEXT: s_mov_b32 s15, s59
+; SI-NEXT: s_or_b32 s59, s41, s43
+; SI-NEXT: s_and_b32 s41, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s43, vcc_lo, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s56, s38, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s95, 16
+; SI-NEXT: s_or_b32 s61, s41, s43
+; SI-NEXT: s_and_b32 s41, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT: s_or_b32 s42, s4, s56
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s39, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s58, s30, 16
+; SI-NEXT: s_or_b32 s63, s41, s43
+; SI-NEXT: s_and_b32 s41, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s73, 16
; SI-NEXT: s_or_b32 s40, s4, s58
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s48, 16
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s60, s31, 16
+; SI-NEXT: s_mov_b32 s78, s73
+; SI-NEXT: s_or_b32 s73, s41, s43
+; SI-NEXT: s_and_b32 s41, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s75, 16
; SI-NEXT: s_or_b32 s14, s4, s60
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s49, 16
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_lshl_b32 s62, s34, 16
+; SI-NEXT: s_mov_b32 s88, s75
+; SI-NEXT: s_or_b32 s75, s41, s43
+; SI-NEXT: s_and_b32 s41, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s77, 16
; SI-NEXT: s_or_b32 s12, s4, s62
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s50, 16
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_lshl_b32 s72, s35, 16
+; SI-NEXT: s_mov_b32 s90, s77
+; SI-NEXT: s_or_b32 s77, s41, s43
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s79, 16
; SI-NEXT: s_or_b32 s10, s4, s72
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s51, 16
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s34, 16
-; SI-NEXT: s_or_b32 s8, s4, s74
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s52, 16
-; SI-NEXT: s_or_b32 s77, s5, s7
-; SI-NEXT: s_and_b32 s5, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s35, 16
-; SI-NEXT: s_or_b32 s6, s4, s76
-; SI-NEXT: s_and_b32 s4, s55, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s54, 16
-; SI-NEXT: s_or_b32 s47, s5, s7
-; SI-NEXT: s_and_b32 s5, s64, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s36, 16
-; SI-NEXT: s_or_b32 s4, s4, s46
-; SI-NEXT: s_lshl_b32 s44, s65, 16
-; SI-NEXT: s_or_b32 s45, s5, s7
-; SI-NEXT: s_and_b32 s5, s67, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s37, 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[46:47], 16
-; SI-NEXT: s_and_b32 s46, s66, 0xffff
-; SI-NEXT: s_or_b32 s91, s5, s7
-; SI-NEXT: s_lshl_b32 s90, s68, 16
-; SI-NEXT: s_or_b32 s46, s46, s44
-; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s69, 0xffff
-; SI-NEXT: s_mov_b32 s43, s57
-; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
+; SI-NEXT: s_lshl_b32 s74, s36, 16
+; SI-NEXT: s_or_b32 s47, s11, s41
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s89, 16
; SI-NEXT: s_mov_b32 s41, s59
; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
+; SI-NEXT: s_or_b32 s8, s4, s74
+; SI-NEXT: s_and_b32 s4, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s37, 16
+; SI-NEXT: s_or_b32 s45, s9, s11
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s91, 16
+; SI-NEXT: s_mov_b32 s59, s15
; SI-NEXT: s_mov_b32 s15, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_mov_b32 s13, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_mov_b32 s11, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
+; SI-NEXT: s_or_b32 s6, s4, s76
+; SI-NEXT: s_and_b32 s4, s38, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s39, 16
+; SI-NEXT: s_or_b32 s93, s5, s9
+; SI-NEXT: s_mov_b32 s73, s78
; SI-NEXT: s_mov_b32 s9, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
+; SI-NEXT: s_mov_b32 s61, s79
+; SI-NEXT: s_lshr_b64 s[78:79], s[46:47], 16
+; SI-NEXT: s_or_b32 s4, s4, s46
+; SI-NEXT: s_lshl_b32 s92, s7, 16
+; SI-NEXT: s_mov_b32 s75, s88
; SI-NEXT: s_mov_b32 s7, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
+; SI-NEXT: s_mov_b32 s79, s61
+; SI-NEXT: s_and_b32 s46, s48, 0xffff
+; SI-NEXT: s_mov_b32 s61, s89
+; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16
+; SI-NEXT: s_mov_b32 s43, s57
+; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16
+; SI-NEXT: s_mov_b32 s77, s90
+; SI-NEXT: s_or_b32 s46, s46, s44
+; SI-NEXT: s_mov_b32 s89, s61
+; SI-NEXT: s_and_b32 s44, s49, 0xffff
+; SI-NEXT: s_mov_b32 s61, s91
+; SI-NEXT: s_lshr_b64 s[90:91], s[92:93], 16
+; SI-NEXT: s_mov_b32 s57, s13
+; SI-NEXT: s_mov_b32 s13, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_mov_b32 s5, s47
; SI-NEXT: s_mov_b32 s47, s45
-; SI-NEXT: s_or_b32 s44, s44, s90
-; SI-NEXT: s_mov_b32 s45, s91
-; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16
+; SI-NEXT: s_or_b32 s44, s44, s92
+; SI-NEXT: s_mov_b32 s45, s93
+; SI-NEXT: s_mov_b32 s91, s61
; SI-NEXT: s_mov_b64 s[92:93], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
@@ -33188,65 +33363,69 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[92:93], s[92:93], exec
-; SI-NEXT: s_cselect_b32 s57, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s57, 1
+; SI-NEXT: s_cselect_b32 s61, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s61, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: s_and_b32 s4, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s67, s67, 3
+; SI-NEXT: s_add_i32 s4, s49, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v21, 3
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s67, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s37, 16
+; SI-NEXT: v_readlane_b32 s4, v21, 2
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s66, s66, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s66, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_add_i32 s4, s48, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s64, s64, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s64, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s36, 16
+; SI-NEXT: v_readlane_b32 s4, v21, 1
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s89, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s55, s55, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s55, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s54, 16
-; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: s_add_i32 s4, s38, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s35, 16
+; SI-NEXT: v_readlane_b32 s5, v21, 0
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s79, 16
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s52, 16
+; SI-NEXT: s_lshl_b32 s7, s37, 16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s34, 16
+; SI-NEXT: s_lshl_b32 s8, s77, 16
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s51, 16
+; SI-NEXT: s_lshl_b32 s9, s36, 16
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s31, 16
+; SI-NEXT: s_lshl_b32 s10, s75, 16
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s50, 16
+; SI-NEXT: s_lshl_b32 s11, s35, 16
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s30, 16
+; SI-NEXT: s_lshl_b32 s12, s73, 16
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s49, 16
+; SI-NEXT: s_lshl_b32 s13, s34, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s23, 0xffff
@@ -33254,7 +33433,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s48, 16
+; SI-NEXT: s_lshl_b32 s15, s31, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: s_and_b32 s15, s21, 0xffff
@@ -33262,7 +33441,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s15, s20, s15
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s39, 16
+; SI-NEXT: s_lshl_b32 s20, s30, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s40, s18, 0x30000
@@ -33272,13 +33451,12 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s41, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s38, 16
+; SI-NEXT: s_lshl_b32 s18, s57, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s42, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
; SI-NEXT: s_lshl_b32 s17, s94, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
@@ -33287,31 +33465,32 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_add_i32 s43, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[46:47], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
; SI-NEXT: s_lshr_b32 s94, s43, 16
; SI-NEXT: s_lshr_b32 s95, s41, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s15, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s13, 16
-; SI-NEXT: s_lshr_b32 s30, s11, 16
-; SI-NEXT: s_lshr_b32 s31, s9, 16
-; SI-NEXT: s_lshr_b32 s34, s7, 16
-; SI-NEXT: s_lshr_b32 s35, s5, 16
-; SI-NEXT: s_lshr_b32 s36, s47, 16
-; SI-NEXT: s_lshr_b32 s37, s45, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s75, s9, 16
+; SI-NEXT: s_lshr_b32 s77, s7, 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s47, 16
+; SI-NEXT: s_lshr_b32 s91, s45, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s16, s42, 0xffff
; SI-NEXT: s_lshl_b32 s17, s56, 16
@@ -33341,39 +33520,39 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: s_lshl_b32 s20, s72, 16
; SI-NEXT: s_or_b32 s10, s10, s20
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s30, 16
+; SI-NEXT: s_lshl_b32 s20, s73, 16
; SI-NEXT: s_or_b32 s11, s11, s20
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s20, s74, 16
; SI-NEXT: s_or_b32 s8, s8, s20
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s31, 16
+; SI-NEXT: s_lshl_b32 s20, s75, 16
; SI-NEXT: s_or_b32 s9, s9, s20
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s20, s76, 16
; SI-NEXT: s_or_b32 s6, s6, s20
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s34, 16
+; SI-NEXT: s_lshl_b32 s20, s77, 16
; SI-NEXT: s_or_b32 s7, s7, s20
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s20, s78, 16
; SI-NEXT: s_or_b32 s4, s4, s20
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s35, 16
+; SI-NEXT: s_lshl_b32 s20, s79, 16
; SI-NEXT: s_or_b32 s5, s5, s20
; SI-NEXT: s_and_b32 s20, s46, 0xffff
; SI-NEXT: s_lshl_b32 s21, s88, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s36, 16
+; SI-NEXT: s_lshl_b32 s22, s89, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s44, 0xffff
; SI-NEXT: s_lshl_b32 s23, s90, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s37, 16
+; SI-NEXT: s_lshl_b32 s24, s91, 16
; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: v_readlane_b32 s30, v20, 20
+; SI-NEXT: v_readlane_b32 s30, v20, 8
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -33394,19 +33573,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v17, s21
; SI-NEXT: v_mov_b32_e32 v18, s22
; SI-NEXT: v_mov_b32_e32 v19, s23
-; SI-NEXT: v_readlane_b32 s31, v20, 21
-; SI-NEXT: v_readlane_b32 s69, v20, 19
-; SI-NEXT: v_readlane_b32 s68, v20, 18
-; SI-NEXT: v_readlane_b32 s67, v20, 17
-; SI-NEXT: v_readlane_b32 s66, v20, 16
-; SI-NEXT: v_readlane_b32 s65, v20, 15
-; SI-NEXT: v_readlane_b32 s64, v20, 14
-; SI-NEXT: v_readlane_b32 s55, v20, 13
-; SI-NEXT: v_readlane_b32 s54, v20, 12
-; SI-NEXT: v_readlane_b32 s53, v20, 11
-; SI-NEXT: v_readlane_b32 s52, v20, 10
-; SI-NEXT: v_readlane_b32 s51, v20, 9
-; SI-NEXT: v_readlane_b32 s50, v20, 8
+; SI-NEXT: v_readlane_b32 s31, v20, 9
; SI-NEXT: v_readlane_b32 s49, v20, 7
; SI-NEXT: v_readlane_b32 s48, v20, 6
; SI-NEXT: v_readlane_b32 s39, v20, 5
@@ -33417,6 +33584,7 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v20, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -34840,18 +35008,11 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i
; SI-LABEL: bitcast_v40f16_to_v40i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s9, v5
; SI-NEXT: v_readfirstlane_b32 s6, v4
; SI-NEXT: v_readfirstlane_b32 s10, v3
@@ -34990,103 +35151,115 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v3, s21
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s12
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v23, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23
; SI-NEXT: v_cvt_f32_f16_e32 v19, s19
; SI-NEXT: v_or_b32_e32 v5, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s11
-; SI-NEXT: v_cvt_f32_f16_e32 v23, s17
+; SI-NEXT: v_cvt_f32_f16_e32 v25, s17
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v25
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v3
; SI-NEXT: v_cvt_f32_f16_e32 v17, s43
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24
; SI-NEXT: v_or_b32_e32 v3, v19, v1
; SI-NEXT: v_cvt_f32_f16_e32 v19, s10
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v43
-; SI-NEXT: v_or_b32_e32 v1, v23, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v23, s9
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
+; SI-NEXT: v_or_b32_e32 v1, v25, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v25, s9
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
+; SI-NEXT: s_waitcnt expcnt(4)
; SI-NEXT: v_cvt_f16_f32_e32 v40, v17
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v19
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
-; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v23
+; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v40
-; SI-NEXT: v_or_b32_e32 v17, v17, v23
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v40
+; SI-NEXT: v_or_b32_e32 v17, v17, v25
+; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v50
; SI-NEXT: v_cvt_f32_f16_e32 v22, s24
-; SI-NEXT: v_or_b32_e32 v19, v19, v23
-; SI-NEXT: v_cvt_f32_f16_e32 v23, s26
-; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
+; SI-NEXT: v_or_b32_e32 v19, v19, v25
+; SI-NEXT: v_cvt_f32_f16_e32 v25, s26
+; SI-NEXT: v_cvt_f32_f16_e32 v27, s28
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s8
+; SI-NEXT: v_cvt_f32_f16_e32 v29, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v30, s6
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v59, v20, v4
-; SI-NEXT: v_or_b32_e32 v57, v21, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v20, s28
-; SI-NEXT: v_or_b32_e32 v56, v22, v8
-; SI-NEXT: v_or_b32_e32 v46, v23, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v21, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v22, s7
-; SI-NEXT: v_cvt_f32_f16_e32 v23, s6
-; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
+; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_or_b32_e32 v58, v20, v12
-; SI-NEXT: v_or_b32_e32 v47, v21, v14
-; SI-NEXT: v_or_b32_e32 v45, v22, v16
-; SI-NEXT: v_or_b32_e32 v44, v23, v18
-; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[36:37], v[2:3], 16
+; SI-NEXT: v_or_b32_e32 v20, v20, v4
+; SI-NEXT: v_or_b32_e32 v21, v21, v6
+; SI-NEXT: v_or_b32_e32 v22, v22, v8
+; SI-NEXT: v_or_b32_e32 v25, v25, v10
; SI-NEXT: v_lshr_b64 v[34:35], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[32:33], v[6:7], 16
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_or_b32_e32 v41, v27, v12
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_or_b32_e32 v42, v28, v14
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v43, v29, v16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v44, v30, v18
+; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[36:37], v[2:3], 16
+; SI-NEXT: v_mov_b32_e32 v2, v26
+; SI-NEXT: v_mov_b32_e32 v35, v20
+; SI-NEXT: v_mov_b32_e32 v4, v24
+; SI-NEXT: v_mov_b32_e32 v33, v21
+; SI-NEXT: v_mov_b32_e32 v6, v23
; SI-NEXT: v_lshr_b64 v[30:31], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v8, v22
; SI-NEXT: v_lshr_b64 v[28:29], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v10, v25
; SI-NEXT: v_lshr_b64 v[26:27], v[12:13], 16
; SI-NEXT: v_lshr_b64 v[24:25], v[14:15], 16
; SI-NEXT: v_lshr_b64 v[22:23], v[16:17], 16
; SI-NEXT: v_lshr_b64 v[20:21], v[18:19], 16
+; SI-NEXT: v_mov_b32_e32 v12, v41
+; SI-NEXT: v_mov_b32_e32 v14, v42
+; SI-NEXT: v_mov_b32_e32 v16, v43
+; SI-NEXT: v_mov_b32_e32 v21, v44
+; SI-NEXT: v_mov_b32_e32 v18, v40
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
; SI-NEXT: v_mov_b32_e32 v50, s58
-; SI-NEXT: v_mov_b32_e32 v40, s43
+; SI-NEXT: v_mov_b32_e32 v18, s43
; SI-NEXT: v_mov_b32_e32 v51, s47
; SI-NEXT: v_mov_b32_e32 v52, s42
; SI-NEXT: v_mov_b32_e32 v53, s40
; SI-NEXT: v_mov_b32_e32 v54, s15
; SI-NEXT: v_mov_b32_e32 v55, s14
-; SI-NEXT: v_mov_b32_e32 v41, s13
-; SI-NEXT: v_mov_b32_e32 v42, s12
-; SI-NEXT: v_mov_b32_e32 v43, s11
-; SI-NEXT: v_mov_b32_e32 v44, s6
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v45, s7
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v47, s8
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v58, s28
-; SI-NEXT: v_mov_b32_e32 v46, s26
-; SI-NEXT: v_mov_b32_e32 v56, s24
-; SI-NEXT: v_mov_b32_e32 v57, s22
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v59, s20
+; SI-NEXT: v_mov_b32_e32 v6, s13
+; SI-NEXT: v_mov_b32_e32 v4, s12
+; SI-NEXT: v_mov_b32_e32 v2, s11
+; SI-NEXT: v_mov_b32_e32 v21, s6
+; SI-NEXT: v_mov_b32_e32 v16, s7
+; SI-NEXT: v_mov_b32_e32 v14, s8
+; SI-NEXT: v_mov_b32_e32 v12, s28
+; SI-NEXT: v_mov_b32_e32 v10, s26
+; SI-NEXT: v_mov_b32_e32 v8, s24
+; SI-NEXT: v_mov_b32_e32 v33, s22
+; SI-NEXT: v_mov_b32_e32 v35, s20
; SI-NEXT: v_mov_b32_e32 v49, s18
; SI-NEXT: v_mov_b32_e32 v48, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -35110,77 +35283,71 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v22, s45
; SI-NEXT: v_mov_b32_e32 v20, s44
; SI-NEXT: .LBB59_6: ; %end
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v48
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v48
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v0, v23, v0
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v36
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v49
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v49
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v2, v23, v2
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v34
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v59
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v35
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v4, v23, v4
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v57
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v33
+; SI-NEXT: v_or_b32_e32 v6, v23, v6
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v55
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v56
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v30
-; SI-NEXT: v_or_b32_e32 v8, v8, v10
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v55
+; SI-NEXT: v_or_b32_e32 v7, v7, v23
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v30
+; SI-NEXT: v_or_b32_e32 v8, v8, v23
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v54
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v28
-; SI-NEXT: v_or_b32_e32 v10, v10, v12
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v54
+; SI-NEXT: v_or_b32_e32 v9, v9, v23
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v28
+; SI-NEXT: v_or_b32_e32 v10, v10, v23
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v53
-; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v26
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v53
+; SI-NEXT: v_or_b32_e32 v11, v11, v23
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v26
+; SI-NEXT: v_or_b32_e32 v12, v12, v23
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v52
-; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v47
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v51
-; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v22
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v52
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v13, v13, v23
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v44
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v14, v14, v23
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v51
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v18, v18, v20
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v50
+; SI-NEXT: v_or_b32_e32 v15, v15, v23
+; SI-NEXT: v_or_b32_e32 v16, v16, v22
; SI-NEXT: v_or_b32_e32 v19, v19, v20
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
index 2a5574397fad8..2c7d380800dad 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
@@ -5553,8 +5553,9 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v22, s36, 0
; SI-NEXT: v_writelane_b32 v22, s37, 1
; SI-NEXT: v_writelane_b32 v22, s38, 2
@@ -5571,92 +5572,90 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_writelane_b32 v22, s30, 16
-; SI-NEXT: v_writelane_b32 v22, s31, 17
-; SI-NEXT: v_readfirstlane_b32 s7, v7
-; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v7
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
; SI-NEXT: v_readfirstlane_b32 s72, v3
; SI-NEXT: v_readfirstlane_b32 s75, v2
; SI-NEXT: v_readfirstlane_b32 s79, v1
-; SI-NEXT: v_readfirstlane_b32 s90, v0
+; SI-NEXT: v_readfirstlane_b32 s94, v0
; SI-NEXT: s_lshr_b32 s14, s29, 16
-; SI-NEXT: s_lshr_b32 s73, s28, 16
-; SI-NEXT: s_lshr_b32 s76, s27, 16
-; SI-NEXT: s_lshr_b32 s78, s26, 16
-; SI-NEXT: s_lshr_b32 s88, s25, 16
-; SI-NEXT: s_lshr_b32 s91, s24, 16
-; SI-NEXT: s_lshr_b32 s92, s23, 16
-; SI-NEXT: s_lshr_b32 s93, s22, 16
-; SI-NEXT: s_lshr_b32 s94, s21, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
-; SI-NEXT: s_lshr_b32 s8, s9, 16
+; SI-NEXT: s_lshr_b32 s60, s28, 16
+; SI-NEXT: s_lshr_b32 s62, s27, 16
+; SI-NEXT: s_lshr_b32 s73, s26, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s24, 16
+; SI-NEXT: s_lshr_b32 s78, s23, 16
+; SI-NEXT: s_lshr_b32 s88, s22, 16
+; SI-NEXT: s_lshr_b32 s95, s21, 16
+; SI-NEXT: s_lshr_b32 s91, s20, 16
+; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 s93, s18, 16
+; SI-NEXT: s_lshr_b32 s58, s17, 16
+; SI-NEXT: s_lshr_b32 s59, s16, 16
+; SI-NEXT: s_lshr_b32 s6, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s15, s72, 16
-; SI-NEXT: s_lshr_b32 s74, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s79, 16
-; SI-NEXT: s_lshr_b32 s89, s90, 16
+; SI-NEXT: s_lshr_b32 s61, s75, 16
+; SI-NEXT: s_lshr_b32 s63, s79, 16
+; SI-NEXT: s_lshr_b32 s76, s94, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s72, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
@@ -5667,17 +5666,71 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s11, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s55, s4, s5
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
-; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
+; SI-NEXT: s_mov_b32 s89, s74
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s88, 0
+; SI-NEXT: v_writelane_b32 v23, s73, 1
+; SI-NEXT: s_mov_b32 s73, s15
+; SI-NEXT: s_mov_b32 s15, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s58
+; SI-NEXT: s_mov_b32 s74, s59
+; SI-NEXT: s_mov_b32 s9, s92
+; SI-NEXT: s_mov_b32 s92, s77
+; SI-NEXT: s_mov_b32 s77, s60
+; SI-NEXT: s_mov_b32 s7, s91
+; SI-NEXT: s_mov_b32 s91, s76
+; SI-NEXT: s_mov_b32 s76, s61
+; SI-NEXT: s_mov_b32 s88, s62
+; SI-NEXT: s_mov_b32 s90, s79
+; SI-NEXT: s_mov_b32 s79, s75
+; SI-NEXT: s_mov_b32 s75, s72
+; SI-NEXT: s_mov_b32 s72, s13
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s93
+; SI-NEXT: s_mov_b32 s93, s78
+; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s78, s93
+; SI-NEXT: s_mov_b32 s93, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: s_mov_b32 s13, s72
+; SI-NEXT: s_mov_b32 s72, s75
+; SI-NEXT: s_mov_b32 s75, s79
+; SI-NEXT: s_mov_b32 s79, s90
+; SI-NEXT: s_mov_b32 s62, s88
+; SI-NEXT: s_mov_b32 s61, s76
+; SI-NEXT: s_mov_b32 s76, s91
+; SI-NEXT: s_mov_b32 s91, s7
+; SI-NEXT: s_mov_b32 s60, s77
+; SI-NEXT: s_mov_b32 s77, s92
+; SI-NEXT: s_mov_b32 s92, s9
+; SI-NEXT: s_mov_b32 s59, s74
+; SI-NEXT: s_mov_b32 s74, s89
+; SI-NEXT: s_mov_b32 s58, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s15
+; SI-NEXT: s_mov_b32 s15, s73
+; SI-NEXT: v_readlane_b32 s73, v23, 1
+; SI-NEXT: v_readlane_b32 s88, v23, 0
; SI-NEXT: .LBB15_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -5686,116 +5739,115 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s58, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s48, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_add_i32 s4, s94, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s79, s79, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_add_i32 s4, s79, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s72, s72, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s72, 0xffff
+; SI-NEXT: s_add_i32 s4, s72, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
; SI-NEXT: .LBB15_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v22, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -5818,7 +5870,6 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v19, s55
; SI-NEXT: v_mov_b32_e32 v20, s56
; SI-NEXT: v_mov_b32_e32 v21, s57
-; SI-NEXT: v_readlane_b32 s31, v22, 17
; SI-NEXT: v_readlane_b32 s67, v22, 15
; SI-NEXT: v_readlane_b32 s66, v22, 14
; SI-NEXT: v_readlane_b32 s65, v22, 13
@@ -5837,6 +5888,8 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s36, v22, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -5846,29 +5899,24 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v22, s34, 0
-; VI-NEXT: v_writelane_b32 v22, s35, 1
-; VI-NEXT: v_writelane_b32 v22, s36, 2
-; VI-NEXT: v_writelane_b32 v22, s37, 3
-; VI-NEXT: v_writelane_b32 v22, s38, 4
-; VI-NEXT: v_writelane_b32 v22, s39, 5
-; VI-NEXT: v_writelane_b32 v22, s48, 6
-; VI-NEXT: v_writelane_b32 v22, s49, 7
-; VI-NEXT: v_writelane_b32 v22, s50, 8
-; VI-NEXT: v_writelane_b32 v22, s51, 9
-; VI-NEXT: v_writelane_b32 v22, s52, 10
-; VI-NEXT: v_writelane_b32 v22, s53, 11
-; VI-NEXT: v_writelane_b32 v22, s54, 12
-; VI-NEXT: v_writelane_b32 v22, s55, 13
-; VI-NEXT: v_writelane_b32 v22, s64, 14
-; VI-NEXT: v_writelane_b32 v22, s65, 15
-; VI-NEXT: v_writelane_b32 v22, s66, 16
-; VI-NEXT: v_writelane_b32 v22, s67, 17
-; VI-NEXT: v_writelane_b32 v22, s68, 18
-; VI-NEXT: v_writelane_b32 v22, s69, 19
-; VI-NEXT: v_writelane_b32 v22, s30, 20
-; VI-NEXT: v_writelane_b32 v22, s31, 21
+; VI-NEXT: v_writelane_b32 v22, s36, 0
+; VI-NEXT: v_writelane_b32 v22, s37, 1
+; VI-NEXT: v_writelane_b32 v22, s38, 2
+; VI-NEXT: v_writelane_b32 v22, s39, 3
+; VI-NEXT: v_writelane_b32 v22, s48, 4
+; VI-NEXT: v_writelane_b32 v22, s49, 5
+; VI-NEXT: v_writelane_b32 v22, s50, 6
+; VI-NEXT: v_writelane_b32 v22, s51, 7
+; VI-NEXT: v_writelane_b32 v22, s52, 8
+; VI-NEXT: v_writelane_b32 v22, s53, 9
+; VI-NEXT: v_writelane_b32 v22, s54, 10
+; VI-NEXT: v_writelane_b32 v22, s55, 11
+; VI-NEXT: v_writelane_b32 v22, s64, 12
+; VI-NEXT: v_writelane_b32 v22, s65, 13
+; VI-NEXT: v_writelane_b32 v22, s66, 14
+; VI-NEXT: v_writelane_b32 v22, s67, 15
; VI-NEXT: v_readfirstlane_b32 s7, v7
; VI-NEXT: v_readfirstlane_b32 s9, v6
; VI-NEXT: v_readfirstlane_b32 s11, v5
@@ -5885,12 +5933,12 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s91, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s21, 16
+; VI-NEXT: s_lshr_b32 s59, s20, 16
+; VI-NEXT: s_lshr_b32 s60, s19, 16
+; VI-NEXT: s_lshr_b32 s61, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -5904,22 +5952,22 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
+; VI-NEXT: s_lshl_b32 s41, s62, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -5972,8 +6020,69 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
+; VI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v23, s75, 0
+; VI-NEXT: v_writelane_b32 v23, s72, 1
+; VI-NEXT: v_writelane_b32 v23, s13, 2
+; VI-NEXT: v_writelane_b32 v23, s11, 3
+; VI-NEXT: v_writelane_b32 v23, s9, 4
+; VI-NEXT: v_writelane_b32 v23, s7, 5
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s91
+; VI-NEXT: s_mov_b32 s91, s89
+; VI-NEXT: s_mov_b32 s89, s88
+; VI-NEXT: s_mov_b32 s88, s78
+; VI-NEXT: s_mov_b32 s78, s77
+; VI-NEXT: s_mov_b32 s77, s76
+; VI-NEXT: s_mov_b32 s76, s74
+; VI-NEXT: s_mov_b32 s74, s73
+; VI-NEXT: s_mov_b32 s73, s15
+; VI-NEXT: s_mov_b32 s15, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s58
+; VI-NEXT: s_mov_b32 s75, s79
+; VI-NEXT: s_mov_b32 s79, s59
+; VI-NEXT: s_mov_b32 s13, s90
+; VI-NEXT: s_mov_b32 s90, s60
+; VI-NEXT: s_mov_b32 s9, s61
+; VI-NEXT: s_mov_b32 s72, s62
+; VI-NEXT: s_mov_b32 s11, s63
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s72
+; VI-NEXT: s_mov_b32 s61, s9
+; VI-NEXT: s_mov_b32 s60, s90
+; VI-NEXT: s_mov_b32 s90, s13
+; VI-NEXT: s_mov_b32 s59, s79
+; VI-NEXT: s_mov_b32 s79, s75
+; VI-NEXT: s_mov_b32 s58, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s15
+; VI-NEXT: s_mov_b32 s15, s73
+; VI-NEXT: s_mov_b32 s73, s74
+; VI-NEXT: s_mov_b32 s74, s76
+; VI-NEXT: s_mov_b32 s76, s77
+; VI-NEXT: s_mov_b32 s77, s78
+; VI-NEXT: s_mov_b32 s78, s88
+; VI-NEXT: s_mov_b32 s88, s89
+; VI-NEXT: s_mov_b32 s89, s91
+; VI-NEXT: s_mov_b32 s91, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: v_readlane_b32 s7, v23, 5
+; VI-NEXT: v_readlane_b32 s9, v23, 4
+; VI-NEXT: v_readlane_b32 s11, v23, 3
+; VI-NEXT: v_readlane_b32 s13, v23, 2
+; VI-NEXT: v_readlane_b32 s72, v23, 1
+; VI-NEXT: v_readlane_b32 s75, v23, 0
; VI-NEXT: .LBB15_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -5982,32 +6091,32 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -6049,49 +6158,48 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s90, s90, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s90, 0xffff
+; VI-NEXT: s_add_i32 s4, s90, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s79, 0xffff
+; VI-NEXT: s_add_i32 s4, s79, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s77, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s75, 0xffff
+; VI-NEXT: s_add_i32 s4, s75, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s72, 0xffff
+; VI-NEXT: s_add_i32 s4, s72, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s15, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v22, 20
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -6114,29 +6222,25 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v19, s55
; VI-NEXT: v_mov_b32_e32 v20, s56
; VI-NEXT: v_mov_b32_e32 v21, s57
-; VI-NEXT: v_readlane_b32 s31, v22, 21
-; VI-NEXT: v_readlane_b32 s69, v22, 19
-; VI-NEXT: v_readlane_b32 s68, v22, 18
-; VI-NEXT: v_readlane_b32 s67, v22, 17
-; VI-NEXT: v_readlane_b32 s66, v22, 16
-; VI-NEXT: v_readlane_b32 s65, v22, 15
-; VI-NEXT: v_readlane_b32 s64, v22, 14
-; VI-NEXT: v_readlane_b32 s55, v22, 13
-; VI-NEXT: v_readlane_b32 s54, v22, 12
-; VI-NEXT: v_readlane_b32 s53, v22, 11
-; VI-NEXT: v_readlane_b32 s52, v22, 10
-; VI-NEXT: v_readlane_b32 s51, v22, 9
-; VI-NEXT: v_readlane_b32 s50, v22, 8
-; VI-NEXT: v_readlane_b32 s49, v22, 7
-; VI-NEXT: v_readlane_b32 s48, v22, 6
-; VI-NEXT: v_readlane_b32 s39, v22, 5
-; VI-NEXT: v_readlane_b32 s38, v22, 4
-; VI-NEXT: v_readlane_b32 s37, v22, 3
-; VI-NEXT: v_readlane_b32 s36, v22, 2
-; VI-NEXT: v_readlane_b32 s35, v22, 1
-; VI-NEXT: v_readlane_b32 s34, v22, 0
+; VI-NEXT: v_readlane_b32 s67, v22, 15
+; VI-NEXT: v_readlane_b32 s66, v22, 14
+; VI-NEXT: v_readlane_b32 s65, v22, 13
+; VI-NEXT: v_readlane_b32 s64, v22, 12
+; VI-NEXT: v_readlane_b32 s55, v22, 11
+; VI-NEXT: v_readlane_b32 s54, v22, 10
+; VI-NEXT: v_readlane_b32 s53, v22, 9
+; VI-NEXT: v_readlane_b32 s52, v22, 8
+; VI-NEXT: v_readlane_b32 s51, v22, 7
+; VI-NEXT: v_readlane_b32 s50, v22, 6
+; VI-NEXT: v_readlane_b32 s49, v22, 5
+; VI-NEXT: v_readlane_b32 s48, v22, 4
+; VI-NEXT: v_readlane_b32 s39, v22, 3
+; VI-NEXT: v_readlane_b32 s38, v22, 2
+; VI-NEXT: v_readlane_b32 s37, v22, 1
+; VI-NEXT: v_readlane_b32 s36, v22, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -9059,9 +9163,9 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s20, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: s_lshr_b32 s30, s16, 16
+; SI-NEXT: s_lshr_b32 s31, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -9069,24 +9173,25 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s73, s72, 16
; SI-NEXT: s_lshr_b32 s76, s74, 16
; SI-NEXT: s_lshr_b32 s79, s77, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v8
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s30, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s36, s5, s40
+; SI-NEXT: s_or_b32 s37, s41, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
-; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s94, 16
@@ -9137,11 +9242,12 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB19_3: ; %Flow
@@ -9150,9 +9256,9 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB19_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s30
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -9312,7 +9418,7 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
; SI-NEXT: v_cvt_f32_f16_e32 v21, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v22, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v22, s31
; SI-NEXT: v_cvt_f32_f16_e32 v23, s6
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
@@ -9429,13 +9535,13 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s90, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s30, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s17, 16
+; VI-NEXT: s_lshr_b32 s68, s16, 16
+; VI-NEXT: s_lshr_b32 s69, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s14, s12, 16
@@ -9443,28 +9549,29 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v8
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v8
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s31, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s41, s35, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s30, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s41, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s42, s4, s5
@@ -9511,11 +9618,12 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB19_3
; VI-NEXT: .LBB19_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -9525,27 +9633,27 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v21, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s69
-; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: v_mov_b32_e32 v0, s68
+; VI-NEXT: v_mov_b32_e32 v2, s35
; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v21
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v21
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s35
+; VI-NEXT: v_mov_b32_e32 v2, s34
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v21
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s34
+; VI-NEXT: v_mov_b32_e32 v3, s31
; VI-NEXT: v_add_f16_sdwa v3, v3, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v21
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s31
+; VI-NEXT: v_mov_b32_e32 v4, s30
; VI-NEXT: v_add_f16_sdwa v4, v4, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v21
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s30
+; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: v_add_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v21
; VI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -9609,7 +9717,7 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v20, v20, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s8, v21
; VI-NEXT: v_or_b32_e32 v20, v22, v20
-; VI-NEXT: v_mov_b32_e32 v22, s7
+; VI-NEXT: v_mov_b32_e32 v22, s69
; VI-NEXT: v_add_f16_sdwa v22, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s6, v21
; VI-NEXT: v_or_b32_e32 v21, v21, v22
@@ -15069,8 +15177,9 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v22, s36, 0
; SI-NEXT: v_writelane_b32 v22, s37, 1
; SI-NEXT: v_writelane_b32 v22, s38, 2
@@ -15087,92 +15196,90 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_writelane_b32 v22, s30, 16
-; SI-NEXT: v_writelane_b32 v22, s31, 17
-; SI-NEXT: v_readfirstlane_b32 s7, v7
-; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v7
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
; SI-NEXT: v_readfirstlane_b32 s72, v3
; SI-NEXT: v_readfirstlane_b32 s75, v2
; SI-NEXT: v_readfirstlane_b32 s79, v1
-; SI-NEXT: v_readfirstlane_b32 s90, v0
+; SI-NEXT: v_readfirstlane_b32 s94, v0
; SI-NEXT: s_lshr_b32 s14, s29, 16
-; SI-NEXT: s_lshr_b32 s73, s28, 16
-; SI-NEXT: s_lshr_b32 s76, s27, 16
-; SI-NEXT: s_lshr_b32 s78, s26, 16
-; SI-NEXT: s_lshr_b32 s88, s25, 16
-; SI-NEXT: s_lshr_b32 s91, s24, 16
-; SI-NEXT: s_lshr_b32 s92, s23, 16
-; SI-NEXT: s_lshr_b32 s93, s22, 16
-; SI-NEXT: s_lshr_b32 s94, s21, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
-; SI-NEXT: s_lshr_b32 s8, s9, 16
+; SI-NEXT: s_lshr_b32 s60, s28, 16
+; SI-NEXT: s_lshr_b32 s62, s27, 16
+; SI-NEXT: s_lshr_b32 s73, s26, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s24, 16
+; SI-NEXT: s_lshr_b32 s78, s23, 16
+; SI-NEXT: s_lshr_b32 s88, s22, 16
+; SI-NEXT: s_lshr_b32 s95, s21, 16
+; SI-NEXT: s_lshr_b32 s91, s20, 16
+; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 s93, s18, 16
+; SI-NEXT: s_lshr_b32 s58, s17, 16
+; SI-NEXT: s_lshr_b32 s59, s16, 16
+; SI-NEXT: s_lshr_b32 s6, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s15, s72, 16
-; SI-NEXT: s_lshr_b32 s74, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s79, 16
-; SI-NEXT: s_lshr_b32 s89, s90, 16
+; SI-NEXT: s_lshr_b32 s61, s75, 16
+; SI-NEXT: s_lshr_b32 s63, s79, 16
+; SI-NEXT: s_lshr_b32 s76, s94, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB31_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s72, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
@@ -15183,17 +15290,71 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s11, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s55, s4, s5
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB31_3
; SI-NEXT: .LBB31_2:
-; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
+; SI-NEXT: s_mov_b32 s89, s74
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s88, 0
+; SI-NEXT: v_writelane_b32 v23, s73, 1
+; SI-NEXT: s_mov_b32 s73, s15
+; SI-NEXT: s_mov_b32 s15, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s58
+; SI-NEXT: s_mov_b32 s74, s59
+; SI-NEXT: s_mov_b32 s9, s92
+; SI-NEXT: s_mov_b32 s92, s77
+; SI-NEXT: s_mov_b32 s77, s60
+; SI-NEXT: s_mov_b32 s7, s91
+; SI-NEXT: s_mov_b32 s91, s76
+; SI-NEXT: s_mov_b32 s76, s61
+; SI-NEXT: s_mov_b32 s88, s62
+; SI-NEXT: s_mov_b32 s90, s79
+; SI-NEXT: s_mov_b32 s79, s75
+; SI-NEXT: s_mov_b32 s75, s72
+; SI-NEXT: s_mov_b32 s72, s13
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s93
+; SI-NEXT: s_mov_b32 s93, s78
+; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s78, s93
+; SI-NEXT: s_mov_b32 s93, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: s_mov_b32 s13, s72
+; SI-NEXT: s_mov_b32 s72, s75
+; SI-NEXT: s_mov_b32 s75, s79
+; SI-NEXT: s_mov_b32 s79, s90
+; SI-NEXT: s_mov_b32 s62, s88
+; SI-NEXT: s_mov_b32 s61, s76
+; SI-NEXT: s_mov_b32 s76, s91
+; SI-NEXT: s_mov_b32 s91, s7
+; SI-NEXT: s_mov_b32 s60, s77
+; SI-NEXT: s_mov_b32 s77, s92
+; SI-NEXT: s_mov_b32 s92, s9
+; SI-NEXT: s_mov_b32 s59, s74
+; SI-NEXT: s_mov_b32 s74, s89
+; SI-NEXT: s_mov_b32 s58, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s15
+; SI-NEXT: s_mov_b32 s15, s73
+; SI-NEXT: v_readlane_b32 s73, v23, 1
+; SI-NEXT: v_readlane_b32 s88, v23, 0
; SI-NEXT: .LBB31_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -15202,116 +15363,115 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s58, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s48, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_add_i32 s4, s94, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s79, s79, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_add_i32 s4, s79, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s72, s72, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s72, 0xffff
+; SI-NEXT: s_add_i32 s4, s72, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
; SI-NEXT: .LBB31_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v22, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -15334,7 +15494,6 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v19, s55
; SI-NEXT: v_mov_b32_e32 v20, s56
; SI-NEXT: v_mov_b32_e32 v21, s57
-; SI-NEXT: v_readlane_b32 s31, v22, 17
; SI-NEXT: v_readlane_b32 s67, v22, 15
; SI-NEXT: v_readlane_b32 s66, v22, 14
; SI-NEXT: v_readlane_b32 s65, v22, 13
@@ -15353,6 +15512,8 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_readlane_b32 s36, v22, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -15362,29 +15523,24 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v22, s34, 0
-; VI-NEXT: v_writelane_b32 v22, s35, 1
-; VI-NEXT: v_writelane_b32 v22, s36, 2
-; VI-NEXT: v_writelane_b32 v22, s37, 3
-; VI-NEXT: v_writelane_b32 v22, s38, 4
-; VI-NEXT: v_writelane_b32 v22, s39, 5
-; VI-NEXT: v_writelane_b32 v22, s48, 6
-; VI-NEXT: v_writelane_b32 v22, s49, 7
-; VI-NEXT: v_writelane_b32 v22, s50, 8
-; VI-NEXT: v_writelane_b32 v22, s51, 9
-; VI-NEXT: v_writelane_b32 v22, s52, 10
-; VI-NEXT: v_writelane_b32 v22, s53, 11
-; VI-NEXT: v_writelane_b32 v22, s54, 12
-; VI-NEXT: v_writelane_b32 v22, s55, 13
-; VI-NEXT: v_writelane_b32 v22, s64, 14
-; VI-NEXT: v_writelane_b32 v22, s65, 15
-; VI-NEXT: v_writelane_b32 v22, s66, 16
-; VI-NEXT: v_writelane_b32 v22, s67, 17
-; VI-NEXT: v_writelane_b32 v22, s68, 18
-; VI-NEXT: v_writelane_b32 v22, s69, 19
-; VI-NEXT: v_writelane_b32 v22, s30, 20
-; VI-NEXT: v_writelane_b32 v22, s31, 21
+; VI-NEXT: v_writelane_b32 v22, s36, 0
+; VI-NEXT: v_writelane_b32 v22, s37, 1
+; VI-NEXT: v_writelane_b32 v22, s38, 2
+; VI-NEXT: v_writelane_b32 v22, s39, 3
+; VI-NEXT: v_writelane_b32 v22, s48, 4
+; VI-NEXT: v_writelane_b32 v22, s49, 5
+; VI-NEXT: v_writelane_b32 v22, s50, 6
+; VI-NEXT: v_writelane_b32 v22, s51, 7
+; VI-NEXT: v_writelane_b32 v22, s52, 8
+; VI-NEXT: v_writelane_b32 v22, s53, 9
+; VI-NEXT: v_writelane_b32 v22, s54, 10
+; VI-NEXT: v_writelane_b32 v22, s55, 11
+; VI-NEXT: v_writelane_b32 v22, s64, 12
+; VI-NEXT: v_writelane_b32 v22, s65, 13
+; VI-NEXT: v_writelane_b32 v22, s66, 14
+; VI-NEXT: v_writelane_b32 v22, s67, 15
; VI-NEXT: v_readfirstlane_b32 s7, v7
; VI-NEXT: v_readfirstlane_b32 s9, v6
; VI-NEXT: v_readfirstlane_b32 s11, v5
@@ -15401,12 +15557,12 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s91, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s21, 16
+; VI-NEXT: s_lshr_b32 s59, s20, 16
+; VI-NEXT: s_lshr_b32 s60, s19, 16
+; VI-NEXT: s_lshr_b32 s61, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -15420,22 +15576,22 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
+; VI-NEXT: s_lshl_b32 s41, s62, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -15488,8 +15644,69 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
+; VI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v23, s75, 0
+; VI-NEXT: v_writelane_b32 v23, s72, 1
+; VI-NEXT: v_writelane_b32 v23, s13, 2
+; VI-NEXT: v_writelane_b32 v23, s11, 3
+; VI-NEXT: v_writelane_b32 v23, s9, 4
+; VI-NEXT: v_writelane_b32 v23, s7, 5
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s91
+; VI-NEXT: s_mov_b32 s91, s89
+; VI-NEXT: s_mov_b32 s89, s88
+; VI-NEXT: s_mov_b32 s88, s78
+; VI-NEXT: s_mov_b32 s78, s77
+; VI-NEXT: s_mov_b32 s77, s76
+; VI-NEXT: s_mov_b32 s76, s74
+; VI-NEXT: s_mov_b32 s74, s73
+; VI-NEXT: s_mov_b32 s73, s15
+; VI-NEXT: s_mov_b32 s15, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s58
+; VI-NEXT: s_mov_b32 s75, s79
+; VI-NEXT: s_mov_b32 s79, s59
+; VI-NEXT: s_mov_b32 s13, s90
+; VI-NEXT: s_mov_b32 s90, s60
+; VI-NEXT: s_mov_b32 s9, s61
+; VI-NEXT: s_mov_b32 s72, s62
+; VI-NEXT: s_mov_b32 s11, s63
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s72
+; VI-NEXT: s_mov_b32 s61, s9
+; VI-NEXT: s_mov_b32 s60, s90
+; VI-NEXT: s_mov_b32 s90, s13
+; VI-NEXT: s_mov_b32 s59, s79
+; VI-NEXT: s_mov_b32 s79, s75
+; VI-NEXT: s_mov_b32 s58, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s15
+; VI-NEXT: s_mov_b32 s15, s73
+; VI-NEXT: s_mov_b32 s73, s74
+; VI-NEXT: s_mov_b32 s74, s76
+; VI-NEXT: s_mov_b32 s76, s77
+; VI-NEXT: s_mov_b32 s77, s78
+; VI-NEXT: s_mov_b32 s78, s88
+; VI-NEXT: s_mov_b32 s88, s89
+; VI-NEXT: s_mov_b32 s89, s91
+; VI-NEXT: s_mov_b32 s91, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: v_readlane_b32 s7, v23, 5
+; VI-NEXT: v_readlane_b32 s9, v23, 4
+; VI-NEXT: v_readlane_b32 s11, v23, 3
+; VI-NEXT: v_readlane_b32 s13, v23, 2
+; VI-NEXT: v_readlane_b32 s72, v23, 1
+; VI-NEXT: v_readlane_b32 s75, v23, 0
; VI-NEXT: .LBB31_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -15498,32 +15715,32 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -15565,49 +15782,48 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s90, s90, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s90, 0xffff
+; VI-NEXT: s_add_i32 s4, s90, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s79, 0xffff
+; VI-NEXT: s_add_i32 s4, s79, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s77, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s75, 0xffff
+; VI-NEXT: s_add_i32 s4, s75, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s72, 0xffff
+; VI-NEXT: s_add_i32 s4, s72, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s15, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v22, 20
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -15630,29 +15846,25 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v19, s55
; VI-NEXT: v_mov_b32_e32 v20, s56
; VI-NEXT: v_mov_b32_e32 v21, s57
-; VI-NEXT: v_readlane_b32 s31, v22, 21
-; VI-NEXT: v_readlane_b32 s69, v22, 19
-; VI-NEXT: v_readlane_b32 s68, v22, 18
-; VI-NEXT: v_readlane_b32 s67, v22, 17
-; VI-NEXT: v_readlane_b32 s66, v22, 16
-; VI-NEXT: v_readlane_b32 s65, v22, 15
-; VI-NEXT: v_readlane_b32 s64, v22, 14
-; VI-NEXT: v_readlane_b32 s55, v22, 13
-; VI-NEXT: v_readlane_b32 s54, v22, 12
-; VI-NEXT: v_readlane_b32 s53, v22, 11
-; VI-NEXT: v_readlane_b32 s52, v22, 10
-; VI-NEXT: v_readlane_b32 s51, v22, 9
-; VI-NEXT: v_readlane_b32 s50, v22, 8
-; VI-NEXT: v_readlane_b32 s49, v22, 7
-; VI-NEXT: v_readlane_b32 s48, v22, 6
-; VI-NEXT: v_readlane_b32 s39, v22, 5
-; VI-NEXT: v_readlane_b32 s38, v22, 4
-; VI-NEXT: v_readlane_b32 s37, v22, 3
-; VI-NEXT: v_readlane_b32 s36, v22, 2
-; VI-NEXT: v_readlane_b32 s35, v22, 1
-; VI-NEXT: v_readlane_b32 s34, v22, 0
+; VI-NEXT: v_readlane_b32 s67, v22, 15
+; VI-NEXT: v_readlane_b32 s66, v22, 14
+; VI-NEXT: v_readlane_b32 s65, v22, 13
+; VI-NEXT: v_readlane_b32 s64, v22, 12
+; VI-NEXT: v_readlane_b32 s55, v22, 11
+; VI-NEXT: v_readlane_b32 s54, v22, 10
+; VI-NEXT: v_readlane_b32 s53, v22, 9
+; VI-NEXT: v_readlane_b32 s52, v22, 8
+; VI-NEXT: v_readlane_b32 s51, v22, 7
+; VI-NEXT: v_readlane_b32 s50, v22, 6
+; VI-NEXT: v_readlane_b32 s49, v22, 5
+; VI-NEXT: v_readlane_b32 s48, v22, 4
+; VI-NEXT: v_readlane_b32 s39, v22, 3
+; VI-NEXT: v_readlane_b32 s38, v22, 2
+; VI-NEXT: v_readlane_b32 s37, v22, 1
+; VI-NEXT: v_readlane_b32 s36, v22, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -18819,9 +19031,9 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s95, s20, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: s_lshr_b32 s30, s16, 16
+; SI-NEXT: s_lshr_b32 s31, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -18829,24 +19041,25 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s73, s72, 16
; SI-NEXT: s_lshr_b32 s76, s74, 16
; SI-NEXT: s_lshr_b32 s79, s77, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v8
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB35_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s30, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s36, s5, s40
+; SI-NEXT: s_or_b32 s37, s41, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
-; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s94, 16
@@ -18897,11 +19110,12 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB35_3
; SI-NEXT: .LBB35_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB35_3: ; %Flow
@@ -18910,9 +19124,9 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB35_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s30
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -19072,7 +19286,7 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
; SI-NEXT: v_cvt_f32_f16_e32 v21, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v22, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v22, s31
; SI-NEXT: v_cvt_f32_f16_e32 v23, s6
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
@@ -19189,13 +19403,13 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s90, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s30, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s17, 16
+; VI-NEXT: s_lshr_b32 s68, s16, 16
+; VI-NEXT: s_lshr_b32 s69, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s14, s12, 16
@@ -19203,28 +19417,29 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v8
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v8
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s31, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s41, s35, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s30, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s41, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s42, s4, s5
@@ -19271,11 +19486,12 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB35_3
; VI-NEXT: .LBB35_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -19285,27 +19501,27 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v21, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s69
-; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: v_mov_b32_e32 v0, s68
+; VI-NEXT: v_mov_b32_e32 v2, s35
; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v21
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v21
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s35
+; VI-NEXT: v_mov_b32_e32 v2, s34
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v21
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s34
+; VI-NEXT: v_mov_b32_e32 v3, s31
; VI-NEXT: v_add_f16_sdwa v3, v3, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v21
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s31
+; VI-NEXT: v_mov_b32_e32 v4, s30
; VI-NEXT: v_add_f16_sdwa v4, v4, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v21
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s30
+; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: v_add_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v21
; VI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -19369,7 +19585,7 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v20, v20, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s8, v21
; VI-NEXT: v_or_b32_e32 v20, v22, v20
-; VI-NEXT: v_mov_b32_e32 v22, s7
+; VI-NEXT: v_mov_b32_e32 v22, s69
; VI-NEXT: v_add_f16_sdwa v22, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s6, v21
; VI-NEXT: v_or_b32_e32 v21, v21, v22
@@ -23268,8 +23484,9 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v22, s36, 0
; SI-NEXT: v_writelane_b32 v22, s37, 1
; SI-NEXT: v_writelane_b32 v22, s38, 2
@@ -23286,92 +23503,90 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_writelane_b32 v22, s30, 16
-; SI-NEXT: v_writelane_b32 v22, s31, 17
-; SI-NEXT: v_readfirstlane_b32 s7, v7
-; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v7
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
; SI-NEXT: v_readfirstlane_b32 s72, v3
; SI-NEXT: v_readfirstlane_b32 s75, v2
; SI-NEXT: v_readfirstlane_b32 s79, v1
-; SI-NEXT: v_readfirstlane_b32 s90, v0
+; SI-NEXT: v_readfirstlane_b32 s94, v0
; SI-NEXT: s_lshr_b32 s14, s29, 16
-; SI-NEXT: s_lshr_b32 s73, s28, 16
-; SI-NEXT: s_lshr_b32 s76, s27, 16
-; SI-NEXT: s_lshr_b32 s78, s26, 16
-; SI-NEXT: s_lshr_b32 s88, s25, 16
-; SI-NEXT: s_lshr_b32 s91, s24, 16
-; SI-NEXT: s_lshr_b32 s92, s23, 16
-; SI-NEXT: s_lshr_b32 s93, s22, 16
-; SI-NEXT: s_lshr_b32 s94, s21, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
-; SI-NEXT: s_lshr_b32 s8, s9, 16
+; SI-NEXT: s_lshr_b32 s60, s28, 16
+; SI-NEXT: s_lshr_b32 s62, s27, 16
+; SI-NEXT: s_lshr_b32 s73, s26, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s24, 16
+; SI-NEXT: s_lshr_b32 s78, s23, 16
+; SI-NEXT: s_lshr_b32 s88, s22, 16
+; SI-NEXT: s_lshr_b32 s95, s21, 16
+; SI-NEXT: s_lshr_b32 s91, s20, 16
+; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 s93, s18, 16
+; SI-NEXT: s_lshr_b32 s58, s17, 16
+; SI-NEXT: s_lshr_b32 s59, s16, 16
+; SI-NEXT: s_lshr_b32 s6, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s15, s72, 16
-; SI-NEXT: s_lshr_b32 s74, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s79, 16
-; SI-NEXT: s_lshr_b32 s89, s90, 16
+; SI-NEXT: s_lshr_b32 s61, s75, 16
+; SI-NEXT: s_lshr_b32 s63, s79, 16
+; SI-NEXT: s_lshr_b32 s76, s94, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s72, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
@@ -23382,17 +23597,71 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s11, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s55, s4, s5
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
-; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
+; SI-NEXT: s_mov_b32 s89, s74
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s88, 0
+; SI-NEXT: v_writelane_b32 v23, s73, 1
+; SI-NEXT: s_mov_b32 s73, s15
+; SI-NEXT: s_mov_b32 s15, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s58
+; SI-NEXT: s_mov_b32 s74, s59
+; SI-NEXT: s_mov_b32 s9, s92
+; SI-NEXT: s_mov_b32 s92, s77
+; SI-NEXT: s_mov_b32 s77, s60
+; SI-NEXT: s_mov_b32 s7, s91
+; SI-NEXT: s_mov_b32 s91, s76
+; SI-NEXT: s_mov_b32 s76, s61
+; SI-NEXT: s_mov_b32 s88, s62
+; SI-NEXT: s_mov_b32 s90, s79
+; SI-NEXT: s_mov_b32 s79, s75
+; SI-NEXT: s_mov_b32 s75, s72
+; SI-NEXT: s_mov_b32 s72, s13
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s93
+; SI-NEXT: s_mov_b32 s93, s78
+; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s78, s93
+; SI-NEXT: s_mov_b32 s93, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: s_mov_b32 s13, s72
+; SI-NEXT: s_mov_b32 s72, s75
+; SI-NEXT: s_mov_b32 s75, s79
+; SI-NEXT: s_mov_b32 s79, s90
+; SI-NEXT: s_mov_b32 s62, s88
+; SI-NEXT: s_mov_b32 s61, s76
+; SI-NEXT: s_mov_b32 s76, s91
+; SI-NEXT: s_mov_b32 s91, s7
+; SI-NEXT: s_mov_b32 s60, s77
+; SI-NEXT: s_mov_b32 s77, s92
+; SI-NEXT: s_mov_b32 s92, s9
+; SI-NEXT: s_mov_b32 s59, s74
+; SI-NEXT: s_mov_b32 s74, s89
+; SI-NEXT: s_mov_b32 s58, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s15
+; SI-NEXT: s_mov_b32 s15, s73
+; SI-NEXT: v_readlane_b32 s73, v23, 1
+; SI-NEXT: v_readlane_b32 s88, v23, 0
; SI-NEXT: .LBB43_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -23401,116 +23670,115 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s58, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s48, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_add_i32 s4, s94, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s79, s79, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_add_i32 s4, s79, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s72, s72, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s72, 0xffff
+; SI-NEXT: s_add_i32 s4, s72, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
; SI-NEXT: .LBB43_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v22, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -23533,7 +23801,6 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v19, s55
; SI-NEXT: v_mov_b32_e32 v20, s56
; SI-NEXT: v_mov_b32_e32 v21, s57
-; SI-NEXT: v_readlane_b32 s31, v22, 17
; SI-NEXT: v_readlane_b32 s67, v22, 15
; SI-NEXT: v_readlane_b32 s66, v22, 14
; SI-NEXT: v_readlane_b32 s65, v22, 13
@@ -23552,6 +23819,8 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s36, v22, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -23561,29 +23830,24 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v22, s34, 0
-; VI-NEXT: v_writelane_b32 v22, s35, 1
-; VI-NEXT: v_writelane_b32 v22, s36, 2
-; VI-NEXT: v_writelane_b32 v22, s37, 3
-; VI-NEXT: v_writelane_b32 v22, s38, 4
-; VI-NEXT: v_writelane_b32 v22, s39, 5
-; VI-NEXT: v_writelane_b32 v22, s48, 6
-; VI-NEXT: v_writelane_b32 v22, s49, 7
-; VI-NEXT: v_writelane_b32 v22, s50, 8
-; VI-NEXT: v_writelane_b32 v22, s51, 9
-; VI-NEXT: v_writelane_b32 v22, s52, 10
-; VI-NEXT: v_writelane_b32 v22, s53, 11
-; VI-NEXT: v_writelane_b32 v22, s54, 12
-; VI-NEXT: v_writelane_b32 v22, s55, 13
-; VI-NEXT: v_writelane_b32 v22, s64, 14
-; VI-NEXT: v_writelane_b32 v22, s65, 15
-; VI-NEXT: v_writelane_b32 v22, s66, 16
-; VI-NEXT: v_writelane_b32 v22, s67, 17
-; VI-NEXT: v_writelane_b32 v22, s68, 18
-; VI-NEXT: v_writelane_b32 v22, s69, 19
-; VI-NEXT: v_writelane_b32 v22, s30, 20
-; VI-NEXT: v_writelane_b32 v22, s31, 21
+; VI-NEXT: v_writelane_b32 v22, s36, 0
+; VI-NEXT: v_writelane_b32 v22, s37, 1
+; VI-NEXT: v_writelane_b32 v22, s38, 2
+; VI-NEXT: v_writelane_b32 v22, s39, 3
+; VI-NEXT: v_writelane_b32 v22, s48, 4
+; VI-NEXT: v_writelane_b32 v22, s49, 5
+; VI-NEXT: v_writelane_b32 v22, s50, 6
+; VI-NEXT: v_writelane_b32 v22, s51, 7
+; VI-NEXT: v_writelane_b32 v22, s52, 8
+; VI-NEXT: v_writelane_b32 v22, s53, 9
+; VI-NEXT: v_writelane_b32 v22, s54, 10
+; VI-NEXT: v_writelane_b32 v22, s55, 11
+; VI-NEXT: v_writelane_b32 v22, s64, 12
+; VI-NEXT: v_writelane_b32 v22, s65, 13
+; VI-NEXT: v_writelane_b32 v22, s66, 14
+; VI-NEXT: v_writelane_b32 v22, s67, 15
; VI-NEXT: v_readfirstlane_b32 s7, v7
; VI-NEXT: v_readfirstlane_b32 s9, v6
; VI-NEXT: v_readfirstlane_b32 s11, v5
@@ -23600,12 +23864,12 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s91, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s21, 16
+; VI-NEXT: s_lshr_b32 s59, s20, 16
+; VI-NEXT: s_lshr_b32 s60, s19, 16
+; VI-NEXT: s_lshr_b32 s61, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -23619,22 +23883,22 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
+; VI-NEXT: s_lshl_b32 s41, s62, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -23687,8 +23951,69 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
+; VI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v23, s75, 0
+; VI-NEXT: v_writelane_b32 v23, s72, 1
+; VI-NEXT: v_writelane_b32 v23, s13, 2
+; VI-NEXT: v_writelane_b32 v23, s11, 3
+; VI-NEXT: v_writelane_b32 v23, s9, 4
+; VI-NEXT: v_writelane_b32 v23, s7, 5
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s91
+; VI-NEXT: s_mov_b32 s91, s89
+; VI-NEXT: s_mov_b32 s89, s88
+; VI-NEXT: s_mov_b32 s88, s78
+; VI-NEXT: s_mov_b32 s78, s77
+; VI-NEXT: s_mov_b32 s77, s76
+; VI-NEXT: s_mov_b32 s76, s74
+; VI-NEXT: s_mov_b32 s74, s73
+; VI-NEXT: s_mov_b32 s73, s15
+; VI-NEXT: s_mov_b32 s15, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s58
+; VI-NEXT: s_mov_b32 s75, s79
+; VI-NEXT: s_mov_b32 s79, s59
+; VI-NEXT: s_mov_b32 s13, s90
+; VI-NEXT: s_mov_b32 s90, s60
+; VI-NEXT: s_mov_b32 s9, s61
+; VI-NEXT: s_mov_b32 s72, s62
+; VI-NEXT: s_mov_b32 s11, s63
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s72
+; VI-NEXT: s_mov_b32 s61, s9
+; VI-NEXT: s_mov_b32 s60, s90
+; VI-NEXT: s_mov_b32 s90, s13
+; VI-NEXT: s_mov_b32 s59, s79
+; VI-NEXT: s_mov_b32 s79, s75
+; VI-NEXT: s_mov_b32 s58, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s15
+; VI-NEXT: s_mov_b32 s15, s73
+; VI-NEXT: s_mov_b32 s73, s74
+; VI-NEXT: s_mov_b32 s74, s76
+; VI-NEXT: s_mov_b32 s76, s77
+; VI-NEXT: s_mov_b32 s77, s78
+; VI-NEXT: s_mov_b32 s78, s88
+; VI-NEXT: s_mov_b32 s88, s89
+; VI-NEXT: s_mov_b32 s89, s91
+; VI-NEXT: s_mov_b32 s91, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: v_readlane_b32 s7, v23, 5
+; VI-NEXT: v_readlane_b32 s9, v23, 4
+; VI-NEXT: v_readlane_b32 s11, v23, 3
+; VI-NEXT: v_readlane_b32 s13, v23, 2
+; VI-NEXT: v_readlane_b32 s72, v23, 1
+; VI-NEXT: v_readlane_b32 s75, v23, 0
; VI-NEXT: .LBB43_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -23697,32 +24022,32 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -23764,49 +24089,48 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s90, s90, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s90, 0xffff
+; VI-NEXT: s_add_i32 s4, s90, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s79, 0xffff
+; VI-NEXT: s_add_i32 s4, s79, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s77, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s75, 0xffff
+; VI-NEXT: s_add_i32 s4, s75, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s72, 0xffff
+; VI-NEXT: s_add_i32 s4, s72, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s15, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v22, 20
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -23829,29 +24153,25 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v19, s55
; VI-NEXT: v_mov_b32_e32 v20, s56
; VI-NEXT: v_mov_b32_e32 v21, s57
-; VI-NEXT: v_readlane_b32 s31, v22, 21
-; VI-NEXT: v_readlane_b32 s69, v22, 19
-; VI-NEXT: v_readlane_b32 s68, v22, 18
-; VI-NEXT: v_readlane_b32 s67, v22, 17
-; VI-NEXT: v_readlane_b32 s66, v22, 16
-; VI-NEXT: v_readlane_b32 s65, v22, 15
-; VI-NEXT: v_readlane_b32 s64, v22, 14
-; VI-NEXT: v_readlane_b32 s55, v22, 13
-; VI-NEXT: v_readlane_b32 s54, v22, 12
-; VI-NEXT: v_readlane_b32 s53, v22, 11
-; VI-NEXT: v_readlane_b32 s52, v22, 10
-; VI-NEXT: v_readlane_b32 s51, v22, 9
-; VI-NEXT: v_readlane_b32 s50, v22, 8
-; VI-NEXT: v_readlane_b32 s49, v22, 7
-; VI-NEXT: v_readlane_b32 s48, v22, 6
-; VI-NEXT: v_readlane_b32 s39, v22, 5
-; VI-NEXT: v_readlane_b32 s38, v22, 4
-; VI-NEXT: v_readlane_b32 s37, v22, 3
-; VI-NEXT: v_readlane_b32 s36, v22, 2
-; VI-NEXT: v_readlane_b32 s35, v22, 1
-; VI-NEXT: v_readlane_b32 s34, v22, 0
+; VI-NEXT: v_readlane_b32 s67, v22, 15
+; VI-NEXT: v_readlane_b32 s66, v22, 14
+; VI-NEXT: v_readlane_b32 s65, v22, 13
+; VI-NEXT: v_readlane_b32 s64, v22, 12
+; VI-NEXT: v_readlane_b32 s55, v22, 11
+; VI-NEXT: v_readlane_b32 s54, v22, 10
+; VI-NEXT: v_readlane_b32 s53, v22, 9
+; VI-NEXT: v_readlane_b32 s52, v22, 8
+; VI-NEXT: v_readlane_b32 s51, v22, 7
+; VI-NEXT: v_readlane_b32 s50, v22, 6
+; VI-NEXT: v_readlane_b32 s49, v22, 5
+; VI-NEXT: v_readlane_b32 s48, v22, 4
+; VI-NEXT: v_readlane_b32 s39, v22, 3
+; VI-NEXT: v_readlane_b32 s38, v22, 2
+; VI-NEXT: v_readlane_b32 s37, v22, 1
+; VI-NEXT: v_readlane_b32 s36, v22, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -26786,9 +27106,9 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s20, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: s_lshr_b32 s30, s16, 16
+; SI-NEXT: s_lshr_b32 s31, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -26796,24 +27116,25 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s73, s72, 16
; SI-NEXT: s_lshr_b32 s76, s74, 16
; SI-NEXT: s_lshr_b32 s79, s77, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v8
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s30, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s36, s5, s40
+; SI-NEXT: s_or_b32 s37, s41, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
-; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s94, 16
@@ -26864,11 +27185,12 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB47_3: ; %Flow
@@ -26877,9 +27199,9 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB47_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s30
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -27039,7 +27361,7 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
; SI-NEXT: v_cvt_f32_f16_e32 v21, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v22, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v22, s31
; SI-NEXT: v_cvt_f32_f16_e32 v23, s6
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
@@ -27156,13 +27478,13 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s90, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s30, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s17, 16
+; VI-NEXT: s_lshr_b32 s68, s16, 16
+; VI-NEXT: s_lshr_b32 s69, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s14, s12, 16
@@ -27170,28 +27492,29 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v8
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v8
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB47_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s31, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s41, s35, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s30, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s41, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s42, s4, s5
@@ -27238,11 +27561,12 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB47_3
; VI-NEXT: .LBB47_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB47_3: ; %Flow
@@ -27252,27 +27576,27 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB47_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v21, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s69
-; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: v_mov_b32_e32 v0, s68
+; VI-NEXT: v_mov_b32_e32 v2, s35
; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v21
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v21
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s35
+; VI-NEXT: v_mov_b32_e32 v2, s34
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v21
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s34
+; VI-NEXT: v_mov_b32_e32 v3, s31
; VI-NEXT: v_add_f16_sdwa v3, v3, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v21
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s31
+; VI-NEXT: v_mov_b32_e32 v4, s30
; VI-NEXT: v_add_f16_sdwa v4, v4, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v21
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s30
+; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: v_add_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v21
; VI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -27336,7 +27660,7 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v20, v20, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s8, v21
; VI-NEXT: v_or_b32_e32 v20, v22, v20
-; VI-NEXT: v_mov_b32_e32 v22, s7
+; VI-NEXT: v_mov_b32_e32 v22, s69
; VI-NEXT: v_add_f16_sdwa v22, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s6, v21
; VI-NEXT: v_or_b32_e32 v21, v21, v22
@@ -30339,8 +30663,9 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v22, s36, 0
; SI-NEXT: v_writelane_b32 v22, s37, 1
; SI-NEXT: v_writelane_b32 v22, s38, 2
@@ -30357,92 +30682,90 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v22, s65, 13
; SI-NEXT: v_writelane_b32 v22, s66, 14
; SI-NEXT: v_writelane_b32 v22, s67, 15
-; SI-NEXT: v_writelane_b32 v22, s30, 16
-; SI-NEXT: v_writelane_b32 v22, s31, 17
-; SI-NEXT: v_readfirstlane_b32 s7, v7
-; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 vcc_lo, v7
+; SI-NEXT: v_readfirstlane_b32 vcc_hi, v6
; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_readfirstlane_b32 s13, v4
; SI-NEXT: v_readfirstlane_b32 s72, v3
; SI-NEXT: v_readfirstlane_b32 s75, v2
; SI-NEXT: v_readfirstlane_b32 s79, v1
-; SI-NEXT: v_readfirstlane_b32 s90, v0
+; SI-NEXT: v_readfirstlane_b32 s94, v0
; SI-NEXT: s_lshr_b32 s14, s29, 16
-; SI-NEXT: s_lshr_b32 s73, s28, 16
-; SI-NEXT: s_lshr_b32 s76, s27, 16
-; SI-NEXT: s_lshr_b32 s78, s26, 16
-; SI-NEXT: s_lshr_b32 s88, s25, 16
-; SI-NEXT: s_lshr_b32 s91, s24, 16
-; SI-NEXT: s_lshr_b32 s92, s23, 16
-; SI-NEXT: s_lshr_b32 s93, s22, 16
-; SI-NEXT: s_lshr_b32 s94, s21, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
-; SI-NEXT: s_lshr_b32 s8, s9, 16
+; SI-NEXT: s_lshr_b32 s60, s28, 16
+; SI-NEXT: s_lshr_b32 s62, s27, 16
+; SI-NEXT: s_lshr_b32 s73, s26, 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s24, 16
+; SI-NEXT: s_lshr_b32 s78, s23, 16
+; SI-NEXT: s_lshr_b32 s88, s22, 16
+; SI-NEXT: s_lshr_b32 s95, s21, 16
+; SI-NEXT: s_lshr_b32 s91, s20, 16
+; SI-NEXT: s_lshr_b32 s92, s19, 16
+; SI-NEXT: s_lshr_b32 s93, s18, 16
+; SI-NEXT: s_lshr_b32 s58, s17, 16
+; SI-NEXT: s_lshr_b32 s59, s16, 16
+; SI-NEXT: s_lshr_b32 s6, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s8, vcc_hi, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
; SI-NEXT: s_lshr_b32 s15, s72, 16
-; SI-NEXT: s_lshr_b32 s74, s75, 16
-; SI-NEXT: s_lshr_b32 s77, s79, 16
-; SI-NEXT: s_lshr_b32 s89, s90, 16
+; SI-NEXT: s_lshr_b32 s61, s75, 16
+; SI-NEXT: s_lshr_b32 s63, s79, 16
+; SI-NEXT: s_lshr_b32 s76, s94, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s45, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s48, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_and_b32 s4, s94, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s72, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
@@ -30453,17 +30776,71 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s11, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s55, s4, s5
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s56, s4, s5
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
-; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
+; SI-NEXT: s_mov_b32 s89, s74
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s88, 0
+; SI-NEXT: v_writelane_b32 v23, s73, 1
+; SI-NEXT: s_mov_b32 s73, s15
+; SI-NEXT: s_mov_b32 s15, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s58
+; SI-NEXT: s_mov_b32 s74, s59
+; SI-NEXT: s_mov_b32 s9, s92
+; SI-NEXT: s_mov_b32 s92, s77
+; SI-NEXT: s_mov_b32 s77, s60
+; SI-NEXT: s_mov_b32 s7, s91
+; SI-NEXT: s_mov_b32 s91, s76
+; SI-NEXT: s_mov_b32 s76, s61
+; SI-NEXT: s_mov_b32 s88, s62
+; SI-NEXT: s_mov_b32 s90, s79
+; SI-NEXT: s_mov_b32 s79, s75
+; SI-NEXT: s_mov_b32 s75, s72
+; SI-NEXT: s_mov_b32 s72, s13
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s93
+; SI-NEXT: s_mov_b32 s93, s78
+; SI-NEXT: s_mov_b32 s78, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s78, s93
+; SI-NEXT: s_mov_b32 s93, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: s_mov_b32 s13, s72
+; SI-NEXT: s_mov_b32 s72, s75
+; SI-NEXT: s_mov_b32 s75, s79
+; SI-NEXT: s_mov_b32 s79, s90
+; SI-NEXT: s_mov_b32 s62, s88
+; SI-NEXT: s_mov_b32 s61, s76
+; SI-NEXT: s_mov_b32 s76, s91
+; SI-NEXT: s_mov_b32 s91, s7
+; SI-NEXT: s_mov_b32 s60, s77
+; SI-NEXT: s_mov_b32 s77, s92
+; SI-NEXT: s_mov_b32 s92, s9
+; SI-NEXT: s_mov_b32 s59, s74
+; SI-NEXT: s_mov_b32 s74, s89
+; SI-NEXT: s_mov_b32 s58, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s15
+; SI-NEXT: s_mov_b32 s15, s73
+; SI-NEXT: v_readlane_b32 s73, v23, 1
+; SI-NEXT: v_readlane_b32 s88, v23, 0
; SI-NEXT: .LBB51_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -30472,116 +30849,115 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s59, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s58, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s95, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s91, 16
+; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s88, 16
+; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s78, 16
+; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s46, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s76, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s73, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s48, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s89, 16
+; SI-NEXT: s_add_i32 s4, s94, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s79, s79, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s79, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s77, 16
+; SI-NEXT: s_add_i32 s4, s79, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s74, 16
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s72, s72, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s72, 0xffff
+; SI-NEXT: s_add_i32 s4, s72, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_hi, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s57, s4, 0x30000
; SI-NEXT: .LBB51_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v22, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -30604,7 +30980,6 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v19, s55
; SI-NEXT: v_mov_b32_e32 v20, s56
; SI-NEXT: v_mov_b32_e32 v21, s57
-; SI-NEXT: v_readlane_b32 s31, v22, 17
; SI-NEXT: v_readlane_b32 s67, v22, 15
; SI-NEXT: v_readlane_b32 s66, v22, 14
; SI-NEXT: v_readlane_b32 s65, v22, 13
@@ -30623,6 +30998,8 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; SI-NEXT: v_readlane_b32 s36, v22, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -30632,29 +31009,24 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v22, s34, 0
-; VI-NEXT: v_writelane_b32 v22, s35, 1
-; VI-NEXT: v_writelane_b32 v22, s36, 2
-; VI-NEXT: v_writelane_b32 v22, s37, 3
-; VI-NEXT: v_writelane_b32 v22, s38, 4
-; VI-NEXT: v_writelane_b32 v22, s39, 5
-; VI-NEXT: v_writelane_b32 v22, s48, 6
-; VI-NEXT: v_writelane_b32 v22, s49, 7
-; VI-NEXT: v_writelane_b32 v22, s50, 8
-; VI-NEXT: v_writelane_b32 v22, s51, 9
-; VI-NEXT: v_writelane_b32 v22, s52, 10
-; VI-NEXT: v_writelane_b32 v22, s53, 11
-; VI-NEXT: v_writelane_b32 v22, s54, 12
-; VI-NEXT: v_writelane_b32 v22, s55, 13
-; VI-NEXT: v_writelane_b32 v22, s64, 14
-; VI-NEXT: v_writelane_b32 v22, s65, 15
-; VI-NEXT: v_writelane_b32 v22, s66, 16
-; VI-NEXT: v_writelane_b32 v22, s67, 17
-; VI-NEXT: v_writelane_b32 v22, s68, 18
-; VI-NEXT: v_writelane_b32 v22, s69, 19
-; VI-NEXT: v_writelane_b32 v22, s30, 20
-; VI-NEXT: v_writelane_b32 v22, s31, 21
+; VI-NEXT: v_writelane_b32 v22, s36, 0
+; VI-NEXT: v_writelane_b32 v22, s37, 1
+; VI-NEXT: v_writelane_b32 v22, s38, 2
+; VI-NEXT: v_writelane_b32 v22, s39, 3
+; VI-NEXT: v_writelane_b32 v22, s48, 4
+; VI-NEXT: v_writelane_b32 v22, s49, 5
+; VI-NEXT: v_writelane_b32 v22, s50, 6
+; VI-NEXT: v_writelane_b32 v22, s51, 7
+; VI-NEXT: v_writelane_b32 v22, s52, 8
+; VI-NEXT: v_writelane_b32 v22, s53, 9
+; VI-NEXT: v_writelane_b32 v22, s54, 10
+; VI-NEXT: v_writelane_b32 v22, s55, 11
+; VI-NEXT: v_writelane_b32 v22, s64, 12
+; VI-NEXT: v_writelane_b32 v22, s65, 13
+; VI-NEXT: v_writelane_b32 v22, s66, 14
+; VI-NEXT: v_writelane_b32 v22, s67, 15
; VI-NEXT: v_readfirstlane_b32 s7, v7
; VI-NEXT: v_readfirstlane_b32 s9, v6
; VI-NEXT: v_readfirstlane_b32 s11, v5
@@ -30671,12 +31043,12 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s91, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
+; VI-NEXT: s_lshr_b32 s58, s21, 16
+; VI-NEXT: s_lshr_b32 s59, s20, 16
+; VI-NEXT: s_lshr_b32 s60, s19, 16
+; VI-NEXT: s_lshr_b32 s61, s18, 16
+; VI-NEXT: s_lshr_b32 s62, s17, 16
+; VI-NEXT: s_lshr_b32 s63, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -30690,22 +31062,22 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_cbranch_scc0 .LBB51_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
+; VI-NEXT: s_lshl_b32 s41, s62, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -30758,8 +31130,69 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB51_3
; VI-NEXT: .LBB51_2:
+; VI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v23, s75, 0
+; VI-NEXT: v_writelane_b32 v23, s72, 1
+; VI-NEXT: v_writelane_b32 v23, s13, 2
+; VI-NEXT: v_writelane_b32 v23, s11, 3
+; VI-NEXT: v_writelane_b32 v23, s9, 4
+; VI-NEXT: v_writelane_b32 v23, s7, 5
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s91
+; VI-NEXT: s_mov_b32 s91, s89
+; VI-NEXT: s_mov_b32 s89, s88
+; VI-NEXT: s_mov_b32 s88, s78
+; VI-NEXT: s_mov_b32 s78, s77
+; VI-NEXT: s_mov_b32 s77, s76
+; VI-NEXT: s_mov_b32 s76, s74
+; VI-NEXT: s_mov_b32 s74, s73
+; VI-NEXT: s_mov_b32 s73, s15
+; VI-NEXT: s_mov_b32 s15, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s58
+; VI-NEXT: s_mov_b32 s75, s79
+; VI-NEXT: s_mov_b32 s79, s59
+; VI-NEXT: s_mov_b32 s13, s90
+; VI-NEXT: s_mov_b32 s90, s60
+; VI-NEXT: s_mov_b32 s9, s61
+; VI-NEXT: s_mov_b32 s72, s62
+; VI-NEXT: s_mov_b32 s11, s63
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s72
+; VI-NEXT: s_mov_b32 s61, s9
+; VI-NEXT: s_mov_b32 s60, s90
+; VI-NEXT: s_mov_b32 s90, s13
+; VI-NEXT: s_mov_b32 s59, s79
+; VI-NEXT: s_mov_b32 s79, s75
+; VI-NEXT: s_mov_b32 s58, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s15
+; VI-NEXT: s_mov_b32 s15, s73
+; VI-NEXT: s_mov_b32 s73, s74
+; VI-NEXT: s_mov_b32 s74, s76
+; VI-NEXT: s_mov_b32 s76, s77
+; VI-NEXT: s_mov_b32 s77, s78
+; VI-NEXT: s_mov_b32 s78, s88
+; VI-NEXT: s_mov_b32 s88, s89
+; VI-NEXT: s_mov_b32 s89, s91
+; VI-NEXT: s_mov_b32 s91, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: v_readlane_b32 s7, v23, 5
+; VI-NEXT: v_readlane_b32 s9, v23, 4
+; VI-NEXT: v_readlane_b32 s11, v23, 3
+; VI-NEXT: v_readlane_b32 s13, v23, 2
+; VI-NEXT: v_readlane_b32 s72, v23, 1
+; VI-NEXT: v_readlane_b32 s75, v23, 0
; VI-NEXT: .LBB51_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -30768,32 +31201,32 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s59, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s58, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -30835,49 +31268,48 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s90, s90, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s90, 0xffff
+; VI-NEXT: s_add_i32 s4, s90, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s79, 0xffff
+; VI-NEXT: s_add_i32 s4, s79, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s77, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s75, 0xffff
+; VI-NEXT: s_add_i32 s4, s75, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s72, s72, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s72, 0xffff
+; VI-NEXT: s_add_i32 s4, s72, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s15, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: .LBB51_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v22, 20
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -30900,29 +31332,25 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v19, s55
; VI-NEXT: v_mov_b32_e32 v20, s56
; VI-NEXT: v_mov_b32_e32 v21, s57
-; VI-NEXT: v_readlane_b32 s31, v22, 21
-; VI-NEXT: v_readlane_b32 s69, v22, 19
-; VI-NEXT: v_readlane_b32 s68, v22, 18
-; VI-NEXT: v_readlane_b32 s67, v22, 17
-; VI-NEXT: v_readlane_b32 s66, v22, 16
-; VI-NEXT: v_readlane_b32 s65, v22, 15
-; VI-NEXT: v_readlane_b32 s64, v22, 14
-; VI-NEXT: v_readlane_b32 s55, v22, 13
-; VI-NEXT: v_readlane_b32 s54, v22, 12
-; VI-NEXT: v_readlane_b32 s53, v22, 11
-; VI-NEXT: v_readlane_b32 s52, v22, 10
-; VI-NEXT: v_readlane_b32 s51, v22, 9
-; VI-NEXT: v_readlane_b32 s50, v22, 8
-; VI-NEXT: v_readlane_b32 s49, v22, 7
-; VI-NEXT: v_readlane_b32 s48, v22, 6
-; VI-NEXT: v_readlane_b32 s39, v22, 5
-; VI-NEXT: v_readlane_b32 s38, v22, 4
-; VI-NEXT: v_readlane_b32 s37, v22, 3
-; VI-NEXT: v_readlane_b32 s36, v22, 2
-; VI-NEXT: v_readlane_b32 s35, v22, 1
-; VI-NEXT: v_readlane_b32 s34, v22, 0
+; VI-NEXT: v_readlane_b32 s67, v22, 15
+; VI-NEXT: v_readlane_b32 s66, v22, 14
+; VI-NEXT: v_readlane_b32 s65, v22, 13
+; VI-NEXT: v_readlane_b32 s64, v22, 12
+; VI-NEXT: v_readlane_b32 s55, v22, 11
+; VI-NEXT: v_readlane_b32 s54, v22, 10
+; VI-NEXT: v_readlane_b32 s53, v22, 9
+; VI-NEXT: v_readlane_b32 s52, v22, 8
+; VI-NEXT: v_readlane_b32 s51, v22, 7
+; VI-NEXT: v_readlane_b32 s50, v22, 6
+; VI-NEXT: v_readlane_b32 s49, v22, 5
+; VI-NEXT: v_readlane_b32 s48, v22, 4
+; VI-NEXT: v_readlane_b32 s39, v22, 3
+; VI-NEXT: v_readlane_b32 s38, v22, 2
+; VI-NEXT: v_readlane_b32 s37, v22, 1
+; VI-NEXT: v_readlane_b32 s36, v22, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -34001,9 +34429,9 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; SI-NEXT: s_lshr_b32 s95, s20, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s19, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; SI-NEXT: s_lshr_b32 s30, s17, 16
-; SI-NEXT: s_lshr_b32 s31, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: s_lshr_b32 s30, s16, 16
+; SI-NEXT: s_lshr_b32 s31, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -34011,24 +34439,25 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; SI-NEXT: s_lshr_b32 s73, s72, 16
; SI-NEXT: s_lshr_b32 s76, s74, 16
; SI-NEXT: s_lshr_b32 s79, s77, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v8
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB55_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s30, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s36, s5, s40
+; SI-NEXT: s_or_b32 s37, s41, s4
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
-; SI-NEXT: s_or_b32 s37, s40, s41
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s94, 16
@@ -34079,11 +34508,12 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB55_3
; SI-NEXT: .LBB55_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB55_3: ; %Flow
@@ -34092,9 +34522,9 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; SI-NEXT: s_cmp_lg_u32 s4, 1
; SI-NEXT: s_cbranch_scc1 .LBB55_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v0, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v0, s30
; SI-NEXT: v_cvt_f32_f16_e32 v1, s16
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s7
; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -34254,7 +34684,7 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v21, v19
; SI-NEXT: v_cvt_f32_f16_e32 v21, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v22, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v22, s31
; SI-NEXT: v_cvt_f32_f16_e32 v23, s6
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
@@ -34371,13 +34801,13 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; VI-NEXT: s_lshr_b32 s90, s24, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s68, s17, 16
-; VI-NEXT: s_lshr_b32 s69, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s4, s21, 16
+; VI-NEXT: s_lshr_b32 s30, s20, 16
+; VI-NEXT: s_lshr_b32 s31, s19, 16
+; VI-NEXT: s_lshr_b32 s34, s18, 16
+; VI-NEXT: s_lshr_b32 s35, s17, 16
+; VI-NEXT: s_lshr_b32 s68, s16, 16
+; VI-NEXT: s_lshr_b32 s69, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s14, s12, 16
@@ -34385,28 +34815,29 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v8
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s5, v8
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB55_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s31, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s68, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s41, s35, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s30, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s41, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s22
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s42, s4, s5
@@ -34453,11 +34884,12 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB55_3
; VI-NEXT: .LBB55_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB55_3: ; %Flow
@@ -34467,27 +34899,27 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; VI-NEXT: s_cbranch_scc1 .LBB55_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v21, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s69
-; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: v_mov_b32_e32 v0, s68
+; VI-NEXT: v_mov_b32_e32 v2, s35
; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v21
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v21
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s35
+; VI-NEXT: v_mov_b32_e32 v2, s34
; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v21
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s34
+; VI-NEXT: v_mov_b32_e32 v3, s31
; VI-NEXT: v_add_f16_sdwa v3, v3, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v21
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s31
+; VI-NEXT: v_mov_b32_e32 v4, s30
; VI-NEXT: v_add_f16_sdwa v4, v4, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v21
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s30
+; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: v_add_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v21
; VI-NEXT: v_or_b32_e32 v5, v6, v5
@@ -34551,7 +34983,7 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v20, v20, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s8, v21
; VI-NEXT: v_or_b32_e32 v20, v22, v20
-; VI-NEXT: v_mov_b32_e32 v22, s7
+; VI-NEXT: v_mov_b32_e32 v22, s69
; VI-NEXT: v_add_f16_sdwa v22, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s6, v21
; VI-NEXT: v_or_b32_e32 v21, v21, v22
@@ -35975,8 +36407,9 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v22, s34, 0
; SI-NEXT: v_writelane_b32 v22, s35, 1
; SI-NEXT: v_writelane_b32 v22, s36, 2
@@ -35998,123 +36431,134 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v22, s68, 18
; SI-NEXT: v_writelane_b32 v22, s69, 19
; SI-NEXT: v_writelane_b32 v22, s70, 20
-; SI-NEXT: v_writelane_b32 v22, s71, 21
-; SI-NEXT: v_writelane_b32 v22, s80, 22
-; SI-NEXT: v_writelane_b32 v22, s81, 23
-; SI-NEXT: v_writelane_b32 v22, s82, 24
-; SI-NEXT: v_writelane_b32 v22, s83, 25
-; SI-NEXT: v_writelane_b32 v22, s84, 26
-; SI-NEXT: v_writelane_b32 v22, s85, 27
-; SI-NEXT: v_writelane_b32 v22, s86, 28
-; SI-NEXT: v_writelane_b32 v22, s87, 29
-; SI-NEXT: v_writelane_b32 v22, s30, 30
-; SI-NEXT: v_writelane_b32 v22, s31, 31
-; SI-NEXT: v_readfirstlane_b32 s85, v7
-; SI-NEXT: v_readfirstlane_b32 s87, v6
-; SI-NEXT: v_readfirstlane_b32 s82, v5
-; SI-NEXT: v_readfirstlane_b32 s84, v4
-; SI-NEXT: v_readfirstlane_b32 s71, v3
-; SI-NEXT: v_readfirstlane_b32 s81, v2
-; SI-NEXT: v_readfirstlane_b32 s68, v1
-; SI-NEXT: v_readfirstlane_b32 s70, v0
-; SI-NEXT: s_lshr_b32 s48, s29, 16
-; SI-NEXT: s_lshr_b32 s67, s28, 16
-; SI-NEXT: s_lshr_b32 s39, s27, 16
-; SI-NEXT: s_lshr_b32 s66, s26, 16
-; SI-NEXT: s_lshr_b32 s38, s25, 16
-; SI-NEXT: s_lshr_b32 s65, s24, 16
-; SI-NEXT: s_lshr_b32 s37, s23, 16
-; SI-NEXT: s_lshr_b32 s64, s22, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s20, 16
-; SI-NEXT: s_lshr_b32 s35, s19, 16
-; SI-NEXT: s_lshr_b32 s54, s18, 16
-; SI-NEXT: s_lshr_b32 s34, s17, 16
-; SI-NEXT: s_lshr_b32 s53, s16, 16
-; SI-NEXT: s_lshr_b32 s52, s85, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: s_lshr_b32 s51, s82, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s50, s71, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: s_lshr_b32 s49, s68, 16
-; SI-NEXT: s_lshr_b32 s69, s70, 16
+; SI-NEXT: v_writelane_b32 v22, s30, 21
+; SI-NEXT: v_writelane_b32 v22, s31, 22
+; SI-NEXT: v_readfirstlane_b32 s15, v1
+; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane
+; SI-NEXT: v_readfirstlane_b32 s5, v7
+; SI-NEXT: v_readfirstlane_b32 s66, v6
+; SI-NEXT: v_readfirstlane_b32 s7, v5
+; SI-NEXT: v_readfirstlane_b32 s64, v4
+; SI-NEXT: v_readfirstlane_b32 s9, v3
+; SI-NEXT: v_readfirstlane_b32 s54, v2
+; SI-NEXT: v_readfirstlane_b32 s52, v0
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v23, s15, 0
+; SI-NEXT: s_lshr_b32 s91, s29, 16
+; SI-NEXT: s_lshr_b32 s51, s28, 16
+; SI-NEXT: s_lshr_b32 s89, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s26, 16
+; SI-NEXT: s_lshr_b32 s36, s25, 16
+; SI-NEXT: s_lshr_b32 s49, s24, 16
+; SI-NEXT: s_lshr_b32 s35, s23, 16
+; SI-NEXT: s_lshr_b32 s48, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_lshr_b32 s39, s20, 16
+; SI-NEXT: s_lshr_b32 s61, s19, 16
+; SI-NEXT: s_lshr_b32 s38, s18, 16
+; SI-NEXT: s_lshr_b32 s70, s17, 16
+; SI-NEXT: s_lshr_b32 s63, s16, 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
+; SI-NEXT: s_lshr_b32 s65, s66, 16
+; SI-NEXT: s_lshr_b32 s67, s7, 16
+; SI-NEXT: s_lshr_b32 s55, s64, 16
+; SI-NEXT: s_lshr_b32 s95, s9, 16
+; SI-NEXT: s_lshr_b32 s53, s54, 16
+; SI-NEXT: s_lshr_b32 s93, s15, 16
+; SI-NEXT: s_lshr_b32 s73, s52, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: v_writelane_b32 v23, s9, 1
; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_writelane_b32 v23, s7, 2
+; SI-NEXT: v_writelane_b32 v23, s5, 3
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_and_b32 s13, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s70, 16
+; SI-NEXT: s_lshl_b32 s62, s63, 16
+; SI-NEXT: s_mov_b32 s11, s63
+; SI-NEXT: s_or_b32 s63, s13, s41
+; SI-NEXT: s_and_b32 s41, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s61, 16
+; SI-NEXT: s_lshl_b32 s92, s73, 16
+; SI-NEXT: s_mov_b32 s13, s73
+; SI-NEXT: s_or_b32 s73, s41, s43
+; SI-NEXT: s_and_b32 s41, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s34, 16
+; SI-NEXT: s_or_b32 s75, s41, s43
+; SI-NEXT: s_and_b32 s41, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s35, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s53, 16
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s77, s41, s43
+; SI-NEXT: s_and_b32 s41, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s36, 16
; SI-NEXT: s_or_b32 s56, s4, s62
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s54, 16
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s36, 16
+; SI-NEXT: s_lshl_b32 s72, s38, 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[62:63], 16
+; SI-NEXT: s_or_b32 s79, s41, s43
+; SI-NEXT: s_and_b32 s41, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s89, 16
; SI-NEXT: s_or_b32 s46, s4, s72
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s55, 16
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s37, 16
+; SI-NEXT: s_lshl_b32 s74, s39, 16
+; SI-NEXT: v_writelane_b32 v23, s58, 4
+; SI-NEXT: s_mov_b32 s60, s89
+; SI-NEXT: s_or_b32 s89, s41, s43
+; SI-NEXT: s_and_b32 s41, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s91, 16
; SI-NEXT: s_or_b32 s44, s4, s74
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s64, 16
-; SI-NEXT: s_or_b32 s77, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s38, 16
+; SI-NEXT: s_lshl_b32 s76, s48, 16
+; SI-NEXT: v_writelane_b32 v23, s59, 5
+; SI-NEXT: s_mov_b32 s58, s91
+; SI-NEXT: s_or_b32 s91, s41, s43
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s93, 16
; SI-NEXT: s_or_b32 s42, s4, s76
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s78, s65, 16
-; SI-NEXT: s_or_b32 s79, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s39, 16
+; SI-NEXT: s_lshl_b32 s78, s49, 16
+; SI-NEXT: s_mov_b32 s62, s93
+; SI-NEXT: s_or_b32 s93, s15, s41
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s95, 16
; SI-NEXT: s_or_b32 s40, s4, s78
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s88, s66, 16
-; SI-NEXT: s_or_b32 s89, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s48, 16
+; SI-NEXT: s_lshl_b32 s88, s50, 16
+; SI-NEXT: s_mov_b32 s59, s95
+; SI-NEXT: s_or_b32 s95, s9, s15
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s67, 16
; SI-NEXT: s_or_b32 s14, s4, s88
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s90, s67, 16
-; SI-NEXT: s_or_b32 s91, s5, s7
-; SI-NEXT: s_and_b32 s5, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s49, 16
+; SI-NEXT: s_lshl_b32 s90, s51, 16
+; SI-NEXT: s_or_b32 s31, s7, s9
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s37, 16
; SI-NEXT: s_or_b32 s12, s4, s90
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s92, s69, 16
-; SI-NEXT: s_or_b32 s93, s5, s7
-; SI-NEXT: s_and_b32 s5, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s50, 16
+; SI-NEXT: s_and_b32 s4, s52, 0xffff
+; SI-NEXT: s_or_b32 vcc_hi, s5, s7
+; SI-NEXT: s_mov_b32 s5, s34
+; SI-NEXT: s_mov_b32 s7, s35
+; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 16
; SI-NEXT: s_or_b32 s10, s4, s92
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s94, s80, 16
-; SI-NEXT: s_or_b32 s95, s5, s7
-; SI-NEXT: s_and_b32 s5, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s51, 16
+; SI-NEXT: s_and_b32 s4, s54, 0xffff
+; SI-NEXT: s_lshl_b32 s94, s53, 16
+; SI-NEXT: v_writelane_b32 v23, s34, 6
; SI-NEXT: s_or_b32 s8, s4, s94
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s30, s83, 16
-; SI-NEXT: s_or_b32 s31, s5, s7
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s52, 16
-; SI-NEXT: s_or_b32 s6, s4, s30
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 vcc_lo, s86, 16
-; SI-NEXT: s_or_b32 vcc_hi, s5, s7
-; SI-NEXT: s_or_b32 s4, s4, vcc_lo
-; SI-NEXT: s_lshr_b64 s[58:59], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
-; SI-NEXT: s_mov_b32 s57, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[74:75], 16
+; SI-NEXT: s_and_b32 s4, s64, 0xffff
+; SI-NEXT: s_lshl_b32 s30, s55, 16
+; SI-NEXT: s_lshl_b32 vcc_lo, s65, 16
+; SI-NEXT: v_writelane_b32 v23, s35, 7
+; SI-NEXT: s_lshr_b64 s[68:69], s[74:75], 16
; SI-NEXT: s_mov_b32 s47, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[76:77], 16
+; SI-NEXT: s_or_b32 s6, s4, s30
+; SI-NEXT: s_and_b32 s4, s66, 0xffff
+; SI-NEXT: s_mov_b32 s57, s63
+; SI-NEXT: v_writelane_b32 v23, s68, 8
+; SI-NEXT: s_mov_b32 s63, s11
+; SI-NEXT: s_mov_b32 s73, s13
; SI-NEXT: s_mov_b32 s45, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[78:79], 16
; SI-NEXT: s_mov_b32 s43, s77
@@ -36129,18 +36573,27 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[92:93], s[30:31], 16
; SI-NEXT: s_mov_b32 s9, s95
; SI-NEXT: s_lshr_b64 s[94:95], vcc, 16
+; SI-NEXT: s_or_b32 s4, s4, vcc_lo
+; SI-NEXT: s_mov_b32 s35, s7
+; SI-NEXT: s_mov_b32 s34, s5
+; SI-NEXT: v_writelane_b32 v23, s69, 9
+; SI-NEXT: s_mov_b32 s89, s60
+; SI-NEXT: s_mov_b32 s91, s58
+; SI-NEXT: s_mov_b32 s93, s62
+; SI-NEXT: s_mov_b32 s95, s59
; SI-NEXT: s_mov_b32 s7, s31
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_mov_b32 s5, vcc_hi
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_mov_b64 s[30:31], -1
+; SI-NEXT: v_writelane_b32 v23, s4, 4
+; SI-NEXT: v_writelane_b32 v23, s5, 5
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr40
@@ -36155,111 +36608,128 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: v_writelane_b32 v23, s4, 6
+; SI-NEXT: v_writelane_b32 v23, s5, 7
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v23, s4, 8
+; SI-NEXT: v_writelane_b32 v23, s5, 9
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: .LBB57_3: ; %Flow
-; SI-NEXT: s_and_b64 vcc, s[30:31], exec
-; SI-NEXT: s_cselect_b32 s59, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s59, 1
+; SI-NEXT: s_and_b64 s[58:59], s[30:31], exec
+; SI-NEXT: v_readlane_b32 s30, v23, 4
+; SI-NEXT: v_readlane_b32 s31, v23, 5
+; SI-NEXT: s_mov_b32 vcc_lo, s30
+; SI-NEXT: v_readlane_b32 s30, v23, 6
+; SI-NEXT: v_readlane_b32 s31, v23, 7
+; SI-NEXT: s_cselect_b32 s58, 1, 0
+; SI-NEXT: s_mov_b32 s60, s30
+; SI-NEXT: v_readlane_b32 s30, v23, 8
+; SI-NEXT: s_cmp_lg_u32 s58, 1
+; SI-NEXT: s_mov_b32 s58, s30
+; SI-NEXT: v_readlane_b32 s31, v23, 9
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_add_i32 s85, s85, 3
+; SI-NEXT: s_add_i32 s4, s66, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s52, 16
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: v_readlane_b32 s5, v23, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s37, 16
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s83, 16
-; SI-NEXT: s_add_i32 s82, s82, 3
+; SI-NEXT: s_add_i32 s6, s64, 3
+; SI-NEXT: s_and_b32 s6, s6, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s55, 16
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s51, 16
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: v_readlane_b32 s7, v23, 2
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s67, 16
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s80, 16
-; SI-NEXT: s_add_i32 s71, s71, 3
+; SI-NEXT: s_add_i32 s8, s54, 3
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s53, 16
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s50, 16
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: v_readlane_b32 s9, v23, 1
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s95, 16
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s69, 16
-; SI-NEXT: s_add_i32 s68, s68, 3
+; SI-NEXT: s_add_i32 s10, s52, 3
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s73, 16
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: s_and_b32 s11, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s49, 16
+; SI-NEXT: v_readlane_b32 s11, v23, 0
+; SI-NEXT: s_add_i32 s11, s11, 3
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s93, 16
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: s_and_b32 s12, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s67, 16
+; SI-NEXT: s_lshl_b32 s13, s51, 16
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_or_b32 s12, s13, s12
; SI-NEXT: s_and_b32 s13, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s48, 16
+; SI-NEXT: s_lshl_b32 s14, s91, 16
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_and_b32 s14, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s66, 16
+; SI-NEXT: s_lshl_b32 s15, s50, 16
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: s_and_b32 s15, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s39, 16
+; SI-NEXT: s_lshl_b32 s26, s89, 16
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_or_b32 s15, s26, s15
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s65, 16
+; SI-NEXT: s_lshl_b32 s26, s49, 16
; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s40, s24, 0x30000
; SI-NEXT: s_and_b32 s24, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s38, 16
+; SI-NEXT: s_lshl_b32 s25, s36, 16
; SI-NEXT: s_or_b32 s24, s25, s24
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s24, 0x30000
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s64, 16
+; SI-NEXT: s_lshl_b32 s24, s48, 16
; SI-NEXT: s_or_b32 s22, s24, s22
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s22, 0x30000
; SI-NEXT: s_and_b32 s22, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s37, 16
+; SI-NEXT: s_lshl_b32 s23, s35, 16
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s43, s22, 0x30000
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s55, 16
+; SI-NEXT: s_lshl_b32 s22, s39, 16
; SI-NEXT: s_or_b32 s20, s22, s20
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s44, s20, 0x30000
; SI-NEXT: s_and_b32 s20, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s36, 16
+; SI-NEXT: s_lshl_b32 s21, s34, 16
; SI-NEXT: s_or_b32 s20, s21, s20
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s45, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s54, 16
+; SI-NEXT: s_lshl_b32 s20, s38, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s46, s18, 0x30000
; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s35, 16
+; SI-NEXT: s_lshl_b32 s19, s61, 16
; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s47, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s53, 16
+; SI-NEXT: s_lshl_b32 s18, s63, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s56, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s34, 16
-; SI-NEXT: s_or_b32 s16, s17, s16
+; SI-NEXT: s_lshl_b32 s17, s70, 16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
@@ -36268,101 +36738,102 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_add_i32 s57, s16, 0x30000
-; SI-NEXT: s_lshr_b64 s[58:59], s[56:57], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16
-; SI-NEXT: s_lshr_b32 s34, s57, 16
-; SI-NEXT: s_lshr_b32 s35, s47, 16
-; SI-NEXT: s_lshr_b32 s36, s45, 16
-; SI-NEXT: s_lshr_b32 s37, s43, 16
-; SI-NEXT: s_lshr_b32 s38, s41, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s13, 16
-; SI-NEXT: s_lshr_b32 s49, s11, 16
-; SI-NEXT: s_lshr_b32 s50, s9, 16
-; SI-NEXT: s_lshr_b32 s51, s7, 16
-; SI-NEXT: s_lshr_b32 s52, s5, 16
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s70, s57, 16
+; SI-NEXT: s_lshr_b32 s61, s47, 16
+; SI-NEXT: s_lshr_b32 s34, s45, 16
+; SI-NEXT: s_lshr_b32 s35, s43, 16
+; SI-NEXT: s_lshr_b32 s36, s41, 16
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s91, s13, 16
+; SI-NEXT: s_lshr_b32 s93, s11, 16
+; SI-NEXT: s_lshr_b32 s95, s9, 16
+; SI-NEXT: s_lshr_b32 s67, s7, 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s16, s56, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s58, 16
+; SI-NEXT: s_lshl_b32 s17, vcc_lo, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s34, 16
+; SI-NEXT: s_lshl_b32 s18, s70, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s46, 0xffff
; SI-NEXT: s_lshl_b32 s19, s60, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s35, 16
+; SI-NEXT: s_lshl_b32 s20, s61, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s44, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s62, 16
+; SI-NEXT: s_lshl_b32 s21, s58, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s36, 16
+; SI-NEXT: s_lshl_b32 s22, s34, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s42, 0xffff
; SI-NEXT: s_lshl_b32 s23, s72, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s37, 16
+; SI-NEXT: s_lshl_b32 s24, s35, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s40, 0xffff
; SI-NEXT: s_lshl_b32 s25, s74, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s38, 16
+; SI-NEXT: s_lshl_b32 s26, s36, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s26, s76, 16
; SI-NEXT: s_or_b32 s14, s14, s26
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s39, 16
+; SI-NEXT: s_lshl_b32 s26, s89, 16
; SI-NEXT: s_or_b32 s15, s15, s26
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s26, s78, 16
; SI-NEXT: s_or_b32 s12, s12, s26
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s48, 16
+; SI-NEXT: s_lshl_b32 s26, s91, 16
; SI-NEXT: s_or_b32 s13, s13, s26
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s26, s88, 16
; SI-NEXT: s_or_b32 s10, s10, s26
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s49, 16
+; SI-NEXT: s_lshl_b32 s26, s93, 16
; SI-NEXT: s_or_b32 s11, s11, s26
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s26, s90, 16
; SI-NEXT: s_or_b32 s8, s8, s26
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s50, 16
+; SI-NEXT: s_lshl_b32 s26, s95, 16
; SI-NEXT: s_or_b32 s9, s9, s26
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s26, s92, 16
; SI-NEXT: s_or_b32 s6, s6, s26
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s51, 16
+; SI-NEXT: s_lshl_b32 s26, s67, 16
; SI-NEXT: s_or_b32 s7, s7, s26
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s26, s94, 16
; SI-NEXT: s_or_b32 s4, s4, s26
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s52, 16
+; SI-NEXT: s_lshl_b32 s26, s37, 16
; SI-NEXT: s_or_b32 s5, s5, s26
-; SI-NEXT: v_readlane_b32 s30, v22, 30
+; SI-NEXT: v_readlane_b32 s30, v22, 21
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -36385,16 +36856,7 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v19, s7
; SI-NEXT: v_mov_b32_e32 v20, s4
; SI-NEXT: v_mov_b32_e32 v21, s5
-; SI-NEXT: v_readlane_b32 s31, v22, 31
-; SI-NEXT: v_readlane_b32 s87, v22, 29
-; SI-NEXT: v_readlane_b32 s86, v22, 28
-; SI-NEXT: v_readlane_b32 s85, v22, 27
-; SI-NEXT: v_readlane_b32 s84, v22, 26
-; SI-NEXT: v_readlane_b32 s83, v22, 25
-; SI-NEXT: v_readlane_b32 s82, v22, 24
-; SI-NEXT: v_readlane_b32 s81, v22, 23
-; SI-NEXT: v_readlane_b32 s80, v22, 22
-; SI-NEXT: v_readlane_b32 s71, v22, 21
+; SI-NEXT: v_readlane_b32 s31, v22, 22
; SI-NEXT: v_readlane_b32 s70, v22, 20
; SI-NEXT: v_readlane_b32 s69, v22, 19
; SI-NEXT: v_readlane_b32 s68, v22, 18
@@ -36418,6 +36880,7 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v22, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -37970,22 +38433,13 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-LABEL: bitcast_v44f16_to_v44i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s6, v7
; SI-NEXT: v_readfirstlane_b32 s7, v6
; SI-NEXT: v_readfirstlane_b32 s42, v5
@@ -38041,7 +38495,7 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v26, v1, v0
+; SI-NEXT: v_or_b32_e32 v52, v1, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, s73
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -38057,7 +38511,7 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v1, s22
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v27, v5, v4
+; SI-NEXT: v_or_b32_e32 v53, v5, v4
; SI-NEXT: v_cvt_f32_f16_e32 v5, s62
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -38072,7 +38526,7 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_or_b32_e32 v41, v3, v8
+; SI-NEXT: v_or_b32_e32 v22, v3, v8
; SI-NEXT: v_cvt_f32_f16_e32 v3, s57
; SI-NEXT: v_cvt_f32_f16_e32 v5, s26
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1
@@ -38085,13 +38539,13 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s63
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v43, v1, v12
+; SI-NEXT: v_or_b32_e32 v24, v1, v12
; SI-NEXT: v_cvt_f32_f16_e32 v1, s47
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v22, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s45
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_or_b32_e32 v40, v5, v10
+; SI-NEXT: v_or_b32_e32 v23, v5, v10
; SI-NEXT: v_cvt_f32_f16_e32 v5, s61
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
@@ -38108,17 +38562,20 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v20, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s56
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v3
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s42
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v5
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s46
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v1
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v45, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
; SI-NEXT: v_cvt_f32_f16_e32 v5, s41
; SI-NEXT: v_or_b32_e32 v19, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s44
@@ -38126,23 +38583,24 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v3
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
; SI-NEXT: v_or_b32_e32 v17, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s15
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v43
; SI-NEXT: v_or_b32_e32 v15, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s14
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v27
; SI-NEXT: v_cvt_f32_f16_e32 v5, s27
; SI-NEXT: v_or_b32_e32 v13, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s13
@@ -38150,26 +38608,23 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v28
; SI-NEXT: v_or_b32_e32 v11, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s12
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v29
; SI-NEXT: v_or_b32_e32 v9, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s11
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58
+; SI-NEXT: v_cvt_f16_f32_e32 v31, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v30
; SI-NEXT: v_cvt_f32_f16_e32 v5, s21
; SI-NEXT: v_or_b32_e32 v7, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s10
@@ -38177,83 +38632,93 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_cvt_f16_f32_e32 v61, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v21
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v31
; SI-NEXT: v_or_b32_e32 v5, v5, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
; SI-NEXT: v_cvt_f32_f16_e32 v21, s9
; SI-NEXT: v_or_b32_e32 v3, v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s17
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s6
+; SI-NEXT: v_cvt_f32_f16_e32 v33, s6
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v53, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v34, v21
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v24
+; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v33
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v42
-; SI-NEXT: v_or_b32_e32 v1, v1, v24
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s8
-; SI-NEXT: v_or_b32_e32 v21, v21, v25
-; SI-NEXT: v_cvt_f32_f16_e32 v25, s7
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: v_or_b32_e32 v1, v1, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v33, s8
+; SI-NEXT: v_or_b32_e32 v21, v21, v35
+; SI-NEXT: v_cvt_f32_f16_e32 v35, s7
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
+; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
+; SI-NEXT: v_cvt_f16_f32_e32 v33, v33
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v35, v35
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v52, v22, v14
+; SI-NEXT: v_or_b32_e32 v25, v25, v14
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v45, v33, v18
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v63, v23, v16
-; SI-NEXT: v_or_b32_e32 v62, v24, v18
-; SI-NEXT: v_or_b32_e32 v60, v25, v20
-; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
+; SI-NEXT: v_or_b32_e32 v46, v35, v20
; SI-NEXT: v_lshr_b64 v[48:49], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v2, v26
+; SI-NEXT: v_mov_b32_e32 v2, v34
; SI-NEXT: v_lshr_b64 v[38:39], v[4:5], 16
+; SI-NEXT: v_mov_b32_e32 v4, v32
; SI-NEXT: v_lshr_b64 v[36:37], v[6:7], 16
-; SI-NEXT: v_mov_b32_e32 v6, v27
+; SI-NEXT: v_mov_b32_e32 v6, v31
; SI-NEXT: v_lshr_b64 v[34:35], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v8, v30
; SI-NEXT: v_lshr_b64 v[32:33], v[10:11], 16
+; SI-NEXT: v_mov_b32_e32 v10, v29
; SI-NEXT: v_lshr_b64 v[30:31], v[12:13], 16
+; SI-NEXT: v_mov_b32_e32 v12, v28
; SI-NEXT: v_lshr_b64 v[28:29], v[14:15], 16
+; SI-NEXT: v_or_b32_e32 v44, v26, v16
+; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v35, v22
+; SI-NEXT: v_mov_b32_e32 v33, v23
+; SI-NEXT: v_mov_b32_e32 v31, v24
+; SI-NEXT: v_mov_b32_e32 v29, v25
+; SI-NEXT: v_mov_b32_e32 v14, v27
; SI-NEXT: v_lshr_b64 v[26:27], v[16:17], 16
; SI-NEXT: v_lshr_b64 v[24:25], v[18:19], 16
; SI-NEXT: v_lshr_b64 v[22:23], v[20:21], 16
+; SI-NEXT: v_mov_b32_e32 v27, v44
+; SI-NEXT: v_mov_b32_e32 v16, v43
+; SI-NEXT: v_mov_b32_e32 v25, v45
+; SI-NEXT: v_mov_b32_e32 v18, v42
+; SI-NEXT: v_mov_b32_e32 v20, v46
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v42, s58
-; SI-NEXT: v_mov_b32_e32 v44, s56
-; SI-NEXT: v_mov_b32_e32 v45, s46
-; SI-NEXT: v_mov_b32_e32 v46, s44
-; SI-NEXT: v_mov_b32_e32 v47, s15
-; SI-NEXT: v_mov_b32_e32 v56, s14
; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v57, s13
+; SI-NEXT: v_mov_b32_e32 v40, s58
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v58, s12
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v59, s11
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v61, s10
-; SI-NEXT: v_mov_b32_e32 v53, s9
-; SI-NEXT: v_mov_b32_e32 v60, s7
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v62, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v63, s59
-; SI-NEXT: v_mov_b32_e32 v52, s63
-; SI-NEXT: v_mov_b32_e32 v43, s28
-; SI-NEXT: v_mov_b32_e32 v40, s26
-; SI-NEXT: v_mov_b32_e32 v41, s24
+; SI-NEXT: v_mov_b32_e32 v41, s56
+; SI-NEXT: v_mov_b32_e32 v18, s46
+; SI-NEXT: v_mov_b32_e32 v16, s44
+; SI-NEXT: v_mov_b32_e32 v14, s15
+; SI-NEXT: v_mov_b32_e32 v12, s14
+; SI-NEXT: v_mov_b32_e32 v10, s13
+; SI-NEXT: v_mov_b32_e32 v8, s12
+; SI-NEXT: v_mov_b32_e32 v6, s11
+; SI-NEXT: v_mov_b32_e32 v4, s10
+; SI-NEXT: v_mov_b32_e32 v2, s9
+; SI-NEXT: v_mov_b32_e32 v20, s7
+; SI-NEXT: v_mov_b32_e32 v25, s8
+; SI-NEXT: v_mov_b32_e32 v27, s59
+; SI-NEXT: v_mov_b32_e32 v29, s63
+; SI-NEXT: v_mov_b32_e32 v31, s28
+; SI-NEXT: v_mov_b32_e32 v33, s26
+; SI-NEXT: v_mov_b32_e32 v35, s24
; SI-NEXT: v_mov_b32_e32 v55, s22
-; SI-NEXT: v_mov_b32_e32 v6, s20
+; SI-NEXT: v_mov_b32_e32 v53, s20
; SI-NEXT: v_mov_b32_e32 v54, s18
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v52, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v3, s19
; SI-NEXT: v_mov_b32_e32 v5, s21
@@ -38278,86 +38743,78 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v22, s43
; SI-NEXT: .LBB59_6: ; %end
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v0, v23, v0
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v54
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v54
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v2, v23, v2
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v4, v23, v4
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v55
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v58
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_or_b32_e32 v6, v23, v6
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v35
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v8, v23, v8
; SI-NEXT: v_or_b32_e32 v9, v9, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v40
-; SI-NEXT: v_or_b32_e32 v10, v12, v10
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v10, v23, v10
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v30
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v30
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v12, v23
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v52
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v28
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v28
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v14, v14, v23
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v63
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v26
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v16, v16, v23
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v44
-; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v60
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v18, v18, v23
+; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v41
; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v42
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: v_or_b32_e32 v19, v19, v23
; SI-NEXT: v_or_b32_e32 v21, v21, v22
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
index d7b8411c8f146..f13d12714b0bf 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
@@ -4016,6 +4016,8 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s12, v0
; SI-NEXT: s_cbranch_scc0 .LBB13_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
; SI-NEXT: s_lshr_b32 s88, s5, 16
; SI-NEXT: s_lshr_b32 s89, s7, 16
; SI-NEXT: s_lshr_b32 s90, s9, 16
@@ -4026,9 +4028,8 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b32 s95, s25, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
@@ -4045,9 +4046,9 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: .LBB13_2:
; SI-NEXT: s_mov_b64 s[78:79], -1
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr62
@@ -4070,10 +4071,12 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: .LBB13_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB13_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -4096,8 +4099,6 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
@@ -4116,25 +4117,16 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b32 s95, s25, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
+; SI-NEXT: s_lshr_b32 s15, s19, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16
; SI-NEXT: .LBB13_5: ; %end
-; SI-NEXT: s_lshl_b32 s15, s76, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s74, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s15, s19, s15
; SI-NEXT: s_lshl_b32 s19, s72, 16
; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s19, s20, s19
@@ -4179,27 +4171,36 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s11, s11, s29
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_lshl_b32 s41, s76, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s29
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s29
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s29, s40, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s17, s17, s41
+; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s29
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s29, s89, 16
; SI-NEXT: s_or_b32 s4, s4, s14
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s14, s88, 16
+; SI-NEXT: s_or_b32 s18, s18, s41
; SI-NEXT: s_or_b32 s7, s7, s29
; SI-NEXT: s_or_b32 s5, s5, s14
; SI-NEXT: v_readlane_b32 s30, v24, 0
-; SI-NEXT: v_mov_b32_e32 v0, s15
-; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_mov_b32_e32 v2, s17
-; SI-NEXT: v_mov_b32_e32 v3, s18
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
+; SI-NEXT: v_mov_b32_e32 v3, s15
; SI-NEXT: v_mov_b32_e32 v4, s19
; SI-NEXT: v_mov_b32_e32 v5, s20
; SI-NEXT: v_mov_b32_e32 v6, s21
@@ -5954,30 +5955,27 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s34, 0
-; SI-NEXT: v_writelane_b32 v24, s35, 1
-; SI-NEXT: v_writelane_b32 v24, s36, 2
-; SI-NEXT: v_writelane_b32 v24, s37, 3
-; SI-NEXT: v_writelane_b32 v24, s38, 4
-; SI-NEXT: v_writelane_b32 v24, s39, 5
-; SI-NEXT: v_writelane_b32 v24, s48, 6
-; SI-NEXT: v_writelane_b32 v24, s49, 7
-; SI-NEXT: v_writelane_b32 v24, s50, 8
-; SI-NEXT: v_writelane_b32 v24, s51, 9
-; SI-NEXT: v_writelane_b32 v24, s52, 10
-; SI-NEXT: v_writelane_b32 v24, s53, 11
-; SI-NEXT: v_writelane_b32 v24, s54, 12
-; SI-NEXT: v_writelane_b32 v24, s55, 13
-; SI-NEXT: v_writelane_b32 v24, s64, 14
-; SI-NEXT: v_writelane_b32 v24, s65, 15
-; SI-NEXT: v_writelane_b32 v24, s66, 16
-; SI-NEXT: v_writelane_b32 v24, s67, 17
-; SI-NEXT: v_writelane_b32 v24, s68, 18
-; SI-NEXT: v_writelane_b32 v24, s69, 19
-; SI-NEXT: v_writelane_b32 v24, s30, 20
-; SI-NEXT: v_writelane_b32 v24, s31, 21
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v24, s36, 0
+; SI-NEXT: v_writelane_b32 v24, s37, 1
+; SI-NEXT: v_writelane_b32 v24, s38, 2
+; SI-NEXT: v_writelane_b32 v24, s39, 3
+; SI-NEXT: v_writelane_b32 v24, s48, 4
+; SI-NEXT: v_writelane_b32 v24, s49, 5
+; SI-NEXT: v_writelane_b32 v24, s50, 6
+; SI-NEXT: v_writelane_b32 v24, s51, 7
+; SI-NEXT: v_writelane_b32 v24, s52, 8
+; SI-NEXT: v_writelane_b32 v24, s53, 9
+; SI-NEXT: v_writelane_b32 v24, s54, 10
+; SI-NEXT: v_writelane_b32 v24, s55, 11
+; SI-NEXT: v_writelane_b32 v24, s64, 12
+; SI-NEXT: v_writelane_b32 v24, s65, 13
+; SI-NEXT: v_writelane_b32 v24, s66, 14
+; SI-NEXT: v_writelane_b32 v24, s67, 15
+; SI-NEXT: v_writelane_b32 v24, s30, 16
+; SI-NEXT: v_writelane_b32 v24, s31, 17
; SI-NEXT: v_readfirstlane_b32 s7, v9
; SI-NEXT: v_readfirstlane_b32 s9, v8
; SI-NEXT: v_readfirstlane_b32 s11, v7
@@ -5996,12 +5994,12 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
-; SI-NEXT: s_lshr_b32 s68, s17, 16
-; SI-NEXT: s_lshr_b32 s69, s16, 16
+; SI-NEXT: s_lshr_b32 s60, s21, 16
+; SI-NEXT: s_lshr_b32 s61, s20, 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_lshr_b32 s31, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -6017,22 +6015,22 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -6091,8 +6089,72 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
+; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v25, s77, 0
+; SI-NEXT: v_writelane_b32 v25, s74, 1
+; SI-NEXT: v_writelane_b32 v25, s15, 2
+; SI-NEXT: v_writelane_b32 v25, s13, 3
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s95
+; SI-NEXT: s_mov_b32 s95, s93
+; SI-NEXT: s_mov_b32 s93, s92
+; SI-NEXT: s_mov_b32 s92, s90
+; SI-NEXT: s_mov_b32 s90, s89
+; SI-NEXT: s_mov_b32 s89, s79
+; SI-NEXT: s_mov_b32 s79, s78
+; SI-NEXT: s_mov_b32 s78, s76
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_mov_b32 s75, s73
+; SI-NEXT: s_mov_b32 s73, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s60
+; SI-NEXT: s_mov_b32 s77, s88
+; SI-NEXT: s_mov_b32 s88, s61
+; SI-NEXT: s_mov_b32 s74, s91
+; SI-NEXT: s_mov_b32 s91, s62
+; SI-NEXT: s_mov_b32 s15, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s63, s15
+; SI-NEXT: s_mov_b32 s62, s91
+; SI-NEXT: s_mov_b32 s91, s74
+; SI-NEXT: s_mov_b32 s61, s88
+; SI-NEXT: s_mov_b32 s88, s77
+; SI-NEXT: s_mov_b32 s60, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s73
+; SI-NEXT: s_mov_b32 s73, s75
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_mov_b32 s76, s78
+; SI-NEXT: s_mov_b32 s78, s79
+; SI-NEXT: s_mov_b32 s79, s89
+; SI-NEXT: s_mov_b32 s89, s90
+; SI-NEXT: s_mov_b32 s90, s92
+; SI-NEXT: s_mov_b32 s92, s93
+; SI-NEXT: s_mov_b32 s93, s95
+; SI-NEXT: s_mov_b32 s95, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: v_readlane_b32 s13, v25, 3
+; SI-NEXT: v_readlane_b32 s15, v25, 2
+; SI-NEXT: v_readlane_b32 s74, v25, 1
+; SI-NEXT: v_readlane_b32 s77, v25, 0
; SI-NEXT: .LBB15_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -6101,32 +6163,32 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -6173,54 +6235,54 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s91, s91, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s91, 0xffff
+; SI-NEXT: s_add_i32 s4, s91, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s88, s88, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s88, 0xffff
+; SI-NEXT: s_add_i32 s4, s88, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s79, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s77, s77, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s77, 0xffff
+; SI-NEXT: s_add_i32 s4, s77, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s74, s74, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s74, 0xffff
+; SI-NEXT: s_add_i32 s4, s74, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
; SI-NEXT: .LBB15_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v24, 20
+; SI-NEXT: v_readlane_b32 s30, v24, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -6245,29 +6307,27 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v21, s57
; SI-NEXT: v_mov_b32_e32 v22, s58
; SI-NEXT: v_mov_b32_e32 v23, s59
-; SI-NEXT: v_readlane_b32 s31, v24, 21
-; SI-NEXT: v_readlane_b32 s69, v24, 19
-; SI-NEXT: v_readlane_b32 s68, v24, 18
-; SI-NEXT: v_readlane_b32 s67, v24, 17
-; SI-NEXT: v_readlane_b32 s66, v24, 16
-; SI-NEXT: v_readlane_b32 s65, v24, 15
-; SI-NEXT: v_readlane_b32 s64, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 13
-; SI-NEXT: v_readlane_b32 s54, v24, 12
-; SI-NEXT: v_readlane_b32 s53, v24, 11
-; SI-NEXT: v_readlane_b32 s52, v24, 10
-; SI-NEXT: v_readlane_b32 s51, v24, 9
-; SI-NEXT: v_readlane_b32 s50, v24, 8
-; SI-NEXT: v_readlane_b32 s49, v24, 7
-; SI-NEXT: v_readlane_b32 s48, v24, 6
-; SI-NEXT: v_readlane_b32 s39, v24, 5
-; SI-NEXT: v_readlane_b32 s38, v24, 4
-; SI-NEXT: v_readlane_b32 s37, v24, 3
-; SI-NEXT: v_readlane_b32 s36, v24, 2
-; SI-NEXT: v_readlane_b32 s35, v24, 1
-; SI-NEXT: v_readlane_b32 s34, v24, 0
+; SI-NEXT: v_readlane_b32 s31, v24, 17
+; SI-NEXT: v_readlane_b32 s67, v24, 15
+; SI-NEXT: v_readlane_b32 s66, v24, 14
+; SI-NEXT: v_readlane_b32 s65, v24, 13
+; SI-NEXT: v_readlane_b32 s64, v24, 12
+; SI-NEXT: v_readlane_b32 s55, v24, 11
+; SI-NEXT: v_readlane_b32 s54, v24, 10
+; SI-NEXT: v_readlane_b32 s53, v24, 9
+; SI-NEXT: v_readlane_b32 s52, v24, 8
+; SI-NEXT: v_readlane_b32 s51, v24, 7
+; SI-NEXT: v_readlane_b32 s50, v24, 6
+; SI-NEXT: v_readlane_b32 s49, v24, 5
+; SI-NEXT: v_readlane_b32 s48, v24, 4
+; SI-NEXT: v_readlane_b32 s39, v24, 3
+; SI-NEXT: v_readlane_b32 s38, v24, 2
+; SI-NEXT: v_readlane_b32 s37, v24, 1
+; SI-NEXT: v_readlane_b32 s36, v24, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -6277,6 +6337,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v24, s34, 0
; VI-NEXT: v_writelane_b32 v24, s35, 1
@@ -6296,14 +6357,8 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v24, s65, 15
; VI-NEXT: v_writelane_b32 v24, s66, 16
; VI-NEXT: v_writelane_b32 v24, s67, 17
-; VI-NEXT: v_writelane_b32 v24, s68, 18
-; VI-NEXT: v_writelane_b32 v24, s69, 19
-; VI-NEXT: v_writelane_b32 v24, s70, 20
-; VI-NEXT: v_writelane_b32 v24, s71, 21
-; VI-NEXT: v_writelane_b32 v24, s80, 22
-; VI-NEXT: v_writelane_b32 v24, s81, 23
-; VI-NEXT: v_writelane_b32 v24, s30, 24
-; VI-NEXT: v_writelane_b32 v24, s31, 25
+; VI-NEXT: v_writelane_b32 v24, s30, 18
+; VI-NEXT: v_writelane_b32 v24, s31, 19
; VI-NEXT: v_readfirstlane_b32 s7, v9
; VI-NEXT: v_readfirstlane_b32 s9, v8
; VI-NEXT: v_readfirstlane_b32 s11, v7
@@ -6313,21 +6368,21 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s77, v3
; VI-NEXT: v_readfirstlane_b32 s88, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s60, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s75, s28, 16
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s31, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s62, s23, 16
+; VI-NEXT: s_lshr_b32 s63, s22, 16
+; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 16
+; VI-NEXT: s_lshr_b32 s64, s17, 16
+; VI-NEXT: s_lshr_b32 s65, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -6337,37 +6392,37 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s76, s77, 16
; VI-NEXT: s_lshr_b32 s79, s88, 16
; VI-NEXT: s_lshr_b32 s90, s91, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s60, 16
; VI-NEXT: v_readfirstlane_b32 s4, v10
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -6384,7 +6439,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_and_b32 s4, 0xffff, s60
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
@@ -6417,8 +6472,69 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
+; VI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v25, s77, 0
+; VI-NEXT: v_writelane_b32 v25, s74, 1
+; VI-NEXT: v_writelane_b32 v25, s15, 2
+; VI-NEXT: v_writelane_b32 v25, s13, 3
+; VI-NEXT: v_writelane_b32 v25, s11, 4
+; VI-NEXT: v_writelane_b32 v25, s9, 5
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s90
+; VI-NEXT: s_mov_b32 s90, s89
+; VI-NEXT: s_mov_b32 s89, s79
+; VI-NEXT: s_mov_b32 s79, s78
+; VI-NEXT: s_mov_b32 s78, s76
+; VI-NEXT: s_mov_b32 s76, s75
+; VI-NEXT: s_mov_b32 s75, s73
+; VI-NEXT: s_mov_b32 s73, s72
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s60
+; VI-NEXT: s_mov_b32 s77, s61
+; VI-NEXT: s_mov_b32 s74, s88
+; VI-NEXT: s_mov_b32 s88, s62
+; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s15, s91
+; VI-NEXT: s_mov_b32 s91, s64
+; VI-NEXT: s_mov_b32 s13, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s65, s13
+; VI-NEXT: s_mov_b32 s64, s91
+; VI-NEXT: s_mov_b32 s91, s15
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s88
+; VI-NEXT: s_mov_b32 s88, s74
+; VI-NEXT: s_mov_b32 s61, s77
+; VI-NEXT: s_mov_b32 s60, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: s_mov_b32 s72, s73
+; VI-NEXT: s_mov_b32 s73, s75
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_mov_b32 s76, s78
+; VI-NEXT: s_mov_b32 s78, s79
+; VI-NEXT: s_mov_b32 s79, s89
+; VI-NEXT: s_mov_b32 s89, s90
+; VI-NEXT: s_mov_b32 s90, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: v_readlane_b32 s9, v25, 5
+; VI-NEXT: v_readlane_b32 s11, v25, 4
+; VI-NEXT: v_readlane_b32 s13, v25, 3
+; VI-NEXT: v_readlane_b32 s15, v25, 2
+; VI-NEXT: v_readlane_b32 s74, v25, 1
+; VI-NEXT: v_readlane_b32 s77, v25, 0
; VI-NEXT: .LBB15_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -6427,47 +6543,47 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -6494,59 +6610,59 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
+; VI-NEXT: s_add_i32 s4, s60, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s91, 0xffff
+; VI-NEXT: s_add_i32 s4, s91, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s88, 0xffff
+; VI-NEXT: s_add_i32 s4, s88, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s73, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v24, 24
+; VI-NEXT: v_readlane_b32 s30, v24, 18
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -6571,13 +6687,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v21, s57
; VI-NEXT: v_mov_b32_e32 v22, s58
; VI-NEXT: v_mov_b32_e32 v23, s59
-; VI-NEXT: v_readlane_b32 s31, v24, 25
-; VI-NEXT: v_readlane_b32 s81, v24, 23
-; VI-NEXT: v_readlane_b32 s80, v24, 22
-; VI-NEXT: v_readlane_b32 s71, v24, 21
-; VI-NEXT: v_readlane_b32 s70, v24, 20
-; VI-NEXT: v_readlane_b32 s69, v24, 19
-; VI-NEXT: v_readlane_b32 s68, v24, 18
+; VI-NEXT: v_readlane_b32 s31, v24, 19
; VI-NEXT: v_readlane_b32 s67, v24, 17
; VI-NEXT: v_readlane_b32 s66, v24, 16
; VI-NEXT: v_readlane_b32 s65, v24, 15
@@ -6598,6 +6708,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_readlane_b32 s34, v24, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -7697,6 +7808,8 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s12, v0
; SI-NEXT: s_cbranch_scc0 .LBB17_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
; SI-NEXT: s_lshr_b32 s88, s5, 16
; SI-NEXT: s_lshr_b32 s89, s7, 16
; SI-NEXT: s_lshr_b32 s90, s9, 16
@@ -7707,9 +7820,8 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s25, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
@@ -7726,9 +7838,9 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: .LBB17_2:
; SI-NEXT: s_mov_b64 s[78:79], -1
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr62
@@ -7751,10 +7863,12 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: .LBB17_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -7777,8 +7891,6 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
@@ -7797,25 +7909,16 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s25, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
+; SI-NEXT: s_lshr_b32 s15, s19, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16
; SI-NEXT: .LBB17_5: ; %end
-; SI-NEXT: s_lshl_b32 s15, s76, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s74, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s15, s19, s15
; SI-NEXT: s_lshl_b32 s19, s72, 16
; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s19, s20, s19
@@ -7860,27 +7963,36 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i
; SI-NEXT: s_or_b32 s11, s11, s29
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_lshl_b32 s41, s76, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s29
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s29
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s29, s40, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s17, s17, s41
+; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s29
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s29, s89, 16
; SI-NEXT: s_or_b32 s4, s4, s14
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s14, s88, 16
+; SI-NEXT: s_or_b32 s18, s18, s41
; SI-NEXT: s_or_b32 s7, s7, s29
; SI-NEXT: s_or_b32 s5, s5, s14
; SI-NEXT: v_readlane_b32 s30, v24, 0
-; SI-NEXT: v_mov_b32_e32 v0, s15
-; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_mov_b32_e32 v2, s17
-; SI-NEXT: v_mov_b32_e32 v3, s18
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
+; SI-NEXT: v_mov_b32_e32 v3, s15
; SI-NEXT: v_mov_b32_e32 v4, s19
; SI-NEXT: v_mov_b32_e32 v5, s20
; SI-NEXT: v_mov_b32_e32 v6, s21
@@ -9789,13 +9901,13 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s30, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_lshr_b32 s34, s18, 16
; SI-NEXT: s_lshr_b32 s68, s17, 16
; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s35, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -9805,28 +9917,29 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s77, s76, 16
; SI-NEXT: s_lshr_b32 s88, s79, 16
; SI-NEXT: s_lshr_b32 s91, s89, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v10
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s42, s4, s5
@@ -9879,11 +9992,12 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB19_3: ; %Flow
@@ -9904,7 +10018,7 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s34
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s19
@@ -9914,20 +10028,20 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v2, s18
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v5, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s20
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s7
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -10070,7 +10184,7 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: v_cvt_f32_f16_e32 v23, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v24, s35
; SI-NEXT: v_cvt_f32_f16_e32 v25, s6
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
@@ -10188,22 +10302,22 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s76, v3
; VI-NEXT: v_readfirstlane_b32 s79, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s74, s28, 16
; VI-NEXT: s_lshr_b32 s77, s27, 16
; VI-NEXT: s_lshr_b32 s88, s26, 16
; VI-NEXT: s_lshr_b32 s90, s25, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s23, 16
+; VI-NEXT: s_lshr_b32 s34, s22, 16
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s68, s20, 16
+; VI-NEXT: s_lshr_b32 s69, s19, 16
+; VI-NEXT: s_lshr_b32 s70, s18, 16
+; VI-NEXT: s_lshr_b32 s71, s17, 16
+; VI-NEXT: s_lshr_b32 s80, s16, 16
+; VI-NEXT: s_lshr_b32 s81, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -10212,55 +10326,56 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s78, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v10
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v10
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s80, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s37, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s72, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -10287,11 +10402,12 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s59, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB19_3
; VI-NEXT: .LBB19_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -10301,35 +10417,35 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v23, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s81
-; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: v_mov_b32_e32 v0, s80
+; VI-NEXT: v_mov_b32_e32 v2, s71
; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v23
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v23
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s71
+; VI-NEXT: v_mov_b32_e32 v2, s70
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v23
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s70
+; VI-NEXT: v_mov_b32_e32 v3, s69
; VI-NEXT: v_add_f16_sdwa v3, v3, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v23
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s69
+; VI-NEXT: v_mov_b32_e32 v4, s68
; VI-NEXT: v_add_f16_sdwa v4, v4, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v23
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s68
+; VI-NEXT: v_mov_b32_e32 v5, s35
; VI-NEXT: v_add_f16_sdwa v5, v5, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v23
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s35
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_add_f16_sdwa v6, v6, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v23
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_mov_b32_e32 v7, s31
; VI-NEXT: v_add_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v23
; VI-NEXT: v_or_b32_e32 v7, v8, v7
@@ -10357,9 +10473,9 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v23
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s31
+; VI-NEXT: v_mov_b32_e32 v14, s30
; VI-NEXT: v_add_f16_sdwa v14, v14, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s30, v23
+; VI-NEXT: v_add_f16_e32 v15, s7, v23
; VI-NEXT: v_or_b32_e32 v14, v15, v14
; VI-NEXT: v_mov_b32_e32 v15, vcc_lo
; VI-NEXT: v_add_f16_sdwa v15, v15, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -10393,7 +10509,7 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v22, v22, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v24, s8, v23
; VI-NEXT: v_or_b32_e32 v22, v24, v22
-; VI-NEXT: v_mov_b32_e32 v24, s7
+; VI-NEXT: v_mov_b32_e32 v24, s81
; VI-NEXT: v_add_f16_sdwa v24, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v23, s6, v23
; VI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -13998,8 +14114,9 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s12, v0
; SI-NEXT: s_cbranch_scc0 .LBB29_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s31, s5, 16
-; SI-NEXT: s_lshr_b32 s30, s7, 16
+; SI-NEXT: s_lshr_b32 s40, s7, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s11, 16
; SI-NEXT: s_lshr_b32 s95, s13, 16
@@ -14010,7 +14127,7 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s21, 16
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
@@ -14047,13 +14164,13 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: .LBB29_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB29_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v23, s5, 1.0
@@ -14140,8 +14257,8 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v48, s95
; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: v_mov_b32_e32 v38, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v37, s30
-; SI-NEXT: v_mov_b32_e32 v36, s31
+; SI-NEXT: v_mov_b32_e32 v37, s15
+; SI-NEXT: v_mov_b32_e32 v36, s30
; SI-NEXT: v_mov_b32_e32 v24, s14
; SI-NEXT: v_mov_b32_e32 v25, s40
; SI-NEXT: v_mov_b32_e32 v26, s42
@@ -16225,30 +16342,27 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s34, 0
-; SI-NEXT: v_writelane_b32 v24, s35, 1
-; SI-NEXT: v_writelane_b32 v24, s36, 2
-; SI-NEXT: v_writelane_b32 v24, s37, 3
-; SI-NEXT: v_writelane_b32 v24, s38, 4
-; SI-NEXT: v_writelane_b32 v24, s39, 5
-; SI-NEXT: v_writelane_b32 v24, s48, 6
-; SI-NEXT: v_writelane_b32 v24, s49, 7
-; SI-NEXT: v_writelane_b32 v24, s50, 8
-; SI-NEXT: v_writelane_b32 v24, s51, 9
-; SI-NEXT: v_writelane_b32 v24, s52, 10
-; SI-NEXT: v_writelane_b32 v24, s53, 11
-; SI-NEXT: v_writelane_b32 v24, s54, 12
-; SI-NEXT: v_writelane_b32 v24, s55, 13
-; SI-NEXT: v_writelane_b32 v24, s64, 14
-; SI-NEXT: v_writelane_b32 v24, s65, 15
-; SI-NEXT: v_writelane_b32 v24, s66, 16
-; SI-NEXT: v_writelane_b32 v24, s67, 17
-; SI-NEXT: v_writelane_b32 v24, s68, 18
-; SI-NEXT: v_writelane_b32 v24, s69, 19
-; SI-NEXT: v_writelane_b32 v24, s30, 20
-; SI-NEXT: v_writelane_b32 v24, s31, 21
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v24, s36, 0
+; SI-NEXT: v_writelane_b32 v24, s37, 1
+; SI-NEXT: v_writelane_b32 v24, s38, 2
+; SI-NEXT: v_writelane_b32 v24, s39, 3
+; SI-NEXT: v_writelane_b32 v24, s48, 4
+; SI-NEXT: v_writelane_b32 v24, s49, 5
+; SI-NEXT: v_writelane_b32 v24, s50, 6
+; SI-NEXT: v_writelane_b32 v24, s51, 7
+; SI-NEXT: v_writelane_b32 v24, s52, 8
+; SI-NEXT: v_writelane_b32 v24, s53, 9
+; SI-NEXT: v_writelane_b32 v24, s54, 10
+; SI-NEXT: v_writelane_b32 v24, s55, 11
+; SI-NEXT: v_writelane_b32 v24, s64, 12
+; SI-NEXT: v_writelane_b32 v24, s65, 13
+; SI-NEXT: v_writelane_b32 v24, s66, 14
+; SI-NEXT: v_writelane_b32 v24, s67, 15
+; SI-NEXT: v_writelane_b32 v24, s30, 16
+; SI-NEXT: v_writelane_b32 v24, s31, 17
; SI-NEXT: v_readfirstlane_b32 s7, v9
; SI-NEXT: v_readfirstlane_b32 s9, v8
; SI-NEXT: v_readfirstlane_b32 s11, v7
@@ -16267,12 +16381,12 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
-; SI-NEXT: s_lshr_b32 s68, s17, 16
-; SI-NEXT: s_lshr_b32 s69, s16, 16
+; SI-NEXT: s_lshr_b32 s60, s21, 16
+; SI-NEXT: s_lshr_b32 s61, s20, 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_lshr_b32 s31, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -16288,22 +16402,22 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_cbranch_scc0 .LBB31_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -16362,8 +16476,72 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB31_3
; SI-NEXT: .LBB31_2:
+; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v25, s77, 0
+; SI-NEXT: v_writelane_b32 v25, s74, 1
+; SI-NEXT: v_writelane_b32 v25, s15, 2
+; SI-NEXT: v_writelane_b32 v25, s13, 3
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s95
+; SI-NEXT: s_mov_b32 s95, s93
+; SI-NEXT: s_mov_b32 s93, s92
+; SI-NEXT: s_mov_b32 s92, s90
+; SI-NEXT: s_mov_b32 s90, s89
+; SI-NEXT: s_mov_b32 s89, s79
+; SI-NEXT: s_mov_b32 s79, s78
+; SI-NEXT: s_mov_b32 s78, s76
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_mov_b32 s75, s73
+; SI-NEXT: s_mov_b32 s73, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s60
+; SI-NEXT: s_mov_b32 s77, s88
+; SI-NEXT: s_mov_b32 s88, s61
+; SI-NEXT: s_mov_b32 s74, s91
+; SI-NEXT: s_mov_b32 s91, s62
+; SI-NEXT: s_mov_b32 s15, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s63, s15
+; SI-NEXT: s_mov_b32 s62, s91
+; SI-NEXT: s_mov_b32 s91, s74
+; SI-NEXT: s_mov_b32 s61, s88
+; SI-NEXT: s_mov_b32 s88, s77
+; SI-NEXT: s_mov_b32 s60, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s73
+; SI-NEXT: s_mov_b32 s73, s75
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_mov_b32 s76, s78
+; SI-NEXT: s_mov_b32 s78, s79
+; SI-NEXT: s_mov_b32 s79, s89
+; SI-NEXT: s_mov_b32 s89, s90
+; SI-NEXT: s_mov_b32 s90, s92
+; SI-NEXT: s_mov_b32 s92, s93
+; SI-NEXT: s_mov_b32 s93, s95
+; SI-NEXT: s_mov_b32 s95, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: v_readlane_b32 s13, v25, 3
+; SI-NEXT: v_readlane_b32 s15, v25, 2
+; SI-NEXT: v_readlane_b32 s74, v25, 1
+; SI-NEXT: v_readlane_b32 s77, v25, 0
; SI-NEXT: .LBB31_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -16372,32 +16550,32 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -16444,54 +16622,54 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s91, s91, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s91, 0xffff
+; SI-NEXT: s_add_i32 s4, s91, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s88, s88, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s88, 0xffff
+; SI-NEXT: s_add_i32 s4, s88, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s79, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s77, s77, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s77, 0xffff
+; SI-NEXT: s_add_i32 s4, s77, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s74, s74, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s74, 0xffff
+; SI-NEXT: s_add_i32 s4, s74, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
; SI-NEXT: .LBB31_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v24, 20
+; SI-NEXT: v_readlane_b32 s30, v24, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -16516,29 +16694,27 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v21, s57
; SI-NEXT: v_mov_b32_e32 v22, s58
; SI-NEXT: v_mov_b32_e32 v23, s59
-; SI-NEXT: v_readlane_b32 s31, v24, 21
-; SI-NEXT: v_readlane_b32 s69, v24, 19
-; SI-NEXT: v_readlane_b32 s68, v24, 18
-; SI-NEXT: v_readlane_b32 s67, v24, 17
-; SI-NEXT: v_readlane_b32 s66, v24, 16
-; SI-NEXT: v_readlane_b32 s65, v24, 15
-; SI-NEXT: v_readlane_b32 s64, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 13
-; SI-NEXT: v_readlane_b32 s54, v24, 12
-; SI-NEXT: v_readlane_b32 s53, v24, 11
-; SI-NEXT: v_readlane_b32 s52, v24, 10
-; SI-NEXT: v_readlane_b32 s51, v24, 9
-; SI-NEXT: v_readlane_b32 s50, v24, 8
-; SI-NEXT: v_readlane_b32 s49, v24, 7
-; SI-NEXT: v_readlane_b32 s48, v24, 6
-; SI-NEXT: v_readlane_b32 s39, v24, 5
-; SI-NEXT: v_readlane_b32 s38, v24, 4
-; SI-NEXT: v_readlane_b32 s37, v24, 3
-; SI-NEXT: v_readlane_b32 s36, v24, 2
-; SI-NEXT: v_readlane_b32 s35, v24, 1
-; SI-NEXT: v_readlane_b32 s34, v24, 0
+; SI-NEXT: v_readlane_b32 s31, v24, 17
+; SI-NEXT: v_readlane_b32 s67, v24, 15
+; SI-NEXT: v_readlane_b32 s66, v24, 14
+; SI-NEXT: v_readlane_b32 s65, v24, 13
+; SI-NEXT: v_readlane_b32 s64, v24, 12
+; SI-NEXT: v_readlane_b32 s55, v24, 11
+; SI-NEXT: v_readlane_b32 s54, v24, 10
+; SI-NEXT: v_readlane_b32 s53, v24, 9
+; SI-NEXT: v_readlane_b32 s52, v24, 8
+; SI-NEXT: v_readlane_b32 s51, v24, 7
+; SI-NEXT: v_readlane_b32 s50, v24, 6
+; SI-NEXT: v_readlane_b32 s49, v24, 5
+; SI-NEXT: v_readlane_b32 s48, v24, 4
+; SI-NEXT: v_readlane_b32 s39, v24, 3
+; SI-NEXT: v_readlane_b32 s38, v24, 2
+; SI-NEXT: v_readlane_b32 s37, v24, 1
+; SI-NEXT: v_readlane_b32 s36, v24, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -16548,6 +16724,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v24, s34, 0
; VI-NEXT: v_writelane_b32 v24, s35, 1
@@ -16567,14 +16744,8 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v24, s65, 15
; VI-NEXT: v_writelane_b32 v24, s66, 16
; VI-NEXT: v_writelane_b32 v24, s67, 17
-; VI-NEXT: v_writelane_b32 v24, s68, 18
-; VI-NEXT: v_writelane_b32 v24, s69, 19
-; VI-NEXT: v_writelane_b32 v24, s70, 20
-; VI-NEXT: v_writelane_b32 v24, s71, 21
-; VI-NEXT: v_writelane_b32 v24, s80, 22
-; VI-NEXT: v_writelane_b32 v24, s81, 23
-; VI-NEXT: v_writelane_b32 v24, s30, 24
-; VI-NEXT: v_writelane_b32 v24, s31, 25
+; VI-NEXT: v_writelane_b32 v24, s30, 18
+; VI-NEXT: v_writelane_b32 v24, s31, 19
; VI-NEXT: v_readfirstlane_b32 s7, v9
; VI-NEXT: v_readfirstlane_b32 s9, v8
; VI-NEXT: v_readfirstlane_b32 s11, v7
@@ -16584,21 +16755,21 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s77, v3
; VI-NEXT: v_readfirstlane_b32 s88, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s60, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s75, s28, 16
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s31, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s62, s23, 16
+; VI-NEXT: s_lshr_b32 s63, s22, 16
+; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 16
+; VI-NEXT: s_lshr_b32 s64, s17, 16
+; VI-NEXT: s_lshr_b32 s65, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -16608,37 +16779,37 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s76, s77, 16
; VI-NEXT: s_lshr_b32 s79, s88, 16
; VI-NEXT: s_lshr_b32 s90, s91, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s60, 16
; VI-NEXT: v_readfirstlane_b32 s4, v10
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -16655,7 +16826,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_and_b32 s4, 0xffff, s60
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
@@ -16688,8 +16859,69 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
+; VI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v25, s77, 0
+; VI-NEXT: v_writelane_b32 v25, s74, 1
+; VI-NEXT: v_writelane_b32 v25, s15, 2
+; VI-NEXT: v_writelane_b32 v25, s13, 3
+; VI-NEXT: v_writelane_b32 v25, s11, 4
+; VI-NEXT: v_writelane_b32 v25, s9, 5
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s90
+; VI-NEXT: s_mov_b32 s90, s89
+; VI-NEXT: s_mov_b32 s89, s79
+; VI-NEXT: s_mov_b32 s79, s78
+; VI-NEXT: s_mov_b32 s78, s76
+; VI-NEXT: s_mov_b32 s76, s75
+; VI-NEXT: s_mov_b32 s75, s73
+; VI-NEXT: s_mov_b32 s73, s72
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s60
+; VI-NEXT: s_mov_b32 s77, s61
+; VI-NEXT: s_mov_b32 s74, s88
+; VI-NEXT: s_mov_b32 s88, s62
+; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s15, s91
+; VI-NEXT: s_mov_b32 s91, s64
+; VI-NEXT: s_mov_b32 s13, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s65, s13
+; VI-NEXT: s_mov_b32 s64, s91
+; VI-NEXT: s_mov_b32 s91, s15
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s88
+; VI-NEXT: s_mov_b32 s88, s74
+; VI-NEXT: s_mov_b32 s61, s77
+; VI-NEXT: s_mov_b32 s60, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: s_mov_b32 s72, s73
+; VI-NEXT: s_mov_b32 s73, s75
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_mov_b32 s76, s78
+; VI-NEXT: s_mov_b32 s78, s79
+; VI-NEXT: s_mov_b32 s79, s89
+; VI-NEXT: s_mov_b32 s89, s90
+; VI-NEXT: s_mov_b32 s90, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: v_readlane_b32 s9, v25, 5
+; VI-NEXT: v_readlane_b32 s11, v25, 4
+; VI-NEXT: v_readlane_b32 s13, v25, 3
+; VI-NEXT: v_readlane_b32 s15, v25, 2
+; VI-NEXT: v_readlane_b32 s74, v25, 1
+; VI-NEXT: v_readlane_b32 s77, v25, 0
; VI-NEXT: .LBB31_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -16698,47 +16930,47 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -16765,59 +16997,59 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
+; VI-NEXT: s_add_i32 s4, s60, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s91, 0xffff
+; VI-NEXT: s_add_i32 s4, s91, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s88, 0xffff
+; VI-NEXT: s_add_i32 s4, s88, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s73, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v24, 24
+; VI-NEXT: v_readlane_b32 s30, v24, 18
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -16842,13 +17074,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v21, s57
; VI-NEXT: v_mov_b32_e32 v22, s58
; VI-NEXT: v_mov_b32_e32 v23, s59
-; VI-NEXT: v_readlane_b32 s31, v24, 25
-; VI-NEXT: v_readlane_b32 s81, v24, 23
-; VI-NEXT: v_readlane_b32 s80, v24, 22
-; VI-NEXT: v_readlane_b32 s71, v24, 21
-; VI-NEXT: v_readlane_b32 s70, v24, 20
-; VI-NEXT: v_readlane_b32 s69, v24, 19
-; VI-NEXT: v_readlane_b32 s68, v24, 18
+; VI-NEXT: v_readlane_b32 s31, v24, 19
; VI-NEXT: v_readlane_b32 s67, v24, 17
; VI-NEXT: v_readlane_b32 s66, v24, 16
; VI-NEXT: v_readlane_b32 s65, v24, 15
@@ -16869,6 +17095,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_readlane_b32 s34, v24, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -17944,8 +18171,9 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s12, v0
; SI-NEXT: s_cbranch_scc0 .LBB33_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s31, s5, 16
-; SI-NEXT: s_lshr_b32 s30, s7, 16
+; SI-NEXT: s_lshr_b32 s40, s7, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s11, 16
; SI-NEXT: s_lshr_b32 s95, s13, 16
@@ -17956,7 +18184,7 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s21, 16
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
@@ -17993,13 +18221,13 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: .LBB33_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB33_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v23, s5, 1.0
@@ -18086,8 +18314,8 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v48, s95
; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: v_mov_b32_e32 v38, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v37, s30
-; SI-NEXT: v_mov_b32_e32 v36, s31
+; SI-NEXT: v_mov_b32_e32 v37, s15
+; SI-NEXT: v_mov_b32_e32 v36, s30
; SI-NEXT: v_mov_b32_e32 v24, s14
; SI-NEXT: v_mov_b32_e32 v25, s40
; SI-NEXT: v_mov_b32_e32 v26, s42
@@ -20325,13 +20553,13 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s30, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_lshr_b32 s34, s18, 16
; SI-NEXT: s_lshr_b32 s68, s17, 16
; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s35, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -20341,28 +20569,29 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s77, s76, 16
; SI-NEXT: s_lshr_b32 s88, s79, 16
; SI-NEXT: s_lshr_b32 s91, s89, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v10
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB35_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s42, s4, s5
@@ -20415,11 +20644,12 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB35_3
; SI-NEXT: .LBB35_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB35_3: ; %Flow
@@ -20440,7 +20670,7 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s34
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s19
@@ -20450,20 +20680,20 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v2, s18
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v5, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s20
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s7
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -20606,7 +20836,7 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: v_cvt_f32_f16_e32 v23, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v24, s35
; SI-NEXT: v_cvt_f32_f16_e32 v25, s6
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
@@ -20724,22 +20954,22 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s76, v3
; VI-NEXT: v_readfirstlane_b32 s79, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s74, s28, 16
; VI-NEXT: s_lshr_b32 s77, s27, 16
; VI-NEXT: s_lshr_b32 s88, s26, 16
; VI-NEXT: s_lshr_b32 s90, s25, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s23, 16
+; VI-NEXT: s_lshr_b32 s34, s22, 16
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s68, s20, 16
+; VI-NEXT: s_lshr_b32 s69, s19, 16
+; VI-NEXT: s_lshr_b32 s70, s18, 16
+; VI-NEXT: s_lshr_b32 s71, s17, 16
+; VI-NEXT: s_lshr_b32 s80, s16, 16
+; VI-NEXT: s_lshr_b32 s81, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -20748,55 +20978,56 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s78, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v10
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v10
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s80, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s37, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s72, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -20823,11 +21054,12 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s59, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB35_3
; VI-NEXT: .LBB35_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -20837,35 +21069,35 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v23, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s81
-; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: v_mov_b32_e32 v0, s80
+; VI-NEXT: v_mov_b32_e32 v2, s71
; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v23
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v23
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s71
+; VI-NEXT: v_mov_b32_e32 v2, s70
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v23
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s70
+; VI-NEXT: v_mov_b32_e32 v3, s69
; VI-NEXT: v_add_f16_sdwa v3, v3, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v23
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s69
+; VI-NEXT: v_mov_b32_e32 v4, s68
; VI-NEXT: v_add_f16_sdwa v4, v4, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v23
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s68
+; VI-NEXT: v_mov_b32_e32 v5, s35
; VI-NEXT: v_add_f16_sdwa v5, v5, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v23
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s35
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_add_f16_sdwa v6, v6, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v23
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_mov_b32_e32 v7, s31
; VI-NEXT: v_add_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v23
; VI-NEXT: v_or_b32_e32 v7, v8, v7
@@ -20893,9 +21125,9 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v13, v13, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v23
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s31
+; VI-NEXT: v_mov_b32_e32 v14, s30
; VI-NEXT: v_add_f16_sdwa v14, v14, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s30, v23
+; VI-NEXT: v_add_f16_e32 v15, s7, v23
; VI-NEXT: v_or_b32_e32 v14, v15, v14
; VI-NEXT: v_mov_b32_e32 v15, vcc_lo
; VI-NEXT: v_add_f16_sdwa v15, v15, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -20929,7 +21161,7 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v22, v22, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v24, s8, v23
; VI-NEXT: v_or_b32_e32 v22, v24, v22
-; VI-NEXT: v_mov_b32_e32 v24, s7
+; VI-NEXT: v_mov_b32_e32 v24, s81
; VI-NEXT: v_add_f16_sdwa v24, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v23, s6, v23
; VI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -23178,9 +23410,6 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s30, 0
-; SI-NEXT: v_writelane_b32 v24, s31, 1
; SI-NEXT: v_readfirstlane_b32 s12, v10
; SI-NEXT: v_readfirstlane_b32 s5, v9
; SI-NEXT: v_readfirstlane_b32 s4, v8
@@ -23193,28 +23422,32 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s13, v1
; SI-NEXT: s_cmp_lg_u32 s12, 0
; SI-NEXT: v_readfirstlane_b32 s12, v0
+; SI-NEXT: ; implicit-def: $vgpr24 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB41_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s88, s5, 16
-; SI-NEXT: s_lshr_b32 s89, s7, 16
-; SI-NEXT: s_lshr_b32 s90, s9, 16
-; SI-NEXT: s_lshr_b32 s91, s11, 16
-; SI-NEXT: s_lshr_b32 s92, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s29, 16
-; SI-NEXT: s_lshr_b32 s94, s27, 16
-; SI-NEXT: s_lshr_b32 s95, s25, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s40, s21, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v24, s40, 1
+; SI-NEXT: s_lshr_b32 s40, s17, 16
+; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b32 s90, s7, 16
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s92, s11, 16
+; SI-NEXT: s_lshr_b32 s93, s13, 16
+; SI-NEXT: s_lshr_b32 s94, s29, 16
+; SI-NEXT: s_lshr_b32 s95, s27, 16
+; SI-NEXT: s_lshr_b32 s14, s25, 16
+; SI-NEXT: s_lshr_b32 s88, s23, 16
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: v_writelane_b32 v24, s40, 0
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -23222,15 +23455,18 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[78:79], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: s_mov_b64 s[78:79], -1
+; SI-NEXT: ; kill: killed $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; kill: killed $sgpr14
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr58
@@ -23243,14 +23479,15 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: v_readlane_b32 s79, v24, 0
+; SI-NEXT: v_readlane_b32 s78, v24, 1
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -23277,114 +23514,113 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s88, s5, 16
-; SI-NEXT: s_lshr_b32 s89, s7, 16
-; SI-NEXT: s_lshr_b32 s90, s9, 16
-; SI-NEXT: s_lshr_b32 s91, s11, 16
-; SI-NEXT: s_lshr_b32 s92, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s29, 16
-; SI-NEXT: s_lshr_b32 s94, s27, 16
-; SI-NEXT: s_lshr_b32 s95, s25, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b32 s90, s7, 16
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s92, s11, 16
+; SI-NEXT: s_lshr_b32 s93, s13, 16
+; SI-NEXT: s_lshr_b32 s94, s29, 16
+; SI-NEXT: s_lshr_b32 s95, s27, 16
+; SI-NEXT: s_lshr_b32 s14, s25, 16
+; SI-NEXT: s_lshr_b32 s88, s23, 16
+; SI-NEXT: s_lshr_b32 s78, s21, 16
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: s_lshr_b32 s79, s17, 16
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_lshl_b32 s15, s76, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s74, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_lshl_b32 s19, s72, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s19, s20, s19
-; SI-NEXT: s_and_b32 s20, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; SI-NEXT: s_or_b32 s20, s20, s21
-; SI-NEXT: s_and_b32 s21, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s62, 16
-; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: s_and_b32 s22, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s23, vcc_lo, 16
-; SI-NEXT: s_or_b32 s22, s22, s23
-; SI-NEXT: s_and_b32 s23, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s60, 16
-; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s95, 16
-; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s14, s25, s14
; SI-NEXT: s_and_b32 s25, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s58, 16
+; SI-NEXT: s_lshl_b32 s26, s60, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s94, 16
+; SI-NEXT: s_lshl_b32 s27, s95, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s56, 16
+; SI-NEXT: s_lshl_b32 s28, s58, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s93, 16
+; SI-NEXT: s_lshl_b32 s29, s94, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s46, 16
+; SI-NEXT: s_lshl_b32 s29, s56, 16
+; SI-NEXT: s_lshl_b32 s41, s76, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s29
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s92, 16
+; SI-NEXT: s_lshl_b32 s29, s93, 16
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s79, 16
; SI-NEXT: s_or_b32 s13, s13, s29
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s44, 16
+; SI-NEXT: s_lshl_b32 s29, s46, 16
+; SI-NEXT: s_or_b32 s17, s17, s41
+; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s29
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s91, 16
+; SI-NEXT: s_lshl_b32 s29, s92, 16
+; SI-NEXT: s_or_b32 s18, s18, s41
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s89, 16
; SI-NEXT: s_or_b32 s11, s11, s29
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_lshl_b32 s29, s44, 16
+; SI-NEXT: s_or_b32 s19, s19, s41
+; SI-NEXT: s_lshl_b32 s41, s72, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s29
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_lshl_b32 s29, s91, 16
+; SI-NEXT: s_or_b32 s20, s20, s41
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s78, 16
; SI-NEXT: s_or_b32 s9, s9, s29
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s40, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_or_b32 s21, s21, s41
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s62, 16
; SI-NEXT: s_or_b32 s6, s6, s29
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s89, 16
-; SI-NEXT: s_or_b32 s4, s4, s14
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s88, 16
+; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_or_b32 s22, s22, s41
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_or_b32 s7, s7, s29
-; SI-NEXT: s_or_b32 s5, s5, s14
-; SI-NEXT: v_readlane_b32 s30, v24, 0
-; SI-NEXT: v_mov_b32_e32 v0, s15
-; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_mov_b32_e32 v2, s17
-; SI-NEXT: v_mov_b32_e32 v3, s18
-; SI-NEXT: v_mov_b32_e32 v4, s19
-; SI-NEXT: v_mov_b32_e32 v5, s20
-; SI-NEXT: v_mov_b32_e32 v6, s21
-; SI-NEXT: v_mov_b32_e32 v7, s22
-; SI-NEXT: v_mov_b32_e32 v8, s23
-; SI-NEXT: v_mov_b32_e32 v9, s24
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s29, vcc_lo, 16
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s23, s23, s41
+; SI-NEXT: s_or_b32 s24, s24, s40
+; SI-NEXT: s_or_b32 s4, s4, s29
+; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
+; SI-NEXT: v_mov_b32_e32 v3, s19
+; SI-NEXT: v_mov_b32_e32 v4, s20
+; SI-NEXT: v_mov_b32_e32 v5, s21
+; SI-NEXT: v_mov_b32_e32 v6, s22
+; SI-NEXT: v_mov_b32_e32 v7, s23
+; SI-NEXT: v_mov_b32_e32 v8, s24
+; SI-NEXT: v_mov_b32_e32 v9, s14
; SI-NEXT: v_mov_b32_e32 v10, s25
; SI-NEXT: v_mov_b32_e32 v11, s26
; SI-NEXT: v_mov_b32_e32 v12, s27
@@ -23399,8 +23635,8 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v21, s7
; SI-NEXT: v_mov_b32_e32 v22, s4
; SI-NEXT: v_mov_b32_e32 v23, s5
-; SI-NEXT: v_readlane_b32 s31, v24, 1
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -25133,30 +25369,27 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s34, 0
-; SI-NEXT: v_writelane_b32 v24, s35, 1
-; SI-NEXT: v_writelane_b32 v24, s36, 2
-; SI-NEXT: v_writelane_b32 v24, s37, 3
-; SI-NEXT: v_writelane_b32 v24, s38, 4
-; SI-NEXT: v_writelane_b32 v24, s39, 5
-; SI-NEXT: v_writelane_b32 v24, s48, 6
-; SI-NEXT: v_writelane_b32 v24, s49, 7
-; SI-NEXT: v_writelane_b32 v24, s50, 8
-; SI-NEXT: v_writelane_b32 v24, s51, 9
-; SI-NEXT: v_writelane_b32 v24, s52, 10
-; SI-NEXT: v_writelane_b32 v24, s53, 11
-; SI-NEXT: v_writelane_b32 v24, s54, 12
-; SI-NEXT: v_writelane_b32 v24, s55, 13
-; SI-NEXT: v_writelane_b32 v24, s64, 14
-; SI-NEXT: v_writelane_b32 v24, s65, 15
-; SI-NEXT: v_writelane_b32 v24, s66, 16
-; SI-NEXT: v_writelane_b32 v24, s67, 17
-; SI-NEXT: v_writelane_b32 v24, s68, 18
-; SI-NEXT: v_writelane_b32 v24, s69, 19
-; SI-NEXT: v_writelane_b32 v24, s30, 20
-; SI-NEXT: v_writelane_b32 v24, s31, 21
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v24, s36, 0
+; SI-NEXT: v_writelane_b32 v24, s37, 1
+; SI-NEXT: v_writelane_b32 v24, s38, 2
+; SI-NEXT: v_writelane_b32 v24, s39, 3
+; SI-NEXT: v_writelane_b32 v24, s48, 4
+; SI-NEXT: v_writelane_b32 v24, s49, 5
+; SI-NEXT: v_writelane_b32 v24, s50, 6
+; SI-NEXT: v_writelane_b32 v24, s51, 7
+; SI-NEXT: v_writelane_b32 v24, s52, 8
+; SI-NEXT: v_writelane_b32 v24, s53, 9
+; SI-NEXT: v_writelane_b32 v24, s54, 10
+; SI-NEXT: v_writelane_b32 v24, s55, 11
+; SI-NEXT: v_writelane_b32 v24, s64, 12
+; SI-NEXT: v_writelane_b32 v24, s65, 13
+; SI-NEXT: v_writelane_b32 v24, s66, 14
+; SI-NEXT: v_writelane_b32 v24, s67, 15
+; SI-NEXT: v_writelane_b32 v24, s30, 16
+; SI-NEXT: v_writelane_b32 v24, s31, 17
; SI-NEXT: v_readfirstlane_b32 s7, v9
; SI-NEXT: v_readfirstlane_b32 s9, v8
; SI-NEXT: v_readfirstlane_b32 s11, v7
@@ -25175,12 +25408,12 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
-; SI-NEXT: s_lshr_b32 s68, s17, 16
-; SI-NEXT: s_lshr_b32 s69, s16, 16
+; SI-NEXT: s_lshr_b32 s60, s21, 16
+; SI-NEXT: s_lshr_b32 s61, s20, 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_lshr_b32 s31, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -25196,22 +25429,22 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -25270,8 +25503,72 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
+; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v25, s77, 0
+; SI-NEXT: v_writelane_b32 v25, s74, 1
+; SI-NEXT: v_writelane_b32 v25, s15, 2
+; SI-NEXT: v_writelane_b32 v25, s13, 3
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s95
+; SI-NEXT: s_mov_b32 s95, s93
+; SI-NEXT: s_mov_b32 s93, s92
+; SI-NEXT: s_mov_b32 s92, s90
+; SI-NEXT: s_mov_b32 s90, s89
+; SI-NEXT: s_mov_b32 s89, s79
+; SI-NEXT: s_mov_b32 s79, s78
+; SI-NEXT: s_mov_b32 s78, s76
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_mov_b32 s75, s73
+; SI-NEXT: s_mov_b32 s73, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s60
+; SI-NEXT: s_mov_b32 s77, s88
+; SI-NEXT: s_mov_b32 s88, s61
+; SI-NEXT: s_mov_b32 s74, s91
+; SI-NEXT: s_mov_b32 s91, s62
+; SI-NEXT: s_mov_b32 s15, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s63, s15
+; SI-NEXT: s_mov_b32 s62, s91
+; SI-NEXT: s_mov_b32 s91, s74
+; SI-NEXT: s_mov_b32 s61, s88
+; SI-NEXT: s_mov_b32 s88, s77
+; SI-NEXT: s_mov_b32 s60, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s73
+; SI-NEXT: s_mov_b32 s73, s75
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_mov_b32 s76, s78
+; SI-NEXT: s_mov_b32 s78, s79
+; SI-NEXT: s_mov_b32 s79, s89
+; SI-NEXT: s_mov_b32 s89, s90
+; SI-NEXT: s_mov_b32 s90, s92
+; SI-NEXT: s_mov_b32 s92, s93
+; SI-NEXT: s_mov_b32 s93, s95
+; SI-NEXT: s_mov_b32 s95, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: v_readlane_b32 s13, v25, 3
+; SI-NEXT: v_readlane_b32 s15, v25, 2
+; SI-NEXT: v_readlane_b32 s74, v25, 1
+; SI-NEXT: v_readlane_b32 s77, v25, 0
; SI-NEXT: .LBB43_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -25280,32 +25577,32 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -25352,54 +25649,54 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s91, s91, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s91, 0xffff
+; SI-NEXT: s_add_i32 s4, s91, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s88, s88, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s88, 0xffff
+; SI-NEXT: s_add_i32 s4, s88, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s79, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s77, s77, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s77, 0xffff
+; SI-NEXT: s_add_i32 s4, s77, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s74, s74, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s74, 0xffff
+; SI-NEXT: s_add_i32 s4, s74, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
; SI-NEXT: .LBB43_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v24, 20
+; SI-NEXT: v_readlane_b32 s30, v24, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -25424,29 +25721,27 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v21, s57
; SI-NEXT: v_mov_b32_e32 v22, s58
; SI-NEXT: v_mov_b32_e32 v23, s59
-; SI-NEXT: v_readlane_b32 s31, v24, 21
-; SI-NEXT: v_readlane_b32 s69, v24, 19
-; SI-NEXT: v_readlane_b32 s68, v24, 18
-; SI-NEXT: v_readlane_b32 s67, v24, 17
-; SI-NEXT: v_readlane_b32 s66, v24, 16
-; SI-NEXT: v_readlane_b32 s65, v24, 15
-; SI-NEXT: v_readlane_b32 s64, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 13
-; SI-NEXT: v_readlane_b32 s54, v24, 12
-; SI-NEXT: v_readlane_b32 s53, v24, 11
-; SI-NEXT: v_readlane_b32 s52, v24, 10
-; SI-NEXT: v_readlane_b32 s51, v24, 9
-; SI-NEXT: v_readlane_b32 s50, v24, 8
-; SI-NEXT: v_readlane_b32 s49, v24, 7
-; SI-NEXT: v_readlane_b32 s48, v24, 6
-; SI-NEXT: v_readlane_b32 s39, v24, 5
-; SI-NEXT: v_readlane_b32 s38, v24, 4
-; SI-NEXT: v_readlane_b32 s37, v24, 3
-; SI-NEXT: v_readlane_b32 s36, v24, 2
-; SI-NEXT: v_readlane_b32 s35, v24, 1
-; SI-NEXT: v_readlane_b32 s34, v24, 0
+; SI-NEXT: v_readlane_b32 s31, v24, 17
+; SI-NEXT: v_readlane_b32 s67, v24, 15
+; SI-NEXT: v_readlane_b32 s66, v24, 14
+; SI-NEXT: v_readlane_b32 s65, v24, 13
+; SI-NEXT: v_readlane_b32 s64, v24, 12
+; SI-NEXT: v_readlane_b32 s55, v24, 11
+; SI-NEXT: v_readlane_b32 s54, v24, 10
+; SI-NEXT: v_readlane_b32 s53, v24, 9
+; SI-NEXT: v_readlane_b32 s52, v24, 8
+; SI-NEXT: v_readlane_b32 s51, v24, 7
+; SI-NEXT: v_readlane_b32 s50, v24, 6
+; SI-NEXT: v_readlane_b32 s49, v24, 5
+; SI-NEXT: v_readlane_b32 s48, v24, 4
+; SI-NEXT: v_readlane_b32 s39, v24, 3
+; SI-NEXT: v_readlane_b32 s38, v24, 2
+; SI-NEXT: v_readlane_b32 s37, v24, 1
+; SI-NEXT: v_readlane_b32 s36, v24, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -25456,6 +25751,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v24, s34, 0
; VI-NEXT: v_writelane_b32 v24, s35, 1
@@ -25475,14 +25771,8 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v24, s65, 15
; VI-NEXT: v_writelane_b32 v24, s66, 16
; VI-NEXT: v_writelane_b32 v24, s67, 17
-; VI-NEXT: v_writelane_b32 v24, s68, 18
-; VI-NEXT: v_writelane_b32 v24, s69, 19
-; VI-NEXT: v_writelane_b32 v24, s70, 20
-; VI-NEXT: v_writelane_b32 v24, s71, 21
-; VI-NEXT: v_writelane_b32 v24, s80, 22
-; VI-NEXT: v_writelane_b32 v24, s81, 23
-; VI-NEXT: v_writelane_b32 v24, s30, 24
-; VI-NEXT: v_writelane_b32 v24, s31, 25
+; VI-NEXT: v_writelane_b32 v24, s30, 18
+; VI-NEXT: v_writelane_b32 v24, s31, 19
; VI-NEXT: v_readfirstlane_b32 s7, v9
; VI-NEXT: v_readfirstlane_b32 s9, v8
; VI-NEXT: v_readfirstlane_b32 s11, v7
@@ -25492,21 +25782,21 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s77, v3
; VI-NEXT: v_readfirstlane_b32 s88, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s60, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s75, s28, 16
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s31, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s62, s23, 16
+; VI-NEXT: s_lshr_b32 s63, s22, 16
+; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 16
+; VI-NEXT: s_lshr_b32 s64, s17, 16
+; VI-NEXT: s_lshr_b32 s65, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -25516,37 +25806,37 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s76, s77, 16
; VI-NEXT: s_lshr_b32 s79, s88, 16
; VI-NEXT: s_lshr_b32 s90, s91, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s60, 16
; VI-NEXT: v_readfirstlane_b32 s4, v10
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -25563,7 +25853,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_and_b32 s4, 0xffff, s60
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
@@ -25596,8 +25886,69 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
+; VI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v25, s77, 0
+; VI-NEXT: v_writelane_b32 v25, s74, 1
+; VI-NEXT: v_writelane_b32 v25, s15, 2
+; VI-NEXT: v_writelane_b32 v25, s13, 3
+; VI-NEXT: v_writelane_b32 v25, s11, 4
+; VI-NEXT: v_writelane_b32 v25, s9, 5
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s90
+; VI-NEXT: s_mov_b32 s90, s89
+; VI-NEXT: s_mov_b32 s89, s79
+; VI-NEXT: s_mov_b32 s79, s78
+; VI-NEXT: s_mov_b32 s78, s76
+; VI-NEXT: s_mov_b32 s76, s75
+; VI-NEXT: s_mov_b32 s75, s73
+; VI-NEXT: s_mov_b32 s73, s72
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s60
+; VI-NEXT: s_mov_b32 s77, s61
+; VI-NEXT: s_mov_b32 s74, s88
+; VI-NEXT: s_mov_b32 s88, s62
+; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s15, s91
+; VI-NEXT: s_mov_b32 s91, s64
+; VI-NEXT: s_mov_b32 s13, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s65, s13
+; VI-NEXT: s_mov_b32 s64, s91
+; VI-NEXT: s_mov_b32 s91, s15
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s88
+; VI-NEXT: s_mov_b32 s88, s74
+; VI-NEXT: s_mov_b32 s61, s77
+; VI-NEXT: s_mov_b32 s60, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: s_mov_b32 s72, s73
+; VI-NEXT: s_mov_b32 s73, s75
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_mov_b32 s76, s78
+; VI-NEXT: s_mov_b32 s78, s79
+; VI-NEXT: s_mov_b32 s79, s89
+; VI-NEXT: s_mov_b32 s89, s90
+; VI-NEXT: s_mov_b32 s90, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: v_readlane_b32 s9, v25, 5
+; VI-NEXT: v_readlane_b32 s11, v25, 4
+; VI-NEXT: v_readlane_b32 s13, v25, 3
+; VI-NEXT: v_readlane_b32 s15, v25, 2
+; VI-NEXT: v_readlane_b32 s74, v25, 1
+; VI-NEXT: v_readlane_b32 s77, v25, 0
; VI-NEXT: .LBB43_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -25606,47 +25957,47 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -25673,59 +26024,59 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
+; VI-NEXT: s_add_i32 s4, s60, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s91, 0xffff
+; VI-NEXT: s_add_i32 s4, s91, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s88, 0xffff
+; VI-NEXT: s_add_i32 s4, s88, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s73, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v24, 24
+; VI-NEXT: v_readlane_b32 s30, v24, 18
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -25750,13 +26101,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v21, s57
; VI-NEXT: v_mov_b32_e32 v22, s58
; VI-NEXT: v_mov_b32_e32 v23, s59
-; VI-NEXT: v_readlane_b32 s31, v24, 25
-; VI-NEXT: v_readlane_b32 s81, v24, 23
-; VI-NEXT: v_readlane_b32 s80, v24, 22
-; VI-NEXT: v_readlane_b32 s71, v24, 21
-; VI-NEXT: v_readlane_b32 s70, v24, 20
-; VI-NEXT: v_readlane_b32 s69, v24, 19
-; VI-NEXT: v_readlane_b32 s68, v24, 18
+; VI-NEXT: v_readlane_b32 s31, v24, 19
; VI-NEXT: v_readlane_b32 s67, v24, 17
; VI-NEXT: v_readlane_b32 s66, v24, 16
; VI-NEXT: v_readlane_b32 s65, v24, 15
@@ -25777,6 +26122,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3
; VI-NEXT: v_readlane_b32 s34, v24, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -26871,9 +27217,6 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s30, 0
-; SI-NEXT: v_writelane_b32 v24, s31, 1
; SI-NEXT: v_readfirstlane_b32 s12, v10
; SI-NEXT: v_readfirstlane_b32 s5, v9
; SI-NEXT: v_readfirstlane_b32 s4, v8
@@ -26886,28 +27229,32 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s13, v1
; SI-NEXT: s_cmp_lg_u32 s12, 0
; SI-NEXT: v_readfirstlane_b32 s12, v0
+; SI-NEXT: ; implicit-def: $vgpr24 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB45_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s88, s5, 16
-; SI-NEXT: s_lshr_b32 s89, s7, 16
-; SI-NEXT: s_lshr_b32 s90, s9, 16
-; SI-NEXT: s_lshr_b32 s91, s11, 16
-; SI-NEXT: s_lshr_b32 s92, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s29, 16
-; SI-NEXT: s_lshr_b32 s94, s27, 16
-; SI-NEXT: s_lshr_b32 s95, s25, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s40, s21, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v24, s40, 1
+; SI-NEXT: s_lshr_b32 s40, s17, 16
+; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b32 s90, s7, 16
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s92, s11, 16
+; SI-NEXT: s_lshr_b32 s93, s13, 16
+; SI-NEXT: s_lshr_b32 s94, s29, 16
+; SI-NEXT: s_lshr_b32 s95, s27, 16
+; SI-NEXT: s_lshr_b32 s14, s25, 16
+; SI-NEXT: s_lshr_b32 s88, s23, 16
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: v_writelane_b32 v24, s40, 0
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
@@ -26915,15 +27262,18 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_mov_b64 s[78:79], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: s_mov_b64 s[78:79], -1
+; SI-NEXT: ; kill: killed $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; kill: killed $sgpr14
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr58
@@ -26936,14 +27286,15 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: v_readlane_b32 s79, v24, 0
+; SI-NEXT: v_readlane_b32 s78, v24, 1
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -26970,114 +27321,113 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s88, s5, 16
-; SI-NEXT: s_lshr_b32 s89, s7, 16
-; SI-NEXT: s_lshr_b32 s90, s9, 16
-; SI-NEXT: s_lshr_b32 s91, s11, 16
-; SI-NEXT: s_lshr_b32 s92, s13, 16
-; SI-NEXT: s_lshr_b32 s93, s29, 16
-; SI-NEXT: s_lshr_b32 s94, s27, 16
-; SI-NEXT: s_lshr_b32 s95, s25, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
-; SI-NEXT: s_lshr_b32 s30, s19, 16
-; SI-NEXT: s_lshr_b32 s31, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s15, s5, 16
+; SI-NEXT: s_lshr_b32 s90, s7, 16
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s92, s11, 16
+; SI-NEXT: s_lshr_b32 s93, s13, 16
+; SI-NEXT: s_lshr_b32 s94, s29, 16
+; SI-NEXT: s_lshr_b32 s95, s27, 16
+; SI-NEXT: s_lshr_b32 s14, s25, 16
+; SI-NEXT: s_lshr_b32 s88, s23, 16
+; SI-NEXT: s_lshr_b32 s78, s21, 16
+; SI-NEXT: s_lshr_b32 s89, s19, 16
+; SI-NEXT: s_lshr_b32 s79, s17, 16
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_lshl_b32 s15, s76, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s31, 16
-; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s74, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s30, 16
-; SI-NEXT: s_or_b32 s18, s18, s19
-; SI-NEXT: s_lshl_b32 s19, s72, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s19, s20, s19
-; SI-NEXT: s_and_b32 s20, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; SI-NEXT: s_or_b32 s20, s20, s21
-; SI-NEXT: s_and_b32 s21, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s62, 16
-; SI-NEXT: s_or_b32 s21, s21, s22
-; SI-NEXT: s_and_b32 s22, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s23, vcc_lo, 16
-; SI-NEXT: s_or_b32 s22, s22, s23
-; SI-NEXT: s_and_b32 s23, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s60, 16
-; SI-NEXT: s_or_b32 s23, s23, s24
-; SI-NEXT: s_and_b32 s24, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s25, s95, 16
-; SI-NEXT: s_or_b32 s24, s24, s25
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_or_b32 s14, s25, s14
; SI-NEXT: s_and_b32 s25, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s58, 16
+; SI-NEXT: s_lshl_b32 s26, s60, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s94, 16
+; SI-NEXT: s_lshl_b32 s27, s95, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s56, 16
+; SI-NEXT: s_lshl_b32 s28, s58, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s93, 16
+; SI-NEXT: s_lshl_b32 s29, s94, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s46, 16
+; SI-NEXT: s_lshl_b32 s29, s56, 16
+; SI-NEXT: s_lshl_b32 s41, s76, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s29
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s92, 16
+; SI-NEXT: s_lshl_b32 s29, s93, 16
+; SI-NEXT: s_or_b32 s16, s16, s41
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s79, 16
; SI-NEXT: s_or_b32 s13, s13, s29
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s44, 16
+; SI-NEXT: s_lshl_b32 s29, s46, 16
+; SI-NEXT: s_or_b32 s17, s17, s41
+; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s29
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s91, 16
+; SI-NEXT: s_lshl_b32 s29, s92, 16
+; SI-NEXT: s_or_b32 s18, s18, s41
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s89, 16
; SI-NEXT: s_or_b32 s11, s11, s29
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_lshl_b32 s29, s44, 16
+; SI-NEXT: s_or_b32 s19, s19, s41
+; SI-NEXT: s_lshl_b32 s41, s72, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
; SI-NEXT: s_or_b32 s8, s8, s29
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_lshl_b32 s29, s91, 16
+; SI-NEXT: s_or_b32 s20, s20, s41
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s78, 16
; SI-NEXT: s_or_b32 s9, s9, s29
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s40, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_lshl_b32 s29, s42, 16
+; SI-NEXT: s_or_b32 s21, s21, s41
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s62, 16
; SI-NEXT: s_or_b32 s6, s6, s29
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s29, s89, 16
-; SI-NEXT: s_or_b32 s4, s4, s14
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s88, 16
+; SI-NEXT: s_lshl_b32 s29, s90, 16
+; SI-NEXT: s_or_b32 s22, s22, s41
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_or_b32 s7, s7, s29
-; SI-NEXT: s_or_b32 s5, s5, s14
-; SI-NEXT: v_readlane_b32 s30, v24, 0
-; SI-NEXT: v_mov_b32_e32 v0, s15
-; SI-NEXT: v_mov_b32_e32 v1, s16
-; SI-NEXT: v_mov_b32_e32 v2, s17
-; SI-NEXT: v_mov_b32_e32 v3, s18
-; SI-NEXT: v_mov_b32_e32 v4, s19
-; SI-NEXT: v_mov_b32_e32 v5, s20
-; SI-NEXT: v_mov_b32_e32 v6, s21
-; SI-NEXT: v_mov_b32_e32 v7, s22
-; SI-NEXT: v_mov_b32_e32 v8, s23
-; SI-NEXT: v_mov_b32_e32 v9, s24
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s29, vcc_lo, 16
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: s_or_b32 s23, s23, s41
+; SI-NEXT: s_or_b32 s24, s24, s40
+; SI-NEXT: s_or_b32 s4, s4, s29
+; SI-NEXT: s_or_b32 s5, s5, s15
+; SI-NEXT: v_mov_b32_e32 v0, s16
+; SI-NEXT: v_mov_b32_e32 v1, s17
+; SI-NEXT: v_mov_b32_e32 v2, s18
+; SI-NEXT: v_mov_b32_e32 v3, s19
+; SI-NEXT: v_mov_b32_e32 v4, s20
+; SI-NEXT: v_mov_b32_e32 v5, s21
+; SI-NEXT: v_mov_b32_e32 v6, s22
+; SI-NEXT: v_mov_b32_e32 v7, s23
+; SI-NEXT: v_mov_b32_e32 v8, s24
+; SI-NEXT: v_mov_b32_e32 v9, s14
; SI-NEXT: v_mov_b32_e32 v10, s25
; SI-NEXT: v_mov_b32_e32 v11, s26
; SI-NEXT: v_mov_b32_e32 v12, s27
@@ -27092,8 +27442,8 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v21, s7
; SI-NEXT: v_mov_b32_e32 v22, s4
; SI-NEXT: v_mov_b32_e32 v23, s5
-; SI-NEXT: v_readlane_b32 s31, v24, 1
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -28980,13 +29330,13 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s30, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_lshr_b32 s34, s18, 16
; SI-NEXT: s_lshr_b32 s68, s17, 16
; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s35, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -28996,28 +29346,29 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s77, s76, 16
; SI-NEXT: s_lshr_b32 s88, s79, 16
; SI-NEXT: s_lshr_b32 s91, s89, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v10
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s42, s4, s5
@@ -29070,11 +29421,12 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB47_3: ; %Flow
@@ -29095,7 +29447,7 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s34
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s19
@@ -29105,20 +29457,20 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v2, s18
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v5, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s20
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s7
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -29261,7 +29613,7 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: v_cvt_f32_f16_e32 v23, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v24, s35
; SI-NEXT: v_cvt_f32_f16_e32 v25, s6
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
@@ -29379,22 +29731,22 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s76, v3
; VI-NEXT: v_readfirstlane_b32 s79, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s74, s28, 16
; VI-NEXT: s_lshr_b32 s77, s27, 16
; VI-NEXT: s_lshr_b32 s88, s26, 16
; VI-NEXT: s_lshr_b32 s90, s25, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s23, 16
+; VI-NEXT: s_lshr_b32 s34, s22, 16
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s68, s20, 16
+; VI-NEXT: s_lshr_b32 s69, s19, 16
+; VI-NEXT: s_lshr_b32 s70, s18, 16
+; VI-NEXT: s_lshr_b32 s71, s17, 16
+; VI-NEXT: s_lshr_b32 s80, s16, 16
+; VI-NEXT: s_lshr_b32 s81, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -29403,55 +29755,56 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s78, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v10
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v10
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB47_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s80, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s37, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s72, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -29478,11 +29831,12 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s59, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB47_3
; VI-NEXT: .LBB47_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB47_3: ; %Flow
@@ -29492,35 +29846,35 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB47_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v23, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s81
-; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: v_mov_b32_e32 v0, s80
+; VI-NEXT: v_mov_b32_e32 v2, s71
; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v23
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v23
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s71
+; VI-NEXT: v_mov_b32_e32 v2, s70
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v23
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s70
+; VI-NEXT: v_mov_b32_e32 v3, s69
; VI-NEXT: v_add_f16_sdwa v3, v3, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v23
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s69
+; VI-NEXT: v_mov_b32_e32 v4, s68
; VI-NEXT: v_add_f16_sdwa v4, v4, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v23
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s68
+; VI-NEXT: v_mov_b32_e32 v5, s35
; VI-NEXT: v_add_f16_sdwa v5, v5, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v23
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s35
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_add_f16_sdwa v6, v6, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v23
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_mov_b32_e32 v7, s31
; VI-NEXT: v_add_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v23
; VI-NEXT: v_or_b32_e32 v7, v8, v7
@@ -29548,9 +29902,9 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v23
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s31
+; VI-NEXT: v_mov_b32_e32 v14, s30
; VI-NEXT: v_add_f16_sdwa v14, v14, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s30, v23
+; VI-NEXT: v_add_f16_e32 v15, s7, v23
; VI-NEXT: v_or_b32_e32 v14, v15, v14
; VI-NEXT: v_mov_b32_e32 v15, vcc_lo
; VI-NEXT: v_add_f16_sdwa v15, v15, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -29584,7 +29938,7 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v22, v22, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v24, s8, v23
; VI-NEXT: v_or_b32_e32 v22, v24, v22
-; VI-NEXT: v_mov_b32_e32 v24, s7
+; VI-NEXT: v_mov_b32_e32 v24, s81
; VI-NEXT: v_add_f16_sdwa v24, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v23, s6, v23
; VI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -30691,8 +31045,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s31, s13, 16
-; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s40, s11, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s30, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s7, 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
@@ -30703,7 +31058,7 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s21, 16
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
@@ -30740,13 +31095,13 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0
@@ -30811,8 +31166,8 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v18, s8
; SI-NEXT: v_mov_b32_e32 v20, s10
; SI-NEXT: v_mov_b32_e32 v22, s12
-; SI-NEXT: v_mov_b32_e32 v37, s31
-; SI-NEXT: v_mov_b32_e32 v38, s30
+; SI-NEXT: v_mov_b32_e32 v37, s30
+; SI-NEXT: v_mov_b32_e32 v38, s15
; SI-NEXT: v_mov_b32_e32 v39, vcc_hi
; SI-NEXT: v_mov_b32_e32 v48, vcc_lo
; SI-NEXT: v_mov_b32_e32 v49, s95
@@ -32858,30 +33213,27 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v24, s34, 0
-; SI-NEXT: v_writelane_b32 v24, s35, 1
-; SI-NEXT: v_writelane_b32 v24, s36, 2
-; SI-NEXT: v_writelane_b32 v24, s37, 3
-; SI-NEXT: v_writelane_b32 v24, s38, 4
-; SI-NEXT: v_writelane_b32 v24, s39, 5
-; SI-NEXT: v_writelane_b32 v24, s48, 6
-; SI-NEXT: v_writelane_b32 v24, s49, 7
-; SI-NEXT: v_writelane_b32 v24, s50, 8
-; SI-NEXT: v_writelane_b32 v24, s51, 9
-; SI-NEXT: v_writelane_b32 v24, s52, 10
-; SI-NEXT: v_writelane_b32 v24, s53, 11
-; SI-NEXT: v_writelane_b32 v24, s54, 12
-; SI-NEXT: v_writelane_b32 v24, s55, 13
-; SI-NEXT: v_writelane_b32 v24, s64, 14
-; SI-NEXT: v_writelane_b32 v24, s65, 15
-; SI-NEXT: v_writelane_b32 v24, s66, 16
-; SI-NEXT: v_writelane_b32 v24, s67, 17
-; SI-NEXT: v_writelane_b32 v24, s68, 18
-; SI-NEXT: v_writelane_b32 v24, s69, 19
-; SI-NEXT: v_writelane_b32 v24, s30, 20
-; SI-NEXT: v_writelane_b32 v24, s31, 21
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v24, s36, 0
+; SI-NEXT: v_writelane_b32 v24, s37, 1
+; SI-NEXT: v_writelane_b32 v24, s38, 2
+; SI-NEXT: v_writelane_b32 v24, s39, 3
+; SI-NEXT: v_writelane_b32 v24, s48, 4
+; SI-NEXT: v_writelane_b32 v24, s49, 5
+; SI-NEXT: v_writelane_b32 v24, s50, 6
+; SI-NEXT: v_writelane_b32 v24, s51, 7
+; SI-NEXT: v_writelane_b32 v24, s52, 8
+; SI-NEXT: v_writelane_b32 v24, s53, 9
+; SI-NEXT: v_writelane_b32 v24, s54, 10
+; SI-NEXT: v_writelane_b32 v24, s55, 11
+; SI-NEXT: v_writelane_b32 v24, s64, 12
+; SI-NEXT: v_writelane_b32 v24, s65, 13
+; SI-NEXT: v_writelane_b32 v24, s66, 14
+; SI-NEXT: v_writelane_b32 v24, s67, 15
+; SI-NEXT: v_writelane_b32 v24, s30, 16
+; SI-NEXT: v_writelane_b32 v24, s31, 17
; SI-NEXT: v_readfirstlane_b32 s7, v9
; SI-NEXT: v_readfirstlane_b32 s9, v8
; SI-NEXT: v_readfirstlane_b32 s11, v7
@@ -32900,12 +33252,12 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
-; SI-NEXT: s_lshr_b32 s68, s17, 16
-; SI-NEXT: s_lshr_b32 s69, s16, 16
+; SI-NEXT: s_lshr_b32 s60, s21, 16
+; SI-NEXT: s_lshr_b32 s61, s20, 16
+; SI-NEXT: s_lshr_b32 s62, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s18, 16
+; SI-NEXT: s_lshr_b32 s30, s17, 16
+; SI-NEXT: s_lshr_b32 s31, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -32921,22 +33273,22 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -32995,8 +33347,72 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
+; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v25, s77, 0
+; SI-NEXT: v_writelane_b32 v25, s74, 1
+; SI-NEXT: v_writelane_b32 v25, s15, 2
+; SI-NEXT: v_writelane_b32 v25, s13, 3
+; SI-NEXT: s_mov_b32 s13, s11
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s95
+; SI-NEXT: s_mov_b32 s95, s93
+; SI-NEXT: s_mov_b32 s93, s92
+; SI-NEXT: s_mov_b32 s92, s90
+; SI-NEXT: s_mov_b32 s90, s89
+; SI-NEXT: s_mov_b32 s89, s79
+; SI-NEXT: s_mov_b32 s79, s78
+; SI-NEXT: s_mov_b32 s78, s76
+; SI-NEXT: s_mov_b32 s76, s75
+; SI-NEXT: s_mov_b32 s75, s73
+; SI-NEXT: s_mov_b32 s73, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s60
+; SI-NEXT: s_mov_b32 s77, s88
+; SI-NEXT: s_mov_b32 s88, s61
+; SI-NEXT: s_mov_b32 s74, s91
+; SI-NEXT: s_mov_b32 s91, s62
+; SI-NEXT: s_mov_b32 s15, s63
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s63, s15
+; SI-NEXT: s_mov_b32 s62, s91
+; SI-NEXT: s_mov_b32 s91, s74
+; SI-NEXT: s_mov_b32 s61, s88
+; SI-NEXT: s_mov_b32 s88, s77
+; SI-NEXT: s_mov_b32 s60, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s73
+; SI-NEXT: s_mov_b32 s73, s75
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_mov_b32 s76, s78
+; SI-NEXT: s_mov_b32 s78, s79
+; SI-NEXT: s_mov_b32 s79, s89
+; SI-NEXT: s_mov_b32 s89, s90
+; SI-NEXT: s_mov_b32 s90, s92
+; SI-NEXT: s_mov_b32 s92, s93
+; SI-NEXT: s_mov_b32 s93, s95
+; SI-NEXT: s_mov_b32 s95, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: s_mov_b32 s11, s13
+; SI-NEXT: v_readlane_b32 s13, v25, 3
+; SI-NEXT: v_readlane_b32 s15, v25, 2
+; SI-NEXT: v_readlane_b32 s74, v25, 1
+; SI-NEXT: v_readlane_b32 s77, v25, 0
; SI-NEXT: .LBB51_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -33005,32 +33421,32 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s63, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s61, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s60, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
@@ -33077,54 +33493,54 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s91, s91, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s91, 0xffff
+; SI-NEXT: s_add_i32 s4, s91, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s88, s88, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s88, 0xffff
+; SI-NEXT: s_add_i32 s4, s88, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s79, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s77, s77, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s77, 0xffff
+; SI-NEXT: s_add_i32 s4, s77, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s74, s74, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s74, 0xffff
+; SI-NEXT: s_add_i32 s4, s74, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s73, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s59, s4, 0x30000
; SI-NEXT: .LBB51_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v24, 20
+; SI-NEXT: v_readlane_b32 s30, v24, 16
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -33149,29 +33565,27 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v21, s57
; SI-NEXT: v_mov_b32_e32 v22, s58
; SI-NEXT: v_mov_b32_e32 v23, s59
-; SI-NEXT: v_readlane_b32 s31, v24, 21
-; SI-NEXT: v_readlane_b32 s69, v24, 19
-; SI-NEXT: v_readlane_b32 s68, v24, 18
-; SI-NEXT: v_readlane_b32 s67, v24, 17
-; SI-NEXT: v_readlane_b32 s66, v24, 16
-; SI-NEXT: v_readlane_b32 s65, v24, 15
-; SI-NEXT: v_readlane_b32 s64, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 13
-; SI-NEXT: v_readlane_b32 s54, v24, 12
-; SI-NEXT: v_readlane_b32 s53, v24, 11
-; SI-NEXT: v_readlane_b32 s52, v24, 10
-; SI-NEXT: v_readlane_b32 s51, v24, 9
-; SI-NEXT: v_readlane_b32 s50, v24, 8
-; SI-NEXT: v_readlane_b32 s49, v24, 7
-; SI-NEXT: v_readlane_b32 s48, v24, 6
-; SI-NEXT: v_readlane_b32 s39, v24, 5
-; SI-NEXT: v_readlane_b32 s38, v24, 4
-; SI-NEXT: v_readlane_b32 s37, v24, 3
-; SI-NEXT: v_readlane_b32 s36, v24, 2
-; SI-NEXT: v_readlane_b32 s35, v24, 1
-; SI-NEXT: v_readlane_b32 s34, v24, 0
+; SI-NEXT: v_readlane_b32 s31, v24, 17
+; SI-NEXT: v_readlane_b32 s67, v24, 15
+; SI-NEXT: v_readlane_b32 s66, v24, 14
+; SI-NEXT: v_readlane_b32 s65, v24, 13
+; SI-NEXT: v_readlane_b32 s64, v24, 12
+; SI-NEXT: v_readlane_b32 s55, v24, 11
+; SI-NEXT: v_readlane_b32 s54, v24, 10
+; SI-NEXT: v_readlane_b32 s53, v24, 9
+; SI-NEXT: v_readlane_b32 s52, v24, 8
+; SI-NEXT: v_readlane_b32 s51, v24, 7
+; SI-NEXT: v_readlane_b32 s50, v24, 6
+; SI-NEXT: v_readlane_b32 s49, v24, 5
+; SI-NEXT: v_readlane_b32 s48, v24, 4
+; SI-NEXT: v_readlane_b32 s39, v24, 3
+; SI-NEXT: v_readlane_b32 s38, v24, 2
+; SI-NEXT: v_readlane_b32 s37, v24, 1
+; SI-NEXT: v_readlane_b32 s36, v24, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -33181,6 +33595,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v24, s34, 0
; VI-NEXT: v_writelane_b32 v24, s35, 1
@@ -33200,14 +33615,8 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v24, s65, 15
; VI-NEXT: v_writelane_b32 v24, s66, 16
; VI-NEXT: v_writelane_b32 v24, s67, 17
-; VI-NEXT: v_writelane_b32 v24, s68, 18
-; VI-NEXT: v_writelane_b32 v24, s69, 19
-; VI-NEXT: v_writelane_b32 v24, s70, 20
-; VI-NEXT: v_writelane_b32 v24, s71, 21
-; VI-NEXT: v_writelane_b32 v24, s80, 22
-; VI-NEXT: v_writelane_b32 v24, s81, 23
-; VI-NEXT: v_writelane_b32 v24, s30, 24
-; VI-NEXT: v_writelane_b32 v24, s31, 25
+; VI-NEXT: v_writelane_b32 v24, s30, 18
+; VI-NEXT: v_writelane_b32 v24, s31, 19
; VI-NEXT: v_readfirstlane_b32 s7, v9
; VI-NEXT: v_readfirstlane_b32 s9, v8
; VI-NEXT: v_readfirstlane_b32 s11, v7
@@ -33217,21 +33626,21 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s77, v3
; VI-NEXT: v_readfirstlane_b32 s88, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s60, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s75, s28, 16
; VI-NEXT: s_lshr_b32 s78, s27, 16
; VI-NEXT: s_lshr_b32 s89, s26, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s25, 16
-; VI-NEXT: s_lshr_b32 s31, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s24, 16
+; VI-NEXT: s_lshr_b32 s62, s23, 16
+; VI-NEXT: s_lshr_b32 s63, s22, 16
+; VI-NEXT: s_lshr_b32 s30, s21, 16
+; VI-NEXT: s_lshr_b32 s31, s20, 16
+; VI-NEXT: s_lshr_b32 s34, s19, 16
+; VI-NEXT: s_lshr_b32 s35, s18, 16
+; VI-NEXT: s_lshr_b32 s64, s17, 16
+; VI-NEXT: s_lshr_b32 s65, s16, 16
; VI-NEXT: s_lshr_b32 s6, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
@@ -33241,37 +33650,37 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s76, s77, 16
; VI-NEXT: s_lshr_b32 s79, s88, 16
; VI-NEXT: s_lshr_b32 s90, s91, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s60, 16
; VI-NEXT: v_readfirstlane_b32 s4, v10
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB51_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s36, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s37, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s38, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s39, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -33288,7 +33697,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_and_b32 s4, 0xffff, s60
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
@@ -33321,8 +33730,69 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB51_3
; VI-NEXT: .LBB51_2:
+; VI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
; VI-NEXT: s_mov_b64 s[4:5], -1
+; VI-NEXT: v_writelane_b32 v25, s77, 0
+; VI-NEXT: v_writelane_b32 v25, s74, 1
+; VI-NEXT: v_writelane_b32 v25, s15, 2
+; VI-NEXT: v_writelane_b32 v25, s13, 3
+; VI-NEXT: v_writelane_b32 v25, s11, 4
+; VI-NEXT: v_writelane_b32 v25, s9, 5
+; VI-NEXT: s_mov_b32 s9, s7
+; VI-NEXT: s_mov_b32 s7, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s90
+; VI-NEXT: s_mov_b32 s90, s89
+; VI-NEXT: s_mov_b32 s89, s79
+; VI-NEXT: s_mov_b32 s79, s78
+; VI-NEXT: s_mov_b32 s78, s76
+; VI-NEXT: s_mov_b32 s76, s75
+; VI-NEXT: s_mov_b32 s75, s73
+; VI-NEXT: s_mov_b32 s73, s72
+; VI-NEXT: s_mov_b32 s72, s14
+; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s8
+; VI-NEXT: s_mov_b32 s8, s6
+; VI-NEXT: s_mov_b32 s6, s60
+; VI-NEXT: s_mov_b32 s77, s61
+; VI-NEXT: s_mov_b32 s74, s88
+; VI-NEXT: s_mov_b32 s88, s62
+; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s15, s91
+; VI-NEXT: s_mov_b32 s91, s64
+; VI-NEXT: s_mov_b32 s13, s65
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s65, s13
+; VI-NEXT: s_mov_b32 s64, s91
+; VI-NEXT: s_mov_b32 s91, s15
+; VI-NEXT: s_mov_b32 s63, s11
+; VI-NEXT: s_mov_b32 s62, s88
+; VI-NEXT: s_mov_b32 s88, s74
+; VI-NEXT: s_mov_b32 s61, s77
+; VI-NEXT: s_mov_b32 s60, s6
+; VI-NEXT: s_mov_b32 s6, s8
+; VI-NEXT: s_mov_b32 s8, s10
+; VI-NEXT: s_mov_b32 s10, s12
+; VI-NEXT: s_mov_b32 s12, s14
+; VI-NEXT: s_mov_b32 s14, s72
+; VI-NEXT: s_mov_b32 s72, s73
+; VI-NEXT: s_mov_b32 s73, s75
+; VI-NEXT: s_mov_b32 s75, s76
+; VI-NEXT: s_mov_b32 s76, s78
+; VI-NEXT: s_mov_b32 s78, s79
+; VI-NEXT: s_mov_b32 s79, s89
+; VI-NEXT: s_mov_b32 s89, s90
+; VI-NEXT: s_mov_b32 s90, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s7
+; VI-NEXT: s_mov_b32 s7, s9
+; VI-NEXT: v_readlane_b32 s9, v25, 5
+; VI-NEXT: v_readlane_b32 s11, v25, 4
+; VI-NEXT: v_readlane_b32 s13, v25, 3
+; VI-NEXT: v_readlane_b32 s15, v25, 2
+; VI-NEXT: v_readlane_b32 s74, v25, 1
+; VI-NEXT: v_readlane_b32 s77, v25, 0
; VI-NEXT: .LBB51_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -33331,47 +33801,47 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s65, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -33398,59 +33868,59 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
+; VI-NEXT: s_add_i32 s4, s60, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s91, 0xffff
+; VI-NEXT: s_add_i32 s4, s91, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s88, 0xffff
+; VI-NEXT: s_add_i32 s4, s88, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s77, 0xffff
+; VI-NEXT: s_add_i32 s4, s77, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s74, 0xffff
+; VI-NEXT: s_add_i32 s4, s74, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s73, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s15, 0xffff
+; VI-NEXT: s_add_i32 s4, s15, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s13, 0xffff
+; VI-NEXT: s_add_i32 s4, s13, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s11, 0xffff
+; VI-NEXT: s_add_i32 s4, s11, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s9, 0xffff
+; VI-NEXT: s_add_i32 s4, s9, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s7, 0xffff
+; VI-NEXT: s_add_i32 s4, s7, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: .LBB51_5: ; %end
-; VI-NEXT: v_readlane_b32 s30, v24, 24
+; VI-NEXT: v_readlane_b32 s30, v24, 18
; VI-NEXT: v_mov_b32_e32 v0, s36
; VI-NEXT: v_mov_b32_e32 v1, s37
; VI-NEXT: v_mov_b32_e32 v2, s38
@@ -33475,13 +33945,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_mov_b32_e32 v21, s57
; VI-NEXT: v_mov_b32_e32 v22, s58
; VI-NEXT: v_mov_b32_e32 v23, s59
-; VI-NEXT: v_readlane_b32 s31, v24, 25
-; VI-NEXT: v_readlane_b32 s81, v24, 23
-; VI-NEXT: v_readlane_b32 s80, v24, 22
-; VI-NEXT: v_readlane_b32 s71, v24, 21
-; VI-NEXT: v_readlane_b32 s70, v24, 20
-; VI-NEXT: v_readlane_b32 s69, v24, 19
-; VI-NEXT: v_readlane_b32 s68, v24, 18
+; VI-NEXT: v_readlane_b32 s31, v24, 19
; VI-NEXT: v_readlane_b32 s67, v24, 17
; VI-NEXT: v_readlane_b32 s66, v24, 16
; VI-NEXT: v_readlane_b32 s65, v24, 15
@@ -33502,6 +33966,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a,
; VI-NEXT: v_readlane_b32 s34, v24, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -34541,8 +35006,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB53_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s31, s13, 16
-; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s40, s11, 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s30, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s7, 16
; SI-NEXT: s_lshr_b32 s95, s5, 16
@@ -34553,7 +35019,7 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; SI-NEXT: s_lshr_b32 s90, s21, 16
; SI-NEXT: s_lshr_b32 s89, s19, 16
; SI-NEXT: s_lshr_b32 s88, s17, 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 16
+; SI-NEXT: s_mov_b32 s15, s40
; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
@@ -34590,13 +35056,13 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr15
; SI-NEXT: ; implicit-def: $sgpr14
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: .LBB53_3: ; %Flow
; SI-NEXT: s_and_b64 s[78:79], s[78:79], exec
-; SI-NEXT: s_cselect_b32 s15, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s15, 1
+; SI-NEXT: s_cselect_b32 s41, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s41, 1
; SI-NEXT: s_cbranch_scc1 .LBB53_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0
@@ -34661,8 +35127,8 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a
; SI-NEXT: v_mov_b32_e32 v18, s8
; SI-NEXT: v_mov_b32_e32 v20, s10
; SI-NEXT: v_mov_b32_e32 v22, s12
-; SI-NEXT: v_mov_b32_e32 v37, s31
-; SI-NEXT: v_mov_b32_e32 v38, s30
+; SI-NEXT: v_mov_b32_e32 v37, s30
+; SI-NEXT: v_mov_b32_e32 v38, s15
; SI-NEXT: v_mov_b32_e32 v39, vcc_hi
; SI-NEXT: v_mov_b32_e32 v48, vcc_lo
; SI-NEXT: v_mov_b32_e32 v49, s95
@@ -36862,13 +37328,13 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: s_lshr_b32 s95, s24, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 s31, s20, 16
-; SI-NEXT: s_lshr_b32 s34, s19, 16
-; SI-NEXT: s_lshr_b32 s35, s18, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s30, s20, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_lshr_b32 s34, s18, 16
; SI-NEXT: s_lshr_b32 s68, s17, 16
; SI-NEXT: s_lshr_b32 s69, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s35, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -36878,28 +37344,29 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: s_lshr_b32 s77, s76, 16
; SI-NEXT: s_lshr_b32 s88, s79, 16
; SI-NEXT: s_lshr_b32 s91, s89, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v10
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB55_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s42, s4, s5
@@ -36952,11 +37419,12 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB55_3
; SI-NEXT: .LBB55_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB55_3: ; %Flow
@@ -36977,7 +37445,7 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_or_b32_e32 v0, v1, v0
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s34
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s19
@@ -36987,20 +37455,20 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v2, s18
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s31
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
; SI-NEXT: v_or_b32_e32 v3, v5, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s20
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s7
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
@@ -37143,7 +37611,7 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT: v_or_b32_e32 v21, v23, v21
; SI-NEXT: v_cvt_f32_f16_e32 v23, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v24, s35
; SI-NEXT: v_cvt_f32_f16_e32 v25, s6
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
@@ -37261,22 +37729,22 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: v_readfirstlane_b32 s76, v3
; VI-NEXT: v_readfirstlane_b32 s79, v2
; VI-NEXT: v_readfirstlane_b32 s91, v1
-; VI-NEXT: v_readfirstlane_b32 s30, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v0
; VI-NEXT: s_lshr_b32 s72, s29, 16
; VI-NEXT: s_lshr_b32 s74, s28, 16
; VI-NEXT: s_lshr_b32 s77, s27, 16
; VI-NEXT: s_lshr_b32 s88, s26, 16
; VI-NEXT: s_lshr_b32 s90, s25, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; VI-NEXT: s_lshr_b32 s34, s23, 16
-; VI-NEXT: s_lshr_b32 s35, s22, 16
-; VI-NEXT: s_lshr_b32 s68, s21, 16
-; VI-NEXT: s_lshr_b32 s69, s20, 16
-; VI-NEXT: s_lshr_b32 s70, s19, 16
-; VI-NEXT: s_lshr_b32 s71, s18, 16
-; VI-NEXT: s_lshr_b32 s80, s17, 16
-; VI-NEXT: s_lshr_b32 s81, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s23, 16
+; VI-NEXT: s_lshr_b32 s34, s22, 16
+; VI-NEXT: s_lshr_b32 s35, s21, 16
+; VI-NEXT: s_lshr_b32 s68, s20, 16
+; VI-NEXT: s_lshr_b32 s69, s19, 16
+; VI-NEXT: s_lshr_b32 s70, s18, 16
+; VI-NEXT: s_lshr_b32 s71, s17, 16
+; VI-NEXT: s_lshr_b32 s80, s16, 16
+; VI-NEXT: s_lshr_b32 s81, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -37285,55 +37753,56 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: s_lshr_b32 s78, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v10
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v10
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB55_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s37, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s80, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s37, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s68, 16
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s72, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -37360,11 +37829,12 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s59, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB55_3
; VI-NEXT: .LBB55_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB55_3: ; %Flow
@@ -37374,35 +37844,35 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: s_cbranch_scc1 .LBB55_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v23, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s81
-; VI-NEXT: v_mov_b32_e32 v2, s80
+; VI-NEXT: v_mov_b32_e32 v0, s80
+; VI-NEXT: v_mov_b32_e32 v2, s71
; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v23
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v23
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s71
+; VI-NEXT: v_mov_b32_e32 v2, s70
; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v23
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s70
+; VI-NEXT: v_mov_b32_e32 v3, s69
; VI-NEXT: v_add_f16_sdwa v3, v3, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v23
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s69
+; VI-NEXT: v_mov_b32_e32 v4, s68
; VI-NEXT: v_add_f16_sdwa v4, v4, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v23
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s68
+; VI-NEXT: v_mov_b32_e32 v5, s35
; VI-NEXT: v_add_f16_sdwa v5, v5, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v23
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s35
+; VI-NEXT: v_mov_b32_e32 v6, s34
; VI-NEXT: v_add_f16_sdwa v6, v6, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v23
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_mov_b32_e32 v7, s31
; VI-NEXT: v_add_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v23
; VI-NEXT: v_or_b32_e32 v7, v8, v7
@@ -37430,9 +37900,9 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v13, v13, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v23
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s31
+; VI-NEXT: v_mov_b32_e32 v14, s30
; VI-NEXT: v_add_f16_sdwa v14, v14, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s30, v23
+; VI-NEXT: v_add_f16_e32 v15, s7, v23
; VI-NEXT: v_or_b32_e32 v14, v15, v14
; VI-NEXT: v_mov_b32_e32 v15, vcc_lo
; VI-NEXT: v_add_f16_sdwa v15, v15, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -37466,7 +37936,7 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v22, v22, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v24, s8, v23
; VI-NEXT: v_or_b32_e32 v22, v24, v22
-; VI-NEXT: v_mov_b32_e32 v24, s7
+; VI-NEXT: v_mov_b32_e32 v24, s81
; VI-NEXT: v_add_f16_sdwa v24, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v23, s6, v23
; VI-NEXT: v_or_b32_e32 v23, v23, v24
@@ -39029,8 +39499,9 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v24, s34, 0
; SI-NEXT: v_writelane_b32 v24, s35, 1
; SI-NEXT: v_writelane_b32 v24, s36, 2
@@ -39043,168 +39514,184 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v24, s51, 9
; SI-NEXT: v_writelane_b32 v24, s52, 10
; SI-NEXT: v_writelane_b32 v24, s53, 11
-; SI-NEXT: v_writelane_b32 v24, s54, 12
-; SI-NEXT: v_writelane_b32 v24, s55, 13
-; SI-NEXT: v_writelane_b32 v24, s64, 14
-; SI-NEXT: v_writelane_b32 v24, s65, 15
-; SI-NEXT: v_writelane_b32 v24, s66, 16
-; SI-NEXT: v_writelane_b32 v24, s67, 17
-; SI-NEXT: v_writelane_b32 v24, s68, 18
-; SI-NEXT: v_writelane_b32 v24, s69, 19
-; SI-NEXT: v_writelane_b32 v24, s70, 20
-; SI-NEXT: v_writelane_b32 v24, s71, 21
-; SI-NEXT: v_writelane_b32 v24, s80, 22
-; SI-NEXT: v_writelane_b32 v24, s81, 23
-; SI-NEXT: v_writelane_b32 v24, s82, 24
-; SI-NEXT: v_writelane_b32 v24, s83, 25
-; SI-NEXT: v_writelane_b32 v24, s84, 26
-; SI-NEXT: v_writelane_b32 v24, s85, 27
-; SI-NEXT: v_writelane_b32 v24, s86, 28
-; SI-NEXT: v_writelane_b32 v24, s87, 29
-; SI-NEXT: v_writelane_b32 v24, s96, 30
-; SI-NEXT: v_writelane_b32 v24, s97, 31
-; SI-NEXT: v_writelane_b32 v24, s98, 32
-; SI-NEXT: v_writelane_b32 v24, s99, 33
-; SI-NEXT: v_writelane_b32 v24, s30, 34
-; SI-NEXT: v_writelane_b32 v24, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s99, v9
-; SI-NEXT: v_readfirstlane_b32 s65, v8
-; SI-NEXT: v_readfirstlane_b32 s96, v7
-; SI-NEXT: v_readfirstlane_b32 s98, v6
-; SI-NEXT: v_readfirstlane_b32 s85, v5
-; SI-NEXT: v_readfirstlane_b32 s87, v4
-; SI-NEXT: v_readfirstlane_b32 s82, v3
-; SI-NEXT: v_readfirstlane_b32 s84, v2
-; SI-NEXT: v_readfirstlane_b32 s71, v1
-; SI-NEXT: v_readfirstlane_b32 s81, v0
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s70, s28, 16
-; SI-NEXT: s_lshr_b32 s49, s27, 16
-; SI-NEXT: s_lshr_b32 s69, s26, 16
-; SI-NEXT: s_lshr_b32 s48, s25, 16
-; SI-NEXT: s_lshr_b32 s68, s24, 16
-; SI-NEXT: s_lshr_b32 s39, s23, 16
-; SI-NEXT: s_lshr_b32 s67, s22, 16
-; SI-NEXT: s_lshr_b32 s38, s21, 16
-; SI-NEXT: s_lshr_b32 s66, s20, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s73, s18, 16
-; SI-NEXT: s_lshr_b32 s36, s17, 16
-; SI-NEXT: s_lshr_b32 s63, s16, 16
-; SI-NEXT: s_lshr_b32 s55, s99, 16
-; SI-NEXT: s_lshr_b32 s64, s65, 16
-; SI-NEXT: s_lshr_b32 s54, s96, 16
-; SI-NEXT: s_lshr_b32 s97, s98, 16
-; SI-NEXT: s_lshr_b32 s53, s85, 16
-; SI-NEXT: s_lshr_b32 s86, s87, 16
-; SI-NEXT: s_lshr_b32 s52, s82, 16
-; SI-NEXT: s_lshr_b32 s83, s84, 16
-; SI-NEXT: s_lshr_b32 s51, s71, 16
-; SI-NEXT: s_lshr_b32 s80, s81, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_writelane_b32 v24, s30, 12
+; SI-NEXT: v_writelane_b32 v24, s31, 13
+; SI-NEXT: s_lshr_b32 s8, s24, 16
+; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane
+; SI-NEXT: s_lshr_b32 s6, s26, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v25, s8, 0
+; SI-NEXT: s_lshr_b32 s4, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s58, v0
+; SI-NEXT: v_writelane_b32 v25, s6, 1
+; SI-NEXT: s_lshr_b32 s57, s58, 16
+; SI-NEXT: v_writelane_b32 v25, s4, 2
+; SI-NEXT: v_readfirstlane_b32 s47, v2
+; SI-NEXT: v_writelane_b32 v25, s57, 3
+; SI-NEXT: s_lshr_b32 s56, s47, 16
+; SI-NEXT: v_writelane_b32 v25, s58, 4
+; SI-NEXT: v_readfirstlane_b32 s45, v4
+; SI-NEXT: v_writelane_b32 v25, s56, 5
+; SI-NEXT: s_lshr_b32 s41, s45, 16
+; SI-NEXT: v_writelane_b32 v25, s47, 6
+; SI-NEXT: v_readfirstlane_b32 s48, v6
+; SI-NEXT: v_writelane_b32 v25, s41, 7
+; SI-NEXT: s_lshr_b32 s15, s48, 16
+; SI-NEXT: v_writelane_b32 v25, s45, 8
+; SI-NEXT: v_readfirstlane_b32 s43, v1
+; SI-NEXT: v_writelane_b32 v25, s15, 9
+; SI-NEXT: v_readfirstlane_b32 s13, v3
+; SI-NEXT: v_writelane_b32 v25, s43, 10
+; SI-NEXT: v_readfirstlane_b32 s11, v5
+; SI-NEXT: v_writelane_b32 v25, s13, 11
+; SI-NEXT: v_readfirstlane_b32 s5, v9
+; SI-NEXT: v_readfirstlane_b32 s37, v8
+; SI-NEXT: v_readfirstlane_b32 s9, v7
+; SI-NEXT: v_writelane_b32 v25, s11, 12
+; SI-NEXT: s_lshr_b32 s89, s29, 16
+; SI-NEXT: s_lshr_b32 s79, s27, 16
+; SI-NEXT: s_lshr_b32 s77, s25, 16
+; SI-NEXT: s_lshr_b32 s75, s23, 16
+; SI-NEXT: s_lshr_b32 s39, s22, 16
+; SI-NEXT: s_lshr_b32 s73, s21, 16
+; SI-NEXT: s_lshr_b32 s38, s20, 16
+; SI-NEXT: s_lshr_b32 s63, s19, 16
+; SI-NEXT: s_lshr_b32 s50, s18, 16
+; SI-NEXT: s_lshr_b32 s61, s17, 16
+; SI-NEXT: s_lshr_b32 s36, s16, 16
+; SI-NEXT: s_lshr_b32 s31, s5, 16
+; SI-NEXT: s_lshr_b32 s7, s37, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s9, 16
+; SI-NEXT: s_lshr_b32 s51, s11, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
+; SI-NEXT: s_lshr_b32 s91, s43, 16
+; SI-NEXT: v_readfirstlane_b32 s10, v10
+; SI-NEXT: v_writelane_b32 v25, s9, 13
+; SI-NEXT: s_cmp_lg_u32 s10, 0
+; SI-NEXT: v_writelane_b32 v25, s5, 14
+; SI-NEXT: v_writelane_b32 v25, s7, 15
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s36, 16
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s60, s63, 16
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s37, 16
-; SI-NEXT: s_or_b32 s46, s4, s60
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s62, s73, 16
-; SI-NEXT: s_mov_b32 s9, s63
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s38, 16
-; SI-NEXT: s_or_b32 s44, s4, s62
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s66, 16
-; SI-NEXT: s_mov_b32 s11, s73
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s39, 16
-; SI-NEXT: s_or_b32 s42, s4, s72
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s67, 16
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s48, 16
-; SI-NEXT: s_or_b32 s40, s4, s74
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s68, 16
-; SI-NEXT: s_or_b32 s77, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s49, 16
-; SI-NEXT: s_or_b32 s14, s4, s76
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s78, s69, 16
-; SI-NEXT: s_or_b32 s79, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s50, 16
-; SI-NEXT: s_or_b32 s12, s4, s78
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s88, s70, 16
-; SI-NEXT: s_or_b32 s89, s5, s7
-; SI-NEXT: s_and_b32 s5, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s51, 16
-; SI-NEXT: s_or_b32 s10, s4, s88
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s90, s80, 16
-; SI-NEXT: s_or_b32 s91, s5, s7
-; SI-NEXT: s_and_b32 s5, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s52, 16
+; SI-NEXT: s_and_b32 s10, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s60, s36, 16
+; SI-NEXT: s_or_b32 s46, s10, s60
+; SI-NEXT: s_and_b32 s10, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s50, 16
+; SI-NEXT: s_or_b32 s44, s10, s62
+; SI-NEXT: s_and_b32 s10, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s38, 16
+; SI-NEXT: s_or_b32 s42, s10, s72
+; SI-NEXT: s_and_b32 s10, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s39, 16
+; SI-NEXT: s_lshl_b32 s76, s8, 16
+; SI-NEXT: s_and_b32 s8, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s78, s6, 16
+; SI-NEXT: s_lshl_b32 s88, s4, 16
+; SI-NEXT: s_and_b32 s4, s58, 0xffff
+; SI-NEXT: s_lshl_b32 s90, s57, 16
+; SI-NEXT: s_or_b32 s40, s10, s74
+; SI-NEXT: s_and_b32 s10, s24, 0xffff
+; SI-NEXT: s_or_b32 s12, s8, s78
+; SI-NEXT: s_and_b32 s6, s28, 0xffff
; SI-NEXT: s_or_b32 s8, s4, s90
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s92, s83, 16
-; SI-NEXT: s_or_b32 s93, s5, s7
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s53, 16
+; SI-NEXT: s_and_b32 s4, s47, 0xffff
+; SI-NEXT: s_lshl_b32 s92, s56, 16
+; SI-NEXT: s_or_b32 s14, s10, s76
+; SI-NEXT: s_or_b32 s10, s6, s88
; SI-NEXT: s_or_b32 s6, s4, s92
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s86, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s54, 16
-; SI-NEXT: s_or_b32 s4, s4, s58
-; SI-NEXT: s_lshl_b32 s56, s97, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s99, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s55, 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16
-; SI-NEXT: s_and_b32 s58, s98, 0xffff
-; SI-NEXT: s_or_b32 s31, s5, s7
-; SI-NEXT: s_lshl_b32 s30, s64, 16
+; SI-NEXT: s_and_b32 s4, s45, 0xffff
+; SI-NEXT: s_lshl_b32 s58, s41, 16
+; SI-NEXT: s_and_b32 s41, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s61, 16
+; SI-NEXT: s_lshl_b32 s56, s15, 16
+; SI-NEXT: s_mov_b32 s15, s61
+; SI-NEXT: s_or_b32 s61, s41, s45
+; SI-NEXT: s_and_b32 s45, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s63, 16
+; SI-NEXT: s_mov_b32 s41, s63
+; SI-NEXT: s_or_b32 s63, s45, s47
+; SI-NEXT: s_and_b32 s45, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s73, 16
+; SI-NEXT: s_mov_b32 s94, s73
+; SI-NEXT: s_or_b32 s73, s45, s47
+; SI-NEXT: s_and_b32 s45, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s75, 16
+; SI-NEXT: s_mov_b32 vcc_lo, s75
+; SI-NEXT: s_or_b32 s75, s45, s47
+; SI-NEXT: s_and_b32 s45, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s77, 16
+; SI-NEXT: s_mov_b32 s30, s77
+; SI-NEXT: s_or_b32 s77, s45, s47
+; SI-NEXT: s_and_b32 s45, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s79, 16
+; SI-NEXT: s_mov_b32 s34, s79
+; SI-NEXT: s_or_b32 s79, s45, s47
+; SI-NEXT: s_and_b32 s45, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s89, 16
+; SI-NEXT: s_mov_b32 s35, s89
+; SI-NEXT: s_or_b32 s89, s45, s47
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s91, 16
+; SI-NEXT: s_mov_b32 s95, s37
+; SI-NEXT: s_mov_b32 s37, s48
+; SI-NEXT: s_mov_b32 s48, s91
+; SI-NEXT: s_or_b32 s91, s43, s45
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s49, 16
+; SI-NEXT: s_or_b32 s93, s13, s43
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s51, 16
+; SI-NEXT: s_or_b32 s59, s11, s13
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s11, vcc_hi, 16
+; SI-NEXT: s_or_b32 s57, s9, s11
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s31, 16
+; SI-NEXT: s_or_b32 s53, s5, s9
; SI-NEXT: s_mov_b32 s45, s63
; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
; SI-NEXT: s_mov_b32 s43, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_or_b32 s58, s58, s56
-; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
-; SI-NEXT: s_and_b32 s56, s65, 0xffff
+; SI-NEXT: s_mov_b32 s9, s91
+; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16
; SI-NEXT: s_mov_b32 s47, s61
; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16
-; SI-NEXT: s_mov_b32 s63, s9
-; SI-NEXT: s_mov_b32 s73, s11
+; SI-NEXT: s_mov_b32 s63, s41
+; SI-NEXT: s_mov_b32 s73, s94
; SI-NEXT: s_mov_b32 s41, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
+; SI-NEXT: s_mov_b32 s91, s48
+; SI-NEXT: s_mov_b32 s48, s37
+; SI-NEXT: s_mov_b32 s37, s95
+; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16
+; SI-NEXT: s_or_b32 s4, s4, s58
+; SI-NEXT: s_lshl_b32 s52, s7, 16
+; SI-NEXT: s_mov_b32 s61, s15
+; SI-NEXT: s_mov_b32 s75, vcc_lo
; SI-NEXT: s_mov_b32 s15, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
+; SI-NEXT: s_and_b32 s58, s48, 0xffff
+; SI-NEXT: s_mov_b32 s95, vcc_hi
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
+; SI-NEXT: s_mov_b32 s77, s30
; SI-NEXT: s_mov_b32 s13, s79
; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16
; SI-NEXT: s_mov_b32 s11, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16
-; SI-NEXT: s_mov_b32 s9, s91
-; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16
+; SI-NEXT: s_or_b32 s58, s58, s56
+; SI-NEXT: s_mov_b32 vcc_hi, s95
+; SI-NEXT: s_and_b32 s56, s37, 0xffff
+; SI-NEXT: s_mov_b32 s95, s31
+; SI-NEXT: s_lshr_b64 s[30:31], s[52:53], 16
+; SI-NEXT: s_mov_b32 s79, s34
+; SI-NEXT: s_mov_b32 s89, s35
; SI-NEXT: s_mov_b32 s7, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[92:93], 16
; SI-NEXT: s_mov_b32 s5, s59
; SI-NEXT: s_mov_b32 s59, s57
-; SI-NEXT: s_or_b32 s56, s56, s30
-; SI-NEXT: s_mov_b32 s57, s31
-; SI-NEXT: s_lshr_b64 s[30:31], s[30:31], 16
+; SI-NEXT: s_or_b32 s56, s56, s52
+; SI-NEXT: s_mov_b32 s57, s53
+; SI-NEXT: s_mov_b32 s31, s95
; SI-NEXT: s_mov_b64 s[34:35], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
@@ -39235,121 +39722,133 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[34:35], s[34:35], exec
-; SI-NEXT: s_cselect_b32 s61, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s61, 1
+; SI-NEXT: s_cselect_b32 s95, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s95, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s65, s65, 3
-; SI-NEXT: s_and_b32 s4, s65, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s99, s99, 3
+; SI-NEXT: s_add_i32 s4, s37, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v25, 15
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s99, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s55, 16
+; SI-NEXT: v_readlane_b32 s4, v25, 14
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s98, s98, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s96, s96, 3
+; SI-NEXT: s_add_i32 s4, s48, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v25, 9
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s54, 16
+; SI-NEXT: v_readlane_b32 s4, v25, 13
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
-; SI-NEXT: s_add_i32 s85, s85, 3
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s53, 16
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: v_readlane_b32 s4, v25, 8
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s5, s4, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v25, 7
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
+; SI-NEXT: v_readlane_b32 s5, v25, 12
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s51, 16
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s83, 16
-; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: s_and_b32 s7, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s52, 16
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: v_readlane_b32 s6, v25, 6
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_and_b32 s7, s6, 0xffff
+; SI-NEXT: v_readlane_b32 s6, v25, 5
+; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_or_b32 s6, s6, s7
+; SI-NEXT: v_readlane_b32 s7, v25, 11
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s49, 16
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s80, 16
-; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_and_b32 s9, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s51, 16
-; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s8, v25, 4
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_and_b32 s9, s8, 0xffff
+; SI-NEXT: v_readlane_b32 s8, v25, 3
+; SI-NEXT: s_lshl_b32 s8, s8, 16
+; SI-NEXT: s_or_b32 s8, s8, s9
+; SI-NEXT: v_readlane_b32 s9, v25, 10
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s91, 16
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s70, 16
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s10, v25, 2
+; SI-NEXT: s_and_b32 s11, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s50, 16
-; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: s_lshl_b32 s12, s89, 16
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s69, 16
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: v_readlane_b32 s12, v25, 1
+; SI-NEXT: s_and_b32 s13, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s49, 16
-; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: s_lshl_b32 s14, s79, 16
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s68, 16
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_readlane_b32 s14, v25, 0
+; SI-NEXT: s_and_b32 s15, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s15, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s48, 16
+; SI-NEXT: s_lshl_b32 s24, s77, 16
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_or_b32 s15, s24, s15
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s67, 16
+; SI-NEXT: s_lshl_b32 s24, s39, 16
; SI-NEXT: s_or_b32 s22, s24, s22
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s40, s22, 0x30000
; SI-NEXT: s_and_b32 s22, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s23, s39, 16
+; SI-NEXT: s_lshl_b32 s23, s75, 16
; SI-NEXT: s_or_b32 s22, s23, s22
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s41, s22, 0x30000
; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s66, 16
+; SI-NEXT: s_lshl_b32 s22, s38, 16
; SI-NEXT: s_or_b32 s20, s22, s20
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s42, s20, 0x30000
; SI-NEXT: s_and_b32 s20, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s21, s38, 16
+; SI-NEXT: s_lshl_b32 s21, s73, 16
; SI-NEXT: s_or_b32 s20, s21, s20
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s43, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s73, 16
+; SI-NEXT: s_lshl_b32 s20, s50, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s44, s18, 0x30000
; SI-NEXT: s_and_b32 s18, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s19, s37, 16
+; SI-NEXT: s_lshl_b32 s19, s63, 16
; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s45, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s63, 16
+; SI-NEXT: s_lshl_b32 s18, s36, 16
; SI-NEXT: s_or_b32 s16, s18, s16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s46, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s36, 16
+; SI-NEXT: s_lshl_b32 s17, s61, 16
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_add_i32 s4, s4, 0x30000
-; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: s_add_i32 s6, s6, 0x30000
-; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s10, s10, 0x30000
@@ -39359,6 +39858,10 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_add_i32 s14, s14, 0x30000
; SI-NEXT: s_add_i32 s15, s15, 0x30000
; SI-NEXT: s_add_i32 s47, s16, 0x30000
+; SI-NEXT: s_add_i32 s4, s4, 0x30000
+; SI-NEXT: s_add_i32 s5, s5, 0x30000
+; SI-NEXT: s_add_i32 s6, s6, 0x30000
+; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_lshr_b64 s[60:61], s[46:47], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16
@@ -39367,96 +39870,96 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16
; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16
; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16
-; SI-NEXT: s_lshr_b32 s36, s47, 16
-; SI-NEXT: s_lshr_b32 s37, s45, 16
-; SI-NEXT: s_lshr_b32 s38, s43, 16
-; SI-NEXT: s_lshr_b32 s39, s41, 16
-; SI-NEXT: s_lshr_b32 s48, s15, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 16
-; SI-NEXT: s_lshr_b32 s50, s11, 16
-; SI-NEXT: s_lshr_b32 s51, s9, 16
-; SI-NEXT: s_lshr_b32 s52, s7, 16
-; SI-NEXT: s_lshr_b32 s53, s5, 16
-; SI-NEXT: s_lshr_b32 s54, s59, 16
-; SI-NEXT: s_lshr_b32 s55, s57, 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s61, s47, 16
+; SI-NEXT: s_lshr_b32 s63, s45, 16
+; SI-NEXT: s_lshr_b32 s73, s43, 16
+; SI-NEXT: s_lshr_b32 s75, s41, 16
+; SI-NEXT: s_lshr_b32 s77, s15, 16
+; SI-NEXT: s_lshr_b32 s79, s13, 16
+; SI-NEXT: s_lshr_b32 s89, s11, 16
+; SI-NEXT: s_lshr_b32 s91, s9, 16
+; SI-NEXT: s_lshr_b32 s49, s7, 16
+; SI-NEXT: s_lshr_b32 s51, s5, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s59, 16
+; SI-NEXT: s_lshr_b32 s31, s57, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s16, s46, 0xffff
; SI-NEXT: s_lshl_b32 s17, s60, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s36, 16
+; SI-NEXT: s_lshl_b32 s18, s61, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s44, 0xffff
; SI-NEXT: s_lshl_b32 s19, s62, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s37, 16
+; SI-NEXT: s_lshl_b32 s20, s63, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s42, 0xffff
; SI-NEXT: s_lshl_b32 s21, s72, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s38, 16
+; SI-NEXT: s_lshl_b32 s22, s73, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s40, 0xffff
; SI-NEXT: s_lshl_b32 s23, s74, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s39, 16
+; SI-NEXT: s_lshl_b32 s24, s75, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s24, s76, 16
; SI-NEXT: s_or_b32 s14, s14, s24
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s48, 16
+; SI-NEXT: s_lshl_b32 s24, s77, 16
; SI-NEXT: s_or_b32 s15, s15, s24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s24, s78, 16
; SI-NEXT: s_or_b32 s12, s12, s24
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s49, 16
+; SI-NEXT: s_lshl_b32 s24, s79, 16
; SI-NEXT: s_or_b32 s13, s13, s24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s24, s88, 16
; SI-NEXT: s_or_b32 s10, s10, s24
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s50, 16
+; SI-NEXT: s_lshl_b32 s24, s89, 16
; SI-NEXT: s_or_b32 s11, s11, s24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s24, s90, 16
; SI-NEXT: s_or_b32 s8, s8, s24
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s51, 16
+; SI-NEXT: s_lshl_b32 s24, s91, 16
; SI-NEXT: s_or_b32 s9, s9, s24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s24, s92, 16
; SI-NEXT: s_or_b32 s6, s6, s24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s52, 16
+; SI-NEXT: s_lshl_b32 s24, s49, 16
; SI-NEXT: s_or_b32 s7, s7, s24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s24, s94, 16
; SI-NEXT: s_or_b32 s4, s4, s24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s53, 16
+; SI-NEXT: s_lshl_b32 s24, s51, 16
; SI-NEXT: s_or_b32 s5, s5, s24
; SI-NEXT: s_and_b32 s24, s58, 0xffff
; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s54, 16
+; SI-NEXT: s_lshl_b32 s26, vcc_hi, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s56, 0xffff
; SI-NEXT: s_lshl_b32 s27, s30, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s55, 16
+; SI-NEXT: s_lshl_b32 s28, s31, 16
; SI-NEXT: s_or_b32 s27, s27, s28
-; SI-NEXT: v_readlane_b32 s30, v24, 34
+; SI-NEXT: v_readlane_b32 s30, v24, 12
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -39481,29 +39984,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v21, s25
; SI-NEXT: v_mov_b32_e32 v22, s26
; SI-NEXT: v_mov_b32_e32 v23, s27
-; SI-NEXT: v_readlane_b32 s31, v24, 35
-; SI-NEXT: v_readlane_b32 s99, v24, 33
-; SI-NEXT: v_readlane_b32 s98, v24, 32
-; SI-NEXT: v_readlane_b32 s97, v24, 31
-; SI-NEXT: v_readlane_b32 s96, v24, 30
-; SI-NEXT: v_readlane_b32 s87, v24, 29
-; SI-NEXT: v_readlane_b32 s86, v24, 28
-; SI-NEXT: v_readlane_b32 s85, v24, 27
-; SI-NEXT: v_readlane_b32 s84, v24, 26
-; SI-NEXT: v_readlane_b32 s83, v24, 25
-; SI-NEXT: v_readlane_b32 s82, v24, 24
-; SI-NEXT: v_readlane_b32 s81, v24, 23
-; SI-NEXT: v_readlane_b32 s80, v24, 22
-; SI-NEXT: v_readlane_b32 s71, v24, 21
-; SI-NEXT: v_readlane_b32 s70, v24, 20
-; SI-NEXT: v_readlane_b32 s69, v24, 19
-; SI-NEXT: v_readlane_b32 s68, v24, 18
-; SI-NEXT: v_readlane_b32 s67, v24, 17
-; SI-NEXT: v_readlane_b32 s66, v24, 16
-; SI-NEXT: v_readlane_b32 s65, v24, 15
-; SI-NEXT: v_readlane_b32 s64, v24, 14
-; SI-NEXT: v_readlane_b32 s55, v24, 13
-; SI-NEXT: v_readlane_b32 s54, v24, 12
+; SI-NEXT: v_readlane_b32 s31, v24, 13
; SI-NEXT: v_readlane_b32 s53, v24, 11
; SI-NEXT: v_readlane_b32 s52, v24, 10
; SI-NEXT: v_readlane_b32 s51, v24, 9
@@ -39518,6 +39999,7 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v24, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -41204,22 +41686,16 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; SI-LABEL: bitcast_v48f16_to_v48i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s11, v9
; SI-NEXT: v_readfirstlane_b32 s6, v8
; SI-NEXT: v_readfirstlane_b32 s12, v7
@@ -41277,7 +41753,7 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v3, v2
; SI-NEXT: v_cvt_f32_f16_e32 v23, s19
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s17
+; SI-NEXT: v_cvt_f32_f16_e32 v33, s17
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s75
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3
@@ -41316,51 +41792,47 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v5
; SI-NEXT: v_cvt_f32_f16_e32 v5, s46
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v24, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f32_f16_e32 v3, s59
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v7
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v24
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s29
; SI-NEXT: v_or_b32_e32 v19, v1, v5
; SI-NEXT: v_cvt_f32_f16_e32 v1, s45
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s56
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v7
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v25
; SI-NEXT: v_cvt_f32_f16_e32 v5, s44
; SI-NEXT: v_or_b32_e32 v17, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s43
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s29
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v27, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; SI-NEXT: v_or_b32_e32 v15, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s42
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v27
; SI-NEXT: v_or_b32_e32 v13, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s27
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s41
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v30, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v29, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v28
; SI-NEXT: v_cvt_f32_f16_e32 v5, s25
; SI-NEXT: v_or_b32_e32 v11, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s40
@@ -41368,159 +41840,167 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v31, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v30
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v29
; SI-NEXT: v_or_b32_e32 v9, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s15
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v31
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v30
; SI-NEXT: v_or_b32_e32 v7, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s21
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s14
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v31, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v56
+; SI-NEXT: v_cvt_f16_f32_e32 v32, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31
; SI-NEXT: v_or_b32_e32 v5, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s13
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_cvt_f32_f16_e32 v21, s58
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
+; SI-NEXT: v_cvt_f16_f32_e32 v34, v3
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v33
+; SI-NEXT: v_cvt_f16_f32_e32 v33, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
; SI-NEXT: v_or_b32_e32 v3, v23, v1
; SI-NEXT: v_cvt_f32_f16_e32 v23, s12
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
-; SI-NEXT: v_or_b32_e32 v1, v24, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s11
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; SI-NEXT: v_or_b32_e32 v1, v33, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v33, s11
+; SI-NEXT: v_cvt_f32_f16_e32 v48, s28
+; SI-NEXT: v_cvt_f32_f16_e32 v49, s10
+; SI-NEXT: v_cvt_f32_f16_e32 v38, s24
+; SI-NEXT: v_cvt_f32_f16_e32 v39, s26
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v21
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v21
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v23
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
-; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v24
+; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v33
+; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v48
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v49
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v57
+; SI-NEXT: v_add_f32_e32 v38, 0x38000000, v38
+; SI-NEXT: v_add_f32_e32 v39, 0x38000000, v39
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v48
+; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
+; SI-NEXT: v_cvt_f16_f32_e32 v38, v38
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
; SI-NEXT: v_cvt_f32_f16_e32 v0, s79
-; SI-NEXT: v_or_b32_e32 v21, v21, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v25, s16
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s18
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s20
-; SI-NEXT: v_cvt_f32_f16_e32 v27, s22
+; SI-NEXT: v_or_b32_e32 v21, v21, v33
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40
+; SI-NEXT: v_cvt_f32_f16_e32 v35, s16
+; SI-NEXT: v_or_b32_e32 v23, v23, v33
+; SI-NEXT: v_cvt_f32_f16_e32 v33, s18
+; SI-NEXT: v_cvt_f32_f16_e32 v36, s20
+; SI-NEXT: v_cvt_f32_f16_e32 v37, s22
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_or_b32_e32 v44, v48, v12
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_or_b32_e32 v45, v49, v14
+; SI-NEXT: v_cvt_f32_f16_e32 v48, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v49, s6
+; SI-NEXT: v_or_b32_e32 v42, v38, v8
+; SI-NEXT: v_or_b32_e32 v43, v39, v10
+; SI-NEXT: v_cvt_f32_f16_e32 v38, s9
+; SI-NEXT: v_cvt_f32_f16_e32 v39, s8
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
+; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
+; SI-NEXT: v_add_f32_e32 v36, 0x38000000, v36
+; SI-NEXT: v_add_f32_e32 v37, 0x38000000, v37
+; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v48
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v49
+; SI-NEXT: v_cvt_f16_f32_e32 v35, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v33, v33
+; SI-NEXT: v_cvt_f16_f32_e32 v36, v36
+; SI-NEXT: v_cvt_f16_f32_e32 v37, v37
+; SI-NEXT: v_add_f32_e32 v38, 0x38000000, v38
+; SI-NEXT: v_add_f32_e32 v39, 0x38000000, v39
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v48
+; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
+; SI-NEXT: v_cvt_f16_f32_e32 v38, v38
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v47, v25, v0
-; SI-NEXT: v_or_b32_e32 v45, v24, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v25, s26
-; SI-NEXT: v_or_b32_e32 v42, v26, v4
-; SI-NEXT: v_or_b32_e32 v63, v27, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s28
-; SI-NEXT: v_cvt_f32_f16_e32 v27, s10
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: v_or_b32_e32 v46, v24, v8
-; SI-NEXT: v_or_b32_e32 v43, v25, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v24, s9
-; SI-NEXT: v_cvt_f32_f16_e32 v25, s8
-; SI-NEXT: v_or_b32_e32 v41, v26, v12
-; SI-NEXT: v_or_b32_e32 v62, v27, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s7
-; SI-NEXT: v_cvt_f32_f16_e32 v27, s6
-; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_or_b32_e32 v44, v24, v16
-; SI-NEXT: v_or_b32_e32 v40, v25, v18
-; SI-NEXT: v_lshr_b64 v[24:25], v[22:23], 16
-; SI-NEXT: v_or_b32_e32 v61, v26, v20
-; SI-NEXT: v_or_b32_e32 v60, v27, v22
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v35, v35, v0
+; SI-NEXT: v_or_b32_e32 v33, v33, v2
+; SI-NEXT: v_or_b32_e32 v36, v36, v4
+; SI-NEXT: v_or_b32_e32 v37, v37, v6
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_or_b32_e32 v56, v48, v20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v57, v49, v22
+; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
+; SI-NEXT: v_lshr_b64 v[50:51], v[4:5], 16
+; SI-NEXT: v_lshr_b64 v[48:49], v[6:7], 16
+; SI-NEXT: v_or_b32_e32 v46, v38, v16
+; SI-NEXT: v_or_b32_e32 v47, v39, v18
+; SI-NEXT: v_lshr_b64 v[54:55], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v0, v35
+; SI-NEXT: v_mov_b32_e32 v53, v33
+; SI-NEXT: v_mov_b32_e32 v2, v34
+; SI-NEXT: v_mov_b32_e32 v51, v36
+; SI-NEXT: v_mov_b32_e32 v4, v32
+; SI-NEXT: v_mov_b32_e32 v49, v37
+; SI-NEXT: v_mov_b32_e32 v6, v31
+; SI-NEXT: v_lshr_b64 v[38:39], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v8, v30
; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16
-; SI-NEXT: v_mov_b32_e32 v10, v31
+; SI-NEXT: v_mov_b32_e32 v10, v29
; SI-NEXT: v_lshr_b64 v[34:35], v[12:13], 16
-; SI-NEXT: v_mov_b32_e32 v12, v30
+; SI-NEXT: v_mov_b32_e32 v12, v28
; SI-NEXT: v_lshr_b64 v[32:33], v[14:15], 16
-; SI-NEXT: v_mov_b32_e32 v14, v29
+; SI-NEXT: v_mov_b32_e32 v14, v27
; SI-NEXT: v_lshr_b64 v[30:31], v[16:17], 16
-; SI-NEXT: v_mov_b32_e32 v16, v28
+; SI-NEXT: v_mov_b32_e32 v16, v26
; SI-NEXT: v_lshr_b64 v[28:29], v[18:19], 16
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v18, v25
; SI-NEXT: v_lshr_b64 v[26:27], v[20:21], 16
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[54:55], v[0:1], 16
-; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
-; SI-NEXT: v_lshr_b64 v[50:51], v[4:5], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[6:7], 16
-; SI-NEXT: v_lshr_b64 v[38:39], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v20, v24
+; SI-NEXT: v_lshr_b64 v[24:25], v[22:23], 16
+; SI-NEXT: v_mov_b32_e32 v39, v42
+; SI-NEXT: v_mov_b32_e32 v37, v43
+; SI-NEXT: v_mov_b32_e32 v35, v44
+; SI-NEXT: v_mov_b32_e32 v33, v45
+; SI-NEXT: v_mov_b32_e32 v31, v46
+; SI-NEXT: v_mov_b32_e32 v29, v47
+; SI-NEXT: v_mov_b32_e32 v27, v56
+; SI-NEXT: v_mov_b32_e32 v25, v57
+; SI-NEXT: v_mov_b32_e32 v22, v41
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v25, s72
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v57, s58
-; SI-NEXT: v_mov_b32_e32 v22, s60
-; SI-NEXT: v_mov_b32_e32 v20, s59
-; SI-NEXT: v_mov_b32_e32 v18, s56
-; SI-NEXT: v_mov_b32_e32 v16, s43
-; SI-NEXT: v_mov_b32_e32 v14, s42
-; SI-NEXT: v_mov_b32_e32 v12, s41
-; SI-NEXT: v_mov_b32_e32 v10, s40
-; SI-NEXT: v_mov_b32_e32 v56, s15
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v58, s14
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v59, s13
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v60, s6
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v61, s7
-; SI-NEXT: v_mov_b32_e32 v40, s8
-; SI-NEXT: v_mov_b32_e32 v44, s9
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v62, s10
-; SI-NEXT: v_mov_b32_e32 v41, s28
-; SI-NEXT: v_mov_b32_e32 v43, s26
-; SI-NEXT: v_mov_b32_e32 v46, s24
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v63, s22
-; SI-NEXT: v_mov_b32_e32 v42, s20
-; SI-NEXT: v_mov_b32_e32 v45, s18
-; SI-NEXT: v_mov_b32_e32 v47, s16
+; SI-NEXT: v_mov_b32_e32 v40, s72
+; SI-NEXT: v_mov_b32_e32 v22, s58
+; SI-NEXT: v_mov_b32_e32 v20, s60
+; SI-NEXT: v_mov_b32_e32 v18, s59
+; SI-NEXT: v_mov_b32_e32 v16, s56
+; SI-NEXT: v_mov_b32_e32 v14, s43
+; SI-NEXT: v_mov_b32_e32 v12, s42
+; SI-NEXT: v_mov_b32_e32 v10, s41
+; SI-NEXT: v_mov_b32_e32 v8, s40
+; SI-NEXT: v_mov_b32_e32 v6, s15
+; SI-NEXT: v_mov_b32_e32 v4, s14
+; SI-NEXT: v_mov_b32_e32 v2, s13
+; SI-NEXT: v_mov_b32_e32 v25, s6
+; SI-NEXT: v_mov_b32_e32 v27, s7
+; SI-NEXT: v_mov_b32_e32 v29, s8
+; SI-NEXT: v_mov_b32_e32 v31, s9
+; SI-NEXT: v_mov_b32_e32 v33, s10
+; SI-NEXT: v_mov_b32_e32 v35, s28
+; SI-NEXT: v_mov_b32_e32 v37, s26
+; SI-NEXT: v_mov_b32_e32 v39, s24
+; SI-NEXT: v_mov_b32_e32 v49, s22
+; SI-NEXT: v_mov_b32_e32 v51, s20
+; SI-NEXT: v_mov_b32_e32 v53, s18
+; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v3, s19
; SI-NEXT: v_mov_b32_e32 v5, s21
@@ -41546,97 +42026,88 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v26, s57
; SI-NEXT: v_mov_b32_e32 v24, s47
; SI-NEXT: .LBB59_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v54
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; SI-NEXT: v_or_b32_e32 v22, v22, v24
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v54
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58
+; SI-NEXT: v_and_b32_e32 v52, 0xffff, v53
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v42
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56
+; SI-NEXT: v_and_b32_e32 v50, 0xffff, v51
; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v63
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v48
-; SI-NEXT: v_or_b32_e32 v6, v6, v8
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v38
-; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36
-; SI-NEXT: v_or_b32_e32 v10, v10, v12
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v14
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v34
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v35
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v62
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v44
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v30
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v20
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v40
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v61
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v26
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v57
-; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v60
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25
+; SI-NEXT: v_or_b32_e32 v0, v0, v54
+; SI-NEXT: v_or_b32_e32 v2, v52, v2
+; SI-NEXT: v_or_b32_e32 v4, v50, v4
+; SI-NEXT: v_or_b32_e32 v6, v6, v48
+; SI-NEXT: v_or_b32_e32 v8, v8, v38
+; SI-NEXT: v_or_b32_e32 v10, v10, v36
+; SI-NEXT: v_or_b32_e32 v12, v12, v34
+; SI-NEXT: v_or_b32_e32 v14, v14, v32
+; SI-NEXT: v_or_b32_e32 v16, v16, v30
+; SI-NEXT: v_or_b32_e32 v18, v18, v28
+; SI-NEXT: v_or_b32_e32 v20, v20, v26
; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
index d070d09aa3dc3..17be3326fbe16 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
@@ -4259,10 +4259,8 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
-; SI-NEXT: v_writelane_b32 v26, s37, 3
-; SI-NEXT: v_writelane_b32 v26, s38, 4
-; SI-NEXT: v_writelane_b32 v26, s30, 5
-; SI-NEXT: v_writelane_b32 v26, s31, 6
+; SI-NEXT: v_writelane_b32 v26, s30, 3
+; SI-NEXT: v_writelane_b32 v26, s31, 4
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -4279,21 +4277,23 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s14, v0
; SI-NEXT: s_cbranch_scc0 .LBB13_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: s_mov_b32 s41, s42
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b32 s92, s5, 16
; SI-NEXT: s_lshr_b32 s93, s7, 16
; SI-NEXT: s_lshr_b32 s94, s9, 16
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s34, s23, 16
+; SI-NEXT: s_lshr_b32 s35, s19, 16
+; SI-NEXT: s_lshr_b32 s36, s17, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
@@ -4310,19 +4310,19 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: .LBB13_2:
; SI-NEXT: s_mov_b64 s[90:91], -1
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr56
@@ -4337,10 +4337,14 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: .LBB13_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s45, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s45, 1
; SI-NEXT: s_cbranch_scc1 .LBB13_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -4363,10 +4367,6 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
@@ -4380,13 +4380,13 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s41, s29, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s34, s23, 16
+; SI-NEXT: s_lshr_b32 s43, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s19, 16
+; SI-NEXT: s_lshr_b32 s36, s17, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
@@ -4394,85 +4394,85 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: .LBB13_5: ; %end
-; SI-NEXT: s_lshl_b32 s41, s88, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s41
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s38, 16
-; SI-NEXT: s_or_b32 s17, s17, s41
-; SI-NEXT: s_lshl_b32 s41, s78, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s41
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s41
-; SI-NEXT: s_lshl_b32 s41, s76, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s41
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s36, 16
-; SI-NEXT: s_or_b32 s21, s21, s41
-; SI-NEXT: s_lshl_b32 s41, s74, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s41
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s35, 16
-; SI-NEXT: s_or_b32 s23, s23, s41
-; SI-NEXT: s_lshl_b32 s41, s72, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s41
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s34, 16
-; SI-NEXT: s_or_b32 s25, s25, s41
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s62, 16
-; SI-NEXT: s_or_b32 s26, s26, s41
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s31, 16
-; SI-NEXT: s_or_b32 s27, s27, s41
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s60, 16
-; SI-NEXT: s_or_b32 s28, s28, s41
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s41, 16
; SI-NEXT: s_or_b32 s29, s29, s41
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s14, s14, s41
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
; SI-NEXT: s_or_b32 s15, s15, s41
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s41, s56, 16
+; SI-NEXT: s_or_b32 s21, s21, s43
+; SI-NEXT: s_lshl_b32 s43, s74, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s41
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s41, vcc_lo, 16
+; SI-NEXT: s_or_b32 s22, s22, s43
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s34, 16
; SI-NEXT: s_or_b32 s13, s13, s41
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s41, s46, 16
+; SI-NEXT: s_lshl_b32 s45, s88, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s43
+; SI-NEXT: s_lshl_b32 s43, s72, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s41
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s41, s95, 16
+; SI-NEXT: s_or_b32 s16, s16, s45
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s24, s24, s43
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s31, 16
; SI-NEXT: s_or_b32 s11, s11, s41
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s41, s44, 16
+; SI-NEXT: s_or_b32 s17, s17, s45
+; SI-NEXT: s_lshl_b32 s45, s78, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s62, 16
; SI-NEXT: s_or_b32 s8, s8, s41
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s41, s94, 16
+; SI-NEXT: s_or_b32 s18, s18, s45
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s41
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s41, s42, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_or_b32 s19, s19, s45
+; SI-NEXT: s_lshl_b32 s45, s76, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s60, 16
; SI-NEXT: s_or_b32 s6, s6, s41
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s41, s93, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s40, s92, 16
+; SI-NEXT: s_or_b32 s20, s20, s45
+; SI-NEXT: s_or_b32 s28, s28, s43
; SI-NEXT: s_or_b32 s7, s7, s41
; SI-NEXT: s_or_b32 s5, s5, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 5
+; SI-NEXT: v_readlane_b32 s30, v26, 3
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -4499,9 +4499,7 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: v_readlane_b32 s31, v26, 6
-; SI-NEXT: v_readlane_b32 s38, v26, 4
-; SI-NEXT: v_readlane_b32 s37, v26, 3
+; SI-NEXT: v_readlane_b32 s31, v26, 4
; SI-NEXT: v_readlane_b32 s36, v26, 2
; SI-NEXT: v_readlane_b32 s35, v26, 1
; SI-NEXT: v_readlane_b32 s34, v26, 0
@@ -6393,8 +6391,9 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
@@ -6413,14 +6412,8 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v26, s65, 15
; SI-NEXT: v_writelane_b32 v26, s66, 16
; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s69, 19
-; SI-NEXT: v_writelane_b32 v26, s70, 20
-; SI-NEXT: v_writelane_b32 v26, s71, 21
-; SI-NEXT: v_writelane_b32 v26, s80, 22
-; SI-NEXT: v_writelane_b32 v26, s81, 23
-; SI-NEXT: v_writelane_b32 v26, s30, 24
-; SI-NEXT: v_writelane_b32 v26, s31, 25
+; SI-NEXT: v_writelane_b32 v26, s30, 18
+; SI-NEXT: v_writelane_b32 v26, s31, 19
; SI-NEXT: v_readfirstlane_b32 s7, v11
; SI-NEXT: v_readfirstlane_b32 s9, v10
; SI-NEXT: v_readfirstlane_b32 s11, v9
@@ -6432,21 +6425,21 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s93, v2
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
-; SI-NEXT: v_readfirstlane_b32 s31, v0
+; SI-NEXT: v_readfirstlane_b32 s63, v0
; SI-NEXT: s_lshr_b32 s76, s29, 16
; SI-NEXT: s_lshr_b32 s79, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
; SI-NEXT: s_lshr_b32 s91, s26, 16
; SI-NEXT: s_lshr_b32 s94, s25, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
-; SI-NEXT: s_lshr_b32 s69, s20, 16
-; SI-NEXT: s_lshr_b32 s70, s19, 16
-; SI-NEXT: s_lshr_b32 s71, s18, 16
-; SI-NEXT: s_lshr_b32 s80, s17, 16
-; SI-NEXT: s_lshr_b32 s81, s16, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 s31, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s20, 16
+; SI-NEXT: s_lshr_b32 s64, s19, 16
+; SI-NEXT: s_lshr_b32 s65, s18, 16
+; SI-NEXT: s_lshr_b32 s66, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -6458,34 +6451,34 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s88, s90, 16
; SI-NEXT: s_lshr_b32 s92, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s62, s63, 16
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -6505,8 +6498,8 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_and_b32 s4, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
@@ -6544,8 +6537,78 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
+; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v27, s78, 0
+; SI-NEXT: v_writelane_b32 v27, s75, 1
+; SI-NEXT: v_writelane_b32 v27, s73, 2
+; SI-NEXT: v_writelane_b32 v27, s15, 3
+; SI-NEXT: v_writelane_b32 v27, s13, 4
+; SI-NEXT: v_writelane_b32 v27, s11, 5
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s95
+; SI-NEXT: s_mov_b32 s95, s94
+; SI-NEXT: s_mov_b32 s94, s92
+; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_mov_b32 s91, s89
+; SI-NEXT: s_mov_b32 s89, s88
+; SI-NEXT: s_mov_b32 s88, s79
+; SI-NEXT: s_mov_b32 s79, s77
+; SI-NEXT: s_mov_b32 s77, s76
+; SI-NEXT: s_mov_b32 s76, s74
+; SI-NEXT: s_mov_b32 s74, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s62
+; SI-NEXT: s_mov_b32 s78, s63
+; SI-NEXT: s_mov_b32 s75, s90
+; SI-NEXT: s_mov_b32 s90, s64
+; SI-NEXT: s_mov_b32 s73, s93
+; SI-NEXT: s_mov_b32 s93, s65
+; SI-NEXT: s_mov_b32 s13, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s66
+; SI-NEXT: s_mov_b32 s15, s67
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s67, s15
+; SI-NEXT: s_mov_b32 s66, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s65, s93
+; SI-NEXT: s_mov_b32 s93, s73
+; SI-NEXT: s_mov_b32 s64, s90
+; SI-NEXT: s_mov_b32 s90, s75
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s62, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s74
+; SI-NEXT: s_mov_b32 s74, s76
+; SI-NEXT: s_mov_b32 s76, s77
+; SI-NEXT: s_mov_b32 s77, s79
+; SI-NEXT: s_mov_b32 s79, s88
+; SI-NEXT: s_mov_b32 s88, s89
+; SI-NEXT: s_mov_b32 s89, s91
+; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_mov_b32 s94, s95
+; SI-NEXT: s_mov_b32 s95, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: v_readlane_b32 s11, v27, 5
+; SI-NEXT: v_readlane_b32 s13, v27, 4
+; SI-NEXT: v_readlane_b32 s15, v27, 3
+; SI-NEXT: v_readlane_b32 s73, v27, 2
+; SI-NEXT: v_readlane_b32 s75, v27, 1
+; SI-NEXT: v_readlane_b32 s78, v27, 0
; SI-NEXT: .LBB15_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -6554,42 +6617,42 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
@@ -6621,69 +6684,69 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_add_i32 s4, s63, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s93, s93, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s93, 0xffff
+; SI-NEXT: s_add_i32 s4, s93, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_add_i32 s4, s90, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s78, s78, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s78, 0xffff
+; SI-NEXT: s_add_i32 s4, s78, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s73, 0xffff
+; SI-NEXT: s_add_i32 s4, s73, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s72, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: .LBB15_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v26, 24
+; SI-NEXT: v_readlane_b32 s30, v26, 18
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -6710,13 +6773,7 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v23, s59
; SI-NEXT: v_mov_b32_e32 v24, s60
; SI-NEXT: v_mov_b32_e32 v25, s61
-; SI-NEXT: v_readlane_b32 s31, v26, 25
-; SI-NEXT: v_readlane_b32 s81, v26, 23
-; SI-NEXT: v_readlane_b32 s80, v26, 22
-; SI-NEXT: v_readlane_b32 s71, v26, 21
-; SI-NEXT: v_readlane_b32 s70, v26, 20
-; SI-NEXT: v_readlane_b32 s69, v26, 19
-; SI-NEXT: v_readlane_b32 s68, v26, 18
+; SI-NEXT: v_readlane_b32 s31, v26, 19
; SI-NEXT: v_readlane_b32 s67, v26, 17
; SI-NEXT: v_readlane_b32 s66, v26, 16
; SI-NEXT: v_readlane_b32 s65, v26, 15
@@ -6737,6 +6794,8 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -6787,23 +6846,23 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s90, v3
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; VI-NEXT: v_readfirstlane_b32 s34, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s35, v0
; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b32 s79, s28, 16
; VI-NEXT: s_lshr_b32 s89, s27, 16
; VI-NEXT: s_lshr_b32 s91, s26, 16
-; VI-NEXT: s_lshr_b32 s30, s25, 16
-; VI-NEXT: s_lshr_b32 s35, s24, 16
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s6, s7, 16
+; VI-NEXT: s_lshr_b32 s71, s25, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s82, s22, 16
+; VI-NEXT: s_lshr_b32 s84, s21, 16
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s68, s18, 16
+; VI-NEXT: s_lshr_b32 s69, s17, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
; VI-NEXT: s_lshr_b32 s12, s13, 16
@@ -6813,41 +6872,42 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s77, s78, 16
; VI-NEXT: s_lshr_b32 s88, s90, 16
; VI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s31, s34, 16
-; VI-NEXT: s_lshr_b32 s68, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s80, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s68, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
+; VI-NEXT: s_lshl_b32 s41, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
; VI-NEXT: s_lshl_b32 s5, s91, 16
@@ -6861,11 +6921,11 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s35
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -6895,11 +6955,12 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB15_3: ; %Flow
@@ -6910,52 +6971,52 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s83, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
@@ -6977,15 +7038,15 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
@@ -7035,7 +7096,7 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
@@ -8291,10 +8352,8 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
-; SI-NEXT: v_writelane_b32 v26, s37, 3
-; SI-NEXT: v_writelane_b32 v26, s38, 4
-; SI-NEXT: v_writelane_b32 v26, s30, 5
-; SI-NEXT: v_writelane_b32 v26, s31, 6
+; SI-NEXT: v_writelane_b32 v26, s30, 3
+; SI-NEXT: v_writelane_b32 v26, s31, 4
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -8311,21 +8370,23 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s14, v0
; SI-NEXT: s_cbranch_scc0 .LBB17_2
; SI-NEXT: ; %bb.1: ; %cmp.false
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: s_mov_b32 s41, s42
+; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b32 s92, s5, 16
; SI-NEXT: s_lshr_b32 s93, s7, 16
; SI-NEXT: s_lshr_b32 s94, s9, 16
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s34, s23, 16
+; SI-NEXT: s_lshr_b32 s35, s19, 16
+; SI-NEXT: s_lshr_b32 s36, s17, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
@@ -8342,19 +8403,19 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: .LBB17_2:
; SI-NEXT: s_mov_b64 s[90:91], -1
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr56
@@ -8369,10 +8430,14 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: .LBB17_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s45, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s45, 1
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -8395,10 +8460,6 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
@@ -8412,13 +8473,13 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: s_lshr_b32 s95, s11, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
+; SI-NEXT: s_lshr_b32 s41, s29, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s34, s23, 16
+; SI-NEXT: s_lshr_b32 s43, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s19, 16
+; SI-NEXT: s_lshr_b32 s36, s17, 16
; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
@@ -8426,85 +8487,85 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: .LBB17_5: ; %end
-; SI-NEXT: s_lshl_b32 s41, s88, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s41
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s38, 16
-; SI-NEXT: s_or_b32 s17, s17, s41
-; SI-NEXT: s_lshl_b32 s41, s78, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s41
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s41
-; SI-NEXT: s_lshl_b32 s41, s76, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s41
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s36, 16
-; SI-NEXT: s_or_b32 s21, s21, s41
-; SI-NEXT: s_lshl_b32 s41, s74, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s41
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s35, 16
-; SI-NEXT: s_or_b32 s23, s23, s41
-; SI-NEXT: s_lshl_b32 s41, s72, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s41
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s34, 16
-; SI-NEXT: s_or_b32 s25, s25, s41
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s62, 16
-; SI-NEXT: s_or_b32 s26, s26, s41
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s31, 16
-; SI-NEXT: s_or_b32 s27, s27, s41
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s60, 16
-; SI-NEXT: s_or_b32 s28, s28, s41
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
+; SI-NEXT: s_lshl_b32 s41, s41, 16
; SI-NEXT: s_or_b32 s29, s29, s41
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s41, s58, 16
; SI-NEXT: s_or_b32 s14, s14, s41
; SI-NEXT: s_and_b32 s15, s15, 0xffff
; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s43, 16
; SI-NEXT: s_or_b32 s15, s15, s41
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s41, s56, 16
+; SI-NEXT: s_or_b32 s21, s21, s43
+; SI-NEXT: s_lshl_b32 s43, s74, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
; SI-NEXT: s_or_b32 s12, s12, s41
; SI-NEXT: s_and_b32 s13, s13, 0xffff
; SI-NEXT: s_lshl_b32 s41, vcc_lo, 16
+; SI-NEXT: s_or_b32 s22, s22, s43
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s34, 16
; SI-NEXT: s_or_b32 s13, s13, s41
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s41, s46, 16
+; SI-NEXT: s_lshl_b32 s45, s88, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s43
+; SI-NEXT: s_lshl_b32 s43, s72, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
; SI-NEXT: s_or_b32 s10, s10, s41
; SI-NEXT: s_and_b32 s11, s11, 0xffff
; SI-NEXT: s_lshl_b32 s41, s95, 16
+; SI-NEXT: s_or_b32 s16, s16, s45
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s24, s24, s43
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s31, 16
; SI-NEXT: s_or_b32 s11, s11, s41
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s41, s44, 16
+; SI-NEXT: s_or_b32 s17, s17, s45
+; SI-NEXT: s_lshl_b32 s45, s78, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s62, 16
; SI-NEXT: s_or_b32 s8, s8, s41
; SI-NEXT: s_and_b32 s9, s9, 0xffff
; SI-NEXT: s_lshl_b32 s41, s94, 16
+; SI-NEXT: s_or_b32 s18, s18, s45
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s41
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s41, s42, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_or_b32 s19, s19, s45
+; SI-NEXT: s_lshl_b32 s45, s76, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s60, 16
; SI-NEXT: s_or_b32 s6, s6, s41
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s41, s93, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s40, s92, 16
+; SI-NEXT: s_or_b32 s20, s20, s45
+; SI-NEXT: s_or_b32 s28, s28, s43
; SI-NEXT: s_or_b32 s7, s7, s41
; SI-NEXT: s_or_b32 s5, s5, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 5
+; SI-NEXT: v_readlane_b32 s30, v26, 3
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -8531,9 +8592,7 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: v_readlane_b32 s31, v26, 6
-; SI-NEXT: v_readlane_b32 s38, v26, 4
-; SI-NEXT: v_readlane_b32 s37, v26, 3
+; SI-NEXT: v_readlane_b32 s31, v26, 4
; SI-NEXT: v_readlane_b32 s36, v26, 2
; SI-NEXT: v_readlane_b32 s35, v26, 1
; SI-NEXT: v_readlane_b32 s34, v26, 0
@@ -10590,17 +10649,17 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s93, s28, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s31, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
+; SI-NEXT: s_lshr_b32 s35, s21, 16
; SI-NEXT: s_lshr_b32 s69, s20, 16
; SI-NEXT: s_lshr_b32 s70, s19, 16
; SI-NEXT: s_lshr_b32 s71, s18, 16
; SI-NEXT: s_lshr_b32 s80, s17, 16
; SI-NEXT: s_lshr_b32 s81, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s68, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -10612,40 +10671,41 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s89, s88, 16
; SI-NEXT: s_lshr_b32 s92, s91, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v12
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s45, s5, s4
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s46, s4, s5
@@ -10692,11 +10752,12 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB19_3: ; %Flow
@@ -10742,7 +10803,7 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s35
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
@@ -10751,11 +10812,11 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s34
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_cvt_f32_f16_e32 v7, s22
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
@@ -10766,7 +10827,7 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v9, s23
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s30
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
@@ -10775,7 +10836,7 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_or_b32_e32 v7, v9, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
@@ -10899,7 +10960,7 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_or_b32_e32 v23, v25, v23
; SI-NEXT: v_cvt_f32_f16_e32 v25, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v26, s68
; SI-NEXT: v_cvt_f32_f16_e32 v27, s6
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
@@ -11026,23 +11087,23 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s89, v3
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s68, v0
; VI-NEXT: s_lshr_b32 s74, s29, 16
; VI-NEXT: s_lshr_b32 s77, s28, 16
; VI-NEXT: s_lshr_b32 s88, s27, 16
; VI-NEXT: s_lshr_b32 s90, s26, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s25, 16
-; VI-NEXT: s_lshr_b32 s34, s24, 16
-; VI-NEXT: s_lshr_b32 s68, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s35, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -11051,64 +11112,65 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s81, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s41, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s80, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s50, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s51, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s52, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s53, s4, s5
@@ -11134,11 +11196,12 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB19_3
; VI-NEXT: .LBB19_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -11148,39 +11211,39 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v25, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s85
-; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v0, s84
+; VI-NEXT: v_mov_b32_e32 v2, s83
; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v25
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v25
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s83
+; VI-NEXT: v_mov_b32_e32 v2, s82
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v25
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s82
+; VI-NEXT: v_mov_b32_e32 v3, s81
; VI-NEXT: v_add_f16_sdwa v3, v3, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v25
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s81
+; VI-NEXT: v_mov_b32_e32 v4, s80
; VI-NEXT: v_add_f16_sdwa v4, v4, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v25
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s80
+; VI-NEXT: v_mov_b32_e32 v5, s71
; VI-NEXT: v_add_f16_sdwa v5, v5, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v25
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s71
+; VI-NEXT: v_mov_b32_e32 v6, s70
; VI-NEXT: v_add_f16_sdwa v6, v6, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v25
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s68
+; VI-NEXT: v_mov_b32_e32 v7, s35
; VI-NEXT: v_add_f16_sdwa v7, v7, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v25
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s34
+; VI-NEXT: v_mov_b32_e32 v8, s31
; VI-NEXT: v_add_f16_sdwa v8, v8, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v25
; VI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -11204,15 +11267,15 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v25
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s70
+; VI-NEXT: v_mov_b32_e32 v14, s69
; VI-NEXT: v_add_f16_sdwa v14, v14, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s69, v25
+; VI-NEXT: v_add_f16_e32 v15, s68, v25
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s35
+; VI-NEXT: v_mov_b32_e32 v15, s34
; VI-NEXT: v_add_f16_sdwa v15, v15, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s31, v25
+; VI-NEXT: v_add_f16_e32 v16, s30, v25
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s30
+; VI-NEXT: v_mov_b32_e32 v16, s7
; VI-NEXT: v_add_f16_sdwa v16, v16, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, vcc_lo, v25
; VI-NEXT: v_or_b32_e32 v16, v17, v16
@@ -11248,7 +11311,7 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v24, v24, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v26, s8, v25
; VI-NEXT: v_or_b32_e32 v24, v26, v24
-; VI-NEXT: v_mov_b32_e32 v26, s7
+; VI-NEXT: v_mov_b32_e32 v26, s85
; VI-NEXT: v_add_f16_sdwa v26, v26, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v25, s6, v25
; VI-NEXT: v_or_b32_e32 v25, v25, v26
@@ -15050,9 +15113,8 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_writelane_b32 v45, s35, 1
; SI-NEXT: v_writelane_b32 v45, s36, 2
; SI-NEXT: v_writelane_b32 v45, s37, 3
-; SI-NEXT: v_writelane_b32 v45, s38, 4
-; SI-NEXT: v_writelane_b32 v45, s30, 5
-; SI-NEXT: v_writelane_b32 v45, s31, 6
+; SI-NEXT: v_writelane_b32 v45, s30, 4
+; SI-NEXT: v_writelane_b32 v45, s31, 5
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -15069,20 +15131,21 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s14, v0
; SI-NEXT: s_cbranch_scc0 .LBB29_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s37, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s35, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s31, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
+; SI-NEXT: s_lshr_b32 s36, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s34, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s30, s15, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s25, 16
; SI-NEXT: s_lshr_b32 s95, s23, 16
; SI-NEXT: s_lshr_b32 s94, s21, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
; SI-NEXT: s_lshr_b32 s92, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_mov_b32 s41, s42
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
@@ -15112,23 +15175,23 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB29_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s43, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s43, 1
; SI-NEXT: s_cbranch_scc1 .LBB29_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v25, s5, 1.0
@@ -15169,6 +15232,8 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23
@@ -15178,16 +15243,11 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; SI-NEXT: v_mov_b32_e32 v39, v44
; SI-NEXT: s_branch .LBB29_6
; SI-NEXT: .LBB29_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -15216,20 +15276,20 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, s92
-; SI-NEXT: v_mov_b32_e32 v43, s93
-; SI-NEXT: v_mov_b32_e32 v42, s94
-; SI-NEXT: v_mov_b32_e32 v41, s95
-; SI-NEXT: v_mov_b32_e32 v40, vcc_lo
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v43, s92
+; SI-NEXT: v_mov_b32_e32 v42, s93
+; SI-NEXT: v_mov_b32_e32 v41, s94
+; SI-NEXT: v_mov_b32_e32 v40, s95
+; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: v_mov_b32_e32 v55, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v54, s30
-; SI-NEXT: v_mov_b32_e32 v53, s31
-; SI-NEXT: v_mov_b32_e32 v52, s34
-; SI-NEXT: v_mov_b32_e32 v51, s35
-; SI-NEXT: v_mov_b32_e32 v50, s36
-; SI-NEXT: v_mov_b32_e32 v49, s37
-; SI-NEXT: v_mov_b32_e32 v48, s38
+; SI-NEXT: v_mov_b32_e32 v54, s41
+; SI-NEXT: v_mov_b32_e32 v53, s30
+; SI-NEXT: v_mov_b32_e32 v52, s31
+; SI-NEXT: v_mov_b32_e32 v51, s34
+; SI-NEXT: v_mov_b32_e32 v50, s35
+; SI-NEXT: v_mov_b32_e32 v49, s36
+; SI-NEXT: v_mov_b32_e32 v48, s37
; SI-NEXT: v_mov_b32_e32 v26, s40
; SI-NEXT: v_mov_b32_e32 v27, s42
; SI-NEXT: v_mov_b32_e32 v28, s44
@@ -15252,23 +15312,22 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT: v_or_b32_e32 v2, v2, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42
; SI-NEXT: v_or_b32_e32 v4, v4, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41
; SI-NEXT: v_or_b32_e32 v6, v6, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
-; SI-NEXT: v_or_b32_e32 v8, v8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
@@ -15289,7 +15348,9 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
; SI-NEXT: v_or_b32_e32 v10, v10, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
@@ -15314,7 +15375,7 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v24, v24, v26
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; SI-NEXT: v_readlane_b32 s30, v45, 5
+; SI-NEXT: v_readlane_b32 s30, v45, 4
; SI-NEXT: v_or_b32_e32 v1, v1, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v36
@@ -15328,8 +15389,7 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v21, v21, v28
; SI-NEXT: v_or_b32_e32 v23, v23, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_readlane_b32 s31, v45, 6
-; SI-NEXT: v_readlane_b32 s38, v45, 4
+; SI-NEXT: v_readlane_b32 s31, v45, 5
; SI-NEXT: v_readlane_b32 s37, v45, 3
; SI-NEXT: v_readlane_b32 s36, v45, 2
; SI-NEXT: v_readlane_b32 s35, v45, 1
@@ -17524,8 +17584,9 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
@@ -17544,14 +17605,8 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v26, s65, 15
; SI-NEXT: v_writelane_b32 v26, s66, 16
; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s69, 19
-; SI-NEXT: v_writelane_b32 v26, s70, 20
-; SI-NEXT: v_writelane_b32 v26, s71, 21
-; SI-NEXT: v_writelane_b32 v26, s80, 22
-; SI-NEXT: v_writelane_b32 v26, s81, 23
-; SI-NEXT: v_writelane_b32 v26, s30, 24
-; SI-NEXT: v_writelane_b32 v26, s31, 25
+; SI-NEXT: v_writelane_b32 v26, s30, 18
+; SI-NEXT: v_writelane_b32 v26, s31, 19
; SI-NEXT: v_readfirstlane_b32 s7, v11
; SI-NEXT: v_readfirstlane_b32 s9, v10
; SI-NEXT: v_readfirstlane_b32 s11, v9
@@ -17563,21 +17618,21 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s93, v2
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
-; SI-NEXT: v_readfirstlane_b32 s31, v0
+; SI-NEXT: v_readfirstlane_b32 s63, v0
; SI-NEXT: s_lshr_b32 s76, s29, 16
; SI-NEXT: s_lshr_b32 s79, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
; SI-NEXT: s_lshr_b32 s91, s26, 16
; SI-NEXT: s_lshr_b32 s94, s25, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
-; SI-NEXT: s_lshr_b32 s69, s20, 16
-; SI-NEXT: s_lshr_b32 s70, s19, 16
-; SI-NEXT: s_lshr_b32 s71, s18, 16
-; SI-NEXT: s_lshr_b32 s80, s17, 16
-; SI-NEXT: s_lshr_b32 s81, s16, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 s31, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s20, 16
+; SI-NEXT: s_lshr_b32 s64, s19, 16
+; SI-NEXT: s_lshr_b32 s65, s18, 16
+; SI-NEXT: s_lshr_b32 s66, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -17589,34 +17644,34 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s88, s90, 16
; SI-NEXT: s_lshr_b32 s92, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s62, s63, 16
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB31_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -17636,8 +17691,8 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_and_b32 s4, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
@@ -17675,8 +17730,78 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB31_3
; SI-NEXT: .LBB31_2:
+; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v27, s78, 0
+; SI-NEXT: v_writelane_b32 v27, s75, 1
+; SI-NEXT: v_writelane_b32 v27, s73, 2
+; SI-NEXT: v_writelane_b32 v27, s15, 3
+; SI-NEXT: v_writelane_b32 v27, s13, 4
+; SI-NEXT: v_writelane_b32 v27, s11, 5
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s95
+; SI-NEXT: s_mov_b32 s95, s94
+; SI-NEXT: s_mov_b32 s94, s92
+; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_mov_b32 s91, s89
+; SI-NEXT: s_mov_b32 s89, s88
+; SI-NEXT: s_mov_b32 s88, s79
+; SI-NEXT: s_mov_b32 s79, s77
+; SI-NEXT: s_mov_b32 s77, s76
+; SI-NEXT: s_mov_b32 s76, s74
+; SI-NEXT: s_mov_b32 s74, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s62
+; SI-NEXT: s_mov_b32 s78, s63
+; SI-NEXT: s_mov_b32 s75, s90
+; SI-NEXT: s_mov_b32 s90, s64
+; SI-NEXT: s_mov_b32 s73, s93
+; SI-NEXT: s_mov_b32 s93, s65
+; SI-NEXT: s_mov_b32 s13, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s66
+; SI-NEXT: s_mov_b32 s15, s67
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s67, s15
+; SI-NEXT: s_mov_b32 s66, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s65, s93
+; SI-NEXT: s_mov_b32 s93, s73
+; SI-NEXT: s_mov_b32 s64, s90
+; SI-NEXT: s_mov_b32 s90, s75
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s62, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s74
+; SI-NEXT: s_mov_b32 s74, s76
+; SI-NEXT: s_mov_b32 s76, s77
+; SI-NEXT: s_mov_b32 s77, s79
+; SI-NEXT: s_mov_b32 s79, s88
+; SI-NEXT: s_mov_b32 s88, s89
+; SI-NEXT: s_mov_b32 s89, s91
+; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_mov_b32 s94, s95
+; SI-NEXT: s_mov_b32 s95, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: v_readlane_b32 s11, v27, 5
+; SI-NEXT: v_readlane_b32 s13, v27, 4
+; SI-NEXT: v_readlane_b32 s15, v27, 3
+; SI-NEXT: v_readlane_b32 s73, v27, 2
+; SI-NEXT: v_readlane_b32 s75, v27, 1
+; SI-NEXT: v_readlane_b32 s78, v27, 0
; SI-NEXT: .LBB31_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -17685,42 +17810,42 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
@@ -17752,69 +17877,69 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_add_i32 s4, s63, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s93, s93, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s93, 0xffff
+; SI-NEXT: s_add_i32 s4, s93, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_add_i32 s4, s90, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s78, s78, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s78, 0xffff
+; SI-NEXT: s_add_i32 s4, s78, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s73, 0xffff
+; SI-NEXT: s_add_i32 s4, s73, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s72, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: .LBB31_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v26, 24
+; SI-NEXT: v_readlane_b32 s30, v26, 18
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -17841,13 +17966,7 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v23, s59
; SI-NEXT: v_mov_b32_e32 v24, s60
; SI-NEXT: v_mov_b32_e32 v25, s61
-; SI-NEXT: v_readlane_b32 s31, v26, 25
-; SI-NEXT: v_readlane_b32 s81, v26, 23
-; SI-NEXT: v_readlane_b32 s80, v26, 22
-; SI-NEXT: v_readlane_b32 s71, v26, 21
-; SI-NEXT: v_readlane_b32 s70, v26, 20
-; SI-NEXT: v_readlane_b32 s69, v26, 19
-; SI-NEXT: v_readlane_b32 s68, v26, 18
+; SI-NEXT: v_readlane_b32 s31, v26, 19
; SI-NEXT: v_readlane_b32 s67, v26, 17
; SI-NEXT: v_readlane_b32 s66, v26, 16
; SI-NEXT: v_readlane_b32 s65, v26, 15
@@ -17868,6 +17987,8 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -17918,23 +18039,23 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s90, v3
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; VI-NEXT: v_readfirstlane_b32 s34, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s35, v0
; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b32 s79, s28, 16
; VI-NEXT: s_lshr_b32 s89, s27, 16
; VI-NEXT: s_lshr_b32 s91, s26, 16
-; VI-NEXT: s_lshr_b32 s30, s25, 16
-; VI-NEXT: s_lshr_b32 s35, s24, 16
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s6, s7, 16
+; VI-NEXT: s_lshr_b32 s71, s25, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s82, s22, 16
+; VI-NEXT: s_lshr_b32 s84, s21, 16
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s68, s18, 16
+; VI-NEXT: s_lshr_b32 s69, s17, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
; VI-NEXT: s_lshr_b32 s12, s13, 16
@@ -17944,41 +18065,42 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s77, s78, 16
; VI-NEXT: s_lshr_b32 s88, s90, 16
; VI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s31, s34, 16
-; VI-NEXT: s_lshr_b32 s68, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s80, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s68, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
+; VI-NEXT: s_lshl_b32 s41, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
; VI-NEXT: s_lshl_b32 s5, s91, 16
@@ -17992,11 +18114,11 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s35
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -18026,11 +18148,12 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB31_3: ; %Flow
@@ -18041,52 +18164,52 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s83, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
@@ -18108,15 +18231,15 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
@@ -18166,7 +18289,7 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
@@ -19402,9 +19525,8 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_writelane_b32 v45, s35, 1
; SI-NEXT: v_writelane_b32 v45, s36, 2
; SI-NEXT: v_writelane_b32 v45, s37, 3
-; SI-NEXT: v_writelane_b32 v45, s38, 4
-; SI-NEXT: v_writelane_b32 v45, s30, 5
-; SI-NEXT: v_writelane_b32 v45, s31, 6
+; SI-NEXT: v_writelane_b32 v45, s30, 4
+; SI-NEXT: v_writelane_b32 v45, s31, 5
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -19421,20 +19543,21 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s14, v0
; SI-NEXT: s_cbranch_scc0 .LBB33_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s5, 16
-; SI-NEXT: s_lshr_b32 s37, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s35, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s31, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s37, s5, 16
+; SI-NEXT: s_lshr_b32 s36, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s34, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s30, s15, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s25, 16
; SI-NEXT: s_lshr_b32 s95, s23, 16
; SI-NEXT: s_lshr_b32 s94, s21, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
; SI-NEXT: s_lshr_b32 s92, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
+; SI-NEXT: s_mov_b32 s41, s42
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
@@ -19464,23 +19587,23 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB33_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s43, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s43, 1
; SI-NEXT: s_cbranch_scc1 .LBB33_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v25, s5, 1.0
@@ -19521,6 +19644,8 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23
@@ -19530,16 +19655,11 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; SI-NEXT: v_mov_b32_e32 v39, v44
; SI-NEXT: s_branch .LBB33_6
; SI-NEXT: .LBB33_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -19568,20 +19688,20 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, s92
-; SI-NEXT: v_mov_b32_e32 v43, s93
-; SI-NEXT: v_mov_b32_e32 v42, s94
-; SI-NEXT: v_mov_b32_e32 v41, s95
-; SI-NEXT: v_mov_b32_e32 v40, vcc_lo
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v43, s92
+; SI-NEXT: v_mov_b32_e32 v42, s93
+; SI-NEXT: v_mov_b32_e32 v41, s94
+; SI-NEXT: v_mov_b32_e32 v40, s95
+; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: v_mov_b32_e32 v55, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v54, s30
-; SI-NEXT: v_mov_b32_e32 v53, s31
-; SI-NEXT: v_mov_b32_e32 v52, s34
-; SI-NEXT: v_mov_b32_e32 v51, s35
-; SI-NEXT: v_mov_b32_e32 v50, s36
-; SI-NEXT: v_mov_b32_e32 v49, s37
-; SI-NEXT: v_mov_b32_e32 v48, s38
+; SI-NEXT: v_mov_b32_e32 v54, s41
+; SI-NEXT: v_mov_b32_e32 v53, s30
+; SI-NEXT: v_mov_b32_e32 v52, s31
+; SI-NEXT: v_mov_b32_e32 v51, s34
+; SI-NEXT: v_mov_b32_e32 v50, s35
+; SI-NEXT: v_mov_b32_e32 v49, s36
+; SI-NEXT: v_mov_b32_e32 v48, s37
; SI-NEXT: v_mov_b32_e32 v26, s40
; SI-NEXT: v_mov_b32_e32 v27, s42
; SI-NEXT: v_mov_b32_e32 v28, s44
@@ -19604,23 +19724,22 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT: v_or_b32_e32 v2, v2, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42
; SI-NEXT: v_or_b32_e32 v4, v4, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41
; SI-NEXT: v_or_b32_e32 v6, v6, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
-; SI-NEXT: v_or_b32_e32 v8, v8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
@@ -19641,7 +19760,9 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
; SI-NEXT: v_or_b32_e32 v10, v10, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
@@ -19666,7 +19787,7 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v24, v24, v26
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; SI-NEXT: v_readlane_b32 s30, v45, 5
+; SI-NEXT: v_readlane_b32 s30, v45, 4
; SI-NEXT: v_or_b32_e32 v1, v1, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v36
@@ -19680,8 +19801,7 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v21, v21, v28
; SI-NEXT: v_or_b32_e32 v23, v23, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_readlane_b32 s31, v45, 6
-; SI-NEXT: v_readlane_b32 s38, v45, 4
+; SI-NEXT: v_readlane_b32 s31, v45, 5
; SI-NEXT: v_readlane_b32 s37, v45, 3
; SI-NEXT: v_readlane_b32 s36, v45, 2
; SI-NEXT: v_readlane_b32 s35, v45, 1
@@ -22041,17 +22161,17 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s93, s28, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s31, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
+; SI-NEXT: s_lshr_b32 s35, s21, 16
; SI-NEXT: s_lshr_b32 s69, s20, 16
; SI-NEXT: s_lshr_b32 s70, s19, 16
; SI-NEXT: s_lshr_b32 s71, s18, 16
; SI-NEXT: s_lshr_b32 s80, s17, 16
; SI-NEXT: s_lshr_b32 s81, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s68, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -22063,40 +22183,41 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s89, s88, 16
; SI-NEXT: s_lshr_b32 s92, s91, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v12
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB35_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s45, s5, s4
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s46, s4, s5
@@ -22143,11 +22264,12 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB35_3
; SI-NEXT: .LBB35_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB35_3: ; %Flow
@@ -22193,7 +22315,7 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s35
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
@@ -22202,11 +22324,11 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s34
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_cvt_f32_f16_e32 v7, s22
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
@@ -22217,7 +22339,7 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v9, s23
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s30
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
@@ -22226,7 +22348,7 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_or_b32_e32 v7, v9, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
@@ -22350,7 +22472,7 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_or_b32_e32 v23, v25, v23
; SI-NEXT: v_cvt_f32_f16_e32 v25, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v26, s68
; SI-NEXT: v_cvt_f32_f16_e32 v27, s6
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
@@ -22477,23 +22599,23 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s89, v3
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s68, v0
; VI-NEXT: s_lshr_b32 s74, s29, 16
; VI-NEXT: s_lshr_b32 s77, s28, 16
; VI-NEXT: s_lshr_b32 s88, s27, 16
; VI-NEXT: s_lshr_b32 s90, s26, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s25, 16
-; VI-NEXT: s_lshr_b32 s34, s24, 16
-; VI-NEXT: s_lshr_b32 s68, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s35, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -22502,64 +22624,65 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s81, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s41, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s80, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s50, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s51, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s52, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s53, s4, s5
@@ -22585,11 +22708,12 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB35_3
; VI-NEXT: .LBB35_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -22599,39 +22723,39 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v25, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s85
-; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v0, s84
+; VI-NEXT: v_mov_b32_e32 v2, s83
; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v25
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v25
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s83
+; VI-NEXT: v_mov_b32_e32 v2, s82
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v25
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s82
+; VI-NEXT: v_mov_b32_e32 v3, s81
; VI-NEXT: v_add_f16_sdwa v3, v3, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v25
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s81
+; VI-NEXT: v_mov_b32_e32 v4, s80
; VI-NEXT: v_add_f16_sdwa v4, v4, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v25
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s80
+; VI-NEXT: v_mov_b32_e32 v5, s71
; VI-NEXT: v_add_f16_sdwa v5, v5, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v25
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s71
+; VI-NEXT: v_mov_b32_e32 v6, s70
; VI-NEXT: v_add_f16_sdwa v6, v6, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v25
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s68
+; VI-NEXT: v_mov_b32_e32 v7, s35
; VI-NEXT: v_add_f16_sdwa v7, v7, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v25
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s34
+; VI-NEXT: v_mov_b32_e32 v8, s31
; VI-NEXT: v_add_f16_sdwa v8, v8, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v25
; VI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -22655,15 +22779,15 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v13, v13, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v25
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s70
+; VI-NEXT: v_mov_b32_e32 v14, s69
; VI-NEXT: v_add_f16_sdwa v14, v14, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s69, v25
+; VI-NEXT: v_add_f16_e32 v15, s68, v25
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s35
+; VI-NEXT: v_mov_b32_e32 v15, s34
; VI-NEXT: v_add_f16_sdwa v15, v15, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s31, v25
+; VI-NEXT: v_add_f16_e32 v16, s30, v25
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s30
+; VI-NEXT: v_mov_b32_e32 v16, s7
; VI-NEXT: v_add_f16_sdwa v16, v16, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, vcc_lo, v25
; VI-NEXT: v_or_b32_e32 v16, v17, v16
@@ -22699,7 +22823,7 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v24, v24, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v26, s8, v25
; VI-NEXT: v_or_b32_e32 v24, v26, v24
-; VI-NEXT: v_mov_b32_e32 v26, s7
+; VI-NEXT: v_mov_b32_e32 v26, s85
; VI-NEXT: v_add_f16_sdwa v26, v26, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v25, s6, v25
; VI-NEXT: v_or_b32_e32 v25, v25, v26
@@ -25110,14 +25234,6 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v26, s34, 0
-; SI-NEXT: v_writelane_b32 v26, s35, 1
-; SI-NEXT: v_writelane_b32 v26, s36, 2
-; SI-NEXT: v_writelane_b32 v26, s37, 3
-; SI-NEXT: v_writelane_b32 v26, s38, 4
-; SI-NEXT: v_writelane_b32 v26, s30, 5
-; SI-NEXT: v_writelane_b32 v26, s31, 6
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -25132,68 +25248,91 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s15, v1
; SI-NEXT: s_cmp_lg_u32 s14, 0
; SI-NEXT: v_readfirstlane_b32 s14, v0
+; SI-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB41_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s92, s5, 16
-; SI-NEXT: s_lshr_b32 s93, s7, 16
-; SI-NEXT: s_lshr_b32 s94, s9, 16
-; SI-NEXT: s_lshr_b32 s95, s11, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s40, s15, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v26, s40, 6
+; SI-NEXT: s_lshr_b32 s40, s27, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 0
+; SI-NEXT: s_lshr_b32 s40, s25, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 1
+; SI-NEXT: s_lshr_b32 s40, s23, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 2
+; SI-NEXT: s_lshr_b32 s40, s21, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 3
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 4
+; SI-NEXT: s_lshr_b32 s40, s17, 16
+; SI-NEXT: s_lshr_b32 s75, s5, 16
+; SI-NEXT: s_lshr_b32 s74, s7, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s9, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s72, s13, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 5
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: s_mov_b64 s[90:91], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: s_mov_b64 s[90:91], -1
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
; SI-NEXT: s_cselect_b32 s41, 1, 0
; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: v_readlane_b32 s91, v26, 0
+; SI-NEXT: v_readlane_b32 s41, v26, 1
+; SI-NEXT: v_readlane_b32 s43, v26, 2
+; SI-NEXT: v_readlane_b32 s47, v26, 3
+; SI-NEXT: v_readlane_b32 s45, v26, 4
+; SI-NEXT: v_readlane_b32 s57, v26, 5
+; SI-NEXT: v_readlane_b32 s90, v26, 6
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -25222,112 +25361,116 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s92, s5, 16
-; SI-NEXT: s_lshr_b32 s93, s7, 16
-; SI-NEXT: s_lshr_b32 s94, s9, 16
-; SI-NEXT: s_lshr_b32 s95, s11, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: s_lshr_b32 s41, s17, 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s76, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s23, 16
+; SI-NEXT: s_lshr_b32 s78, s21, 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_mov_b32 s45, s40
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_mov_b32 s57, s41
+; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s75, s5, 16
+; SI-NEXT: s_lshr_b32 s74, s7, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s9, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s72, s13, 16
+; SI-NEXT: s_lshr_b32 s90, s15, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
+; SI-NEXT: s_lshr_b32 s91, s27, 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 16
+; SI-NEXT: s_mov_b32 s47, s78
+; SI-NEXT: s_mov_b32 s43, s77
+; SI-NEXT: s_mov_b32 s41, s76
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_lshl_b32 s41, s88, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s41
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s38, 16
-; SI-NEXT: s_or_b32 s17, s17, s41
-; SI-NEXT: s_lshl_b32 s41, s78, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s41
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s41
-; SI-NEXT: s_lshl_b32 s41, s76, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s41
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s36, 16
-; SI-NEXT: s_or_b32 s21, s21, s41
-; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s41
+; SI-NEXT: s_or_b32 s22, s22, s40
; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s35, 16
-; SI-NEXT: s_or_b32 s23, s23, s41
-; SI-NEXT: s_lshl_b32 s41, s72, 16
+; SI-NEXT: s_lshl_b32 s40, s43, 16
+; SI-NEXT: s_or_b32 s23, s23, s40
+; SI-NEXT: s_lshl_b32 s40, s94, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s41
+; SI-NEXT: s_or_b32 s24, s24, s40
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s34, 16
-; SI-NEXT: s_or_b32 s25, s25, s41
+; SI-NEXT: s_lshl_b32 s40, s41, 16
+; SI-NEXT: s_or_b32 s25, s25, s40
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s62, 16
-; SI-NEXT: s_or_b32 s26, s26, s41
+; SI-NEXT: s_lshl_b32 s40, s92, 16
+; SI-NEXT: s_or_b32 s26, s26, s40
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s31, 16
-; SI-NEXT: s_or_b32 s27, s27, s41
+; SI-NEXT: s_lshl_b32 s40, s91, 16
+; SI-NEXT: s_or_b32 s27, s27, s40
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s60, 16
-; SI-NEXT: s_or_b32 s28, s28, s41
+; SI-NEXT: s_lshl_b32 s40, s62, 16
+; SI-NEXT: s_or_b32 s28, s28, s40
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
-; SI-NEXT: s_or_b32 s29, s29, s41
+; SI-NEXT: s_lshl_b32 s40, vcc_hi, 16
+; SI-NEXT: s_or_b32 s29, s29, s40
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s58, 16
-; SI-NEXT: s_or_b32 s14, s14, s41
+; SI-NEXT: s_lshl_b32 s40, s60, 16
+; SI-NEXT: s_or_b32 s14, s14, s40
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
-; SI-NEXT: s_or_b32 s15, s15, s41
+; SI-NEXT: s_lshl_b32 s40, s90, 16
+; SI-NEXT: s_or_b32 s15, s15, s40
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s56, 16
-; SI-NEXT: s_or_b32 s12, s12, s41
+; SI-NEXT: s_lshl_b32 s40, s58, 16
+; SI-NEXT: s_or_b32 s12, s12, s40
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s41, vcc_lo, 16
-; SI-NEXT: s_or_b32 s13, s13, s41
+; SI-NEXT: s_lshl_b32 s40, s72, 16
+; SI-NEXT: s_or_b32 s13, s13, s40
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s46, 16
-; SI-NEXT: s_or_b32 s10, s10, s41
+; SI-NEXT: s_lshl_b32 s40, s56, 16
+; SI-NEXT: s_or_b32 s10, s10, s40
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s95, 16
-; SI-NEXT: s_or_b32 s11, s11, s41
+; SI-NEXT: s_lshl_b32 s40, s73, 16
+; SI-NEXT: s_or_b32 s11, s11, s40
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s44, 16
-; SI-NEXT: s_or_b32 s8, s8, s41
+; SI-NEXT: s_lshl_b32 s40, s46, 16
+; SI-NEXT: s_or_b32 s8, s8, s40
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s94, 16
-; SI-NEXT: s_or_b32 s9, s9, s41
+; SI-NEXT: s_lshl_b32 s40, vcc_lo, 16
+; SI-NEXT: s_or_b32 s9, s9, s40
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s42, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_or_b32 s6, s6, s41
+; SI-NEXT: s_lshl_b32 s40, s44, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: s_or_b32 s6, s6, s40
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s93, 16
+; SI-NEXT: s_lshl_b32 s40, s74, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_or_b32 s19, s19, s45
+; SI-NEXT: s_lshl_b32 s45, s76, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s40
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s42, 16
+; SI-NEXT: s_lshl_b32 s59, s88, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s57
+; SI-NEXT: s_lshl_b32 s57, s78, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s20, s20, s45
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s47, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s92, 16
-; SI-NEXT: s_or_b32 s7, s7, s41
+; SI-NEXT: s_lshl_b32 s40, s75, 16
+; SI-NEXT: s_or_b32 s16, s16, s59
+; SI-NEXT: s_or_b32 s18, s18, s57
+; SI-NEXT: s_or_b32 s21, s21, s45
; SI-NEXT: s_or_b32 s5, s5, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 5
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -25354,13 +25497,8 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: v_readlane_b32 s31, v26, 6
-; SI-NEXT: v_readlane_b32 s38, v26, 4
-; SI-NEXT: v_readlane_b32 s37, v26, 3
-; SI-NEXT: v_readlane_b32 s36, v26, 2
-; SI-NEXT: v_readlane_b32 s35, v26, 1
-; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -27248,8 +27386,9 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
@@ -27268,14 +27407,8 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v26, s65, 15
; SI-NEXT: v_writelane_b32 v26, s66, 16
; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s69, 19
-; SI-NEXT: v_writelane_b32 v26, s70, 20
-; SI-NEXT: v_writelane_b32 v26, s71, 21
-; SI-NEXT: v_writelane_b32 v26, s80, 22
-; SI-NEXT: v_writelane_b32 v26, s81, 23
-; SI-NEXT: v_writelane_b32 v26, s30, 24
-; SI-NEXT: v_writelane_b32 v26, s31, 25
+; SI-NEXT: v_writelane_b32 v26, s30, 18
+; SI-NEXT: v_writelane_b32 v26, s31, 19
; SI-NEXT: v_readfirstlane_b32 s7, v11
; SI-NEXT: v_readfirstlane_b32 s9, v10
; SI-NEXT: v_readfirstlane_b32 s11, v9
@@ -27287,21 +27420,21 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s93, v2
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
-; SI-NEXT: v_readfirstlane_b32 s31, v0
+; SI-NEXT: v_readfirstlane_b32 s63, v0
; SI-NEXT: s_lshr_b32 s76, s29, 16
; SI-NEXT: s_lshr_b32 s79, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
; SI-NEXT: s_lshr_b32 s91, s26, 16
; SI-NEXT: s_lshr_b32 s94, s25, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
-; SI-NEXT: s_lshr_b32 s69, s20, 16
-; SI-NEXT: s_lshr_b32 s70, s19, 16
-; SI-NEXT: s_lshr_b32 s71, s18, 16
-; SI-NEXT: s_lshr_b32 s80, s17, 16
-; SI-NEXT: s_lshr_b32 s81, s16, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 s31, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s20, 16
+; SI-NEXT: s_lshr_b32 s64, s19, 16
+; SI-NEXT: s_lshr_b32 s65, s18, 16
+; SI-NEXT: s_lshr_b32 s66, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -27313,34 +27446,34 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s88, s90, 16
; SI-NEXT: s_lshr_b32 s92, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s62, s63, 16
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -27360,8 +27493,8 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_and_b32 s4, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
@@ -27399,8 +27532,78 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
+; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v27, s78, 0
+; SI-NEXT: v_writelane_b32 v27, s75, 1
+; SI-NEXT: v_writelane_b32 v27, s73, 2
+; SI-NEXT: v_writelane_b32 v27, s15, 3
+; SI-NEXT: v_writelane_b32 v27, s13, 4
+; SI-NEXT: v_writelane_b32 v27, s11, 5
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s95
+; SI-NEXT: s_mov_b32 s95, s94
+; SI-NEXT: s_mov_b32 s94, s92
+; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_mov_b32 s91, s89
+; SI-NEXT: s_mov_b32 s89, s88
+; SI-NEXT: s_mov_b32 s88, s79
+; SI-NEXT: s_mov_b32 s79, s77
+; SI-NEXT: s_mov_b32 s77, s76
+; SI-NEXT: s_mov_b32 s76, s74
+; SI-NEXT: s_mov_b32 s74, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s62
+; SI-NEXT: s_mov_b32 s78, s63
+; SI-NEXT: s_mov_b32 s75, s90
+; SI-NEXT: s_mov_b32 s90, s64
+; SI-NEXT: s_mov_b32 s73, s93
+; SI-NEXT: s_mov_b32 s93, s65
+; SI-NEXT: s_mov_b32 s13, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s66
+; SI-NEXT: s_mov_b32 s15, s67
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s67, s15
+; SI-NEXT: s_mov_b32 s66, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s65, s93
+; SI-NEXT: s_mov_b32 s93, s73
+; SI-NEXT: s_mov_b32 s64, s90
+; SI-NEXT: s_mov_b32 s90, s75
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s62, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s74
+; SI-NEXT: s_mov_b32 s74, s76
+; SI-NEXT: s_mov_b32 s76, s77
+; SI-NEXT: s_mov_b32 s77, s79
+; SI-NEXT: s_mov_b32 s79, s88
+; SI-NEXT: s_mov_b32 s88, s89
+; SI-NEXT: s_mov_b32 s89, s91
+; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_mov_b32 s94, s95
+; SI-NEXT: s_mov_b32 s95, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: v_readlane_b32 s11, v27, 5
+; SI-NEXT: v_readlane_b32 s13, v27, 4
+; SI-NEXT: v_readlane_b32 s15, v27, 3
+; SI-NEXT: v_readlane_b32 s73, v27, 2
+; SI-NEXT: v_readlane_b32 s75, v27, 1
+; SI-NEXT: v_readlane_b32 s78, v27, 0
; SI-NEXT: .LBB43_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -27409,42 +27612,42 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
@@ -27476,69 +27679,69 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_add_i32 s4, s63, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s93, s93, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s93, 0xffff
+; SI-NEXT: s_add_i32 s4, s93, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_add_i32 s4, s90, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s78, s78, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s78, 0xffff
+; SI-NEXT: s_add_i32 s4, s78, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s73, 0xffff
+; SI-NEXT: s_add_i32 s4, s73, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s72, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: .LBB43_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v26, 24
+; SI-NEXT: v_readlane_b32 s30, v26, 18
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -27565,13 +27768,7 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v23, s59
; SI-NEXT: v_mov_b32_e32 v24, s60
; SI-NEXT: v_mov_b32_e32 v25, s61
-; SI-NEXT: v_readlane_b32 s31, v26, 25
-; SI-NEXT: v_readlane_b32 s81, v26, 23
-; SI-NEXT: v_readlane_b32 s80, v26, 22
-; SI-NEXT: v_readlane_b32 s71, v26, 21
-; SI-NEXT: v_readlane_b32 s70, v26, 20
-; SI-NEXT: v_readlane_b32 s69, v26, 19
-; SI-NEXT: v_readlane_b32 s68, v26, 18
+; SI-NEXT: v_readlane_b32 s31, v26, 19
; SI-NEXT: v_readlane_b32 s67, v26, 17
; SI-NEXT: v_readlane_b32 s66, v26, 16
; SI-NEXT: v_readlane_b32 s65, v26, 15
@@ -27592,6 +27789,8 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -27642,23 +27841,23 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s90, v3
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; VI-NEXT: v_readfirstlane_b32 s34, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s35, v0
; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b32 s79, s28, 16
; VI-NEXT: s_lshr_b32 s89, s27, 16
; VI-NEXT: s_lshr_b32 s91, s26, 16
-; VI-NEXT: s_lshr_b32 s30, s25, 16
-; VI-NEXT: s_lshr_b32 s35, s24, 16
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s6, s7, 16
+; VI-NEXT: s_lshr_b32 s71, s25, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s82, s22, 16
+; VI-NEXT: s_lshr_b32 s84, s21, 16
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s68, s18, 16
+; VI-NEXT: s_lshr_b32 s69, s17, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
; VI-NEXT: s_lshr_b32 s12, s13, 16
@@ -27668,41 +27867,42 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s77, s78, 16
; VI-NEXT: s_lshr_b32 s88, s90, 16
; VI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s31, s34, 16
-; VI-NEXT: s_lshr_b32 s68, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s80, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s68, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
+; VI-NEXT: s_lshl_b32 s41, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
; VI-NEXT: s_lshl_b32 s5, s91, 16
@@ -27716,11 +27916,11 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s35
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -27750,11 +27950,12 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB43_3: ; %Flow
@@ -27765,52 +27966,52 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s83, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
@@ -27832,15 +28033,15 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
@@ -27890,7 +28091,7 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3
; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
@@ -29156,14 +29357,6 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v26, s34, 0
-; SI-NEXT: v_writelane_b32 v26, s35, 1
-; SI-NEXT: v_writelane_b32 v26, s36, 2
-; SI-NEXT: v_writelane_b32 v26, s37, 3
-; SI-NEXT: v_writelane_b32 v26, s38, 4
-; SI-NEXT: v_writelane_b32 v26, s30, 5
-; SI-NEXT: v_writelane_b32 v26, s31, 6
; SI-NEXT: v_readfirstlane_b32 s14, v12
; SI-NEXT: v_readfirstlane_b32 s5, v11
; SI-NEXT: v_readfirstlane_b32 s4, v10
@@ -29178,68 +29371,91 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s15, v1
; SI-NEXT: s_cmp_lg_u32 s14, 0
; SI-NEXT: v_readfirstlane_b32 s14, v0
+; SI-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB45_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s92, s5, 16
-; SI-NEXT: s_lshr_b32 s93, s7, 16
-; SI-NEXT: s_lshr_b32 s94, s9, 16
-; SI-NEXT: s_lshr_b32 s95, s11, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s40, s15, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v26, s40, 6
+; SI-NEXT: s_lshr_b32 s40, s27, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 0
+; SI-NEXT: s_lshr_b32 s40, s25, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 1
+; SI-NEXT: s_lshr_b32 s40, s23, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 2
+; SI-NEXT: s_lshr_b32 s40, s21, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 3
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 4
+; SI-NEXT: s_lshr_b32 s40, s17, 16
+; SI-NEXT: s_lshr_b32 s75, s5, 16
+; SI-NEXT: s_lshr_b32 s74, s7, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s9, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s72, s13, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
+; SI-NEXT: v_writelane_b32 v26, s40, 5
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: s_mov_b64 s[90:91], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: s_mov_b64 s[90:91], -1
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr95
+; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr40
+; SI-NEXT: ; kill: killed $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; kill: killed $sgpr41
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
; SI-NEXT: s_cselect_b32 s41, 1, 0
; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: v_readlane_b32 s91, v26, 0
+; SI-NEXT: v_readlane_b32 s41, v26, 1
+; SI-NEXT: v_readlane_b32 s43, v26, 2
+; SI-NEXT: v_readlane_b32 s47, v26, 3
+; SI-NEXT: v_readlane_b32 s45, v26, 4
+; SI-NEXT: v_readlane_b32 s57, v26, 5
+; SI-NEXT: v_readlane_b32 s90, v26, 6
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -29268,112 +29484,116 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s92, s5, 16
-; SI-NEXT: s_lshr_b32 s93, s7, 16
-; SI-NEXT: s_lshr_b32 s94, s9, 16
-; SI-NEXT: s_lshr_b32 s95, s11, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s13, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s15, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s35, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 16
-; SI-NEXT: s_lshr_b32 s38, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s40, s19, 16
+; SI-NEXT: s_lshr_b32 s41, s17, 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
+; SI-NEXT: s_lshr_b32 s76, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s23, 16
+; SI-NEXT: s_lshr_b32 s78, s21, 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_mov_b32 s45, s40
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_mov_b32 s57, s41
+; SI-NEXT: s_lshr_b64 s[40:41], s[22:23], 16
+; SI-NEXT: s_lshr_b32 s75, s5, 16
+; SI-NEXT: s_lshr_b32 s74, s7, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s9, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s72, s13, 16
+; SI-NEXT: s_lshr_b32 s90, s15, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
+; SI-NEXT: s_lshr_b32 s91, s27, 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 16
+; SI-NEXT: s_mov_b32 s47, s78
+; SI-NEXT: s_mov_b32 s43, s77
+; SI-NEXT: s_mov_b32 s41, s76
; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_lshl_b32 s41, s88, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s41
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s38, 16
-; SI-NEXT: s_or_b32 s17, s17, s41
-; SI-NEXT: s_lshl_b32 s41, s78, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s41
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s37, 16
-; SI-NEXT: s_or_b32 s19, s19, s41
-; SI-NEXT: s_lshl_b32 s41, s76, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s41
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s36, 16
-; SI-NEXT: s_or_b32 s21, s21, s41
-; SI-NEXT: s_lshl_b32 s41, s74, 16
+; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s41
+; SI-NEXT: s_or_b32 s22, s22, s40
; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s35, 16
-; SI-NEXT: s_or_b32 s23, s23, s41
-; SI-NEXT: s_lshl_b32 s41, s72, 16
+; SI-NEXT: s_lshl_b32 s40, s43, 16
+; SI-NEXT: s_or_b32 s23, s23, s40
+; SI-NEXT: s_lshl_b32 s40, s94, 16
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s41
+; SI-NEXT: s_or_b32 s24, s24, s40
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s34, 16
-; SI-NEXT: s_or_b32 s25, s25, s41
+; SI-NEXT: s_lshl_b32 s40, s41, 16
+; SI-NEXT: s_or_b32 s25, s25, s40
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s62, 16
-; SI-NEXT: s_or_b32 s26, s26, s41
+; SI-NEXT: s_lshl_b32 s40, s92, 16
+; SI-NEXT: s_or_b32 s26, s26, s40
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s31, 16
-; SI-NEXT: s_or_b32 s27, s27, s41
+; SI-NEXT: s_lshl_b32 s40, s91, 16
+; SI-NEXT: s_or_b32 s27, s27, s40
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s60, 16
-; SI-NEXT: s_or_b32 s28, s28, s41
+; SI-NEXT: s_lshl_b32 s40, s62, 16
+; SI-NEXT: s_or_b32 s28, s28, s40
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s30, 16
-; SI-NEXT: s_or_b32 s29, s29, s41
+; SI-NEXT: s_lshl_b32 s40, vcc_hi, 16
+; SI-NEXT: s_or_b32 s29, s29, s40
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s58, 16
-; SI-NEXT: s_or_b32 s14, s14, s41
+; SI-NEXT: s_lshl_b32 s40, s60, 16
+; SI-NEXT: s_or_b32 s14, s14, s40
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
-; SI-NEXT: s_or_b32 s15, s15, s41
+; SI-NEXT: s_lshl_b32 s40, s90, 16
+; SI-NEXT: s_or_b32 s15, s15, s40
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s56, 16
-; SI-NEXT: s_or_b32 s12, s12, s41
+; SI-NEXT: s_lshl_b32 s40, s58, 16
+; SI-NEXT: s_or_b32 s12, s12, s40
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s41, vcc_lo, 16
-; SI-NEXT: s_or_b32 s13, s13, s41
+; SI-NEXT: s_lshl_b32 s40, s72, 16
+; SI-NEXT: s_or_b32 s13, s13, s40
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s46, 16
-; SI-NEXT: s_or_b32 s10, s10, s41
+; SI-NEXT: s_lshl_b32 s40, s56, 16
+; SI-NEXT: s_or_b32 s10, s10, s40
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s95, 16
-; SI-NEXT: s_or_b32 s11, s11, s41
+; SI-NEXT: s_lshl_b32 s40, s73, 16
+; SI-NEXT: s_or_b32 s11, s11, s40
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s44, 16
-; SI-NEXT: s_or_b32 s8, s8, s41
+; SI-NEXT: s_lshl_b32 s40, s46, 16
+; SI-NEXT: s_or_b32 s8, s8, s40
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s94, 16
-; SI-NEXT: s_or_b32 s9, s9, s41
+; SI-NEXT: s_lshl_b32 s40, vcc_lo, 16
+; SI-NEXT: s_or_b32 s9, s9, s40
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s42, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s40, 16
-; SI-NEXT: s_or_b32 s6, s6, s41
+; SI-NEXT: s_lshl_b32 s40, s44, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: s_or_b32 s6, s6, s40
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s93, 16
+; SI-NEXT: s_lshl_b32 s40, s74, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_or_b32 s19, s19, s45
+; SI-NEXT: s_lshl_b32 s45, s76, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s40
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s42, 16
+; SI-NEXT: s_lshl_b32 s59, s88, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s17, s17, s57
+; SI-NEXT: s_lshl_b32 s57, s78, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s20, s20, s45
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s47, 16
; SI-NEXT: s_or_b32 s4, s4, s40
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s92, 16
-; SI-NEXT: s_or_b32 s7, s7, s41
+; SI-NEXT: s_lshl_b32 s40, s75, 16
+; SI-NEXT: s_or_b32 s16, s16, s59
+; SI-NEXT: s_or_b32 s18, s18, s57
+; SI-NEXT: s_or_b32 s21, s21, s45
; SI-NEXT: s_or_b32 s5, s5, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 5
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -29400,13 +29620,8 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v23, s7
; SI-NEXT: v_mov_b32_e32 v24, s4
; SI-NEXT: v_mov_b32_e32 v25, s5
-; SI-NEXT: v_readlane_b32 s31, v26, 6
-; SI-NEXT: v_readlane_b32 s38, v26, 4
-; SI-NEXT: v_readlane_b32 s37, v26, 3
-; SI-NEXT: v_readlane_b32 s36, v26, 2
-; SI-NEXT: v_readlane_b32 s35, v26, 1
-; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -31459,17 +31674,17 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s93, s28, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s31, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
+; SI-NEXT: s_lshr_b32 s35, s21, 16
; SI-NEXT: s_lshr_b32 s69, s20, 16
; SI-NEXT: s_lshr_b32 s70, s19, 16
; SI-NEXT: s_lshr_b32 s71, s18, 16
; SI-NEXT: s_lshr_b32 s80, s17, 16
; SI-NEXT: s_lshr_b32 s81, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s68, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -31481,40 +31696,41 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s89, s88, 16
; SI-NEXT: s_lshr_b32 s92, s91, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v12
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s45, s5, s4
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s46, s4, s5
@@ -31561,11 +31777,12 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB47_3: ; %Flow
@@ -31611,7 +31828,7 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s35
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
@@ -31620,11 +31837,11 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s34
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_cvt_f32_f16_e32 v7, s22
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
@@ -31635,7 +31852,7 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v9, s23
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s30
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
@@ -31644,7 +31861,7 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_or_b32_e32 v7, v9, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
@@ -31768,7 +31985,7 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_or_b32_e32 v23, v25, v23
; SI-NEXT: v_cvt_f32_f16_e32 v25, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v26, s68
; SI-NEXT: v_cvt_f32_f16_e32 v27, s6
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
@@ -31895,23 +32112,23 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s89, v3
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s68, v0
; VI-NEXT: s_lshr_b32 s74, s29, 16
; VI-NEXT: s_lshr_b32 s77, s28, 16
; VI-NEXT: s_lshr_b32 s88, s27, 16
; VI-NEXT: s_lshr_b32 s90, s26, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s25, 16
-; VI-NEXT: s_lshr_b32 s34, s24, 16
-; VI-NEXT: s_lshr_b32 s68, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s35, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -31920,64 +32137,65 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB47_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s81, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s41, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s80, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s50, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s51, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s52, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s53, s4, s5
@@ -32003,11 +32221,12 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB47_3
; VI-NEXT: .LBB47_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB47_3: ; %Flow
@@ -32017,39 +32236,39 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB47_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v25, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s85
-; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v0, s84
+; VI-NEXT: v_mov_b32_e32 v2, s83
; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v25
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v25
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s83
+; VI-NEXT: v_mov_b32_e32 v2, s82
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v25
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s82
+; VI-NEXT: v_mov_b32_e32 v3, s81
; VI-NEXT: v_add_f16_sdwa v3, v3, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v25
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s81
+; VI-NEXT: v_mov_b32_e32 v4, s80
; VI-NEXT: v_add_f16_sdwa v4, v4, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v25
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s80
+; VI-NEXT: v_mov_b32_e32 v5, s71
; VI-NEXT: v_add_f16_sdwa v5, v5, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v25
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s71
+; VI-NEXT: v_mov_b32_e32 v6, s70
; VI-NEXT: v_add_f16_sdwa v6, v6, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v25
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s68
+; VI-NEXT: v_mov_b32_e32 v7, s35
; VI-NEXT: v_add_f16_sdwa v7, v7, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v25
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s34
+; VI-NEXT: v_mov_b32_e32 v8, s31
; VI-NEXT: v_add_f16_sdwa v8, v8, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v25
; VI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -32073,15 +32292,15 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v25
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s70
+; VI-NEXT: v_mov_b32_e32 v14, s69
; VI-NEXT: v_add_f16_sdwa v14, v14, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s69, v25
+; VI-NEXT: v_add_f16_e32 v15, s68, v25
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s35
+; VI-NEXT: v_mov_b32_e32 v15, s34
; VI-NEXT: v_add_f16_sdwa v15, v15, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s31, v25
+; VI-NEXT: v_add_f16_e32 v16, s30, v25
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s30
+; VI-NEXT: v_mov_b32_e32 v16, s7
; VI-NEXT: v_add_f16_sdwa v16, v16, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, vcc_lo, v25
; VI-NEXT: v_or_b32_e32 v16, v17, v16
@@ -32117,7 +32336,7 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v24, v24, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v26, s8, v25
; VI-NEXT: v_or_b32_e32 v24, v26, v24
-; VI-NEXT: v_mov_b32_e32 v26, s7
+; VI-NEXT: v_mov_b32_e32 v26, s85
; VI-NEXT: v_add_f16_sdwa v26, v26, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v25, s6, v25
; VI-NEXT: v_or_b32_e32 v25, v25, v26
@@ -33324,9 +33543,8 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_writelane_b32 v45, s35, 1
; SI-NEXT: v_writelane_b32 v45, s36, 2
; SI-NEXT: v_writelane_b32 v45, s37, 3
-; SI-NEXT: v_writelane_b32 v45, s38, 4
-; SI-NEXT: v_writelane_b32 v45, s30, 5
-; SI-NEXT: v_writelane_b32 v45, s31, 6
+; SI-NEXT: v_writelane_b32 v45, s30, 4
+; SI-NEXT: v_writelane_b32 v45, s31, 5
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: v_readfirstlane_b32 s13, v11
; SI-NEXT: v_readfirstlane_b32 s12, v10
@@ -33343,20 +33561,21 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s37, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s11, 16
-; SI-NEXT: s_lshr_b32 s35, s9, 16
-; SI-NEXT: s_lshr_b32 s34, s7, 16
-; SI-NEXT: s_lshr_b32 s31, s5, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s36, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s11, 16
+; SI-NEXT: s_lshr_b32 s34, s9, 16
+; SI-NEXT: s_lshr_b32 s31, s7, 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s25, 16
; SI-NEXT: s_lshr_b32 s95, s23, 16
; SI-NEXT: s_lshr_b32 s94, s21, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
; SI-NEXT: s_lshr_b32 s92, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16
+; SI-NEXT: s_mov_b32 s41, s42
; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
@@ -33386,23 +33605,23 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s43, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s43, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
@@ -33430,6 +33649,8 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23
@@ -33439,16 +33660,11 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; SI-NEXT: v_mov_b32_e32 v39, v44
; SI-NEXT: s_branch .LBB49_6
; SI-NEXT: .LBB49_5:
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -33477,24 +33693,23 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v22, s14
; SI-NEXT: v_mov_b32_e32 v25, s13
; SI-NEXT: v_mov_b32_e32 v24, s12
-; SI-NEXT: v_mov_b32_e32 v48, s38
-; SI-NEXT: v_mov_b32_e32 v49, s37
-; SI-NEXT: v_mov_b32_e32 v50, s36
-; SI-NEXT: v_mov_b32_e32 v51, s35
-; SI-NEXT: v_mov_b32_e32 v52, s34
-; SI-NEXT: v_mov_b32_e32 v53, s31
-; SI-NEXT: v_mov_b32_e32 v54, s30
+; SI-NEXT: v_mov_b32_e32 v48, s37
+; SI-NEXT: v_mov_b32_e32 v49, s36
+; SI-NEXT: v_mov_b32_e32 v50, s35
+; SI-NEXT: v_mov_b32_e32 v51, s34
+; SI-NEXT: v_mov_b32_e32 v52, s31
+; SI-NEXT: v_mov_b32_e32 v53, s30
+; SI-NEXT: v_mov_b32_e32 v54, s41
; SI-NEXT: v_mov_b32_e32 v55, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v40, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v40, s95
; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v41, s95
+; SI-NEXT: v_mov_b32_e32 v41, s94
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v42, s94
+; SI-NEXT: v_mov_b32_e32 v42, s93
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v43, s93
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, s92
+; SI-NEXT: v_mov_b32_e32 v43, s92
; SI-NEXT: v_mov_b32_e32 v38, s88
; SI-NEXT: v_mov_b32_e32 v37, s78
; SI-NEXT: v_mov_b32_e32 v36, s76
@@ -33517,23 +33732,22 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT: v_or_b32_e32 v2, v2, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42
; SI-NEXT: v_or_b32_e32 v4, v4, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41
; SI-NEXT: v_or_b32_e32 v6, v6, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
-; SI-NEXT: v_or_b32_e32 v8, v8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
@@ -33554,7 +33768,9 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
; SI-NEXT: v_or_b32_e32 v10, v10, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
@@ -33579,7 +33795,7 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_or_b32_e32 v24, v24, v26
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; SI-NEXT: v_readlane_b32 s30, v45, 5
+; SI-NEXT: v_readlane_b32 s30, v45, 4
; SI-NEXT: v_or_b32_e32 v1, v1, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v36
@@ -33593,8 +33809,7 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a,
; SI-NEXT: v_or_b32_e32 v21, v21, v28
; SI-NEXT: v_or_b32_e32 v23, v23, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_readlane_b32 s31, v45, 6
-; SI-NEXT: v_readlane_b32 s38, v45, 4
+; SI-NEXT: v_readlane_b32 s31, v45, 5
; SI-NEXT: v_readlane_b32 s37, v45, 3
; SI-NEXT: v_readlane_b32 s36, v45, 2
; SI-NEXT: v_readlane_b32 s35, v45, 1
@@ -35737,8 +35952,9 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
@@ -35757,14 +35973,8 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_writelane_b32 v26, s65, 15
; SI-NEXT: v_writelane_b32 v26, s66, 16
; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s69, 19
-; SI-NEXT: v_writelane_b32 v26, s70, 20
-; SI-NEXT: v_writelane_b32 v26, s71, 21
-; SI-NEXT: v_writelane_b32 v26, s80, 22
-; SI-NEXT: v_writelane_b32 v26, s81, 23
-; SI-NEXT: v_writelane_b32 v26, s30, 24
-; SI-NEXT: v_writelane_b32 v26, s31, 25
+; SI-NEXT: v_writelane_b32 v26, s30, 18
+; SI-NEXT: v_writelane_b32 v26, s31, 19
; SI-NEXT: v_readfirstlane_b32 s7, v11
; SI-NEXT: v_readfirstlane_b32 s9, v10
; SI-NEXT: v_readfirstlane_b32 s11, v9
@@ -35776,21 +35986,21 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s93, v2
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v1
-; SI-NEXT: v_readfirstlane_b32 s31, v0
+; SI-NEXT: v_readfirstlane_b32 s63, v0
; SI-NEXT: s_lshr_b32 s76, s29, 16
; SI-NEXT: s_lshr_b32 s79, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
; SI-NEXT: s_lshr_b32 s91, s26, 16
; SI-NEXT: s_lshr_b32 s94, s25, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
-; SI-NEXT: s_lshr_b32 s69, s20, 16
-; SI-NEXT: s_lshr_b32 s70, s19, 16
-; SI-NEXT: s_lshr_b32 s71, s18, 16
-; SI-NEXT: s_lshr_b32 s80, s17, 16
-; SI-NEXT: s_lshr_b32 s81, s16, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 s31, s22, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_lshr_b32 s35, s20, 16
+; SI-NEXT: s_lshr_b32 s64, s19, 16
+; SI-NEXT: s_lshr_b32 s65, s18, 16
+; SI-NEXT: s_lshr_b32 s66, s17, 16
+; SI-NEXT: s_lshr_b32 s67, s16, 16
; SI-NEXT: s_lshr_b32 s6, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
@@ -35802,34 +36012,34 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s88, s90, 16
; SI-NEXT: s_lshr_b32 s92, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s30, s31, 16
+; SI-NEXT: s_lshr_b32 s62, s63, 16
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_cmp_lg_u32 s4, 0
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s36, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s37, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s38, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s39, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s40, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -35849,8 +36059,8 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_and_b32 s4, s63, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
@@ -35888,8 +36098,78 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
+; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
; SI-NEXT: s_mov_b64 s[4:5], -1
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v27, s78, 0
+; SI-NEXT: v_writelane_b32 v27, s75, 1
+; SI-NEXT: v_writelane_b32 v27, s73, 2
+; SI-NEXT: v_writelane_b32 v27, s15, 3
+; SI-NEXT: v_writelane_b32 v27, s13, 4
+; SI-NEXT: v_writelane_b32 v27, s11, 5
+; SI-NEXT: s_mov_b32 s11, s9
+; SI-NEXT: s_mov_b32 s9, s7
+; SI-NEXT: s_mov_b32 s7, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s95
+; SI-NEXT: s_mov_b32 s95, s94
+; SI-NEXT: s_mov_b32 s94, s92
+; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_mov_b32 s91, s89
+; SI-NEXT: s_mov_b32 s89, s88
+; SI-NEXT: s_mov_b32 s88, s79
+; SI-NEXT: s_mov_b32 s79, s77
+; SI-NEXT: s_mov_b32 s77, s76
+; SI-NEXT: s_mov_b32 s76, s74
+; SI-NEXT: s_mov_b32 s74, s72
+; SI-NEXT: s_mov_b32 s72, s14
+; SI-NEXT: s_mov_b32 s14, s12
+; SI-NEXT: s_mov_b32 s12, s10
+; SI-NEXT: s_mov_b32 s10, s8
+; SI-NEXT: s_mov_b32 s8, s6
+; SI-NEXT: s_mov_b32 s6, s62
+; SI-NEXT: s_mov_b32 s78, s63
+; SI-NEXT: s_mov_b32 s75, s90
+; SI-NEXT: s_mov_b32 s90, s64
+; SI-NEXT: s_mov_b32 s73, s93
+; SI-NEXT: s_mov_b32 s93, s65
+; SI-NEXT: s_mov_b32 s13, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s66
+; SI-NEXT: s_mov_b32 s15, s67
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; SI-NEXT: s_mov_b32 s67, s15
+; SI-NEXT: s_mov_b32 s66, vcc_lo
+; SI-NEXT: s_mov_b32 vcc_lo, s13
+; SI-NEXT: s_mov_b32 s65, s93
+; SI-NEXT: s_mov_b32 s93, s73
+; SI-NEXT: s_mov_b32 s64, s90
+; SI-NEXT: s_mov_b32 s90, s75
+; SI-NEXT: s_mov_b32 s63, s78
+; SI-NEXT: s_mov_b32 s62, s6
+; SI-NEXT: s_mov_b32 s6, s8
+; SI-NEXT: s_mov_b32 s8, s10
+; SI-NEXT: s_mov_b32 s10, s12
+; SI-NEXT: s_mov_b32 s12, s14
+; SI-NEXT: s_mov_b32 s14, s72
+; SI-NEXT: s_mov_b32 s72, s74
+; SI-NEXT: s_mov_b32 s74, s76
+; SI-NEXT: s_mov_b32 s76, s77
+; SI-NEXT: s_mov_b32 s77, s79
+; SI-NEXT: s_mov_b32 s79, s88
+; SI-NEXT: s_mov_b32 s88, s89
+; SI-NEXT: s_mov_b32 s89, s91
+; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_mov_b32 s92, s94
+; SI-NEXT: s_mov_b32 s94, s95
+; SI-NEXT: s_mov_b32 s95, vcc_hi
+; SI-NEXT: s_mov_b32 vcc_hi, s7
+; SI-NEXT: s_mov_b32 s7, s9
+; SI-NEXT: s_mov_b32 s9, s11
+; SI-NEXT: v_readlane_b32 s11, v27, 5
+; SI-NEXT: v_readlane_b32 s13, v27, 4
+; SI-NEXT: v_readlane_b32 s15, v27, 3
+; SI-NEXT: v_readlane_b32 s73, v27, 2
+; SI-NEXT: v_readlane_b32 s75, v27, 1
+; SI-NEXT: v_readlane_b32 s78, v27, 0
; SI-NEXT: .LBB51_3: ; %Flow
; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; SI-NEXT: s_cselect_b32 s4, 1, 0
@@ -35898,42 +36178,42 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s65, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
@@ -35965,69 +36245,69 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s76, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_add_i32 s4, s63, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s62, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
+; SI-NEXT: s_add_i32 s4, vcc_lo, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s93, s93, 3
; SI-NEXT: s_add_i32 s51, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s93, 0xffff
+; SI-NEXT: s_add_i32 s4, s93, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s90, s90, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s90, 0xffff
+; SI-NEXT: s_add_i32 s4, s90, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s88, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s78, s78, 3
; SI-NEXT: s_add_i32 s53, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s78, 0xffff
+; SI-NEXT: s_add_i32 s4, s78, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s77, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s75, s75, 3
; SI-NEXT: s_add_i32 s54, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s75, 0xffff
+; SI-NEXT: s_add_i32 s4, s75, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s74, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s73, s73, 3
; SI-NEXT: s_add_i32 s55, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s73, 0xffff
+; SI-NEXT: s_add_i32 s4, s73, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s72, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s15, s15, 3
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s15, 0xffff
+; SI-NEXT: s_add_i32 s4, s15, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s13, s13, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s13, 0xffff
+; SI-NEXT: s_add_i32 s4, s13, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s11, 0xffff
+; SI-NEXT: s_add_i32 s4, s11, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s9, s9, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s9, 0xffff
+; SI-NEXT: s_add_i32 s4, s9, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s7, 0xffff
+; SI-NEXT: s_add_i32 s4, s7, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: .LBB51_5: ; %end
-; SI-NEXT: v_readlane_b32 s30, v26, 24
+; SI-NEXT: v_readlane_b32 s30, v26, 18
; SI-NEXT: v_mov_b32_e32 v0, s36
; SI-NEXT: v_mov_b32_e32 v1, s37
; SI-NEXT: v_mov_b32_e32 v2, s38
@@ -36054,13 +36334,7 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_mov_b32_e32 v23, s59
; SI-NEXT: v_mov_b32_e32 v24, s60
; SI-NEXT: v_mov_b32_e32 v25, s61
-; SI-NEXT: v_readlane_b32 s31, v26, 25
-; SI-NEXT: v_readlane_b32 s81, v26, 23
-; SI-NEXT: v_readlane_b32 s80, v26, 22
-; SI-NEXT: v_readlane_b32 s71, v26, 21
-; SI-NEXT: v_readlane_b32 s70, v26, 20
-; SI-NEXT: v_readlane_b32 s69, v26, 19
-; SI-NEXT: v_readlane_b32 s68, v26, 18
+; SI-NEXT: v_readlane_b32 s31, v26, 19
; SI-NEXT: v_readlane_b32 s67, v26, 17
; SI-NEXT: v_readlane_b32 s66, v26, 16
; SI-NEXT: v_readlane_b32 s65, v26, 15
@@ -36081,6 +36355,8 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -36131,23 +36407,23 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s90, v3
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; VI-NEXT: v_readfirstlane_b32 s34, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s35, v0
; VI-NEXT: s_lshr_b32 s76, s29, 16
; VI-NEXT: s_lshr_b32 s79, s28, 16
; VI-NEXT: s_lshr_b32 s89, s27, 16
; VI-NEXT: s_lshr_b32 s91, s26, 16
-; VI-NEXT: s_lshr_b32 s30, s25, 16
-; VI-NEXT: s_lshr_b32 s35, s24, 16
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s6, s7, 16
+; VI-NEXT: s_lshr_b32 s71, s25, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s82, s22, 16
+; VI-NEXT: s_lshr_b32 s84, s21, 16
+; VI-NEXT: s_lshr_b32 s83, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s68, s18, 16
+; VI-NEXT: s_lshr_b32 s69, s17, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s7, 16
; VI-NEXT: s_lshr_b32 s8, s9, 16
; VI-NEXT: s_lshr_b32 s10, s11, 16
; VI-NEXT: s_lshr_b32 s12, s13, 16
@@ -36157,41 +36433,42 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_lshr_b32 s77, s78, 16
; VI-NEXT: s_lshr_b32 s88, s90, 16
; VI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s31, s34, 16
-; VI-NEXT: s_lshr_b32 s68, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s80, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB51_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s68, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
+; VI-NEXT: s_lshl_b32 s41, s69, 16
+; VI-NEXT: s_or_b32 s39, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s37, s40, s41
; VI-NEXT: s_or_b32 s40, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s41, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s42, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s43, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
; VI-NEXT: s_lshl_b32 s5, s91, 16
@@ -36205,11 +36482,11 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, 0xffff, s29
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s35
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -36239,11 +36516,12 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_lshl_b32 s5, s8, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB51_3
; VI-NEXT: .LBB51_2:
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB51_3: ; %Flow
@@ -36254,52 +36532,52 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s69, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s37, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s83, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s83, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
@@ -36321,15 +36599,15 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_and_b32 s4, s29, 0xffff
; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
@@ -36379,7 +36657,7 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a,
; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s6, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: .LBB51_5: ; %end
@@ -37576,9 +37854,8 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_writelane_b32 v45, s35, 1
; SI-NEXT: v_writelane_b32 v45, s36, 2
; SI-NEXT: v_writelane_b32 v45, s37, 3
-; SI-NEXT: v_writelane_b32 v45, s38, 4
-; SI-NEXT: v_writelane_b32 v45, s30, 5
-; SI-NEXT: v_writelane_b32 v45, s31, 6
+; SI-NEXT: v_writelane_b32 v45, s30, 4
+; SI-NEXT: v_writelane_b32 v45, s31, 5
; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: v_readfirstlane_b32 s13, v11
; SI-NEXT: v_readfirstlane_b32 s12, v10
@@ -37595,20 +37872,21 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB53_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s37, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s11, 16
-; SI-NEXT: s_lshr_b32 s35, s9, 16
-; SI-NEXT: s_lshr_b32 s34, s7, 16
-; SI-NEXT: s_lshr_b32 s31, s5, 16
-; SI-NEXT: s_lshr_b32 s30, s29, 16
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s36, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s11, 16
+; SI-NEXT: s_lshr_b32 s34, s9, 16
+; SI-NEXT: s_lshr_b32 s31, s7, 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s27, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s25, 16
; SI-NEXT: s_lshr_b32 s95, s23, 16
; SI-NEXT: s_lshr_b32 s94, s21, 16
; SI-NEXT: s_lshr_b32 s93, s19, 16
; SI-NEXT: s_lshr_b32 s92, s17, 16
-; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16
+; SI-NEXT: s_mov_b32 s41, s42
; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
@@ -37638,23 +37916,23 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: .LBB53_3: ; %Flow
; SI-NEXT: s_and_b64 s[90:91], s[90:91], exec
-; SI-NEXT: s_cselect_b32 s41, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s41, 1
+; SI-NEXT: s_cselect_b32 s43, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s43, 1
; SI-NEXT: s_cbranch_scc1 .LBB53_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0
@@ -37682,6 +37960,8 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[4:5], 16
; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v9
; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23
@@ -37691,16 +37971,11 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
+; SI-NEXT: v_mov_b32_e32 v39, v44
; SI-NEXT: s_branch .LBB53_6
; SI-NEXT: .LBB53_5:
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -37729,24 +38004,23 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_mov_b32_e32 v22, s14
; SI-NEXT: v_mov_b32_e32 v25, s13
; SI-NEXT: v_mov_b32_e32 v24, s12
-; SI-NEXT: v_mov_b32_e32 v48, s38
-; SI-NEXT: v_mov_b32_e32 v49, s37
-; SI-NEXT: v_mov_b32_e32 v50, s36
-; SI-NEXT: v_mov_b32_e32 v51, s35
-; SI-NEXT: v_mov_b32_e32 v52, s34
-; SI-NEXT: v_mov_b32_e32 v53, s31
-; SI-NEXT: v_mov_b32_e32 v54, s30
+; SI-NEXT: v_mov_b32_e32 v48, s37
+; SI-NEXT: v_mov_b32_e32 v49, s36
+; SI-NEXT: v_mov_b32_e32 v50, s35
+; SI-NEXT: v_mov_b32_e32 v51, s34
+; SI-NEXT: v_mov_b32_e32 v52, s31
+; SI-NEXT: v_mov_b32_e32 v53, s30
+; SI-NEXT: v_mov_b32_e32 v54, s41
; SI-NEXT: v_mov_b32_e32 v55, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v39, vcc_lo
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v40, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v40, s95
; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v41, s95
+; SI-NEXT: v_mov_b32_e32 v41, s94
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v42, s94
+; SI-NEXT: v_mov_b32_e32 v42, s93
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v43, s93
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v44, s92
+; SI-NEXT: v_mov_b32_e32 v43, s92
; SI-NEXT: v_mov_b32_e32 v38, s88
; SI-NEXT: v_mov_b32_e32 v37, s78
; SI-NEXT: v_mov_b32_e32 v36, s76
@@ -37769,23 +38043,22 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_or_b32_e32 v0, v0, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT: v_or_b32_e32 v2, v2, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42
; SI-NEXT: v_or_b32_e32 v4, v4, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41
; SI-NEXT: v_or_b32_e32 v6, v6, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
-; SI-NEXT: v_or_b32_e32 v8, v8, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
@@ -37806,7 +38079,9 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v8, v34
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39
; SI-NEXT: v_or_b32_e32 v10, v10, v33
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
@@ -37831,7 +38106,7 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_or_b32_e32 v24, v24, v26
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; SI-NEXT: v_readlane_b32 s30, v45, 5
+; SI-NEXT: v_readlane_b32 s30, v45, 4
; SI-NEXT: v_or_b32_e32 v1, v1, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v36
@@ -37845,8 +38120,7 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a
; SI-NEXT: v_or_b32_e32 v21, v21, v28
; SI-NEXT: v_or_b32_e32 v23, v23, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_readlane_b32 s31, v45, 6
-; SI-NEXT: v_readlane_b32 s38, v45, 4
+; SI-NEXT: v_readlane_b32 s31, v45, 5
; SI-NEXT: v_readlane_b32 s37, v45, 3
; SI-NEXT: v_readlane_b32 s36, v45, 2
; SI-NEXT: v_readlane_b32 s35, v45, 1
@@ -40154,17 +40428,17 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: s_lshr_b32 s93, s28, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
-; SI-NEXT: s_lshr_b32 s34, s23, 16
-; SI-NEXT: s_lshr_b32 s35, s22, 16
-; SI-NEXT: s_lshr_b32 s68, s21, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s24, 16
+; SI-NEXT: s_lshr_b32 s31, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s22, 16
+; SI-NEXT: s_lshr_b32 s35, s21, 16
; SI-NEXT: s_lshr_b32 s69, s20, 16
; SI-NEXT: s_lshr_b32 s70, s19, 16
; SI-NEXT: s_lshr_b32 s71, s18, 16
; SI-NEXT: s_lshr_b32 s80, s17, 16
; SI-NEXT: s_lshr_b32 s81, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s68, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -40176,40 +40450,41 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: s_lshr_b32 s89, s88, 16
; SI-NEXT: s_lshr_b32 s92, s91, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v12
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB55_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s45, s5, s4
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s46, s4, s5
@@ -40256,11 +40531,12 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB55_3
; SI-NEXT: .LBB55_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB55_3: ; %Flow
@@ -40306,7 +40582,7 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s35
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
@@ -40315,11 +40591,11 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s34
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v7, v5
; SI-NEXT: v_cvt_f32_f16_e32 v7, s22
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
@@ -40330,7 +40606,7 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v9, s23
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s30
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
@@ -40339,7 +40615,7 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_or_b32_e32 v7, v9, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v8, v10, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, s25
@@ -40463,7 +40739,7 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_or_b32_e32 v23, v25, v23
; SI-NEXT: v_cvt_f32_f16_e32 v25, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v26, s68
; SI-NEXT: v_cvt_f32_f16_e32 v27, s6
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
@@ -40590,23 +40866,23 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: v_readfirstlane_b32 s78, v4
; VI-NEXT: v_readfirstlane_b32 s89, v3
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; VI-NEXT: v_readfirstlane_b32 s31, v1
-; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v1
+; VI-NEXT: v_readfirstlane_b32 s68, v0
; VI-NEXT: s_lshr_b32 s74, s29, 16
; VI-NEXT: s_lshr_b32 s77, s28, 16
; VI-NEXT: s_lshr_b32 s88, s27, 16
; VI-NEXT: s_lshr_b32 s90, s26, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s25, 16
-; VI-NEXT: s_lshr_b32 s34, s24, 16
-; VI-NEXT: s_lshr_b32 s68, s23, 16
-; VI-NEXT: s_lshr_b32 s71, s22, 16
-; VI-NEXT: s_lshr_b32 s80, s21, 16
-; VI-NEXT: s_lshr_b32 s81, s20, 16
-; VI-NEXT: s_lshr_b32 s82, s19, 16
-; VI-NEXT: s_lshr_b32 s83, s18, 16
-; VI-NEXT: s_lshr_b32 s84, s17, 16
-; VI-NEXT: s_lshr_b32 s85, s16, 16
-; VI-NEXT: s_lshr_b32 s7, s6, 16
+; VI-NEXT: s_lshr_b32 s31, s24, 16
+; VI-NEXT: s_lshr_b32 s35, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s85, s6, 16
; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: s_lshr_b32 s11, s10, 16
; VI-NEXT: s_lshr_b32 s13, s12, 16
@@ -40615,64 +40891,65 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: s_lshr_b32 s76, s75, 16
; VI-NEXT: s_lshr_b32 s79, s78, 16
; VI-NEXT: s_lshr_b32 s91, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v12
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v12
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: s_cbranch_scc0 .LBB55_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s7, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s7, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s7, s81, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s84, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s41, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s7, s80, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s74, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_or_b32 s40, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s7, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s7, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s7, s35, 16
+; VI-NEXT: s_or_b32 s43, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s7, s31, 16
+; VI-NEXT: s_or_b32 s44, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; VI-NEXT: s_or_b32 s45, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s7, s90, 16
+; VI-NEXT: s_or_b32 s46, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s7, s88, 16
+; VI-NEXT: s_or_b32 s47, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s7, s77, 16
+; VI-NEXT: s_or_b32 s48, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s7, s74, 16
+; VI-NEXT: s_or_b32 s49, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s7, s69, 16
+; VI-NEXT: s_or_b32 s50, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s7, s34, 16
+; VI-NEXT: s_or_b32 s51, s5, s7
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s7, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s52, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s53, s4, s5
@@ -40698,11 +40975,12 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: s_lshl_b32 s5, s9, 16
; VI-NEXT: s_or_b32 s60, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s61, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB55_3
; VI-NEXT: .LBB55_2:
+; VI-NEXT: s_mov_b32 s7, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB55_3: ; %Flow
@@ -40712,39 +40990,39 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: s_cbranch_scc1 .LBB55_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v25, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s85
-; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v0, s84
+; VI-NEXT: v_mov_b32_e32 v2, s83
; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v25
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v25
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s83
+; VI-NEXT: v_mov_b32_e32 v2, s82
; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v25
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s82
+; VI-NEXT: v_mov_b32_e32 v3, s81
; VI-NEXT: v_add_f16_sdwa v3, v3, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v25
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s81
+; VI-NEXT: v_mov_b32_e32 v4, s80
; VI-NEXT: v_add_f16_sdwa v4, v4, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v25
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s80
+; VI-NEXT: v_mov_b32_e32 v5, s71
; VI-NEXT: v_add_f16_sdwa v5, v5, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v25
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s71
+; VI-NEXT: v_mov_b32_e32 v6, s70
; VI-NEXT: v_add_f16_sdwa v6, v6, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v25
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s68
+; VI-NEXT: v_mov_b32_e32 v7, s35
; VI-NEXT: v_add_f16_sdwa v7, v7, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v25
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s34
+; VI-NEXT: v_mov_b32_e32 v8, s31
; VI-NEXT: v_add_f16_sdwa v8, v8, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v25
; VI-NEXT: v_or_b32_e32 v8, v9, v8
@@ -40768,15 +41046,15 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v13, v13, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v25
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s70
+; VI-NEXT: v_mov_b32_e32 v14, s69
; VI-NEXT: v_add_f16_sdwa v14, v14, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s69, v25
+; VI-NEXT: v_add_f16_e32 v15, s68, v25
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s35
+; VI-NEXT: v_mov_b32_e32 v15, s34
; VI-NEXT: v_add_f16_sdwa v15, v15, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s31, v25
+; VI-NEXT: v_add_f16_e32 v16, s30, v25
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s30
+; VI-NEXT: v_mov_b32_e32 v16, s7
; VI-NEXT: v_add_f16_sdwa v16, v16, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, vcc_lo, v25
; VI-NEXT: v_or_b32_e32 v16, v17, v16
@@ -40812,7 +41090,7 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v24, v24, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v26, s8, v25
; VI-NEXT: v_or_b32_e32 v24, v26, v24
-; VI-NEXT: v_mov_b32_e32 v26, s7
+; VI-NEXT: v_mov_b32_e32 v26, s85
; VI-NEXT: v_add_f16_sdwa v26, v26, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v25, s6, v25
; VI-NEXT: v_or_b32_e32 v25, v25, v26
@@ -41920,16 +42198,20 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v52i16_to_v52f16:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v21
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v23
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v22
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v21
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v18
@@ -41946,27 +42228,38 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v0
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: v_mov_b32_e32 v40, v28
+; VI-NEXT: v_mov_b32_e32 v41, v29
+; VI-NEXT: v_mov_b32_e32 v42, v30
+; VI-NEXT: v_mov_b32_e32 v43, v31
+; VI-NEXT: v_mov_b32_e32 v31, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_2
; VI-NEXT: ; %bb.1: ; %cmp.true
; VI-NEXT: v_add_u16_e32 v0, 3, v0
-; VI-NEXT: v_add_u16_e32 v44, 3, v44
-; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_add_u16_e32 v43, 3, v43
-; VI-NEXT: v_add_u16_e32 v2, 3, v2
+; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_add_u16_e32 v42, 3, v42
-; VI-NEXT: v_add_u16_e32 v3, 3, v3
+; VI-NEXT: v_add_u16_e32 v2, 3, v2
; VI-NEXT: v_add_u16_e32 v41, 3, v41
-; VI-NEXT: v_add_u16_e32 v4, 3, v4
+; VI-NEXT: v_add_u16_e32 v3, 3, v3
; VI-NEXT: v_add_u16_e32 v40, 3, v40
+; VI-NEXT: v_add_u16_e32 v4, 3, v4
+; VI-NEXT: v_add_u16_e32 v31, 3, v31
; VI-NEXT: v_add_u16_e32 v5, 3, v5
; VI-NEXT: v_add_u16_e32 v55, 3, v55
; VI-NEXT: v_add_u16_e32 v6, 3, v6
@@ -42000,73 +42293,74 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v20, 3, v20
; VI-NEXT: v_add_u16_e32 v32, 3, v32
; VI-NEXT: v_add_u16_e32 v21, 3, v21
-; VI-NEXT: v_add_u16_e32 v31, 3, v31
-; VI-NEXT: v_add_u16_e32 v22, 3, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v30, 3, v30
-; VI-NEXT: v_add_u16_e32 v23, 3, v23
+; VI-NEXT: v_add_u16_e32 v22, 3, v22
; VI-NEXT: v_add_u16_e32 v29, 3, v29
-; VI-NEXT: v_add_u16_e32 v24, 3, v24
+; VI-NEXT: v_add_u16_e32 v23, 3, v23
; VI-NEXT: v_add_u16_e32 v28, 3, v28
-; VI-NEXT: v_add_u16_e32 v25, 3, v25
+; VI-NEXT: v_add_u16_e32 v24, 3, v24
; VI-NEXT: v_add_u16_e32 v27, 3, v27
+; VI-NEXT: v_add_u16_e32 v25, 3, v25
+; VI-NEXT: v_add_u16_e32 v26, 3, v26
; VI-NEXT: .LBB56_2: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v44
-; VI-NEXT: v_or_b32_sdwa v0, v0, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v43
-; VI-NEXT: v_or_b32_sdwa v1, v1, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v42
-; VI-NEXT: v_or_b32_sdwa v2, v2, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v41
-; VI-NEXT: v_or_b32_sdwa v3, v3, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v4, v4, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v55
-; VI-NEXT: v_or_b32_sdwa v5, v5, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v54
-; VI-NEXT: v_or_b32_sdwa v6, v6, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v53
-; VI-NEXT: v_or_b32_sdwa v7, v7, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v52
-; VI-NEXT: v_or_b32_sdwa v8, v8, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v51
-; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v50
-; VI-NEXT: v_or_b32_sdwa v10, v10, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v49
-; VI-NEXT: v_or_b32_sdwa v11, v11, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; VI-NEXT: v_or_b32_sdwa v12, v12, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v39
-; VI-NEXT: v_or_b32_sdwa v13, v13, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v38
-; VI-NEXT: v_or_b32_sdwa v14, v14, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v37
-; VI-NEXT: v_or_b32_sdwa v15, v15, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v36
-; VI-NEXT: v_or_b32_sdwa v16, v16, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v35
-; VI-NEXT: v_or_b32_sdwa v17, v17, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v34
-; VI-NEXT: v_or_b32_sdwa v18, v18, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v33
-; VI-NEXT: v_or_b32_sdwa v19, v19, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v32
-; VI-NEXT: v_or_b32_sdwa v20, v20, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v31
-; VI-NEXT: v_or_b32_sdwa v21, v21, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v30
-; VI-NEXT: v_or_b32_sdwa v22, v22, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v29
-; VI-NEXT: v_or_b32_sdwa v23, v23, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
-; VI-NEXT: v_or_b32_sdwa v24, v24, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; VI-NEXT: v_lshlrev_b32_e32 v41, 16, v41
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; VI-NEXT: v_or_b32_sdwa v0, v0, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v1, v1, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v2, v2, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v3, v3, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
+; VI-NEXT: v_or_b32_sdwa v5, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v54
+; VI-NEXT: v_or_b32_sdwa v6, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v53
+; VI-NEXT: v_or_b32_sdwa v7, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v52
+; VI-NEXT: v_or_b32_sdwa v8, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v51
+; VI-NEXT: v_or_b32_sdwa v9, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v50
+; VI-NEXT: v_or_b32_sdwa v10, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v49
+; VI-NEXT: v_or_b32_sdwa v11, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v48
+; VI-NEXT: v_or_b32_sdwa v12, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v39
+; VI-NEXT: v_or_b32_sdwa v13, v13, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v38
+; VI-NEXT: v_or_b32_sdwa v14, v14, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v37
+; VI-NEXT: v_or_b32_sdwa v15, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v36
+; VI-NEXT: v_or_b32_sdwa v16, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v35
+; VI-NEXT: v_or_b32_sdwa v17, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v34
+; VI-NEXT: v_or_b32_sdwa v18, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v33
+; VI-NEXT: v_or_b32_sdwa v19, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v32
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v20, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v21, v21, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v22, v22, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v23, v23, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v24, v24, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -42074,16 +42368,20 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; GFX9-LABEL: bitcast_v52i16_to_v52f16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v21
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v23
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v22
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v21
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v18
@@ -42108,15 +42406,22 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_2
; GFX9-NEXT: ; %bb.1: ; %cmp.true
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v25, v44, v25, s6
-; GFX9-NEXT: v_perm_b32 v24, v43, v24, s6
-; GFX9-NEXT: v_perm_b32 v23, v42, v23, s6
-; GFX9-NEXT: v_perm_b32 v22, v41, v22, s6
-; GFX9-NEXT: v_perm_b32 v21, v40, v21, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v43, v25, s6
+; GFX9-NEXT: v_perm_b32 v24, v42, v24, s6
+; GFX9-NEXT: v_perm_b32 v23, v41, v23, s6
+; GFX9-NEXT: v_perm_b32 v22, v40, v22, s6
+; GFX9-NEXT: v_perm_b32 v21, v26, v21, s6
; GFX9-NEXT: v_perm_b32 v20, v55, v20, s6
; GFX9-NEXT: v_perm_b32 v19, v54, v19, s6
; GFX9-NEXT: v_perm_b32 v18, v53, v18, s6
@@ -42185,24 +42490,26 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v25
; GFX9-NEXT: .LBB56_2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0x5040100
-; GFX9-NEXT: v_perm_b32 v21, v40, v21, s4
-; GFX9-NEXT: v_perm_b32 v22, v41, v22, s4
-; GFX9-NEXT: v_perm_b32 v23, v42, v23, s4
-; GFX9-NEXT: v_perm_b32 v24, v43, v24, s4
-; GFX9-NEXT: v_perm_b32 v25, v44, v25, s4
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v22, v40, v22, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v41, v23, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v42, v24, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v43, v25, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
; GFX9-NEXT: v_perm_b32 v2, v29, v2, s4
@@ -42224,6 +42531,7 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v18, v53, v18, s4
; GFX9-NEXT: v_perm_b32 v19, v54, v19, s4
; GFX9-NEXT: v_perm_b32 v20, v55, v20, s4
+; GFX9-NEXT: v_perm_b32 v21, v26, v21, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -42537,8 +42845,9 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v26, s34, 0
; SI-NEXT: v_writelane_b32 v26, s35, 1
; SI-NEXT: v_writelane_b32 v26, s36, 2
@@ -42553,194 +42862,201 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v26, s53, 11
; SI-NEXT: v_writelane_b32 v26, s54, 12
; SI-NEXT: v_writelane_b32 v26, s55, 13
-; SI-NEXT: v_writelane_b32 v26, s64, 14
-; SI-NEXT: v_writelane_b32 v26, s65, 15
-; SI-NEXT: v_writelane_b32 v26, s66, 16
-; SI-NEXT: v_writelane_b32 v26, s67, 17
-; SI-NEXT: v_writelane_b32 v26, s68, 18
-; SI-NEXT: v_writelane_b32 v26, s69, 19
-; SI-NEXT: v_writelane_b32 v26, s70, 20
-; SI-NEXT: v_writelane_b32 v26, s71, 21
-; SI-NEXT: v_writelane_b32 v26, s80, 22
-; SI-NEXT: v_writelane_b32 v26, s81, 23
-; SI-NEXT: v_writelane_b32 v26, s82, 24
-; SI-NEXT: v_writelane_b32 v26, s83, 25
-; SI-NEXT: v_writelane_b32 v26, s84, 26
-; SI-NEXT: v_writelane_b32 v26, s85, 27
-; SI-NEXT: v_writelane_b32 v26, s86, 28
-; SI-NEXT: v_writelane_b32 v26, s87, 29
-; SI-NEXT: v_writelane_b32 v26, s96, 30
-; SI-NEXT: v_writelane_b32 v26, s97, 31
-; SI-NEXT: v_writelane_b32 v26, s98, 32
-; SI-NEXT: v_writelane_b32 v26, s99, 33
-; SI-NEXT: v_writelane_b32 v26, s30, 34
-; SI-NEXT: v_writelane_b32 v26, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s85, v11
-; SI-NEXT: v_readfirstlane_b32 s99, v10
-; SI-NEXT: v_readfirstlane_b32 s81, v9
-; SI-NEXT: v_readfirstlane_b32 s83, v8
-; SI-NEXT: v_readfirstlane_b32 s70, v7
-; SI-NEXT: v_readfirstlane_b32 s80, v6
-; SI-NEXT: v_readfirstlane_b32 s98, v5
-; SI-NEXT: v_readfirstlane_b32 s69, v4
-; SI-NEXT: v_readfirstlane_b32 s87, v3
-; SI-NEXT: v_readfirstlane_b32 s97, v2
-; SI-NEXT: v_readfirstlane_b32 s84, v1
-; SI-NEXT: v_readfirstlane_b32 s86, v0
-; SI-NEXT: s_lshr_b32 s54, s29, 16
-; SI-NEXT: s_lshr_b32 s93, s28, 16
-; SI-NEXT: s_lshr_b32 s53, s27, 16
-; SI-NEXT: s_lshr_b32 s91, s26, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s89, s24, 16
-; SI-NEXT: s_lshr_b32 s51, s23, 16
-; SI-NEXT: s_lshr_b32 s79, s22, 16
-; SI-NEXT: s_lshr_b32 s50, s21, 16
-; SI-NEXT: s_lshr_b32 s77, s20, 16
-; SI-NEXT: s_lshr_b32 s49, s19, 16
-; SI-NEXT: s_lshr_b32 s75, s18, 16
-; SI-NEXT: s_lshr_b32 s48, s17, 16
-; SI-NEXT: s_lshr_b32 s73, s16, 16
-; SI-NEXT: s_lshr_b32 s68, s85, 16
-; SI-NEXT: s_lshr_b32 s96, s99, 16
-; SI-NEXT: s_lshr_b32 s67, s81, 16
-; SI-NEXT: s_lshr_b32 s82, s83, 16
-; SI-NEXT: s_lshr_b32 s66, s70, 16
-; SI-NEXT: s_lshr_b32 s71, s80, 16
-; SI-NEXT: s_lshr_b32 s65, s98, 16
-; SI-NEXT: s_lshr_b32 s31, s69, 16
-; SI-NEXT: s_lshr_b32 s64, s87, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s97, 16
-; SI-NEXT: s_lshr_b32 s55, s84, 16
-; SI-NEXT: s_lshr_b32 s95, s86, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_writelane_b32 v26, s30, 14
+; SI-NEXT: v_writelane_b32 v26, s31, 15
+; SI-NEXT: s_lshr_b32 s40, s16, 16
+; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane
+; SI-NEXT: s_lshr_b32 s14, s18, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v27, s40, 0
+; SI-NEXT: s_lshr_b32 s12, s20, 16
+; SI-NEXT: v_writelane_b32 v27, s14, 1
+; SI-NEXT: s_lshr_b32 s10, s22, 16
+; SI-NEXT: v_writelane_b32 v27, s12, 2
+; SI-NEXT: s_lshr_b32 s8, s24, 16
+; SI-NEXT: v_writelane_b32 v27, s10, 3
+; SI-NEXT: s_lshr_b32 s6, s26, 16
+; SI-NEXT: v_writelane_b32 v27, s8, 4
+; SI-NEXT: s_lshr_b32 s4, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s48, v0
+; SI-NEXT: v_writelane_b32 v27, s6, 5
+; SI-NEXT: v_readfirstlane_b32 s49, v2
+; SI-NEXT: s_lshr_b32 s46, s48, 16
+; SI-NEXT: v_writelane_b32 v27, s4, 6
+; SI-NEXT: v_readfirstlane_b32 s50, v4
+; SI-NEXT: s_lshr_b32 s45, s49, 16
+; SI-NEXT: v_writelane_b32 v27, s46, 7
+; SI-NEXT: v_readfirstlane_b32 s51, v6
+; SI-NEXT: s_lshr_b32 s44, s50, 16
+; SI-NEXT: v_writelane_b32 v27, s45, 8
+; SI-NEXT: v_readfirstlane_b32 s52, v8
+; SI-NEXT: s_lshr_b32 s42, s51, 16
+; SI-NEXT: v_writelane_b32 v27, s44, 9
+; SI-NEXT: s_lshr_b32 s15, s52, 16
+; SI-NEXT: v_writelane_b32 v27, s42, 10
+; SI-NEXT: v_readfirstlane_b32 s43, v1
+; SI-NEXT: v_writelane_b32 v27, s15, 11
+; SI-NEXT: v_readfirstlane_b32 s41, v3
+; SI-NEXT: v_writelane_b32 v27, s43, 12
+; SI-NEXT: v_readfirstlane_b32 s13, v5
+; SI-NEXT: v_writelane_b32 v27, s41, 13
+; SI-NEXT: v_readfirstlane_b32 s11, v7
+; SI-NEXT: v_writelane_b32 v27, s13, 14
+; SI-NEXT: v_readfirstlane_b32 s7, v11
+; SI-NEXT: v_readfirstlane_b32 s53, v10
+; SI-NEXT: v_readfirstlane_b32 s9, v9
+; SI-NEXT: v_writelane_b32 v27, s11, 15
+; SI-NEXT: s_lshr_b32 s91, s29, 16
+; SI-NEXT: s_lshr_b32 s89, s27, 16
+; SI-NEXT: s_lshr_b32 s79, s25, 16
+; SI-NEXT: s_lshr_b32 s77, s23, 16
+; SI-NEXT: s_lshr_b32 s75, s21, 16
+; SI-NEXT: s_lshr_b32 s73, s19, 16
+; SI-NEXT: s_lshr_b32 s63, s17, 16
+; SI-NEXT: s_lshr_b32 s37, s7, 16
+; SI-NEXT: s_lshr_b32 s5, s53, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s31, s11, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s13, 16
+; SI-NEXT: s_lshr_b32 s95, s41, 16
+; SI-NEXT: s_lshr_b32 s93, s43, 16
+; SI-NEXT: v_readfirstlane_b32 s47, v12
+; SI-NEXT: v_writelane_b32 v27, s9, 16
+; SI-NEXT: s_cmp_lg_u32 s47, 0
+; SI-NEXT: v_writelane_b32 v27, s7, 17
+; SI-NEXT: v_writelane_b32 v27, s5, 18
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s48, 16
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s49, 16
-; SI-NEXT: s_lshl_b32 s62, s73, 16
-; SI-NEXT: s_mov_b32 s9, s73
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s50, 16
-; SI-NEXT: s_lshl_b32 s72, s75, 16
-; SI-NEXT: s_mov_b32 s11, s75
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s51, 16
-; SI-NEXT: s_lshl_b32 s74, s77, 16
-; SI-NEXT: s_mov_b32 s90, s77
-; SI-NEXT: s_or_b32 s77, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s52, 16
-; SI-NEXT: s_lshl_b32 s76, s79, 16
-; SI-NEXT: s_lshl_b32 s88, s91, 16
-; SI-NEXT: s_lshl_b32 s60, s93, 16
-; SI-NEXT: s_mov_b32 s94, s93
-; SI-NEXT: s_mov_b32 s93, s91
-; SI-NEXT: s_mov_b32 s91, s79
-; SI-NEXT: s_or_b32 s79, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s53, 16
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s78, s89, 16
-; SI-NEXT: s_mov_b32 s92, s89
-; SI-NEXT: s_or_b32 s89, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s54, 16
-; SI-NEXT: s_or_b32 s40, s4, s62
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s55, 16
-; SI-NEXT: s_or_b32 s14, s4, s72
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s64, 16
-; SI-NEXT: s_or_b32 s12, s4, s74
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s65, 16
-; SI-NEXT: s_or_b32 s10, s4, s76
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_or_b32 s47, s5, s7
-; SI-NEXT: s_and_b32 s5, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s66, 16
-; SI-NEXT: s_or_b32 s8, s4, s78
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_or_b32 s45, s5, s7
-; SI-NEXT: s_and_b32 s5, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s67, 16
+; SI-NEXT: s_and_b32 s47, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s62, s40, 16
+; SI-NEXT: s_or_b32 s40, s47, s62
+; SI-NEXT: s_and_b32 s47, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s72, s14, 16
+; SI-NEXT: s_or_b32 s14, s47, s72
+; SI-NEXT: s_and_b32 s47, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s74, s12, 16
+; SI-NEXT: s_or_b32 s12, s47, s74
+; SI-NEXT: s_and_b32 s47, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s76, s10, 16
+; SI-NEXT: s_or_b32 s10, s47, s76
+; SI-NEXT: s_and_b32 s47, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s78, s8, 16
+; SI-NEXT: s_or_b32 s8, s47, s78
+; SI-NEXT: s_and_b32 s47, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s88, s6, 16
+; SI-NEXT: s_or_b32 s6, s47, s88
+; SI-NEXT: s_and_b32 s47, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s60, s4, 16
+; SI-NEXT: s_or_b32 s4, s47, s60
+; SI-NEXT: s_lshl_b32 s56, s45, 16
+; SI-NEXT: s_and_b32 s45, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s63, 16
+; SI-NEXT: s_lshl_b32 s58, s46, 16
+; SI-NEXT: s_lshl_b32 s46, s44, 16
+; SI-NEXT: s_lshl_b32 s44, s42, 16
+; SI-NEXT: s_lshl_b32 s42, s15, 16
+; SI-NEXT: s_mov_b32 s15, s63
+; SI-NEXT: s_or_b32 s63, s45, s47
+; SI-NEXT: s_and_b32 s45, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s73, 16
+; SI-NEXT: s_mov_b32 s90, s73
+; SI-NEXT: s_or_b32 s73, s45, s47
+; SI-NEXT: s_and_b32 s45, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s75, 16
+; SI-NEXT: s_mov_b32 s92, s75
+; SI-NEXT: s_or_b32 s75, s45, s47
+; SI-NEXT: s_and_b32 s45, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s77, 16
+; SI-NEXT: s_mov_b32 s94, s77
+; SI-NEXT: s_or_b32 s77, s45, s47
+; SI-NEXT: s_and_b32 s45, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s79, 16
+; SI-NEXT: s_mov_b32 vcc_lo, s79
+; SI-NEXT: s_or_b32 s79, s45, s47
+; SI-NEXT: s_and_b32 s45, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s89, 16
+; SI-NEXT: s_mov_b32 s30, s89
+; SI-NEXT: s_or_b32 s89, s45, s47
+; SI-NEXT: s_and_b32 s45, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s91, 16
+; SI-NEXT: s_or_b32 s61, s45, s47
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s93, 16
+; SI-NEXT: s_or_b32 s59, s43, s45
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s43, s95, 16
+; SI-NEXT: s_or_b32 s57, s41, s43
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s41, vcc_hi, 16
+; SI-NEXT: s_or_b32 s47, s13, s41
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s31, 16
+; SI-NEXT: s_mov_b32 s41, s63
+; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
+; SI-NEXT: s_or_b32 s45, s11, s13
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s35, 16
+; SI-NEXT: s_mov_b32 s63, s15
; SI-NEXT: s_mov_b32 s15, s73
; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT: s_mov_b32 s13, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
-; SI-NEXT: s_or_b32 s6, s4, s88
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s68, 16
-; SI-NEXT: s_mov_b32 s73, s9
-; SI-NEXT: s_mov_b32 s75, s11
+; SI-NEXT: s_or_b32 s43, s9, s11
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s37, 16
+; SI-NEXT: s_mov_b32 s73, s90
+; SI-NEXT: s_mov_b32 s75, s92
; SI-NEXT: s_mov_b32 s11, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
+; SI-NEXT: s_mov_b32 s92, s91
+; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
+; SI-NEXT: s_or_b32 s55, s7, s9
+; SI-NEXT: s_mov_b32 s77, s94
; SI-NEXT: s_mov_b32 s9, s79
; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16
-; SI-NEXT: s_or_b32 s4, s4, s60
-; SI-NEXT: s_lshl_b32 s58, s95, 16
-; SI-NEXT: s_or_b32 s37, s5, s7
-; SI-NEXT: s_mov_b32 s77, s90
-; SI-NEXT: s_mov_b32 s79, s91
+; SI-NEXT: s_mov_b32 s91, s92
+; SI-NEXT: s_and_b32 s60, s48, 0xffff
+; SI-NEXT: s_mov_b32 s94, s93
+; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
+; SI-NEXT: s_mov_b32 s79, vcc_lo
; SI-NEXT: s_mov_b32 s7, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16
-; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
-; SI-NEXT: s_and_b32 s60, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s56, vcc_hi, 16
-; SI-NEXT: s_mov_b32 s41, s63
-; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16
-; SI-NEXT: s_mov_b32 s89, s92
-; SI-NEXT: s_mov_b32 s91, s93
; SI-NEXT: s_or_b32 s60, s60, s58
-; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
-; SI-NEXT: s_and_b32 s58, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s31, 16
; SI-NEXT: s_mov_b32 s93, s94
-; SI-NEXT: s_or_b32 s58, s58, s56
-; SI-NEXT: s_mov_b32 s63, s95
+; SI-NEXT: s_and_b32 s58, s49, 0xffff
+; SI-NEXT: s_mov_b32 vcc_lo, s95
; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16
-; SI-NEXT: s_and_b32 s56, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s71, 16
-; SI-NEXT: s_mov_b32 s95, s63
-; SI-NEXT: s_or_b32 s56, s56, s46
-; SI-NEXT: s_mov_b32 s63, vcc_hi
+; SI-NEXT: s_mov_b32 s89, s30
+; SI-NEXT: s_or_b32 s58, s58, s56
+; SI-NEXT: s_mov_b32 s95, vcc_lo
+; SI-NEXT: s_and_b32 s56, s50, 0xffff
+; SI-NEXT: s_mov_b32 s30, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16
-; SI-NEXT: s_and_b32 s46, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s82, 16
-; SI-NEXT: s_mov_b32 vcc_hi, s63
-; SI-NEXT: s_or_b32 s46, s46, s44
-; SI-NEXT: s_mov_b32 s63, s31
+; SI-NEXT: s_or_b32 s56, s56, s46
+; SI-NEXT: s_mov_b32 vcc_hi, s30
+; SI-NEXT: s_and_b32 s46, s51, 0xffff
+; SI-NEXT: s_mov_b32 s34, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s83, 0xffff
-; SI-NEXT: s_lshl_b32 s36, s96, 16
-; SI-NEXT: s_or_b32 s44, s44, s42
+; SI-NEXT: s_lshl_b32 s54, s5, 16
+; SI-NEXT: s_or_b32 s46, s46, s44
+; SI-NEXT: s_mov_b32 s31, s34
+; SI-NEXT: s_and_b32 s44, s52, 0xffff
+; SI-NEXT: s_mov_b32 s36, s35
; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16
-; SI-NEXT: s_and_b32 s42, s99, 0xffff
+; SI-NEXT: s_or_b32 s44, s44, s42
+; SI-NEXT: s_mov_b32 s35, s36
+; SI-NEXT: s_and_b32 s42, s53, 0xffff
+; SI-NEXT: s_mov_b32 s38, s37
+; SI-NEXT: s_lshr_b64 s[36:37], s[54:55], 16
; SI-NEXT: s_mov_b32 s5, s61
; SI-NEXT: s_mov_b32 s61, s59
; SI-NEXT: s_mov_b32 s59, s57
; SI-NEXT: s_mov_b32 s57, s47
; SI-NEXT: s_mov_b32 s47, s45
-; SI-NEXT: s_mov_b32 s31, s63
; SI-NEXT: s_mov_b32 s45, s43
-; SI-NEXT: s_or_b32 s42, s42, s36
-; SI-NEXT: s_mov_b32 s43, s37
-; SI-NEXT: s_lshr_b64 s[36:37], s[36:37], 16
+; SI-NEXT: s_or_b32 s42, s42, s54
+; SI-NEXT: s_mov_b32 s43, s55
+; SI-NEXT: s_mov_b32 s37, s38
; SI-NEXT: s_mov_b64 s[38:39], 0
; SI-NEXT: s_branch .LBB57_3
; SI-NEXT: .LBB57_2:
@@ -42773,126 +43089,145 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[38:39], s[38:39], exec
-; SI-NEXT: s_cselect_b32 s63, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s63, 1
+; SI-NEXT: s_cselect_b32 s38, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s38, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s99, s99, 3
-; SI-NEXT: s_and_b32 s4, s99, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s85, s85, 3
+; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 18
+; SI-NEXT: s_and_b32 s5, s53, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: v_readlane_b32 s4, v27, 17
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s83, s83, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s83, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s81, s81, 3
+; SI-NEXT: s_add_i32 s52, s52, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 11
+; SI-NEXT: s_and_b32 s5, s52, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s81, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s67, 16
+; SI-NEXT: v_readlane_b32 s4, v27, 16
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s80, s80, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: s_add_i32 s51, s51, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 10
+; SI-NEXT: s_and_b32 s5, s51, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s46, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s66, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: s_add_i32 s47, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v27, 15
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s98, s98, 3
+; SI-NEXT: s_add_i32 s47, s4, 0x30000
+; SI-NEXT: s_add_i32 s50, s50, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 9
+; SI-NEXT: s_and_b32 s5, s50, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s65, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s97, s97, 3
-; SI-NEXT: s_add_i32 s57, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s97, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v27, 14
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
+; SI-NEXT: s_add_i32 s57, s4, 0x30000
+; SI-NEXT: s_add_i32 s49, s49, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 8
+; SI-NEXT: s_and_b32 s5, s49, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s58, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s86, s86, 3
-; SI-NEXT: s_add_i32 s59, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s86, 0xffff
+; SI-NEXT: v_readlane_b32 s4, v27, 13
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
+; SI-NEXT: s_add_i32 s59, s4, 0x30000
+; SI-NEXT: s_add_i32 s48, s48, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 7
+; SI-NEXT: s_and_b32 s5, s48, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s60, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s55, 16
+; SI-NEXT: v_readlane_b32 s4, v27, 12
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s61, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
+; SI-NEXT: s_add_i32 s28, s28, 3
+; SI-NEXT: v_readlane_b32 s4, v27, 6
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s54, 16
-; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: s_lshl_b32 s6, s91, 16
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: s_and_b32 s6, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s91, 16
+; SI-NEXT: s_add_i32 s26, s26, 3
+; SI-NEXT: v_readlane_b32 s6, v27, 5
+; SI-NEXT: s_and_b32 s7, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s7, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s53, 16
-; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: s_lshl_b32 s8, s89, 16
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: s_and_b32 s8, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s89, 16
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_readlane_b32 s8, v27, 4
+; SI-NEXT: s_and_b32 s9, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: s_or_b32 s8, s9, s8
+; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s52, 16
-; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: s_lshl_b32 s10, s79, 16
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: s_and_b32 s10, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s79, 16
+; SI-NEXT: s_add_i32 s22, s22, 3
+; SI-NEXT: v_readlane_b32 s10, v27, 3
+; SI-NEXT: s_and_b32 s11, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s12, s51, 16
-; SI-NEXT: s_add_i32 s20, s20, 3
+; SI-NEXT: s_lshl_b32 s12, s77, 16
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: s_and_b32 s12, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s13, s77, 16
+; SI-NEXT: s_add_i32 s20, s20, 3
+; SI-NEXT: v_readlane_b32 s12, v27, 2
+; SI-NEXT: s_and_b32 s13, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: s_or_b32 s12, s13, s12
+; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s14, s50, 16
-; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: s_lshl_b32 s14, s75, 16
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: s_and_b32 s14, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s15, s75, 16
+; SI-NEXT: s_add_i32 s18, s18, 3
+; SI-NEXT: v_readlane_b32 s14, v27, 1
+; SI-NEXT: s_and_b32 s15, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_or_b32 s14, s15, s14
+; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s15, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s49, 16
+; SI-NEXT: s_lshl_b32 s18, s73, 16
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s15, s18, s15
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s73, 16
-; SI-NEXT: s_or_b32 s16, s18, s16
+; SI-NEXT: s_and_b32 s18, s16, 0xffff
+; SI-NEXT: v_readlane_b32 s16, v27, 0
+; SI-NEXT: s_lshl_b32 s16, s16, 16
+; SI-NEXT: s_or_b32 s16, s16, s18
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s40, s16, 0x30000
; SI-NEXT: s_and_b32 s16, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s17, s48, 16
+; SI-NEXT: s_lshl_b32 s17, s63, 16
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
@@ -42920,99 +43255,99 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[30:31], s[46:47], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[36:37], s[42:43], 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s15, 16
-; SI-NEXT: s_lshr_b32 s50, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s11, 16
-; SI-NEXT: s_lshr_b32 s52, s9, 16
-; SI-NEXT: s_lshr_b32 s53, s7, 16
-; SI-NEXT: s_lshr_b32 s54, s5, 16
-; SI-NEXT: s_lshr_b32 s55, s61, 16
-; SI-NEXT: s_lshr_b32 s64, s59, 16
-; SI-NEXT: s_lshr_b32 s65, s57, 16
-; SI-NEXT: s_lshr_b32 s66, s47, 16
-; SI-NEXT: s_lshr_b32 s67, s45, 16
-; SI-NEXT: s_lshr_b32 s68, s43, 16
+; SI-NEXT: s_lshr_b32 s63, s41, 16
+; SI-NEXT: s_lshr_b32 s73, s15, 16
+; SI-NEXT: s_lshr_b32 s75, s13, 16
+; SI-NEXT: s_lshr_b32 s77, s11, 16
+; SI-NEXT: s_lshr_b32 s79, s9, 16
+; SI-NEXT: s_lshr_b32 s89, s7, 16
+; SI-NEXT: s_lshr_b32 s91, s5, 16
+; SI-NEXT: s_lshr_b32 s93, s61, 16
+; SI-NEXT: s_lshr_b32 s95, s59, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s57, 16
+; SI-NEXT: s_lshr_b32 s31, s47, 16
+; SI-NEXT: s_lshr_b32 s35, s45, 16
+; SI-NEXT: s_lshr_b32 s37, s43, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s16, s40, 0xffff
; SI-NEXT: s_lshl_b32 s17, s62, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s48, 16
+; SI-NEXT: s_lshl_b32 s18, s63, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s18, s72, 16
; SI-NEXT: s_or_b32 s14, s14, s18
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s49, 16
+; SI-NEXT: s_lshl_b32 s18, s73, 16
; SI-NEXT: s_or_b32 s15, s15, s18
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s18, s74, 16
; SI-NEXT: s_or_b32 s12, s12, s18
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s50, 16
+; SI-NEXT: s_lshl_b32 s18, s75, 16
; SI-NEXT: s_or_b32 s13, s13, s18
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s18, s76, 16
; SI-NEXT: s_or_b32 s10, s10, s18
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s51, 16
+; SI-NEXT: s_lshl_b32 s18, s77, 16
; SI-NEXT: s_or_b32 s11, s11, s18
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s18, s78, 16
; SI-NEXT: s_or_b32 s8, s8, s18
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s52, 16
+; SI-NEXT: s_lshl_b32 s18, s79, 16
; SI-NEXT: s_or_b32 s9, s9, s18
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s18, s88, 16
; SI-NEXT: s_or_b32 s6, s6, s18
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s53, 16
+; SI-NEXT: s_lshl_b32 s18, s89, 16
; SI-NEXT: s_or_b32 s7, s7, s18
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s18, s90, 16
; SI-NEXT: s_or_b32 s4, s4, s18
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s54, 16
+; SI-NEXT: s_lshl_b32 s18, s91, 16
; SI-NEXT: s_or_b32 s5, s5, s18
; SI-NEXT: s_and_b32 s18, s60, 0xffff
; SI-NEXT: s_lshl_b32 s19, s92, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s55, 16
+; SI-NEXT: s_lshl_b32 s20, s93, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s58, 0xffff
; SI-NEXT: s_lshl_b32 s21, s94, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s64, 16
+; SI-NEXT: s_lshl_b32 s22, s95, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s56, 0xffff
; SI-NEXT: s_lshl_b32 s23, vcc_lo, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s65, 16
+; SI-NEXT: s_lshl_b32 s24, vcc_hi, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s46, 0xffff
; SI-NEXT: s_lshl_b32 s25, s30, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s66, 16
+; SI-NEXT: s_lshl_b32 s26, s31, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s44, 0xffff
; SI-NEXT: s_lshl_b32 s27, s34, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s67, 16
+; SI-NEXT: s_lshl_b32 s28, s35, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s42, 0xffff
; SI-NEXT: s_lshl_b32 s29, s36, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s29, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s40, s68, 16
+; SI-NEXT: s_lshl_b32 s40, s37, 16
; SI-NEXT: s_or_b32 s29, s29, s40
-; SI-NEXT: v_readlane_b32 s30, v26, 34
+; SI-NEXT: v_readlane_b32 s30, v26, 14
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s14
@@ -43039,27 +43374,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v23, s27
; SI-NEXT: v_mov_b32_e32 v24, s28
; SI-NEXT: v_mov_b32_e32 v25, s29
-; SI-NEXT: v_readlane_b32 s31, v26, 35
-; SI-NEXT: v_readlane_b32 s99, v26, 33
-; SI-NEXT: v_readlane_b32 s98, v26, 32
-; SI-NEXT: v_readlane_b32 s97, v26, 31
-; SI-NEXT: v_readlane_b32 s96, v26, 30
-; SI-NEXT: v_readlane_b32 s87, v26, 29
-; SI-NEXT: v_readlane_b32 s86, v26, 28
-; SI-NEXT: v_readlane_b32 s85, v26, 27
-; SI-NEXT: v_readlane_b32 s84, v26, 26
-; SI-NEXT: v_readlane_b32 s83, v26, 25
-; SI-NEXT: v_readlane_b32 s82, v26, 24
-; SI-NEXT: v_readlane_b32 s81, v26, 23
-; SI-NEXT: v_readlane_b32 s80, v26, 22
-; SI-NEXT: v_readlane_b32 s71, v26, 21
-; SI-NEXT: v_readlane_b32 s70, v26, 20
-; SI-NEXT: v_readlane_b32 s69, v26, 19
-; SI-NEXT: v_readlane_b32 s68, v26, 18
-; SI-NEXT: v_readlane_b32 s67, v26, 17
-; SI-NEXT: v_readlane_b32 s66, v26, 16
-; SI-NEXT: v_readlane_b32 s65, v26, 15
-; SI-NEXT: v_readlane_b32 s64, v26, 14
+; SI-NEXT: v_readlane_b32 s31, v26, 15
; SI-NEXT: v_readlane_b32 s55, v26, 13
; SI-NEXT: v_readlane_b32 s54, v26, 12
; SI-NEXT: v_readlane_b32 s53, v26, 11
@@ -43076,6 +43391,7 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i
; SI-NEXT: v_readlane_b32 s34, v26, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -43963,18 +44279,16 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v52f16_to_v52i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v25
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v24
-; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v23
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v22
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v21
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v20
@@ -43989,54 +44303,58 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v4
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v25
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: v_mov_b32_e32 v26, v28
+; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB58_2
; SI-NEXT: ; %bb.1: ; %cmp.true
+; SI-NEXT: v_cvt_f32_f16_e32 v28, v43
; SI-NEXT: v_cvt_f32_f16_e32 v42, v42
-; SI-NEXT: v_cvt_f32_f16_e32 v26, v44
-; SI-NEXT: v_cvt_f32_f16_e32 v44, v41
-; SI-NEXT: v_cvt_f32_f16_e32 v40, v40
-; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: v_cvt_f32_f16_e32 v41, v41
; SI-NEXT: v_cvt_f32_f16_e32 v55, v55
-; SI-NEXT: v_add_f32_e32 v40, 0x38000000, v40
-; SI-NEXT: v_cvt_f32_f16_e32 v53, v53
-; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v42
-; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v44
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
+; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v41
+; SI-NEXT: v_mov_b32_e32 v43, v27
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
+; SI-NEXT: v_cvt_f32_f16_e32 v42, v40
; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v55
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v40
; SI-NEXT: v_cvt_f16_f32_e32 v55, v55
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v42
-; SI-NEXT: v_cvt_f32_f16_e32 v42, v54
-; SI-NEXT: v_cvt_f32_f16_e32 v52, v52
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
+; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v42
+; SI-NEXT: v_cvt_f32_f16_e32 v42, v43
+; SI-NEXT: v_cvt_f32_f16_e32 v43, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v55
-; SI-NEXT: v_add_f32_e32 v53, 0x38000000, v53
-; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v42
+; SI-NEXT: v_cvt_f32_f16_e32 v53, v53
+; SI-NEXT: v_cvt_f32_f16_e32 v52, v52
+; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v43
; SI-NEXT: v_cvt_f16_f32_e32 v55, v55
+; SI-NEXT: v_add_f32_e32 v53, 0x38000000, v53
; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
-; SI-NEXT: v_cvt_f16_f32_e32 v42, v53
-; SI-NEXT: v_cvt_f16_f32_e32 v52, v52
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v53
; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v55
+; SI-NEXT: v_cvt_f16_f32_e32 v52, v52
; SI-NEXT: v_cvt_f32_f16_e32 v55, v51
; SI-NEXT: v_cvt_f32_f16_e32 v50, v50
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v52
; SI-NEXT: v_cvt_f32_f16_e32 v49, v49
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v52
; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v55
; SI-NEXT: v_cvt_f16_f32_e32 v52, v52
; SI-NEXT: v_add_f32_e32 v50, 0x38000000, v50
@@ -44045,26 +44363,26 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v52
; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
; SI-NEXT: v_cvt_f32_f16_e32 v52, v48
-; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
+; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
-; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v49
+; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v52
+; SI-NEXT: v_cvt_f32_f16_e32 v52, v44
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v49
-; SI-NEXT: v_add_f32_e32 v49, 0x38000000, v52
-; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
+; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
+; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
; SI-NEXT: v_cvt_f16_f32_e32 v25, v25
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v52
; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
@@ -44082,8 +44400,8 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v35, v35
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v26
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_cvt_f16_f32_e32 v31, v31
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -44091,7 +44409,7 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v9, v9
; SI-NEXT: v_cvt_f32_f16_e32 v36, v36
; SI-NEXT: v_or_b32_e32 v25, v25, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v44
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
@@ -44114,7 +44432,6 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v35, 0x38000000, v35
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v39, v39
-; SI-NEXT: v_cvt_f32_f16_e32 v43, v43
; SI-NEXT: v_or_b32_e32 v19, v19, v49
; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v31
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -44124,6 +44441,12 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
+; SI-NEXT: v_or_b32_e32 v17, v17, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v32
+; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
+; SI-NEXT: v_cvt_f16_f32_e32 v36, v36
+; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
+; SI-NEXT: v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: v_cvt_f32_f16_e32 v6, v6
; SI-NEXT: v_cvt_f32_f16_e32 v8, v8
@@ -44135,12 +44458,6 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v20, v20
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
-; SI-NEXT: v_or_b32_e32 v17, v17, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v32
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f16_f32_e32 v36, v36
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT: v_or_b32_e32 v15, v15, v49
; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v33
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
@@ -44153,19 +44470,23 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v38, v38
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v39, 0x38000000, v39
-; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v43
; SI-NEXT: v_or_b32_e32 v11, v11, v49
; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v35
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
+; SI-NEXT: v_or_b32_e32 v9, v9, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v36
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
+; SI-NEXT: v_cvt_f16_f32_e32 v42, v42
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
@@ -44175,11 +44496,8 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
-; SI-NEXT: v_or_b32_e32 v9, v9, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v36
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_or_b32_e32 v7, v7, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v37
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
@@ -44191,133 +44509,131 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v20, v20
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
-; SI-NEXT: v_or_b32_e32 v7, v7, v49
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v37
; SI-NEXT: v_or_b32_e32 v5, v5, v49
; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v38
; SI-NEXT: v_or_b32_e32 v3, v3, v49
; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v39
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v44
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v42
-; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v55
; SI-NEXT: v_or_b32_e32 v1, v1, v49
-; SI-NEXT: v_or_b32_e32 v0, v0, v26
-; SI-NEXT: v_or_b32_e32 v2, v2, v43
-; SI-NEXT: v_or_b32_e32 v4, v4, v41
-; SI-NEXT: v_or_b32_e32 v6, v6, v40
-; SI-NEXT: v_or_b32_e32 v8, v8, v45
+; SI-NEXT: v_or_b32_e32 v0, v0, v27
+; SI-NEXT: v_or_b32_e32 v2, v2, v28
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v55
+; SI-NEXT: v_alignbit_b32 v49, v1, v27, 16
+; SI-NEXT: v_alignbit_b32 v28, v3, v28, 16
+; SI-NEXT: v_alignbit_b32 v27, v5, v40, 16
+; SI-NEXT: v_or_b32_e32 v4, v4, v40
+; SI-NEXT: v_or_b32_e32 v6, v6, v41
+; SI-NEXT: v_or_b32_e32 v8, v8, v42
; SI-NEXT: v_or_b32_e32 v10, v10, v54
; SI-NEXT: v_or_b32_e32 v12, v12, v53
-; SI-NEXT: v_or_b32_e32 v14, v14, v46
+; SI-NEXT: v_or_b32_e32 v14, v14, v43
; SI-NEXT: v_or_b32_e32 v16, v16, v51
; SI-NEXT: v_or_b32_e32 v18, v18, v50
-; SI-NEXT: v_or_b32_e32 v20, v20, v47
+; SI-NEXT: v_or_b32_e32 v20, v20, v45
; SI-NEXT: v_or_b32_e32 v22, v22, v48
-; SI-NEXT: v_or_b32_e32 v24, v24, v56
-; SI-NEXT: v_alignbit_b32 v44, v1, v26, 16
-; SI-NEXT: v_alignbit_b32 v43, v3, v43, 16
-; SI-NEXT: v_alignbit_b32 v42, v5, v41, 16
-; SI-NEXT: v_alignbit_b32 v41, v7, v40, 16
-; SI-NEXT: v_alignbit_b32 v40, v9, v45, 16
+; SI-NEXT: v_or_b32_e32 v24, v24, v46
+; SI-NEXT: v_alignbit_b32 v40, v7, v41, 16
+; SI-NEXT: v_mov_b32_e32 v41, v27
+; SI-NEXT: v_alignbit_b32 v27, v9, v42, 16
+; SI-NEXT: v_mov_b32_e32 v42, v28
; SI-NEXT: v_alignbit_b32 v55, v11, v54, 16
; SI-NEXT: v_alignbit_b32 v54, v13, v53, 16
-; SI-NEXT: v_alignbit_b32 v53, v15, v46, 16
+; SI-NEXT: v_alignbit_b32 v53, v15, v43, 16
+; SI-NEXT: v_mov_b32_e32 v43, v49
; SI-NEXT: v_alignbit_b32 v52, v17, v51, 16
; SI-NEXT: v_alignbit_b32 v51, v19, v50, 16
-; SI-NEXT: v_alignbit_b32 v50, v21, v47, 16
+; SI-NEXT: v_alignbit_b32 v50, v21, v45, 16
; SI-NEXT: v_alignbit_b32 v49, v23, v48, 16
-; SI-NEXT: v_alignbit_b32 v48, v25, v56, 16
+; SI-NEXT: v_alignbit_b32 v48, v25, v46, 16
; SI-NEXT: .LBB58_2: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v44
-; SI-NEXT: v_or_b32_e32 v0, v0, v26
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v39
-; SI-NEXT: v_or_b32_e32 v1, v1, v26
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v43
-; SI-NEXT: v_or_b32_e32 v2, v2, v26
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v38
-; SI-NEXT: v_or_b32_e32 v3, v3, v26
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v42
-; SI-NEXT: v_or_b32_e32 v4, v4, v26
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37
-; SI-NEXT: v_or_b32_e32 v5, v5, v26
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v41
-; SI-NEXT: v_or_b32_e32 v6, v6, v26
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36
-; SI-NEXT: v_or_b32_e32 v7, v7, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_or_b32_e32 v8, v8, v27
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35
-; SI-NEXT: v_or_b32_e32 v9, v9, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v35
+; SI-NEXT: v_or_b32_e32 v9, v9, v27
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v55
-; SI-NEXT: v_or_b32_e32 v10, v10, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v55
+; SI-NEXT: v_or_b32_e32 v10, v10, v27
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v34
+; SI-NEXT: v_or_b32_e32 v11, v11, v27
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v54
-; SI-NEXT: v_or_b32_e32 v12, v12, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v54
+; SI-NEXT: v_or_b32_e32 v12, v12, v27
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v33
-; SI-NEXT: v_or_b32_e32 v13, v13, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v33
+; SI-NEXT: v_or_b32_e32 v13, v13, v27
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v53
-; SI-NEXT: v_or_b32_e32 v14, v14, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v53
+; SI-NEXT: v_or_b32_e32 v14, v14, v27
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v32
-; SI-NEXT: v_or_b32_e32 v15, v15, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v32
+; SI-NEXT: v_or_b32_e32 v15, v15, v27
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v52
-; SI-NEXT: v_or_b32_e32 v16, v16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v52
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v43
+; SI-NEXT: v_or_b32_e32 v16, v16, v27
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v31
-; SI-NEXT: v_or_b32_e32 v17, v17, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v31
+; SI-NEXT: v_or_b32_e32 v0, v0, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39
+; SI-NEXT: v_or_b32_e32 v17, v17, v27
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v51
-; SI-NEXT: v_or_b32_e32 v18, v18, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v51
+; SI-NEXT: v_or_b32_e32 v1, v1, v28
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
+; SI-NEXT: v_or_b32_e32 v18, v18, v27
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v30
-; SI-NEXT: v_or_b32_e32 v19, v19, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v30
+; SI-NEXT: v_or_b32_e32 v2, v2, v28
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
+; SI-NEXT: v_or_b32_e32 v19, v19, v27
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v50
-; SI-NEXT: v_or_b32_e32 v20, v20, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v50
+; SI-NEXT: v_or_b32_e32 v3, v3, v28
+; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
+; SI-NEXT: v_or_b32_e32 v20, v20, v27
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29
-; SI-NEXT: v_or_b32_e32 v21, v21, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v29
+; SI-NEXT: v_or_b32_e32 v4, v4, v28
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v37
+; SI-NEXT: v_or_b32_e32 v21, v21, v27
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v49
-; SI-NEXT: v_or_b32_e32 v22, v22, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v49
+; SI-NEXT: v_or_b32_e32 v5, v5, v28
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v40
+; SI-NEXT: v_or_b32_e32 v22, v22, v27
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v44
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
-; SI-NEXT: v_or_b32_e32 v23, v23, v26
+; SI-NEXT: v_or_b32_e32 v6, v6, v28
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v36
+; SI-NEXT: v_or_b32_e32 v23, v23, v27
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; SI-NEXT: v_or_b32_e32 v24, v24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v48
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_or_b32_e32 v7, v7, v28
+; SI-NEXT: v_or_b32_e32 v24, v24, v27
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -44325,16 +44641,20 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v52f16_to_v52i16:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v21
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v23
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v22
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v21
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v20
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v18
@@ -44351,27 +44671,38 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v0
+; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: v_mov_b32_e32 v40, v28
+; VI-NEXT: v_mov_b32_e32 v41, v29
+; VI-NEXT: v_mov_b32_e32 v42, v30
+; VI-NEXT: v_mov_b32_e32 v43, v31
+; VI-NEXT: v_mov_b32_e32 v31, v27
+; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB58_2
; VI-NEXT: ; %bb.1: ; %cmp.true
; VI-NEXT: v_add_f16_e32 v0, 0x200, v0
-; VI-NEXT: v_add_f16_e32 v44, 0x200, v44
-; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
; VI-NEXT: v_add_f16_e32 v43, 0x200, v43
-; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
+; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
; VI-NEXT: v_add_f16_e32 v42, 0x200, v42
-; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
+; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
; VI-NEXT: v_add_f16_e32 v41, 0x200, v41
-; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
+; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
; VI-NEXT: v_add_f16_e32 v40, 0x200, v40
+; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
+; VI-NEXT: v_add_f16_e32 v31, 0x200, v31
; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
; VI-NEXT: v_add_f16_e32 v55, 0x200, v55
; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
@@ -44405,73 +44736,74 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
; VI-NEXT: v_add_f16_e32 v32, 0x200, v32
; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
-; VI-NEXT: v_add_f16_e32 v31, 0x200, v31
-; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_f16_e32 v30, 0x200, v30
-; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
+; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
; VI-NEXT: v_add_f16_e32 v29, 0x200, v29
-; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
+; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
; VI-NEXT: v_add_f16_e32 v28, 0x200, v28
-; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
+; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
+; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
+; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
; VI-NEXT: .LBB58_2: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v44
-; VI-NEXT: v_or_b32_sdwa v0, v0, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v43
-; VI-NEXT: v_or_b32_sdwa v1, v1, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v42
-; VI-NEXT: v_or_b32_sdwa v2, v2, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v41
-; VI-NEXT: v_or_b32_sdwa v3, v3, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v4, v4, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v55
-; VI-NEXT: v_or_b32_sdwa v5, v5, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v54
-; VI-NEXT: v_or_b32_sdwa v6, v6, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v53
-; VI-NEXT: v_or_b32_sdwa v7, v7, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v52
-; VI-NEXT: v_or_b32_sdwa v8, v8, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v51
-; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v50
-; VI-NEXT: v_or_b32_sdwa v10, v10, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v49
-; VI-NEXT: v_or_b32_sdwa v11, v11, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v48
-; VI-NEXT: v_or_b32_sdwa v12, v12, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v39
-; VI-NEXT: v_or_b32_sdwa v13, v13, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v38
-; VI-NEXT: v_or_b32_sdwa v14, v14, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v37
-; VI-NEXT: v_or_b32_sdwa v15, v15, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v36
-; VI-NEXT: v_or_b32_sdwa v16, v16, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v35
-; VI-NEXT: v_or_b32_sdwa v17, v17, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v34
-; VI-NEXT: v_or_b32_sdwa v18, v18, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v33
-; VI-NEXT: v_or_b32_sdwa v19, v19, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v32
-; VI-NEXT: v_or_b32_sdwa v20, v20, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v31
-; VI-NEXT: v_or_b32_sdwa v21, v21, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v30
-; VI-NEXT: v_or_b32_sdwa v22, v22, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v29
-; VI-NEXT: v_or_b32_sdwa v23, v23, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v28
-; VI-NEXT: v_or_b32_sdwa v24, v24, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; VI-NEXT: v_lshlrev_b32_e32 v41, 16, v41
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; VI-NEXT: v_or_b32_sdwa v0, v0, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v1, v1, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v2, v2, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v3, v3, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
+; VI-NEXT: v_or_b32_sdwa v5, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v54
+; VI-NEXT: v_or_b32_sdwa v6, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v53
+; VI-NEXT: v_or_b32_sdwa v7, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v52
+; VI-NEXT: v_or_b32_sdwa v8, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v51
+; VI-NEXT: v_or_b32_sdwa v9, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v50
+; VI-NEXT: v_or_b32_sdwa v10, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v49
+; VI-NEXT: v_or_b32_sdwa v11, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v48
+; VI-NEXT: v_or_b32_sdwa v12, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v39
+; VI-NEXT: v_or_b32_sdwa v13, v13, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v38
+; VI-NEXT: v_or_b32_sdwa v14, v14, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v37
+; VI-NEXT: v_or_b32_sdwa v15, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v36
+; VI-NEXT: v_or_b32_sdwa v16, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v35
+; VI-NEXT: v_or_b32_sdwa v17, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v34
+; VI-NEXT: v_or_b32_sdwa v18, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v33
+; VI-NEXT: v_or_b32_sdwa v19, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v32
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; VI-NEXT: v_or_b32_sdwa v20, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v21, v21, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v22, v22, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v23, v23, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v24, v24, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -44479,16 +44811,20 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; GFX9-LABEL: bitcast_v52f16_to_v52i16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v21
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v25
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v24
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v23
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v22
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v21
+; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v18
@@ -44513,16 +44849,23 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB58_2
; GFX9-NEXT: ; %bb.1: ; %cmp.true
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v25, v44, v25, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v43, v25, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v24, v43, v24, s6
-; GFX9-NEXT: v_perm_b32 v23, v42, v23, s6
-; GFX9-NEXT: v_perm_b32 v22, v41, v22, s6
-; GFX9-NEXT: v_perm_b32 v21, v40, v21, s6
+; GFX9-NEXT: v_perm_b32 v24, v42, v24, s6
+; GFX9-NEXT: v_perm_b32 v23, v41, v23, s6
+; GFX9-NEXT: v_perm_b32 v22, v40, v22, s6
+; GFX9-NEXT: v_perm_b32 v21, v26, v21, s6
; GFX9-NEXT: v_perm_b32 v20, v55, v20, s6
; GFX9-NEXT: v_perm_b32 v19, v54, v19, s6
; GFX9-NEXT: v_perm_b32 v18, v53, v18, s6
@@ -44591,24 +44934,26 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v25
; GFX9-NEXT: .LBB58_2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0x5040100
-; GFX9-NEXT: v_perm_b32 v21, v40, v21, s4
-; GFX9-NEXT: v_perm_b32 v22, v41, v22, s4
-; GFX9-NEXT: v_perm_b32 v23, v42, v23, s4
-; GFX9-NEXT: v_perm_b32 v24, v43, v24, s4
-; GFX9-NEXT: v_perm_b32 v25, v44, v25, s4
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v22, v40, v22, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v23, v41, v23, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v24, v42, v24, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v25, v43, v25, s4
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4
; GFX9-NEXT: v_perm_b32 v2, v29, v2, s4
@@ -44630,6 +44975,7 @@ define <52 x i16> @bitcast_v52f16_to_v52i16(<52 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v18, v53, v18, s4
; GFX9-NEXT: v_perm_b32 v19, v54, v19, s4
; GFX9-NEXT: v_perm_b32 v20, v55, v20, s4
+; GFX9-NEXT: v_perm_b32 v21, v26, v21, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -44941,22 +45287,21 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-LABEL: bitcast_v52f16_to_v52i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_readfirstlane_b32 s43, v11
; SI-NEXT: v_readfirstlane_b32 s57, v10
; SI-NEXT: v_readfirstlane_b32 s41, v9
@@ -45020,7 +45365,8 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v34, v1, v0
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_or_b32_e32 v57, v1, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, s89
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s20
@@ -45030,11 +45376,11 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v5, v4
-; SI-NEXT: v_or_b32_e32 v35, v3, v2
+; SI-NEXT: v_or_b32_e32 v56, v3, v2
; SI-NEXT: v_cvt_f32_f16_e32 v3, s88
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s22
-; SI-NEXT: v_or_b32_e32 v36, v5, v4
+; SI-NEXT: v_or_b32_e32 v47, v5, v4
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s78
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -45044,7 +45390,7 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s24
-; SI-NEXT: v_or_b32_e32 v37, v1, v6
+; SI-NEXT: v_or_b32_e32 v29, v1, v6
; SI-NEXT: v_cvt_f32_f16_e32 v1, s75
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
@@ -45054,7 +45400,7 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v38, v3, v8
+; SI-NEXT: v_or_b32_e32 v30, v3, v8
; SI-NEXT: v_cvt_f32_f16_e32 v3, s72
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s28
@@ -45068,7 +45414,7 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s79
-; SI-NEXT: v_or_b32_e32 v33, v1, v12
+; SI-NEXT: v_or_b32_e32 v32, v1, v12
; SI-NEXT: v_cvt_f32_f16_e32 v1, s73
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
@@ -45078,11 +45424,11 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v32, v3, v14
+; SI-NEXT: v_or_b32_e32 v33, v3, v14
; SI-NEXT: v_cvt_f32_f16_e32 v3, s62
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s74
-; SI-NEXT: v_or_b32_e32 v30, v5, v16
+; SI-NEXT: v_or_b32_e32 v42, v5, v16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f32_f16_e32 v5, s58
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
@@ -45092,7 +45438,7 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s63
-; SI-NEXT: v_or_b32_e32 v56, v1, v18
+; SI-NEXT: v_or_b32_e32 v44, v1, v18
; SI-NEXT: v_cvt_f32_f16_e32 v1, s47
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
@@ -45102,18 +45448,16 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v27, v3, v20
+; SI-NEXT: v_or_b32_e32 v45, v3, v20
; SI-NEXT: v_cvt_f32_f16_e32 v3, s44
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1
-; SI-NEXT: v_or_b32_e32 v1, v5, v22
+; SI-NEXT: v_or_b32_e32 v46, v5, v22
; SI-NEXT: v_cvt_f32_f16_e32 v5, s61
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s57
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v45, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v40, v5
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s43
; SI-NEXT: v_cvt_f32_f16_e32 v5, s59
@@ -45123,26 +45467,26 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v5
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v1, v1, v24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45
+; SI-NEXT: v_or_b32_e32 v41, v1, v24
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
; SI-NEXT: v_or_b32_e32 v25, v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s56
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43
; SI-NEXT: v_or_b32_e32 v23, v5, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s40
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s46
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v1
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_cvt_f16_f32_e32 v58, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v29
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_cvt_f16_f32_e32 v59, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58
; SI-NEXT: v_cvt_f32_f16_e32 v5, s15
; SI-NEXT: v_or_b32_e32 v21, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s45
@@ -45150,23 +45494,26 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v3
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_cvt_f16_f32_e32 v60, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59
; SI-NEXT: v_or_b32_e32 v19, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s42
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v60
; SI-NEXT: v_or_b32_e32 v17, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s13
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s12
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v1
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_cvt_f16_f32_e32 v61, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v60, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f16_f32_e32 v62, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v61
; SI-NEXT: v_cvt_f32_f16_e32 v5, s29
; SI-NEXT: v_or_b32_e32 v15, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s11
@@ -45174,113 +45521,117 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v61, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v37, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v62
; SI-NEXT: v_or_b32_e32 v13, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
; SI-NEXT: v_or_b32_e32 v11, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s25
; SI-NEXT: v_cvt_f32_f16_e32 v5, s9
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v62, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v38, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
; SI-NEXT: v_cvt_f32_f16_e32 v5, s23
-; SI-NEXT: v_cvt_f16_f32_e32 v63, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
; SI-NEXT: v_or_b32_e32 v9, v1, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, s8
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_or_b32_e32 v7, v5, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v44
-; SI-NEXT: v_cvt_f32_f16_e32 v26, s17
+; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v34, s17
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_or_b32_e32 v5, v3, v5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s19
-; SI-NEXT: v_cvt_f16_f32_e32 v46, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v49, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s6
; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v26
+; SI-NEXT: v_cvt_f16_f32_e32 v50, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v34
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v46
-; SI-NEXT: v_or_b32_e32 v3, v3, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v58
-; SI-NEXT: v_or_b32_e32 v1, v1, v26
-; SI-NEXT: v_lshr_b64 v[40:41], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v2, v34
-; SI-NEXT: v_mov_b32_e32 v4, v35
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v49
+; SI-NEXT: v_or_b32_e32 v3, v3, v34
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v50
+; SI-NEXT: v_or_b32_e32 v1, v1, v34
+; SI-NEXT: v_lshr_b64 v[34:35], v[0:1], 16
+; SI-NEXT: v_lshr_b64 v[35:36], v[2:3], 16
+; SI-NEXT: v_mov_b32_e32 v55, v50
+; SI-NEXT: v_mov_b32_e32 v4, v49
; SI-NEXT: v_lshr_b64 v[52:53], v[6:7], 16
-; SI-NEXT: v_mov_b32_e32 v6, v36
+; SI-NEXT: v_mov_b32_e32 v6, v48
; SI-NEXT: v_lshr_b64 v[50:51], v[8:9], 16
-; SI-NEXT: v_mov_b32_e32 v8, v37
+; SI-NEXT: v_mov_b32_e32 v8, v39
; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16
; SI-NEXT: v_mov_b32_e32 v10, v38
; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16
-; SI-NEXT: v_mov_b32_e32 v12, v31
+; SI-NEXT: v_mov_b32_e32 v12, v37
; SI-NEXT: v_lshr_b64 v[36:37], v[14:15], 16
-; SI-NEXT: v_mov_b32_e32 v14, v33
+; SI-NEXT: v_mov_b32_e32 v53, v29
+; SI-NEXT: v_mov_b32_e32 v51, v30
+; SI-NEXT: v_mov_b32_e32 v49, v31
+; SI-NEXT: v_mov_b32_e32 v39, v32
+; SI-NEXT: v_mov_b32_e32 v0, v34
+; SI-NEXT: v_mov_b32_e32 v2, v35
+; SI-NEXT: v_mov_b32_e32 v37, v33
; SI-NEXT: v_lshr_b64 v[34:35], v[16:17], 16
-; SI-NEXT: v_mov_b32_e32 v16, v32
; SI-NEXT: v_lshr_b64 v[32:33], v[18:19], 16
-; SI-NEXT: v_mov_b32_e32 v18, v30
; SI-NEXT: v_lshr_b64 v[30:31], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v20, v56
-; SI-NEXT: v_lshr_b64 v[55:56], v[22:23], 16
-; SI-NEXT: v_mov_b32_e32 v22, v27
+; SI-NEXT: v_lshr_b64 v[28:29], v[22:23], 16
; SI-NEXT: v_lshr_b64 v[26:27], v[24:25], 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[42:43], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v14, v62
+; SI-NEXT: v_mov_b32_e32 v16, v61
+; SI-NEXT: v_mov_b32_e32 v18, v60
+; SI-NEXT: v_mov_b32_e32 v33, v44
+; SI-NEXT: v_mov_b32_e32 v20, v59
+; SI-NEXT: v_mov_b32_e32 v31, v45
+; SI-NEXT: v_mov_b32_e32 v22, v58
+; SI-NEXT: v_mov_b32_e32 v29, v46
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v45, s61
-; SI-NEXT: v_mov_b32_e32 v47, s59
-; SI-NEXT: v_mov_b32_e32 v29, s56
-; SI-NEXT: v_mov_b32_e32 v28, s46
+; SI-NEXT: v_mov_b32_e32 v40, s61
+; SI-NEXT: v_mov_b32_e32 v43, s59
+; SI-NEXT: v_mov_b32_e32 v22, s56
+; SI-NEXT: v_mov_b32_e32 v20, s46
+; SI-NEXT: v_mov_b32_e32 v18, s45
+; SI-NEXT: v_mov_b32_e32 v16, s42
+; SI-NEXT: v_mov_b32_e32 v14, s12
+; SI-NEXT: v_mov_b32_e32 v12, s11
+; SI-NEXT: v_mov_b32_e32 v10, s10
+; SI-NEXT: v_mov_b32_e32 v8, s9
+; SI-NEXT: v_mov_b32_e32 v6, s8
+; SI-NEXT: v_mov_b32_e32 v4, s7
+; SI-NEXT: v_mov_b32_e32 v55, s6
+; SI-NEXT: v_mov_b32_e32 v41, s57
+; SI-NEXT: v_mov_b32_e32 v29, s60
+; SI-NEXT: v_mov_b32_e32 v31, s63
+; SI-NEXT: v_mov_b32_e32 v33, s74
+; SI-NEXT: v_mov_b32_e32 v42, s77
+; SI-NEXT: v_mov_b32_e32 v37, s79
+; SI-NEXT: v_mov_b32_e32 v39, s28
+; SI-NEXT: v_mov_b32_e32 v49, s26
+; SI-NEXT: v_mov_b32_e32 v51, s24
+; SI-NEXT: v_mov_b32_e32 v53, s22
+; SI-NEXT: v_mov_b32_e32 v47, s20
; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v57, s45
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v59, s42
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v60, s12
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v61, s11
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v62, s10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v63, s9
-; SI-NEXT: v_mov_b32_e32 v44, s8
-; SI-NEXT: v_mov_b32_e32 v46, s7
-; SI-NEXT: v_mov_b32_e32 v58, s6
-; SI-NEXT: v_mov_b32_e32 v27, s57
-; SI-NEXT: v_mov_b32_e32 v24, s60
-; SI-NEXT: v_mov_b32_e32 v22, s63
-; SI-NEXT: v_mov_b32_e32 v20, s74
-; SI-NEXT: v_mov_b32_e32 v18, s77
-; SI-NEXT: v_mov_b32_e32 v16, s79
-; SI-NEXT: v_mov_b32_e32 v14, s28
-; SI-NEXT: v_mov_b32_e32 v12, s26
-; SI-NEXT: v_mov_b32_e32 v10, s24
-; SI-NEXT: v_mov_b32_e32 v8, s22
-; SI-NEXT: v_mov_b32_e32 v6, s20
-; SI-NEXT: v_mov_b32_e32 v4, s18
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v56, s18
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: v_mov_b32_e32 v57, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v3, s19
; SI-NEXT: v_mov_b32_e32 v5, s21
@@ -45294,8 +45645,8 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v21, s40
; SI-NEXT: v_mov_b32_e32 v23, s41
; SI-NEXT: v_mov_b32_e32 v25, s43
-; SI-NEXT: v_mov_b32_e32 v42, s91
-; SI-NEXT: v_mov_b32_e32 v40, s90
+; SI-NEXT: v_mov_b32_e32 v0, s91
+; SI-NEXT: v_mov_b32_e32 v2, s90
; SI-NEXT: v_mov_b32_e32 v54, s89
; SI-NEXT: v_mov_b32_e32 v52, s88
; SI-NEXT: v_mov_b32_e32 v50, s78
@@ -45305,102 +45656,101 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v34, s73
; SI-NEXT: v_mov_b32_e32 v32, s62
; SI-NEXT: v_mov_b32_e32 v30, s58
-; SI-NEXT: v_mov_b32_e32 v55, s47
+; SI-NEXT: v_mov_b32_e32 v28, s47
; SI-NEXT: v_mov_b32_e32 v26, s44
; SI-NEXT: .LBB59_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v42
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v57
+; SI-NEXT: v_or_b32_e32 v0, v24, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v55
+; SI-NEXT: v_or_b32_e32 v1, v1, v24
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v56
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_or_b32_e32 v2, v24, v2
; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v47
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_or_b32_e32 v4, v24, v4
; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v53
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_or_b32_e32 v6, v24, v6
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v50
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v51
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v8, v24, v8
; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48
-; SI-NEXT: v_or_b32_e32 v10, v10, v12
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v48
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v61
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v10, v10, v24
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v38
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v38
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v60
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v12, v24
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v36
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v59
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v14, v14, v24
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v34
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v42
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v57
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; SI-NEXT: v_or_b32_e32 v16, v16, v24
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v32
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_or_b32_e32 v18, v18, v24
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v31
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v30
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v20, v20, v24
; SI-NEXT: v_or_b32_e32 v21, v21, v22
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v55
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v28
; SI-NEXT: v_or_b32_e32 v22, v22, v24
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v43
; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v27
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v41
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v45
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT: v_or_b32_e32 v25, v25, v26
; SI-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
index 8319358c1e356..0ffd49536ca20 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
@@ -4512,11 +4512,8 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: v_writelane_b32 v28, s38, 4
; SI-NEXT: v_writelane_b32 v28, s39, 5
; SI-NEXT: v_writelane_b32 v28, s48, 6
-; SI-NEXT: v_writelane_b32 v28, s49, 7
-; SI-NEXT: v_writelane_b32 v28, s50, 8
-; SI-NEXT: v_writelane_b32 v28, s51, 9
-; SI-NEXT: v_writelane_b32 v28, s30, 10
-; SI-NEXT: v_writelane_b32 v28, s31, 11
+; SI-NEXT: v_writelane_b32 v28, s30, 7
+; SI-NEXT: v_writelane_b32 v28, s31, 8
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -4535,23 +4532,26 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s40, v0
; SI-NEXT: s_cbranch_scc0 .LBB13_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_lshr_b32 s44, s9, 16
; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s46, s25, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s56, s17, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
+; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s34, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s41, 16
+; SI-NEXT: s_lshr_b32 s36, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s38, s23, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
@@ -4568,39 +4568,45 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: .LBB13_2:
; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB13_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB13_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -4623,12 +4629,6 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
@@ -4640,109 +4640,109 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_lshr_b32 s43, s9, 16
+; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s34, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s41, 16
+; SI-NEXT: s_lshr_b32 s36, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s45, s25, 16
+; SI-NEXT: s_lshr_b32 s38, s23, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_lshr_b32 s47, s17, 16
; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB13_5: ; %end
-; SI-NEXT: s_lshl_b32 s43, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s43
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s51, 16
-; SI-NEXT: s_or_b32 s17, s17, s43
-; SI-NEXT: s_lshl_b32 s43, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s43
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s50, 16
-; SI-NEXT: s_or_b32 s19, s19, s43
-; SI-NEXT: s_lshl_b32 s43, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s43
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s49, 16
-; SI-NEXT: s_or_b32 s21, s21, s43
-; SI-NEXT: s_lshl_b32 s43, s78, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s43
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s48, 16
-; SI-NEXT: s_or_b32 s23, s23, s43
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s76, 16
-; SI-NEXT: s_or_b32 s24, s24, s43
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s39, 16
-; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: s_or_b32 s25, s25, s45
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s74, 16
-; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_lshl_b32 s45, s74, 16
+; SI-NEXT: s_or_b32 s26, s26, s45
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s38, 16
-; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_lshl_b32 s45, s37, 16
+; SI-NEXT: s_or_b32 s27, s27, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s72, 16
-; SI-NEXT: s_or_b32 s28, s28, s43
+; SI-NEXT: s_lshl_b32 s45, s72, 16
+; SI-NEXT: s_or_b32 s28, s28, s45
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s37, 16
-; SI-NEXT: s_or_b32 s29, s29, s43
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s29, s29, s45
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s43
+; SI-NEXT: s_lshl_b32 s45, s62, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s40, s40, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s36, 16
-; SI-NEXT: s_or_b32 s41, s41, s43
+; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_or_b32 s17, s17, s47
+; SI-NEXT: s_lshl_b32 s47, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s41, s41, s45
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
-; SI-NEXT: s_or_b32 s14, s14, s43
+; SI-NEXT: s_lshl_b32 s45, s60, 16
+; SI-NEXT: s_or_b32 s18, s18, s47
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s48, 16
+; SI-NEXT: s_or_b32 s14, s14, s45
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s35, 16
-; SI-NEXT: s_or_b32 s15, s15, s43
+; SI-NEXT: s_lshl_b32 s45, s34, 16
+; SI-NEXT: s_or_b32 s19, s19, s47
+; SI-NEXT: s_lshl_b32 s47, s88, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s15, s15, s45
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s58, 16
-; SI-NEXT: s_or_b32 s12, s12, s43
+; SI-NEXT: s_lshl_b32 s45, s58, 16
+; SI-NEXT: s_or_b32 s20, s20, s47
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_or_b32 s12, s12, s45
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s34, 16
-; SI-NEXT: s_or_b32 s13, s13, s43
+; SI-NEXT: s_lshl_b32 s45, s31, 16
+; SI-NEXT: s_or_b32 s21, s21, s47
+; SI-NEXT: s_lshl_b32 s47, s78, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s13, s13, s45
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s56, 16
-; SI-NEXT: s_or_b32 s10, s10, s43
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s31, 16
-; SI-NEXT: s_or_b32 s11, s11, s43
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s46, 16
-; SI-NEXT: s_or_b32 s8, s8, s43
+; SI-NEXT: s_lshl_b32 s45, s56, 16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s30, 16
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s22, s22, s47
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s38, 16
+; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s43
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s43, s44, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_lshl_b32 s57, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s47
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s76, 16
+; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s46, 16
; SI-NEXT: s_or_b32 s6, s6, s43
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s16, s16, s57
+; SI-NEXT: s_or_b32 s24, s24, s47
+; SI-NEXT: s_or_b32 s8, s8, s45
; SI-NEXT: s_or_b32 s7, s7, s43
; SI-NEXT: s_or_b32 s5, s5, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 10
+; SI-NEXT: v_readlane_b32 s30, v28, 7
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -4771,10 +4771,7 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: v_readlane_b32 s31, v28, 11
-; SI-NEXT: v_readlane_b32 s51, v28, 9
-; SI-NEXT: v_readlane_b32 s50, v28, 8
-; SI-NEXT: v_readlane_b32 s49, v28, 7
+; SI-NEXT: v_readlane_b32 s31, v28, 8
; SI-NEXT: v_readlane_b32 s48, v28, 6
; SI-NEXT: v_readlane_b32 s39, v28, 5
; SI-NEXT: v_readlane_b32 s38, v28, 4
@@ -4794,8 +4791,6 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v28, s30, 0
-; VI-NEXT: v_writelane_b32 v28, s31, 1
; VI-NEXT: v_readfirstlane_b32 s4, v14
; VI-NEXT: v_readfirstlane_b32 s6, v13
; VI-NEXT: v_readfirstlane_b32 s7, v12
@@ -4812,43 +4807,49 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s42, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s43, v0
+; VI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB13_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 1
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB13_3
; VI-NEXT: .LBB13_2:
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; kill: killed $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $vcc_hi
+; VI-NEXT: ; kill: killed $sgpr45
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $sgpr90
@@ -4873,11 +4874,12 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $sgpr45
-; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: .LBB13_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: v_readlane_b32 s4, v28, 0
+; VI-NEXT: v_readlane_b32 s5, v28, 1
; VI-NEXT: s_cbranch_scc1 .LBB13_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s6, s6, 3
@@ -4908,124 +4910,123 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s5, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: .LBB13_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s30, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, vcc_lo, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s18, s5
+; VI-NEXT: s_and_b32 s18, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s18, s4
; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s91, 16
+; VI-NEXT: s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT: s_or_b32 s18, s18, s19
; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s90, 16
+; VI-NEXT: s_lshl_b32 s20, s91, 16
; VI-NEXT: s_or_b32 s19, s19, s20
; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, s89, 16
+; VI-NEXT: s_lshl_b32 s21, s90, 16
; VI-NEXT: s_or_b32 s20, s20, s21
; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, s88, 16
+; VI-NEXT: s_lshl_b32 s22, s89, 16
; VI-NEXT: s_or_b32 s21, s21, s22
; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s79, 16
+; VI-NEXT: s_lshl_b32 s23, s88, 16
; VI-NEXT: s_or_b32 s22, s22, s23
; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s78, 16
+; VI-NEXT: s_lshl_b32 s24, s79, 16
; VI-NEXT: s_or_b32 s23, s23, s24
; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s77, 16
+; VI-NEXT: s_lshl_b32 s25, s78, 16
; VI-NEXT: s_or_b32 s24, s24, s25
; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s76, 16
+; VI-NEXT: s_lshl_b32 s26, s77, 16
; VI-NEXT: s_or_b32 s25, s25, s26
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s75, 16
+; VI-NEXT: s_lshl_b32 s27, s76, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s74, 16
+; VI-NEXT: s_lshl_b32 s28, s75, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s29, s73, 16
+; VI-NEXT: s_lshl_b32 s29, s74, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s42, s72, 16
+; VI-NEXT: s_lshl_b32 s42, s73, 16
; VI-NEXT: s_or_b32 s29, s29, s42
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s42, s63, 16
+; VI-NEXT: s_lshl_b32 s42, s72, 16
; VI-NEXT: s_or_b32 s41, s41, s42
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s42, s62, 16
+; VI-NEXT: s_lshl_b32 s42, s63, 16
; VI-NEXT: s_or_b32 s40, s40, s42
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s42, s61, 16
+; VI-NEXT: s_lshl_b32 s42, s62, 16
; VI-NEXT: s_or_b32 s15, s15, s42
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s42, s60, 16
+; VI-NEXT: s_lshl_b32 s42, s61, 16
; VI-NEXT: s_or_b32 s14, s14, s42
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s42, s59, 16
+; VI-NEXT: s_lshl_b32 s42, s60, 16
; VI-NEXT: s_or_b32 s13, s13, s42
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s42, s58, 16
+; VI-NEXT: s_lshl_b32 s42, s59, 16
; VI-NEXT: s_or_b32 s12, s12, s42
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s42, s57, 16
+; VI-NEXT: s_lshl_b32 s42, s58, 16
; VI-NEXT: s_or_b32 s11, s11, s42
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s42, s56, 16
+; VI-NEXT: s_lshl_b32 s42, s57, 16
; VI-NEXT: s_or_b32 s10, s10, s42
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_lshl_b32 s42, s56, 16
; VI-NEXT: s_or_b32 s9, s9, s42
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s44, s44, 16
; VI-NEXT: s_or_b32 s8, s8, s42
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_or_b32 s16, s16, s44
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s44, vcc_hi, 16
; VI-NEXT: s_or_b32 s7, s7, s42
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s42, s44, 16
+; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_or_b32 s17, s17, s44
; VI-NEXT: s_or_b32 s6, s6, s42
-; VI-NEXT: v_readlane_b32 s30, v28, 0
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_mov_b32_e32 v4, s18
; VI-NEXT: v_mov_b32_e32 v5, s19
; VI-NEXT: v_mov_b32_e32 v6, s20
@@ -5050,7 +5051,6 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v25, s8
; VI-NEXT: v_mov_b32_e32 v26, s7
; VI-NEXT: v_mov_b32_e32 v27, s6
-; VI-NEXT: v_readlane_b32 s31, v28, 1
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
@@ -6874,23 +6874,23 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s91, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; SI-NEXT: v_readfirstlane_b32 s35, v1
-; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_readfirstlane_b32 s81, v0
; SI-NEXT: s_lshr_b32 s78, s29, 16
; SI-NEXT: s_lshr_b32 s89, s28, 16
; SI-NEXT: s_lshr_b32 s92, s27, 16
; SI-NEXT: s_lshr_b32 s95, s26, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s34, s24, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 16
-; SI-NEXT: s_lshr_b32 s71, s22, 16
-; SI-NEXT: s_lshr_b32 s80, s21, 16
-; SI-NEXT: s_lshr_b32 s81, s20, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 16
-; SI-NEXT: s_lshr_b32 s83, s18, 16
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s83, s22, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s20, 16
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s18, 16
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s16, 16
+; SI-NEXT: s_lshr_b32 s85, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -6902,38 +6902,39 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s35, 16
-; SI-NEXT: s_lshr_b32 s69, s70, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s34, 16
+; SI-NEXT: s_lshr_b32 s82, s81, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s71, 16
+; SI-NEXT: s_or_b32 s37, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s68, 16
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
@@ -6950,10 +6951,10 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_and_b32 s4, s81, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
@@ -6990,11 +6991,12 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB15_3: ; %Flow
@@ -7005,47 +7007,47 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -7072,14 +7074,14 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_add_i32 s4, s81, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s35, s35, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_add_i32 s4, s34, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
@@ -7140,7 +7142,7 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: .LBB15_5: ; %end
@@ -7247,220 +7249,156 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v28, s87, 29
; VI-NEXT: v_writelane_b32 v28, s30, 30
; VI-NEXT: v_writelane_b32 v28, s31, 31
-; VI-NEXT: v_readfirstlane_b32 s81, v13
-; VI-NEXT: v_readfirstlane_b32 s83, v12
-; VI-NEXT: v_readfirstlane_b32 s9, v11
-; VI-NEXT: v_readfirstlane_b32 s84, v10
-; VI-NEXT: v_readfirstlane_b32 s85, v9
-; VI-NEXT: v_readfirstlane_b32 s8, v8
-; VI-NEXT: v_readfirstlane_b32 s73, v7
-; VI-NEXT: v_readfirstlane_b32 s75, v6
-; VI-NEXT: v_readfirstlane_b32 s77, v5
+; VI-NEXT: v_readfirstlane_b32 s7, v13
+; VI-NEXT: v_readfirstlane_b32 s9, v12
+; VI-NEXT: v_readfirstlane_b32 s11, v11
+; VI-NEXT: v_readfirstlane_b32 s13, v10
+; VI-NEXT: v_readfirstlane_b32 s15, v9
+; VI-NEXT: v_readfirstlane_b32 s73, v8
+; VI-NEXT: v_readfirstlane_b32 s75, v7
+; VI-NEXT: v_readfirstlane_b32 s77, v6
+; VI-NEXT: v_readfirstlane_b32 s88, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
; VI-NEXT: v_readfirstlane_b32 s30, v3
; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s71, v1
-; VI-NEXT: v_readfirstlane_b32 s82, v0
-; VI-NEXT: s_lshr_b32 s79, s29, 16
-; VI-NEXT: s_lshr_b32 s90, s28, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s66, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s69, s23, 16
-; VI-NEXT: s_lshr_b32 s80, s22, 16
-; VI-NEXT: s_lshr_b32 s86, s21, 16
-; VI-NEXT: s_lshr_b32 s87, s20, 16
-; VI-NEXT: s_lshr_b32 s13, s19, 16
-; VI-NEXT: s_lshr_b32 s15, s18, 16
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: s_lshr_b32 s7, s16, 16
-; VI-NEXT: s_lshr_b32 s64, s81, 16
-; VI-NEXT: s_lshr_b32 s10, s83, 16
-; VI-NEXT: s_lshr_b32 s12, s9, 16
-; VI-NEXT: s_lshr_b32 s14, s84, 16
-; VI-NEXT: s_lshr_b32 s72, s85, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s73, 16
-; VI-NEXT: s_lshr_b32 s78, s75, 16
-; VI-NEXT: s_lshr_b32 s89, s77, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s65, s35, 16
-; VI-NEXT: s_lshr_b32 s67, s71, 16
-; VI-NEXT: s_lshr_b32 s70, s82, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s87, v1
+; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: s_lshr_b32 s78, s29, 16
+; VI-NEXT: s_lshr_b32 s89, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s27, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s85, s25, 16
+; VI-NEXT: s_lshr_b32 s67, s24, 16
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s63, s7, 16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s14, s15, 16
+; VI-NEXT: s_lshr_b32 s58, s73, 16
+; VI-NEXT: s_lshr_b32 s74, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s79, s88, 16
+; VI-NEXT: s_lshr_b32 s90, s91, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: s_lshr_b32 s86, s87, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
+; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v29, s12, 0
+; VI-NEXT: v_writelane_b32 v29, s14, 1
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s15, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s88, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s86, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s6, s81, 16
+; VI-NEXT: s_and_b32 s8, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s6, s80, 16
+; VI-NEXT: s_or_b32 s37, s8, s40
+; VI-NEXT: s_or_b32 s40, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s6, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s43, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s82
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s71
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s87
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s52, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s88
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s55, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s75
-; VI-NEXT: s_lshl_b32 s5, s78, 16
-; VI-NEXT: s_or_b32 s56, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_and_b32 s4, 0xffff, s77
; VI-NEXT: s_lshl_b32 s5, s76, 16
-; VI-NEXT: s_or_b32 s57, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
+; VI-NEXT: s_or_b32 s56, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_or_b32 s57, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s58, 16
+; VI-NEXT: s_mov_b32 s72, s58
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s85
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s84
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
+; VI-NEXT: s_or_b32 s59, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s60, 16
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s63, 16
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s63
; VI-NEXT: s_or_b32 s63, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
-; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: v_writelane_b32 v29, s26, 0
-; VI-NEXT: s_mov_b32 s26, s27
-; VI-NEXT: s_mov_b32 s27, s77
-; VI-NEXT: v_writelane_b32 v29, s91, 1
-; VI-NEXT: s_mov_b32 s91, s88
-; VI-NEXT: s_mov_b32 s88, s28
-; VI-NEXT: s_mov_b32 s28, s75
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s81
-; VI-NEXT: s_mov_b32 s81, s68
-; VI-NEXT: s_mov_b32 s68, s34
-; VI-NEXT: s_mov_b32 s34, s31
-; VI-NEXT: s_mov_b32 s31, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s90
-; VI-NEXT: s_mov_b32 s90, s89
-; VI-NEXT: s_mov_b32 s89, s79
-; VI-NEXT: s_mov_b32 s79, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s72
-; VI-NEXT: s_mov_b32 s72, s14
-; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s72, s58
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s10, s64
-; VI-NEXT: s_mov_b32 s9, s83
-; VI-NEXT: s_mov_b32 s83, s69
-; VI-NEXT: s_mov_b32 s69, s65
-; VI-NEXT: s_mov_b32 s6, s13
-; VI-NEXT: s_mov_b32 s13, s84
-; VI-NEXT: s_mov_b32 s84, s70
-; VI-NEXT: s_mov_b32 s70, s66
-; VI-NEXT: s_mov_b32 s75, s73
-; VI-NEXT: s_mov_b32 s73, s8
-; VI-NEXT: s_mov_b32 s8, s15
-; VI-NEXT: s_mov_b32 s15, s85
-; VI-NEXT: s_mov_b32 s85, s80
-; VI-NEXT: s_mov_b32 s80, s67
+; VI-NEXT: s_mov_b32 s10, s63
+; VI-NEXT: s_mov_b32 s8, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s80
-; VI-NEXT: s_mov_b32 s80, s85
-; VI-NEXT: s_mov_b32 s85, s15
-; VI-NEXT: s_mov_b32 s15, s8
-; VI-NEXT: s_mov_b32 s8, s73
-; VI-NEXT: s_mov_b32 s73, s75
-; VI-NEXT: s_mov_b32 s66, s70
-; VI-NEXT: s_mov_b32 s70, s84
-; VI-NEXT: s_mov_b32 s84, s13
-; VI-NEXT: s_mov_b32 s13, s6
-; VI-NEXT: s_mov_b32 s65, s69
-; VI-NEXT: s_mov_b32 s69, s83
-; VI-NEXT: s_mov_b32 s83, s9
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s64, s10
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s14, s72
-; VI-NEXT: s_mov_b32 s72, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s79
-; VI-NEXT: s_mov_b32 s79, s89
-; VI-NEXT: s_mov_b32 s89, s90
-; VI-NEXT: s_mov_b32 s90, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s31
-; VI-NEXT: s_mov_b32 s31, s34
-; VI-NEXT: s_mov_b32 s34, s68
-; VI-NEXT: s_mov_b32 s68, s81
-; VI-NEXT: s_mov_b32 s81, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s75, s28
-; VI-NEXT: s_mov_b32 s28, s88
-; VI-NEXT: s_mov_b32 s88, s91
-; VI-NEXT: v_readlane_b32 s91, v29, 1
-; VI-NEXT: s_mov_b32 s77, s27
-; VI-NEXT: s_mov_b32 s27, s26
-; VI-NEXT: v_readlane_b32 s26, v29, 0
+; VI-NEXT: s_mov_b32 s67, s8
; VI-NEXT: .LBB15_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -7469,142 +7407,144 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s6, s88, 16
-; VI-NEXT: s_or_b32 s5, s6, s5
+; VI-NEXT: s_lshl_b32 s8, s83, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s15, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s87, 16
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s82, s82, 3
+; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s82, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, s69, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s71, s71, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s71, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_add_i32 s4, s87, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s35, s35, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s35, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s91, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s77, 3
+; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s88, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s75, 3
+; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s73, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s8, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s85, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 1
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s84, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s9, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 0
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s12, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s83, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s10, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s81, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
@@ -8971,11 +8911,8 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: v_writelane_b32 v28, s38, 4
; SI-NEXT: v_writelane_b32 v28, s39, 5
; SI-NEXT: v_writelane_b32 v28, s48, 6
-; SI-NEXT: v_writelane_b32 v28, s49, 7
-; SI-NEXT: v_writelane_b32 v28, s50, 8
-; SI-NEXT: v_writelane_b32 v28, s51, 9
-; SI-NEXT: v_writelane_b32 v28, s30, 10
-; SI-NEXT: v_writelane_b32 v28, s31, 11
+; SI-NEXT: v_writelane_b32 v28, s30, 7
+; SI-NEXT: v_writelane_b32 v28, s31, 8
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -8994,23 +8931,26 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s40, v0
; SI-NEXT: s_cbranch_scc0 .LBB17_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_lshr_b32 s44, s9, 16
; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s46, s25, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s56, s17, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
+; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s34, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s41, 16
+; SI-NEXT: s_lshr_b32 s36, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s38, s23, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
@@ -9027,39 +8967,45 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: .LBB17_2:
; SI-NEXT: s_mov_b64 s[94:95], -1
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr31
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB17_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -9082,12 +9028,6 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
@@ -9099,109 +9039,109 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
+; SI-NEXT: s_lshr_b32 s43, s9, 16
+; SI-NEXT: s_lshr_b32 s30, s11, 16
+; SI-NEXT: s_lshr_b32 s31, s13, 16
+; SI-NEXT: s_lshr_b32 s34, s15, 16
+; SI-NEXT: s_lshr_b32 s35, s41, 16
+; SI-NEXT: s_lshr_b32 s36, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s45, s25, 16
+; SI-NEXT: s_lshr_b32 s38, s23, 16
+; SI-NEXT: s_lshr_b32 s39, s21, 16
+; SI-NEXT: s_lshr_b32 s48, s19, 16
+; SI-NEXT: s_lshr_b32 s47, s17, 16
; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB17_5: ; %end
-; SI-NEXT: s_lshl_b32 s43, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s43
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s51, 16
-; SI-NEXT: s_or_b32 s17, s17, s43
-; SI-NEXT: s_lshl_b32 s43, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s43
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s50, 16
-; SI-NEXT: s_or_b32 s19, s19, s43
-; SI-NEXT: s_lshl_b32 s43, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s43
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s49, 16
-; SI-NEXT: s_or_b32 s21, s21, s43
-; SI-NEXT: s_lshl_b32 s43, s78, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s43
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s48, 16
-; SI-NEXT: s_or_b32 s23, s23, s43
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s76, 16
-; SI-NEXT: s_or_b32 s24, s24, s43
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s39, 16
-; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: s_or_b32 s25, s25, s45
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s74, 16
-; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_lshl_b32 s45, s74, 16
+; SI-NEXT: s_or_b32 s26, s26, s45
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s38, 16
-; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_lshl_b32 s45, s37, 16
+; SI-NEXT: s_or_b32 s27, s27, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s72, 16
-; SI-NEXT: s_or_b32 s28, s28, s43
+; SI-NEXT: s_lshl_b32 s45, s72, 16
+; SI-NEXT: s_or_b32 s28, s28, s45
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s37, 16
-; SI-NEXT: s_or_b32 s29, s29, s43
+; SI-NEXT: s_lshl_b32 s45, s36, 16
+; SI-NEXT: s_or_b32 s29, s29, s45
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s43
+; SI-NEXT: s_lshl_b32 s45, s62, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s40, s40, s45
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s36, 16
-; SI-NEXT: s_or_b32 s41, s41, s43
+; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_or_b32 s17, s17, s47
+; SI-NEXT: s_lshl_b32 s47, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s41, s41, s45
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
-; SI-NEXT: s_or_b32 s14, s14, s43
+; SI-NEXT: s_lshl_b32 s45, s60, 16
+; SI-NEXT: s_or_b32 s18, s18, s47
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s48, 16
+; SI-NEXT: s_or_b32 s14, s14, s45
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s35, 16
-; SI-NEXT: s_or_b32 s15, s15, s43
+; SI-NEXT: s_lshl_b32 s45, s34, 16
+; SI-NEXT: s_or_b32 s19, s19, s47
+; SI-NEXT: s_lshl_b32 s47, s88, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s15, s15, s45
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s58, 16
-; SI-NEXT: s_or_b32 s12, s12, s43
+; SI-NEXT: s_lshl_b32 s45, s58, 16
+; SI-NEXT: s_or_b32 s20, s20, s47
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_or_b32 s12, s12, s45
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s34, 16
-; SI-NEXT: s_or_b32 s13, s13, s43
+; SI-NEXT: s_lshl_b32 s45, s31, 16
+; SI-NEXT: s_or_b32 s21, s21, s47
+; SI-NEXT: s_lshl_b32 s47, s78, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s13, s13, s45
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s56, 16
-; SI-NEXT: s_or_b32 s10, s10, s43
-; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s31, 16
-; SI-NEXT: s_or_b32 s11, s11, s43
-; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s46, 16
-; SI-NEXT: s_or_b32 s8, s8, s43
+; SI-NEXT: s_lshl_b32 s45, s56, 16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s30, 16
+; SI-NEXT: s_lshl_b32 s43, s43, 16
+; SI-NEXT: s_or_b32 s22, s22, s47
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s38, 16
+; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s30, 16
; SI-NEXT: s_or_b32 s9, s9, s43
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s43, s44, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_lshl_b32 s57, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s47
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s76, 16
+; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_and_b32 s8, s8, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s46, 16
; SI-NEXT: s_or_b32 s6, s6, s43
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s16, s16, s57
+; SI-NEXT: s_or_b32 s24, s24, s47
+; SI-NEXT: s_or_b32 s8, s8, s45
; SI-NEXT: s_or_b32 s7, s7, s43
; SI-NEXT: s_or_b32 s5, s5, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 10
+; SI-NEXT: v_readlane_b32 s30, v28, 7
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -9230,10 +9170,7 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: v_readlane_b32 s31, v28, 11
-; SI-NEXT: v_readlane_b32 s51, v28, 9
-; SI-NEXT: v_readlane_b32 s50, v28, 8
-; SI-NEXT: v_readlane_b32 s49, v28, 7
+; SI-NEXT: v_readlane_b32 s31, v28, 8
; SI-NEXT: v_readlane_b32 s48, v28, 6
; SI-NEXT: v_readlane_b32 s39, v28, 5
; SI-NEXT: v_readlane_b32 s38, v28, 4
@@ -9253,8 +9190,6 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v28, s30, 0
-; VI-NEXT: v_writelane_b32 v28, s31, 1
; VI-NEXT: v_readfirstlane_b32 s4, v14
; VI-NEXT: v_readfirstlane_b32 s6, v13
; VI-NEXT: v_readfirstlane_b32 s7, v12
@@ -9271,43 +9206,49 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s42, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s43, v0
+; VI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB17_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 1
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB17_3
; VI-NEXT: .LBB17_2:
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; kill: killed $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $vcc_hi
+; VI-NEXT: ; kill: killed $sgpr45
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $sgpr90
@@ -9332,11 +9273,12 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $sgpr45
-; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: .LBB17_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: v_readlane_b32 s4, v28, 0
+; VI-NEXT: v_readlane_b32 s5, v28, 1
; VI-NEXT: s_cbranch_scc1 .LBB17_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s6, s6, 3
@@ -9367,124 +9309,123 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s5, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: .LBB17_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s30, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, vcc_lo, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s18, s5
+; VI-NEXT: s_and_b32 s18, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s18, s4
; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s91, 16
+; VI-NEXT: s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT: s_or_b32 s18, s18, s19
; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s90, 16
+; VI-NEXT: s_lshl_b32 s20, s91, 16
; VI-NEXT: s_or_b32 s19, s19, s20
; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, s89, 16
+; VI-NEXT: s_lshl_b32 s21, s90, 16
; VI-NEXT: s_or_b32 s20, s20, s21
; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, s88, 16
+; VI-NEXT: s_lshl_b32 s22, s89, 16
; VI-NEXT: s_or_b32 s21, s21, s22
; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s79, 16
+; VI-NEXT: s_lshl_b32 s23, s88, 16
; VI-NEXT: s_or_b32 s22, s22, s23
; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s78, 16
+; VI-NEXT: s_lshl_b32 s24, s79, 16
; VI-NEXT: s_or_b32 s23, s23, s24
; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s77, 16
+; VI-NEXT: s_lshl_b32 s25, s78, 16
; VI-NEXT: s_or_b32 s24, s24, s25
; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s76, 16
+; VI-NEXT: s_lshl_b32 s26, s77, 16
; VI-NEXT: s_or_b32 s25, s25, s26
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s75, 16
+; VI-NEXT: s_lshl_b32 s27, s76, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s74, 16
+; VI-NEXT: s_lshl_b32 s28, s75, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s29, s73, 16
+; VI-NEXT: s_lshl_b32 s29, s74, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s42, s72, 16
+; VI-NEXT: s_lshl_b32 s42, s73, 16
; VI-NEXT: s_or_b32 s29, s29, s42
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s42, s63, 16
+; VI-NEXT: s_lshl_b32 s42, s72, 16
; VI-NEXT: s_or_b32 s41, s41, s42
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s42, s62, 16
+; VI-NEXT: s_lshl_b32 s42, s63, 16
; VI-NEXT: s_or_b32 s40, s40, s42
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s42, s61, 16
+; VI-NEXT: s_lshl_b32 s42, s62, 16
; VI-NEXT: s_or_b32 s15, s15, s42
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s42, s60, 16
+; VI-NEXT: s_lshl_b32 s42, s61, 16
; VI-NEXT: s_or_b32 s14, s14, s42
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s42, s59, 16
+; VI-NEXT: s_lshl_b32 s42, s60, 16
; VI-NEXT: s_or_b32 s13, s13, s42
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s42, s58, 16
+; VI-NEXT: s_lshl_b32 s42, s59, 16
; VI-NEXT: s_or_b32 s12, s12, s42
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s42, s57, 16
+; VI-NEXT: s_lshl_b32 s42, s58, 16
; VI-NEXT: s_or_b32 s11, s11, s42
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s42, s56, 16
+; VI-NEXT: s_lshl_b32 s42, s57, 16
; VI-NEXT: s_or_b32 s10, s10, s42
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_lshl_b32 s42, s56, 16
; VI-NEXT: s_or_b32 s9, s9, s42
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s44, s44, 16
; VI-NEXT: s_or_b32 s8, s8, s42
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_or_b32 s16, s16, s44
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s44, vcc_hi, 16
; VI-NEXT: s_or_b32 s7, s7, s42
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s42, s44, 16
+; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_or_b32 s17, s17, s44
; VI-NEXT: s_or_b32 s6, s6, s42
-; VI-NEXT: v_readlane_b32 s30, v28, 0
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_mov_b32_e32 v4, s18
; VI-NEXT: v_mov_b32_e32 v5, s19
; VI-NEXT: v_mov_b32_e32 v6, s20
@@ -9509,7 +9450,6 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v25, s8
; VI-NEXT: v_mov_b32_e32 v26, s7
; VI-NEXT: v_mov_b32_e32 v27, s6
-; VI-NEXT: v_readlane_b32 s31, v28, 1
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
@@ -11471,13 +11411,13 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s92, v2
; SI-NEXT: v_readfirstlane_b32 s95, v1
-; SI-NEXT: v_readfirstlane_b32 s30, v0
+; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_lshr_b32 s94, s29, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s28, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s68, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s35, s25, 16
+; SI-NEXT: s_lshr_b32 s68, s24, 16
; SI-NEXT: s_lshr_b32 s70, s23, 16
; SI-NEXT: s_lshr_b32 s71, s22, 16
; SI-NEXT: s_lshr_b32 s80, s21, 16
@@ -11486,7 +11426,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s83, s18, 16
; SI-NEXT: s_lshr_b32 s84, s17, 16
; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s69, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -11499,55 +11439,56 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s95, 16
-; SI-NEXT: s_lshr_b32 s34, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s95, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -11586,11 +11527,12 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB19_3: ; %Flow
@@ -11661,11 +11603,11 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s68
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v9, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
@@ -11676,7 +11618,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s34
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -11685,7 +11627,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s30
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
@@ -11709,10 +11651,10 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_or_b32_e32 v12, v14, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s31
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s7
; SI-NEXT: v_cvt_f32_f16_e32 v16, vcc_hi
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
@@ -11809,7 +11751,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v25, v27, v25
; SI-NEXT: v_cvt_f32_f16_e32 v27, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s69
; SI-NEXT: v_cvt_f32_f16_e32 v29, s6
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
@@ -11943,24 +11885,24 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s76, v6
; VI-NEXT: v_readfirstlane_b32 s79, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
-; VI-NEXT: v_readfirstlane_b32 s30, v3
-; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s70, v1
-; VI-NEXT: v_readfirstlane_b32 s81, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v3
+; VI-NEXT: v_readfirstlane_b32 s34, v2
+; VI-NEXT: v_readfirstlane_b32 s69, v1
+; VI-NEXT: v_readfirstlane_b32 s80, v0
; VI-NEXT: s_lshr_b32 s56, s29, 16
; VI-NEXT: s_lshr_b32 s61, s28, 16
; VI-NEXT: s_lshr_b32 s90, s27, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; VI-NEXT: s_lshr_b32 s34, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s71, s23, 16
-; VI-NEXT: s_lshr_b32 s82, s22, 16
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s85, s20, 16
-; VI-NEXT: s_lshr_b32 s86, s19, 16
-; VI-NEXT: s_lshr_b32 s87, s18, 16
-; VI-NEXT: s_lshr_b32 s7, s17, 16
-; VI-NEXT: s_lshr_b32 s9, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s25, 16
+; VI-NEXT: s_lshr_b32 s35, s24, 16
+; VI-NEXT: s_lshr_b32 s70, s23, 16
+; VI-NEXT: s_lshr_b32 s81, s22, 16
+; VI-NEXT: s_lshr_b32 s83, s21, 16
+; VI-NEXT: s_lshr_b32 s84, s20, 16
+; VI-NEXT: s_lshr_b32 s85, s19, 16
+; VI-NEXT: s_lshr_b32 s86, s18, 16
+; VI-NEXT: s_lshr_b32 s87, s17, 16
+; VI-NEXT: s_lshr_b32 s7, s16, 16
; VI-NEXT: s_lshr_b32 s63, s6, 16
; VI-NEXT: s_lshr_b32 s11, s8, 16
; VI-NEXT: s_lshr_b32 s13, s10, 16
@@ -11971,70 +11913,71 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s60, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s69, s35, 16
-; VI-NEXT: s_lshr_b32 s80, s70, 16
-; VI-NEXT: s_lshr_b32 s83, s81, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: s_lshr_b32 s68, s34, 16
+; VI-NEXT: s_lshr_b32 s71, s69, 16
+; VI-NEXT: s_lshr_b32 s82, s80, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s15, 0
; VI-NEXT: v_writelane_b32 v33, s59, 1
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s9, s7, 16
+; VI-NEXT: s_or_b32 s36, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s9, s86, 16
+; VI-NEXT: s_or_b32 s38, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s9, s85, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s7, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s41, s87, 16
+; VI-NEXT: s_or_b32 s39, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s9, s84, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s61, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s70
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_or_b32 s40, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s9, s83, 16
+; VI-NEXT: s_or_b32 s41, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s9, s81, 16
+; VI-NEXT: s_or_b32 s42, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s9, s70, 16
+; VI-NEXT: s_or_b32 s43, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s9, s35, 16
+; VI-NEXT: s_or_b32 s44, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s9, s31, 16
+; VI-NEXT: s_or_b32 s45, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; VI-NEXT: s_or_b32 s46, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s9, s90, 16
+; VI-NEXT: s_or_b32 s47, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s9, s61, 16
+; VI-NEXT: s_or_b32 s48, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s9, s56, 16
+; VI-NEXT: s_or_b32 s49, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s80
+; VI-NEXT: s_lshl_b32 s9, s82, 16
+; VI-NEXT: s_or_b32 s50, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s9, s71, 16
+; VI-NEXT: s_or_b32 s51, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s34
+; VI-NEXT: s_lshl_b32 s9, s68, 16
+; VI-NEXT: s_or_b32 s52, s5, s9
+; VI-NEXT: s_mov_b32 s9, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -12085,6 +12028,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_mov_b32 s15, s13
; VI-NEXT: s_mov_b32 s13, s11
; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s9, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -12094,43 +12038,43 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v27, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s9
-; VI-NEXT: v_mov_b32_e32 v2, s7
+; VI-NEXT: v_mov_b32_e32 v0, s7
+; VI-NEXT: v_mov_b32_e32 v2, s87
; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v27
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v27
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s87
+; VI-NEXT: v_mov_b32_e32 v2, s86
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v27
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s86
+; VI-NEXT: v_mov_b32_e32 v3, s85
; VI-NEXT: v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v27
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s85
+; VI-NEXT: v_mov_b32_e32 v4, s84
; VI-NEXT: v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v27
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s84
+; VI-NEXT: v_mov_b32_e32 v5, s83
; VI-NEXT: v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v27
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s82
+; VI-NEXT: v_mov_b32_e32 v6, s81
; VI-NEXT: v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v27
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s71
+; VI-NEXT: v_mov_b32_e32 v7, s70
; VI-NEXT: v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v27
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s68
+; VI-NEXT: v_mov_b32_e32 v8, s35
; VI-NEXT: v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v27
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s34
+; VI-NEXT: v_mov_b32_e32 v9, s31
; VI-NEXT: v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v27
; VI-NEXT: v_or_b32_e32 v9, v10, v9
@@ -12150,21 +12094,21 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v27
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s83
+; VI-NEXT: v_mov_b32_e32 v14, s82
; VI-NEXT: v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s81, v27
+; VI-NEXT: v_add_f16_e32 v15, s80, v27
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s80
+; VI-NEXT: v_mov_b32_e32 v15, s71
; VI-NEXT: v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s70, v27
+; VI-NEXT: v_add_f16_e32 v16, s69, v27
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s69
+; VI-NEXT: v_mov_b32_e32 v16, s68
; VI-NEXT: v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s35, v27
+; VI-NEXT: v_add_f16_e32 v17, s34, v27
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s31
+; VI-NEXT: v_mov_b32_e32 v17, s30
; VI-NEXT: v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s30, v27
+; VI-NEXT: v_add_f16_e32 v18, s9, v27
; VI-NEXT: v_or_b32_e32 v17, v18, v17
; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
; VI-NEXT: v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -16190,30 +16134,28 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v58, s34, 0
-; SI-NEXT: v_writelane_b32 v58, s35, 1
-; SI-NEXT: v_writelane_b32 v58, s36, 2
-; SI-NEXT: v_writelane_b32 v58, s37, 3
-; SI-NEXT: v_writelane_b32 v58, s38, 4
-; SI-NEXT: v_writelane_b32 v58, s39, 5
-; SI-NEXT: v_writelane_b32 v58, s48, 6
-; SI-NEXT: v_writelane_b32 v58, s49, 7
-; SI-NEXT: v_writelane_b32 v58, s50, 8
-; SI-NEXT: v_writelane_b32 v58, s51, 9
-; SI-NEXT: v_writelane_b32 v58, s30, 10
-; SI-NEXT: v_writelane_b32 v58, s31, 11
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v57, s34, 0
+; SI-NEXT: v_writelane_b32 v57, s35, 1
+; SI-NEXT: v_writelane_b32 v57, s36, 2
+; SI-NEXT: v_writelane_b32 v57, s37, 3
+; SI-NEXT: v_writelane_b32 v57, s38, 4
+; SI-NEXT: v_writelane_b32 v57, s39, 5
+; SI-NEXT: v_writelane_b32 v57, s48, 6
+; SI-NEXT: v_writelane_b32 v57, s49, 7
+; SI-NEXT: v_writelane_b32 v57, s50, 8
+; SI-NEXT: v_writelane_b32 v57, s30, 9
+; SI-NEXT: v_writelane_b32 v57, s31, 10
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -16232,21 +16174,22 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s40, v0
; SI-NEXT: s_cbranch_scc0 .LBB29_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s51, s5, 16
-; SI-NEXT: s_lshr_b32 s50, s7, 16
-; SI-NEXT: s_lshr_b32 s49, s9, 16
-; SI-NEXT: s_lshr_b32 s48, s11, 16
-; SI-NEXT: s_lshr_b32 s39, s13, 16
-; SI-NEXT: s_lshr_b32 s38, s15, 16
-; SI-NEXT: s_lshr_b32 s37, s41, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s35, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s23, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s50, s5, 16
+; SI-NEXT: s_lshr_b32 s49, s7, 16
+; SI-NEXT: s_lshr_b32 s48, s9, 16
+; SI-NEXT: s_lshr_b32 s39, s11, 16
+; SI-NEXT: s_lshr_b32 s38, s13, 16
+; SI-NEXT: s_lshr_b32 s37, s15, 16
+; SI-NEXT: s_lshr_b32 s36, s41, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_lshr_b32 s34, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
@@ -16269,33 +16212,33 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: .LBB29_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s45, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s45, 1
; SI-NEXT: s_cbranch_scc1 .LBB29_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v27, s5, 1.0
@@ -16321,46 +16264,42 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v13, s29, 1.0
; SI-NEXT: v_add_f32_e64 v12, s28, 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[14:15], 16
-; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[12:13], 16
-; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
-; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[8:9], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
+; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16
+; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
+; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15
; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
+; SI-NEXT: v_mov_b32_e32 v51, v56
; SI-NEXT: s_branch .LBB29_6
; SI-NEXT: .LBB29_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -16391,21 +16330,21 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v57, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v56, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v47, s30
-; SI-NEXT: v_mov_b32_e32 v46, s31
-; SI-NEXT: v_mov_b32_e32 v45, s34
-; SI-NEXT: v_mov_b32_e32 v44, s35
-; SI-NEXT: v_mov_b32_e32 v43, s36
-; SI-NEXT: v_mov_b32_e32 v42, s37
-; SI-NEXT: v_mov_b32_e32 v41, s38
-; SI-NEXT: v_mov_b32_e32 v40, s39
-; SI-NEXT: v_mov_b32_e32 v55, s48
-; SI-NEXT: v_mov_b32_e32 v54, s49
-; SI-NEXT: v_mov_b32_e32 v53, s50
-; SI-NEXT: v_mov_b32_e32 v52, s51
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v47, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v46, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v45, s43
+; SI-NEXT: v_mov_b32_e32 v44, s30
+; SI-NEXT: v_mov_b32_e32 v43, s31
+; SI-NEXT: v_mov_b32_e32 v42, s34
+; SI-NEXT: v_mov_b32_e32 v41, s35
+; SI-NEXT: v_mov_b32_e32 v51, s36
+; SI-NEXT: v_mov_b32_e32 v40, s37
+; SI-NEXT: v_mov_b32_e32 v39, s38
+; SI-NEXT: v_mov_b32_e32 v55, s39
+; SI-NEXT: v_mov_b32_e32 v54, s48
+; SI-NEXT: v_mov_b32_e32 v53, s49
+; SI-NEXT: v_mov_b32_e32 v52, s50
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: v_mov_b32_e32 v29, s44
; SI-NEXT: v_mov_b32_e32 v30, s46
@@ -16421,19 +16360,11 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v49, s90
; SI-NEXT: v_mov_b32_e32 v50, s92
; SI-NEXT: .LBB29_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
@@ -16443,38 +16374,38 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47
+; SI-NEXT: v_or_b32_e32 v2, v2, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46
+; SI-NEXT: v_or_b32_e32 v4, v4, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT: v_or_b32_e32 v6, v6, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT: v_or_b32_e32 v8, v8, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT: v_or_b32_e32 v10, v10, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT: v_or_b32_e32 v12, v12, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_or_b32_e32 v14, v14, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT: v_or_b32_e32 v16, v16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
-; SI-NEXT: v_or_b32_e32 v18, v18, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
@@ -16483,14 +16414,20 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v14, v14, v34
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v51
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v18, v18, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT: v_or_b32_e32 v20, v20, v31
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
@@ -16503,8 +16440,10 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v26, v26, v28
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_readlane_b32 s30, v58, 10
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
+; SI-NEXT: v_readlane_b32 s30, v57, 9
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: v_or_b32_e32 v3, v3, v49
+; SI-NEXT: v_or_b32_e32 v5, v5, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v38
; SI-NEXT: v_or_b32_e32 v9, v9, v37
; SI-NEXT: v_or_b32_e32 v11, v11, v36
@@ -16516,19 +16455,18 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v23, v23, v30
; SI-NEXT: v_or_b32_e32 v25, v25, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_readlane_b32 s31, v58, 11
-; SI-NEXT: v_readlane_b32 s51, v58, 9
-; SI-NEXT: v_readlane_b32 s50, v58, 8
-; SI-NEXT: v_readlane_b32 s49, v58, 7
-; SI-NEXT: v_readlane_b32 s48, v58, 6
-; SI-NEXT: v_readlane_b32 s39, v58, 5
-; SI-NEXT: v_readlane_b32 s38, v58, 4
-; SI-NEXT: v_readlane_b32 s37, v58, 3
-; SI-NEXT: v_readlane_b32 s36, v58, 2
-; SI-NEXT: v_readlane_b32 s35, v58, 1
-; SI-NEXT: v_readlane_b32 s34, v58, 0
+; SI-NEXT: v_readlane_b32 s31, v57, 10
+; SI-NEXT: v_readlane_b32 s50, v57, 8
+; SI-NEXT: v_readlane_b32 s49, v57, 7
+; SI-NEXT: v_readlane_b32 s48, v57, 6
+; SI-NEXT: v_readlane_b32 s39, v57, 5
+; SI-NEXT: v_readlane_b32 s38, v57, 4
+; SI-NEXT: v_readlane_b32 s37, v57, 3
+; SI-NEXT: v_readlane_b32 s36, v57, 2
+; SI-NEXT: v_readlane_b32 s35, v57, 1
+; SI-NEXT: v_readlane_b32 s34, v57, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -18957,23 +18895,23 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s91, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; SI-NEXT: v_readfirstlane_b32 s35, v1
-; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_readfirstlane_b32 s81, v0
; SI-NEXT: s_lshr_b32 s78, s29, 16
; SI-NEXT: s_lshr_b32 s89, s28, 16
; SI-NEXT: s_lshr_b32 s92, s27, 16
; SI-NEXT: s_lshr_b32 s95, s26, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s34, s24, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 16
-; SI-NEXT: s_lshr_b32 s71, s22, 16
-; SI-NEXT: s_lshr_b32 s80, s21, 16
-; SI-NEXT: s_lshr_b32 s81, s20, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 16
-; SI-NEXT: s_lshr_b32 s83, s18, 16
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s83, s22, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s20, 16
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s18, 16
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s16, 16
+; SI-NEXT: s_lshr_b32 s85, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -18985,38 +18923,39 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s35, 16
-; SI-NEXT: s_lshr_b32 s69, s70, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s34, 16
+; SI-NEXT: s_lshr_b32 s82, s81, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB31_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s71, 16
+; SI-NEXT: s_or_b32 s37, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s68, 16
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
@@ -19033,10 +18972,10 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_and_b32 s4, s81, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
@@ -19073,11 +19012,12 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB31_3
; SI-NEXT: .LBB31_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB31_3: ; %Flow
@@ -19088,47 +19028,47 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -19155,14 +19095,14 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_add_i32 s4, s81, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s35, s35, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_add_i32 s4, s34, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
@@ -19223,7 +19163,7 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: .LBB31_5: ; %end
@@ -19330,220 +19270,156 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v28, s87, 29
; VI-NEXT: v_writelane_b32 v28, s30, 30
; VI-NEXT: v_writelane_b32 v28, s31, 31
-; VI-NEXT: v_readfirstlane_b32 s81, v13
-; VI-NEXT: v_readfirstlane_b32 s83, v12
-; VI-NEXT: v_readfirstlane_b32 s9, v11
-; VI-NEXT: v_readfirstlane_b32 s84, v10
-; VI-NEXT: v_readfirstlane_b32 s85, v9
-; VI-NEXT: v_readfirstlane_b32 s8, v8
-; VI-NEXT: v_readfirstlane_b32 s73, v7
-; VI-NEXT: v_readfirstlane_b32 s75, v6
-; VI-NEXT: v_readfirstlane_b32 s77, v5
+; VI-NEXT: v_readfirstlane_b32 s7, v13
+; VI-NEXT: v_readfirstlane_b32 s9, v12
+; VI-NEXT: v_readfirstlane_b32 s11, v11
+; VI-NEXT: v_readfirstlane_b32 s13, v10
+; VI-NEXT: v_readfirstlane_b32 s15, v9
+; VI-NEXT: v_readfirstlane_b32 s73, v8
+; VI-NEXT: v_readfirstlane_b32 s75, v7
+; VI-NEXT: v_readfirstlane_b32 s77, v6
+; VI-NEXT: v_readfirstlane_b32 s88, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
; VI-NEXT: v_readfirstlane_b32 s30, v3
; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s71, v1
-; VI-NEXT: v_readfirstlane_b32 s82, v0
-; VI-NEXT: s_lshr_b32 s79, s29, 16
-; VI-NEXT: s_lshr_b32 s90, s28, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s66, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s69, s23, 16
-; VI-NEXT: s_lshr_b32 s80, s22, 16
-; VI-NEXT: s_lshr_b32 s86, s21, 16
-; VI-NEXT: s_lshr_b32 s87, s20, 16
-; VI-NEXT: s_lshr_b32 s13, s19, 16
-; VI-NEXT: s_lshr_b32 s15, s18, 16
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: s_lshr_b32 s7, s16, 16
-; VI-NEXT: s_lshr_b32 s64, s81, 16
-; VI-NEXT: s_lshr_b32 s10, s83, 16
-; VI-NEXT: s_lshr_b32 s12, s9, 16
-; VI-NEXT: s_lshr_b32 s14, s84, 16
-; VI-NEXT: s_lshr_b32 s72, s85, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s73, 16
-; VI-NEXT: s_lshr_b32 s78, s75, 16
-; VI-NEXT: s_lshr_b32 s89, s77, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s65, s35, 16
-; VI-NEXT: s_lshr_b32 s67, s71, 16
-; VI-NEXT: s_lshr_b32 s70, s82, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s87, v1
+; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: s_lshr_b32 s78, s29, 16
+; VI-NEXT: s_lshr_b32 s89, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s27, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s85, s25, 16
+; VI-NEXT: s_lshr_b32 s67, s24, 16
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s63, s7, 16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s14, s15, 16
+; VI-NEXT: s_lshr_b32 s58, s73, 16
+; VI-NEXT: s_lshr_b32 s74, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s79, s88, 16
+; VI-NEXT: s_lshr_b32 s90, s91, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: s_lshr_b32 s86, s87, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
+; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v29, s12, 0
+; VI-NEXT: v_writelane_b32 v29, s14, 1
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s15, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s88, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s86, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s6, s81, 16
+; VI-NEXT: s_and_b32 s8, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s6, s80, 16
+; VI-NEXT: s_or_b32 s37, s8, s40
+; VI-NEXT: s_or_b32 s40, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s6, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s43, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s82
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s71
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s87
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s52, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s88
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s55, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s75
-; VI-NEXT: s_lshl_b32 s5, s78, 16
-; VI-NEXT: s_or_b32 s56, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_and_b32 s4, 0xffff, s77
; VI-NEXT: s_lshl_b32 s5, s76, 16
-; VI-NEXT: s_or_b32 s57, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
+; VI-NEXT: s_or_b32 s56, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_or_b32 s57, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s58, 16
+; VI-NEXT: s_mov_b32 s72, s58
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s85
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s84
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
+; VI-NEXT: s_or_b32 s59, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s60, 16
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s63, 16
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s63
; VI-NEXT: s_or_b32 s63, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
-; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: v_writelane_b32 v29, s26, 0
-; VI-NEXT: s_mov_b32 s26, s27
-; VI-NEXT: s_mov_b32 s27, s77
-; VI-NEXT: v_writelane_b32 v29, s91, 1
-; VI-NEXT: s_mov_b32 s91, s88
-; VI-NEXT: s_mov_b32 s88, s28
-; VI-NEXT: s_mov_b32 s28, s75
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s81
-; VI-NEXT: s_mov_b32 s81, s68
-; VI-NEXT: s_mov_b32 s68, s34
-; VI-NEXT: s_mov_b32 s34, s31
-; VI-NEXT: s_mov_b32 s31, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s90
-; VI-NEXT: s_mov_b32 s90, s89
-; VI-NEXT: s_mov_b32 s89, s79
-; VI-NEXT: s_mov_b32 s79, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s72
-; VI-NEXT: s_mov_b32 s72, s14
-; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s72, s58
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s10, s64
-; VI-NEXT: s_mov_b32 s9, s83
-; VI-NEXT: s_mov_b32 s83, s69
-; VI-NEXT: s_mov_b32 s69, s65
-; VI-NEXT: s_mov_b32 s6, s13
-; VI-NEXT: s_mov_b32 s13, s84
-; VI-NEXT: s_mov_b32 s84, s70
-; VI-NEXT: s_mov_b32 s70, s66
-; VI-NEXT: s_mov_b32 s75, s73
-; VI-NEXT: s_mov_b32 s73, s8
-; VI-NEXT: s_mov_b32 s8, s15
-; VI-NEXT: s_mov_b32 s15, s85
-; VI-NEXT: s_mov_b32 s85, s80
-; VI-NEXT: s_mov_b32 s80, s67
+; VI-NEXT: s_mov_b32 s10, s63
+; VI-NEXT: s_mov_b32 s8, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s80
-; VI-NEXT: s_mov_b32 s80, s85
-; VI-NEXT: s_mov_b32 s85, s15
-; VI-NEXT: s_mov_b32 s15, s8
-; VI-NEXT: s_mov_b32 s8, s73
-; VI-NEXT: s_mov_b32 s73, s75
-; VI-NEXT: s_mov_b32 s66, s70
-; VI-NEXT: s_mov_b32 s70, s84
-; VI-NEXT: s_mov_b32 s84, s13
-; VI-NEXT: s_mov_b32 s13, s6
-; VI-NEXT: s_mov_b32 s65, s69
-; VI-NEXT: s_mov_b32 s69, s83
-; VI-NEXT: s_mov_b32 s83, s9
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s64, s10
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s14, s72
-; VI-NEXT: s_mov_b32 s72, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s79
-; VI-NEXT: s_mov_b32 s79, s89
-; VI-NEXT: s_mov_b32 s89, s90
-; VI-NEXT: s_mov_b32 s90, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s31
-; VI-NEXT: s_mov_b32 s31, s34
-; VI-NEXT: s_mov_b32 s34, s68
-; VI-NEXT: s_mov_b32 s68, s81
-; VI-NEXT: s_mov_b32 s81, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s75, s28
-; VI-NEXT: s_mov_b32 s28, s88
-; VI-NEXT: s_mov_b32 s88, s91
-; VI-NEXT: v_readlane_b32 s91, v29, 1
-; VI-NEXT: s_mov_b32 s77, s27
-; VI-NEXT: s_mov_b32 s27, s26
-; VI-NEXT: v_readlane_b32 s26, v29, 0
+; VI-NEXT: s_mov_b32 s67, s8
; VI-NEXT: .LBB31_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -19552,142 +19428,144 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s6, s88, 16
-; VI-NEXT: s_or_b32 s5, s6, s5
+; VI-NEXT: s_lshl_b32 s8, s83, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s15, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s87, 16
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s82, s82, 3
+; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s82, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, s69, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s71, s71, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s71, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_add_i32 s4, s87, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s35, s35, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s35, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s91, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s77, 3
+; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s88, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s75, 3
+; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s73, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s8, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s85, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 1
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s84, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s9, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 0
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s12, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s83, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s10, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s81, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
@@ -21016,30 +20894,28 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v58, s34, 0
-; SI-NEXT: v_writelane_b32 v58, s35, 1
-; SI-NEXT: v_writelane_b32 v58, s36, 2
-; SI-NEXT: v_writelane_b32 v58, s37, 3
-; SI-NEXT: v_writelane_b32 v58, s38, 4
-; SI-NEXT: v_writelane_b32 v58, s39, 5
-; SI-NEXT: v_writelane_b32 v58, s48, 6
-; SI-NEXT: v_writelane_b32 v58, s49, 7
-; SI-NEXT: v_writelane_b32 v58, s50, 8
-; SI-NEXT: v_writelane_b32 v58, s51, 9
-; SI-NEXT: v_writelane_b32 v58, s30, 10
-; SI-NEXT: v_writelane_b32 v58, s31, 11
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v57, s34, 0
+; SI-NEXT: v_writelane_b32 v57, s35, 1
+; SI-NEXT: v_writelane_b32 v57, s36, 2
+; SI-NEXT: v_writelane_b32 v57, s37, 3
+; SI-NEXT: v_writelane_b32 v57, s38, 4
+; SI-NEXT: v_writelane_b32 v57, s39, 5
+; SI-NEXT: v_writelane_b32 v57, s48, 6
+; SI-NEXT: v_writelane_b32 v57, s49, 7
+; SI-NEXT: v_writelane_b32 v57, s50, 8
+; SI-NEXT: v_writelane_b32 v57, s30, 9
+; SI-NEXT: v_writelane_b32 v57, s31, 10
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -21058,21 +20934,22 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s40, v0
; SI-NEXT: s_cbranch_scc0 .LBB33_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s51, s5, 16
-; SI-NEXT: s_lshr_b32 s50, s7, 16
-; SI-NEXT: s_lshr_b32 s49, s9, 16
-; SI-NEXT: s_lshr_b32 s48, s11, 16
-; SI-NEXT: s_lshr_b32 s39, s13, 16
-; SI-NEXT: s_lshr_b32 s38, s15, 16
-; SI-NEXT: s_lshr_b32 s37, s41, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s35, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s23, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s50, s5, 16
+; SI-NEXT: s_lshr_b32 s49, s7, 16
+; SI-NEXT: s_lshr_b32 s48, s9, 16
+; SI-NEXT: s_lshr_b32 s39, s11, 16
+; SI-NEXT: s_lshr_b32 s38, s13, 16
+; SI-NEXT: s_lshr_b32 s37, s15, 16
+; SI-NEXT: s_lshr_b32 s36, s41, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_lshr_b32 s34, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
@@ -21095,33 +20972,33 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: .LBB33_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s45, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s45, 1
; SI-NEXT: s_cbranch_scc1 .LBB33_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v27, s5, 1.0
@@ -21147,46 +21024,42 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v13, s29, 1.0
; SI-NEXT: v_add_f32_e64 v12, s28, 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[14:15], 16
-; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[12:13], 16
-; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
-; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[8:9], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
+; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16
+; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
+; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15
; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
+; SI-NEXT: v_mov_b32_e32 v51, v56
; SI-NEXT: s_branch .LBB33_6
; SI-NEXT: .LBB33_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -21217,21 +21090,21 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v57, vcc_lo
-; SI-NEXT: v_mov_b32_e32 v56, vcc_hi
-; SI-NEXT: v_mov_b32_e32 v47, s30
-; SI-NEXT: v_mov_b32_e32 v46, s31
-; SI-NEXT: v_mov_b32_e32 v45, s34
-; SI-NEXT: v_mov_b32_e32 v44, s35
-; SI-NEXT: v_mov_b32_e32 v43, s36
-; SI-NEXT: v_mov_b32_e32 v42, s37
-; SI-NEXT: v_mov_b32_e32 v41, s38
-; SI-NEXT: v_mov_b32_e32 v40, s39
-; SI-NEXT: v_mov_b32_e32 v55, s48
-; SI-NEXT: v_mov_b32_e32 v54, s49
-; SI-NEXT: v_mov_b32_e32 v53, s50
-; SI-NEXT: v_mov_b32_e32 v52, s51
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v47, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v46, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v45, s43
+; SI-NEXT: v_mov_b32_e32 v44, s30
+; SI-NEXT: v_mov_b32_e32 v43, s31
+; SI-NEXT: v_mov_b32_e32 v42, s34
+; SI-NEXT: v_mov_b32_e32 v41, s35
+; SI-NEXT: v_mov_b32_e32 v51, s36
+; SI-NEXT: v_mov_b32_e32 v40, s37
+; SI-NEXT: v_mov_b32_e32 v39, s38
+; SI-NEXT: v_mov_b32_e32 v55, s39
+; SI-NEXT: v_mov_b32_e32 v54, s48
+; SI-NEXT: v_mov_b32_e32 v53, s49
+; SI-NEXT: v_mov_b32_e32 v52, s50
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: v_mov_b32_e32 v29, s44
; SI-NEXT: v_mov_b32_e32 v30, s46
@@ -21247,19 +21120,11 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v49, s90
; SI-NEXT: v_mov_b32_e32 v50, s92
; SI-NEXT: .LBB33_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
@@ -21269,38 +21134,38 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47
+; SI-NEXT: v_or_b32_e32 v2, v2, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46
+; SI-NEXT: v_or_b32_e32 v4, v4, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT: v_or_b32_e32 v6, v6, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT: v_or_b32_e32 v8, v8, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT: v_or_b32_e32 v10, v10, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT: v_or_b32_e32 v12, v12, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
-; SI-NEXT: v_or_b32_e32 v14, v14, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT: v_or_b32_e32 v16, v16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
-; SI-NEXT: v_or_b32_e32 v18, v18, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
@@ -21309,14 +21174,20 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_or_b32_e32 v14, v14, v34
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v51
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v18, v18, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT: v_or_b32_e32 v20, v20, v31
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
@@ -21329,8 +21200,10 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v26, v26, v28
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_readlane_b32 s30, v58, 10
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
+; SI-NEXT: v_readlane_b32 s30, v57, 9
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: v_or_b32_e32 v3, v3, v49
+; SI-NEXT: v_or_b32_e32 v5, v5, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v38
; SI-NEXT: v_or_b32_e32 v9, v9, v37
; SI-NEXT: v_or_b32_e32 v11, v11, v36
@@ -21342,19 +21215,18 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v23, v23, v30
; SI-NEXT: v_or_b32_e32 v25, v25, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_readlane_b32 s31, v58, 11
-; SI-NEXT: v_readlane_b32 s51, v58, 9
-; SI-NEXT: v_readlane_b32 s50, v58, 8
-; SI-NEXT: v_readlane_b32 s49, v58, 7
-; SI-NEXT: v_readlane_b32 s48, v58, 6
-; SI-NEXT: v_readlane_b32 s39, v58, 5
-; SI-NEXT: v_readlane_b32 s38, v58, 4
-; SI-NEXT: v_readlane_b32 s37, v58, 3
-; SI-NEXT: v_readlane_b32 s36, v58, 2
-; SI-NEXT: v_readlane_b32 s35, v58, 1
-; SI-NEXT: v_readlane_b32 s34, v58, 0
+; SI-NEXT: v_readlane_b32 s31, v57, 10
+; SI-NEXT: v_readlane_b32 s50, v57, 8
+; SI-NEXT: v_readlane_b32 s49, v57, 7
+; SI-NEXT: v_readlane_b32 s48, v57, 6
+; SI-NEXT: v_readlane_b32 s39, v57, 5
+; SI-NEXT: v_readlane_b32 s38, v57, 4
+; SI-NEXT: v_readlane_b32 s37, v57, 3
+; SI-NEXT: v_readlane_b32 s36, v57, 2
+; SI-NEXT: v_readlane_b32 s35, v57, 1
+; SI-NEXT: v_readlane_b32 s34, v57, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -23921,13 +23793,13 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s92, v2
; SI-NEXT: v_readfirstlane_b32 s95, v1
-; SI-NEXT: v_readfirstlane_b32 s30, v0
+; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_lshr_b32 s94, s29, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s28, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s68, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s35, s25, 16
+; SI-NEXT: s_lshr_b32 s68, s24, 16
; SI-NEXT: s_lshr_b32 s70, s23, 16
; SI-NEXT: s_lshr_b32 s71, s22, 16
; SI-NEXT: s_lshr_b32 s80, s21, 16
@@ -23936,7 +23808,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s83, s18, 16
; SI-NEXT: s_lshr_b32 s84, s17, 16
; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s69, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -23949,55 +23821,56 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s95, 16
-; SI-NEXT: s_lshr_b32 s34, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB35_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s95, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -24036,11 +23909,12 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB35_3
; SI-NEXT: .LBB35_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB35_3: ; %Flow
@@ -24111,11 +23985,11 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s68
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v9, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
@@ -24126,7 +24000,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s34
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -24135,7 +24009,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s30
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
@@ -24159,10 +24033,10 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_or_b32_e32 v12, v14, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s31
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s7
; SI-NEXT: v_cvt_f32_f16_e32 v16, vcc_hi
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
@@ -24259,7 +24133,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v25, v27, v25
; SI-NEXT: v_cvt_f32_f16_e32 v27, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s69
; SI-NEXT: v_cvt_f32_f16_e32 v29, s6
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
@@ -24393,24 +24267,24 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s76, v6
; VI-NEXT: v_readfirstlane_b32 s79, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
-; VI-NEXT: v_readfirstlane_b32 s30, v3
-; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s70, v1
-; VI-NEXT: v_readfirstlane_b32 s81, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v3
+; VI-NEXT: v_readfirstlane_b32 s34, v2
+; VI-NEXT: v_readfirstlane_b32 s69, v1
+; VI-NEXT: v_readfirstlane_b32 s80, v0
; VI-NEXT: s_lshr_b32 s56, s29, 16
; VI-NEXT: s_lshr_b32 s61, s28, 16
; VI-NEXT: s_lshr_b32 s90, s27, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; VI-NEXT: s_lshr_b32 s34, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s71, s23, 16
-; VI-NEXT: s_lshr_b32 s82, s22, 16
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s85, s20, 16
-; VI-NEXT: s_lshr_b32 s86, s19, 16
-; VI-NEXT: s_lshr_b32 s87, s18, 16
-; VI-NEXT: s_lshr_b32 s7, s17, 16
-; VI-NEXT: s_lshr_b32 s9, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s25, 16
+; VI-NEXT: s_lshr_b32 s35, s24, 16
+; VI-NEXT: s_lshr_b32 s70, s23, 16
+; VI-NEXT: s_lshr_b32 s81, s22, 16
+; VI-NEXT: s_lshr_b32 s83, s21, 16
+; VI-NEXT: s_lshr_b32 s84, s20, 16
+; VI-NEXT: s_lshr_b32 s85, s19, 16
+; VI-NEXT: s_lshr_b32 s86, s18, 16
+; VI-NEXT: s_lshr_b32 s87, s17, 16
+; VI-NEXT: s_lshr_b32 s7, s16, 16
; VI-NEXT: s_lshr_b32 s63, s6, 16
; VI-NEXT: s_lshr_b32 s11, s8, 16
; VI-NEXT: s_lshr_b32 s13, s10, 16
@@ -24421,70 +24295,71 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; VI-NEXT: s_lshr_b32 s60, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s69, s35, 16
-; VI-NEXT: s_lshr_b32 s80, s70, 16
-; VI-NEXT: s_lshr_b32 s83, s81, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: s_lshr_b32 s68, s34, 16
+; VI-NEXT: s_lshr_b32 s71, s69, 16
+; VI-NEXT: s_lshr_b32 s82, s80, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s15, 0
; VI-NEXT: v_writelane_b32 v33, s59, 1
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s9, s7, 16
+; VI-NEXT: s_or_b32 s36, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s9, s86, 16
+; VI-NEXT: s_or_b32 s38, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s9, s85, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s7, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s41, s87, 16
+; VI-NEXT: s_or_b32 s39, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s9, s84, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s61, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s70
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_or_b32 s40, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s9, s83, 16
+; VI-NEXT: s_or_b32 s41, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s9, s81, 16
+; VI-NEXT: s_or_b32 s42, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s9, s70, 16
+; VI-NEXT: s_or_b32 s43, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s9, s35, 16
+; VI-NEXT: s_or_b32 s44, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s9, s31, 16
+; VI-NEXT: s_or_b32 s45, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; VI-NEXT: s_or_b32 s46, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s9, s90, 16
+; VI-NEXT: s_or_b32 s47, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s9, s61, 16
+; VI-NEXT: s_or_b32 s48, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s9, s56, 16
+; VI-NEXT: s_or_b32 s49, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s80
+; VI-NEXT: s_lshl_b32 s9, s82, 16
+; VI-NEXT: s_or_b32 s50, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s9, s71, 16
+; VI-NEXT: s_or_b32 s51, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s34
+; VI-NEXT: s_lshl_b32 s9, s68, 16
+; VI-NEXT: s_or_b32 s52, s5, s9
+; VI-NEXT: s_mov_b32 s9, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -24535,6 +24410,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; VI-NEXT: s_mov_b32 s15, s13
; VI-NEXT: s_mov_b32 s13, s11
; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s9, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -24544,43 +24420,43 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v27, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s9
-; VI-NEXT: v_mov_b32_e32 v2, s7
+; VI-NEXT: v_mov_b32_e32 v0, s7
+; VI-NEXT: v_mov_b32_e32 v2, s87
; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v27
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v27
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s87
+; VI-NEXT: v_mov_b32_e32 v2, s86
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v27
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s86
+; VI-NEXT: v_mov_b32_e32 v3, s85
; VI-NEXT: v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v27
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s85
+; VI-NEXT: v_mov_b32_e32 v4, s84
; VI-NEXT: v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v27
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s84
+; VI-NEXT: v_mov_b32_e32 v5, s83
; VI-NEXT: v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v27
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s82
+; VI-NEXT: v_mov_b32_e32 v6, s81
; VI-NEXT: v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v27
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s71
+; VI-NEXT: v_mov_b32_e32 v7, s70
; VI-NEXT: v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v27
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s68
+; VI-NEXT: v_mov_b32_e32 v8, s35
; VI-NEXT: v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v27
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s34
+; VI-NEXT: v_mov_b32_e32 v9, s31
; VI-NEXT: v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v27
; VI-NEXT: v_or_b32_e32 v9, v10, v9
@@ -24600,21 +24476,21 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v27
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s83
+; VI-NEXT: v_mov_b32_e32 v14, s82
; VI-NEXT: v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s81, v27
+; VI-NEXT: v_add_f16_e32 v15, s80, v27
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s80
+; VI-NEXT: v_mov_b32_e32 v15, s71
; VI-NEXT: v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s70, v27
+; VI-NEXT: v_add_f16_e32 v16, s69, v27
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s69
+; VI-NEXT: v_mov_b32_e32 v16, s68
; VI-NEXT: v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s35, v27
+; VI-NEXT: v_add_f16_e32 v17, s34, v27
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s31
+; VI-NEXT: v_mov_b32_e32 v17, s30
; VI-NEXT: v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s30, v27
+; VI-NEXT: v_add_f16_e32 v18, s9, v27
; VI-NEXT: v_or_b32_e32 v17, v18, v17
; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
; VI-NEXT: v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -27216,20 +27092,11 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v28, s34, 0
-; SI-NEXT: v_writelane_b32 v28, s35, 1
-; SI-NEXT: v_writelane_b32 v28, s36, 2
-; SI-NEXT: v_writelane_b32 v28, s37, 3
-; SI-NEXT: v_writelane_b32 v28, s38, 4
-; SI-NEXT: v_writelane_b32 v28, s39, 5
-; SI-NEXT: v_writelane_b32 v28, s48, 6
-; SI-NEXT: v_writelane_b32 v28, s49, 7
-; SI-NEXT: v_writelane_b32 v28, s50, 8
-; SI-NEXT: v_writelane_b32 v28, s51, 9
-; SI-NEXT: v_writelane_b32 v28, s30, 10
-; SI-NEXT: v_writelane_b32 v28, s31, 11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v28, s30, 0
+; SI-NEXT: v_writelane_b32 v28, s31, 1
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -27246,72 +27113,111 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s41, v1
; SI-NEXT: s_cmp_lg_u32 s40, 0
; SI-NEXT: v_readfirstlane_b32 s40, v0
+; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB41_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s42, s7, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v29, s42, 11
+; SI-NEXT: s_lshr_b32 s42, s11, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 0
+; SI-NEXT: s_lshr_b32 s42, s13, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 1
+; SI-NEXT: s_lshr_b32 s42, s15, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 2
+; SI-NEXT: s_lshr_b32 s42, s41, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 3
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 4
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 5
+; SI-NEXT: s_lshr_b32 s42, s25, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 6
+; SI-NEXT: s_lshr_b32 s42, s23, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 7
+; SI-NEXT: s_lshr_b32 s42, s21, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 8
+; SI-NEXT: s_lshr_b32 s42, s19, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 9
+; SI-NEXT: s_lshr_b32 s42, s17, 16
+; SI-NEXT: s_lshr_b32 s88, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s9, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 10
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: s_mov_b64 s[94:95], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: s_mov_b64 s[94:95], -1
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
; SI-NEXT: s_cselect_b32 s43, 1, 0
; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_mov_b32 s94, s89
+; SI-NEXT: v_readlane_b32 s95, v29, 0
+; SI-NEXT: v_readlane_b32 s43, v29, 1
+; SI-NEXT: v_readlane_b32 s45, v29, 2
+; SI-NEXT: v_readlane_b32 s57, v29, 3
+; SI-NEXT: v_readlane_b32 s59, v29, 4
+; SI-NEXT: v_readlane_b32 s47, v29, 5
+; SI-NEXT: v_readlane_b32 s30, v29, 6
+; SI-NEXT: v_readlane_b32 s61, v29, 7
+; SI-NEXT: v_readlane_b32 s63, v29, 8
+; SI-NEXT: v_readlane_b32 s31, v29, 9
+; SI-NEXT: v_readlane_b32 s73, v29, 10
+; SI-NEXT: v_readlane_b32 s89, v29, 11
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -27342,120 +27248,128 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: s_lshr_b32 s43, s23, 16
+; SI-NEXT: s_lshr_b32 s72, s21, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s76, s13, 16
+; SI-NEXT: s_lshr_b32 s77, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s41, 16
+; SI-NEXT: s_lshr_b32 s79, s29, 16
+; SI-NEXT: s_lshr_b32 s74, s17, 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_mov_b32 s47, s42
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_mov_b32 s61, s43
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s88, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s7, 16
+; SI-NEXT: s_lshr_b32 s94, s9, 16
+; SI-NEXT: s_lshr_b32 s95, s11, 16
+; SI-NEXT: s_lshr_b32 s30, s25, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_mov_b32 s59, s79
+; SI-NEXT: s_mov_b32 s57, s78
+; SI-NEXT: s_mov_b32 s45, s77
+; SI-NEXT: s_mov_b32 s43, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_lshl_b32 s43, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s43
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s51, 16
-; SI-NEXT: s_or_b32 s17, s17, s43
-; SI-NEXT: s_lshl_b32 s43, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s43
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s50, 16
-; SI-NEXT: s_or_b32 s19, s19, s43
-; SI-NEXT: s_lshl_b32 s43, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s43
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s49, 16
-; SI-NEXT: s_or_b32 s21, s21, s43
-; SI-NEXT: s_lshl_b32 s43, s78, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s43
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s48, 16
-; SI-NEXT: s_or_b32 s23, s23, s43
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s76, 16
-; SI-NEXT: s_or_b32 s24, s24, s43
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s24, s24, s42
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s39, 16
-; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_lshl_b32 s42, s30, 16
+; SI-NEXT: s_or_b32 s25, s25, s42
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s74, 16
-; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s26, s26, s42
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s38, 16
-; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_lshl_b32 s42, s47, 16
+; SI-NEXT: s_or_b32 s27, s27, s42
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s72, 16
-; SI-NEXT: s_or_b32 s28, s28, s43
+; SI-NEXT: s_lshl_b32 s42, s74, 16
+; SI-NEXT: s_or_b32 s28, s28, s42
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s37, 16
-; SI-NEXT: s_or_b32 s29, s29, s43
+; SI-NEXT: s_lshl_b32 s42, s59, 16
+; SI-NEXT: s_or_b32 s29, s29, s42
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s43
+; SI-NEXT: s_lshl_b32 s42, s72, 16
+; SI-NEXT: s_or_b32 s40, s40, s42
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s36, 16
-; SI-NEXT: s_or_b32 s41, s41, s43
+; SI-NEXT: s_lshl_b32 s42, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s42
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
-; SI-NEXT: s_or_b32 s14, s14, s43
+; SI-NEXT: s_lshl_b32 s42, s62, 16
+; SI-NEXT: s_or_b32 s14, s14, s42
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s35, 16
-; SI-NEXT: s_or_b32 s15, s15, s43
+; SI-NEXT: s_lshl_b32 s42, s45, 16
+; SI-NEXT: s_or_b32 s15, s15, s42
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s58, 16
-; SI-NEXT: s_or_b32 s12, s12, s43
+; SI-NEXT: s_lshl_b32 s42, s60, 16
+; SI-NEXT: s_or_b32 s12, s12, s42
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s34, 16
-; SI-NEXT: s_or_b32 s13, s13, s43
+; SI-NEXT: s_lshl_b32 s42, s43, 16
+; SI-NEXT: s_or_b32 s13, s13, s42
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s56, 16
-; SI-NEXT: s_or_b32 s10, s10, s43
+; SI-NEXT: s_lshl_b32 s42, s58, 16
+; SI-NEXT: s_or_b32 s10, s10, s42
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s31, 16
-; SI-NEXT: s_or_b32 s11, s11, s43
+; SI-NEXT: s_lshl_b32 s42, s95, 16
+; SI-NEXT: s_or_b32 s11, s11, s42
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s46, 16
-; SI-NEXT: s_or_b32 s8, s8, s43
+; SI-NEXT: s_lshl_b32 s42, s56, 16
+; SI-NEXT: s_or_b32 s8, s8, s42
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s30, 16
-; SI-NEXT: s_or_b32 s9, s9, s43
+; SI-NEXT: s_lshl_b32 s42, s94, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_or_b32 s9, s9, s42
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s44, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_or_b32 s6, s6, s43
+; SI-NEXT: s_lshl_b32 s42, s46, 16
+; SI-NEXT: s_or_b32 s17, s17, s73
+; SI-NEXT: s_lshl_b32 s73, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s6, s6, s42
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s42, s89, 16
+; SI-NEXT: s_or_b32 s18, s18, s73
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s31, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s63, s63, 16
+; SI-NEXT: s_or_b32 s7, s7, s42
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s44, 16
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s63
+; SI-NEXT: s_lshl_b32 s63, s76, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
-; SI-NEXT: s_or_b32 s7, s7, s43
+; SI-NEXT: s_lshl_b32 s42, s88, 16
+; SI-NEXT: s_or_b32 s16, s16, s75
+; SI-NEXT: s_or_b32 s20, s20, s73
+; SI-NEXT: s_or_b32 s22, s22, s63
+; SI-NEXT: s_or_b32 s23, s23, s61
; SI-NEXT: s_or_b32 s5, s5, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 10
+; SI-NEXT: v_readlane_b32 s30, v28, 0
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -27484,19 +27398,11 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: v_readlane_b32 s31, v28, 11
-; SI-NEXT: v_readlane_b32 s51, v28, 9
-; SI-NEXT: v_readlane_b32 s50, v28, 8
-; SI-NEXT: v_readlane_b32 s49, v28, 7
-; SI-NEXT: v_readlane_b32 s48, v28, 6
-; SI-NEXT: v_readlane_b32 s39, v28, 5
-; SI-NEXT: v_readlane_b32 s38, v28, 4
-; SI-NEXT: v_readlane_b32 s37, v28, 3
-; SI-NEXT: v_readlane_b32 s36, v28, 2
-; SI-NEXT: v_readlane_b32 s35, v28, 1
-; SI-NEXT: v_readlane_b32 s34, v28, 0
+; SI-NEXT: v_readlane_b32 s31, v28, 1
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -27507,8 +27413,6 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v28, s30, 0
-; VI-NEXT: v_writelane_b32 v28, s31, 1
; VI-NEXT: v_readfirstlane_b32 s4, v14
; VI-NEXT: v_readfirstlane_b32 s6, v13
; VI-NEXT: v_readfirstlane_b32 s7, v12
@@ -27525,43 +27429,49 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s42, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s43, v0
+; VI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB41_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 1
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB41_3
; VI-NEXT: .LBB41_2:
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; kill: killed $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $vcc_hi
+; VI-NEXT: ; kill: killed $sgpr45
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $sgpr90
@@ -27586,11 +27496,12 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $sgpr45
-; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: .LBB41_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: v_readlane_b32 s4, v28, 0
+; VI-NEXT: v_readlane_b32 s5, v28, 1
; VI-NEXT: s_cbranch_scc1 .LBB41_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s7, s7, 3
@@ -27621,124 +27532,123 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; VI-NEXT: s_addc_u32 s19, s19, 0
; VI-NEXT: s_add_u32 s16, s16, 3
; VI-NEXT: s_addc_u32 s17, s17, 0
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s5, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: .LBB41_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s30, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, vcc_lo, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s18, s5
+; VI-NEXT: s_and_b32 s18, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s18, s4
; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s91, 16
+; VI-NEXT: s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT: s_or_b32 s18, s18, s19
; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s90, 16
+; VI-NEXT: s_lshl_b32 s20, s91, 16
; VI-NEXT: s_or_b32 s19, s19, s20
; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, s89, 16
+; VI-NEXT: s_lshl_b32 s21, s90, 16
; VI-NEXT: s_or_b32 s20, s20, s21
; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, s88, 16
+; VI-NEXT: s_lshl_b32 s22, s89, 16
; VI-NEXT: s_or_b32 s21, s21, s22
; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s79, 16
+; VI-NEXT: s_lshl_b32 s23, s88, 16
; VI-NEXT: s_or_b32 s22, s22, s23
; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s78, 16
+; VI-NEXT: s_lshl_b32 s24, s79, 16
; VI-NEXT: s_or_b32 s23, s23, s24
; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s77, 16
+; VI-NEXT: s_lshl_b32 s25, s78, 16
; VI-NEXT: s_or_b32 s24, s24, s25
; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s76, 16
+; VI-NEXT: s_lshl_b32 s26, s77, 16
; VI-NEXT: s_or_b32 s25, s25, s26
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s75, 16
+; VI-NEXT: s_lshl_b32 s27, s76, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s74, 16
+; VI-NEXT: s_lshl_b32 s28, s75, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s29, s73, 16
+; VI-NEXT: s_lshl_b32 s29, s74, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s42, s72, 16
+; VI-NEXT: s_lshl_b32 s42, s73, 16
; VI-NEXT: s_or_b32 s29, s29, s42
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s42, s63, 16
+; VI-NEXT: s_lshl_b32 s42, s72, 16
; VI-NEXT: s_or_b32 s41, s41, s42
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s42, s62, 16
+; VI-NEXT: s_lshl_b32 s42, s63, 16
; VI-NEXT: s_or_b32 s40, s40, s42
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s42, s61, 16
+; VI-NEXT: s_lshl_b32 s42, s62, 16
; VI-NEXT: s_or_b32 s15, s15, s42
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s42, s60, 16
+; VI-NEXT: s_lshl_b32 s42, s61, 16
; VI-NEXT: s_or_b32 s14, s14, s42
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s42, s59, 16
+; VI-NEXT: s_lshl_b32 s42, s60, 16
; VI-NEXT: s_or_b32 s13, s13, s42
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s42, s58, 16
+; VI-NEXT: s_lshl_b32 s42, s59, 16
; VI-NEXT: s_or_b32 s12, s12, s42
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s42, s57, 16
+; VI-NEXT: s_lshl_b32 s42, s58, 16
; VI-NEXT: s_or_b32 s11, s11, s42
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s42, s56, 16
+; VI-NEXT: s_lshl_b32 s42, s57, 16
; VI-NEXT: s_or_b32 s10, s10, s42
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_lshl_b32 s42, s56, 16
; VI-NEXT: s_or_b32 s9, s9, s42
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s44, s44, 16
; VI-NEXT: s_or_b32 s8, s8, s42
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_or_b32 s16, s16, s44
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s44, vcc_hi, 16
; VI-NEXT: s_or_b32 s7, s7, s42
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s42, s44, 16
+; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_or_b32 s17, s17, s44
; VI-NEXT: s_or_b32 s6, s6, s42
-; VI-NEXT: v_readlane_b32 s30, v28, 0
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_mov_b32_e32 v4, s18
; VI-NEXT: v_mov_b32_e32 v5, s19
; VI-NEXT: v_mov_b32_e32 v6, s20
@@ -27763,7 +27673,6 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v25, s8
; VI-NEXT: v_mov_b32_e32 v26, s7
; VI-NEXT: v_mov_b32_e32 v27, s6
-; VI-NEXT: v_readlane_b32 s31, v28, 1
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
@@ -29587,23 +29496,23 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s91, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; SI-NEXT: v_readfirstlane_b32 s35, v1
-; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_readfirstlane_b32 s81, v0
; SI-NEXT: s_lshr_b32 s78, s29, 16
; SI-NEXT: s_lshr_b32 s89, s28, 16
; SI-NEXT: s_lshr_b32 s92, s27, 16
; SI-NEXT: s_lshr_b32 s95, s26, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s34, s24, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 16
-; SI-NEXT: s_lshr_b32 s71, s22, 16
-; SI-NEXT: s_lshr_b32 s80, s21, 16
-; SI-NEXT: s_lshr_b32 s81, s20, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 16
-; SI-NEXT: s_lshr_b32 s83, s18, 16
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s83, s22, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s20, 16
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s18, 16
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s16, 16
+; SI-NEXT: s_lshr_b32 s85, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -29615,38 +29524,39 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s35, 16
-; SI-NEXT: s_lshr_b32 s69, s70, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s34, 16
+; SI-NEXT: s_lshr_b32 s82, s81, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s71, 16
+; SI-NEXT: s_or_b32 s37, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s68, 16
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
@@ -29663,10 +29573,10 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_and_b32 s4, s81, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
@@ -29703,11 +29613,12 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB43_3: ; %Flow
@@ -29718,47 +29629,47 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -29785,14 +29696,14 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_add_i32 s4, s81, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s35, s35, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_add_i32 s4, s34, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
@@ -29853,7 +29764,7 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: .LBB43_5: ; %end
@@ -29960,220 +29871,156 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v28, s87, 29
; VI-NEXT: v_writelane_b32 v28, s30, 30
; VI-NEXT: v_writelane_b32 v28, s31, 31
-; VI-NEXT: v_readfirstlane_b32 s81, v13
-; VI-NEXT: v_readfirstlane_b32 s83, v12
-; VI-NEXT: v_readfirstlane_b32 s9, v11
-; VI-NEXT: v_readfirstlane_b32 s84, v10
-; VI-NEXT: v_readfirstlane_b32 s85, v9
-; VI-NEXT: v_readfirstlane_b32 s8, v8
-; VI-NEXT: v_readfirstlane_b32 s73, v7
-; VI-NEXT: v_readfirstlane_b32 s75, v6
-; VI-NEXT: v_readfirstlane_b32 s77, v5
+; VI-NEXT: v_readfirstlane_b32 s7, v13
+; VI-NEXT: v_readfirstlane_b32 s9, v12
+; VI-NEXT: v_readfirstlane_b32 s11, v11
+; VI-NEXT: v_readfirstlane_b32 s13, v10
+; VI-NEXT: v_readfirstlane_b32 s15, v9
+; VI-NEXT: v_readfirstlane_b32 s73, v8
+; VI-NEXT: v_readfirstlane_b32 s75, v7
+; VI-NEXT: v_readfirstlane_b32 s77, v6
+; VI-NEXT: v_readfirstlane_b32 s88, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
; VI-NEXT: v_readfirstlane_b32 s30, v3
; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s71, v1
-; VI-NEXT: v_readfirstlane_b32 s82, v0
-; VI-NEXT: s_lshr_b32 s79, s29, 16
-; VI-NEXT: s_lshr_b32 s90, s28, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s66, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s69, s23, 16
-; VI-NEXT: s_lshr_b32 s80, s22, 16
-; VI-NEXT: s_lshr_b32 s86, s21, 16
-; VI-NEXT: s_lshr_b32 s87, s20, 16
-; VI-NEXT: s_lshr_b32 s13, s19, 16
-; VI-NEXT: s_lshr_b32 s15, s18, 16
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: s_lshr_b32 s7, s16, 16
-; VI-NEXT: s_lshr_b32 s64, s81, 16
-; VI-NEXT: s_lshr_b32 s10, s83, 16
-; VI-NEXT: s_lshr_b32 s12, s9, 16
-; VI-NEXT: s_lshr_b32 s14, s84, 16
-; VI-NEXT: s_lshr_b32 s72, s85, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s73, 16
-; VI-NEXT: s_lshr_b32 s78, s75, 16
-; VI-NEXT: s_lshr_b32 s89, s77, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s65, s35, 16
-; VI-NEXT: s_lshr_b32 s67, s71, 16
-; VI-NEXT: s_lshr_b32 s70, s82, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s87, v1
+; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: s_lshr_b32 s78, s29, 16
+; VI-NEXT: s_lshr_b32 s89, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s27, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s85, s25, 16
+; VI-NEXT: s_lshr_b32 s67, s24, 16
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s63, s7, 16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s14, s15, 16
+; VI-NEXT: s_lshr_b32 s58, s73, 16
+; VI-NEXT: s_lshr_b32 s74, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s79, s88, 16
+; VI-NEXT: s_lshr_b32 s90, s91, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: s_lshr_b32 s86, s87, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
+; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v29, s12, 0
+; VI-NEXT: v_writelane_b32 v29, s14, 1
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s15, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s88, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s86, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s6, s81, 16
+; VI-NEXT: s_and_b32 s8, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s6, s80, 16
+; VI-NEXT: s_or_b32 s37, s8, s40
+; VI-NEXT: s_or_b32 s40, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s6, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s43, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s82
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s71
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s87
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s52, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s88
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s55, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s75
-; VI-NEXT: s_lshl_b32 s5, s78, 16
-; VI-NEXT: s_or_b32 s56, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_and_b32 s4, 0xffff, s77
; VI-NEXT: s_lshl_b32 s5, s76, 16
-; VI-NEXT: s_or_b32 s57, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
+; VI-NEXT: s_or_b32 s56, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_or_b32 s57, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s58, 16
+; VI-NEXT: s_mov_b32 s72, s58
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s85
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s84
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
+; VI-NEXT: s_or_b32 s59, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s60, 16
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s63, 16
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s63
; VI-NEXT: s_or_b32 s63, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
-; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: v_writelane_b32 v29, s26, 0
-; VI-NEXT: s_mov_b32 s26, s27
-; VI-NEXT: s_mov_b32 s27, s77
-; VI-NEXT: v_writelane_b32 v29, s91, 1
-; VI-NEXT: s_mov_b32 s91, s88
-; VI-NEXT: s_mov_b32 s88, s28
-; VI-NEXT: s_mov_b32 s28, s75
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s81
-; VI-NEXT: s_mov_b32 s81, s68
-; VI-NEXT: s_mov_b32 s68, s34
-; VI-NEXT: s_mov_b32 s34, s31
-; VI-NEXT: s_mov_b32 s31, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s90
-; VI-NEXT: s_mov_b32 s90, s89
-; VI-NEXT: s_mov_b32 s89, s79
-; VI-NEXT: s_mov_b32 s79, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s72
-; VI-NEXT: s_mov_b32 s72, s14
-; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s72, s58
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s10, s64
-; VI-NEXT: s_mov_b32 s9, s83
-; VI-NEXT: s_mov_b32 s83, s69
-; VI-NEXT: s_mov_b32 s69, s65
-; VI-NEXT: s_mov_b32 s6, s13
-; VI-NEXT: s_mov_b32 s13, s84
-; VI-NEXT: s_mov_b32 s84, s70
-; VI-NEXT: s_mov_b32 s70, s66
-; VI-NEXT: s_mov_b32 s75, s73
-; VI-NEXT: s_mov_b32 s73, s8
-; VI-NEXT: s_mov_b32 s8, s15
-; VI-NEXT: s_mov_b32 s15, s85
-; VI-NEXT: s_mov_b32 s85, s80
-; VI-NEXT: s_mov_b32 s80, s67
+; VI-NEXT: s_mov_b32 s10, s63
+; VI-NEXT: s_mov_b32 s8, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s80
-; VI-NEXT: s_mov_b32 s80, s85
-; VI-NEXT: s_mov_b32 s85, s15
-; VI-NEXT: s_mov_b32 s15, s8
-; VI-NEXT: s_mov_b32 s8, s73
-; VI-NEXT: s_mov_b32 s73, s75
-; VI-NEXT: s_mov_b32 s66, s70
-; VI-NEXT: s_mov_b32 s70, s84
-; VI-NEXT: s_mov_b32 s84, s13
-; VI-NEXT: s_mov_b32 s13, s6
-; VI-NEXT: s_mov_b32 s65, s69
-; VI-NEXT: s_mov_b32 s69, s83
-; VI-NEXT: s_mov_b32 s83, s9
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s64, s10
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s14, s72
-; VI-NEXT: s_mov_b32 s72, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s79
-; VI-NEXT: s_mov_b32 s79, s89
-; VI-NEXT: s_mov_b32 s89, s90
-; VI-NEXT: s_mov_b32 s90, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s31
-; VI-NEXT: s_mov_b32 s31, s34
-; VI-NEXT: s_mov_b32 s34, s68
-; VI-NEXT: s_mov_b32 s68, s81
-; VI-NEXT: s_mov_b32 s81, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s75, s28
-; VI-NEXT: s_mov_b32 s28, s88
-; VI-NEXT: s_mov_b32 s88, s91
-; VI-NEXT: v_readlane_b32 s91, v29, 1
-; VI-NEXT: s_mov_b32 s77, s27
-; VI-NEXT: s_mov_b32 s27, s26
-; VI-NEXT: v_readlane_b32 s26, v29, 0
+; VI-NEXT: s_mov_b32 s67, s8
; VI-NEXT: .LBB43_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -30182,142 +30029,144 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s6, s88, 16
-; VI-NEXT: s_or_b32 s5, s6, s5
+; VI-NEXT: s_lshl_b32 s8, s83, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s15, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s87, 16
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s82, s82, 3
+; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s82, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, s69, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s71, s71, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s71, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_add_i32 s4, s87, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s35, s35, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s35, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s91, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s77, 3
+; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s88, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s75, 3
+; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s73, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s8, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s85, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 1
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s84, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s9, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 0
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s12, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s83, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s10, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s81, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
@@ -31689,20 +31538,11 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v28, s34, 0
-; SI-NEXT: v_writelane_b32 v28, s35, 1
-; SI-NEXT: v_writelane_b32 v28, s36, 2
-; SI-NEXT: v_writelane_b32 v28, s37, 3
-; SI-NEXT: v_writelane_b32 v28, s38, 4
-; SI-NEXT: v_writelane_b32 v28, s39, 5
-; SI-NEXT: v_writelane_b32 v28, s48, 6
-; SI-NEXT: v_writelane_b32 v28, s49, 7
-; SI-NEXT: v_writelane_b32 v28, s50, 8
-; SI-NEXT: v_writelane_b32 v28, s51, 9
-; SI-NEXT: v_writelane_b32 v28, s30, 10
-; SI-NEXT: v_writelane_b32 v28, s31, 11
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v28, s30, 0
+; SI-NEXT: v_writelane_b32 v28, s31, 1
; SI-NEXT: v_readfirstlane_b32 s40, v14
; SI-NEXT: v_readfirstlane_b32 s5, v13
; SI-NEXT: v_readfirstlane_b32 s4, v12
@@ -31719,72 +31559,111 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s41, v1
; SI-NEXT: s_cmp_lg_u32 s40, 0
; SI-NEXT: v_readfirstlane_b32 s40, v0
+; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB45_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s42, s7, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v29, s42, 11
+; SI-NEXT: s_lshr_b32 s42, s11, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 0
+; SI-NEXT: s_lshr_b32 s42, s13, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 1
+; SI-NEXT: s_lshr_b32 s42, s15, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 2
+; SI-NEXT: s_lshr_b32 s42, s41, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 3
+; SI-NEXT: s_lshr_b32 s42, s29, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 4
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 5
+; SI-NEXT: s_lshr_b32 s42, s25, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 6
+; SI-NEXT: s_lshr_b32 s42, s23, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 7
+; SI-NEXT: s_lshr_b32 s42, s21, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 8
+; SI-NEXT: s_lshr_b32 s42, s19, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 9
+; SI-NEXT: s_lshr_b32 s42, s17, 16
+; SI-NEXT: s_lshr_b32 s88, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s9, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 10
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: s_mov_b64 s[94:95], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: s_mov_b64 s[94:95], -1
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $vcc_hi
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $vcc_lo
+; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; kill: killed $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
+; SI-NEXT: ; implicit-def: $sgpr43
+; SI-NEXT: ; kill: killed $sgpr43
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
; SI-NEXT: s_cselect_b32 s43, 1, 0
; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_mov_b32 s94, s89
+; SI-NEXT: v_readlane_b32 s95, v29, 0
+; SI-NEXT: v_readlane_b32 s43, v29, 1
+; SI-NEXT: v_readlane_b32 s45, v29, 2
+; SI-NEXT: v_readlane_b32 s57, v29, 3
+; SI-NEXT: v_readlane_b32 s59, v29, 4
+; SI-NEXT: v_readlane_b32 s47, v29, 5
+; SI-NEXT: v_readlane_b32 s30, v29, 6
+; SI-NEXT: v_readlane_b32 s61, v29, 7
+; SI-NEXT: v_readlane_b32 s63, v29, 8
+; SI-NEXT: v_readlane_b32 s31, v29, 9
+; SI-NEXT: v_readlane_b32 s73, v29, 10
+; SI-NEXT: v_readlane_b32 s89, v29, 11
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -31815,120 +31694,128 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 vcc_lo, s5, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s7, 16
-; SI-NEXT: s_lshr_b32 s30, s9, 16
-; SI-NEXT: s_lshr_b32 s31, s11, 16
-; SI-NEXT: s_lshr_b32 s34, s13, 16
-; SI-NEXT: s_lshr_b32 s35, s15, 16
-; SI-NEXT: s_lshr_b32 s36, s41, 16
-; SI-NEXT: s_lshr_b32 s37, s29, 16
-; SI-NEXT: s_lshr_b32 s38, s27, 16
-; SI-NEXT: s_lshr_b32 s39, s25, 16
-; SI-NEXT: s_lshr_b32 s48, s23, 16
-; SI-NEXT: s_lshr_b32 s49, s21, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 16
-; SI-NEXT: s_lshr_b32 s51, s17, 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s42, s27, 16
+; SI-NEXT: s_lshr_b32 s43, s23, 16
+; SI-NEXT: s_lshr_b32 s72, s21, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s76, s13, 16
+; SI-NEXT: s_lshr_b32 s77, s15, 16
+; SI-NEXT: s_lshr_b32 s78, s41, 16
+; SI-NEXT: s_lshr_b32 s79, s29, 16
+; SI-NEXT: s_lshr_b32 s74, s17, 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_mov_b32 s47, s42
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
+; SI-NEXT: s_mov_b32 s61, s43
+; SI-NEXT: s_mov_b32 s63, s72
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
+; SI-NEXT: s_lshr_b32 s88, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s7, 16
+; SI-NEXT: s_lshr_b32 s94, s9, 16
+; SI-NEXT: s_lshr_b32 s95, s11, 16
+; SI-NEXT: s_lshr_b32 s30, s25, 16
+; SI-NEXT: s_lshr_b32 s31, s19, 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[26:27], 16
+; SI-NEXT: s_mov_b32 s59, s79
+; SI-NEXT: s_mov_b32 s57, s78
+; SI-NEXT: s_mov_b32 s45, s77
+; SI-NEXT: s_mov_b32 s43, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_lshl_b32 s43, s92, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s43
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s51, 16
-; SI-NEXT: s_or_b32 s17, s17, s43
-; SI-NEXT: s_lshl_b32 s43, s90, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s43
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s50, 16
-; SI-NEXT: s_or_b32 s19, s19, s43
-; SI-NEXT: s_lshl_b32 s43, s88, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s43
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s49, 16
-; SI-NEXT: s_or_b32 s21, s21, s43
-; SI-NEXT: s_lshl_b32 s43, s78, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s43
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s48, 16
-; SI-NEXT: s_or_b32 s23, s23, s43
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s76, 16
-; SI-NEXT: s_or_b32 s24, s24, s43
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_or_b32 s24, s24, s42
; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s39, 16
-; SI-NEXT: s_or_b32 s25, s25, s43
+; SI-NEXT: s_lshl_b32 s42, s30, 16
+; SI-NEXT: s_or_b32 s25, s25, s42
; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s74, 16
-; SI-NEXT: s_or_b32 s26, s26, s43
+; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
+; SI-NEXT: s_or_b32 s26, s26, s42
; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s38, 16
-; SI-NEXT: s_or_b32 s27, s27, s43
+; SI-NEXT: s_lshl_b32 s42, s47, 16
+; SI-NEXT: s_or_b32 s27, s27, s42
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s72, 16
-; SI-NEXT: s_or_b32 s28, s28, s43
+; SI-NEXT: s_lshl_b32 s42, s74, 16
+; SI-NEXT: s_or_b32 s28, s28, s42
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s37, 16
-; SI-NEXT: s_or_b32 s29, s29, s43
+; SI-NEXT: s_lshl_b32 s42, s59, 16
+; SI-NEXT: s_or_b32 s29, s29, s42
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s62, 16
-; SI-NEXT: s_or_b32 s40, s40, s43
+; SI-NEXT: s_lshl_b32 s42, s72, 16
+; SI-NEXT: s_or_b32 s40, s40, s42
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s36, 16
-; SI-NEXT: s_or_b32 s41, s41, s43
+; SI-NEXT: s_lshl_b32 s42, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s42
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s60, 16
-; SI-NEXT: s_or_b32 s14, s14, s43
+; SI-NEXT: s_lshl_b32 s42, s62, 16
+; SI-NEXT: s_or_b32 s14, s14, s42
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s35, 16
-; SI-NEXT: s_or_b32 s15, s15, s43
+; SI-NEXT: s_lshl_b32 s42, s45, 16
+; SI-NEXT: s_or_b32 s15, s15, s42
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s58, 16
-; SI-NEXT: s_or_b32 s12, s12, s43
+; SI-NEXT: s_lshl_b32 s42, s60, 16
+; SI-NEXT: s_or_b32 s12, s12, s42
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s34, 16
-; SI-NEXT: s_or_b32 s13, s13, s43
+; SI-NEXT: s_lshl_b32 s42, s43, 16
+; SI-NEXT: s_or_b32 s13, s13, s42
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s56, 16
-; SI-NEXT: s_or_b32 s10, s10, s43
+; SI-NEXT: s_lshl_b32 s42, s58, 16
+; SI-NEXT: s_or_b32 s10, s10, s42
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s31, 16
-; SI-NEXT: s_or_b32 s11, s11, s43
+; SI-NEXT: s_lshl_b32 s42, s95, 16
+; SI-NEXT: s_or_b32 s11, s11, s42
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s46, 16
-; SI-NEXT: s_or_b32 s8, s8, s43
+; SI-NEXT: s_lshl_b32 s42, s56, 16
+; SI-NEXT: s_or_b32 s8, s8, s42
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s30, 16
-; SI-NEXT: s_or_b32 s9, s9, s43
+; SI-NEXT: s_lshl_b32 s42, s94, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_or_b32 s9, s9, s42
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s43, s44, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_or_b32 s6, s6, s43
+; SI-NEXT: s_lshl_b32 s42, s46, 16
+; SI-NEXT: s_or_b32 s17, s17, s73
+; SI-NEXT: s_lshl_b32 s73, s90, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s6, s6, s42
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s42, s89, 16
+; SI-NEXT: s_or_b32 s18, s18, s73
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s31, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s63, s63, 16
+; SI-NEXT: s_or_b32 s7, s7, s42
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s44, 16
+; SI-NEXT: s_lshl_b32 s75, s92, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s63
+; SI-NEXT: s_lshl_b32 s63, s76, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s61, s61, 16
; SI-NEXT: s_or_b32 s4, s4, s42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s42, vcc_lo, 16
-; SI-NEXT: s_or_b32 s7, s7, s43
+; SI-NEXT: s_lshl_b32 s42, s88, 16
+; SI-NEXT: s_or_b32 s16, s16, s75
+; SI-NEXT: s_or_b32 s20, s20, s73
+; SI-NEXT: s_or_b32 s22, s22, s63
+; SI-NEXT: s_or_b32 s23, s23, s61
; SI-NEXT: s_or_b32 s5, s5, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 10
+; SI-NEXT: v_readlane_b32 s30, v28, 0
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -31957,19 +31844,11 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v25, s7
; SI-NEXT: v_mov_b32_e32 v26, s4
; SI-NEXT: v_mov_b32_e32 v27, s5
-; SI-NEXT: v_readlane_b32 s31, v28, 11
-; SI-NEXT: v_readlane_b32 s51, v28, 9
-; SI-NEXT: v_readlane_b32 s50, v28, 8
-; SI-NEXT: v_readlane_b32 s49, v28, 7
-; SI-NEXT: v_readlane_b32 s48, v28, 6
-; SI-NEXT: v_readlane_b32 s39, v28, 5
-; SI-NEXT: v_readlane_b32 s38, v28, 4
-; SI-NEXT: v_readlane_b32 s37, v28, 3
-; SI-NEXT: v_readlane_b32 s36, v28, 2
-; SI-NEXT: v_readlane_b32 s35, v28, 1
-; SI-NEXT: v_readlane_b32 s34, v28, 0
+; SI-NEXT: v_readlane_b32 s31, v28, 1
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -31980,8 +31859,6 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v28, s30, 0
-; VI-NEXT: v_writelane_b32 v28, s31, 1
; VI-NEXT: v_readfirstlane_b32 s4, v14
; VI-NEXT: v_readfirstlane_b32 s6, v13
; VI-NEXT: v_readfirstlane_b32 s7, v12
@@ -31998,43 +31875,49 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s42, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s43, v0
+; VI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB45_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s18, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 1
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB45_3
; VI-NEXT: .LBB45_2:
+; VI-NEXT: ; implicit-def: $sgpr45
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; kill: killed $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr45
+; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: ; implicit-def: $vcc_hi
+; VI-NEXT: ; kill: killed $sgpr45
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
; VI-NEXT: ; implicit-def: $sgpr90
@@ -32059,11 +31942,12 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $sgpr45
-; VI-NEXT: ; implicit-def: $sgpr44
; VI-NEXT: .LBB45_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: v_readlane_b32 s4, v28, 0
+; VI-NEXT: v_readlane_b32 s5, v28, 1
; VI-NEXT: s_cbranch_scc1 .LBB45_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s7, s7, 3
@@ -32094,124 +31978,123 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; VI-NEXT: s_addc_u32 s19, s19, 0
; VI-NEXT: s_add_u32 s16, s16, 3
; VI-NEXT: s_addc_u32 s17, s17, 0
-; VI-NEXT: s_lshr_b32 s44, s6, 16
-; VI-NEXT: s_lshr_b32 s45, s7, 16
-; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: s_lshr_b32 s47, s9, 16
-; VI-NEXT: s_lshr_b32 s56, s10, 16
-; VI-NEXT: s_lshr_b32 s57, s11, 16
-; VI-NEXT: s_lshr_b32 s58, s12, 16
-; VI-NEXT: s_lshr_b32 s59, s13, 16
-; VI-NEXT: s_lshr_b32 s60, s14, 16
-; VI-NEXT: s_lshr_b32 s61, s15, 16
-; VI-NEXT: s_lshr_b32 s62, s40, 16
-; VI-NEXT: s_lshr_b32 s63, s41, 16
-; VI-NEXT: s_lshr_b32 s72, s42, 16
-; VI-NEXT: s_lshr_b32 s73, s43, 16
-; VI-NEXT: s_lshr_b32 s74, s29, 16
-; VI-NEXT: s_lshr_b32 s75, s28, 16
-; VI-NEXT: s_lshr_b32 s76, s27, 16
-; VI-NEXT: s_lshr_b32 s77, s26, 16
-; VI-NEXT: s_lshr_b32 s78, s25, 16
-; VI-NEXT: s_lshr_b32 s79, s24, 16
-; VI-NEXT: s_lshr_b32 s88, s23, 16
-; VI-NEXT: s_lshr_b32 s89, s22, 16
-; VI-NEXT: s_lshr_b32 s90, s21, 16
-; VI-NEXT: s_lshr_b32 s91, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
+; VI-NEXT: s_lshr_b32 s45, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s47, s8, 16
+; VI-NEXT: s_lshr_b32 s56, s9, 16
+; VI-NEXT: s_lshr_b32 s57, s10, 16
+; VI-NEXT: s_lshr_b32 s58, s11, 16
+; VI-NEXT: s_lshr_b32 s59, s12, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s61, s14, 16
+; VI-NEXT: s_lshr_b32 s62, s15, 16
+; VI-NEXT: s_lshr_b32 s63, s40, 16
+; VI-NEXT: s_lshr_b32 s72, s41, 16
+; VI-NEXT: s_lshr_b32 s73, s42, 16
+; VI-NEXT: s_lshr_b32 s74, s43, 16
+; VI-NEXT: s_lshr_b32 s75, s29, 16
+; VI-NEXT: s_lshr_b32 s76, s28, 16
+; VI-NEXT: s_lshr_b32 s77, s27, 16
+; VI-NEXT: s_lshr_b32 s78, s26, 16
+; VI-NEXT: s_lshr_b32 s79, s25, 16
+; VI-NEXT: s_lshr_b32 s88, s24, 16
+; VI-NEXT: s_lshr_b32 s89, s23, 16
+; VI-NEXT: s_lshr_b32 s90, s22, 16
+; VI-NEXT: s_lshr_b32 s91, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; VI-NEXT: s_lshr_b32 s4, s19, 16
+; VI-NEXT: s_lshr_b32 s5, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s44, s16, 16
; VI-NEXT: .LBB45_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s30, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, vcc_hi, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, vcc_lo, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s18, s5
+; VI-NEXT: s_and_b32 s18, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s18, s4
; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s91, 16
+; VI-NEXT: s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT: s_or_b32 s18, s18, s19
; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s90, 16
+; VI-NEXT: s_lshl_b32 s20, s91, 16
; VI-NEXT: s_or_b32 s19, s19, s20
; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, s89, 16
+; VI-NEXT: s_lshl_b32 s21, s90, 16
; VI-NEXT: s_or_b32 s20, s20, s21
; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, s88, 16
+; VI-NEXT: s_lshl_b32 s22, s89, 16
; VI-NEXT: s_or_b32 s21, s21, s22
; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s79, 16
+; VI-NEXT: s_lshl_b32 s23, s88, 16
; VI-NEXT: s_or_b32 s22, s22, s23
; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s78, 16
+; VI-NEXT: s_lshl_b32 s24, s79, 16
; VI-NEXT: s_or_b32 s23, s23, s24
; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s77, 16
+; VI-NEXT: s_lshl_b32 s25, s78, 16
; VI-NEXT: s_or_b32 s24, s24, s25
; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s76, 16
+; VI-NEXT: s_lshl_b32 s26, s77, 16
; VI-NEXT: s_or_b32 s25, s25, s26
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s75, 16
+; VI-NEXT: s_lshl_b32 s27, s76, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s74, 16
+; VI-NEXT: s_lshl_b32 s28, s75, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s29, s73, 16
+; VI-NEXT: s_lshl_b32 s29, s74, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s42, s72, 16
+; VI-NEXT: s_lshl_b32 s42, s73, 16
; VI-NEXT: s_or_b32 s29, s29, s42
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s42, s63, 16
+; VI-NEXT: s_lshl_b32 s42, s72, 16
; VI-NEXT: s_or_b32 s41, s41, s42
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s42, s62, 16
+; VI-NEXT: s_lshl_b32 s42, s63, 16
; VI-NEXT: s_or_b32 s40, s40, s42
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s42, s61, 16
+; VI-NEXT: s_lshl_b32 s42, s62, 16
; VI-NEXT: s_or_b32 s15, s15, s42
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s42, s60, 16
+; VI-NEXT: s_lshl_b32 s42, s61, 16
; VI-NEXT: s_or_b32 s14, s14, s42
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s42, s59, 16
+; VI-NEXT: s_lshl_b32 s42, s60, 16
; VI-NEXT: s_or_b32 s13, s13, s42
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s42, s58, 16
+; VI-NEXT: s_lshl_b32 s42, s59, 16
; VI-NEXT: s_or_b32 s12, s12, s42
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s42, s57, 16
+; VI-NEXT: s_lshl_b32 s42, s58, 16
; VI-NEXT: s_or_b32 s11, s11, s42
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s42, s56, 16
+; VI-NEXT: s_lshl_b32 s42, s57, 16
; VI-NEXT: s_or_b32 s10, s10, s42
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_lshl_b32 s42, s56, 16
; VI-NEXT: s_or_b32 s9, s9, s42
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_lshl_b32 s42, s47, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s44, s44, 16
; VI-NEXT: s_or_b32 s8, s8, s42
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_lshl_b32 s42, s46, 16
+; VI-NEXT: s_or_b32 s16, s16, s44
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s44, vcc_hi, 16
; VI-NEXT: s_or_b32 s7, s7, s42
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s42, s44, 16
+; VI-NEXT: s_lshl_b32 s42, s45, 16
+; VI-NEXT: s_or_b32 s17, s17, s44
; VI-NEXT: s_or_b32 s6, s6, s42
-; VI-NEXT: v_readlane_b32 s30, v28, 0
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s5
+; VI-NEXT: v_mov_b32_e32 v3, s4
; VI-NEXT: v_mov_b32_e32 v4, s18
; VI-NEXT: v_mov_b32_e32 v5, s19
; VI-NEXT: v_mov_b32_e32 v6, s20
@@ -32236,7 +32119,6 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v25, s8
; VI-NEXT: v_mov_b32_e32 v26, s7
; VI-NEXT: v_mov_b32_e32 v27, s6
-; VI-NEXT: v_readlane_b32 s31, v28, 1
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
@@ -34198,13 +34080,13 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s92, v2
; SI-NEXT: v_readfirstlane_b32 s95, v1
-; SI-NEXT: v_readfirstlane_b32 s30, v0
+; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_lshr_b32 s94, s29, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s28, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s68, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s35, s25, 16
+; SI-NEXT: s_lshr_b32 s68, s24, 16
; SI-NEXT: s_lshr_b32 s70, s23, 16
; SI-NEXT: s_lshr_b32 s71, s22, 16
; SI-NEXT: s_lshr_b32 s80, s21, 16
@@ -34213,7 +34095,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s83, s18, 16
; SI-NEXT: s_lshr_b32 s84, s17, 16
; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s69, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -34226,55 +34108,56 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s95, 16
-; SI-NEXT: s_lshr_b32 s34, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB47_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s95, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -34313,11 +34196,12 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB47_3
; SI-NEXT: .LBB47_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB47_3: ; %Flow
@@ -34388,11 +34272,11 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s68
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v9, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
@@ -34403,7 +34287,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s34
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -34412,7 +34296,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s30
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
@@ -34436,10 +34320,10 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_or_b32_e32 v12, v14, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s31
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s7
; SI-NEXT: v_cvt_f32_f16_e32 v16, vcc_hi
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
@@ -34536,7 +34420,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v25, v27, v25
; SI-NEXT: v_cvt_f32_f16_e32 v27, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s69
; SI-NEXT: v_cvt_f32_f16_e32 v29, s6
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
@@ -34670,24 +34554,24 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s76, v6
; VI-NEXT: v_readfirstlane_b32 s79, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
-; VI-NEXT: v_readfirstlane_b32 s30, v3
-; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s70, v1
-; VI-NEXT: v_readfirstlane_b32 s81, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v3
+; VI-NEXT: v_readfirstlane_b32 s34, v2
+; VI-NEXT: v_readfirstlane_b32 s69, v1
+; VI-NEXT: v_readfirstlane_b32 s80, v0
; VI-NEXT: s_lshr_b32 s56, s29, 16
; VI-NEXT: s_lshr_b32 s61, s28, 16
; VI-NEXT: s_lshr_b32 s90, s27, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; VI-NEXT: s_lshr_b32 s34, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s71, s23, 16
-; VI-NEXT: s_lshr_b32 s82, s22, 16
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s85, s20, 16
-; VI-NEXT: s_lshr_b32 s86, s19, 16
-; VI-NEXT: s_lshr_b32 s87, s18, 16
-; VI-NEXT: s_lshr_b32 s7, s17, 16
-; VI-NEXT: s_lshr_b32 s9, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s25, 16
+; VI-NEXT: s_lshr_b32 s35, s24, 16
+; VI-NEXT: s_lshr_b32 s70, s23, 16
+; VI-NEXT: s_lshr_b32 s81, s22, 16
+; VI-NEXT: s_lshr_b32 s83, s21, 16
+; VI-NEXT: s_lshr_b32 s84, s20, 16
+; VI-NEXT: s_lshr_b32 s85, s19, 16
+; VI-NEXT: s_lshr_b32 s86, s18, 16
+; VI-NEXT: s_lshr_b32 s87, s17, 16
+; VI-NEXT: s_lshr_b32 s7, s16, 16
; VI-NEXT: s_lshr_b32 s63, s6, 16
; VI-NEXT: s_lshr_b32 s11, s8, 16
; VI-NEXT: s_lshr_b32 s13, s10, 16
@@ -34698,70 +34582,71 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_lshr_b32 s60, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s69, s35, 16
-; VI-NEXT: s_lshr_b32 s80, s70, 16
-; VI-NEXT: s_lshr_b32 s83, s81, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: s_lshr_b32 s68, s34, 16
+; VI-NEXT: s_lshr_b32 s71, s69, 16
+; VI-NEXT: s_lshr_b32 s82, s80, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s15, 0
; VI-NEXT: v_writelane_b32 v33, s59, 1
; VI-NEXT: s_cbranch_scc0 .LBB47_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s9, s7, 16
+; VI-NEXT: s_or_b32 s36, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s9, s86, 16
+; VI-NEXT: s_or_b32 s38, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s9, s85, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s7, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s41, s87, 16
+; VI-NEXT: s_or_b32 s39, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s9, s84, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s61, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s70
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_or_b32 s40, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s9, s83, 16
+; VI-NEXT: s_or_b32 s41, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s9, s81, 16
+; VI-NEXT: s_or_b32 s42, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s9, s70, 16
+; VI-NEXT: s_or_b32 s43, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s9, s35, 16
+; VI-NEXT: s_or_b32 s44, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s9, s31, 16
+; VI-NEXT: s_or_b32 s45, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; VI-NEXT: s_or_b32 s46, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s9, s90, 16
+; VI-NEXT: s_or_b32 s47, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s9, s61, 16
+; VI-NEXT: s_or_b32 s48, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s9, s56, 16
+; VI-NEXT: s_or_b32 s49, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s80
+; VI-NEXT: s_lshl_b32 s9, s82, 16
+; VI-NEXT: s_or_b32 s50, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s9, s71, 16
+; VI-NEXT: s_or_b32 s51, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s34
+; VI-NEXT: s_lshl_b32 s9, s68, 16
+; VI-NEXT: s_or_b32 s52, s5, s9
+; VI-NEXT: s_mov_b32 s9, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -34812,6 +34697,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_mov_b32 s15, s13
; VI-NEXT: s_mov_b32 s13, s11
; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s9, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB47_3: ; %Flow
@@ -34821,43 +34707,43 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB47_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v27, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s9
-; VI-NEXT: v_mov_b32_e32 v2, s7
+; VI-NEXT: v_mov_b32_e32 v0, s7
+; VI-NEXT: v_mov_b32_e32 v2, s87
; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v27
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v27
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s87
+; VI-NEXT: v_mov_b32_e32 v2, s86
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v27
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s86
+; VI-NEXT: v_mov_b32_e32 v3, s85
; VI-NEXT: v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v27
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s85
+; VI-NEXT: v_mov_b32_e32 v4, s84
; VI-NEXT: v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v27
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s84
+; VI-NEXT: v_mov_b32_e32 v5, s83
; VI-NEXT: v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v27
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s82
+; VI-NEXT: v_mov_b32_e32 v6, s81
; VI-NEXT: v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v27
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s71
+; VI-NEXT: v_mov_b32_e32 v7, s70
; VI-NEXT: v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v27
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s68
+; VI-NEXT: v_mov_b32_e32 v8, s35
; VI-NEXT: v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v27
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s34
+; VI-NEXT: v_mov_b32_e32 v9, s31
; VI-NEXT: v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v27
; VI-NEXT: v_or_b32_e32 v9, v10, v9
@@ -34877,21 +34763,21 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v27
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s83
+; VI-NEXT: v_mov_b32_e32 v14, s82
; VI-NEXT: v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s81, v27
+; VI-NEXT: v_add_f16_e32 v15, s80, v27
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s80
+; VI-NEXT: v_mov_b32_e32 v15, s71
; VI-NEXT: v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s70, v27
+; VI-NEXT: v_add_f16_e32 v16, s69, v27
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s69
+; VI-NEXT: v_mov_b32_e32 v16, s68
; VI-NEXT: v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s35, v27
+; VI-NEXT: v_add_f16_e32 v17, s34, v27
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s31
+; VI-NEXT: v_mov_b32_e32 v17, s30
; VI-NEXT: v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s30, v27
+; VI-NEXT: v_add_f16_e32 v18, s9, v27
; VI-NEXT: v_or_b32_e32 v17, v18, v17
; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
; VI-NEXT: v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -36226,30 +36112,27 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v58, s34, 0
-; SI-NEXT: v_writelane_b32 v58, s35, 1
-; SI-NEXT: v_writelane_b32 v58, s36, 2
-; SI-NEXT: v_writelane_b32 v58, s37, 3
-; SI-NEXT: v_writelane_b32 v58, s38, 4
-; SI-NEXT: v_writelane_b32 v58, s39, 5
-; SI-NEXT: v_writelane_b32 v58, s48, 6
-; SI-NEXT: v_writelane_b32 v58, s49, 7
-; SI-NEXT: v_writelane_b32 v58, s50, 8
-; SI-NEXT: v_writelane_b32 v58, s51, 9
-; SI-NEXT: v_writelane_b32 v58, s30, 10
-; SI-NEXT: v_writelane_b32 v58, s31, 11
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v57, s34, 0
+; SI-NEXT: v_writelane_b32 v57, s35, 1
+; SI-NEXT: v_writelane_b32 v57, s36, 2
+; SI-NEXT: v_writelane_b32 v57, s37, 3
+; SI-NEXT: v_writelane_b32 v57, s38, 4
+; SI-NEXT: v_writelane_b32 v57, s39, 5
+; SI-NEXT: v_writelane_b32 v57, s48, 6
+; SI-NEXT: v_writelane_b32 v57, s49, 7
+; SI-NEXT: v_writelane_b32 v57, s30, 8
+; SI-NEXT: v_writelane_b32 v57, s31, 9
; SI-NEXT: v_readfirstlane_b32 s4, v14
; SI-NEXT: v_readfirstlane_b32 s41, v13
; SI-NEXT: v_readfirstlane_b32 s40, v12
@@ -36268,22 +36151,24 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB49_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s51, s41, 16
-; SI-NEXT: s_lshr_b32 s50, s15, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 16
-; SI-NEXT: s_lshr_b32 s48, s11, 16
-; SI-NEXT: s_lshr_b32 s39, s9, 16
-; SI-NEXT: s_lshr_b32 s38, s7, 16
-; SI-NEXT: s_lshr_b32 s37, s5, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s35, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s23, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
; SI-NEXT: s_lshr_b64 s[42:43], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s49, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_lshr_b32 s34, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
@@ -36305,33 +36190,33 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: .LBB49_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s47, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s47, 1
; SI-NEXT: s_cbranch_scc1 .LBB49_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0
@@ -36349,40 +36234,36 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
; SI-NEXT: v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[8:9], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16
+; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11
; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
+; SI-NEXT: v_mov_b32_e32 v51, v56
; SI-NEXT: s_branch .LBB49_6
; SI-NEXT: .LBB49_5:
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -36413,27 +36294,26 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v22, s12
; SI-NEXT: v_mov_b32_e32 v24, s14
; SI-NEXT: v_mov_b32_e32 v26, s40
-; SI-NEXT: v_mov_b32_e32 v52, s51
-; SI-NEXT: v_mov_b32_e32 v53, s50
-; SI-NEXT: v_mov_b32_e32 v54, s49
-; SI-NEXT: v_mov_b32_e32 v55, s48
-; SI-NEXT: v_mov_b32_e32 v40, s39
-; SI-NEXT: v_mov_b32_e32 v41, s38
-; SI-NEXT: v_mov_b32_e32 v42, s37
+; SI-NEXT: v_mov_b32_e32 v52, s49
+; SI-NEXT: v_mov_b32_e32 v53, s48
+; SI-NEXT: v_mov_b32_e32 v54, s39
+; SI-NEXT: v_mov_b32_e32 v55, s38
+; SI-NEXT: v_mov_b32_e32 v39, s37
+; SI-NEXT: v_mov_b32_e32 v40, s36
+; SI-NEXT: v_mov_b32_e32 v41, s45
; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v43, s36
+; SI-NEXT: v_mov_b32_e32 v42, s35
+; SI-NEXT: v_mov_b32_e32 v51, s34
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v44, s35
+; SI-NEXT: v_mov_b32_e32 v43, s31
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v45, s34
+; SI-NEXT: v_mov_b32_e32 v44, s30
; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v46, s31
+; SI-NEXT: v_mov_b32_e32 v45, s43
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v47, s30
+; SI-NEXT: v_mov_b32_e32 v46, vcc_hi
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v56, vcc_hi
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v57, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v47, vcc_lo
; SI-NEXT: v_mov_b32_e32 v50, s92
; SI-NEXT: v_mov_b32_e32 v49, s90
; SI-NEXT: v_mov_b32_e32 v48, s88
@@ -36449,60 +36329,52 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_mov_b32_e32 v29, s44
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: .LBB49_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47
+; SI-NEXT: v_or_b32_e32 v2, v2, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46
+; SI-NEXT: v_or_b32_e32 v4, v4, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT: v_or_b32_e32 v6, v6, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT: v_or_b32_e32 v8, v8, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45
-; SI-NEXT: v_or_b32_e32 v10, v10, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT: v_or_b32_e32 v12, v12, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT: v_or_b32_e32 v14, v14, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT: v_or_b32_e32 v16, v16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
-; SI-NEXT: v_or_b32_e32 v18, v18, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
@@ -36511,14 +36383,20 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_or_b32_e32 v10, v10, v36
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v51
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v18, v18, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT: v_or_b32_e32 v20, v20, v31
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
@@ -36531,8 +36409,10 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_or_b32_e32 v26, v26, v28
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_readlane_b32 s30, v58, 10
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
+; SI-NEXT: v_readlane_b32 s30, v57, 8
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: v_or_b32_e32 v3, v3, v49
+; SI-NEXT: v_or_b32_e32 v5, v5, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v38
; SI-NEXT: v_or_b32_e32 v9, v9, v37
; SI-NEXT: v_or_b32_e32 v11, v11, v36
@@ -36544,19 +36424,17 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a,
; SI-NEXT: v_or_b32_e32 v23, v23, v30
; SI-NEXT: v_or_b32_e32 v25, v25, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_readlane_b32 s31, v58, 11
-; SI-NEXT: v_readlane_b32 s51, v58, 9
-; SI-NEXT: v_readlane_b32 s50, v58, 8
-; SI-NEXT: v_readlane_b32 s49, v58, 7
-; SI-NEXT: v_readlane_b32 s48, v58, 6
-; SI-NEXT: v_readlane_b32 s39, v58, 5
-; SI-NEXT: v_readlane_b32 s38, v58, 4
-; SI-NEXT: v_readlane_b32 s37, v58, 3
-; SI-NEXT: v_readlane_b32 s36, v58, 2
-; SI-NEXT: v_readlane_b32 s35, v58, 1
-; SI-NEXT: v_readlane_b32 s34, v58, 0
+; SI-NEXT: v_readlane_b32 s31, v57, 9
+; SI-NEXT: v_readlane_b32 s49, v57, 7
+; SI-NEXT: v_readlane_b32 s48, v57, 6
+; SI-NEXT: v_readlane_b32 s39, v57, 5
+; SI-NEXT: v_readlane_b32 s38, v57, 4
+; SI-NEXT: v_readlane_b32 s37, v57, 3
+; SI-NEXT: v_readlane_b32 s36, v57, 2
+; SI-NEXT: v_readlane_b32 s35, v57, 1
+; SI-NEXT: v_readlane_b32 s34, v57, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -38930,23 +38808,23 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s91, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_hi, v2
-; SI-NEXT: v_readfirstlane_b32 s35, v1
-; SI-NEXT: v_readfirstlane_b32 s70, v0
+; SI-NEXT: v_readfirstlane_b32 s34, v1
+; SI-NEXT: v_readfirstlane_b32 s81, v0
; SI-NEXT: s_lshr_b32 s78, s29, 16
; SI-NEXT: s_lshr_b32 s89, s28, 16
; SI-NEXT: s_lshr_b32 s92, s27, 16
; SI-NEXT: s_lshr_b32 s95, s26, 16
; SI-NEXT: s_lshr_b32 s30, s25, 16
-; SI-NEXT: s_lshr_b32 s34, s24, 16
-; SI-NEXT: s_lshr_b32 s68, s23, 16
-; SI-NEXT: s_lshr_b32 s71, s22, 16
-; SI-NEXT: s_lshr_b32 s80, s21, 16
-; SI-NEXT: s_lshr_b32 s81, s20, 16
-; SI-NEXT: s_lshr_b32 s82, s19, 16
-; SI-NEXT: s_lshr_b32 s83, s18, 16
-; SI-NEXT: s_lshr_b32 s84, s17, 16
-; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s24, 16
+; SI-NEXT: s_lshr_b32 s84, s23, 16
+; SI-NEXT: s_lshr_b32 s83, s22, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s68, s20, 16
+; SI-NEXT: s_lshr_b32 s69, s19, 16
+; SI-NEXT: s_lshr_b32 s70, s18, 16
+; SI-NEXT: s_lshr_b32 s71, s17, 16
+; SI-NEXT: s_lshr_b32 s80, s16, 16
+; SI-NEXT: s_lshr_b32 s85, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -38958,38 +38836,39 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s90, s91, 16
; SI-NEXT: s_lshr_b32 s93, s94, 16
; SI-NEXT: s_lshr_b32 vcc_lo, vcc_hi, 16
-; SI-NEXT: s_lshr_b32 s31, s35, 16
-; SI-NEXT: s_lshr_b32 s69, s70, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s34, 16
+; SI-NEXT: s_lshr_b32 s82, s81, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB51_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s71, 16
+; SI-NEXT: s_or_b32 s37, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s68, 16
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s41, s5, s4
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
@@ -39006,10 +38885,10 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_and_b32 s4, s81, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s51, s4, s5
; SI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
@@ -39046,11 +38925,12 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB51_3
; SI-NEXT: .LBB51_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB51_3: ; %Flow
@@ -39061,47 +38941,47 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s6, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -39128,14 +39008,14 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s70, s70, 3
; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_add_i32 s4, s81, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s35, s35, 3
; SI-NEXT: s_add_i32 s50, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
+; SI-NEXT: s_add_i32 s4, s34, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
@@ -39196,7 +39076,7 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: .LBB51_5: ; %end
@@ -39303,220 +39183,156 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v28, s87, 29
; VI-NEXT: v_writelane_b32 v28, s30, 30
; VI-NEXT: v_writelane_b32 v28, s31, 31
-; VI-NEXT: v_readfirstlane_b32 s81, v13
-; VI-NEXT: v_readfirstlane_b32 s83, v12
-; VI-NEXT: v_readfirstlane_b32 s9, v11
-; VI-NEXT: v_readfirstlane_b32 s84, v10
-; VI-NEXT: v_readfirstlane_b32 s85, v9
-; VI-NEXT: v_readfirstlane_b32 s8, v8
-; VI-NEXT: v_readfirstlane_b32 s73, v7
-; VI-NEXT: v_readfirstlane_b32 s75, v6
-; VI-NEXT: v_readfirstlane_b32 s77, v5
+; VI-NEXT: v_readfirstlane_b32 s7, v13
+; VI-NEXT: v_readfirstlane_b32 s9, v12
+; VI-NEXT: v_readfirstlane_b32 s11, v11
+; VI-NEXT: v_readfirstlane_b32 s13, v10
+; VI-NEXT: v_readfirstlane_b32 s15, v9
+; VI-NEXT: v_readfirstlane_b32 s73, v8
+; VI-NEXT: v_readfirstlane_b32 s75, v7
+; VI-NEXT: v_readfirstlane_b32 s77, v6
+; VI-NEXT: v_readfirstlane_b32 s88, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
; VI-NEXT: v_readfirstlane_b32 s30, v3
; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s71, v1
-; VI-NEXT: v_readfirstlane_b32 s82, v0
-; VI-NEXT: s_lshr_b32 s79, s29, 16
-; VI-NEXT: s_lshr_b32 s90, s28, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s66, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s69, s23, 16
-; VI-NEXT: s_lshr_b32 s80, s22, 16
-; VI-NEXT: s_lshr_b32 s86, s21, 16
-; VI-NEXT: s_lshr_b32 s87, s20, 16
-; VI-NEXT: s_lshr_b32 s13, s19, 16
-; VI-NEXT: s_lshr_b32 s15, s18, 16
-; VI-NEXT: s_lshr_b32 s88, s17, 16
-; VI-NEXT: s_lshr_b32 s7, s16, 16
-; VI-NEXT: s_lshr_b32 s64, s81, 16
-; VI-NEXT: s_lshr_b32 s10, s83, 16
-; VI-NEXT: s_lshr_b32 s12, s9, 16
-; VI-NEXT: s_lshr_b32 s14, s84, 16
-; VI-NEXT: s_lshr_b32 s72, s85, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s73, 16
-; VI-NEXT: s_lshr_b32 s78, s75, 16
-; VI-NEXT: s_lshr_b32 s89, s77, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s65, s35, 16
-; VI-NEXT: s_lshr_b32 s67, s71, 16
-; VI-NEXT: s_lshr_b32 s70, s82, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: v_readfirstlane_b32 s87, v1
+; VI-NEXT: v_readfirstlane_b32 s69, v0
+; VI-NEXT: s_lshr_b32 s78, s29, 16
+; VI-NEXT: s_lshr_b32 s89, s28, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s27, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s85, s25, 16
+; VI-NEXT: s_lshr_b32 s67, s24, 16
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: s_lshr_b32 s70, s22, 16
+; VI-NEXT: s_lshr_b32 s71, s21, 16
+; VI-NEXT: s_lshr_b32 s80, s20, 16
+; VI-NEXT: s_lshr_b32 s81, s19, 16
+; VI-NEXT: s_lshr_b32 s82, s18, 16
+; VI-NEXT: s_lshr_b32 s83, s17, 16
+; VI-NEXT: s_lshr_b32 s84, s16, 16
+; VI-NEXT: s_lshr_b32 s63, s7, 16
+; VI-NEXT: s_lshr_b32 s10, s9, 16
+; VI-NEXT: s_lshr_b32 s12, s11, 16
+; VI-NEXT: s_lshr_b32 s60, s13, 16
+; VI-NEXT: s_lshr_b32 s14, s15, 16
+; VI-NEXT: s_lshr_b32 s58, s73, 16
+; VI-NEXT: s_lshr_b32 s74, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s79, s88, 16
+; VI-NEXT: s_lshr_b32 s90, s91, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s30, 16
+; VI-NEXT: s_lshr_b32 s34, s35, 16
+; VI-NEXT: s_lshr_b32 s86, s87, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
+; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v29, s12, 0
+; VI-NEXT: v_writelane_b32 v29, s14, 1
; VI-NEXT: s_cbranch_scc0 .LBB51_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s15, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s88, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s86, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s6, s84, 16
+; VI-NEXT: s_or_b32 s36, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s6, s82, 16
+; VI-NEXT: s_or_b32 s38, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s6, s81, 16
+; VI-NEXT: s_and_b32 s8, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s83, 16
+; VI-NEXT: s_or_b32 s39, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s6, s80, 16
+; VI-NEXT: s_or_b32 s37, s8, s40
+; VI-NEXT: s_or_b32 s40, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s6, s71, 16
+; VI-NEXT: s_or_b32 s41, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s6, s70, 16
+; VI-NEXT: s_or_b32 s42, s5, s6
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_mov_b32 s6, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s43, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s44, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s45, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s82
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s71
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s87
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s52, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s88
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s55, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s75
-; VI-NEXT: s_lshl_b32 s5, s78, 16
-; VI-NEXT: s_or_b32 s56, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_and_b32 s4, 0xffff, s77
; VI-NEXT: s_lshl_b32 s5, s76, 16
-; VI-NEXT: s_or_b32 s57, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
+; VI-NEXT: s_or_b32 s56, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_or_b32 s57, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s58, 16
+; VI-NEXT: s_mov_b32 s72, s58
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s85
-; VI-NEXT: s_lshl_b32 s5, s72, 16
-; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s84
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
; VI-NEXT: s_lshl_b32 s5, s14, 16
+; VI-NEXT: s_or_b32 s59, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s60, 16
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s63, 16
+; VI-NEXT: s_mov_b32 s12, s10
+; VI-NEXT: s_mov_b32 s10, s63
; VI-NEXT: s_or_b32 s63, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB51_3
; VI-NEXT: .LBB51_2:
-; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: v_writelane_b32 v29, s26, 0
-; VI-NEXT: s_mov_b32 s26, s27
-; VI-NEXT: s_mov_b32 s27, s77
-; VI-NEXT: v_writelane_b32 v29, s91, 1
-; VI-NEXT: s_mov_b32 s91, s88
-; VI-NEXT: s_mov_b32 s88, s28
-; VI-NEXT: s_mov_b32 s28, s75
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s81
-; VI-NEXT: s_mov_b32 s81, s68
-; VI-NEXT: s_mov_b32 s68, s34
-; VI-NEXT: s_mov_b32 s34, s31
-; VI-NEXT: s_mov_b32 s31, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s90
-; VI-NEXT: s_mov_b32 s90, s89
-; VI-NEXT: s_mov_b32 s89, s79
-; VI-NEXT: s_mov_b32 s79, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s72
-; VI-NEXT: s_mov_b32 s72, s14
-; VI-NEXT: s_mov_b32 s14, s12
+; VI-NEXT: s_mov_b32 s72, s58
+; VI-NEXT: s_mov_b32 s14, s60
; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s10, s64
-; VI-NEXT: s_mov_b32 s9, s83
-; VI-NEXT: s_mov_b32 s83, s69
-; VI-NEXT: s_mov_b32 s69, s65
-; VI-NEXT: s_mov_b32 s6, s13
-; VI-NEXT: s_mov_b32 s13, s84
-; VI-NEXT: s_mov_b32 s84, s70
-; VI-NEXT: s_mov_b32 s70, s66
-; VI-NEXT: s_mov_b32 s75, s73
-; VI-NEXT: s_mov_b32 s73, s8
-; VI-NEXT: s_mov_b32 s8, s15
-; VI-NEXT: s_mov_b32 s15, s85
-; VI-NEXT: s_mov_b32 s85, s80
-; VI-NEXT: s_mov_b32 s80, s67
+; VI-NEXT: s_mov_b32 s10, s63
+; VI-NEXT: s_mov_b32 s8, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s6, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s80
-; VI-NEXT: s_mov_b32 s80, s85
-; VI-NEXT: s_mov_b32 s85, s15
-; VI-NEXT: s_mov_b32 s15, s8
-; VI-NEXT: s_mov_b32 s8, s73
-; VI-NEXT: s_mov_b32 s73, s75
-; VI-NEXT: s_mov_b32 s66, s70
-; VI-NEXT: s_mov_b32 s70, s84
-; VI-NEXT: s_mov_b32 s84, s13
-; VI-NEXT: s_mov_b32 s13, s6
-; VI-NEXT: s_mov_b32 s65, s69
-; VI-NEXT: s_mov_b32 s69, s83
-; VI-NEXT: s_mov_b32 s83, s9
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s64, s10
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s14, s72
-; VI-NEXT: s_mov_b32 s72, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s79
-; VI-NEXT: s_mov_b32 s79, s89
-; VI-NEXT: s_mov_b32 s89, s90
-; VI-NEXT: s_mov_b32 s90, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s31
-; VI-NEXT: s_mov_b32 s31, s34
-; VI-NEXT: s_mov_b32 s34, s68
-; VI-NEXT: s_mov_b32 s68, s81
-; VI-NEXT: s_mov_b32 s81, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s75, s28
-; VI-NEXT: s_mov_b32 s28, s88
-; VI-NEXT: s_mov_b32 s88, s91
-; VI-NEXT: v_readlane_b32 s91, v29, 1
-; VI-NEXT: s_mov_b32 s77, s27
-; VI-NEXT: s_mov_b32 s27, s26
-; VI-NEXT: v_readlane_b32 s26, v29, 0
+; VI-NEXT: s_mov_b32 s67, s8
; VI-NEXT: .LBB51_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -39525,142 +39341,144 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a,
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s6, s88, 16
-; VI-NEXT: s_or_b32 s5, s6, s5
+; VI-NEXT: s_lshl_b32 s8, s83, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s36, s4, 0x30000
; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s15, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s87, 16
+; VI-NEXT: s_lshl_b32 s5, s80, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s80, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s69, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, s67, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s34, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s89, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s79, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s82, s82, 3
+; VI-NEXT: s_add_i32 s69, s69, 3
; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s82, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_and_b32 s4, s69, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s68, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s71, s71, 3
; VI-NEXT: s_add_i32 s50, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s71, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_add_i32 s4, s87, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s35, s35, 3
; VI-NEXT: s_add_i32 s51, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s35, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s65, 16
+; VI-NEXT: s_add_i32 s4, s35, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s34, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s30, s30, 3
; VI-NEXT: s_add_i32 s52, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s30, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_add_i32 s4, s30, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s91, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s88, s77, 3
+; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s88, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s89, 16
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s77, s75, 3
+; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s73, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s8, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s85, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 1
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s72, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s84, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
; VI-NEXT: s_lshl_b32 s5, s14, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s9, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v29, 0
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s12, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s83, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s10, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s81, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s64, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: .LBB51_5: ; %end
@@ -40947,30 +40765,27 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v58, s34, 0
-; SI-NEXT: v_writelane_b32 v58, s35, 1
-; SI-NEXT: v_writelane_b32 v58, s36, 2
-; SI-NEXT: v_writelane_b32 v58, s37, 3
-; SI-NEXT: v_writelane_b32 v58, s38, 4
-; SI-NEXT: v_writelane_b32 v58, s39, 5
-; SI-NEXT: v_writelane_b32 v58, s48, 6
-; SI-NEXT: v_writelane_b32 v58, s49, 7
-; SI-NEXT: v_writelane_b32 v58, s50, 8
-; SI-NEXT: v_writelane_b32 v58, s51, 9
-; SI-NEXT: v_writelane_b32 v58, s30, 10
-; SI-NEXT: v_writelane_b32 v58, s31, 11
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v57, s34, 0
+; SI-NEXT: v_writelane_b32 v57, s35, 1
+; SI-NEXT: v_writelane_b32 v57, s36, 2
+; SI-NEXT: v_writelane_b32 v57, s37, 3
+; SI-NEXT: v_writelane_b32 v57, s38, 4
+; SI-NEXT: v_writelane_b32 v57, s39, 5
+; SI-NEXT: v_writelane_b32 v57, s48, 6
+; SI-NEXT: v_writelane_b32 v57, s49, 7
+; SI-NEXT: v_writelane_b32 v57, s30, 8
+; SI-NEXT: v_writelane_b32 v57, s31, 9
; SI-NEXT: v_readfirstlane_b32 s4, v14
; SI-NEXT: v_readfirstlane_b32 s41, v13
; SI-NEXT: v_readfirstlane_b32 s40, v12
@@ -40989,22 +40804,24 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_cbranch_scc0 .LBB53_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s51, s41, 16
-; SI-NEXT: s_lshr_b32 s50, s15, 16
-; SI-NEXT: s_lshr_b32 s49, s13, 16
-; SI-NEXT: s_lshr_b32 s48, s11, 16
-; SI-NEXT: s_lshr_b32 s39, s9, 16
-; SI-NEXT: s_lshr_b32 s38, s7, 16
-; SI-NEXT: s_lshr_b32 s37, s5, 16
-; SI-NEXT: s_lshr_b32 s36, s29, 16
-; SI-NEXT: s_lshr_b32 s35, s27, 16
-; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s23, 16
-; SI-NEXT: s_lshr_b32 s30, s21, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
-; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
+; SI-NEXT: s_lshr_b32 s44, s21, 16
; SI-NEXT: s_lshr_b64 s[42:43], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
+; SI-NEXT: s_mov_b32 s43, s44
; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s49, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s29, 16
+; SI-NEXT: s_lshr_b32 s34, s27, 16
+; SI-NEXT: s_lshr_b32 s31, s25, 16
+; SI-NEXT: s_lshr_b32 s30, s23, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s19, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
@@ -41026,33 +40843,33 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr31
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: .LBB53_3: ; %Flow
; SI-NEXT: s_and_b64 s[94:95], s[94:95], exec
-; SI-NEXT: s_cselect_b32 s43, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s43, 1
+; SI-NEXT: s_cselect_b32 s47, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s47, 1
; SI-NEXT: s_cbranch_scc1 .LBB53_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0
@@ -41070,40 +40887,36 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0
; SI-NEXT: v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0
-; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0
-; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0
-; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[8:9], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16
+; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[4:5], 16
+; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11
; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
+; SI-NEXT: v_mov_b32_e32 v51, v56
; SI-NEXT: s_branch .LBB53_6
; SI-NEXT: .LBB53_5:
; SI-NEXT: v_mov_b32_e32 v1, s17
@@ -41134,27 +40947,26 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_mov_b32_e32 v22, s12
; SI-NEXT: v_mov_b32_e32 v24, s14
; SI-NEXT: v_mov_b32_e32 v26, s40
-; SI-NEXT: v_mov_b32_e32 v52, s51
-; SI-NEXT: v_mov_b32_e32 v53, s50
-; SI-NEXT: v_mov_b32_e32 v54, s49
-; SI-NEXT: v_mov_b32_e32 v55, s48
-; SI-NEXT: v_mov_b32_e32 v40, s39
-; SI-NEXT: v_mov_b32_e32 v41, s38
-; SI-NEXT: v_mov_b32_e32 v42, s37
+; SI-NEXT: v_mov_b32_e32 v52, s49
+; SI-NEXT: v_mov_b32_e32 v53, s48
+; SI-NEXT: v_mov_b32_e32 v54, s39
+; SI-NEXT: v_mov_b32_e32 v55, s38
+; SI-NEXT: v_mov_b32_e32 v39, s37
+; SI-NEXT: v_mov_b32_e32 v40, s36
+; SI-NEXT: v_mov_b32_e32 v41, s45
; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v43, s36
+; SI-NEXT: v_mov_b32_e32 v42, s35
+; SI-NEXT: v_mov_b32_e32 v51, s34
; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_mov_b32_e32 v44, s35
+; SI-NEXT: v_mov_b32_e32 v43, s31
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v45, s34
+; SI-NEXT: v_mov_b32_e32 v44, s30
; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v46, s31
+; SI-NEXT: v_mov_b32_e32 v45, s43
; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v47, s30
+; SI-NEXT: v_mov_b32_e32 v46, vcc_hi
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v56, vcc_hi
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v57, vcc_lo
+; SI-NEXT: v_mov_b32_e32 v47, vcc_lo
; SI-NEXT: v_mov_b32_e32 v50, s92
; SI-NEXT: v_mov_b32_e32 v49, s90
; SI-NEXT: v_mov_b32_e32 v48, s88
@@ -41170,60 +40982,52 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_mov_b32_e32 v29, s44
; SI-NEXT: v_mov_b32_e32 v28, s42
; SI-NEXT: .LBB53_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47
+; SI-NEXT: v_or_b32_e32 v0, v0, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47
+; SI-NEXT: v_or_b32_e32 v2, v2, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46
+; SI-NEXT: v_or_b32_e32 v4, v4, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT: v_or_b32_e32 v6, v6, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT: v_or_b32_e32 v8, v8, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45
-; SI-NEXT: v_or_b32_e32 v10, v10, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT: v_or_b32_e32 v12, v12, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT: v_or_b32_e32 v14, v14, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT: v_or_b32_e32 v16, v16, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
-; SI-NEXT: v_or_b32_e32 v18, v18, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
@@ -41232,14 +41036,20 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_or_b32_e32 v10, v10, v36
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v51
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; SI-NEXT: v_or_b32_e32 v18, v18, v32
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT: v_or_b32_e32 v20, v20, v31
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55
@@ -41252,8 +41062,10 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_or_b32_e32 v26, v26, v28
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_readlane_b32 s30, v58, 10
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
+; SI-NEXT: v_readlane_b32 s30, v57, 8
+; SI-NEXT: v_or_b32_e32 v1, v1, v50
+; SI-NEXT: v_or_b32_e32 v3, v3, v49
+; SI-NEXT: v_or_b32_e32 v5, v5, v48
; SI-NEXT: v_or_b32_e32 v7, v7, v38
; SI-NEXT: v_or_b32_e32 v9, v9, v37
; SI-NEXT: v_or_b32_e32 v11, v11, v36
@@ -41265,19 +41077,17 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a
; SI-NEXT: v_or_b32_e32 v23, v23, v30
; SI-NEXT: v_or_b32_e32 v25, v25, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
-; SI-NEXT: v_readlane_b32 s31, v58, 11
-; SI-NEXT: v_readlane_b32 s51, v58, 9
-; SI-NEXT: v_readlane_b32 s50, v58, 8
-; SI-NEXT: v_readlane_b32 s49, v58, 7
-; SI-NEXT: v_readlane_b32 s48, v58, 6
-; SI-NEXT: v_readlane_b32 s39, v58, 5
-; SI-NEXT: v_readlane_b32 s38, v58, 4
-; SI-NEXT: v_readlane_b32 s37, v58, 3
-; SI-NEXT: v_readlane_b32 s36, v58, 2
-; SI-NEXT: v_readlane_b32 s35, v58, 1
-; SI-NEXT: v_readlane_b32 s34, v58, 0
+; SI-NEXT: v_readlane_b32 s31, v57, 9
+; SI-NEXT: v_readlane_b32 s49, v57, 7
+; SI-NEXT: v_readlane_b32 s48, v57, 6
+; SI-NEXT: v_readlane_b32 s39, v57, 5
+; SI-NEXT: v_readlane_b32 s38, v57, 4
+; SI-NEXT: v_readlane_b32 s37, v57, 3
+; SI-NEXT: v_readlane_b32 s36, v57, 2
+; SI-NEXT: v_readlane_b32 s35, v57, 1
+; SI-NEXT: v_readlane_b32 s34, v57, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -43789,13 +43599,13 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_readfirstlane_b32 s90, v3
; SI-NEXT: v_readfirstlane_b32 s92, v2
; SI-NEXT: v_readfirstlane_b32 s95, v1
-; SI-NEXT: v_readfirstlane_b32 s30, v0
+; SI-NEXT: v_readfirstlane_b32 s4, v0
; SI-NEXT: s_lshr_b32 s94, s29, 16
; SI-NEXT: s_lshr_b32 vcc_lo, s28, 16
-; SI-NEXT: s_lshr_b32 s31, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s68, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
+; SI-NEXT: s_lshr_b32 s30, s27, 16
+; SI-NEXT: s_lshr_b32 s34, s26, 16
+; SI-NEXT: s_lshr_b32 s35, s25, 16
+; SI-NEXT: s_lshr_b32 s68, s24, 16
; SI-NEXT: s_lshr_b32 s70, s23, 16
; SI-NEXT: s_lshr_b32 s71, s22, 16
; SI-NEXT: s_lshr_b32 s80, s21, 16
@@ -43804,7 +43614,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: s_lshr_b32 s83, s18, 16
; SI-NEXT: s_lshr_b32 s84, s17, 16
; SI-NEXT: s_lshr_b32 s85, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s69, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -43817,55 +43627,56 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s95, 16
-; SI-NEXT: s_lshr_b32 s34, s30, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s31, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v14
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB55_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s37, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s37, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s35, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s30, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_lo, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s94, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s30, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
; SI-NEXT: s_or_b32 s50, s4, s5
; SI-NEXT: s_and_b32 s4, s95, 0xffff
; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
@@ -43904,11 +43715,12 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB55_3
; SI-NEXT: .LBB55_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB55_3: ; %Flow
@@ -43979,11 +43791,11 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s68
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v9, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, s24
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
@@ -43994,7 +43806,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s34
; SI-NEXT: v_cvt_f32_f16_e32 v12, s26
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -44003,7 +43815,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_or_b32_e32 v9, v11, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v11, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v11, s30
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
@@ -44027,10 +43839,10 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_or_b32_e32 v12, v14, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s31
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v15, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s7
; SI-NEXT: v_cvt_f32_f16_e32 v16, vcc_hi
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
@@ -44127,7 +43939,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT: v_or_b32_e32 v25, v27, v25
; SI-NEXT: v_cvt_f32_f16_e32 v27, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v28, s69
; SI-NEXT: v_cvt_f32_f16_e32 v29, s6
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
@@ -44261,24 +44073,24 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; VI-NEXT: v_readfirstlane_b32 s76, v6
; VI-NEXT: v_readfirstlane_b32 s79, v5
; VI-NEXT: v_readfirstlane_b32 s91, v4
-; VI-NEXT: v_readfirstlane_b32 s30, v3
-; VI-NEXT: v_readfirstlane_b32 s35, v2
-; VI-NEXT: v_readfirstlane_b32 s70, v1
-; VI-NEXT: v_readfirstlane_b32 s81, v0
+; VI-NEXT: v_readfirstlane_b32 s4, v3
+; VI-NEXT: v_readfirstlane_b32 s34, v2
+; VI-NEXT: v_readfirstlane_b32 s69, v1
+; VI-NEXT: v_readfirstlane_b32 s80, v0
; VI-NEXT: s_lshr_b32 s56, s29, 16
; VI-NEXT: s_lshr_b32 s61, s28, 16
; VI-NEXT: s_lshr_b32 s90, s27, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s26, 16
-; VI-NEXT: s_lshr_b32 s34, s25, 16
-; VI-NEXT: s_lshr_b32 s68, s24, 16
-; VI-NEXT: s_lshr_b32 s71, s23, 16
-; VI-NEXT: s_lshr_b32 s82, s22, 16
-; VI-NEXT: s_lshr_b32 s84, s21, 16
-; VI-NEXT: s_lshr_b32 s85, s20, 16
-; VI-NEXT: s_lshr_b32 s86, s19, 16
-; VI-NEXT: s_lshr_b32 s87, s18, 16
-; VI-NEXT: s_lshr_b32 s7, s17, 16
-; VI-NEXT: s_lshr_b32 s9, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s25, 16
+; VI-NEXT: s_lshr_b32 s35, s24, 16
+; VI-NEXT: s_lshr_b32 s70, s23, 16
+; VI-NEXT: s_lshr_b32 s81, s22, 16
+; VI-NEXT: s_lshr_b32 s83, s21, 16
+; VI-NEXT: s_lshr_b32 s84, s20, 16
+; VI-NEXT: s_lshr_b32 s85, s19, 16
+; VI-NEXT: s_lshr_b32 s86, s18, 16
+; VI-NEXT: s_lshr_b32 s87, s17, 16
+; VI-NEXT: s_lshr_b32 s7, s16, 16
; VI-NEXT: s_lshr_b32 s63, s6, 16
; VI-NEXT: s_lshr_b32 s11, s8, 16
; VI-NEXT: s_lshr_b32 s13, s10, 16
@@ -44289,70 +44101,71 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; VI-NEXT: s_lshr_b32 s60, s76, 16
; VI-NEXT: s_lshr_b32 s89, s79, 16
; VI-NEXT: s_lshr_b32 vcc_lo, s91, 16
-; VI-NEXT: s_lshr_b32 s31, s30, 16
-; VI-NEXT: s_lshr_b32 s69, s35, 16
-; VI-NEXT: s_lshr_b32 s80, s70, 16
-; VI-NEXT: s_lshr_b32 s83, s81, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v14
+; VI-NEXT: s_lshr_b32 s30, s4, 16
+; VI-NEXT: s_lshr_b32 s68, s34, 16
+; VI-NEXT: s_lshr_b32 s71, s69, 16
+; VI-NEXT: s_lshr_b32 s82, s80, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v14
; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s15, 0
; VI-NEXT: v_writelane_b32 v33, s59, 1
; VI-NEXT: s_cbranch_scc0 .LBB55_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s86, 16
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s9, s7, 16
+; VI-NEXT: s_or_b32 s36, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s9, s86, 16
+; VI-NEXT: s_or_b32 s38, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s9, s85, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s7, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s41, s87, 16
+; VI-NEXT: s_or_b32 s39, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s9, s84, 16
; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s90, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s61, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s81
-; VI-NEXT: s_lshl_b32 s5, s83, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s70
-; VI-NEXT: s_lshl_b32 s5, s80, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s35
-; VI-NEXT: s_lshl_b32 s5, s69, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s30
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_or_b32 s40, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s9, s83, 16
+; VI-NEXT: s_or_b32 s41, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s9, s81, 16
+; VI-NEXT: s_or_b32 s42, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s9, s70, 16
+; VI-NEXT: s_or_b32 s43, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s9, s35, 16
+; VI-NEXT: s_or_b32 s44, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s9, s31, 16
+; VI-NEXT: s_or_b32 s45, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s9, vcc_hi, 16
+; VI-NEXT: s_or_b32 s46, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s9, s90, 16
+; VI-NEXT: s_or_b32 s47, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_lshl_b32 s9, s61, 16
+; VI-NEXT: s_or_b32 s48, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s9, s56, 16
+; VI-NEXT: s_or_b32 s49, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s80
+; VI-NEXT: s_lshl_b32 s9, s82, 16
+; VI-NEXT: s_or_b32 s50, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s69
+; VI-NEXT: s_lshl_b32 s9, s71, 16
+; VI-NEXT: s_or_b32 s51, s5, s9
+; VI-NEXT: s_and_b32 s5, 0xffff, s34
+; VI-NEXT: s_lshl_b32 s9, s68, 16
+; VI-NEXT: s_or_b32 s52, s5, s9
+; VI-NEXT: s_mov_b32 s9, s4
+; VI-NEXT: s_and_b32 s4, 0xffff, s4
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s91
; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
@@ -44403,6 +44216,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; VI-NEXT: s_mov_b32 s15, s13
; VI-NEXT: s_mov_b32 s13, s11
; VI-NEXT: s_mov_b32 s11, s63
+; VI-NEXT: s_mov_b32 s9, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB55_3: ; %Flow
@@ -44412,43 +44226,43 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; VI-NEXT: s_cbranch_scc1 .LBB55_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v27, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s9
-; VI-NEXT: v_mov_b32_e32 v2, s7
+; VI-NEXT: v_mov_b32_e32 v0, s7
+; VI-NEXT: v_mov_b32_e32 v2, s87
; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v27
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v27
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s87
+; VI-NEXT: v_mov_b32_e32 v2, s86
; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v27
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s86
+; VI-NEXT: v_mov_b32_e32 v3, s85
; VI-NEXT: v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v27
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s85
+; VI-NEXT: v_mov_b32_e32 v4, s84
; VI-NEXT: v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v27
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s84
+; VI-NEXT: v_mov_b32_e32 v5, s83
; VI-NEXT: v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v27
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s82
+; VI-NEXT: v_mov_b32_e32 v6, s81
; VI-NEXT: v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v27
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s71
+; VI-NEXT: v_mov_b32_e32 v7, s70
; VI-NEXT: v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v27
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s68
+; VI-NEXT: v_mov_b32_e32 v8, s35
; VI-NEXT: v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v27
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s34
+; VI-NEXT: v_mov_b32_e32 v9, s31
; VI-NEXT: v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v27
; VI-NEXT: v_or_b32_e32 v9, v10, v9
@@ -44468,21 +44282,21 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a
; VI-NEXT: v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v27
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s83
+; VI-NEXT: v_mov_b32_e32 v14, s82
; VI-NEXT: v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s81, v27
+; VI-NEXT: v_add_f16_e32 v15, s80, v27
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s80
+; VI-NEXT: v_mov_b32_e32 v15, s71
; VI-NEXT: v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s70, v27
+; VI-NEXT: v_add_f16_e32 v16, s69, v27
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s69
+; VI-NEXT: v_mov_b32_e32 v16, s68
; VI-NEXT: v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s35, v27
+; VI-NEXT: v_add_f16_e32 v17, s34, v27
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s31
+; VI-NEXT: v_mov_b32_e32 v17, s30
; VI-NEXT: v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s30, v27
+; VI-NEXT: v_add_f16_e32 v18, s9, v27
; VI-NEXT: v_or_b32_e32 v17, v18, v17
; VI-NEXT: v_mov_b32_e32 v18, vcc_lo
; VI-NEXT: v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
@@ -45725,20 +45539,31 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v56i16_to_v56f16:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v25
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
@@ -45753,39 +45578,54 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v0
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v43, v29
+; VI-NEXT: v_mov_b32_e32 v44, v30
+; VI-NEXT: v_mov_b32_e32 v45, v31
+; VI-NEXT: v_mov_b32_e32 v46, v33
+; VI-NEXT: v_mov_b32_e32 v47, v32
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_mov_b32_e32 v33, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_2
; VI-NEXT: ; %bb.1: ; %cmp.true
; VI-NEXT: v_add_u16_e32 v0, 3, v0
-; VI-NEXT: v_add_u16_e32 v56, 3, v56
-; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_add_u16_e32 v47, 3, v47
-; VI-NEXT: v_add_u16_e32 v2, 3, v2
+; VI-NEXT: v_add_u16_e32 v1, 3, v1
; VI-NEXT: v_add_u16_e32 v46, 3, v46
-; VI-NEXT: v_add_u16_e32 v3, 3, v3
+; VI-NEXT: v_add_u16_e32 v2, 3, v2
; VI-NEXT: v_add_u16_e32 v45, 3, v45
-; VI-NEXT: v_add_u16_e32 v4, 3, v4
+; VI-NEXT: v_add_u16_e32 v3, 3, v3
; VI-NEXT: v_add_u16_e32 v44, 3, v44
-; VI-NEXT: v_add_u16_e32 v5, 3, v5
+; VI-NEXT: v_add_u16_e32 v4, 3, v4
; VI-NEXT: v_add_u16_e32 v43, 3, v43
-; VI-NEXT: v_add_u16_e32 v6, 3, v6
+; VI-NEXT: v_add_u16_e32 v5, 3, v5
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_add_u16_e32 v42, 3, v42
+; VI-NEXT: v_add_u16_e32 v6, 3, v6
+; VI-NEXT: v_add_u16_e32 v40, 3, v40
; VI-NEXT: v_add_u16_e32 v7, 3, v7
; VI-NEXT: v_add_u16_e32 v41, 3, v41
; VI-NEXT: v_add_u16_e32 v8, 3, v8
-; VI-NEXT: v_add_u16_e32 v40, 3, v40
+; VI-NEXT: v_add_u16_e32 v33, 3, v33
; VI-NEXT: v_add_u16_e32 v9, 3, v9
; VI-NEXT: v_add_u16_e32 v55, 3, v55
; VI-NEXT: v_add_u16_e32 v10, 3, v10
@@ -45815,81 +45655,84 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_add_u16_e32 v22, 3, v22
; VI-NEXT: v_add_u16_e32 v34, 3, v34
; VI-NEXT: v_add_u16_e32 v23, 3, v23
-; VI-NEXT: v_add_u16_e32 v33, 3, v33
-; VI-NEXT: v_add_u16_e32 v24, 3, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v32, 3, v32
-; VI-NEXT: v_add_u16_e32 v25, 3, v25
+; VI-NEXT: v_add_u16_e32 v24, 3, v24
; VI-NEXT: v_add_u16_e32 v31, 3, v31
-; VI-NEXT: v_add_u16_e32 v26, 3, v26
+; VI-NEXT: v_add_u16_e32 v25, 3, v25
; VI-NEXT: v_add_u16_e32 v30, 3, v30
-; VI-NEXT: v_add_u16_e32 v27, 3, v27
+; VI-NEXT: v_add_u16_e32 v26, 3, v26
; VI-NEXT: v_add_u16_e32 v29, 3, v29
+; VI-NEXT: v_add_u16_e32 v27, 3, v27
+; VI-NEXT: v_add_u16_e32 v28, 3, v28
; VI-NEXT: .LBB56_2: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v56
-; VI-NEXT: v_or_b32_sdwa v0, v0, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
-; VI-NEXT: v_or_b32_sdwa v1, v1, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v46
-; VI-NEXT: v_or_b32_sdwa v2, v2, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v45
-; VI-NEXT: v_or_b32_sdwa v3, v3, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v44
-; VI-NEXT: v_or_b32_sdwa v4, v4, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v43
-; VI-NEXT: v_or_b32_sdwa v5, v5, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
-; VI-NEXT: v_or_b32_sdwa v6, v6, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
-; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v40
-; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v8, v8, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v55
-; VI-NEXT: v_or_b32_sdwa v9, v9, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
-; VI-NEXT: v_or_b32_sdwa v10, v10, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; VI-NEXT: v_or_b32_sdwa v11, v11, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; VI-NEXT: v_or_b32_sdwa v12, v12, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
-; VI-NEXT: v_or_b32_sdwa v13, v13, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v50
-; VI-NEXT: v_or_b32_sdwa v14, v14, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v49
-; VI-NEXT: v_or_b32_sdwa v15, v15, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v48
-; VI-NEXT: v_or_b32_sdwa v16, v16, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v39
-; VI-NEXT: v_or_b32_sdwa v17, v17, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v37
-; VI-NEXT: v_or_b32_sdwa v19, v19, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v36
-; VI-NEXT: v_or_b32_sdwa v20, v20, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v35
-; VI-NEXT: v_or_b32_sdwa v21, v21, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v34
-; VI-NEXT: v_or_b32_sdwa v22, v22, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v33
-; VI-NEXT: v_or_b32_sdwa v23, v23, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v32
-; VI-NEXT: v_or_b32_sdwa v24, v24, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v31
-; VI-NEXT: v_or_b32_sdwa v25, v25, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
-; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v46
+; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
+; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
+; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; VI-NEXT: v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
+; VI-NEXT: v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; VI-NEXT: v_or_b32_sdwa v8, v8, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
+; VI-NEXT: v_or_b32_sdwa v9, v9, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v54
+; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v53
+; VI-NEXT: v_or_b32_sdwa v11, v11, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v52
+; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v51
+; VI-NEXT: v_or_b32_sdwa v13, v13, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v50
+; VI-NEXT: v_or_b32_sdwa v14, v14, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v49
+; VI-NEXT: v_or_b32_sdwa v15, v15, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v48
+; VI-NEXT: v_or_b32_sdwa v16, v16, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v39
+; VI-NEXT: v_or_b32_sdwa v17, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v38
+; VI-NEXT: v_or_b32_sdwa v18, v18, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v37
+; VI-NEXT: v_or_b32_sdwa v19, v19, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v36
+; VI-NEXT: v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v35
+; VI-NEXT: v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v34
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -45897,24 +45740,32 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; GFX9-LABEL: bitcast_v56i16_to_v56f16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v19
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v25
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v21
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v20
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v19
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
@@ -45937,19 +45788,30 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB56_2
; GFX9-NEXT: ; %bb.1: ; %cmp.true
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v27, v56, v27, s6
-; GFX9-NEXT: v_perm_b32 v26, v47, v26, s6
-; GFX9-NEXT: v_perm_b32 v25, v46, v25, s6
-; GFX9-NEXT: v_perm_b32 v24, v45, v24, s6
-; GFX9-NEXT: v_perm_b32 v23, v44, v23, s6
-; GFX9-NEXT: v_perm_b32 v22, v43, v22, s6
-; GFX9-NEXT: v_perm_b32 v21, v42, v21, s6
-; GFX9-NEXT: v_perm_b32 v20, v41, v20, s6
-; GFX9-NEXT: v_perm_b32 v19, v40, v19, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v47, v27, s6
+; GFX9-NEXT: v_perm_b32 v26, v46, v26, s6
+; GFX9-NEXT: v_perm_b32 v25, v45, v25, s6
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s6
+; GFX9-NEXT: v_perm_b32 v23, v43, v23, s6
+; GFX9-NEXT: v_perm_b32 v22, v42, v22, s6
+; GFX9-NEXT: v_perm_b32 v21, v41, v21, s6
+; GFX9-NEXT: v_perm_b32 v20, v40, v20, s6
+; GFX9-NEXT: v_perm_b32 v19, v28, v19, s6
; GFX9-NEXT: v_perm_b32 v18, v55, v18, s6
; GFX9-NEXT: v_perm_b32 v17, v54, v17, s6
; GFX9-NEXT: v_perm_b32 v16, v53, v16, s6
@@ -46016,36 +45878,42 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT: .LBB56_2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0x5040100
-; GFX9-NEXT: v_perm_b32 v19, v40, v19, s4
-; GFX9-NEXT: v_perm_b32 v20, v41, v20, s4
-; GFX9-NEXT: v_perm_b32 v21, v42, v21, s4
-; GFX9-NEXT: v_perm_b32 v22, v43, v22, s4
-; GFX9-NEXT: v_perm_b32 v23, v44, v23, s4
-; GFX9-NEXT: v_perm_b32 v24, v45, v24, s4
-; GFX9-NEXT: v_perm_b32 v25, v46, v25, s4
-; GFX9-NEXT: v_perm_b32 v26, v47, v26, s4
-; GFX9-NEXT: v_perm_b32 v27, v56, v27, s4
-; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_perm_b32 v20, v40, v20, s4
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v21, v41, v21, s4
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v22, v42, v22, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v43, v23, s4
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v45, v25, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v46, v26, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v47, v27, s4
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
; GFX9-NEXT: v_perm_b32 v2, v31, v2, s4
@@ -46065,6 +45933,7 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
; GFX9-NEXT: v_perm_b32 v17, v54, v17, s4
; GFX9-NEXT: v_perm_b32 v18, v55, v18, s4
+; GFX9-NEXT: v_perm_b32 v19, v28, v19, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -46425,194 +46294,195 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: v_writelane_b32 v28, s71, 21
; SI-NEXT: v_writelane_b32 v28, s80, 22
; SI-NEXT: v_writelane_b32 v28, s81, 23
-; SI-NEXT: v_writelane_b32 v28, s82, 24
-; SI-NEXT: v_writelane_b32 v28, s83, 25
-; SI-NEXT: v_writelane_b32 v28, s84, 26
-; SI-NEXT: v_writelane_b32 v28, s85, 27
-; SI-NEXT: v_writelane_b32 v28, s86, 28
-; SI-NEXT: v_writelane_b32 v28, s87, 29
-; SI-NEXT: v_writelane_b32 v28, s96, 30
-; SI-NEXT: v_writelane_b32 v28, s97, 31
-; SI-NEXT: v_writelane_b32 v28, s98, 32
-; SI-NEXT: v_writelane_b32 v28, s99, 33
-; SI-NEXT: v_writelane_b32 v28, s30, 34
-; SI-NEXT: v_writelane_b32 v28, s31, 35
-; SI-NEXT: v_readfirstlane_b32 s87, v4
-; SI-NEXT: v_readfirstlane_b32 s83, v6
-; SI-NEXT: s_lshr_b32 s5, s87, 16
+; SI-NEXT: v_writelane_b32 v28, s30, 24
+; SI-NEXT: v_writelane_b32 v28, s31, 25
+; SI-NEXT: v_readfirstlane_b32 s53, v0
+; SI-NEXT: v_readfirstlane_b32 s55, v2
+; SI-NEXT: s_lshr_b32 s45, s53, 16
; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane
-; SI-NEXT: v_readfirstlane_b32 s98, v8
-; SI-NEXT: s_lshr_b32 s7, s83, 16
+; SI-NEXT: v_readfirstlane_b32 s65, v4
+; SI-NEXT: s_lshr_b32 s44, s55, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v29, s5, 0
-; SI-NEXT: v_readfirstlane_b32 s54, v13
-; SI-NEXT: v_readfirstlane_b32 s55, v12
-; SI-NEXT: v_readfirstlane_b32 s52, v11
-; SI-NEXT: v_readfirstlane_b32 s53, v10
-; SI-NEXT: v_readfirstlane_b32 s86, v9
-; SI-NEXT: s_lshr_b32 s9, s98, 16
-; SI-NEXT: v_readfirstlane_b32 s96, v7
-; SI-NEXT: v_readfirstlane_b32 s85, v5
-; SI-NEXT: v_readfirstlane_b32 s82, v3
-; SI-NEXT: v_readfirstlane_b32 s84, v2
-; SI-NEXT: v_readfirstlane_b32 s97, v1
-; SI-NEXT: v_readfirstlane_b32 s99, v0
-; SI-NEXT: v_writelane_b32 v29, s7, 1
-; SI-NEXT: s_lshr_b32 s66, s29, 16
-; SI-NEXT: s_lshr_b32 s37, s28, 16
-; SI-NEXT: s_lshr_b32 s65, s27, 16
-; SI-NEXT: s_lshr_b32 s35, s26, 16
-; SI-NEXT: s_lshr_b32 s64, s25, 16
-; SI-NEXT: s_lshr_b32 s31, s24, 16
-; SI-NEXT: s_lshr_b32 s89, s23, 16
-; SI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; SI-NEXT: s_lshr_b32 s79, s21, 16
-; SI-NEXT: s_lshr_b32 s95, s20, 16
-; SI-NEXT: s_lshr_b32 s77, s19, 16
-; SI-NEXT: s_lshr_b32 s93, s18, 16
-; SI-NEXT: s_lshr_b32 s75, s17, 16
-; SI-NEXT: s_lshr_b32 s91, s16, 16
-; SI-NEXT: s_lshr_b32 s81, s54, 16
-; SI-NEXT: s_lshr_b32 s90, s55, 16
-; SI-NEXT: s_lshr_b32 s80, s52, 16
-; SI-NEXT: s_lshr_b32 s11, s53, 16
-; SI-NEXT: s_lshr_b32 s71, s86, 16
-; SI-NEXT: s_lshr_b32 s70, s96, 16
-; SI-NEXT: s_lshr_b32 s69, s85, 16
-; SI-NEXT: s_lshr_b32 s68, s82, 16
-; SI-NEXT: s_lshr_b32 s49, s84, 16
-; SI-NEXT: s_lshr_b32 s67, s97, 16
-; SI-NEXT: s_lshr_b32 s39, s99, 16
+; SI-NEXT: v_writelane_b32 v29, s45, 0
+; SI-NEXT: v_readfirstlane_b32 s66, v6
+; SI-NEXT: s_lshr_b32 s42, s65, 16
+; SI-NEXT: v_writelane_b32 v29, s44, 1
+; SI-NEXT: v_readfirstlane_b32 s68, v8
+; SI-NEXT: s_lshr_b32 s40, s66, 16
+; SI-NEXT: v_writelane_b32 v29, s42, 2
+; SI-NEXT: s_lshr_b32 s14, s68, 16
+; SI-NEXT: v_writelane_b32 v29, s40, 3
+; SI-NEXT: v_readfirstlane_b32 s70, v10
+; SI-NEXT: v_readfirstlane_b32 s43, v1
+; SI-NEXT: v_writelane_b32 v29, s14, 4
+; SI-NEXT: s_lshr_b32 s12, s70, 16
+; SI-NEXT: v_writelane_b32 v29, s43, 5
+; SI-NEXT: v_readfirstlane_b32 s41, v3
+; SI-NEXT: v_writelane_b32 v29, s12, 6
+; SI-NEXT: v_readfirstlane_b32 s15, v5
+; SI-NEXT: v_writelane_b32 v29, s41, 7
+; SI-NEXT: v_readfirstlane_b32 s13, v7
+; SI-NEXT: v_writelane_b32 v29, s15, 8
+; SI-NEXT: v_readfirstlane_b32 s11, v9
+; SI-NEXT: v_writelane_b32 v29, s13, 9
+; SI-NEXT: v_readfirstlane_b32 s7, v13
+; SI-NEXT: v_readfirstlane_b32 s80, v12
+; SI-NEXT: v_readfirstlane_b32 s9, v11
+; SI-NEXT: v_writelane_b32 v29, s11, 10
+; SI-NEXT: s_lshr_b32 s93, s29, 16
+; SI-NEXT: s_lshr_b32 s81, s28, 16
+; SI-NEXT: s_lshr_b32 s91, s27, 16
+; SI-NEXT: s_lshr_b32 s71, s26, 16
+; SI-NEXT: s_lshr_b32 s89, s25, 16
+; SI-NEXT: s_lshr_b32 s69, s24, 16
+; SI-NEXT: s_lshr_b32 s79, s23, 16
+; SI-NEXT: s_lshr_b32 s67, s22, 16
+; SI-NEXT: s_lshr_b32 s77, s21, 16
+; SI-NEXT: s_lshr_b32 s64, s20, 16
+; SI-NEXT: s_lshr_b32 s75, s19, 16
+; SI-NEXT: s_lshr_b32 s54, s18, 16
+; SI-NEXT: s_lshr_b32 s73, s17, 16
+; SI-NEXT: s_lshr_b32 s52, s16, 16
+; SI-NEXT: s_lshr_b32 s49, s7, 16
+; SI-NEXT: s_lshr_b32 s5, s80, 16
+; SI-NEXT: s_lshr_b32 s39, s9, 16
+; SI-NEXT: s_lshr_b32 s37, s11, 16
+; SI-NEXT: s_lshr_b32 s35, s13, 16
+; SI-NEXT: s_lshr_b32 s31, s15, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s41, 16
+; SI-NEXT: s_lshr_b32 s95, s43, 16
; SI-NEXT: v_readfirstlane_b32 s4, v14
-; SI-NEXT: v_writelane_b32 v29, s9, 2
+; SI-NEXT: v_writelane_b32 v29, s9, 11
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v29, s11, 3
-; SI-NEXT: v_writelane_b32 v29, s90, 4
+; SI-NEXT: v_writelane_b32 v29, s7, 12
+; SI-NEXT: v_writelane_b32 v29, s5, 13
; SI-NEXT: s_cbranch_scc0 .LBB57_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshl_b32 s42, s5, 16
-; SI-NEXT: s_lshl_b32 s40, s7, 16
-; SI-NEXT: s_and_b32 s5, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s75, 16
-; SI-NEXT: s_or_b32 s73, s5, s7
-; SI-NEXT: s_and_b32 s5, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s77, 16
-; SI-NEXT: s_mov_b32 s78, s75
-; SI-NEXT: s_or_b32 s75, s5, s7
-; SI-NEXT: s_and_b32 s5, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s79, 16
-; SI-NEXT: s_mov_b32 s88, s79
-; SI-NEXT: s_mov_b32 s79, s77
-; SI-NEXT: s_or_b32 s77, s5, s7
-; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s89, 16
-; SI-NEXT: s_or_b32 s63, s5, s7
-; SI-NEXT: s_and_b32 s5, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s64, 16
-; SI-NEXT: s_or_b32 s61, s5, s7
-; SI-NEXT: s_and_b32 s5, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s65, 16
-; SI-NEXT: s_or_b32 s59, s5, s7
-; SI-NEXT: s_and_b32 s5, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s66, 16
-; SI-NEXT: s_or_b32 s57, s5, s7
-; SI-NEXT: s_and_b32 s5, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s67, 16
-; SI-NEXT: s_or_b32 s47, s5, s7
-; SI-NEXT: s_and_b32 s5, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s68, 16
-; SI-NEXT: s_or_b32 s45, s5, s7
-; SI-NEXT: s_and_b32 s5, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s69, 16
-; SI-NEXT: s_or_b32 s43, s5, s7
-; SI-NEXT: s_and_b32 s5, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_lshl_b32 s46, s45, 16
+; SI-NEXT: s_and_b32 s45, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s73, 16
+; SI-NEXT: s_mov_b32 s78, s73
+; SI-NEXT: s_or_b32 s73, s45, s47
+; SI-NEXT: s_and_b32 s45, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s75, 16
+; SI-NEXT: s_mov_b32 s88, s75
+; SI-NEXT: s_or_b32 s75, s45, s47
+; SI-NEXT: s_and_b32 s45, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s77, 16
+; SI-NEXT: s_mov_b32 s90, s77
+; SI-NEXT: s_or_b32 s77, s45, s47
+; SI-NEXT: s_and_b32 s45, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s79, 16
+; SI-NEXT: s_or_b32 s63, s45, s47
+; SI-NEXT: s_and_b32 s45, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s89, 16
+; SI-NEXT: s_or_b32 s61, s45, s47
+; SI-NEXT: s_and_b32 s45, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s91, 16
+; SI-NEXT: s_or_b32 s59, s45, s47
+; SI-NEXT: s_and_b32 s45, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s93, 16
+; SI-NEXT: s_or_b32 s57, s45, s47
+; SI-NEXT: s_and_b32 s43, s43, 0xffff
+; SI-NEXT: s_lshl_b32 s45, s95, 16
+; SI-NEXT: s_or_b32 s47, s43, s45
+; SI-NEXT: s_and_b32 s41, s41, 0xffff
+; SI-NEXT: s_lshl_b32 s43, vcc_hi, 16
+; SI-NEXT: s_or_b32 s45, s41, s43
+; SI-NEXT: s_and_b32 s15, s15, 0xffff
+; SI-NEXT: s_lshl_b32 s41, s31, 16
+; SI-NEXT: s_or_b32 s43, s15, s41
+; SI-NEXT: s_and_b32 s13, s13, 0xffff
+; SI-NEXT: s_lshl_b32 s15, s35, 16
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s72, s91, 16
-; SI-NEXT: s_or_b32 s41, s5, s7
-; SI-NEXT: s_and_b32 s5, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_lshl_b32 s72, s52, 16
+; SI-NEXT: s_or_b32 s41, s13, s15
+; SI-NEXT: s_and_b32 s11, s11, 0xffff
+; SI-NEXT: s_lshl_b32 s13, s37, 16
; SI-NEXT: s_or_b32 s10, s4, s72
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s74, s93, 16
-; SI-NEXT: s_or_b32 s15, s5, s7
-; SI-NEXT: s_and_b32 s5, s52, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s80, 16
+; SI-NEXT: s_lshl_b32 s74, s54, 16
+; SI-NEXT: s_or_b32 s15, s11, s13
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s11, s39, 16
; SI-NEXT: s_or_b32 s8, s4, s74
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s76, s95, 16
-; SI-NEXT: s_or_b32 s13, s5, s7
-; SI-NEXT: s_and_b32 s5, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_lshl_b32 s76, s64, 16
+; SI-NEXT: s_or_b32 s13, s9, s11
+; SI-NEXT: s_and_b32 s7, s7, 0xffff
+; SI-NEXT: s_lshl_b32 s9, s49, 16
; SI-NEXT: s_or_b32 s6, s4, s76
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s62, vcc_hi, 16
-; SI-NEXT: s_lshl_b32 s44, s49, 16
-; SI-NEXT: s_lshl_b32 s14, s9, 16
+; SI-NEXT: s_lshl_b32 s62, s67, 16
; SI-NEXT: s_mov_b32 s50, s49
-; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_or_b32 s49, s7, s9
+; SI-NEXT: s_mov_b32 s11, s73
+; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT: s_mov_b32 s9, s75
; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16
+; SI-NEXT: s_or_b32 s4, s4, s62
+; SI-NEXT: s_lshl_b32 s60, s69, 16
+; SI-NEXT: s_mov_b32 s73, s78
+; SI-NEXT: s_mov_b32 s75, s88
; SI-NEXT: s_mov_b32 s7, s77
; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16
-; SI-NEXT: s_or_b32 s4, s4, s62
-; SI-NEXT: s_lshl_b32 s60, s31, 16
-; SI-NEXT: s_lshl_b32 s12, s11, 16
-; SI-NEXT: s_mov_b32 s11, s73
-; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16
-; SI-NEXT: s_mov_b32 s75, s78
-; SI-NEXT: s_mov_b32 s77, s79
+; SI-NEXT: s_mov_b32 s88, s79
; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16
; SI-NEXT: s_and_b32 s62, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s58, s35, 16
+; SI-NEXT: s_lshl_b32 s58, s71, 16
+; SI-NEXT: s_mov_b32 s77, s90
; SI-NEXT: s_mov_b32 s79, s88
; SI-NEXT: s_or_b32 s62, s62, s60
-; SI-NEXT: s_mov_b32 s73, s89
+; SI-NEXT: s_mov_b32 s90, s89
; SI-NEXT: s_lshr_b64 s[88:89], s[60:61], 16
; SI-NEXT: s_and_b32 s60, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s56, s37, 16
-; SI-NEXT: s_lshl_b32 s48, s90, 16
-; SI-NEXT: s_mov_b32 s89, s73
+; SI-NEXT: s_lshl_b32 s56, s81, 16
+; SI-NEXT: s_mov_b32 s89, s90
; SI-NEXT: s_or_b32 s60, s60, s58
-; SI-NEXT: s_mov_b32 s73, s91
+; SI-NEXT: s_mov_b32 s92, s91
; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 16
; SI-NEXT: s_and_b32 s58, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s46, s39, 16
-; SI-NEXT: s_mov_b32 s91, s73
+; SI-NEXT: s_mov_b32 s91, s92
; SI-NEXT: s_or_b32 s58, s58, s56
-; SI-NEXT: s_mov_b32 s73, s93
+; SI-NEXT: s_mov_b32 s94, s93
; SI-NEXT: s_lshr_b64 s[92:93], s[56:57], 16
-; SI-NEXT: s_and_b32 s56, s99, 0xffff
-; SI-NEXT: s_mov_b32 s93, s73
+; SI-NEXT: s_and_b32 s56, s53, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_mov_b32 s93, s94
; SI-NEXT: s_or_b32 s56, s56, s46
-; SI-NEXT: s_mov_b32 s73, s95
+; SI-NEXT: s_mov_b32 vcc_lo, s95
; SI-NEXT: s_lshr_b64 s[94:95], s[46:47], 16
-; SI-NEXT: s_and_b32 s46, s84, 0xffff
-; SI-NEXT: s_mov_b32 s95, s73
+; SI-NEXT: s_and_b32 s46, s55, 0xffff
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: s_mov_b32 s95, vcc_lo
; SI-NEXT: s_or_b32 s46, s46, s44
-; SI-NEXT: s_mov_b32 s73, vcc_hi
+; SI-NEXT: s_mov_b32 s30, vcc_hi
; SI-NEXT: s_lshr_b64 vcc, s[44:45], 16
-; SI-NEXT: s_and_b32 s44, s87, 0xffff
-; SI-NEXT: s_mov_b32 vcc_hi, s73
+; SI-NEXT: s_and_b32 s44, s65, 0xffff
+; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: s_mov_b32 vcc_hi, s30
; SI-NEXT: s_or_b32 s44, s44, s42
-; SI-NEXT: s_mov_b32 s73, s31
+; SI-NEXT: s_mov_b32 s34, s31
; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 16
-; SI-NEXT: s_and_b32 s42, s83, 0xffff
-; SI-NEXT: s_mov_b32 s31, s73
+; SI-NEXT: s_and_b32 s42, s66, 0xffff
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: s_mov_b32 s31, s34
; SI-NEXT: s_or_b32 s42, s42, s40
-; SI-NEXT: s_mov_b32 s73, s35
+; SI-NEXT: s_mov_b32 s36, s35
; SI-NEXT: s_lshr_b64 s[34:35], s[40:41], 16
-; SI-NEXT: s_and_b32 s40, s98, 0xffff
-; SI-NEXT: s_mov_b32 s35, s73
+; SI-NEXT: s_and_b32 s40, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_mov_b32 s35, s36
; SI-NEXT: s_or_b32 s40, s40, s14
-; SI-NEXT: s_mov_b32 s73, s37
+; SI-NEXT: s_mov_b32 s38, s37
; SI-NEXT: s_lshr_b64 s[36:37], s[14:15], 16
-; SI-NEXT: s_and_b32 s14, s53, 0xffff
-; SI-NEXT: s_mov_b32 s37, s73
+; SI-NEXT: s_and_b32 s14, s70, 0xffff
+; SI-NEXT: s_lshl_b32 s48, s5, 16
+; SI-NEXT: s_mov_b32 s37, s38
; SI-NEXT: s_or_b32 s14, s14, s12
-; SI-NEXT: s_mov_b32 s73, s39
+; SI-NEXT: s_mov_b32 s51, s39
; SI-NEXT: s_lshr_b64 s[38:39], s[12:13], 16
-; SI-NEXT: s_and_b32 s12, s55, 0xffff
+; SI-NEXT: s_and_b32 s12, s80, 0xffff
; SI-NEXT: s_mov_b32 s5, s63
; SI-NEXT: s_mov_b32 s63, s61
; SI-NEXT: s_mov_b32 s61, s59
@@ -46626,7 +46496,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_or_b32 s12, s12, s48
; SI-NEXT: s_mov_b32 s13, s49
; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16
-; SI-NEXT: s_mov_b32 s39, s73
+; SI-NEXT: s_mov_b32 s39, s51
; SI-NEXT: s_mov_b32 s49, s50
; SI-NEXT: s_mov_b64 s[50:51], 0
; SI-NEXT: s_branch .LBB57_3
@@ -46662,160 +46532,169 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: .LBB57_3: ; %Flow
; SI-NEXT: s_and_b64 s[50:51], s[50:51], exec
-; SI-NEXT: s_cselect_b32 s73, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s73, 1
+; SI-NEXT: s_cselect_b32 s50, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s50, 1
; SI-NEXT: s_cbranch_scc1 .LBB57_5
; SI-NEXT: ; %bb.4: ; %cmp.true
-; SI-NEXT: s_add_i32 s55, s55, 3
-; SI-NEXT: v_readlane_b32 s5, v29, 4
-; SI-NEXT: s_and_b32 s4, s55, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s54, s54, 3
+; SI-NEXT: s_add_i32 s80, s80, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 13
+; SI-NEXT: s_and_b32 s5, s80, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s12, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 12
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s49, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s53, s53, 3
-; SI-NEXT: v_readlane_b32 s5, v29, 3
; SI-NEXT: s_add_i32 s13, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s52, s52, 3
+; SI-NEXT: s_add_i32 s70, s70, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 6
+; SI-NEXT: s_and_b32 s5, s70, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s14, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s52, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 11
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s98, s98, 3
-; SI-NEXT: v_readlane_b32 s5, v29, 2
; SI-NEXT: s_add_i32 s15, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s98, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s86, s86, 3
+; SI-NEXT: s_add_i32 s68, s68, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 4
+; SI-NEXT: s_and_b32 s5, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s40, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s86, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 10
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s83, s83, 3
-; SI-NEXT: v_readlane_b32 s5, v29, 1
; SI-NEXT: s_add_i32 s41, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s83, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s96, s96, 3
+; SI-NEXT: s_add_i32 s66, s66, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 3
+; SI-NEXT: s_and_b32 s5, s66, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s42, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s96, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 9
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s87, s87, 3
-; SI-NEXT: v_readlane_b32 s5, v29, 0
; SI-NEXT: s_add_i32 s43, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s87, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s85, s85, 3
+; SI-NEXT: s_add_i32 s65, s65, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 2
+; SI-NEXT: s_and_b32 s5, s65, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s44, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s85, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 8
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s31, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s84, s84, 3
; SI-NEXT: s_add_i32 s45, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s84, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s49, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s82, s82, 3
+; SI-NEXT: s_add_i32 s55, s55, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 1
+; SI-NEXT: s_and_b32 s5, s55, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s46, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s68, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 7
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s99, s99, 3
; SI-NEXT: s_add_i32 s47, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s99, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s39, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s97, s97, 3
+; SI-NEXT: s_add_i32 s53, s53, 3
+; SI-NEXT: v_readlane_b32 s4, v29, 0
+; SI-NEXT: s_and_b32 s5, s53, 0xffff
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_add_i32 s56, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s97, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s67, 16
+; SI-NEXT: v_readlane_b32 s4, v29, 5
+; SI-NEXT: s_add_i32 s4, s4, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s57, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s37, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s29, s29, 3
; SI-NEXT: s_add_i32 s58, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s66, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s26, s26, 3
; SI-NEXT: s_add_i32 s59, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
+; SI-NEXT: s_lshl_b32 s5, s71, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s60, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_lshl_b32 s5, s91, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s61, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s31, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s62, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s64, 16
+; SI-NEXT: s_lshl_b32 s5, s89, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s63, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
+; SI-NEXT: s_lshl_b32 s5, s67, 16
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s6, s89, 16
+; SI-NEXT: s_lshl_b32 s6, s79, 16
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s7, s95, 16
+; SI-NEXT: s_lshl_b32 s7, s64, 16
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: s_and_b32 s7, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s8, s79, 16
+; SI-NEXT: s_lshl_b32 s8, s77, 16
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s9, s93, 16
+; SI-NEXT: s_lshl_b32 s9, s54, 16
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_and_b32 s9, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s10, s77, 16
+; SI-NEXT: s_lshl_b32 s10, s75, 16
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: s_and_b32 s10, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s11, s91, 16
+; SI-NEXT: s_lshl_b32 s11, s52, 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_or_b32 s10, s11, s10
; SI-NEXT: s_and_b32 s11, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s75, 16
+; SI-NEXT: s_lshl_b32 s16, s73, 16
+; SI-NEXT: s_or_b32 s11, s16, s11
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: s_or_b32 s11, s16, s11
; SI-NEXT: s_add_i32 s10, s10, 0x30000
; SI-NEXT: s_add_i32 s11, s11, 0x30000
+; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16
; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16
@@ -46825,106 +46704,106 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16
-; SI-NEXT: s_lshr_b32 s75, s11, 16
-; SI-NEXT: s_lshr_b32 s77, s9, 16
-; SI-NEXT: s_lshr_b32 s79, s7, 16
-; SI-NEXT: s_lshr_b32 s89, s5, 16
-; SI-NEXT: s_lshr_b32 s64, s63, 16
-; SI-NEXT: s_lshr_b32 s65, s61, 16
-; SI-NEXT: s_lshr_b32 s66, s59, 16
-; SI-NEXT: s_lshr_b32 s67, s57, 16
-; SI-NEXT: s_lshr_b32 s68, s47, 16
-; SI-NEXT: s_lshr_b32 s69, s45, 16
-; SI-NEXT: s_lshr_b32 s70, s43, 16
-; SI-NEXT: s_lshr_b32 s71, s41, 16
-; SI-NEXT: s_lshr_b32 s80, s15, 16
-; SI-NEXT: s_lshr_b32 s81, s13, 16
+; SI-NEXT: s_lshr_b32 s73, s11, 16
+; SI-NEXT: s_lshr_b32 s75, s9, 16
+; SI-NEXT: s_lshr_b32 s77, s7, 16
+; SI-NEXT: s_lshr_b32 s79, s5, 16
+; SI-NEXT: s_lshr_b32 s89, s63, 16
+; SI-NEXT: s_lshr_b32 s91, s61, 16
+; SI-NEXT: s_lshr_b32 s93, s59, 16
+; SI-NEXT: s_lshr_b32 s95, s57, 16
+; SI-NEXT: s_lshr_b32 vcc_hi, s47, 16
+; SI-NEXT: s_lshr_b32 s31, s45, 16
+; SI-NEXT: s_lshr_b32 s35, s43, 16
+; SI-NEXT: s_lshr_b32 s37, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s15, 16
+; SI-NEXT: s_lshr_b32 s49, s13, 16
; SI-NEXT: .LBB57_5: ; %end
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_lshl_b32 s16, s72, 16
; SI-NEXT: s_or_b32 s10, s10, s16
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s75, 16
+; SI-NEXT: s_lshl_b32 s16, s73, 16
; SI-NEXT: s_or_b32 s11, s11, s16
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_lshl_b32 s16, s74, 16
; SI-NEXT: s_or_b32 s8, s8, s16
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s77, 16
+; SI-NEXT: s_lshl_b32 s16, s75, 16
; SI-NEXT: s_or_b32 s9, s9, s16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_lshl_b32 s16, s76, 16
; SI-NEXT: s_or_b32 s6, s6, s16
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s79, 16
+; SI-NEXT: s_lshl_b32 s16, s77, 16
; SI-NEXT: s_or_b32 s7, s7, s16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s16, s78, 16
; SI-NEXT: s_or_b32 s4, s4, s16
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s16, s89, 16
+; SI-NEXT: s_lshl_b32 s16, s79, 16
; SI-NEXT: s_or_b32 s5, s5, s16
; SI-NEXT: s_and_b32 s16, s62, 0xffff
; SI-NEXT: s_lshl_b32 s17, s88, 16
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s63, 0xffff
-; SI-NEXT: s_lshl_b32 s18, s64, 16
+; SI-NEXT: s_lshl_b32 s18, s89, 16
; SI-NEXT: s_or_b32 s17, s17, s18
; SI-NEXT: s_and_b32 s18, s60, 0xffff
; SI-NEXT: s_lshl_b32 s19, s90, 16
; SI-NEXT: s_or_b32 s18, s18, s19
; SI-NEXT: s_and_b32 s19, s61, 0xffff
-; SI-NEXT: s_lshl_b32 s20, s65, 16
+; SI-NEXT: s_lshl_b32 s20, s91, 16
; SI-NEXT: s_or_b32 s19, s19, s20
; SI-NEXT: s_and_b32 s20, s58, 0xffff
; SI-NEXT: s_lshl_b32 s21, s92, 16
; SI-NEXT: s_or_b32 s20, s20, s21
; SI-NEXT: s_and_b32 s21, s59, 0xffff
-; SI-NEXT: s_lshl_b32 s22, s66, 16
+; SI-NEXT: s_lshl_b32 s22, s93, 16
; SI-NEXT: s_or_b32 s21, s21, s22
; SI-NEXT: s_and_b32 s22, s56, 0xffff
; SI-NEXT: s_lshl_b32 s23, s94, 16
; SI-NEXT: s_or_b32 s22, s22, s23
; SI-NEXT: s_and_b32 s23, s57, 0xffff
-; SI-NEXT: s_lshl_b32 s24, s67, 16
+; SI-NEXT: s_lshl_b32 s24, s95, 16
; SI-NEXT: s_or_b32 s23, s23, s24
; SI-NEXT: s_and_b32 s24, s46, 0xffff
; SI-NEXT: s_lshl_b32 s25, vcc_lo, 16
; SI-NEXT: s_or_b32 s24, s24, s25
; SI-NEXT: s_and_b32 s25, s47, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s68, 16
+; SI-NEXT: s_lshl_b32 s26, vcc_hi, 16
; SI-NEXT: s_or_b32 s25, s25, s26
; SI-NEXT: s_and_b32 s26, s44, 0xffff
; SI-NEXT: s_lshl_b32 s27, s30, 16
; SI-NEXT: s_or_b32 s26, s26, s27
; SI-NEXT: s_and_b32 s27, s45, 0xffff
-; SI-NEXT: s_lshl_b32 s28, s69, 16
+; SI-NEXT: s_lshl_b32 s28, s31, 16
; SI-NEXT: s_or_b32 s27, s27, s28
; SI-NEXT: s_and_b32 s28, s42, 0xffff
; SI-NEXT: s_lshl_b32 s29, s34, 16
; SI-NEXT: s_or_b32 s28, s28, s29
; SI-NEXT: s_and_b32 s29, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s70, 16
+; SI-NEXT: s_lshl_b32 s42, s35, 16
; SI-NEXT: s_or_b32 s29, s29, s42
; SI-NEXT: s_and_b32 s40, s40, 0xffff
; SI-NEXT: s_lshl_b32 s42, s36, 16
; SI-NEXT: s_or_b32 s40, s40, s42
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s71, 16
+; SI-NEXT: s_lshl_b32 s42, s37, 16
; SI-NEXT: s_or_b32 s41, s41, s42
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_lshl_b32 s42, s38, 16
; SI-NEXT: s_or_b32 s14, s14, s42
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s80, 16
+; SI-NEXT: s_lshl_b32 s42, s39, 16
; SI-NEXT: s_or_b32 s15, s15, s42
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_lshl_b32 s42, s48, 16
; SI-NEXT: s_or_b32 s12, s12, s42
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s42, s81, 16
+; SI-NEXT: s_lshl_b32 s42, s49, 16
; SI-NEXT: s_or_b32 s13, s13, s42
-; SI-NEXT: v_readlane_b32 s30, v28, 34
+; SI-NEXT: v_readlane_b32 s30, v28, 24
; SI-NEXT: v_mov_b32_e32 v0, s10
; SI-NEXT: v_mov_b32_e32 v1, s11
; SI-NEXT: v_mov_b32_e32 v2, s8
@@ -46953,17 +46832,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v25, s15
; SI-NEXT: v_mov_b32_e32 v26, s12
; SI-NEXT: v_mov_b32_e32 v27, s13
-; SI-NEXT: v_readlane_b32 s31, v28, 35
-; SI-NEXT: v_readlane_b32 s99, v28, 33
-; SI-NEXT: v_readlane_b32 s98, v28, 32
-; SI-NEXT: v_readlane_b32 s97, v28, 31
-; SI-NEXT: v_readlane_b32 s96, v28, 30
-; SI-NEXT: v_readlane_b32 s87, v28, 29
-; SI-NEXT: v_readlane_b32 s86, v28, 28
-; SI-NEXT: v_readlane_b32 s85, v28, 27
-; SI-NEXT: v_readlane_b32 s84, v28, 26
-; SI-NEXT: v_readlane_b32 s83, v28, 25
-; SI-NEXT: v_readlane_b32 s82, v28, 24
+; SI-NEXT: v_readlane_b32 s31, v28, 25
; SI-NEXT: v_readlane_b32 s81, v28, 23
; SI-NEXT: v_readlane_b32 s80, v28, 22
; SI-NEXT: v_readlane_b32 s71, v28, 21
@@ -47001,9 +46870,11 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
-; VI-NEXT: v_writelane_b32 v28, s30, 0
-; VI-NEXT: v_writelane_b32 v28, s31, 1
+; VI-NEXT: s_lshr_b32 s4, s29, 16
+; VI-NEXT: ; implicit-def: $vgpr28 : SGPR spill to VGPR lane
; VI-NEXT: v_readfirstlane_b32 s7, v13
+; VI-NEXT: v_writelane_b32 v28, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s28, 16
; VI-NEXT: v_readfirstlane_b32 s8, v12
; VI-NEXT: v_readfirstlane_b32 s10, v11
; VI-NEXT: v_readfirstlane_b32 s12, v10
@@ -47017,34 +46888,33 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s76, v2
; VI-NEXT: v_readfirstlane_b32 s79, v1
; VI-NEXT: v_readfirstlane_b32 s90, v0
-; VI-NEXT: s_lshr_b32 s42, s29, 16
-; VI-NEXT: s_lshr_b32 s45, s28, 16
-; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: s_lshr_b32 s57, s26, 16
-; VI-NEXT: s_lshr_b32 s60, s25, 16
-; VI-NEXT: s_lshr_b32 s63, s24, 16
-; VI-NEXT: s_lshr_b32 s74, s23, 16
-; VI-NEXT: s_lshr_b32 s75, s22, 16
-; VI-NEXT: s_lshr_b32 s78, s21, 16
-; VI-NEXT: s_lshr_b32 s89, s20, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; VI-NEXT: s_lshr_b32 s30, s17, 16
-; VI-NEXT: s_lshr_b32 s31, s16, 16
-; VI-NEXT: s_lshr_b32 s6, s7, 16
-; VI-NEXT: s_lshr_b32 s9, s8, 16
-; VI-NEXT: s_lshr_b32 s11, s10, 16
-; VI-NEXT: s_lshr_b32 s13, s12, 16
-; VI-NEXT: s_lshr_b32 s15, s14, 16
-; VI-NEXT: s_lshr_b32 s41, s40, 16
-; VI-NEXT: s_lshr_b32 s44, s43, 16
-; VI-NEXT: s_lshr_b32 s56, s47, 16
-; VI-NEXT: s_lshr_b32 s59, s58, 16
-; VI-NEXT: s_lshr_b32 s62, s61, 16
-; VI-NEXT: s_lshr_b32 s73, s72, 16
-; VI-NEXT: s_lshr_b32 s77, s76, 16
-; VI-NEXT: s_lshr_b32 s88, s79, 16
-; VI-NEXT: s_lshr_b32 s91, s90, 16
+; VI-NEXT: v_writelane_b32 v28, s4, 1
+; VI-NEXT: s_lshr_b32 s56, s27, 16
+; VI-NEXT: s_lshr_b32 s59, s26, 16
+; VI-NEXT: s_lshr_b32 s62, s25, 16
+; VI-NEXT: s_lshr_b32 s73, s24, 16
+; VI-NEXT: s_lshr_b32 s75, s23, 16
+; VI-NEXT: s_lshr_b32 s77, s22, 16
+; VI-NEXT: s_lshr_b32 s88, s21, 16
+; VI-NEXT: s_lshr_b32 s91, s20, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s19, 16
+; VI-NEXT: s_lshr_b32 s44, s18, 16
+; VI-NEXT: s_lshr_b32 s6, s17, 16
+; VI-NEXT: s_lshr_b32 s9, s16, 16
+; VI-NEXT: s_lshr_b32 s11, s7, 16
+; VI-NEXT: s_lshr_b32 s13, s8, 16
+; VI-NEXT: s_lshr_b32 s15, s10, 16
+; VI-NEXT: s_lshr_b32 s41, s12, 16
+; VI-NEXT: s_lshr_b32 s42, s14, 16
+; VI-NEXT: s_lshr_b32 s45, s40, 16
+; VI-NEXT: s_lshr_b32 s57, s43, 16
+; VI-NEXT: s_lshr_b32 s60, s47, 16
+; VI-NEXT: s_lshr_b32 s63, s58, 16
+; VI-NEXT: s_lshr_b32 s74, s61, 16
+; VI-NEXT: s_lshr_b32 s78, s72, 16
+; VI-NEXT: s_lshr_b32 s89, s76, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s79, 16
+; VI-NEXT: s_lshr_b32 s46, s90, 16
; VI-NEXT: v_readfirstlane_b32 s4, v14
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: s_cbranch_scc0 .LBB57_2
@@ -47057,152 +46927,153 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: v_readlane_b32 s4, v28, 0
+; VI-NEXT: v_readlane_b32 s5, v28, 1
; VI-NEXT: s_cbranch_scc1 .LBB57_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: s_add_i32 s31, s31, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
; VI-NEXT: s_add_i32 s17, s17, 3
-; VI-NEXT: s_add_i32 s30, s30, 3
+; VI-NEXT: s_add_i32 s6, s6, 3
; VI-NEXT: s_add_i32 s18, s18, 3
-; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
+; VI-NEXT: s_add_i32 s44, s44, 3
; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
+; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: s_add_i32 s89, s89, 3
+; VI-NEXT: s_add_i32 s91, s91, 3
; VI-NEXT: s_add_i32 s21, s21, 3
-; VI-NEXT: s_add_i32 s78, s78, 3
+; VI-NEXT: s_add_i32 s88, s88, 3
; VI-NEXT: s_add_i32 s22, s22, 3
-; VI-NEXT: s_add_i32 s75, s75, 3
+; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s23, s23, 3
-; VI-NEXT: s_add_i32 s74, s74, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s24, s24, 3
-; VI-NEXT: s_add_i32 s63, s63, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
; VI-NEXT: s_add_i32 s25, s25, 3
-; VI-NEXT: s_add_i32 s60, s60, 3
+; VI-NEXT: s_add_i32 s62, s62, 3
; VI-NEXT: s_add_i32 s26, s26, 3
-; VI-NEXT: s_add_i32 s57, s57, 3
+; VI-NEXT: s_add_i32 s59, s59, 3
; VI-NEXT: s_add_i32 s27, s27, 3
-; VI-NEXT: s_add_i32 s46, s46, 3
+; VI-NEXT: s_add_i32 s56, s56, 3
; VI-NEXT: s_add_i32 s28, s28, 3
-; VI-NEXT: s_add_i32 s45, s45, 3
+; VI-NEXT: s_add_i32 s5, s5, 3
; VI-NEXT: s_add_i32 s29, s29, 3
-; VI-NEXT: s_add_i32 s42, s42, 3
+; VI-NEXT: s_add_i32 s4, s4, 3
; VI-NEXT: s_add_i32 s90, s90, 3
-; VI-NEXT: s_add_i32 s91, s91, 3
+; VI-NEXT: s_add_i32 s46, s46, 3
; VI-NEXT: s_add_i32 s79, s79, 3
-; VI-NEXT: s_add_i32 s88, s88, 3
+; VI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
; VI-NEXT: s_add_i32 s76, s76, 3
-; VI-NEXT: s_add_i32 s77, s77, 3
+; VI-NEXT: s_add_i32 s89, s89, 3
; VI-NEXT: s_add_i32 s72, s72, 3
-; VI-NEXT: s_add_i32 s73, s73, 3
+; VI-NEXT: s_add_i32 s78, s78, 3
; VI-NEXT: s_add_i32 s61, s61, 3
-; VI-NEXT: s_add_i32 s62, s62, 3
+; VI-NEXT: s_add_i32 s74, s74, 3
; VI-NEXT: s_add_i32 s58, s58, 3
-; VI-NEXT: s_add_i32 s59, s59, 3
+; VI-NEXT: s_add_i32 s63, s63, 3
; VI-NEXT: s_add_i32 s47, s47, 3
-; VI-NEXT: s_add_i32 s56, s56, 3
+; VI-NEXT: s_add_i32 s60, s60, 3
; VI-NEXT: s_add_i32 s43, s43, 3
-; VI-NEXT: s_add_i32 s44, s44, 3
+; VI-NEXT: s_add_i32 s57, s57, 3
; VI-NEXT: s_add_i32 s40, s40, 3
-; VI-NEXT: s_add_i32 s41, s41, 3
+; VI-NEXT: s_add_i32 s45, s45, 3
; VI-NEXT: s_add_i32 s14, s14, 3
-; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: s_add_i32 s42, s42, 3
; VI-NEXT: s_add_i32 s12, s12, 3
-; VI-NEXT: s_add_i32 s13, s13, 3
+; VI-NEXT: s_add_i32 s41, s41, 3
; VI-NEXT: s_add_i32 s10, s10, 3
-; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: s_add_i32 s9, s9, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
; VI-NEXT: s_add_i32 s7, s7, 3
-; VI-NEXT: s_add_i32 s6, s6, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
; VI-NEXT: .LBB57_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s31, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s30, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s9, s9, 16
+; VI-NEXT: s_or_b32 s9, s16, s9
+; VI-NEXT: s_and_b32 s16, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s6, s6, 16
+; VI-NEXT: s_or_b32 s6, s16, s6
; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, vcc_hi, 16
+; VI-NEXT: s_lshl_b32 s17, s44, 16
; VI-NEXT: s_or_b32 s16, s16, s17
; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s18, vcc_hi, 16
; VI-NEXT: s_or_b32 s17, s17, s18
; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s89, 16
+; VI-NEXT: s_lshl_b32 s19, s91, 16
; VI-NEXT: s_or_b32 s18, s18, s19
; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s78, 16
+; VI-NEXT: s_lshl_b32 s20, s88, 16
; VI-NEXT: s_or_b32 s19, s19, s20
; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, s75, 16
+; VI-NEXT: s_lshl_b32 s21, s77, 16
; VI-NEXT: s_or_b32 s20, s20, s21
; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, s74, 16
+; VI-NEXT: s_lshl_b32 s22, s75, 16
; VI-NEXT: s_or_b32 s21, s21, s22
; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s63, 16
+; VI-NEXT: s_lshl_b32 s23, s73, 16
; VI-NEXT: s_or_b32 s22, s22, s23
; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s60, 16
+; VI-NEXT: s_lshl_b32 s24, s62, 16
; VI-NEXT: s_or_b32 s23, s23, s24
; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s57, 16
+; VI-NEXT: s_lshl_b32 s25, s59, 16
; VI-NEXT: s_or_b32 s24, s24, s25
; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s46, 16
+; VI-NEXT: s_lshl_b32 s26, s56, 16
; VI-NEXT: s_or_b32 s25, s25, s26
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s45, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s26, s5
+; VI-NEXT: s_and_b32 s26, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s26, s4
+; VI-NEXT: s_and_b32 s26, 0xffff, s90
+; VI-NEXT: s_lshl_b32 s27, s46, 16
; VI-NEXT: s_or_b32 s26, s26, s27
-; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s42, 16
+; VI-NEXT: s_and_b32 s27, 0xffff, s79
+; VI-NEXT: s_lshl_b32 s28, vcc_lo, 16
; VI-NEXT: s_or_b32 s27, s27, s28
-; VI-NEXT: s_and_b32 s28, 0xffff, s90
-; VI-NEXT: s_lshl_b32 s29, s91, 16
+; VI-NEXT: s_and_b32 s28, 0xffff, s76
+; VI-NEXT: s_lshl_b32 s29, s89, 16
; VI-NEXT: s_or_b32 s28, s28, s29
-; VI-NEXT: s_and_b32 s29, 0xffff, s79
-; VI-NEXT: s_lshl_b32 s42, s88, 16
-; VI-NEXT: s_or_b32 s29, s29, s42
-; VI-NEXT: s_and_b32 s42, 0xffff, s76
-; VI-NEXT: s_lshl_b32 s45, s77, 16
-; VI-NEXT: s_or_b32 s42, s42, s45
-; VI-NEXT: s_and_b32 s45, 0xffff, s72
-; VI-NEXT: s_lshl_b32 s46, s73, 16
-; VI-NEXT: s_or_b32 s45, s45, s46
-; VI-NEXT: s_and_b32 s46, 0xffff, s61
-; VI-NEXT: s_lshl_b32 s57, s62, 16
-; VI-NEXT: s_or_b32 s46, s46, s57
-; VI-NEXT: s_and_b32 s57, 0xffff, s58
-; VI-NEXT: s_lshl_b32 s58, s59, 16
+; VI-NEXT: s_and_b32 s29, 0xffff, s72
+; VI-NEXT: s_lshl_b32 s44, s78, 16
+; VI-NEXT: s_or_b32 s29, s29, s44
+; VI-NEXT: s_and_b32 s44, 0xffff, s61
+; VI-NEXT: s_lshl_b32 s46, s74, 16
+; VI-NEXT: s_or_b32 s44, s44, s46
+; VI-NEXT: s_and_b32 s46, 0xffff, s58
+; VI-NEXT: s_lshl_b32 s56, s63, 16
+; VI-NEXT: s_or_b32 s46, s46, s56
; VI-NEXT: s_and_b32 s47, 0xffff, s47
-; VI-NEXT: s_lshl_b32 s56, s56, 16
+; VI-NEXT: s_lshl_b32 s56, s60, 16
+; VI-NEXT: s_or_b32 s47, s47, s56
; VI-NEXT: s_and_b32 s43, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s44, s44, 16
+; VI-NEXT: s_lshl_b32 s56, s57, 16
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s41, s41, 16
+; VI-NEXT: s_lshl_b32 s45, s45, 16
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s15, s15, 16
+; VI-NEXT: s_lshl_b32 s42, s42, 16
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s13, s13, 16
+; VI-NEXT: s_lshl_b32 s41, s41, 16
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s11, s11, 16
+; VI-NEXT: s_lshl_b32 s15, s15, 16
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s9, s9, 16
+; VI-NEXT: s_lshl_b32 s13, s13, 16
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s6, s6, 16
-; VI-NEXT: s_or_b32 s57, s57, s58
-; VI-NEXT: s_or_b32 s47, s47, s56
-; VI-NEXT: s_or_b32 s43, s43, s44
-; VI-NEXT: s_or_b32 s40, s40, s41
-; VI-NEXT: s_or_b32 s14, s14, s15
-; VI-NEXT: s_or_b32 s12, s12, s13
-; VI-NEXT: s_or_b32 s10, s10, s11
-; VI-NEXT: s_or_b32 s8, s8, s9
-; VI-NEXT: s_or_b32 s6, s7, s6
-; VI-NEXT: v_readlane_b32 s30, v28, 0
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
+; VI-NEXT: s_lshl_b32 s11, s11, 16
+; VI-NEXT: s_or_b32 s43, s43, s56
+; VI-NEXT: s_or_b32 s40, s40, s45
+; VI-NEXT: s_or_b32 s14, s14, s42
+; VI-NEXT: s_or_b32 s12, s12, s41
+; VI-NEXT: s_or_b32 s10, s10, s15
+; VI-NEXT: s_or_b32 s8, s8, s13
+; VI-NEXT: s_or_b32 s7, s7, s11
+; VI-NEXT: v_mov_b32_e32 v0, s9
+; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v3, s17
; VI-NEXT: v_mov_b32_e32 v4, s18
@@ -47213,14 +47084,14 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v9, s23
; VI-NEXT: v_mov_b32_e32 v10, s24
; VI-NEXT: v_mov_b32_e32 v11, s25
-; VI-NEXT: v_mov_b32_e32 v12, s26
-; VI-NEXT: v_mov_b32_e32 v13, s27
-; VI-NEXT: v_mov_b32_e32 v14, s28
-; VI-NEXT: v_mov_b32_e32 v15, s29
-; VI-NEXT: v_mov_b32_e32 v16, s42
-; VI-NEXT: v_mov_b32_e32 v17, s45
-; VI-NEXT: v_mov_b32_e32 v18, s46
-; VI-NEXT: v_mov_b32_e32 v19, s57
+; VI-NEXT: v_mov_b32_e32 v12, s5
+; VI-NEXT: v_mov_b32_e32 v13, s4
+; VI-NEXT: v_mov_b32_e32 v14, s26
+; VI-NEXT: v_mov_b32_e32 v15, s27
+; VI-NEXT: v_mov_b32_e32 v16, s28
+; VI-NEXT: v_mov_b32_e32 v17, s29
+; VI-NEXT: v_mov_b32_e32 v18, s44
+; VI-NEXT: v_mov_b32_e32 v19, s46
; VI-NEXT: v_mov_b32_e32 v20, s47
; VI-NEXT: v_mov_b32_e32 v21, s43
; VI-NEXT: v_mov_b32_e32 v22, s40
@@ -47228,8 +47099,7 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v24, s12
; VI-NEXT: v_mov_b32_e32 v25, s10
; VI-NEXT: v_mov_b32_e32 v26, s8
-; VI-NEXT: v_mov_b32_e32 v27, s6
-; VI-NEXT: v_readlane_b32 s31, v28, 1
+; VI-NEXT: v_mov_b32_e32 v27, s7
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
@@ -47961,22 +47831,19 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v56i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v27
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v25
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v25
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v24
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v23
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v22
@@ -47985,91 +47852,94 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v18
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v4
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v3
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v1
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v0
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v0
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v27
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: v_mov_b32_e32 v28, v30
+; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB58_2
; SI-NEXT: ; %bb.1: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v47, v47
-; SI-NEXT: v_cvt_f32_f16_e32 v28, v56
-; SI-NEXT: v_cvt_f32_f16_e32 v56, v46
+; SI-NEXT: v_cvt_f32_f16_e32 v30, v47
; SI-NEXT: v_cvt_f32_f16_e32 v45, v45
-; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v47
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
; SI-NEXT: v_cvt_f32_f16_e32 v44, v44
+; SI-NEXT: v_cvt_f32_f16_e32 v46, v46
+; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v45
-; SI-NEXT: v_cvt_f32_f16_e32 v42, v42
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v47
-; SI-NEXT: v_add_f32_e32 v47, 0x38000000, v56
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v47
; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v44
-; SI-NEXT: v_cvt_f16_f32_e32 v56, v45
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v47
-; SI-NEXT: v_cvt_f32_f16_e32 v47, v43
-; SI-NEXT: v_cvt_f32_f16_e32 v41, v41
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v44
-; SI-NEXT: v_add_f32_e32 v42, 0x38000000, v42
-; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v47
+; SI-NEXT: v_cvt_f32_f16_e32 v43, v43
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
-; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v41
-; SI-NEXT: v_cvt_f16_f32_e32 v47, v42
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v44
-; SI-NEXT: v_cvt_f32_f16_e32 v44, v40
+; SI-NEXT: v_add_f32_e32 v46, 0x38000000, v46
+; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v43
+; SI-NEXT: v_mov_b32_e32 v47, v29
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30
+; SI-NEXT: v_cvt_f16_f32_e32 v30, v46
+; SI-NEXT: v_mov_b32_e32 v46, v40
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v45
+; SI-NEXT: v_mov_b32_e32 v45, v41
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v44
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
+; SI-NEXT: v_cvt_f32_f16_e32 v44, v42
; SI-NEXT: v_cvt_f32_f16_e32 v55, v55
-; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
; SI-NEXT: v_cvt_f32_f16_e32 v54, v54
-; SI-NEXT: v_add_f32_e32 v41, 0x38000000, v44
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v41
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v43
+; SI-NEXT: v_add_f32_e32 v43, 0x38000000, v44
+; SI-NEXT: v_cvt_f32_f16_e32 v44, v45
+; SI-NEXT: v_cvt_f32_f16_e32 v45, v46
+; SI-NEXT: v_cvt_f32_f16_e32 v46, v47
; SI-NEXT: v_add_f32_e32 v55, 0x38000000, v55
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v55
; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v54
-; SI-NEXT: v_cvt_f16_f32_e32 v44, v55
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v41
+; SI-NEXT: v_add_f32_e32 v46, 0x38000000, v46
+; SI-NEXT: v_cvt_f16_f32_e32 v46, v46
; SI-NEXT: v_cvt_f16_f32_e32 v54, v54
-; SI-NEXT: v_cvt_f32_f16_e32 v41, v53
-; SI-NEXT: v_cvt_f32_f16_e32 v29, v29
+; SI-NEXT: v_cvt_f32_f16_e32 v52, v52
+; SI-NEXT: v_cvt_f32_f16_e32 v28, v28
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v47
+; SI-NEXT: v_cvt_f32_f16_e32 v47, v53
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v54
+; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT: v_cvt_f32_f16_e32 v27, v27
-; SI-NEXT: v_cvt_f32_f16_e32 v30, v30
+; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v47
+; SI-NEXT: v_cvt_f16_f32_e32 v54, v54
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v52
; SI-NEXT: v_cvt_f32_f16_e32 v25, v25
; SI-NEXT: v_cvt_f32_f16_e32 v31, v31
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v54
+; SI-NEXT: v_cvt_f32_f16_e32 v54, v56
; SI-NEXT: v_cvt_f32_f16_e32 v23, v23
; SI-NEXT: v_cvt_f32_f16_e32 v32, v32
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v54
-; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v41
-; SI-NEXT: v_cvt_f32_f16_e32 v52, v52
-; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29
+; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT: v_cvt_f32_f16_e32 v21, v21
; SI-NEXT: v_cvt_f32_f16_e32 v33, v33
-; SI-NEXT: v_cvt_f16_f32_e32 v54, v54
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v29
+; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27
-; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30
+; SI-NEXT: v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT: v_cvt_f32_f16_e32 v19, v19
; SI-NEXT: v_cvt_f32_f16_e32 v34, v34
; SI-NEXT: v_cvt_f16_f32_e32 v27, v27
-; SI-NEXT: v_cvt_f16_f32_e32 v30, v30
+; SI-NEXT: v_cvt_f16_f32_e32 v56, v54
; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT: v_cvt_f32_f16_e32 v17, v17
@@ -48080,16 +47950,13 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v36, v36
-; SI-NEXT: v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT: v_cvt_f16_f32_e32 v23, v23
; SI-NEXT: v_cvt_f16_f32_e32 v32, v32
; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v37, v37
-; SI-NEXT: v_cvt_f16_f32_e32 v41, v52
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v54
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v28
; SI-NEXT: v_cvt_f16_f32_e32 v21, v21
; SI-NEXT: v_cvt_f16_f32_e32 v33, v33
; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19
@@ -48097,7 +47964,7 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_cvt_f32_f16_e32 v38, v38
; SI-NEXT: v_or_b32_e32 v27, v27, v54
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v30
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v56
; SI-NEXT: v_cvt_f16_f32_e32 v19, v19
; SI-NEXT: v_cvt_f16_f32_e32 v34, v34
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
@@ -48128,7 +47995,6 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v38, 0x38000000, v38
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v50, v50
-; SI-NEXT: v_cvt_f32_f16_e32 v51, v51
; SI-NEXT: v_or_b32_e32 v19, v19, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v34
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
@@ -48139,6 +48005,13 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v51, v51
+; SI-NEXT: v_or_b32_e32 v17, v17, v54
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v35
+; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
+; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
+; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v48
; SI-NEXT: v_cvt_f32_f16_e32 v6, v6
; SI-NEXT: v_cvt_f32_f16_e32 v8, v8
; SI-NEXT: v_cvt_f32_f16_e32 v10, v10
@@ -48150,12 +48023,6 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f32_f16_e32 v22, v22
; SI-NEXT: v_cvt_f32_f16_e32 v24, v24
; SI-NEXT: v_cvt_f32_f16_e32 v26, v26
-; SI-NEXT: v_or_b32_e32 v17, v17, v54
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v35
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
-; SI-NEXT: v_cvt_f16_f32_e32 v39, v39
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_add_f32_e32 v48, 0x38000000, v48
; SI-NEXT: v_or_b32_e32 v15, v15, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v36
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
@@ -48168,21 +48035,30 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v49, v49
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_add_f32_e32 v50, 0x38000000, v50
-; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
-; SI-NEXT: v_add_f32_e32 v51, 0x38000000, v51
; SI-NEXT: v_or_b32_e32 v11, v11, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v38
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f16_f32_e32 v50, v50
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_add_f32_e32 v44, 0x38000000, v44
+; SI-NEXT: v_add_f32_e32 v45, 0x38000000, v45
+; SI-NEXT: v_add_f32_e32 v51, 0x38000000, v51
+; SI-NEXT: v_or_b32_e32 v9, v9, v54
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v39
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
+; SI-NEXT: v_cvt_f16_f32_e32 v43, v43
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
+; SI-NEXT: v_cvt_f16_f32_e32 v44, v44
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v45
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18
@@ -48191,12 +48067,8 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT: v_cvt_f16_f32_e32 v51, v51
; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26
-; SI-NEXT: v_or_b32_e32 v9, v9, v54
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v39
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_or_b32_e32 v7, v7, v54
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v48
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
@@ -48208,150 +48080,147 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v22, v22
; SI-NEXT: v_cvt_f16_f32_e32 v24, v24
; SI-NEXT: v_cvt_f16_f32_e32 v26, v26
-; SI-NEXT: v_or_b32_e32 v7, v7, v54
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v48
; SI-NEXT: v_or_b32_e32 v5, v5, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v49
; SI-NEXT: v_or_b32_e32 v3, v3, v54
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v50
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v56
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v47
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v44
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v41
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_or_b32_e32 v1, v1, v54
-; SI-NEXT: v_or_b32_e32 v0, v0, v28
-; SI-NEXT: v_or_b32_e32 v2, v2, v46
-; SI-NEXT: v_or_b32_e32 v4, v4, v45
-; SI-NEXT: v_or_b32_e32 v6, v6, v57
-; SI-NEXT: v_or_b32_e32 v8, v8, v43
-; SI-NEXT: v_or_b32_e32 v10, v10, v42
-; SI-NEXT: v_or_b32_e32 v12, v12, v58
-; SI-NEXT: v_or_b32_e32 v14, v14, v40
+; SI-NEXT: v_or_b32_e32 v0, v0, v29
+; SI-NEXT: v_or_b32_e32 v2, v2, v30
+; SI-NEXT: v_or_b32_e32 v4, v4, v40
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v57, v1, v29, 16
+; SI-NEXT: v_alignbit_b32 v30, v3, v30, 16
+; SI-NEXT: v_alignbit_b32 v29, v5, v40, 16
+; SI-NEXT: v_alignbit_b32 v54, v7, v41, 16
+; SI-NEXT: v_alignbit_b32 v40, v9, v42, 16
+; SI-NEXT: v_or_b32_e32 v6, v6, v41
+; SI-NEXT: v_or_b32_e32 v8, v8, v42
+; SI-NEXT: v_or_b32_e32 v10, v10, v43
+; SI-NEXT: v_or_b32_e32 v12, v12, v44
+; SI-NEXT: v_or_b32_e32 v14, v14, v45
; SI-NEXT: v_or_b32_e32 v16, v16, v55
-; SI-NEXT: v_or_b32_e32 v18, v18, v59
+; SI-NEXT: v_or_b32_e32 v18, v18, v46
; SI-NEXT: v_or_b32_e32 v20, v20, v53
; SI-NEXT: v_or_b32_e32 v22, v22, v52
-; SI-NEXT: v_or_b32_e32 v24, v24, v60
+; SI-NEXT: v_or_b32_e32 v24, v24, v47
; SI-NEXT: v_or_b32_e32 v26, v26, v51
-; SI-NEXT: v_alignbit_b32 v56, v1, v28, 16
-; SI-NEXT: v_alignbit_b32 v47, v3, v46, 16
-; SI-NEXT: v_alignbit_b32 v46, v5, v45, 16
-; SI-NEXT: v_alignbit_b32 v45, v7, v57, 16
-; SI-NEXT: v_alignbit_b32 v44, v9, v43, 16
-; SI-NEXT: v_alignbit_b32 v43, v11, v42, 16
-; SI-NEXT: v_alignbit_b32 v42, v13, v58, 16
-; SI-NEXT: v_alignbit_b32 v41, v15, v40, 16
-; SI-NEXT: v_alignbit_b32 v40, v17, v55, 16
-; SI-NEXT: v_alignbit_b32 v55, v19, v59, 16
+; SI-NEXT: v_alignbit_b32 v42, v11, v43, 16
+; SI-NEXT: v_mov_b32_e32 v43, v40
+; SI-NEXT: v_alignbit_b32 v41, v13, v44, 16
+; SI-NEXT: v_mov_b32_e32 v44, v54
+; SI-NEXT: v_alignbit_b32 v40, v15, v45, 16
+; SI-NEXT: v_mov_b32_e32 v45, v29
+; SI-NEXT: v_alignbit_b32 v29, v17, v55, 16
+; SI-NEXT: v_alignbit_b32 v55, v19, v46, 16
+; SI-NEXT: v_mov_b32_e32 v46, v30
; SI-NEXT: v_alignbit_b32 v54, v21, v53, 16
; SI-NEXT: v_alignbit_b32 v53, v23, v52, 16
-; SI-NEXT: v_alignbit_b32 v52, v25, v60, 16
+; SI-NEXT: v_alignbit_b32 v52, v25, v47, 16
+; SI-NEXT: v_mov_b32_e32 v47, v57
; SI-NEXT: v_alignbit_b32 v51, v27, v51, 16
; SI-NEXT: .LBB58_2: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v56
-; SI-NEXT: v_or_b32_e32 v0, v0, v28
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47
+; SI-NEXT: v_or_b32_e32 v0, v0, v30
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v50
-; SI-NEXT: v_or_b32_e32 v1, v1, v28
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50
+; SI-NEXT: v_or_b32_e32 v1, v1, v30
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
-; SI-NEXT: v_or_b32_e32 v2, v2, v28
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v46
+; SI-NEXT: v_or_b32_e32 v2, v2, v30
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v49
-; SI-NEXT: v_or_b32_e32 v3, v3, v28
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49
+; SI-NEXT: v_or_b32_e32 v3, v3, v30
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v46
-; SI-NEXT: v_or_b32_e32 v4, v4, v28
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45
+; SI-NEXT: v_or_b32_e32 v4, v4, v30
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v48
-; SI-NEXT: v_or_b32_e32 v5, v5, v28
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v45
-; SI-NEXT: v_or_b32_e32 v6, v6, v28
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39
-; SI-NEXT: v_or_b32_e32 v7, v7, v28
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v44
-; SI-NEXT: v_or_b32_e32 v8, v8, v28
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
-; SI-NEXT: v_or_b32_e32 v9, v9, v28
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v43
-; SI-NEXT: v_or_b32_e32 v10, v10, v28
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v37
-; SI-NEXT: v_or_b32_e32 v11, v11, v28
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
-; SI-NEXT: v_or_b32_e32 v12, v12, v28
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v36
-; SI-NEXT: v_or_b32_e32 v13, v13, v28
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
-; SI-NEXT: v_or_b32_e32 v14, v14, v28
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v35
-; SI-NEXT: v_or_b32_e32 v15, v15, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v40
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v48
; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v16, v16, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; SI-NEXT: v_or_b32_e32 v5, v5, v30
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v44
+; SI-NEXT: v_or_b32_e32 v16, v16, v29
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v34
-; SI-NEXT: v_or_b32_e32 v17, v17, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v34
+; SI-NEXT: v_or_b32_e32 v6, v6, v30
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v39
+; SI-NEXT: v_or_b32_e32 v17, v17, v29
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v55
-; SI-NEXT: v_or_b32_e32 v18, v18, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v55
+; SI-NEXT: v_or_b32_e32 v7, v7, v30
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43
+; SI-NEXT: v_or_b32_e32 v18, v18, v29
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v33
-; SI-NEXT: v_or_b32_e32 v19, v19, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v33
+; SI-NEXT: v_or_b32_e32 v8, v8, v30
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v38
+; SI-NEXT: v_or_b32_e32 v19, v19, v29
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
-; SI-NEXT: v_or_b32_e32 v20, v20, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v54
+; SI-NEXT: v_or_b32_e32 v9, v9, v30
+; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v42
+; SI-NEXT: v_or_b32_e32 v20, v20, v29
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v32
-; SI-NEXT: v_or_b32_e32 v21, v21, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v32
+; SI-NEXT: v_or_b32_e32 v10, v10, v30
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v37
+; SI-NEXT: v_or_b32_e32 v21, v21, v29
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; SI-NEXT: v_or_b32_e32 v22, v22, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v53
+; SI-NEXT: v_or_b32_e32 v11, v11, v30
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v41
+; SI-NEXT: v_or_b32_e32 v22, v22, v29
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v31
-; SI-NEXT: v_or_b32_e32 v23, v23, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v31
+; SI-NEXT: v_or_b32_e32 v12, v12, v30
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v36
+; SI-NEXT: v_or_b32_e32 v23, v23, v29
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; SI-NEXT: v_or_b32_e32 v24, v24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v52
+; SI-NEXT: v_or_b32_e32 v13, v13, v30
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v40
+; SI-NEXT: v_or_b32_e32 v24, v24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v56
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
-; SI-NEXT: v_or_b32_e32 v25, v25, v28
+; SI-NEXT: v_or_b32_e32 v14, v14, v30
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35
+; SI-NEXT: v_or_b32_e32 v25, v25, v29
; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
-; SI-NEXT: v_or_b32_e32 v26, v26, v28
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_or_b32_e32 v15, v15, v30
+; SI-NEXT: v_or_b32_e32 v26, v26, v29
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -48359,20 +48228,31 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-LABEL: bitcast_v56f16_to_v56i16:
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v25
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v22
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v20
@@ -48387,39 +48267,54 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v0
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v43, v29
+; VI-NEXT: v_mov_b32_e32 v44, v30
+; VI-NEXT: v_mov_b32_e32 v45, v31
+; VI-NEXT: v_mov_b32_e32 v46, v33
+; VI-NEXT: v_mov_b32_e32 v47, v32
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_mov_b32_e32 v33, v28
+; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB58_2
; VI-NEXT: ; %bb.1: ; %cmp.true
; VI-NEXT: v_add_f16_e32 v0, 0x200, v0
-; VI-NEXT: v_add_f16_e32 v56, 0x200, v56
-; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
; VI-NEXT: v_add_f16_e32 v47, 0x200, v47
-; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
+; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
; VI-NEXT: v_add_f16_e32 v46, 0x200, v46
-; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
+; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
; VI-NEXT: v_add_f16_e32 v45, 0x200, v45
-; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
+; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
; VI-NEXT: v_add_f16_e32 v44, 0x200, v44
-; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
+; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
; VI-NEXT: v_add_f16_e32 v43, 0x200, v43
-; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
+; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
+; VI-NEXT: s_waitcnt vmcnt(5)
; VI-NEXT: v_add_f16_e32 v42, 0x200, v42
+; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
+; VI-NEXT: v_add_f16_e32 v40, 0x200, v40
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
; VI-NEXT: v_add_f16_e32 v41, 0x200, v41
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_add_f16_e32 v40, 0x200, v40
+; VI-NEXT: v_add_f16_e32 v33, 0x200, v33
; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
; VI-NEXT: v_add_f16_e32 v55, 0x200, v55
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
@@ -48449,81 +48344,84 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
; VI-NEXT: v_add_f16_e32 v34, 0x200, v34
; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
-; VI-NEXT: v_add_f16_e32 v33, 0x200, v33
-; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
+; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_f16_e32 v32, 0x200, v32
-; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
+; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
; VI-NEXT: v_add_f16_e32 v31, 0x200, v31
-; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
+; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
; VI-NEXT: v_add_f16_e32 v30, 0x200, v30
-; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
+; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
; VI-NEXT: v_add_f16_e32 v29, 0x200, v29
+; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
+; VI-NEXT: v_add_f16_e32 v28, 0x200, v28
; VI-NEXT: .LBB58_2: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v56
-; VI-NEXT: v_or_b32_sdwa v0, v0, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v47
-; VI-NEXT: v_or_b32_sdwa v1, v1, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v46
-; VI-NEXT: v_or_b32_sdwa v2, v2, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v45
-; VI-NEXT: v_or_b32_sdwa v3, v3, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v44
-; VI-NEXT: v_or_b32_sdwa v4, v4, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v43
-; VI-NEXT: v_or_b32_sdwa v5, v5, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v42
-; VI-NEXT: v_or_b32_sdwa v6, v6, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v41
-; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v40
-; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; VI-NEXT: v_or_b32_sdwa v8, v8, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v55
-; VI-NEXT: v_or_b32_sdwa v9, v9, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v54
-; VI-NEXT: v_or_b32_sdwa v10, v10, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v53
-; VI-NEXT: v_or_b32_sdwa v11, v11, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
-; VI-NEXT: v_or_b32_sdwa v12, v12, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v51
-; VI-NEXT: v_or_b32_sdwa v13, v13, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v50
-; VI-NEXT: v_or_b32_sdwa v14, v14, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v49
-; VI-NEXT: v_or_b32_sdwa v15, v15, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v48
-; VI-NEXT: v_or_b32_sdwa v16, v16, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v39
-; VI-NEXT: v_or_b32_sdwa v17, v17, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
-; VI-NEXT: v_or_b32_sdwa v18, v18, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v37
-; VI-NEXT: v_or_b32_sdwa v19, v19, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v36
-; VI-NEXT: v_or_b32_sdwa v20, v20, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v35
-; VI-NEXT: v_or_b32_sdwa v21, v21, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v34
-; VI-NEXT: v_or_b32_sdwa v22, v22, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v33
-; VI-NEXT: v_or_b32_sdwa v23, v23, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v32
-; VI-NEXT: v_or_b32_sdwa v24, v24, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v31
-; VI-NEXT: v_or_b32_sdwa v25, v25, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v30
-; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v29
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v40
+; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v46
+; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45
+; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
+; VI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; VI-NEXT: v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v41
+; VI-NEXT: v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; VI-NEXT: v_or_b32_sdwa v8, v8, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v55
+; VI-NEXT: v_or_b32_sdwa v9, v9, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v54
+; VI-NEXT: v_or_b32_sdwa v10, v10, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v53
+; VI-NEXT: v_or_b32_sdwa v11, v11, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v52
+; VI-NEXT: v_or_b32_sdwa v12, v12, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v51
+; VI-NEXT: v_or_b32_sdwa v13, v13, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v50
+; VI-NEXT: v_or_b32_sdwa v14, v14, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v49
+; VI-NEXT: v_or_b32_sdwa v15, v15, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v48
+; VI-NEXT: v_or_b32_sdwa v16, v16, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v39
+; VI-NEXT: v_or_b32_sdwa v17, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v38
+; VI-NEXT: v_or_b32_sdwa v18, v18, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v37
+; VI-NEXT: v_or_b32_sdwa v19, v19, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v36
+; VI-NEXT: v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v35
+; VI-NEXT: v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v34
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; VI-NEXT: v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -48531,24 +48429,32 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; GFX9-LABEL: bitcast_v56f16_to_v56i16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v19
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v27
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v26
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v25
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v22
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v21
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v20
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v19
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
@@ -48571,20 +48477,31 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
-; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB58_2
; GFX9-NEXT: ; %bb.1: ; %cmp.true
; GFX9-NEXT: s_mov_b32 s6, 0x5040100
-; GFX9-NEXT: v_perm_b32 v27, v56, v27, s6
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v47, v27, s6
; GFX9-NEXT: s_movk_i32 s7, 0x200
-; GFX9-NEXT: v_perm_b32 v26, v47, v26, s6
-; GFX9-NEXT: v_perm_b32 v25, v46, v25, s6
-; GFX9-NEXT: v_perm_b32 v24, v45, v24, s6
-; GFX9-NEXT: v_perm_b32 v23, v44, v23, s6
-; GFX9-NEXT: v_perm_b32 v22, v43, v22, s6
-; GFX9-NEXT: v_perm_b32 v21, v42, v21, s6
-; GFX9-NEXT: v_perm_b32 v20, v41, v20, s6
-; GFX9-NEXT: v_perm_b32 v19, v40, v19, s6
+; GFX9-NEXT: v_perm_b32 v26, v46, v26, s6
+; GFX9-NEXT: v_perm_b32 v25, v45, v25, s6
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s6
+; GFX9-NEXT: v_perm_b32 v23, v43, v23, s6
+; GFX9-NEXT: v_perm_b32 v22, v42, v22, s6
+; GFX9-NEXT: v_perm_b32 v21, v41, v21, s6
+; GFX9-NEXT: v_perm_b32 v20, v40, v20, s6
+; GFX9-NEXT: v_perm_b32 v19, v28, v19, s6
; GFX9-NEXT: v_perm_b32 v18, v55, v18, s6
; GFX9-NEXT: v_perm_b32 v17, v54, v17, s6
; GFX9-NEXT: v_perm_b32 v16, v53, v16, s6
@@ -48651,36 +48568,42 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT: .LBB58_2: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0x5040100
-; GFX9-NEXT: v_perm_b32 v19, v40, v19, s4
-; GFX9-NEXT: v_perm_b32 v20, v41, v20, s4
-; GFX9-NEXT: v_perm_b32 v21, v42, v21, s4
-; GFX9-NEXT: v_perm_b32 v22, v43, v22, s4
-; GFX9-NEXT: v_perm_b32 v23, v44, v23, s4
-; GFX9-NEXT: v_perm_b32 v24, v45, v24, s4
-; GFX9-NEXT: v_perm_b32 v25, v46, v25, s4
-; GFX9-NEXT: v_perm_b32 v26, v47, v26, s4
-; GFX9-NEXT: v_perm_b32 v27, v56, v27, s4
-; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_perm_b32 v20, v40, v20, s4
+; GFX9-NEXT: s_waitcnt vmcnt(6)
+; GFX9-NEXT: v_perm_b32 v21, v41, v21, s4
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v22, v42, v22, s4
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v23, v43, v23, s4
+; GFX9-NEXT: s_waitcnt vmcnt(3)
+; GFX9-NEXT: v_perm_b32 v24, v44, v24, s4
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v25, v45, v25, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v46, v26, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v27, v47, v27, s4
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4
; GFX9-NEXT: v_perm_b32 v2, v31, v2, s4
@@ -48700,6 +48623,7 @@ define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; GFX9-NEXT: v_perm_b32 v16, v53, v16, s4
; GFX9-NEXT: v_perm_b32 v17, v54, v17, s4
; GFX9-NEXT: v_perm_b32 v18, v55, v18, s4
+; GFX9-NEXT: v_perm_b32 v19, v28, v19, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -49113,390 +49037,416 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_or_b32_e32 v50, v1, v0
+; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_or_b32_e32 v60, v1, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, s93
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v54, v3, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s20
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s20
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s91
+; SI-NEXT: v_or_b32_e32 v59, v3, v27
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s91
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s22
-; SI-NEXT: v_or_b32_e32 v51, v3, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s89
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_or_b32_e32 v57, v2, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s89
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s24
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s24
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_or_b32_e32 v48, v1, v6
+; SI-NEXT: v_or_b32_e32 v56, v1, v8
; SI-NEXT: v_cvt_f32_f16_e32 v1, s78
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s26
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s26
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_or_b32_e32 v49, v5, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s75
+; SI-NEXT: v_or_b32_e32 v46, v3, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s75
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s28
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v34, v3, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s88
+; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_or_b32_e32 v2, v2, v14
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s88
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s92
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s92
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
+; SI-NEXT: v_or_b32_e32 v1, v1, v10
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_or_b32_e32 v56, v1, v12
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, s77
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s90
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s90
+; SI-NEXT: v_or_b32_e32 v35, v3, v43
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_or_b32_e32 v35, v5, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s74
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s74
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s79
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v33, v3, v16
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s63
+; SI-NEXT: v_or_b32_e32 v36, v2, v29
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s63
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s76
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s76
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_or_b32_e32 v32, v1, v18
+; SI-NEXT: v_or_b32_e32 v34, v1, v20
; SI-NEXT: v_cvt_f32_f16_e32 v1, s59
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s73
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s73
+; SI-NEXT: v_or_b32_e32 v33, v3, v24
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_or_b32_e32 v31, v5, v20
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s57
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s57
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s62
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_or_b32_e32 v3, v3, v22
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s46
+; SI-NEXT: v_or_b32_e32 v61, v2, v22
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s46
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s60
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s60
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_or_b32_e32 v1, v1, v24
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_or_b32_e32 v58, v1, v31
; SI-NEXT: v_cvt_f32_f16_e32 v1, s72
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s44
-; SI-NEXT: v_or_b32_e32 v30, v5, v26
+; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s44
+; SI-NEXT: v_or_b32_e32 v40, v3, v41
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s61
-; SI-NEXT: v_cvt_f16_f32_e32 v52, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s61
+; SI-NEXT: v_cvt_f16_f32_e32 v5, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v29, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s42
-; SI-NEXT: v_or_b32_e32 v27, v1, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s58
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s41
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v19, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v5
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s42
+; SI-NEXT: v_or_b32_e32 v42, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s58
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s41
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v57, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v29
-; SI-NEXT: v_or_b32_e32 v25, v5, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v17, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v19
+; SI-NEXT: v_or_b32_e32 v32, v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s56
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57
-; SI-NEXT: v_or_b32_e32 v23, v3, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s40
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
+; SI-NEXT: v_or_b32_e32 v23, v2, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s40
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s47
-; SI-NEXT: v_cvt_f16_f32_e32 v37, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s47
+; SI-NEXT: v_cvt_f16_f32_e32 v62, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v39, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s15
-; SI-NEXT: v_or_b32_e32 v21, v1, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s45
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s14
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v63, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v62
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s15
+; SI-NEXT: v_or_b32_e32 v25, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s45
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s14
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v38, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
-; SI-NEXT: v_or_b32_e32 v19, v5, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
+; SI-NEXT: v_or_b32_e32 v21, v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s43
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v38
-; SI-NEXT: v_or_b32_e32 v17, v3, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s13
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v18
+; SI-NEXT: v_or_b32_e32 v30, v2, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s13
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s12
-; SI-NEXT: v_cvt_f16_f32_e32 v62, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s12
+; SI-NEXT: v_cvt_f16_f32_e32 v16, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v63, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s29
-; SI-NEXT: v_or_b32_e32 v15, v1, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s11
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s27
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v39, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s29
+; SI-NEXT: v_or_b32_e32 v44, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s11
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s27
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v53, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63
-; SI-NEXT: v_or_b32_e32 v13, v5, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v48, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v5
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; SI-NEXT: v_or_b32_e32 v11, v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s10
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v53
-; SI-NEXT: v_or_b32_e32 v11, v3, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s25
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s9
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
+; SI-NEXT: v_or_b32_e32 v15, v2, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s25
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s9
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v60, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
+; SI-NEXT: v_cvt_f16_f32_e32 v47, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s23
-; SI-NEXT: v_cvt_f16_f32_e32 v36, v3
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60
-; SI-NEXT: v_or_b32_e32 v9, v1, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s8
-; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s21
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s23
+; SI-NEXT: v_cvt_f16_f32_e32 v50, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v47
+; SI-NEXT: v_or_b32_e32 v13, v1, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s8
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v58, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7
-; SI-NEXT: v_or_b32_e32 v7, v5, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s21
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58
-; SI-NEXT: v_cvt_f32_f16_e32 v28, s17
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v51, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v5
+; SI-NEXT: v_or_b32_e32 v9, v3, v1
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s7
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v51
+; SI-NEXT: v_lshr_b64 v[54:55], v[12:13], 16
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_or_b32_e32 v5, v3, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s19
-; SI-NEXT: v_cvt_f16_f32_e32 v59, v1
+; SI-NEXT: v_or_b32_e32 v5, v2, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s19
+; SI-NEXT: v_cvt_f16_f32_e32 v45, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, s6
-; SI-NEXT: v_lshr_b64 v[42:43], v[4:5], 16
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s17
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v61, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v28
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v28
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v61
-; SI-NEXT: v_or_b32_e32 v1, v1, v28
-; SI-NEXT: v_lshr_b64 v[46:47], v[0:1], 16
-; SI-NEXT: v_mov_b32_e32 v4, v54
-; SI-NEXT: v_lshr_b64 v[54:55], v[8:9], 16
-; SI-NEXT: v_mov_b32_e32 v8, v48
-; SI-NEXT: v_lshr_b64 v[47:48], v[10:11], 16
-; SI-NEXT: v_lshr_b64 v[44:45], v[2:3], 16
-; SI-NEXT: v_mov_b32_e32 v2, v50
-; SI-NEXT: v_lshr_b64 v[40:41], v[6:7], 16
-; SI-NEXT: v_mov_b32_e32 v6, v51
-; SI-NEXT: v_mov_b32_e32 v10, v49
-; SI-NEXT: v_lshr_b64 v[50:51], v[12:13], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[14:15], 16
-; SI-NEXT: v_mov_b32_e32 v51, v63
-; SI-NEXT: v_mov_b32_e32 v12, v34
-; SI-NEXT: v_mov_b32_e32 v49, v62
-; SI-NEXT: v_mov_b32_e32 v14, v56
-; SI-NEXT: v_lshr_b64 v[62:63], v[16:17], 16
-; SI-NEXT: v_mov_b32_e32 v16, v35
-; SI-NEXT: v_lshr_b64 v[55:56], v[18:19], 16
-; SI-NEXT: v_mov_b32_e32 v18, v33
-; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16
-; SI-NEXT: v_mov_b32_e32 v20, v32
-; SI-NEXT: v_lshr_b64 v[32:33], v[22:23], 16
-; SI-NEXT: v_mov_b32_e32 v33, v30
-; SI-NEXT: v_mov_b32_e32 v22, v31
-; SI-NEXT: v_lshr_b64 v[30:31], v[24:25], 16
-; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: v_mov_b32_e32 v31, v29
-; SI-NEXT: v_lshr_b64 v[28:29], v[26:27], 16
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v45
+; SI-NEXT: v_or_b32_e32 v28, v2, v3
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
+; SI-NEXT: v_lshr_b64 v[6:7], v[8:9], 16
+; SI-NEXT: v_mov_b32_e32 v55, v51
+; SI-NEXT: v_mov_b32_e32 v8, v50
+; SI-NEXT: v_lshr_b64 v[52:53], v[14:15], 16
+; SI-NEXT: v_lshr_b64 v[50:51], v[10:11], 16
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: v_lshr_b64 v[2:3], v[27:28], 16
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v7, v28
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_lshr_b64 v[37:38], v[0:1], 16
+; SI-NEXT: v_mov_b32_e32 v14, v39
+; SI-NEXT: v_lshr_b64 v[38:39], v[29:30], 16
+; SI-NEXT: v_mov_b32_e32 v12, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[43:44], 16
+; SI-NEXT: v_mov_b32_e32 v39, v36
+; SI-NEXT: v_mov_b32_e32 v0, v37
+; SI-NEXT: v_lshr_b64 v[36:37], v[20:21], 16
+; SI-NEXT: v_lshr_b64 v[3:4], v[4:5], 16
+; SI-NEXT: v_mov_b32_e32 v49, v35
+; SI-NEXT: v_mov_b32_e32 v37, v34
+; SI-NEXT: v_lshr_b64 v[34:35], v[24:25], 16
+; SI-NEXT: v_mov_b32_e32 v29, v25
+; SI-NEXT: v_mov_b32_e32 v35, v33
+; SI-NEXT: v_lshr_b64 v[24:25], v[22:23], 16
+; SI-NEXT: v_mov_b32_e32 v22, v62
+; SI-NEXT: v_mov_b32_e32 v33, v61
+; SI-NEXT: v_lshr_b64 v[61:62], v[31:32], 16
+; SI-NEXT: v_mov_b32_e32 v43, v11
+; SI-NEXT: v_lshr_b64 v[10:11], v[41:42], 16
+; SI-NEXT: v_mov_b32_e32 v4, v3
+; SI-NEXT: v_mov_b32_e32 v25, v17
+; SI-NEXT: v_mov_b32_e32 v27, v19
+; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_branch .LBB59_6
; SI-NEXT: .LBB59_5:
-; SI-NEXT: v_mov_b32_e32 v52, s72
-; SI-NEXT: v_mov_b32_e32 v31, s61
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v57, s58
-; SI-NEXT: v_mov_b32_e32 v37, s56
-; SI-NEXT: v_mov_b32_e32 v39, s47
-; SI-NEXT: v_mov_b32_e32 v38, s45
-; SI-NEXT: v_mov_b32_e32 v49, s43
-; SI-NEXT: v_mov_b32_e32 v51, s12
-; SI-NEXT: v_mov_b32_e32 v53, s11
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v60, s10
-; SI-NEXT: v_mov_b32_e32 v36, s9
-; SI-NEXT: v_mov_b32_e32 v58, s8
-; SI-NEXT: v_mov_b32_e32 v59, s7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v61, s6
-; SI-NEXT: v_mov_b32_e32 v33, s60
-; SI-NEXT: v_mov_b32_e32 v26, s62
-; SI-NEXT: v_mov_b32_e32 v24, s73
-; SI-NEXT: v_mov_b32_e32 v22, s76
-; SI-NEXT: v_mov_b32_e32 v20, s79
-; SI-NEXT: v_mov_b32_e32 v18, s90
-; SI-NEXT: v_mov_b32_e32 v16, s92
-; SI-NEXT: v_mov_b32_e32 v14, s28
-; SI-NEXT: v_mov_b32_e32 v12, s26
-; SI-NEXT: v_mov_b32_e32 v10, s24
-; SI-NEXT: v_mov_b32_e32 v8, s22
-; SI-NEXT: v_mov_b32_e32 v6, s20
-; SI-NEXT: v_mov_b32_e32 v4, s18
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v4, s93
+; SI-NEXT: v_mov_b32_e32 v3, s46
+; SI-NEXT: v_mov_b32_e32 v28, s72
+; SI-NEXT: v_mov_b32_e32 v27, s61
+; SI-NEXT: v_mov_b32_e32 v25, s58
+; SI-NEXT: v_mov_b32_e32 v22, s56
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v63, s47
+; SI-NEXT: v_mov_b32_e32 v18, s45
+; SI-NEXT: v_mov_b32_e32 v16, s43
+; SI-NEXT: v_mov_b32_e32 v14, s12
+; SI-NEXT: v_mov_b32_e32 v12, s11
+; SI-NEXT: v_mov_b32_e32 v47, s10
+; SI-NEXT: v_mov_b32_e32 v8, s9
+; SI-NEXT: v_mov_b32_e32 v55, s8
+; SI-NEXT: v_mov_b32_e32 v45, s7
+; SI-NEXT: v_mov_b32_e32 v26, s6
+; SI-NEXT: v_mov_b32_e32 v40, s60
+; SI-NEXT: v_mov_b32_e32 v58, s62
+; SI-NEXT: v_mov_b32_e32 v33, s73
+; SI-NEXT: v_mov_b32_e32 v35, s76
+; SI-NEXT: v_mov_b32_e32 v37, s79
+; SI-NEXT: v_mov_b32_e32 v39, s90
+; SI-NEXT: v_mov_b32_e32 v49, s92
+; SI-NEXT: v_mov_b32_e32 v51, s28
+; SI-NEXT: v_mov_b32_e32 v53, s26
+; SI-NEXT: v_mov_b32_e32 v46, s24
+; SI-NEXT: v_mov_b32_e32 v56, s22
+; SI-NEXT: v_mov_b32_e32 v57, s20
+; SI-NEXT: v_mov_b32_e32 v59, s18
+; SI-NEXT: v_mov_b32_e32 v60, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
-; SI-NEXT: v_mov_b32_e32 v3, s19
+; SI-NEXT: v_mov_b32_e32 v7, s19
; SI-NEXT: v_mov_b32_e32 v5, s21
-; SI-NEXT: v_mov_b32_e32 v7, s23
-; SI-NEXT: v_mov_b32_e32 v9, s25
-; SI-NEXT: v_mov_b32_e32 v11, s27
-; SI-NEXT: v_mov_b32_e32 v13, s29
-; SI-NEXT: v_mov_b32_e32 v15, s13
-; SI-NEXT: v_mov_b32_e32 v17, s14
-; SI-NEXT: v_mov_b32_e32 v19, s15
-; SI-NEXT: v_mov_b32_e32 v21, s40
+; SI-NEXT: v_mov_b32_e32 v9, s23
+; SI-NEXT: v_mov_b32_e32 v13, s25
+; SI-NEXT: v_mov_b32_e32 v15, s27
+; SI-NEXT: v_mov_b32_e32 v43, s29
+; SI-NEXT: v_mov_b32_e32 v44, s13
+; SI-NEXT: v_mov_b32_e32 v30, s14
+; SI-NEXT: v_mov_b32_e32 v21, s15
+; SI-NEXT: v_mov_b32_e32 v29, s40
; SI-NEXT: v_mov_b32_e32 v23, s41
-; SI-NEXT: v_mov_b32_e32 v25, s42
-; SI-NEXT: v_mov_b32_e32 v27, s44
-; SI-NEXT: v_mov_b32_e32 v46, s95
-; SI-NEXT: v_mov_b32_e32 v44, s94
-; SI-NEXT: v_mov_b32_e32 v42, s93
-; SI-NEXT: v_mov_b32_e32 v40, s91
+; SI-NEXT: v_mov_b32_e32 v32, s42
+; SI-NEXT: v_mov_b32_e32 v42, s44
+; SI-NEXT: v_mov_b32_e32 v0, s95
+; SI-NEXT: v_mov_b32_e32 v2, s94
+; SI-NEXT: v_mov_b32_e32 v6, s91
; SI-NEXT: v_mov_b32_e32 v54, s89
-; SI-NEXT: v_mov_b32_e32 v47, s78
+; SI-NEXT: v_mov_b32_e32 v52, s78
; SI-NEXT: v_mov_b32_e32 v50, s75
; SI-NEXT: v_mov_b32_e32 v48, s88
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v62, s77
-; SI-NEXT: v_mov_b32_e32 v55, s74
+; SI-NEXT: v_mov_b32_e32 v38, s77
+; SI-NEXT: v_mov_b32_e32 v36, s74
; SI-NEXT: v_mov_b32_e32 v34, s63
-; SI-NEXT: v_mov_b32_e32 v32, s59
-; SI-NEXT: v_mov_b32_e32 v30, s57
-; SI-NEXT: v_mov_b32_e32 v28, s46
+; SI-NEXT: v_mov_b32_e32 v24, s59
+; SI-NEXT: v_mov_b32_e32 v61, s57
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: .LBB59_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v46
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v0, v2, v0
+; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v60
+; SI-NEXT: v_or_b32_e32 v0, v3, v0
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v61
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v2, v4, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v59
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v42
-; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v26
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v45
+; SI-NEXT: v_or_b32_e32 v3, v3, v7
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v57
+; SI-NEXT: v_or_b32_e32 v4, v7, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v40
-; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v55
+; SI-NEXT: v_or_b32_e32 v5, v5, v7
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v56
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v9
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_or_b32_e32 v7, v7, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v54
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v46
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v13
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v47
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v10, v12, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v53
+; SI-NEXT: v_or_b32_e32 v8, v17, v8
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v52
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v53
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v15
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_or_b32_e32 v10, v17, v10
; SI-NEXT: v_or_b32_e32 v11, v11, v12
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v50
-; SI-NEXT: v_or_b32_e32 v12, v12, v14
-; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v51
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v50
+; SI-NEXT: v_and_b32_e32 v13, 0xffff, v43
+; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; SI-NEXT: v_or_b32_e32 v12, v12, v17
; SI-NEXT: v_or_b32_e32 v13, v13, v14
-; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
-; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v49
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v49
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v48
+; SI-NEXT: v_and_b32_e32 v15, 0xffff, v44
+; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_or_b32_e32 v14, v14, v17
; SI-NEXT: v_or_b32_e32 v15, v15, v16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v62
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
-; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
+; SI-NEXT: v_and_b32_e32 v16, 0xffff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v38
+; SI-NEXT: v_or_b32_e32 v16, v16, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v30
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v55
-; SI-NEXT: v_or_b32_e32 v18, v18, v20
-; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v39
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v36
+; SI-NEXT: v_or_b32_e32 v18, v18, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff, v21
+; SI-NEXT: v_and_b32_e32 v21, 0xffff, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v63
; SI-NEXT: v_or_b32_e32 v19, v19, v20
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v34
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v37
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v35
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v34
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; SI-NEXT: v_or_b32_e32 v20, v20, v26
; SI-NEXT: v_or_b32_e32 v21, v21, v22
+; SI-NEXT: v_and_b32_e32 v22, 0xffff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v24
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25
+; SI-NEXT: v_or_b32_e32 v22, v22, v26
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xffff, v58
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v61
+; SI-NEXT: v_or_b32_e32 v24, v24, v26
+; SI-NEXT: v_and_b32_e32 v25, 0xffff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27
+; SI-NEXT: v_or_b32_e32 v25, v25, v26
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v40
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v57
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v29
+; SI-NEXT: v_or_b32_e32 v26, v26, v27
+; SI-NEXT: v_and_b32_e32 v27, 0xffff, v42
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -49513,20 +49463,6 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
-; SI-NEXT: v_or_b32_e32 v23, v23, v24
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v24, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v30
-; SI-NEXT: v_or_b32_e32 v24, v24, v26
-; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v31
-; SI-NEXT: v_or_b32_e32 v25, v25, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v33
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; SI-NEXT: v_or_b32_e32 v26, v26, v28
-; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52
; SI-NEXT: v_or_b32_e32 v27, v27, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
index deced731f537b..9df3ebda9acfe 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
@@ -4793,11 +4793,8 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: v_writelane_b32 v30, s51, 9
; SI-NEXT: v_writelane_b32 v30, s52, 10
; SI-NEXT: v_writelane_b32 v30, s53, 11
-; SI-NEXT: v_writelane_b32 v30, s54, 12
-; SI-NEXT: v_writelane_b32 v30, s55, 13
-; SI-NEXT: v_writelane_b32 v30, s64, 14
-; SI-NEXT: v_writelane_b32 v30, s30, 15
-; SI-NEXT: v_writelane_b32 v30, s31, 16
+; SI-NEXT: v_writelane_b32 v30, s30, 12
+; SI-NEXT: v_writelane_b32 v30, s31, 13
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -4818,24 +4815,27 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s42, v0
; SI-NEXT: s_cbranch_scc0 .LBB13_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s56, s29, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s34, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s43, 16
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s25, 16
+; SI-NEXT: s_lshr_b32 s51, s23, 16
+; SI-NEXT: s_lshr_b32 s52, s21, 16
+; SI-NEXT: s_lshr_b32 s53, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
@@ -4853,41 +4853,47 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: .LBB13_2:
; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: .LBB13_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
-; SI-NEXT: s_cselect_b32 s45, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: s_cselect_b32 s59, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s59, 1
; SI-NEXT: s_cbranch_scc1 .LBB13_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -4912,12 +4918,6 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
@@ -4926,21 +4926,21 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
+; SI-NEXT: s_lshr_b32 s45, s5, 16
+; SI-NEXT: s_lshr_b32 s34, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s43, 16
+; SI-NEXT: s_lshr_b32 s47, s29, 16
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s25, 16
+; SI-NEXT: s_lshr_b32 s51, s23, 16
+; SI-NEXT: s_lshr_b32 s52, s21, 16
+; SI-NEXT: s_lshr_b32 s57, s19, 16
+; SI-NEXT: s_lshr_b32 s53, s17, 16
; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
@@ -4949,97 +4949,97 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB13_5: ; %end
-; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s45
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s64, 16
-; SI-NEXT: s_or_b32 s17, s17, s45
-; SI-NEXT: s_lshl_b32 s45, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s45
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s55, 16
-; SI-NEXT: s_or_b32 s19, s19, s45
-; SI-NEXT: s_lshl_b32 s45, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s45
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s54, 16
-; SI-NEXT: s_or_b32 s21, s21, s45
-; SI-NEXT: s_lshl_b32 s45, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s45
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s53, 16
-; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s45
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s52, 16
-; SI-NEXT: s_or_b32 s25, s25, s45
-; SI-NEXT: s_lshl_b32 s45, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s26, s26, s45
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s51, 16
-; SI-NEXT: s_or_b32 s27, s27, s45
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s76, 16
-; SI-NEXT: s_or_b32 s28, s28, s45
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s50, 16
-; SI-NEXT: s_or_b32 s29, s29, s45
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s29, s29, s47
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s74, 16
-; SI-NEXT: s_or_b32 s42, s42, s45
+; SI-NEXT: s_lshl_b32 s47, s74, 16
+; SI-NEXT: s_or_b32 s42, s42, s47
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s49, 16
-; SI-NEXT: s_or_b32 s43, s43, s45
+; SI-NEXT: s_lshl_b32 s47, s48, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_or_b32 s43, s43, s47
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s72, 16
-; SI-NEXT: s_or_b32 s40, s40, s45
+; SI-NEXT: s_lshl_b32 s47, s72, 16
+; SI-NEXT: s_or_b32 s19, s19, s57
+; SI-NEXT: s_lshl_b32 s57, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s47
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s48, 16
-; SI-NEXT: s_or_b32 s41, s41, s45
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_or_b32 s20, s20, s57
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s52, 16
+; SI-NEXT: s_or_b32 s41, s41, s47
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s62, 16
-; SI-NEXT: s_or_b32 s14, s14, s45
+; SI-NEXT: s_lshl_b32 s47, s62, 16
+; SI-NEXT: s_or_b32 s21, s21, s57
+; SI-NEXT: s_lshl_b32 s57, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s47
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s45
+; SI-NEXT: s_lshl_b32 s47, s38, 16
+; SI-NEXT: s_or_b32 s22, s22, s57
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s51, 16
+; SI-NEXT: s_or_b32 s15, s15, s47
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s60, 16
-; SI-NEXT: s_or_b32 s12, s12, s45
+; SI-NEXT: s_lshl_b32 s47, s60, 16
+; SI-NEXT: s_or_b32 s23, s23, s57
+; SI-NEXT: s_lshl_b32 s57, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s12, s12, s47
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s38, 16
-; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_lshl_b32 s47, s37, 16
+; SI-NEXT: s_or_b32 s24, s24, s57
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s50, 16
+; SI-NEXT: s_or_b32 s13, s13, s47
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_lshl_b32 s47, s58, 16
+; SI-NEXT: s_lshl_b32 s59, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s57
+; SI-NEXT: s_lshl_b32 s57, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_or_b32 s10, s10, s47
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s37, 16
-; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_lshl_b32 s47, s36, 16
+; SI-NEXT: s_or_b32 s16, s16, s59
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s53, 16
+; SI-NEXT: s_or_b32 s26, s26, s57
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s49, 16
+; SI-NEXT: s_or_b32 s11, s11, s47
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s56, 16
-; SI-NEXT: s_or_b32 s8, s8, s45
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s36, 16
-; SI-NEXT: s_or_b32 s9, s9, s45
+; SI-NEXT: s_lshl_b32 s47, s56, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s46, 16
+; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_or_b32 s6, s6, s45
+; SI-NEXT: s_or_b32 s17, s17, s59
+; SI-NEXT: s_lshl_b32 s59, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s27, s27, s57
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s76, 16
+; SI-NEXT: s_or_b32 s8, s8, s47
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s35, 16
+; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_lshl_b32 s46, s34, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
-; SI-NEXT: s_or_b32 s7, s7, s45
+; SI-NEXT: s_lshl_b32 s44, s45, 16
+; SI-NEXT: s_or_b32 s18, s18, s59
+; SI-NEXT: s_or_b32 s28, s28, s57
+; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_or_b32 s7, s7, s46
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 15
+; SI-NEXT: v_readlane_b32 s30, v30, 12
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -5070,10 +5070,7 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 16
-; SI-NEXT: v_readlane_b32 s64, v30, 14
-; SI-NEXT: v_readlane_b32 s55, v30, 13
-; SI-NEXT: v_readlane_b32 s54, v30, 12
+; SI-NEXT: v_readlane_b32 s31, v30, 13
; SI-NEXT: v_readlane_b32 s53, v30, 11
; SI-NEXT: v_readlane_b32 s52, v30, 10
; SI-NEXT: v_readlane_b32 s51, v30, 9
@@ -5097,13 +5094,12 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v30, s34, 0
; VI-NEXT: v_writelane_b32 v30, s35, 1
-; VI-NEXT: v_writelane_b32 v30, s36, 2
-; VI-NEXT: v_writelane_b32 v30, s37, 3
-; VI-NEXT: v_writelane_b32 v30, s30, 4
-; VI-NEXT: v_writelane_b32 v30, s31, 5
+; VI-NEXT: v_writelane_b32 v30, s30, 2
+; VI-NEXT: v_writelane_b32 v30, s31, 3
; VI-NEXT: v_readfirstlane_b32 s4, v16
; VI-NEXT: v_readfirstlane_b32 s6, v15
; VI-NEXT: v_readfirstlane_b32 s7, v14
@@ -5122,48 +5118,54 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s45, v0
+; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB13_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 1
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 2
+; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 3
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 4
+; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 5
+; VI-NEXT: s_lshr_b32 s89, s21, 16
+; VI-NEXT: s_lshr_b32 s90, s20, 16
+; VI-NEXT: s_lshr_b32 s91, s19, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB13_3
; VI-NEXT: .LBB13_2:
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr37
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr35
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -5187,11 +5189,30 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: .LBB13_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_mov_b32 s30, s91
+; VI-NEXT: s_mov_b32 s31, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s89
+; VI-NEXT: s_mov_b32 s34, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s90
+; VI-NEXT: s_mov_b32 s35, s46
+; VI-NEXT: v_readlane_b32 s4, v31, 0
+; VI-NEXT: v_readlane_b32 s5, v31, 1
+; VI-NEXT: v_readlane_b32 s46, v31, 2
+; VI-NEXT: v_readlane_b32 s89, v31, 3
+; VI-NEXT: v_readlane_b32 s90, v31, 4
+; VI-NEXT: v_readlane_b32 s91, v31, 5
; VI-NEXT: s_cbranch_scc1 .LBB13_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s6, s6, 3
@@ -5224,140 +5245,140 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s5, s26, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s89, s24, 16
+; VI-NEXT: s_lshr_b32 s90, s23, 16
+; VI-NEXT: s_lshr_b32 s91, s22, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 16
+; VI-NEXT: s_lshr_b32 s31, s18, 16
+; VI-NEXT: s_lshr_b32 s34, s17, 16
+; VI-NEXT: s_lshr_b32 s35, s16, 16
; VI-NEXT: .LBB13_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s37, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s36, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, s35, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, s34, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
-; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s31, 16
-; VI-NEXT: s_or_b32 s18, s18, s19
-; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s30, 16
-; VI-NEXT: s_or_b32 s19, s19, s20
-; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; VI-NEXT: s_or_b32 s20, s20, s21
-; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, vcc_lo, 16
-; VI-NEXT: s_or_b32 s21, s21, s22
-; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s91, 16
-; VI-NEXT: s_or_b32 s22, s22, s23
-; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s90, 16
-; VI-NEXT: s_or_b32 s23, s23, s24
-; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s89, 16
-; VI-NEXT: s_or_b32 s24, s24, s25
-; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s88, 16
-; VI-NEXT: s_or_b32 s25, s25, s26
+; VI-NEXT: s_and_b32 s26, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s26, s5
+; VI-NEXT: s_and_b32 s26, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s26, s4
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s79, 16
+; VI-NEXT: s_lshl_b32 s27, s88, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s78, 16
+; VI-NEXT: s_lshl_b32 s28, s79, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s45
-; VI-NEXT: s_lshl_b32 s29, s77, 16
+; VI-NEXT: s_lshl_b32 s29, s78, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s44
-; VI-NEXT: s_lshl_b32 s44, s76, 16
+; VI-NEXT: s_lshl_b32 s44, s77, 16
; VI-NEXT: s_or_b32 s29, s29, s44
; VI-NEXT: s_and_b32 s43, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s44, s75, 16
+; VI-NEXT: s_lshl_b32 s44, s76, 16
; VI-NEXT: s_or_b32 s43, s43, s44
; VI-NEXT: s_and_b32 s42, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s44, s74, 16
+; VI-NEXT: s_lshl_b32 s44, s75, 16
; VI-NEXT: s_or_b32 s42, s42, s44
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s44, s73, 16
+; VI-NEXT: s_lshl_b32 s44, s74, 16
; VI-NEXT: s_or_b32 s41, s41, s44
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s44, s72, 16
+; VI-NEXT: s_lshl_b32 s44, s73, 16
; VI-NEXT: s_or_b32 s40, s40, s44
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s44, s63, 16
+; VI-NEXT: s_lshl_b32 s44, s72, 16
; VI-NEXT: s_or_b32 s15, s15, s44
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s44, s62, 16
+; VI-NEXT: s_lshl_b32 s44, s63, 16
; VI-NEXT: s_or_b32 s14, s14, s44
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s44, s61, 16
+; VI-NEXT: s_lshl_b32 s44, s62, 16
; VI-NEXT: s_or_b32 s13, s13, s44
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s44, s60, 16
+; VI-NEXT: s_lshl_b32 s44, s61, 16
; VI-NEXT: s_or_b32 s12, s12, s44
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s44, s59, 16
+; VI-NEXT: s_lshl_b32 s44, s60, 16
; VI-NEXT: s_or_b32 s11, s11, s44
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s44, s58, 16
+; VI-NEXT: s_lshl_b32 s44, s59, 16
; VI-NEXT: s_or_b32 s10, s10, s44
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s44, s57, 16
+; VI-NEXT: s_lshl_b32 s44, s58, 16
; VI-NEXT: s_or_b32 s9, s9, s44
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_lshl_b32 s44, s57, 16
; VI-NEXT: s_or_b32 s8, s8, s44
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s35, s35, 16
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s34, s34, 16
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s31, s31, 16
+; VI-NEXT: s_and_b32 s19, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s30, s30, 16
+; VI-NEXT: s_and_b32 s20, 0xffff, s20
+; VI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; VI-NEXT: s_and_b32 s21, 0xffff, s21
+; VI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; VI-NEXT: s_and_b32 s22, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s91, s91, 16
+; VI-NEXT: s_and_b32 s23, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s90, s90, 16
+; VI-NEXT: s_and_b32 s24, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s89, s89, 16
+; VI-NEXT: s_and_b32 s25, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s46, s46, 16
; VI-NEXT: s_or_b32 s7, s7, s44
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s44, s46, 16
+; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_or_b32 s16, s16, s35
+; VI-NEXT: s_or_b32 s17, s17, s34
+; VI-NEXT: s_or_b32 s18, s18, s31
+; VI-NEXT: s_or_b32 s19, s19, s30
+; VI-NEXT: s_or_b32 s20, s20, vcc_hi
+; VI-NEXT: s_or_b32 s21, s21, vcc_lo
+; VI-NEXT: s_or_b32 s22, s22, s91
+; VI-NEXT: s_or_b32 s23, s23, s90
+; VI-NEXT: s_or_b32 s24, s24, s89
+; VI-NEXT: s_or_b32 s25, s25, s46
; VI-NEXT: s_or_b32 s6, s6, s44
-; VI-NEXT: v_readlane_b32 s30, v30, 4
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
-; VI-NEXT: v_mov_b32_e32 v4, s18
-; VI-NEXT: v_mov_b32_e32 v5, s19
-; VI-NEXT: v_mov_b32_e32 v6, s20
-; VI-NEXT: v_mov_b32_e32 v7, s21
-; VI-NEXT: v_mov_b32_e32 v8, s22
-; VI-NEXT: v_mov_b32_e32 v9, s23
-; VI-NEXT: v_mov_b32_e32 v10, s24
-; VI-NEXT: v_mov_b32_e32 v11, s25
+; VI-NEXT: v_readlane_b32 s30, v30, 2
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s18
+; VI-NEXT: v_mov_b32_e32 v3, s19
+; VI-NEXT: v_mov_b32_e32 v4, s20
+; VI-NEXT: v_mov_b32_e32 v5, s21
+; VI-NEXT: v_mov_b32_e32 v6, s22
+; VI-NEXT: v_mov_b32_e32 v7, s23
+; VI-NEXT: v_mov_b32_e32 v8, s24
+; VI-NEXT: v_mov_b32_e32 v9, s25
+; VI-NEXT: v_mov_b32_e32 v10, s5
+; VI-NEXT: v_mov_b32_e32 v11, s4
; VI-NEXT: v_mov_b32_e32 v12, s26
; VI-NEXT: v_mov_b32_e32 v13, s27
; VI-NEXT: v_mov_b32_e32 v14, s28
@@ -5376,13 +5397,12 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v27, s8
; VI-NEXT: v_mov_b32_e32 v28, s7
; VI-NEXT: v_mov_b32_e32 v29, s6
-; VI-NEXT: v_readlane_b32 s31, v30, 5
-; VI-NEXT: v_readlane_b32 s37, v30, 3
-; VI-NEXT: v_readlane_b32 s36, v30, 2
+; VI-NEXT: v_readlane_b32 s31, v30, 3
; VI-NEXT: v_readlane_b32 s35, v30, 1
; VI-NEXT: v_readlane_b32 s34, v30, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -5393,8 +5413,6 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
-; GFX9-NEXT: v_writelane_b32 v30, s30, 0
-; GFX9-NEXT: v_writelane_b32 v30, s31, 1
; GFX9-NEXT: v_readfirstlane_b32 s4, v16
; GFX9-NEXT: v_readfirstlane_b32 s6, v15
; GFX9-NEXT: v_readfirstlane_b32 s7, v14
@@ -5413,45 +5431,51 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s45, v0
+; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB13_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 0
+; GFX9-NEXT: s_lshr_b32 s4, s18, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 1
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB13_3
; GFX9-NEXT: .LBB13_2:
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; kill: killed $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; implicit-def: $vcc_hi
+; GFX9-NEXT: ; kill: killed $sgpr47
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -5478,11 +5502,12 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB13_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: v_readlane_b32 s4, v30, 0
+; GFX9-NEXT: v_readlane_b32 s5, v30, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB13_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s6, s6, 3
@@ -5515,72 +5540,71 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_add_i32 s17, s17, 3
; GFX9-NEXT: s_add_i32 s16, s16, 3
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: s_lshr_b32 s5, s18, 16
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: .LBB13_5: ; %end
-; GFX9-NEXT: s_pack_ll_b32_b16 s4, s16, s31
-; GFX9-NEXT: s_pack_ll_b32_b16 s5, s17, s30
-; GFX9-NEXT: s_pack_ll_b32_b16 s16, s18, vcc_hi
-; GFX9-NEXT: s_pack_ll_b32_b16 s17, s19, vcc_lo
-; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, s95
-; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s94
-; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s93
-; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s92
-; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s91
-; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s90
-; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s89
-; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s88
-; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s79
-; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s78
-; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s77
-; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s76
-; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s75
-; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s74
-; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s73
-; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s72
-; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s63
-; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s62
-; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s61
-; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s60
-; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s59
-; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s58
-; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s57
-; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s56
-; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s47
-; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s46
-; GFX9-NEXT: v_readlane_b32 s30, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v0, s4
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: v_mov_b32_e32 v2, s16
-; GFX9-NEXT: v_mov_b32_e32 v3, s17
+; GFX9-NEXT: s_pack_ll_b32_b16 s16, s16, s46
+; GFX9-NEXT: s_pack_ll_b32_b16 s17, s17, vcc_hi
+; GFX9-NEXT: s_pack_ll_b32_b16 s5, s18, s5
+; GFX9-NEXT: s_pack_ll_b32_b16 s4, s19, s4
+; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, vcc_lo
+; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s95
+; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s94
+; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s93
+; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s92
+; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s91
+; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s90
+; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s89
+; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s88
+; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s79
+; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s78
+; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s77
+; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s76
+; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s75
+; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s74
+; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s73
+; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s72
+; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s63
+; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s62
+; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s61
+; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s60
+; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s59
+; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s58
+; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s57
+; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s56
+; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s47
+; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v1, s17
+; GFX9-NEXT: v_mov_b32_e32 v2, s5
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s18
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v6, s20
@@ -5607,7 +5631,6 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v27, s8
; GFX9-NEXT: v_mov_b32_e32 v28, s7
; GFX9-NEXT: v_mov_b32_e32 v29, s6
-; GFX9-NEXT: v_readlane_b32 s31, v30, 1
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
@@ -7355,24 +7378,24 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s93, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
; SI-NEXT: v_readfirstlane_b32 s31, v3
-; SI-NEXT: v_readfirstlane_b32 s68, v2
-; SI-NEXT: v_readfirstlane_b32 s71, v1
-; SI-NEXT: v_readfirstlane_b32 s82, v0
+; SI-NEXT: v_readfirstlane_b32 s96, v2
+; SI-NEXT: v_readfirstlane_b32 s68, v1
+; SI-NEXT: v_readfirstlane_b32 s71, v0
; SI-NEXT: s_lshr_b32 s90, s29, 16
; SI-NEXT: s_lshr_b32 s92, s28, 16
; SI-NEXT: s_lshr_b32 s94, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
-; SI-NEXT: s_lshr_b32 s80, s23, 16
-; SI-NEXT: s_lshr_b32 s83, s22, 16
-; SI-NEXT: s_lshr_b32 s84, s21, 16
-; SI-NEXT: s_lshr_b32 s85, s20, 16
-; SI-NEXT: s_lshr_b32 s86, s19, 16
-; SI-NEXT: s_lshr_b32 s87, s18, 16
-; SI-NEXT: s_lshr_b32 s96, s17, 16
-; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s87, s24, 16
+; SI-NEXT: s_lshr_b32 s69, s23, 16
+; SI-NEXT: s_lshr_b32 s80, s22, 16
+; SI-NEXT: s_lshr_b32 s81, s21, 16
+; SI-NEXT: s_lshr_b32 s82, s20, 16
+; SI-NEXT: s_lshr_b32 s83, s19, 16
+; SI-NEXT: s_lshr_b32 s84, s18, 16
+; SI-NEXT: s_lshr_b32 s85, s17, 16
+; SI-NEXT: s_lshr_b32 s86, s16, 16
+; SI-NEXT: s_lshr_b32 s97, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -7385,62 +7408,63 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s91, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
; SI-NEXT: s_lshr_b32 s30, s31, 16
-; SI-NEXT: s_lshr_b32 s35, s68, 16
+; SI-NEXT: s_lshr_b32 s35, s96, 16
+; SI-NEXT: s_lshr_b32 s4, s68, 16
; SI-NEXT: s_lshr_b32 s70, s71, 16
-; SI-NEXT: s_lshr_b32 s81, s82, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB15_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s86, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s84, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s83, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s96, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s41, s85, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s82, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s81, 16
+; SI-NEXT: s_or_b32 s41, s5, s6
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s42, s5, s6
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s43, s5, s6
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s87, 16
+; SI-NEXT: s_or_b32 s44, s5, s6
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s34, 16
+; SI-NEXT: s_or_b32 s45, s5, s6
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s6, vcc_hi, 16
+; SI-NEXT: s_or_b32 s46, s5, s6
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s94, 16
+; SI-NEXT: s_or_b32 s47, s5, s6
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s92, 16
+; SI-NEXT: s_or_b32 s48, s5, s6
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s90, 16
+; SI-NEXT: s_or_b32 s49, s5, s6
+; SI-NEXT: s_and_b32 s5, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s50, s5, s6
+; SI-NEXT: s_and_b32 s5, s68, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s51, s5, s4
+; SI-NEXT: s_and_b32 s4, s96, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s31, 0xffff
@@ -7480,11 +7504,12 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB15_3
; SI-NEXT: .LBB15_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB15_3: ; %Flow
@@ -7495,47 +7520,47 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -7562,24 +7587,24 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_add_i32 s50, s4, 0x30000
+; SI-NEXT: s_add_i32 s49, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s71, 0xffff
; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s50, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s4, s96, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_add_i32 s4, s31, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
@@ -7640,7 +7665,7 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: .LBB15_5: ; %end
@@ -7753,237 +7778,166 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v30, s87, 29
; VI-NEXT: v_writelane_b32 v30, s30, 30
; VI-NEXT: v_writelane_b32 v30, s31, 31
-; VI-NEXT: s_lshr_b32 s14, s20, 16
+; VI-NEXT: v_readfirstlane_b32 s7, v15
+; VI-NEXT: s_lshr_b32 s72, s7, 16
+; VI-NEXT: v_readfirstlane_b32 s9, v14
; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
-; VI-NEXT: s_lshr_b32 s42, s19, 16
-; VI-NEXT: v_writelane_b32 v31, s14, 0
-; VI-NEXT: s_lshr_b32 s43, s18, 16
-; VI-NEXT: v_readfirstlane_b32 s6, v15
-; VI-NEXT: v_readfirstlane_b32 s8, v14
-; VI-NEXT: v_readfirstlane_b32 s10, v13
-; VI-NEXT: v_readfirstlane_b32 s12, v12
-; VI-NEXT: v_readfirstlane_b32 s87, v11
-; VI-NEXT: v_readfirstlane_b32 s15, v10
-; VI-NEXT: v_readfirstlane_b32 s72, v9
+; VI-NEXT: s_lshr_b32 s64, s9, 16
+; VI-NEXT: v_readfirstlane_b32 s11, v13
+; VI-NEXT: v_writelane_b32 v31, s72, 0
+; VI-NEXT: s_lshr_b32 s63, s11, 16
+; VI-NEXT: v_readfirstlane_b32 s13, v12
+; VI-NEXT: v_writelane_b32 v31, s64, 1
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: v_readfirstlane_b32 s15, v11
+; VI-NEXT: v_readfirstlane_b32 s73, v10
+; VI-NEXT: v_readfirstlane_b32 s75, v9
; VI-NEXT: v_readfirstlane_b32 s77, v8
; VI-NEXT: v_readfirstlane_b32 s79, v7
; VI-NEXT: v_readfirstlane_b32 s89, v6
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v5
; VI-NEXT: v_readfirstlane_b32 s34, v4
-; VI-NEXT: v_readfirstlane_b32 s69, v3
-; VI-NEXT: v_readfirstlane_b32 s80, v2
-; VI-NEXT: v_readfirstlane_b32 s83, v1
-; VI-NEXT: v_readfirstlane_b32 s86, v0
-; VI-NEXT: v_writelane_b32 v31, s42, 1
-; VI-NEXT: s_lshr_b32 s35, s29, 16
-; VI-NEXT: s_lshr_b32 s68, s28, 16
-; VI-NEXT: s_lshr_b32 s70, s27, 16
-; VI-NEXT: s_lshr_b32 s81, s26, 16
-; VI-NEXT: s_lshr_b32 s84, s25, 16
-; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: s_lshr_b32 s11, s23, 16
-; VI-NEXT: s_lshr_b32 s73, s22, 16
-; VI-NEXT: s_lshr_b32 s75, s21, 16
-; VI-NEXT: s_lshr_b32 s41, s17, 16
-; VI-NEXT: s_lshr_b32 s5, s16, 16
-; VI-NEXT: s_lshr_b32 s66, s6, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s10, 16
-; VI-NEXT: s_lshr_b32 s78, s12, 16
-; VI-NEXT: s_lshr_b32 s88, s87, 16
-; VI-NEXT: s_lshr_b32 s90, s15, 16
-; VI-NEXT: s_lshr_b32 s91, s72, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s77, 16
-; VI-NEXT: s_lshr_b32 s30, s79, 16
-; VI-NEXT: s_lshr_b32 s31, s89, 16
-; VI-NEXT: s_lshr_b32 s67, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s71, s34, 16
-; VI-NEXT: s_lshr_b32 s82, s69, 16
-; VI-NEXT: s_lshr_b32 s85, s80, 16
-; VI-NEXT: s_lshr_b32 s9, s83, 16
-; VI-NEXT: s_lshr_b32 s13, s86, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v16
-; VI-NEXT: v_writelane_b32 v31, s43, 2
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_writelane_b32 v31, s41, 3
-; VI-NEXT: v_writelane_b32 v31, s5, 4
+; VI-NEXT: v_readfirstlane_b32 s67, v3
+; VI-NEXT: v_readfirstlane_b32 s69, v2
+; VI-NEXT: v_readfirstlane_b32 s80, v1
+; VI-NEXT: v_readfirstlane_b32 s83, v0
+; VI-NEXT: v_writelane_b32 v31, s63, 2
+; VI-NEXT: s_lshr_b32 s90, s29, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 16
+; VI-NEXT: s_lshr_b32 s31, s27, 16
+; VI-NEXT: s_lshr_b32 s35, s26, 16
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: s_lshr_b32 s70, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s84, s22, 16
+; VI-NEXT: s_lshr_b32 s85, s21, 16
+; VI-NEXT: s_lshr_b32 s86, s20, 16
+; VI-NEXT: s_lshr_b32 s87, s19, 16
+; VI-NEXT: s_lshr_b32 s6, s18, 16
+; VI-NEXT: s_lshr_b32 s8, s17, 16
+; VI-NEXT: s_lshr_b32 s10, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s15, 16
+; VI-NEXT: s_lshr_b32 s60, s73, 16
+; VI-NEXT: s_lshr_b32 s59, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s78, s79, 16
+; VI-NEXT: s_lshr_b32 s88, s89, 16
+; VI-NEXT: s_lshr_b32 s91, vcc_hi, 16
+; VI-NEXT: s_lshr_b32 s30, s34, 16
+; VI-NEXT: s_lshr_b32 s66, s67, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: s_lshr_b32 s71, s80, 16
+; VI-NEXT: s_lshr_b32 s82, s83, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v16
+; VI-NEXT: v_writelane_b32 v31, s62, 3
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v31, s61, 4
+; VI-NEXT: v_writelane_b32 v31, s60, 5
; VI-NEXT: s_cbranch_scc0 .LBB15_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s5, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s43, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s42, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s41, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s14, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s75, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s73, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s11, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s12, s10, 16
+; VI-NEXT: s_or_b32 s36, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s12, s6, 16
+; VI-NEXT: s_or_b32 s38, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s12, s87, 16
+; VI-NEXT: s_and_b32 s14, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s8, 16
+; VI-NEXT: s_or_b32 s39, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s12, s86, 16
+; VI-NEXT: s_or_b32 s37, s14, s40
+; VI-NEXT: s_or_b32 s40, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s12, s85, 16
+; VI-NEXT: s_or_b32 s41, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s12, s84, 16
+; VI-NEXT: s_or_b32 s42, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s12, s81, 16
+; VI-NEXT: s_or_b32 s43, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s12, s70, 16
+; VI-NEXT: s_or_b32 s44, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_mov_b32 s12, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s45, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s86
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s83
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s80
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s67
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s89
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s79
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s72
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
+; VI-NEXT: s_lshl_b32 s5, s59, 16
+; VI-NEXT: s_mov_b32 s74, s59
; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s87
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s63, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s64, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s65, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB15_3
; VI-NEXT: .LBB15_2:
-; VI-NEXT: v_writelane_b32 v31, s26, 5
-; VI-NEXT: s_mov_b32 s26, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s27
-; VI-NEXT: s_mov_b32 s27, s89
-; VI-NEXT: s_mov_b32 s89, s28
-; VI-NEXT: s_mov_b32 s28, s79
-; VI-NEXT: s_mov_b32 s79, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s77, s13
-; VI-NEXT: s_mov_b32 s14, s12
-; VI-NEXT: s_mov_b32 s13, s11
-; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: s_mov_b32 s10, s8
-; VI-NEXT: s_mov_b32 s9, s7
-; VI-NEXT: s_mov_b32 s8, s6
-; VI-NEXT: s_mov_b32 s7, s85
-; VI-NEXT: s_mov_b32 s85, s82
-; VI-NEXT: s_mov_b32 s82, s71
-; VI-NEXT: s_mov_b32 s71, s68
-; VI-NEXT: s_mov_b32 s68, s35
-; VI-NEXT: s_mov_b32 s35, s31
-; VI-NEXT: s_mov_b32 s31, s30
-; VI-NEXT: s_mov_b32 s30, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s91
-; VI-NEXT: s_mov_b32 s91, s90
-; VI-NEXT: s_mov_b32 s90, s88
-; VI-NEXT: s_mov_b32 s88, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s66
-; VI-NEXT: s_mov_b32 s6, s75
-; VI-NEXT: s_mov_b32 s75, s72
-; VI-NEXT: s_mov_b32 s72, s73
-; VI-NEXT: s_mov_b32 s73, s15
-; VI-NEXT: s_mov_b32 s15, s87
-; VI-NEXT: s_mov_b32 s87, s84
-; VI-NEXT: s_mov_b32 s84, s81
-; VI-NEXT: s_mov_b32 s81, s70
-; VI-NEXT: s_mov_b32 s70, s67
+; VI-NEXT: s_mov_b32 s74, s59
+; VI-NEXT: s_mov_b32 s72, s66
+; VI-NEXT: s_mov_b32 s14, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s12, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s70
-; VI-NEXT: s_mov_b32 s70, s81
-; VI-NEXT: s_mov_b32 s81, s84
-; VI-NEXT: s_mov_b32 s84, s87
-; VI-NEXT: s_mov_b32 s87, s15
-; VI-NEXT: s_mov_b32 s15, s73
-; VI-NEXT: s_mov_b32 s73, s72
-; VI-NEXT: s_mov_b32 s72, s75
-; VI-NEXT: s_mov_b32 s75, s6
-; VI-NEXT: s_mov_b32 s66, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s88
-; VI-NEXT: s_mov_b32 s88, s90
-; VI-NEXT: s_mov_b32 s90, s91
-; VI-NEXT: s_mov_b32 s91, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s30
-; VI-NEXT: s_mov_b32 s30, s31
-; VI-NEXT: s_mov_b32 s31, s35
-; VI-NEXT: s_mov_b32 s35, s68
-; VI-NEXT: s_mov_b32 s68, s71
-; VI-NEXT: s_mov_b32 s71, s82
-; VI-NEXT: s_mov_b32 s82, s85
-; VI-NEXT: s_mov_b32 s85, s7
-; VI-NEXT: s_mov_b32 s6, s8
-; VI-NEXT: s_mov_b32 s7, s9
-; VI-NEXT: s_mov_b32 s8, s10
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s11, s13
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s13, s77
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s79
-; VI-NEXT: s_mov_b32 s79, s28
-; VI-NEXT: s_mov_b32 s28, s89
-; VI-NEXT: s_mov_b32 s89, s27
-; VI-NEXT: s_mov_b32 s27, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s26
-; VI-NEXT: v_readlane_b32 s26, v31, 5
+; VI-NEXT: s_mov_b32 s67, s14
+; VI-NEXT: s_mov_b32 s66, s72
; VI-NEXT: .LBB15_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -7991,158 +7945,159 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3
; VI-NEXT: s_cbranch_scc1 .LBB15_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_add_i32 s17, s17, 3
-; VI-NEXT: v_readlane_b32 s14, v31, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s14, s14, 16
-; VI-NEXT: s_or_b32 s5, s14, s5
-; VI-NEXT: s_add_i32 s37, s5, 0x30000
+; VI-NEXT: s_lshl_b32 s8, s8, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s36, s4, 0x30000
+; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s87, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s11, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s86, s86, 3
-; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s86, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s83, s83, 3
-; VI-NEXT: s_add_i32 s50, s4, 0x30000
+; VI-NEXT: s_add_i32 s49, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s83, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s9, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s80, s80, 3
-; VI-NEXT: s_add_i32 s51, s4, 0x30000
+; VI-NEXT: s_add_i32 s50, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s80, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s69, s69, 3
-; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s51, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s4, s5, s4
+; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s4, s67, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_add_i32 s4, s34, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s89, s89, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s89, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s79, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s72, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s15, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 5
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s87, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s12, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s10, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s8, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s6, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s64, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s65, s4, 0x30000
; VI-NEXT: .LBB15_5: ; %end
@@ -9616,11 +9571,8 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: v_writelane_b32 v30, s51, 9
; SI-NEXT: v_writelane_b32 v30, s52, 10
; SI-NEXT: v_writelane_b32 v30, s53, 11
-; SI-NEXT: v_writelane_b32 v30, s54, 12
-; SI-NEXT: v_writelane_b32 v30, s55, 13
-; SI-NEXT: v_writelane_b32 v30, s64, 14
-; SI-NEXT: v_writelane_b32 v30, s30, 15
-; SI-NEXT: v_writelane_b32 v30, s31, 16
+; SI-NEXT: v_writelane_b32 v30, s30, 12
+; SI-NEXT: v_writelane_b32 v30, s31, 13
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -9641,24 +9593,27 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s42, v0
; SI-NEXT: s_cbranch_scc0 .LBB17_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
+; SI-NEXT: s_lshr_b32 s46, s5, 16
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s56, s29, 16
+; SI-NEXT: s_mov_b32 s45, s46
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s58, s19, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s34, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s43, 16
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s25, 16
+; SI-NEXT: s_lshr_b32 s51, s23, 16
+; SI-NEXT: s_lshr_b32 s52, s21, 16
+; SI-NEXT: s_lshr_b32 s53, s17, 16
+; SI-NEXT: s_mov_b32 s57, s58
; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
@@ -9676,41 +9631,47 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: .LBB17_2:
; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr55
+; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr37
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: .LBB17_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
-; SI-NEXT: s_cselect_b32 s45, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: s_cselect_b32 s59, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s59, 1
; SI-NEXT: s_cbranch_scc1 .LBB17_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_add_i32 s9, s9, 3
+; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_add_i32 s7, s7, 3
+; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: s_add_i32 s5, s5, 3
+; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_add_i32 s19, s19, 3
@@ -9735,12 +9696,6 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: s_add_i32 s11, s11, 3
; SI-NEXT: s_add_i32 s10, s10, 3
-; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: s_add_i32 s8, s8, 3
-; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: s_add_i32 s6, s6, 3
-; SI-NEXT: s_add_i32 s5, s5, 3
-; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
@@ -9749,21 +9704,21 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
+; SI-NEXT: s_lshr_b32 s45, s5, 16
+; SI-NEXT: s_lshr_b32 s34, s7, 16
+; SI-NEXT: s_lshr_b32 s35, s9, 16
+; SI-NEXT: s_lshr_b32 s36, s11, 16
+; SI-NEXT: s_lshr_b32 s37, s13, 16
+; SI-NEXT: s_lshr_b32 s38, s15, 16
+; SI-NEXT: s_lshr_b32 s39, s41, 16
+; SI-NEXT: s_lshr_b32 s48, s43, 16
+; SI-NEXT: s_lshr_b32 s47, s29, 16
+; SI-NEXT: s_lshr_b32 s49, s27, 16
+; SI-NEXT: s_lshr_b32 s50, s25, 16
+; SI-NEXT: s_lshr_b32 s51, s23, 16
+; SI-NEXT: s_lshr_b32 s52, s21, 16
+; SI-NEXT: s_lshr_b32 s57, s19, 16
+; SI-NEXT: s_lshr_b32 s53, s17, 16
; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
@@ -9772,97 +9727,97 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB17_5: ; %end
-; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s45
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s64, 16
-; SI-NEXT: s_or_b32 s17, s17, s45
-; SI-NEXT: s_lshl_b32 s45, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s45
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s55, 16
-; SI-NEXT: s_or_b32 s19, s19, s45
-; SI-NEXT: s_lshl_b32 s45, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s45
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s54, 16
-; SI-NEXT: s_or_b32 s21, s21, s45
-; SI-NEXT: s_lshl_b32 s45, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s45
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s53, 16
-; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s45
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s52, 16
-; SI-NEXT: s_or_b32 s25, s25, s45
-; SI-NEXT: s_lshl_b32 s45, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s26, s26, s45
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s51, 16
-; SI-NEXT: s_or_b32 s27, s27, s45
-; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s76, 16
-; SI-NEXT: s_or_b32 s28, s28, s45
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s50, 16
-; SI-NEXT: s_or_b32 s29, s29, s45
+; SI-NEXT: s_lshl_b32 s47, s47, 16
+; SI-NEXT: s_or_b32 s29, s29, s47
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s74, 16
-; SI-NEXT: s_or_b32 s42, s42, s45
+; SI-NEXT: s_lshl_b32 s47, s74, 16
+; SI-NEXT: s_or_b32 s42, s42, s47
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s49, 16
-; SI-NEXT: s_or_b32 s43, s43, s45
+; SI-NEXT: s_lshl_b32 s47, s48, 16
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s57, 16
+; SI-NEXT: s_or_b32 s43, s43, s47
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s72, 16
-; SI-NEXT: s_or_b32 s40, s40, s45
+; SI-NEXT: s_lshl_b32 s47, s72, 16
+; SI-NEXT: s_or_b32 s19, s19, s57
+; SI-NEXT: s_lshl_b32 s57, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s40, s40, s47
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s48, 16
-; SI-NEXT: s_or_b32 s41, s41, s45
+; SI-NEXT: s_lshl_b32 s47, s39, 16
+; SI-NEXT: s_or_b32 s20, s20, s57
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s52, 16
+; SI-NEXT: s_or_b32 s41, s41, s47
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s62, 16
-; SI-NEXT: s_or_b32 s14, s14, s45
+; SI-NEXT: s_lshl_b32 s47, s62, 16
+; SI-NEXT: s_or_b32 s21, s21, s57
+; SI-NEXT: s_lshl_b32 s57, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_or_b32 s14, s14, s47
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s45
+; SI-NEXT: s_lshl_b32 s47, s38, 16
+; SI-NEXT: s_or_b32 s22, s22, s57
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s51, 16
+; SI-NEXT: s_or_b32 s15, s15, s47
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s60, 16
-; SI-NEXT: s_or_b32 s12, s12, s45
+; SI-NEXT: s_lshl_b32 s47, s60, 16
+; SI-NEXT: s_or_b32 s23, s23, s57
+; SI-NEXT: s_lshl_b32 s57, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s12, s12, s47
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s38, 16
-; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_lshl_b32 s47, s37, 16
+; SI-NEXT: s_or_b32 s24, s24, s57
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s50, 16
+; SI-NEXT: s_or_b32 s13, s13, s47
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_lshl_b32 s47, s58, 16
+; SI-NEXT: s_lshl_b32 s59, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s25, s25, s57
+; SI-NEXT: s_lshl_b32 s57, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_or_b32 s10, s10, s47
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s37, 16
-; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_lshl_b32 s47, s36, 16
+; SI-NEXT: s_or_b32 s16, s16, s59
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s59, s53, 16
+; SI-NEXT: s_or_b32 s26, s26, s57
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s49, 16
+; SI-NEXT: s_or_b32 s11, s11, s47
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s56, 16
-; SI-NEXT: s_or_b32 s8, s8, s45
-; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s36, 16
-; SI-NEXT: s_or_b32 s9, s9, s45
+; SI-NEXT: s_lshl_b32 s47, s56, 16
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s46, 16
+; SI-NEXT: s_lshl_b32 s46, s46, 16
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_or_b32 s6, s6, s45
+; SI-NEXT: s_or_b32 s17, s17, s59
+; SI-NEXT: s_lshl_b32 s59, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s27, s27, s57
+; SI-NEXT: s_and_b32 s28, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s57, s76, 16
+; SI-NEXT: s_or_b32 s8, s8, s47
+; SI-NEXT: s_and_b32 s9, s9, 0xffff
+; SI-NEXT: s_lshl_b32 s47, s35, 16
+; SI-NEXT: s_or_b32 s6, s6, s46
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_lshl_b32 s46, s34, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
-; SI-NEXT: s_or_b32 s7, s7, s45
+; SI-NEXT: s_lshl_b32 s44, s45, 16
+; SI-NEXT: s_or_b32 s18, s18, s59
+; SI-NEXT: s_or_b32 s28, s28, s57
+; SI-NEXT: s_or_b32 s9, s9, s47
+; SI-NEXT: s_or_b32 s7, s7, s46
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 15
+; SI-NEXT: v_readlane_b32 s30, v30, 12
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -9893,10 +9848,7 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 16
-; SI-NEXT: v_readlane_b32 s64, v30, 14
-; SI-NEXT: v_readlane_b32 s55, v30, 13
-; SI-NEXT: v_readlane_b32 s54, v30, 12
+; SI-NEXT: v_readlane_b32 s31, v30, 13
; SI-NEXT: v_readlane_b32 s53, v30, 11
; SI-NEXT: v_readlane_b32 s52, v30, 10
; SI-NEXT: v_readlane_b32 s51, v30, 9
@@ -9920,13 +9872,12 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v30, s34, 0
; VI-NEXT: v_writelane_b32 v30, s35, 1
-; VI-NEXT: v_writelane_b32 v30, s36, 2
-; VI-NEXT: v_writelane_b32 v30, s37, 3
-; VI-NEXT: v_writelane_b32 v30, s30, 4
-; VI-NEXT: v_writelane_b32 v30, s31, 5
+; VI-NEXT: v_writelane_b32 v30, s30, 2
+; VI-NEXT: v_writelane_b32 v30, s31, 3
; VI-NEXT: v_readfirstlane_b32 s4, v16
; VI-NEXT: v_readfirstlane_b32 s6, v15
; VI-NEXT: v_readfirstlane_b32 s7, v14
@@ -9945,48 +9896,54 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s45, v0
+; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB17_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 1
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 2
+; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 3
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 4
+; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 5
+; VI-NEXT: s_lshr_b32 s89, s21, 16
+; VI-NEXT: s_lshr_b32 s90, s20, 16
+; VI-NEXT: s_lshr_b32 s91, s19, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB17_3
; VI-NEXT: .LBB17_2:
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr37
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr35
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -10010,11 +9967,30 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: .LBB17_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_mov_b32 s30, s91
+; VI-NEXT: s_mov_b32 s31, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s89
+; VI-NEXT: s_mov_b32 s34, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s90
+; VI-NEXT: s_mov_b32 s35, s46
+; VI-NEXT: v_readlane_b32 s4, v31, 0
+; VI-NEXT: v_readlane_b32 s5, v31, 1
+; VI-NEXT: v_readlane_b32 s46, v31, 2
+; VI-NEXT: v_readlane_b32 s89, v31, 3
+; VI-NEXT: v_readlane_b32 s90, v31, 4
+; VI-NEXT: v_readlane_b32 s91, v31, 5
; VI-NEXT: s_cbranch_scc1 .LBB17_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s6, s6, 3
@@ -10047,140 +10023,140 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s5, s26, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s89, s24, 16
+; VI-NEXT: s_lshr_b32 s90, s23, 16
+; VI-NEXT: s_lshr_b32 s91, s22, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 16
+; VI-NEXT: s_lshr_b32 s31, s18, 16
+; VI-NEXT: s_lshr_b32 s34, s17, 16
+; VI-NEXT: s_lshr_b32 s35, s16, 16
; VI-NEXT: .LBB17_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s37, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s36, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, s35, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, s34, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
-; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s31, 16
-; VI-NEXT: s_or_b32 s18, s18, s19
-; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s30, 16
-; VI-NEXT: s_or_b32 s19, s19, s20
-; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; VI-NEXT: s_or_b32 s20, s20, s21
-; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, vcc_lo, 16
-; VI-NEXT: s_or_b32 s21, s21, s22
-; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s91, 16
-; VI-NEXT: s_or_b32 s22, s22, s23
-; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s90, 16
-; VI-NEXT: s_or_b32 s23, s23, s24
-; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s89, 16
-; VI-NEXT: s_or_b32 s24, s24, s25
-; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s88, 16
-; VI-NEXT: s_or_b32 s25, s25, s26
+; VI-NEXT: s_and_b32 s26, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s26, s5
+; VI-NEXT: s_and_b32 s26, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s26, s4
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s79, 16
+; VI-NEXT: s_lshl_b32 s27, s88, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s78, 16
+; VI-NEXT: s_lshl_b32 s28, s79, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s45
-; VI-NEXT: s_lshl_b32 s29, s77, 16
+; VI-NEXT: s_lshl_b32 s29, s78, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s44
-; VI-NEXT: s_lshl_b32 s44, s76, 16
+; VI-NEXT: s_lshl_b32 s44, s77, 16
; VI-NEXT: s_or_b32 s29, s29, s44
; VI-NEXT: s_and_b32 s43, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s44, s75, 16
+; VI-NEXT: s_lshl_b32 s44, s76, 16
; VI-NEXT: s_or_b32 s43, s43, s44
; VI-NEXT: s_and_b32 s42, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s44, s74, 16
+; VI-NEXT: s_lshl_b32 s44, s75, 16
; VI-NEXT: s_or_b32 s42, s42, s44
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s44, s73, 16
+; VI-NEXT: s_lshl_b32 s44, s74, 16
; VI-NEXT: s_or_b32 s41, s41, s44
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s44, s72, 16
+; VI-NEXT: s_lshl_b32 s44, s73, 16
; VI-NEXT: s_or_b32 s40, s40, s44
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s44, s63, 16
+; VI-NEXT: s_lshl_b32 s44, s72, 16
; VI-NEXT: s_or_b32 s15, s15, s44
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s44, s62, 16
+; VI-NEXT: s_lshl_b32 s44, s63, 16
; VI-NEXT: s_or_b32 s14, s14, s44
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s44, s61, 16
+; VI-NEXT: s_lshl_b32 s44, s62, 16
; VI-NEXT: s_or_b32 s13, s13, s44
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s44, s60, 16
+; VI-NEXT: s_lshl_b32 s44, s61, 16
; VI-NEXT: s_or_b32 s12, s12, s44
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s44, s59, 16
+; VI-NEXT: s_lshl_b32 s44, s60, 16
; VI-NEXT: s_or_b32 s11, s11, s44
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s44, s58, 16
+; VI-NEXT: s_lshl_b32 s44, s59, 16
; VI-NEXT: s_or_b32 s10, s10, s44
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s44, s57, 16
+; VI-NEXT: s_lshl_b32 s44, s58, 16
; VI-NEXT: s_or_b32 s9, s9, s44
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_lshl_b32 s44, s57, 16
; VI-NEXT: s_or_b32 s8, s8, s44
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s35, s35, 16
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s34, s34, 16
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s31, s31, 16
+; VI-NEXT: s_and_b32 s19, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s30, s30, 16
+; VI-NEXT: s_and_b32 s20, 0xffff, s20
+; VI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; VI-NEXT: s_and_b32 s21, 0xffff, s21
+; VI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; VI-NEXT: s_and_b32 s22, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s91, s91, 16
+; VI-NEXT: s_and_b32 s23, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s90, s90, 16
+; VI-NEXT: s_and_b32 s24, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s89, s89, 16
+; VI-NEXT: s_and_b32 s25, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s46, s46, 16
; VI-NEXT: s_or_b32 s7, s7, s44
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s44, s46, 16
+; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_or_b32 s16, s16, s35
+; VI-NEXT: s_or_b32 s17, s17, s34
+; VI-NEXT: s_or_b32 s18, s18, s31
+; VI-NEXT: s_or_b32 s19, s19, s30
+; VI-NEXT: s_or_b32 s20, s20, vcc_hi
+; VI-NEXT: s_or_b32 s21, s21, vcc_lo
+; VI-NEXT: s_or_b32 s22, s22, s91
+; VI-NEXT: s_or_b32 s23, s23, s90
+; VI-NEXT: s_or_b32 s24, s24, s89
+; VI-NEXT: s_or_b32 s25, s25, s46
; VI-NEXT: s_or_b32 s6, s6, s44
-; VI-NEXT: v_readlane_b32 s30, v30, 4
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
-; VI-NEXT: v_mov_b32_e32 v4, s18
-; VI-NEXT: v_mov_b32_e32 v5, s19
-; VI-NEXT: v_mov_b32_e32 v6, s20
-; VI-NEXT: v_mov_b32_e32 v7, s21
-; VI-NEXT: v_mov_b32_e32 v8, s22
-; VI-NEXT: v_mov_b32_e32 v9, s23
-; VI-NEXT: v_mov_b32_e32 v10, s24
-; VI-NEXT: v_mov_b32_e32 v11, s25
+; VI-NEXT: v_readlane_b32 s30, v30, 2
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s18
+; VI-NEXT: v_mov_b32_e32 v3, s19
+; VI-NEXT: v_mov_b32_e32 v4, s20
+; VI-NEXT: v_mov_b32_e32 v5, s21
+; VI-NEXT: v_mov_b32_e32 v6, s22
+; VI-NEXT: v_mov_b32_e32 v7, s23
+; VI-NEXT: v_mov_b32_e32 v8, s24
+; VI-NEXT: v_mov_b32_e32 v9, s25
+; VI-NEXT: v_mov_b32_e32 v10, s5
+; VI-NEXT: v_mov_b32_e32 v11, s4
; VI-NEXT: v_mov_b32_e32 v12, s26
; VI-NEXT: v_mov_b32_e32 v13, s27
; VI-NEXT: v_mov_b32_e32 v14, s28
@@ -10199,13 +10175,12 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v27, s8
; VI-NEXT: v_mov_b32_e32 v28, s7
; VI-NEXT: v_mov_b32_e32 v29, s6
-; VI-NEXT: v_readlane_b32 s31, v30, 5
-; VI-NEXT: v_readlane_b32 s37, v30, 3
-; VI-NEXT: v_readlane_b32 s36, v30, 2
+; VI-NEXT: v_readlane_b32 s31, v30, 3
; VI-NEXT: v_readlane_b32 s35, v30, 1
; VI-NEXT: v_readlane_b32 s34, v30, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -10216,8 +10191,6 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
-; GFX9-NEXT: v_writelane_b32 v30, s30, 0
-; GFX9-NEXT: v_writelane_b32 v30, s31, 1
; GFX9-NEXT: v_readfirstlane_b32 s4, v16
; GFX9-NEXT: v_readfirstlane_b32 s6, v15
; GFX9-NEXT: v_readfirstlane_b32 s7, v14
@@ -10236,45 +10209,51 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s45, v0
+; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB17_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 0
+; GFX9-NEXT: s_lshr_b32 s4, s18, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 1
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB17_3
; GFX9-NEXT: .LBB17_2:
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; kill: killed $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; implicit-def: $vcc_hi
+; GFX9-NEXT: ; kill: killed $sgpr47
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -10301,11 +10280,12 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB17_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: v_readlane_b32 s4, v30, 0
+; GFX9-NEXT: v_readlane_b32 s5, v30, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB17_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_i32 s6, s6, 3
@@ -10338,72 +10318,71 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: s_add_i32 s18, s18, 3
; GFX9-NEXT: s_add_i32 s17, s17, 3
; GFX9-NEXT: s_add_i32 s16, s16, 3
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: s_lshr_b32 s5, s18, 16
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: .LBB17_5: ; %end
-; GFX9-NEXT: s_pack_ll_b32_b16 s4, s16, s31
-; GFX9-NEXT: s_pack_ll_b32_b16 s5, s17, s30
-; GFX9-NEXT: s_pack_ll_b32_b16 s16, s18, vcc_hi
-; GFX9-NEXT: s_pack_ll_b32_b16 s17, s19, vcc_lo
-; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, s95
-; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s94
-; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s93
-; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s92
-; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s91
-; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s90
-; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s89
-; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s88
-; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s79
-; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s78
-; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s77
-; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s76
-; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s75
-; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s74
-; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s73
-; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s72
-; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s63
-; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s62
-; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s61
-; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s60
-; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s59
-; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s58
-; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s57
-; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s56
-; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s47
-; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s46
-; GFX9-NEXT: v_readlane_b32 s30, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v0, s4
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: v_mov_b32_e32 v2, s16
-; GFX9-NEXT: v_mov_b32_e32 v3, s17
+; GFX9-NEXT: s_pack_ll_b32_b16 s16, s16, s46
+; GFX9-NEXT: s_pack_ll_b32_b16 s17, s17, vcc_hi
+; GFX9-NEXT: s_pack_ll_b32_b16 s5, s18, s5
+; GFX9-NEXT: s_pack_ll_b32_b16 s4, s19, s4
+; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, vcc_lo
+; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s95
+; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s94
+; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s93
+; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s92
+; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s91
+; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s90
+; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s89
+; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s88
+; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s79
+; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s78
+; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s77
+; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s76
+; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s75
+; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s74
+; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s73
+; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s72
+; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s63
+; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s62
+; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s61
+; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s60
+; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s59
+; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s58
+; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s57
+; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s56
+; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s47
+; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v1, s17
+; GFX9-NEXT: v_mov_b32_e32 v2, s5
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s18
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v6, s20
@@ -10430,7 +10409,6 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v27, s8
; GFX9-NEXT: v_mov_b32_e32 v28, s7
; GFX9-NEXT: v_mov_b32_e32 v29, s6
-; GFX9-NEXT: v_readlane_b32 s31, v30, 1
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
@@ -12323,13 +12301,13 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s92, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: v_readfirstlane_b32 s31, v1
-; SI-NEXT: v_readfirstlane_b32 s68, v0
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: v_readfirstlane_b32 s35, v0
; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; SI-NEXT: s_lshr_b32 s34, s28, 16
-; SI-NEXT: s_lshr_b32 s69, s27, 16
-; SI-NEXT: s_lshr_b32 s71, s26, 16
-; SI-NEXT: s_lshr_b32 s80, s25, 16
+; SI-NEXT: s_lshr_b32 s31, s28, 16
+; SI-NEXT: s_lshr_b32 s68, s27, 16
+; SI-NEXT: s_lshr_b32 s70, s26, 16
+; SI-NEXT: s_lshr_b32 s71, s25, 16
; SI-NEXT: s_lshr_b32 s81, s24, 16
; SI-NEXT: s_lshr_b32 s82, s23, 16
; SI-NEXT: s_lshr_b32 s83, s22, 16
@@ -12339,7 +12317,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s87, s18, 16
; SI-NEXT: s_lshr_b32 s96, s17, 16
; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s80, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -12352,64 +12330,65 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s35, s31, 16
-; SI-NEXT: s_lshr_b32 s70, s68, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s34, s30, 16
+; SI-NEXT: s_lshr_b32 s69, s35, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB19_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s96, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s35, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s30, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s52, s5, s4
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s53, s4, s5
@@ -12447,11 +12426,12 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB19_3
; SI-NEXT: .LBB19_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB19_3: ; %Flow
@@ -12529,7 +12509,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s71
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
@@ -12538,11 +12518,11 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s70
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v11, v9
; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
@@ -12553,7 +12533,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s31
; SI-NEXT: v_cvt_f32_f16_e32 v14, s28
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
@@ -12566,7 +12546,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v14, v12
; SI-NEXT: v_cvt_f32_f16_e32 v14, s29
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s69
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -12574,11 +12554,11 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s35
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s35
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
@@ -12586,7 +12566,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s7
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v17, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, vcc_lo
@@ -12686,7 +12666,7 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT: v_or_b32_e32 v27, v29, v27
; SI-NEXT: v_cvt_f32_f16_e32 v29, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v30, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v30, s80
; SI-NEXT: v_cvt_f32_f16_e32 v31, s6
; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
@@ -12832,117 +12812,118 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s78, v7
; VI-NEXT: v_readfirstlane_b32 s89, v6
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v5
-; VI-NEXT: v_readfirstlane_b32 s31, v4
-; VI-NEXT: v_readfirstlane_b32 s69, v3
-; VI-NEXT: v_readfirstlane_b32 s80, v2
-; VI-NEXT: v_readfirstlane_b32 s83, v1
-; VI-NEXT: v_readfirstlane_b32 s86, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v4
+; VI-NEXT: v_readfirstlane_b32 s68, v3
+; VI-NEXT: v_readfirstlane_b32 s71, v2
+; VI-NEXT: v_readfirstlane_b32 s82, v1
+; VI-NEXT: v_readfirstlane_b32 s85, v0
; VI-NEXT: v_writelane_b32 v33, s62, 2
-; VI-NEXT: s_lshr_b32 s56, s29, 16
-; VI-NEXT: s_lshr_b32 s77, s28, 16
+; VI-NEXT: s_lshr_b32 s73, s29, 16
+; VI-NEXT: s_lshr_b32 s56, s28, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s68, s25, 16
-; VI-NEXT: s_lshr_b32 s71, s24, 16
-; VI-NEXT: s_lshr_b32 s82, s23, 16
-; VI-NEXT: s_lshr_b32 s84, s22, 16
-; VI-NEXT: s_lshr_b32 s87, s21, 16
-; VI-NEXT: s_lshr_b32 s9, s20, 16
-; VI-NEXT: s_lshr_b32 s11, s19, 16
-; VI-NEXT: s_lshr_b32 s13, s18, 16
-; VI-NEXT: s_lshr_b32 s15, s17, 16
-; VI-NEXT: s_lshr_b32 s73, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s35, s25, 16
+; VI-NEXT: s_lshr_b32 s70, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s83, s22, 16
+; VI-NEXT: s_lshr_b32 s86, s21, 16
+; VI-NEXT: s_lshr_b32 s7, s20, 16
+; VI-NEXT: s_lshr_b32 s9, s19, 16
+; VI-NEXT: s_lshr_b32 s11, s18, 16
+; VI-NEXT: s_lshr_b32 s13, s17, 16
+; VI-NEXT: s_lshr_b32 s15, s16, 16
; VI-NEXT: s_lshr_b32 s65, s6, 16
; VI-NEXT: s_lshr_b32 s60, s72, 16
; VI-NEXT: s_lshr_b32 s59, s74, 16
; VI-NEXT: s_lshr_b32 s58, s76, 16
; VI-NEXT: s_lshr_b32 s57, s78, 16
-; VI-NEXT: s_lshr_b32 s88, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: s_lshr_b32 s81, s80, 16
-; VI-NEXT: s_lshr_b32 s85, s83, 16
-; VI-NEXT: s_lshr_b32 s7, s86, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v16
+; VI-NEXT: s_lshr_b32 s79, s89, 16
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: s_lshr_b32 s80, s71, 16
+; VI-NEXT: s_lshr_b32 s84, s82, 16
+; VI-NEXT: s_lshr_b32 s87, s85, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v16
; VI-NEXT: v_writelane_b32 v33, s61, 3
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s60, 4
; VI-NEXT: v_writelane_b32 v33, s59, 5
; VI-NEXT: s_cbranch_scc0 .LBB19_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s73, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s11, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s15, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s86
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s80
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s55, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s40, s15, 16
+; VI-NEXT: s_or_b32 s36, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s40, s11, 16
+; VI-NEXT: s_or_b32 s38, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s40, s9, 16
+; VI-NEXT: s_and_b32 s41, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s42, s13, 16
+; VI-NEXT: s_or_b32 s39, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s40, s7, 16
+; VI-NEXT: s_or_b32 s37, s41, s42
+; VI-NEXT: s_or_b32 s40, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s41, s86, 16
+; VI-NEXT: s_or_b32 s41, s5, s41
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s42, s83, 16
+; VI-NEXT: s_or_b32 s42, s5, s42
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s43, s81, 16
+; VI-NEXT: s_or_b32 s43, s5, s43
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s44, s70, 16
+; VI-NEXT: s_or_b32 s44, s5, s44
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s45, s35, 16
+; VI-NEXT: s_or_b32 s45, s5, s45
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s46, s31, 16
+; VI-NEXT: s_or_b32 s46, s5, s46
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s47, vcc_hi, 16
+; VI-NEXT: s_or_b32 s47, s5, s47
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_mov_b32 s91, s56
+; VI-NEXT: s_lshl_b32 s56, s56, 16
+; VI-NEXT: s_or_b32 s48, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s56, s73, 16
+; VI-NEXT: s_or_b32 s49, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s85
+; VI-NEXT: s_lshl_b32 s56, s87, 16
+; VI-NEXT: s_or_b32 s50, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s82
+; VI-NEXT: s_lshl_b32 s56, s84, 16
+; VI-NEXT: s_or_b32 s51, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s71
+; VI-NEXT: s_lshl_b32 s56, s80, 16
+; VI-NEXT: s_or_b32 s52, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s56, s69, 16
+; VI-NEXT: s_or_b32 s53, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s56, s34, 16
+; VI-NEXT: s_mov_b32 s90, s73
+; VI-NEXT: s_or_b32 s54, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s73, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s55, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_mov_b32 s90, s56
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s78
; VI-NEXT: s_lshl_b32 s5, s57, 16
-; VI-NEXT: s_mov_b32 s91, s77
-; VI-NEXT: s_mov_b32 s77, s57
+; VI-NEXT: s_mov_b32 s77, s79
+; VI-NEXT: s_mov_b32 s79, s57
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s76
; VI-NEXT: s_lshl_b32 s5, s58, 16
-; VI-NEXT: s_mov_b32 s79, s88
; VI-NEXT: s_mov_b32 s88, s58
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
@@ -12970,12 +12951,13 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB19_3
; VI-NEXT: .LBB19_2:
-; VI-NEXT: s_mov_b32 s79, s88
-; VI-NEXT: s_mov_b32 s91, s77
-; VI-NEXT: s_mov_b32 s90, s56
-; VI-NEXT: s_mov_b32 s77, s57
+; VI-NEXT: s_mov_b32 s77, s79
+; VI-NEXT: s_mov_b32 s91, s56
+; VI-NEXT: s_mov_b32 s90, s73
+; VI-NEXT: s_mov_b32 s79, s57
; VI-NEXT: s_mov_b32 s88, s58
; VI-NEXT: s_mov_b32 s75, s65
+; VI-NEXT: s_mov_b32 s73, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB19_3: ; %Flow
@@ -12985,47 +12967,47 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; VI-NEXT: s_cbranch_scc1 .LBB19_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v29, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s73
-; VI-NEXT: v_mov_b32_e32 v2, s15
+; VI-NEXT: v_mov_b32_e32 v0, s15
+; VI-NEXT: v_mov_b32_e32 v2, s13
; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v29
; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v29
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s13
+; VI-NEXT: v_mov_b32_e32 v2, s11
; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v29
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s11
+; VI-NEXT: v_mov_b32_e32 v3, s9
; VI-NEXT: v_add_f16_sdwa v3, v3, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v29
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s9
+; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_add_f16_sdwa v4, v4, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v29
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s87
+; VI-NEXT: v_mov_b32_e32 v5, s86
; VI-NEXT: v_add_f16_sdwa v5, v5, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v29
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s84
+; VI-NEXT: v_mov_b32_e32 v6, s83
; VI-NEXT: v_add_f16_sdwa v6, v6, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v29
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s82
+; VI-NEXT: v_mov_b32_e32 v7, s81
; VI-NEXT: v_add_f16_sdwa v7, v7, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v29
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s71
+; VI-NEXT: v_mov_b32_e32 v8, s70
; VI-NEXT: v_add_f16_sdwa v8, v8, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v29
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s68
+; VI-NEXT: v_mov_b32_e32 v9, s35
; VI-NEXT: v_add_f16_sdwa v9, v9, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v29
; VI-NEXT: v_or_b32_e32 v9, v10, v9
-; VI-NEXT: v_mov_b32_e32 v10, s34
+; VI-NEXT: v_mov_b32_e32 v10, s31
; VI-NEXT: v_add_f16_sdwa v10, v10, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v11, s26, v29
; VI-NEXT: v_or_b32_e32 v10, v11, v10
@@ -13041,35 +13023,35 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i
; VI-NEXT: v_add_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v29
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s7
+; VI-NEXT: v_mov_b32_e32 v14, s87
; VI-NEXT: v_add_f16_sdwa v14, v14, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s86, v29
+; VI-NEXT: v_add_f16_e32 v15, s85, v29
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s85
+; VI-NEXT: v_mov_b32_e32 v15, s84
; VI-NEXT: v_add_f16_sdwa v15, v15, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s83, v29
+; VI-NEXT: v_add_f16_e32 v16, s82, v29
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s81
+; VI-NEXT: v_mov_b32_e32 v16, s80
; VI-NEXT: v_add_f16_sdwa v16, v16, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s80, v29
+; VI-NEXT: v_add_f16_e32 v17, s71, v29
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s70
+; VI-NEXT: v_mov_b32_e32 v17, s69
; VI-NEXT: v_add_f16_sdwa v17, v17, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s69, v29
+; VI-NEXT: v_add_f16_e32 v18, s68, v29
; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_mov_b32_e32 v18, s35
+; VI-NEXT: v_mov_b32_e32 v18, s34
; VI-NEXT: v_add_f16_sdwa v18, v18, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v19, s31, v29
+; VI-NEXT: v_add_f16_e32 v19, s30, v29
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_mov_b32_e32 v19, s30
+; VI-NEXT: v_mov_b32_e32 v19, s73
; VI-NEXT: v_add_f16_sdwa v19, v19, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, vcc_lo, v29
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_mov_b32_e32 v20, s79
+; VI-NEXT: v_mov_b32_e32 v20, s77
; VI-NEXT: v_add_f16_sdwa v20, v20, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s89, v29
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_mov_b32_e32 v21, s77
+; VI-NEXT: v_mov_b32_e32 v21, s79
; VI-NEXT: v_add_f16_sdwa v21, v21, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s78, v29
; VI-NEXT: v_or_b32_e32 v21, v22, v21
@@ -17333,39 +17315,35 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v62, s34, 0
-; SI-NEXT: v_writelane_b32 v62, s35, 1
-; SI-NEXT: v_writelane_b32 v62, s36, 2
-; SI-NEXT: v_writelane_b32 v62, s37, 3
-; SI-NEXT: v_writelane_b32 v62, s38, 4
-; SI-NEXT: v_writelane_b32 v62, s39, 5
-; SI-NEXT: v_writelane_b32 v62, s48, 6
-; SI-NEXT: v_writelane_b32 v62, s49, 7
-; SI-NEXT: v_writelane_b32 v62, s50, 8
-; SI-NEXT: v_writelane_b32 v62, s51, 9
-; SI-NEXT: v_writelane_b32 v62, s52, 10
-; SI-NEXT: v_writelane_b32 v62, s53, 11
-; SI-NEXT: v_writelane_b32 v62, s54, 12
-; SI-NEXT: v_writelane_b32 v62, s55, 13
-; SI-NEXT: v_writelane_b32 v62, s64, 14
-; SI-NEXT: v_writelane_b32 v62, s30, 15
-; SI-NEXT: v_writelane_b32 v62, s31, 16
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v61, s34, 0
+; SI-NEXT: v_writelane_b32 v61, s35, 1
+; SI-NEXT: v_writelane_b32 v61, s36, 2
+; SI-NEXT: v_writelane_b32 v61, s37, 3
+; SI-NEXT: v_writelane_b32 v61, s38, 4
+; SI-NEXT: v_writelane_b32 v61, s39, 5
+; SI-NEXT: v_writelane_b32 v61, s48, 6
+; SI-NEXT: v_writelane_b32 v61, s49, 7
+; SI-NEXT: v_writelane_b32 v61, s50, 8
+; SI-NEXT: v_writelane_b32 v61, s51, 9
+; SI-NEXT: v_writelane_b32 v61, s52, 10
+; SI-NEXT: v_writelane_b32 v61, s53, 11
+; SI-NEXT: v_writelane_b32 v61, s30, 12
+; SI-NEXT: v_writelane_b32 v61, s31, 13
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -17386,24 +17364,27 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s42, v0
; SI-NEXT: s_cbranch_scc0 .LBB29_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s64, s5, 16
-; SI-NEXT: s_lshr_b32 s55, s7, 16
-; SI-NEXT: s_lshr_b32 s54, s9, 16
-; SI-NEXT: s_lshr_b32 s53, s11, 16
-; SI-NEXT: s_lshr_b32 s52, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s50, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s48, s29, 16
-; SI-NEXT: s_lshr_b32 s39, s27, 16
-; SI-NEXT: s_lshr_b32 s38, s25, 16
-; SI-NEXT: s_lshr_b32 s37, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s35, s19, 16
-; SI-NEXT: s_lshr_b32 s34, s17, 16
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: s_lshr_b32 s47, s17, 16
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s56, s5, 16
+; SI-NEXT: s_mov_b32 vcc_hi, s46
+; SI-NEXT: s_mov_b32 s45, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s53, s7, 16
+; SI-NEXT: s_lshr_b32 s52, s9, 16
+; SI-NEXT: s_lshr_b32 s51, s11, 16
+; SI-NEXT: s_lshr_b32 s50, s13, 16
+; SI-NEXT: s_lshr_b32 s49, s15, 16
+; SI-NEXT: s_lshr_b32 s48, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
+; SI-NEXT: s_lshr_b32 s38, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s25, 16
+; SI-NEXT: s_lshr_b32 s35, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
@@ -17421,39 +17402,39 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: .LBB29_2:
; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB29_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
-; SI-NEXT: s_cselect_b32 s45, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB29_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v29, s5, 1.0
@@ -17464,65 +17445,61 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v25, s9, 1.0
; SI-NEXT: v_add_f32_e64 v24, s8, 1.0
; SI-NEXT: v_lshr_b64 v[31:32], v[26:27], 16
-; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
-; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
; SI-NEXT: v_add_f32_e64 v23, s11, 1.0
; SI-NEXT: v_add_f32_e64 v22, s10, 1.0
; SI-NEXT: v_lshr_b64 v[32:33], v[24:25], 16
-; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
-; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
; SI-NEXT: v_add_f32_e64 v21, s13, 1.0
; SI-NEXT: v_add_f32_e64 v20, s12, 1.0
; SI-NEXT: v_lshr_b64 v[33:34], v[22:23], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16
-; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
-; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
; SI-NEXT: v_add_f32_e64 v19, s15, 1.0
; SI-NEXT: v_add_f32_e64 v18, s14, 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16
-; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
; SI-NEXT: v_add_f32_e64 v17, s41, 1.0
; SI-NEXT: v_add_f32_e64 v16, s40, 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[18:19], 16
-; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16
-; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
; SI-NEXT: v_add_f32_e64 v15, s43, 1.0
; SI-NEXT: v_add_f32_e64 v14, s42, 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[16:17], 16
-; SI-NEXT: v_lshr_b64 v[51:52], v[4:5], 16
-; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_add_f32_e64 v13, s29, 1.0
; SI-NEXT: v_add_f32_e64 v12, s28, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
+; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
+; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v27
; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16
+; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
+; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16
+; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
+; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
+; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16
+; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
+; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
+; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16
+; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
+; SI-NEXT: v_lshr_b64 v[51:52], v[4:5], 16
+; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
+; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v21
; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; SI-NEXT: v_mov_b32_e32 v54, v60
; SI-NEXT: s_branch .LBB29_6
; SI-NEXT: .LBB29_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -17555,22 +17532,22 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v61, s34
-; SI-NEXT: v_mov_b32_e32 v60, s35
-; SI-NEXT: v_mov_b32_e32 v59, s36
-; SI-NEXT: v_mov_b32_e32 v58, s37
-; SI-NEXT: v_mov_b32_e32 v57, s38
-; SI-NEXT: v_mov_b32_e32 v56, s39
-; SI-NEXT: v_mov_b32_e32 v47, s48
-; SI-NEXT: v_mov_b32_e32 v46, s49
-; SI-NEXT: v_mov_b32_e32 v45, s50
-; SI-NEXT: v_mov_b32_e32 v44, s51
-; SI-NEXT: v_mov_b32_e32 v43, s52
-; SI-NEXT: v_mov_b32_e32 v42, s53
-; SI-NEXT: v_mov_b32_e32 v41, s54
-; SI-NEXT: v_mov_b32_e32 v40, s55
-; SI-NEXT: v_mov_b32_e32 v55, s64
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v59, s45
+; SI-NEXT: v_mov_b32_e32 v58, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v57, s34
+; SI-NEXT: v_mov_b32_e32 v56, s35
+; SI-NEXT: v_mov_b32_e32 v47, s36
+; SI-NEXT: v_mov_b32_e32 v46, s37
+; SI-NEXT: v_mov_b32_e32 v45, s38
+; SI-NEXT: v_mov_b32_e32 v44, s39
+; SI-NEXT: v_mov_b32_e32 v43, s48
+; SI-NEXT: v_mov_b32_e32 v42, s49
+; SI-NEXT: v_mov_b32_e32 v54, s50
+; SI-NEXT: v_mov_b32_e32 v41, s51
+; SI-NEXT: v_mov_b32_e32 v40, s52
+; SI-NEXT: v_mov_b32_e32 v39, s53
+; SI-NEXT: v_mov_b32_e32 v55, s47
; SI-NEXT: v_mov_b32_e32 v30, vcc_lo
; SI-NEXT: v_mov_b32_e32 v31, s44
; SI-NEXT: v_mov_b32_e32 v32, s46
@@ -17587,37 +17564,17 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v52, s92
; SI-NEXT: v_mov_b32_e32 v53, s94
; SI-NEXT: .LBB29_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v6, v39
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_or_b32_e32 v7, v7, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v39
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v9, v9, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
@@ -17627,62 +17584,82 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_or_b32_e32 v0, v0, v53
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v59
+; SI-NEXT: v_or_b32_e32 v2, v2, v52
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v51
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v57
+; SI-NEXT: v_or_b32_e32 v6, v6, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v56
+; SI-NEXT: v_or_b32_e32 v8, v8, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v47
+; SI-NEXT: v_or_b32_e32 v10, v10, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v46
; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45
; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v44
; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v43
; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_or_b32_e32 v20, v20, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT: v_or_b32_e32 v22, v22, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
; SI-NEXT: v_or_b32_e32 v24, v24, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_or_b32_e32 v26, v26, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v20, v20, v34
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v54
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v26, v26, v31
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v39
; SI-NEXT: v_or_b32_e32 v28, v28, v30
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55
-; SI-NEXT: v_readlane_b32 s30, v62, 15
-; SI-NEXT: v_or_b32_e32 v11, v11, v39
+; SI-NEXT: v_readlane_b32 s30, v61, 12
+; SI-NEXT: v_or_b32_e32 v1, v1, v53
+; SI-NEXT: v_or_b32_e32 v3, v3, v52
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
+; SI-NEXT: v_or_b32_e32 v7, v7, v50
+; SI-NEXT: v_or_b32_e32 v9, v9, v49
+; SI-NEXT: v_or_b32_e32 v11, v11, v48
; SI-NEXT: v_or_b32_e32 v13, v13, v38
; SI-NEXT: v_or_b32_e32 v15, v15, v37
; SI-NEXT: v_or_b32_e32 v17, v17, v36
@@ -17692,24 +17669,21 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v25, v25, v32
; SI-NEXT: v_or_b32_e32 v27, v27, v31
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_readlane_b32 s31, v62, 16
-; SI-NEXT: v_readlane_b32 s64, v62, 14
-; SI-NEXT: v_readlane_b32 s55, v62, 13
-; SI-NEXT: v_readlane_b32 s54, v62, 12
-; SI-NEXT: v_readlane_b32 s53, v62, 11
-; SI-NEXT: v_readlane_b32 s52, v62, 10
-; SI-NEXT: v_readlane_b32 s51, v62, 9
-; SI-NEXT: v_readlane_b32 s50, v62, 8
-; SI-NEXT: v_readlane_b32 s49, v62, 7
-; SI-NEXT: v_readlane_b32 s48, v62, 6
-; SI-NEXT: v_readlane_b32 s39, v62, 5
-; SI-NEXT: v_readlane_b32 s38, v62, 4
-; SI-NEXT: v_readlane_b32 s37, v62, 3
-; SI-NEXT: v_readlane_b32 s36, v62, 2
-; SI-NEXT: v_readlane_b32 s35, v62, 1
-; SI-NEXT: v_readlane_b32 s34, v62, 0
+; SI-NEXT: v_readlane_b32 s31, v61, 13
+; SI-NEXT: v_readlane_b32 s53, v61, 11
+; SI-NEXT: v_readlane_b32 s52, v61, 10
+; SI-NEXT: v_readlane_b32 s51, v61, 9
+; SI-NEXT: v_readlane_b32 s50, v61, 8
+; SI-NEXT: v_readlane_b32 s49, v61, 7
+; SI-NEXT: v_readlane_b32 s48, v61, 6
+; SI-NEXT: v_readlane_b32 s39, v61, 5
+; SI-NEXT: v_readlane_b32 s38, v61, 4
+; SI-NEXT: v_readlane_b32 s37, v61, 3
+; SI-NEXT: v_readlane_b32 s36, v61, 2
+; SI-NEXT: v_readlane_b32 s35, v61, 1
+; SI-NEXT: v_readlane_b32 s34, v61, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -20351,24 +20325,24 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s93, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
; SI-NEXT: v_readfirstlane_b32 s31, v3
-; SI-NEXT: v_readfirstlane_b32 s68, v2
-; SI-NEXT: v_readfirstlane_b32 s71, v1
-; SI-NEXT: v_readfirstlane_b32 s82, v0
+; SI-NEXT: v_readfirstlane_b32 s96, v2
+; SI-NEXT: v_readfirstlane_b32 s68, v1
+; SI-NEXT: v_readfirstlane_b32 s71, v0
; SI-NEXT: s_lshr_b32 s90, s29, 16
; SI-NEXT: s_lshr_b32 s92, s28, 16
; SI-NEXT: s_lshr_b32 s94, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
-; SI-NEXT: s_lshr_b32 s80, s23, 16
-; SI-NEXT: s_lshr_b32 s83, s22, 16
-; SI-NEXT: s_lshr_b32 s84, s21, 16
-; SI-NEXT: s_lshr_b32 s85, s20, 16
-; SI-NEXT: s_lshr_b32 s86, s19, 16
-; SI-NEXT: s_lshr_b32 s87, s18, 16
-; SI-NEXT: s_lshr_b32 s96, s17, 16
-; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s87, s24, 16
+; SI-NEXT: s_lshr_b32 s69, s23, 16
+; SI-NEXT: s_lshr_b32 s80, s22, 16
+; SI-NEXT: s_lshr_b32 s81, s21, 16
+; SI-NEXT: s_lshr_b32 s82, s20, 16
+; SI-NEXT: s_lshr_b32 s83, s19, 16
+; SI-NEXT: s_lshr_b32 s84, s18, 16
+; SI-NEXT: s_lshr_b32 s85, s17, 16
+; SI-NEXT: s_lshr_b32 s86, s16, 16
+; SI-NEXT: s_lshr_b32 s97, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -20381,62 +20355,63 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: s_lshr_b32 s91, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
; SI-NEXT: s_lshr_b32 s30, s31, 16
-; SI-NEXT: s_lshr_b32 s35, s68, 16
+; SI-NEXT: s_lshr_b32 s35, s96, 16
+; SI-NEXT: s_lshr_b32 s4, s68, 16
; SI-NEXT: s_lshr_b32 s70, s71, 16
-; SI-NEXT: s_lshr_b32 s81, s82, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB31_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s86, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s84, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s83, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s96, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s41, s85, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s82, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s81, 16
+; SI-NEXT: s_or_b32 s41, s5, s6
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s42, s5, s6
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s43, s5, s6
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s87, 16
+; SI-NEXT: s_or_b32 s44, s5, s6
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s34, 16
+; SI-NEXT: s_or_b32 s45, s5, s6
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s6, vcc_hi, 16
+; SI-NEXT: s_or_b32 s46, s5, s6
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s94, 16
+; SI-NEXT: s_or_b32 s47, s5, s6
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s92, 16
+; SI-NEXT: s_or_b32 s48, s5, s6
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s90, 16
+; SI-NEXT: s_or_b32 s49, s5, s6
+; SI-NEXT: s_and_b32 s5, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s50, s5, s6
+; SI-NEXT: s_and_b32 s5, s68, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s51, s5, s4
+; SI-NEXT: s_and_b32 s4, s96, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s31, 0xffff
@@ -20476,11 +20451,12 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB31_3
; SI-NEXT: .LBB31_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB31_3: ; %Flow
@@ -20491,47 +20467,47 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -20558,24 +20534,24 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_add_i32 s50, s4, 0x30000
+; SI-NEXT: s_add_i32 s49, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s71, 0xffff
; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s50, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s4, s96, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_add_i32 s4, s31, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
@@ -20636,7 +20612,7 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: .LBB31_5: ; %end
@@ -20749,237 +20725,166 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; VI-NEXT: v_writelane_b32 v30, s87, 29
; VI-NEXT: v_writelane_b32 v30, s30, 30
; VI-NEXT: v_writelane_b32 v30, s31, 31
-; VI-NEXT: s_lshr_b32 s14, s20, 16
+; VI-NEXT: v_readfirstlane_b32 s7, v15
+; VI-NEXT: s_lshr_b32 s72, s7, 16
+; VI-NEXT: v_readfirstlane_b32 s9, v14
; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
-; VI-NEXT: s_lshr_b32 s42, s19, 16
-; VI-NEXT: v_writelane_b32 v31, s14, 0
-; VI-NEXT: s_lshr_b32 s43, s18, 16
-; VI-NEXT: v_readfirstlane_b32 s6, v15
-; VI-NEXT: v_readfirstlane_b32 s8, v14
-; VI-NEXT: v_readfirstlane_b32 s10, v13
-; VI-NEXT: v_readfirstlane_b32 s12, v12
-; VI-NEXT: v_readfirstlane_b32 s87, v11
-; VI-NEXT: v_readfirstlane_b32 s15, v10
-; VI-NEXT: v_readfirstlane_b32 s72, v9
+; VI-NEXT: s_lshr_b32 s64, s9, 16
+; VI-NEXT: v_readfirstlane_b32 s11, v13
+; VI-NEXT: v_writelane_b32 v31, s72, 0
+; VI-NEXT: s_lshr_b32 s63, s11, 16
+; VI-NEXT: v_readfirstlane_b32 s13, v12
+; VI-NEXT: v_writelane_b32 v31, s64, 1
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: v_readfirstlane_b32 s15, v11
+; VI-NEXT: v_readfirstlane_b32 s73, v10
+; VI-NEXT: v_readfirstlane_b32 s75, v9
; VI-NEXT: v_readfirstlane_b32 s77, v8
; VI-NEXT: v_readfirstlane_b32 s79, v7
; VI-NEXT: v_readfirstlane_b32 s89, v6
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v5
; VI-NEXT: v_readfirstlane_b32 s34, v4
-; VI-NEXT: v_readfirstlane_b32 s69, v3
-; VI-NEXT: v_readfirstlane_b32 s80, v2
-; VI-NEXT: v_readfirstlane_b32 s83, v1
-; VI-NEXT: v_readfirstlane_b32 s86, v0
-; VI-NEXT: v_writelane_b32 v31, s42, 1
-; VI-NEXT: s_lshr_b32 s35, s29, 16
-; VI-NEXT: s_lshr_b32 s68, s28, 16
-; VI-NEXT: s_lshr_b32 s70, s27, 16
-; VI-NEXT: s_lshr_b32 s81, s26, 16
-; VI-NEXT: s_lshr_b32 s84, s25, 16
-; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: s_lshr_b32 s11, s23, 16
-; VI-NEXT: s_lshr_b32 s73, s22, 16
-; VI-NEXT: s_lshr_b32 s75, s21, 16
-; VI-NEXT: s_lshr_b32 s41, s17, 16
-; VI-NEXT: s_lshr_b32 s5, s16, 16
-; VI-NEXT: s_lshr_b32 s66, s6, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s10, 16
-; VI-NEXT: s_lshr_b32 s78, s12, 16
-; VI-NEXT: s_lshr_b32 s88, s87, 16
-; VI-NEXT: s_lshr_b32 s90, s15, 16
-; VI-NEXT: s_lshr_b32 s91, s72, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s77, 16
-; VI-NEXT: s_lshr_b32 s30, s79, 16
-; VI-NEXT: s_lshr_b32 s31, s89, 16
-; VI-NEXT: s_lshr_b32 s67, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s71, s34, 16
-; VI-NEXT: s_lshr_b32 s82, s69, 16
-; VI-NEXT: s_lshr_b32 s85, s80, 16
-; VI-NEXT: s_lshr_b32 s9, s83, 16
-; VI-NEXT: s_lshr_b32 s13, s86, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v16
-; VI-NEXT: v_writelane_b32 v31, s43, 2
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_writelane_b32 v31, s41, 3
-; VI-NEXT: v_writelane_b32 v31, s5, 4
+; VI-NEXT: v_readfirstlane_b32 s67, v3
+; VI-NEXT: v_readfirstlane_b32 s69, v2
+; VI-NEXT: v_readfirstlane_b32 s80, v1
+; VI-NEXT: v_readfirstlane_b32 s83, v0
+; VI-NEXT: v_writelane_b32 v31, s63, 2
+; VI-NEXT: s_lshr_b32 s90, s29, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 16
+; VI-NEXT: s_lshr_b32 s31, s27, 16
+; VI-NEXT: s_lshr_b32 s35, s26, 16
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: s_lshr_b32 s70, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s84, s22, 16
+; VI-NEXT: s_lshr_b32 s85, s21, 16
+; VI-NEXT: s_lshr_b32 s86, s20, 16
+; VI-NEXT: s_lshr_b32 s87, s19, 16
+; VI-NEXT: s_lshr_b32 s6, s18, 16
+; VI-NEXT: s_lshr_b32 s8, s17, 16
+; VI-NEXT: s_lshr_b32 s10, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s15, 16
+; VI-NEXT: s_lshr_b32 s60, s73, 16
+; VI-NEXT: s_lshr_b32 s59, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s78, s79, 16
+; VI-NEXT: s_lshr_b32 s88, s89, 16
+; VI-NEXT: s_lshr_b32 s91, vcc_hi, 16
+; VI-NEXT: s_lshr_b32 s30, s34, 16
+; VI-NEXT: s_lshr_b32 s66, s67, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: s_lshr_b32 s71, s80, 16
+; VI-NEXT: s_lshr_b32 s82, s83, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v16
+; VI-NEXT: v_writelane_b32 v31, s62, 3
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v31, s61, 4
+; VI-NEXT: v_writelane_b32 v31, s60, 5
; VI-NEXT: s_cbranch_scc0 .LBB31_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s5, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s43, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s42, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s41, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s14, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s75, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s73, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s11, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s12, s10, 16
+; VI-NEXT: s_or_b32 s36, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s12, s6, 16
+; VI-NEXT: s_or_b32 s38, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s12, s87, 16
+; VI-NEXT: s_and_b32 s14, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s8, 16
+; VI-NEXT: s_or_b32 s39, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s12, s86, 16
+; VI-NEXT: s_or_b32 s37, s14, s40
+; VI-NEXT: s_or_b32 s40, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s12, s85, 16
+; VI-NEXT: s_or_b32 s41, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s12, s84, 16
+; VI-NEXT: s_or_b32 s42, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s12, s81, 16
+; VI-NEXT: s_or_b32 s43, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s12, s70, 16
+; VI-NEXT: s_or_b32 s44, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_mov_b32 s12, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s45, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s86
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s83
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s80
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s67
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s89
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s79
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s72
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
+; VI-NEXT: s_lshl_b32 s5, s59, 16
+; VI-NEXT: s_mov_b32 s74, s59
; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s87
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s63, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s64, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s65, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB31_3
; VI-NEXT: .LBB31_2:
-; VI-NEXT: v_writelane_b32 v31, s26, 5
-; VI-NEXT: s_mov_b32 s26, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s27
-; VI-NEXT: s_mov_b32 s27, s89
-; VI-NEXT: s_mov_b32 s89, s28
-; VI-NEXT: s_mov_b32 s28, s79
-; VI-NEXT: s_mov_b32 s79, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s77, s13
-; VI-NEXT: s_mov_b32 s14, s12
-; VI-NEXT: s_mov_b32 s13, s11
-; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: s_mov_b32 s10, s8
-; VI-NEXT: s_mov_b32 s9, s7
-; VI-NEXT: s_mov_b32 s8, s6
-; VI-NEXT: s_mov_b32 s7, s85
-; VI-NEXT: s_mov_b32 s85, s82
-; VI-NEXT: s_mov_b32 s82, s71
-; VI-NEXT: s_mov_b32 s71, s68
-; VI-NEXT: s_mov_b32 s68, s35
-; VI-NEXT: s_mov_b32 s35, s31
-; VI-NEXT: s_mov_b32 s31, s30
-; VI-NEXT: s_mov_b32 s30, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s91
-; VI-NEXT: s_mov_b32 s91, s90
-; VI-NEXT: s_mov_b32 s90, s88
-; VI-NEXT: s_mov_b32 s88, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s66
-; VI-NEXT: s_mov_b32 s6, s75
-; VI-NEXT: s_mov_b32 s75, s72
-; VI-NEXT: s_mov_b32 s72, s73
-; VI-NEXT: s_mov_b32 s73, s15
-; VI-NEXT: s_mov_b32 s15, s87
-; VI-NEXT: s_mov_b32 s87, s84
-; VI-NEXT: s_mov_b32 s84, s81
-; VI-NEXT: s_mov_b32 s81, s70
-; VI-NEXT: s_mov_b32 s70, s67
+; VI-NEXT: s_mov_b32 s74, s59
+; VI-NEXT: s_mov_b32 s72, s66
+; VI-NEXT: s_mov_b32 s14, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s12, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s70
-; VI-NEXT: s_mov_b32 s70, s81
-; VI-NEXT: s_mov_b32 s81, s84
-; VI-NEXT: s_mov_b32 s84, s87
-; VI-NEXT: s_mov_b32 s87, s15
-; VI-NEXT: s_mov_b32 s15, s73
-; VI-NEXT: s_mov_b32 s73, s72
-; VI-NEXT: s_mov_b32 s72, s75
-; VI-NEXT: s_mov_b32 s75, s6
-; VI-NEXT: s_mov_b32 s66, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s88
-; VI-NEXT: s_mov_b32 s88, s90
-; VI-NEXT: s_mov_b32 s90, s91
-; VI-NEXT: s_mov_b32 s91, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s30
-; VI-NEXT: s_mov_b32 s30, s31
-; VI-NEXT: s_mov_b32 s31, s35
-; VI-NEXT: s_mov_b32 s35, s68
-; VI-NEXT: s_mov_b32 s68, s71
-; VI-NEXT: s_mov_b32 s71, s82
-; VI-NEXT: s_mov_b32 s82, s85
-; VI-NEXT: s_mov_b32 s85, s7
-; VI-NEXT: s_mov_b32 s6, s8
-; VI-NEXT: s_mov_b32 s7, s9
-; VI-NEXT: s_mov_b32 s8, s10
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s11, s13
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s13, s77
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s79
-; VI-NEXT: s_mov_b32 s79, s28
-; VI-NEXT: s_mov_b32 s28, s89
-; VI-NEXT: s_mov_b32 s89, s27
-; VI-NEXT: s_mov_b32 s27, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s26
-; VI-NEXT: v_readlane_b32 s26, v31, 5
+; VI-NEXT: s_mov_b32 s67, s14
+; VI-NEXT: s_mov_b32 s66, s72
; VI-NEXT: .LBB31_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -20987,158 +20892,159 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB31_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_add_i32 s17, s17, 3
-; VI-NEXT: v_readlane_b32 s14, v31, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s14, s14, 16
-; VI-NEXT: s_or_b32 s5, s14, s5
-; VI-NEXT: s_add_i32 s37, s5, 0x30000
+; VI-NEXT: s_lshl_b32 s8, s8, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s36, s4, 0x30000
+; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s87, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s11, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s86, s86, 3
-; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s86, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s83, s83, 3
-; VI-NEXT: s_add_i32 s50, s4, 0x30000
+; VI-NEXT: s_add_i32 s49, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s83, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s9, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s80, s80, 3
-; VI-NEXT: s_add_i32 s51, s4, 0x30000
+; VI-NEXT: s_add_i32 s50, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s80, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s69, s69, 3
-; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s51, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s4, s5, s4
+; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s4, s67, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_add_i32 s4, s34, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s89, s89, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s89, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s79, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s72, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s15, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 5
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s87, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s12, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s10, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s8, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s6, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s64, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s65, s4, 0x30000
; VI-NEXT: .LBB31_5: ; %end
@@ -22567,39 +22473,35 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill
-; SI-NEXT: v_writelane_b32 v62, s34, 0
-; SI-NEXT: v_writelane_b32 v62, s35, 1
-; SI-NEXT: v_writelane_b32 v62, s36, 2
-; SI-NEXT: v_writelane_b32 v62, s37, 3
-; SI-NEXT: v_writelane_b32 v62, s38, 4
-; SI-NEXT: v_writelane_b32 v62, s39, 5
-; SI-NEXT: v_writelane_b32 v62, s48, 6
-; SI-NEXT: v_writelane_b32 v62, s49, 7
-; SI-NEXT: v_writelane_b32 v62, s50, 8
-; SI-NEXT: v_writelane_b32 v62, s51, 9
-; SI-NEXT: v_writelane_b32 v62, s52, 10
-; SI-NEXT: v_writelane_b32 v62, s53, 11
-; SI-NEXT: v_writelane_b32 v62, s54, 12
-; SI-NEXT: v_writelane_b32 v62, s55, 13
-; SI-NEXT: v_writelane_b32 v62, s64, 14
-; SI-NEXT: v_writelane_b32 v62, s30, 15
-; SI-NEXT: v_writelane_b32 v62, s31, 16
+; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: v_writelane_b32 v61, s34, 0
+; SI-NEXT: v_writelane_b32 v61, s35, 1
+; SI-NEXT: v_writelane_b32 v61, s36, 2
+; SI-NEXT: v_writelane_b32 v61, s37, 3
+; SI-NEXT: v_writelane_b32 v61, s38, 4
+; SI-NEXT: v_writelane_b32 v61, s39, 5
+; SI-NEXT: v_writelane_b32 v61, s48, 6
+; SI-NEXT: v_writelane_b32 v61, s49, 7
+; SI-NEXT: v_writelane_b32 v61, s50, 8
+; SI-NEXT: v_writelane_b32 v61, s51, 9
+; SI-NEXT: v_writelane_b32 v61, s52, 10
+; SI-NEXT: v_writelane_b32 v61, s53, 11
+; SI-NEXT: v_writelane_b32 v61, s30, 12
+; SI-NEXT: v_writelane_b32 v61, s31, 13
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -22620,24 +22522,27 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s42, v0
; SI-NEXT: s_cbranch_scc0 .LBB33_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s64, s5, 16
-; SI-NEXT: s_lshr_b32 s55, s7, 16
-; SI-NEXT: s_lshr_b32 s54, s9, 16
-; SI-NEXT: s_lshr_b32 s53, s11, 16
-; SI-NEXT: s_lshr_b32 s52, s13, 16
-; SI-NEXT: s_lshr_b32 s51, s15, 16
-; SI-NEXT: s_lshr_b32 s50, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s48, s29, 16
-; SI-NEXT: s_lshr_b32 s39, s27, 16
-; SI-NEXT: s_lshr_b32 s38, s25, 16
-; SI-NEXT: s_lshr_b32 s37, s23, 16
-; SI-NEXT: s_lshr_b32 s36, s21, 16
-; SI-NEXT: s_lshr_b32 s35, s19, 16
-; SI-NEXT: s_lshr_b32 s34, s17, 16
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: s_lshr_b32 s47, s17, 16
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16
+; SI-NEXT: s_lshr_b32 s56, s5, 16
+; SI-NEXT: s_mov_b32 vcc_hi, s46
+; SI-NEXT: s_mov_b32 s45, s47
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b32 s53, s7, 16
+; SI-NEXT: s_lshr_b32 s52, s9, 16
+; SI-NEXT: s_lshr_b32 s51, s11, 16
+; SI-NEXT: s_lshr_b32 s50, s13, 16
+; SI-NEXT: s_lshr_b32 s49, s15, 16
+; SI-NEXT: s_lshr_b32 s48, s41, 16
+; SI-NEXT: s_lshr_b32 s39, s43, 16
+; SI-NEXT: s_lshr_b32 s38, s29, 16
+; SI-NEXT: s_lshr_b32 s37, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s25, 16
+; SI-NEXT: s_lshr_b32 s35, s23, 16
+; SI-NEXT: s_lshr_b32 s34, s21, 16
+; SI-NEXT: s_mov_b32 s47, s56
; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16
@@ -22655,39 +22560,39 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: .LBB33_2:
; SI-NEXT: s_mov_b64 s[30:31], -1
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr35
+; SI-NEXT: ; implicit-def: $vcc_hi
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr37
+; SI-NEXT: ; implicit-def: $sgpr35
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr51
+; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr44
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $vcc_lo
; SI-NEXT: .LBB33_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
-; SI-NEXT: s_cselect_b32 s45, 1, 0
-; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: s_cselect_b32 s57, 1, 0
+; SI-NEXT: s_cmp_lg_u32 s57, 1
; SI-NEXT: s_cbranch_scc1 .LBB33_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v29, s5, 1.0
@@ -22698,65 +22603,61 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v25, s9, 1.0
; SI-NEXT: v_add_f32_e64 v24, s8, 1.0
; SI-NEXT: v_lshr_b64 v[31:32], v[26:27], 16
-; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
-; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
; SI-NEXT: v_add_f32_e64 v23, s11, 1.0
; SI-NEXT: v_add_f32_e64 v22, s10, 1.0
; SI-NEXT: v_lshr_b64 v[32:33], v[24:25], 16
-; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
-; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
; SI-NEXT: v_add_f32_e64 v21, s13, 1.0
; SI-NEXT: v_add_f32_e64 v20, s12, 1.0
; SI-NEXT: v_lshr_b64 v[33:34], v[22:23], 16
-; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16
-; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
-; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
; SI-NEXT: v_add_f32_e64 v19, s15, 1.0
; SI-NEXT: v_add_f32_e64 v18, s14, 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16
-; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
; SI-NEXT: v_add_f32_e64 v17, s41, 1.0
; SI-NEXT: v_add_f32_e64 v16, s40, 1.0
; SI-NEXT: v_lshr_b64 v[35:36], v[18:19], 16
-; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16
-; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
; SI-NEXT: v_add_f32_e64 v15, s43, 1.0
; SI-NEXT: v_add_f32_e64 v14, s42, 1.0
; SI-NEXT: v_lshr_b64 v[36:37], v[16:17], 16
-; SI-NEXT: v_lshr_b64 v[51:52], v[4:5], 16
-; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
; SI-NEXT: v_add_f32_e64 v13, s29, 1.0
; SI-NEXT: v_add_f32_e64 v12, s28, 1.0
; SI-NEXT: v_lshr_b64 v[37:38], v[14:15], 16
-; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
+; SI-NEXT: v_add_f32_e64 v11, s27, 1.0
+; SI-NEXT: v_add_f32_e64 v10, s26, 1.0
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v27
; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16
+; SI-NEXT: v_add_f32_e64 v9, s25, 1.0
+; SI-NEXT: v_add_f32_e64 v8, s24, 1.0
+; SI-NEXT: v_mov_b32_e32 v39, v48
+; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16
+; SI-NEXT: v_add_f32_e64 v7, s23, 1.0
+; SI-NEXT: v_add_f32_e64 v6, s22, 1.0
+; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16
+; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
+; SI-NEXT: v_add_f32_e64 v4, s20, 1.0
+; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16
+; SI-NEXT: v_add_f32_e64 v3, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v2, s18, 1.0
+; SI-NEXT: v_lshr_b64 v[51:52], v[4:5], 16
+; SI-NEXT: v_add_f32_e64 v1, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v0, s16, 1.0
+; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v21
; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v27
-; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23
+; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v7
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v5
+; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; SI-NEXT: v_mov_b32_e32 v54, v60
; SI-NEXT: s_branch .LBB33_6
; SI-NEXT: .LBB33_5:
; SI-NEXT: v_mov_b32_e32 v0, s16
@@ -22789,22 +22690,22 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v61, s34
-; SI-NEXT: v_mov_b32_e32 v60, s35
-; SI-NEXT: v_mov_b32_e32 v59, s36
-; SI-NEXT: v_mov_b32_e32 v58, s37
-; SI-NEXT: v_mov_b32_e32 v57, s38
-; SI-NEXT: v_mov_b32_e32 v56, s39
-; SI-NEXT: v_mov_b32_e32 v47, s48
-; SI-NEXT: v_mov_b32_e32 v46, s49
-; SI-NEXT: v_mov_b32_e32 v45, s50
-; SI-NEXT: v_mov_b32_e32 v44, s51
-; SI-NEXT: v_mov_b32_e32 v43, s52
-; SI-NEXT: v_mov_b32_e32 v42, s53
-; SI-NEXT: v_mov_b32_e32 v41, s54
-; SI-NEXT: v_mov_b32_e32 v40, s55
-; SI-NEXT: v_mov_b32_e32 v55, s64
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v59, s45
+; SI-NEXT: v_mov_b32_e32 v58, vcc_hi
+; SI-NEXT: v_mov_b32_e32 v57, s34
+; SI-NEXT: v_mov_b32_e32 v56, s35
+; SI-NEXT: v_mov_b32_e32 v47, s36
+; SI-NEXT: v_mov_b32_e32 v46, s37
+; SI-NEXT: v_mov_b32_e32 v45, s38
+; SI-NEXT: v_mov_b32_e32 v44, s39
+; SI-NEXT: v_mov_b32_e32 v43, s48
+; SI-NEXT: v_mov_b32_e32 v42, s49
+; SI-NEXT: v_mov_b32_e32 v54, s50
+; SI-NEXT: v_mov_b32_e32 v41, s51
+; SI-NEXT: v_mov_b32_e32 v40, s52
+; SI-NEXT: v_mov_b32_e32 v39, s53
+; SI-NEXT: v_mov_b32_e32 v55, s47
; SI-NEXT: v_mov_b32_e32 v30, vcc_lo
; SI-NEXT: v_mov_b32_e32 v31, s44
; SI-NEXT: v_mov_b32_e32 v32, s46
@@ -22821,37 +22722,17 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v52, s92
; SI-NEXT: v_mov_b32_e32 v53, s94
; SI-NEXT: .LBB33_6: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: v_or_b32_e32 v0, v0, v39
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61
-; SI-NEXT: v_or_b32_e32 v1, v1, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v2, v2, v39
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60
-; SI-NEXT: v_or_b32_e32 v3, v3, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v39
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59
-; SI-NEXT: v_or_b32_e32 v5, v5, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v6, v6, v39
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58
-; SI-NEXT: v_or_b32_e32 v7, v7, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v8, v8, v39
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57
-; SI-NEXT: v_or_b32_e32 v9, v9, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
@@ -22861,62 +22742,82 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; SI-NEXT: v_or_b32_e32 v10, v10, v39
-; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56
+; SI-NEXT: v_or_b32_e32 v0, v0, v53
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v59
+; SI-NEXT: v_or_b32_e32 v2, v2, v52
+; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v58
+; SI-NEXT: v_or_b32_e32 v4, v4, v51
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v57
+; SI-NEXT: v_or_b32_e32 v6, v6, v50
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v56
+; SI-NEXT: v_or_b32_e32 v8, v8, v49
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v47
+; SI-NEXT: v_or_b32_e32 v10, v10, v48
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v46
; SI-NEXT: v_or_b32_e32 v12, v12, v38
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45
; SI-NEXT: v_or_b32_e32 v14, v14, v37
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46
+; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v44
; SI-NEXT: v_or_b32_e32 v16, v16, v36
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45
+; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v43
; SI-NEXT: v_or_b32_e32 v18, v18, v35
-; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44
-; SI-NEXT: v_or_b32_e32 v20, v20, v34
-; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT: v_or_b32_e32 v22, v22, v33
-; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41
; SI-NEXT: v_or_b32_e32 v24, v24, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41
-; SI-NEXT: v_or_b32_e32 v26, v26, v31
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19
+; SI-NEXT: v_or_b32_e32 v20, v20, v34
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v54
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25
+; SI-NEXT: v_or_b32_e32 v26, v26, v31
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v39
; SI-NEXT: v_or_b32_e32 v28, v28, v30
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55
-; SI-NEXT: v_readlane_b32 s30, v62, 15
-; SI-NEXT: v_or_b32_e32 v11, v11, v39
+; SI-NEXT: v_readlane_b32 s30, v61, 12
+; SI-NEXT: v_or_b32_e32 v1, v1, v53
+; SI-NEXT: v_or_b32_e32 v3, v3, v52
+; SI-NEXT: v_or_b32_e32 v5, v5, v51
+; SI-NEXT: v_or_b32_e32 v7, v7, v50
+; SI-NEXT: v_or_b32_e32 v9, v9, v49
+; SI-NEXT: v_or_b32_e32 v11, v11, v48
; SI-NEXT: v_or_b32_e32 v13, v13, v38
; SI-NEXT: v_or_b32_e32 v15, v15, v37
; SI-NEXT: v_or_b32_e32 v17, v17, v36
@@ -22926,24 +22827,21 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v25, v25, v32
; SI-NEXT: v_or_b32_e32 v27, v27, v31
; SI-NEXT: v_or_b32_e32 v29, v29, v30
-; SI-NEXT: v_readlane_b32 s31, v62, 16
-; SI-NEXT: v_readlane_b32 s64, v62, 14
-; SI-NEXT: v_readlane_b32 s55, v62, 13
-; SI-NEXT: v_readlane_b32 s54, v62, 12
-; SI-NEXT: v_readlane_b32 s53, v62, 11
-; SI-NEXT: v_readlane_b32 s52, v62, 10
-; SI-NEXT: v_readlane_b32 s51, v62, 9
-; SI-NEXT: v_readlane_b32 s50, v62, 8
-; SI-NEXT: v_readlane_b32 s49, v62, 7
-; SI-NEXT: v_readlane_b32 s48, v62, 6
-; SI-NEXT: v_readlane_b32 s39, v62, 5
-; SI-NEXT: v_readlane_b32 s38, v62, 4
-; SI-NEXT: v_readlane_b32 s37, v62, 3
-; SI-NEXT: v_readlane_b32 s36, v62, 2
-; SI-NEXT: v_readlane_b32 s35, v62, 1
-; SI-NEXT: v_readlane_b32 s34, v62, 0
+; SI-NEXT: v_readlane_b32 s31, v61, 13
+; SI-NEXT: v_readlane_b32 s53, v61, 11
+; SI-NEXT: v_readlane_b32 s52, v61, 10
+; SI-NEXT: v_readlane_b32 s51, v61, 9
+; SI-NEXT: v_readlane_b32 s50, v61, 8
+; SI-NEXT: v_readlane_b32 s49, v61, 7
+; SI-NEXT: v_readlane_b32 s48, v61, 6
+; SI-NEXT: v_readlane_b32 s39, v61, 5
+; SI-NEXT: v_readlane_b32 s38, v61, 4
+; SI-NEXT: v_readlane_b32 s37, v61, 3
+; SI-NEXT: v_readlane_b32 s36, v61, 2
+; SI-NEXT: v_readlane_b32 s35, v61, 1
+; SI-NEXT: v_readlane_b32 s34, v61, 0
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -25730,13 +25628,13 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s92, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: v_readfirstlane_b32 s31, v1
-; SI-NEXT: v_readfirstlane_b32 s68, v0
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: v_readfirstlane_b32 s35, v0
; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; SI-NEXT: s_lshr_b32 s34, s28, 16
-; SI-NEXT: s_lshr_b32 s69, s27, 16
-; SI-NEXT: s_lshr_b32 s71, s26, 16
-; SI-NEXT: s_lshr_b32 s80, s25, 16
+; SI-NEXT: s_lshr_b32 s31, s28, 16
+; SI-NEXT: s_lshr_b32 s68, s27, 16
+; SI-NEXT: s_lshr_b32 s70, s26, 16
+; SI-NEXT: s_lshr_b32 s71, s25, 16
; SI-NEXT: s_lshr_b32 s81, s24, 16
; SI-NEXT: s_lshr_b32 s82, s23, 16
; SI-NEXT: s_lshr_b32 s83, s22, 16
@@ -25746,7 +25644,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s87, s18, 16
; SI-NEXT: s_lshr_b32 s96, s17, 16
; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s80, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -25759,64 +25657,65 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: s_lshr_b32 s91, s90, 16
; SI-NEXT: s_lshr_b32 s93, s92, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; SI-NEXT: s_lshr_b32 s35, s31, 16
-; SI-NEXT: s_lshr_b32 s70, s68, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; SI-NEXT: s_lshr_b32 s34, s30, 16
+; SI-NEXT: s_lshr_b32 s69, s35, 16
+; SI-NEXT: v_readfirstlane_b32 s5, v16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB35_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s97, 16
+; SI-NEXT: s_or_b32 s36, s5, s7
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s87, 16
+; SI-NEXT: s_or_b32 s38, s5, s7
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s86, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
; SI-NEXT: s_lshl_b32 s41, s96, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_or_b32 s39, s5, s7
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s85, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s35, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, vcc_lo, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
-; SI-NEXT: s_or_b32 s52, s4, s5
+; SI-NEXT: s_or_b32 s40, s5, s7
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s84, 16
+; SI-NEXT: s_or_b32 s41, s5, s7
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s83, 16
+; SI-NEXT: s_or_b32 s42, s5, s7
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s82, 16
+; SI-NEXT: s_or_b32 s43, s5, s7
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s81, 16
+; SI-NEXT: s_or_b32 s44, s5, s7
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s71, 16
+; SI-NEXT: s_or_b32 s45, s5, s7
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s70, 16
+; SI-NEXT: s_or_b32 s46, s5, s7
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s68, 16
+; SI-NEXT: s_or_b32 s47, s5, s7
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s31, 16
+; SI-NEXT: s_or_b32 s48, s5, s7
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s7, vcc_hi, 16
+; SI-NEXT: s_or_b32 s49, s5, s7
+; SI-NEXT: s_and_b32 s5, s35, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s69, 16
+; SI-NEXT: s_or_b32 s50, s5, s7
+; SI-NEXT: s_and_b32 s5, s30, 0xffff
+; SI-NEXT: s_lshl_b32 s7, s34, 16
+; SI-NEXT: s_or_b32 s51, s5, s7
+; SI-NEXT: s_and_b32 s5, vcc_lo, 0xffff
+; SI-NEXT: s_mov_b32 s7, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s52, s5, s4
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s53, s4, s5
@@ -25854,11 +25753,12 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: s_lshl_b32 s5, s9, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s7, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB35_3
; SI-NEXT: .LBB35_2:
+; SI-NEXT: s_mov_b32 s7, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB35_3: ; %Flow
@@ -25936,7 +25836,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v10, s24
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s80
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s71
; SI-NEXT: v_cvt_f32_f16_e32 v11, s25
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
@@ -25945,11 +25845,11 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s70
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_or_b32_e32 v9, v11, v9
; SI-NEXT: v_cvt_f32_f16_e32 v11, s26
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s68
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
@@ -25960,7 +25860,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s31
; SI-NEXT: v_cvt_f32_f16_e32 v14, s28
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
@@ -25973,7 +25873,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_or_b32_e32 v12, v14, v12
; SI-NEXT: v_cvt_f32_f16_e32 v14, s29
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s70
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s69
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
@@ -25981,11 +25881,11 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s35
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s35
-; SI-NEXT: v_cvt_f32_f16_e32 v17, s31
+; SI-NEXT: v_cvt_f32_f16_e32 v15, s34
+; SI-NEXT: v_cvt_f32_f16_e32 v17, s30
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
@@ -25993,7 +25893,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT: v_cvt_f16_f32_e32 v17, v17
; SI-NEXT: v_or_b32_e32 v14, v16, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v16, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s7
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_or_b32_e32 v15, v17, v15
; SI-NEXT: v_cvt_f32_f16_e32 v17, vcc_lo
@@ -26093,7 +25993,7 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT: v_or_b32_e32 v27, v29, v27
; SI-NEXT: v_cvt_f32_f16_e32 v29, s8
-; SI-NEXT: v_cvt_f32_f16_e32 v30, s7
+; SI-NEXT: v_cvt_f32_f16_e32 v30, s80
; SI-NEXT: v_cvt_f32_f16_e32 v31, s6
; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT: v_cvt_f16_f32_e32 v28, v28
@@ -26239,117 +26139,118 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; VI-NEXT: v_readfirstlane_b32 s78, v7
; VI-NEXT: v_readfirstlane_b32 s89, v6
; VI-NEXT: v_readfirstlane_b32 vcc_lo, v5
-; VI-NEXT: v_readfirstlane_b32 s31, v4
-; VI-NEXT: v_readfirstlane_b32 s69, v3
-; VI-NEXT: v_readfirstlane_b32 s80, v2
-; VI-NEXT: v_readfirstlane_b32 s83, v1
-; VI-NEXT: v_readfirstlane_b32 s86, v0
+; VI-NEXT: v_readfirstlane_b32 s30, v4
+; VI-NEXT: v_readfirstlane_b32 s68, v3
+; VI-NEXT: v_readfirstlane_b32 s71, v2
+; VI-NEXT: v_readfirstlane_b32 s82, v1
+; VI-NEXT: v_readfirstlane_b32 s85, v0
; VI-NEXT: v_writelane_b32 v33, s62, 2
-; VI-NEXT: s_lshr_b32 s56, s29, 16
-; VI-NEXT: s_lshr_b32 s77, s28, 16
+; VI-NEXT: s_lshr_b32 s73, s29, 16
+; VI-NEXT: s_lshr_b32 s56, s28, 16
; VI-NEXT: s_lshr_b32 vcc_hi, s27, 16
-; VI-NEXT: s_lshr_b32 s34, s26, 16
-; VI-NEXT: s_lshr_b32 s68, s25, 16
-; VI-NEXT: s_lshr_b32 s71, s24, 16
-; VI-NEXT: s_lshr_b32 s82, s23, 16
-; VI-NEXT: s_lshr_b32 s84, s22, 16
-; VI-NEXT: s_lshr_b32 s87, s21, 16
-; VI-NEXT: s_lshr_b32 s9, s20, 16
-; VI-NEXT: s_lshr_b32 s11, s19, 16
-; VI-NEXT: s_lshr_b32 s13, s18, 16
-; VI-NEXT: s_lshr_b32 s15, s17, 16
-; VI-NEXT: s_lshr_b32 s73, s16, 16
+; VI-NEXT: s_lshr_b32 s31, s26, 16
+; VI-NEXT: s_lshr_b32 s35, s25, 16
+; VI-NEXT: s_lshr_b32 s70, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s83, s22, 16
+; VI-NEXT: s_lshr_b32 s86, s21, 16
+; VI-NEXT: s_lshr_b32 s7, s20, 16
+; VI-NEXT: s_lshr_b32 s9, s19, 16
+; VI-NEXT: s_lshr_b32 s11, s18, 16
+; VI-NEXT: s_lshr_b32 s13, s17, 16
+; VI-NEXT: s_lshr_b32 s15, s16, 16
; VI-NEXT: s_lshr_b32 s65, s6, 16
; VI-NEXT: s_lshr_b32 s60, s72, 16
; VI-NEXT: s_lshr_b32 s59, s74, 16
; VI-NEXT: s_lshr_b32 s58, s76, 16
; VI-NEXT: s_lshr_b32 s57, s78, 16
-; VI-NEXT: s_lshr_b32 s88, s89, 16
-; VI-NEXT: s_lshr_b32 s30, vcc_lo, 16
-; VI-NEXT: s_lshr_b32 s35, s31, 16
-; VI-NEXT: s_lshr_b32 s70, s69, 16
-; VI-NEXT: s_lshr_b32 s81, s80, 16
-; VI-NEXT: s_lshr_b32 s85, s83, 16
-; VI-NEXT: s_lshr_b32 s7, s86, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v16
+; VI-NEXT: s_lshr_b32 s79, s89, 16
+; VI-NEXT: s_lshr_b32 s4, vcc_lo, 16
+; VI-NEXT: s_lshr_b32 s34, s30, 16
+; VI-NEXT: s_lshr_b32 s69, s68, 16
+; VI-NEXT: s_lshr_b32 s80, s71, 16
+; VI-NEXT: s_lshr_b32 s84, s82, 16
+; VI-NEXT: s_lshr_b32 s87, s85, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v16
; VI-NEXT: v_writelane_b32 v33, s61, 3
-; VI-NEXT: s_cmp_lg_u32 s4, 0
+; VI-NEXT: s_cmp_lg_u32 s5, 0
; VI-NEXT: v_writelane_b32 v33, s60, 4
; VI-NEXT: v_writelane_b32 v33, s59, 5
; VI-NEXT: s_cbranch_scc0 .LBB35_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s73, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s11, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s15, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s87, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s82, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s71, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s68, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s34, 16
-; VI-NEXT: s_or_b32 s46, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; VI-NEXT: s_or_b32 s47, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s77, 16
-; VI-NEXT: s_or_b32 s48, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s56, 16
-; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s86
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s83
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s80
-; VI-NEXT: s_lshl_b32 s5, s81, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s70, 16
-; VI-NEXT: s_or_b32 s53, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s31
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s54, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, vcc_lo
-; VI-NEXT: s_lshl_b32 s5, s30, 16
-; VI-NEXT: s_or_b32 s55, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s40, s15, 16
+; VI-NEXT: s_or_b32 s36, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s40, s11, 16
+; VI-NEXT: s_or_b32 s38, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s40, s9, 16
+; VI-NEXT: s_and_b32 s41, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s42, s13, 16
+; VI-NEXT: s_or_b32 s39, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s40, s7, 16
+; VI-NEXT: s_or_b32 s37, s41, s42
+; VI-NEXT: s_or_b32 s40, s5, s40
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s41, s86, 16
+; VI-NEXT: s_or_b32 s41, s5, s41
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s42, s83, 16
+; VI-NEXT: s_or_b32 s42, s5, s42
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s43, s81, 16
+; VI-NEXT: s_or_b32 s43, s5, s43
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s44, s70, 16
+; VI-NEXT: s_or_b32 s44, s5, s44
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s45, s35, 16
+; VI-NEXT: s_or_b32 s45, s5, s45
+; VI-NEXT: s_and_b32 s5, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s46, s31, 16
+; VI-NEXT: s_or_b32 s46, s5, s46
+; VI-NEXT: s_and_b32 s5, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s47, vcc_hi, 16
+; VI-NEXT: s_or_b32 s47, s5, s47
+; VI-NEXT: s_and_b32 s5, 0xffff, s28
+; VI-NEXT: s_mov_b32 s91, s56
+; VI-NEXT: s_lshl_b32 s56, s56, 16
+; VI-NEXT: s_or_b32 s48, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s29
+; VI-NEXT: s_lshl_b32 s56, s73, 16
+; VI-NEXT: s_or_b32 s49, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s85
+; VI-NEXT: s_lshl_b32 s56, s87, 16
+; VI-NEXT: s_or_b32 s50, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s82
+; VI-NEXT: s_lshl_b32 s56, s84, 16
+; VI-NEXT: s_or_b32 s51, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s71
+; VI-NEXT: s_lshl_b32 s56, s80, 16
+; VI-NEXT: s_or_b32 s52, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s68
+; VI-NEXT: s_lshl_b32 s56, s69, 16
+; VI-NEXT: s_or_b32 s53, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, s30
+; VI-NEXT: s_lshl_b32 s56, s34, 16
+; VI-NEXT: s_mov_b32 s90, s73
+; VI-NEXT: s_or_b32 s54, s5, s56
+; VI-NEXT: s_and_b32 s5, 0xffff, vcc_lo
+; VI-NEXT: s_mov_b32 s73, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s55, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s89
-; VI-NEXT: s_lshl_b32 s5, s88, 16
-; VI-NEXT: s_mov_b32 s90, s56
+; VI-NEXT: s_lshl_b32 s5, s79, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s78
; VI-NEXT: s_lshl_b32 s5, s57, 16
-; VI-NEXT: s_mov_b32 s91, s77
-; VI-NEXT: s_mov_b32 s77, s57
+; VI-NEXT: s_mov_b32 s77, s79
+; VI-NEXT: s_mov_b32 s79, s57
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s76
; VI-NEXT: s_lshl_b32 s5, s58, 16
-; VI-NEXT: s_mov_b32 s79, s88
; VI-NEXT: s_mov_b32 s88, s58
; VI-NEXT: s_or_b32 s58, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s74
@@ -26377,12 +26278,13 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB35_3
; VI-NEXT: .LBB35_2:
-; VI-NEXT: s_mov_b32 s79, s88
-; VI-NEXT: s_mov_b32 s91, s77
-; VI-NEXT: s_mov_b32 s90, s56
-; VI-NEXT: s_mov_b32 s77, s57
+; VI-NEXT: s_mov_b32 s77, s79
+; VI-NEXT: s_mov_b32 s91, s56
+; VI-NEXT: s_mov_b32 s90, s73
+; VI-NEXT: s_mov_b32 s79, s57
; VI-NEXT: s_mov_b32 s88, s58
; VI-NEXT: s_mov_b32 s75, s65
+; VI-NEXT: s_mov_b32 s73, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; VI-NEXT: .LBB35_3: ; %Flow
@@ -26392,47 +26294,47 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; VI-NEXT: s_cbranch_scc1 .LBB35_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v29, 0x200
-; VI-NEXT: v_mov_b32_e32 v0, s73
-; VI-NEXT: v_mov_b32_e32 v2, s15
+; VI-NEXT: v_mov_b32_e32 v0, s15
+; VI-NEXT: v_mov_b32_e32 v2, s13
; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v1, s16, v29
; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s17, v29
; VI-NEXT: v_or_b32_e32 v0, v1, v0
; VI-NEXT: v_or_b32_e32 v1, v3, v2
-; VI-NEXT: v_mov_b32_e32 v2, s13
+; VI-NEXT: v_mov_b32_e32 v2, s11
; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v3, s18, v29
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_mov_b32_e32 v3, s11
+; VI-NEXT: v_mov_b32_e32 v3, s9
; VI-NEXT: v_add_f16_sdwa v3, v3, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v4, s19, v29
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_mov_b32_e32 v4, s9
+; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_add_f16_sdwa v4, v4, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v5, s20, v29
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_mov_b32_e32 v5, s87
+; VI-NEXT: v_mov_b32_e32 v5, s86
; VI-NEXT: v_add_f16_sdwa v5, v5, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v6, s21, v29
; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_mov_b32_e32 v6, s84
+; VI-NEXT: v_mov_b32_e32 v6, s83
; VI-NEXT: v_add_f16_sdwa v6, v6, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v7, s22, v29
; VI-NEXT: v_or_b32_e32 v6, v7, v6
-; VI-NEXT: v_mov_b32_e32 v7, s82
+; VI-NEXT: v_mov_b32_e32 v7, s81
; VI-NEXT: v_add_f16_sdwa v7, v7, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v8, s23, v29
; VI-NEXT: v_or_b32_e32 v7, v8, v7
-; VI-NEXT: v_mov_b32_e32 v8, s71
+; VI-NEXT: v_mov_b32_e32 v8, s70
; VI-NEXT: v_add_f16_sdwa v8, v8, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v9, s24, v29
; VI-NEXT: v_or_b32_e32 v8, v9, v8
-; VI-NEXT: v_mov_b32_e32 v9, s68
+; VI-NEXT: v_mov_b32_e32 v9, s35
; VI-NEXT: v_add_f16_sdwa v9, v9, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v10, s25, v29
; VI-NEXT: v_or_b32_e32 v9, v10, v9
-; VI-NEXT: v_mov_b32_e32 v10, s34
+; VI-NEXT: v_mov_b32_e32 v10, s31
; VI-NEXT: v_add_f16_sdwa v10, v10, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v11, s26, v29
; VI-NEXT: v_or_b32_e32 v10, v11, v10
@@ -26448,35 +26350,35 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a,
; VI-NEXT: v_add_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v14, s29, v29
; VI-NEXT: v_or_b32_e32 v13, v14, v13
-; VI-NEXT: v_mov_b32_e32 v14, s7
+; VI-NEXT: v_mov_b32_e32 v14, s87
; VI-NEXT: v_add_f16_sdwa v14, v14, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v15, s86, v29
+; VI-NEXT: v_add_f16_e32 v15, s85, v29
; VI-NEXT: v_or_b32_e32 v14, v15, v14
-; VI-NEXT: v_mov_b32_e32 v15, s85
+; VI-NEXT: v_mov_b32_e32 v15, s84
; VI-NEXT: v_add_f16_sdwa v15, v15, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v16, s83, v29
+; VI-NEXT: v_add_f16_e32 v16, s82, v29
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_mov_b32_e32 v16, s81
+; VI-NEXT: v_mov_b32_e32 v16, s80
; VI-NEXT: v_add_f16_sdwa v16, v16, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v17, s80, v29
+; VI-NEXT: v_add_f16_e32 v17, s71, v29
; VI-NEXT: v_or_b32_e32 v16, v17, v16
-; VI-NEXT: v_mov_b32_e32 v17, s70
+; VI-NEXT: v_mov_b32_e32 v17, s69
; VI-NEXT: v_add_f16_sdwa v17, v17, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v18, s69, v29
+; VI-NEXT: v_add_f16_e32 v18, s68, v29
; VI-NEXT: v_or_b32_e32 v17, v18, v17
-; VI-NEXT: v_mov_b32_e32 v18, s35
+; VI-NEXT: v_mov_b32_e32 v18, s34
; VI-NEXT: v_add_f16_sdwa v18, v18, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v19, s31, v29
+; VI-NEXT: v_add_f16_e32 v19, s30, v29
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_mov_b32_e32 v19, s30
+; VI-NEXT: v_mov_b32_e32 v19, s73
; VI-NEXT: v_add_f16_sdwa v19, v19, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v20, vcc_lo, v29
; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_mov_b32_e32 v20, s79
+; VI-NEXT: v_mov_b32_e32 v20, s77
; VI-NEXT: v_add_f16_sdwa v20, v20, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, s89, v29
; VI-NEXT: v_or_b32_e32 v20, v21, v20
-; VI-NEXT: v_mov_b32_e32 v21, s77
+; VI-NEXT: v_mov_b32_e32 v21, s79
; VI-NEXT: v_add_f16_sdwa v21, v21, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, s78, v29
; VI-NEXT: v_or_b32_e32 v21, v22, v21
@@ -29242,25 +29144,15 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v30, s34, 0
; SI-NEXT: v_writelane_b32 v30, s35, 1
; SI-NEXT: v_writelane_b32 v30, s36, 2
; SI-NEXT: v_writelane_b32 v30, s37, 3
-; SI-NEXT: v_writelane_b32 v30, s38, 4
-; SI-NEXT: v_writelane_b32 v30, s39, 5
-; SI-NEXT: v_writelane_b32 v30, s48, 6
-; SI-NEXT: v_writelane_b32 v30, s49, 7
-; SI-NEXT: v_writelane_b32 v30, s50, 8
-; SI-NEXT: v_writelane_b32 v30, s51, 9
-; SI-NEXT: v_writelane_b32 v30, s52, 10
-; SI-NEXT: v_writelane_b32 v30, s53, 11
-; SI-NEXT: v_writelane_b32 v30, s54, 12
-; SI-NEXT: v_writelane_b32 v30, s55, 13
-; SI-NEXT: v_writelane_b32 v30, s64, 14
-; SI-NEXT: v_writelane_b32 v30, s30, 15
-; SI-NEXT: v_writelane_b32 v30, s31, 16
+; SI-NEXT: v_writelane_b32 v30, s30, 4
+; SI-NEXT: v_writelane_b32 v30, s31, 5
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -29279,32 +29171,49 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s43, v1
; SI-NEXT: s_cmp_lg_u32 s42, 0
; SI-NEXT: v_readfirstlane_b32 s42, v0
+; SI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB41_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s44, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v31, s44, 0
+; SI-NEXT: s_lshr_b32 s44, s7, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 1
+; SI-NEXT: s_lshr_b32 s44, s9, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 2
+; SI-NEXT: s_lshr_b32 s44, s11, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 3
+; SI-NEXT: s_lshr_b32 s44, s13, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 4
+; SI-NEXT: s_lshr_b32 s44, s15, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 5
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 6
+; SI-NEXT: s_lshr_b32 s44, s43, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 7
+; SI-NEXT: s_lshr_b32 s44, s29, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 8
+; SI-NEXT: s_lshr_b32 s44, s27, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 9
+; SI-NEXT: s_lshr_b32 s44, s25, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 10
+; SI-NEXT: s_lshr_b32 s44, s23, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 11
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 12
+; SI-NEXT: s_lshr_b32 s44, s19, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 13
+; SI-NEXT: s_lshr_b32 s44, s17, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 14
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -29314,41 +29223,71 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB41_3
; SI-NEXT: .LBB41_2:
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: s_mov_b64 s[30:31], -1
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: .LBB41_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
; SI-NEXT: s_cselect_b32 s45, 1, 0
; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: v_readlane_b32 s30, v31, 0
+; SI-NEXT: v_readlane_b32 s31, v31, 1
+; SI-NEXT: v_readlane_b32 s45, v31, 2
+; SI-NEXT: v_readlane_b32 s47, v31, 3
+; SI-NEXT: v_readlane_b32 s59, v31, 4
+; SI-NEXT: v_readlane_b32 s61, v31, 5
+; SI-NEXT: v_readlane_b32 s57, v31, 6
+; SI-NEXT: v_readlane_b32 s34, v31, 7
+; SI-NEXT: v_readlane_b32 s63, v31, 8
+; SI-NEXT: v_readlane_b32 s35, v31, 9
+; SI-NEXT: v_readlane_b32 s73, v31, 10
+; SI-NEXT: v_readlane_b32 s36, v31, 11
+; SI-NEXT: v_readlane_b32 s75, v31, 12
+; SI-NEXT: v_readlane_b32 s37, v31, 13
+; SI-NEXT: v_readlane_b32 s77, v31, 14
; SI-NEXT: s_cbranch_scc1 .LBB41_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -29381,30 +29320,39 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: s_lshr_b32 s45, s29, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s11, 16
+; SI-NEXT: s_lshr_b32 s88, s13, 16
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s90, s17, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_mov_b32 s57, s44
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s45
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
+; SI-NEXT: s_lshr_b32 s31, s7, 16
+; SI-NEXT: s_lshr_b32 s34, s43, 16
+; SI-NEXT: s_lshr_b32 s35, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s23, 16
+; SI-NEXT: s_lshr_b32 s37, s19, 16
+; SI-NEXT: s_mov_b32 s77, s90
+; SI-NEXT: s_mov_b32 s61, s89
+; SI-NEXT: s_mov_b32 s59, s88
+; SI-NEXT: s_mov_b32 s47, s79
+; SI-NEXT: s_mov_b32 s45, s78
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -29412,97 +29360,97 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB41_5: ; %end
-; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s45
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s64, 16
-; SI-NEXT: s_or_b32 s17, s17, s45
-; SI-NEXT: s_lshl_b32 s45, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s45
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s55, 16
-; SI-NEXT: s_or_b32 s19, s19, s45
-; SI-NEXT: s_lshl_b32 s45, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s45
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s54, 16
-; SI-NEXT: s_or_b32 s21, s21, s45
-; SI-NEXT: s_lshl_b32 s45, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s45
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s53, 16
-; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s45
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s52, 16
-; SI-NEXT: s_or_b32 s25, s25, s45
-; SI-NEXT: s_lshl_b32 s45, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s26, s26, s45
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s51, 16
-; SI-NEXT: s_or_b32 s27, s27, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s76, 16
-; SI-NEXT: s_or_b32 s28, s28, s45
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s28, s28, s44
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s50, 16
-; SI-NEXT: s_or_b32 s29, s29, s45
+; SI-NEXT: s_lshl_b32 s44, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s44
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s74, 16
-; SI-NEXT: s_or_b32 s42, s42, s45
+; SI-NEXT: s_lshl_b32 s44, s76, 16
+; SI-NEXT: s_or_b32 s42, s42, s44
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s49, 16
-; SI-NEXT: s_or_b32 s43, s43, s45
+; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_or_b32 s43, s43, s44
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s72, 16
-; SI-NEXT: s_or_b32 s40, s40, s45
+; SI-NEXT: s_lshl_b32 s44, s74, 16
+; SI-NEXT: s_or_b32 s40, s40, s44
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s48, 16
-; SI-NEXT: s_or_b32 s41, s41, s45
+; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s44
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s62, 16
-; SI-NEXT: s_or_b32 s14, s14, s45
+; SI-NEXT: s_lshl_b32 s44, s72, 16
+; SI-NEXT: s_or_b32 s14, s14, s44
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s45
+; SI-NEXT: s_lshl_b32 s44, s61, 16
+; SI-NEXT: s_or_b32 s15, s15, s44
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s60, 16
-; SI-NEXT: s_or_b32 s12, s12, s45
+; SI-NEXT: s_lshl_b32 s44, s62, 16
+; SI-NEXT: s_or_b32 s12, s12, s44
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s38, 16
-; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_lshl_b32 s44, s59, 16
+; SI-NEXT: s_or_b32 s13, s13, s44
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_lshl_b32 s44, s60, 16
+; SI-NEXT: s_or_b32 s10, s10, s44
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s37, 16
-; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_lshl_b32 s44, s47, 16
+; SI-NEXT: s_or_b32 s11, s11, s44
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s56, 16
-; SI-NEXT: s_or_b32 s8, s8, s45
+; SI-NEXT: s_lshl_b32 s44, s58, 16
+; SI-NEXT: s_or_b32 s8, s8, s44
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s36, 16
-; SI-NEXT: s_or_b32 s9, s9, s45
+; SI-NEXT: s_lshl_b32 s44, s45, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_or_b32 s9, s9, s44
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s46, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_or_b32 s6, s6, s45
+; SI-NEXT: s_lshl_b32 s44, s56, 16
+; SI-NEXT: s_or_b32 s17, s17, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_or_b32 s6, s6, s44
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_lshl_b32 s44, s31, 16
+; SI-NEXT: s_or_b32 s18, s18, s77
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s37, 16
+; SI-NEXT: s_or_b32 s22, s22, s75
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s36, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s44
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s46, 16
+; SI-NEXT: s_lshl_b32 s79, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s35, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
-; SI-NEXT: s_or_b32 s7, s7, s45
+; SI-NEXT: s_lshl_b32 s44, s30, 16
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 15
+; SI-NEXT: v_readlane_b32 s30, v30, 4
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -29533,24 +29481,15 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 16
-; SI-NEXT: v_readlane_b32 s64, v30, 14
-; SI-NEXT: v_readlane_b32 s55, v30, 13
-; SI-NEXT: v_readlane_b32 s54, v30, 12
-; SI-NEXT: v_readlane_b32 s53, v30, 11
-; SI-NEXT: v_readlane_b32 s52, v30, 10
-; SI-NEXT: v_readlane_b32 s51, v30, 9
-; SI-NEXT: v_readlane_b32 s50, v30, 8
-; SI-NEXT: v_readlane_b32 s49, v30, 7
-; SI-NEXT: v_readlane_b32 s48, v30, 6
-; SI-NEXT: v_readlane_b32 s39, v30, 5
-; SI-NEXT: v_readlane_b32 s38, v30, 4
+; SI-NEXT: v_readlane_b32 s31, v30, 5
; SI-NEXT: v_readlane_b32 s37, v30, 3
; SI-NEXT: v_readlane_b32 s36, v30, 2
; SI-NEXT: v_readlane_b32 s35, v30, 1
; SI-NEXT: v_readlane_b32 s34, v30, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -29560,13 +29499,12 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v30, s34, 0
; VI-NEXT: v_writelane_b32 v30, s35, 1
-; VI-NEXT: v_writelane_b32 v30, s36, 2
-; VI-NEXT: v_writelane_b32 v30, s37, 3
-; VI-NEXT: v_writelane_b32 v30, s30, 4
-; VI-NEXT: v_writelane_b32 v30, s31, 5
+; VI-NEXT: v_writelane_b32 v30, s30, 2
+; VI-NEXT: v_writelane_b32 v30, s31, 3
; VI-NEXT: v_readfirstlane_b32 s4, v16
; VI-NEXT: v_readfirstlane_b32 s6, v15
; VI-NEXT: v_readfirstlane_b32 s7, v14
@@ -29585,48 +29523,54 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s45, v0
+; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB41_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 1
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 2
+; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 3
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 4
+; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 5
+; VI-NEXT: s_lshr_b32 s89, s21, 16
+; VI-NEXT: s_lshr_b32 s90, s20, 16
+; VI-NEXT: s_lshr_b32 s91, s19, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB41_3
; VI-NEXT: .LBB41_2:
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr37
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr35
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -29650,11 +29594,30 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: .LBB41_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_mov_b32 s30, s91
+; VI-NEXT: s_mov_b32 s31, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s89
+; VI-NEXT: s_mov_b32 s34, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s90
+; VI-NEXT: s_mov_b32 s35, s46
+; VI-NEXT: v_readlane_b32 s4, v31, 0
+; VI-NEXT: v_readlane_b32 s5, v31, 1
+; VI-NEXT: v_readlane_b32 s46, v31, 2
+; VI-NEXT: v_readlane_b32 s89, v31, 3
+; VI-NEXT: v_readlane_b32 s90, v31, 4
+; VI-NEXT: v_readlane_b32 s91, v31, 5
; VI-NEXT: s_cbranch_scc1 .LBB41_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s7, s7, 3
@@ -29687,140 +29650,140 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; VI-NEXT: s_addc_u32 s19, s19, 0
; VI-NEXT: s_add_u32 s16, s16, 3
; VI-NEXT: s_addc_u32 s17, s17, 0
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s5, s26, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s89, s24, 16
+; VI-NEXT: s_lshr_b32 s90, s23, 16
+; VI-NEXT: s_lshr_b32 s91, s22, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 16
+; VI-NEXT: s_lshr_b32 s31, s18, 16
+; VI-NEXT: s_lshr_b32 s34, s17, 16
+; VI-NEXT: s_lshr_b32 s35, s16, 16
; VI-NEXT: .LBB41_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s37, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s36, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, s35, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, s34, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
-; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s31, 16
-; VI-NEXT: s_or_b32 s18, s18, s19
-; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s30, 16
-; VI-NEXT: s_or_b32 s19, s19, s20
-; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; VI-NEXT: s_or_b32 s20, s20, s21
-; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, vcc_lo, 16
-; VI-NEXT: s_or_b32 s21, s21, s22
-; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s91, 16
-; VI-NEXT: s_or_b32 s22, s22, s23
-; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s90, 16
-; VI-NEXT: s_or_b32 s23, s23, s24
-; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s89, 16
-; VI-NEXT: s_or_b32 s24, s24, s25
-; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s88, 16
-; VI-NEXT: s_or_b32 s25, s25, s26
+; VI-NEXT: s_and_b32 s26, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s26, s5
+; VI-NEXT: s_and_b32 s26, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s26, s4
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s79, 16
+; VI-NEXT: s_lshl_b32 s27, s88, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s78, 16
+; VI-NEXT: s_lshl_b32 s28, s79, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s45
-; VI-NEXT: s_lshl_b32 s29, s77, 16
+; VI-NEXT: s_lshl_b32 s29, s78, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s44
-; VI-NEXT: s_lshl_b32 s44, s76, 16
+; VI-NEXT: s_lshl_b32 s44, s77, 16
; VI-NEXT: s_or_b32 s29, s29, s44
; VI-NEXT: s_and_b32 s43, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s44, s75, 16
+; VI-NEXT: s_lshl_b32 s44, s76, 16
; VI-NEXT: s_or_b32 s43, s43, s44
; VI-NEXT: s_and_b32 s42, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s44, s74, 16
+; VI-NEXT: s_lshl_b32 s44, s75, 16
; VI-NEXT: s_or_b32 s42, s42, s44
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s44, s73, 16
+; VI-NEXT: s_lshl_b32 s44, s74, 16
; VI-NEXT: s_or_b32 s41, s41, s44
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s44, s72, 16
+; VI-NEXT: s_lshl_b32 s44, s73, 16
; VI-NEXT: s_or_b32 s40, s40, s44
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s44, s63, 16
+; VI-NEXT: s_lshl_b32 s44, s72, 16
; VI-NEXT: s_or_b32 s15, s15, s44
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s44, s62, 16
+; VI-NEXT: s_lshl_b32 s44, s63, 16
; VI-NEXT: s_or_b32 s14, s14, s44
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s44, s61, 16
+; VI-NEXT: s_lshl_b32 s44, s62, 16
; VI-NEXT: s_or_b32 s13, s13, s44
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s44, s60, 16
+; VI-NEXT: s_lshl_b32 s44, s61, 16
; VI-NEXT: s_or_b32 s12, s12, s44
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s44, s59, 16
+; VI-NEXT: s_lshl_b32 s44, s60, 16
; VI-NEXT: s_or_b32 s11, s11, s44
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s44, s58, 16
+; VI-NEXT: s_lshl_b32 s44, s59, 16
; VI-NEXT: s_or_b32 s10, s10, s44
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s44, s57, 16
+; VI-NEXT: s_lshl_b32 s44, s58, 16
; VI-NEXT: s_or_b32 s9, s9, s44
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_lshl_b32 s44, s57, 16
; VI-NEXT: s_or_b32 s8, s8, s44
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s35, s35, 16
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s34, s34, 16
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s31, s31, 16
+; VI-NEXT: s_and_b32 s19, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s30, s30, 16
+; VI-NEXT: s_and_b32 s20, 0xffff, s20
+; VI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; VI-NEXT: s_and_b32 s21, 0xffff, s21
+; VI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; VI-NEXT: s_and_b32 s22, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s91, s91, 16
+; VI-NEXT: s_and_b32 s23, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s90, s90, 16
+; VI-NEXT: s_and_b32 s24, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s89, s89, 16
+; VI-NEXT: s_and_b32 s25, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s46, s46, 16
; VI-NEXT: s_or_b32 s7, s7, s44
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s44, s46, 16
+; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_or_b32 s16, s16, s35
+; VI-NEXT: s_or_b32 s17, s17, s34
+; VI-NEXT: s_or_b32 s18, s18, s31
+; VI-NEXT: s_or_b32 s19, s19, s30
+; VI-NEXT: s_or_b32 s20, s20, vcc_hi
+; VI-NEXT: s_or_b32 s21, s21, vcc_lo
+; VI-NEXT: s_or_b32 s22, s22, s91
+; VI-NEXT: s_or_b32 s23, s23, s90
+; VI-NEXT: s_or_b32 s24, s24, s89
+; VI-NEXT: s_or_b32 s25, s25, s46
; VI-NEXT: s_or_b32 s6, s6, s44
-; VI-NEXT: v_readlane_b32 s30, v30, 4
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
-; VI-NEXT: v_mov_b32_e32 v4, s18
-; VI-NEXT: v_mov_b32_e32 v5, s19
-; VI-NEXT: v_mov_b32_e32 v6, s20
-; VI-NEXT: v_mov_b32_e32 v7, s21
-; VI-NEXT: v_mov_b32_e32 v8, s22
-; VI-NEXT: v_mov_b32_e32 v9, s23
-; VI-NEXT: v_mov_b32_e32 v10, s24
-; VI-NEXT: v_mov_b32_e32 v11, s25
+; VI-NEXT: v_readlane_b32 s30, v30, 2
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s18
+; VI-NEXT: v_mov_b32_e32 v3, s19
+; VI-NEXT: v_mov_b32_e32 v4, s20
+; VI-NEXT: v_mov_b32_e32 v5, s21
+; VI-NEXT: v_mov_b32_e32 v6, s22
+; VI-NEXT: v_mov_b32_e32 v7, s23
+; VI-NEXT: v_mov_b32_e32 v8, s24
+; VI-NEXT: v_mov_b32_e32 v9, s25
+; VI-NEXT: v_mov_b32_e32 v10, s5
+; VI-NEXT: v_mov_b32_e32 v11, s4
; VI-NEXT: v_mov_b32_e32 v12, s26
; VI-NEXT: v_mov_b32_e32 v13, s27
; VI-NEXT: v_mov_b32_e32 v14, s28
@@ -29839,13 +29802,12 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v27, s8
; VI-NEXT: v_mov_b32_e32 v28, s7
; VI-NEXT: v_mov_b32_e32 v29, s6
-; VI-NEXT: v_readlane_b32 s31, v30, 5
-; VI-NEXT: v_readlane_b32 s37, v30, 3
-; VI-NEXT: v_readlane_b32 s36, v30, 2
+; VI-NEXT: v_readlane_b32 s31, v30, 3
; VI-NEXT: v_readlane_b32 s35, v30, 1
; VI-NEXT: v_readlane_b32 s34, v30, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -29856,8 +29818,6 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
-; GFX9-NEXT: v_writelane_b32 v30, s30, 0
-; GFX9-NEXT: v_writelane_b32 v30, s31, 1
; GFX9-NEXT: v_readfirstlane_b32 s4, v16
; GFX9-NEXT: v_readfirstlane_b32 s6, v15
; GFX9-NEXT: v_readfirstlane_b32 s7, v14
@@ -29876,45 +29836,51 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s45, v0
+; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB41_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 0
+; GFX9-NEXT: s_lshr_b32 s4, s18, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 1
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB41_3
; GFX9-NEXT: .LBB41_2:
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; kill: killed $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; implicit-def: $vcc_hi
+; GFX9-NEXT: ; kill: killed $sgpr47
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -29941,11 +29907,12 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB41_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: v_readlane_b32 s4, v30, 0
+; GFX9-NEXT: v_readlane_b32 s5, v30, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB41_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_u32 s7, s7, 3
@@ -29978,72 +29945,71 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: s_addc_u32 s19, s19, 0
; GFX9-NEXT: s_add_u32 s16, s16, 3
; GFX9-NEXT: s_addc_u32 s17, s17, 0
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: s_lshr_b32 s5, s18, 16
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: .LBB41_5: ; %end
-; GFX9-NEXT: s_pack_ll_b32_b16 s4, s16, s31
-; GFX9-NEXT: s_pack_ll_b32_b16 s5, s17, s30
-; GFX9-NEXT: s_pack_ll_b32_b16 s16, s18, vcc_hi
-; GFX9-NEXT: s_pack_ll_b32_b16 s17, s19, vcc_lo
-; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, s95
-; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s94
-; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s93
-; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s92
-; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s91
-; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s90
-; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s89
-; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s88
-; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s79
-; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s78
-; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s77
-; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s76
-; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s75
-; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s74
-; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s73
-; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s72
-; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s63
-; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s62
-; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s61
-; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s60
-; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s59
-; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s58
-; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s57
-; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s56
-; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s47
-; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s46
-; GFX9-NEXT: v_readlane_b32 s30, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v0, s4
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: v_mov_b32_e32 v2, s16
-; GFX9-NEXT: v_mov_b32_e32 v3, s17
+; GFX9-NEXT: s_pack_ll_b32_b16 s16, s16, s46
+; GFX9-NEXT: s_pack_ll_b32_b16 s17, s17, vcc_hi
+; GFX9-NEXT: s_pack_ll_b32_b16 s5, s18, s5
+; GFX9-NEXT: s_pack_ll_b32_b16 s4, s19, s4
+; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, vcc_lo
+; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s95
+; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s94
+; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s93
+; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s92
+; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s91
+; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s90
+; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s89
+; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s88
+; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s79
+; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s78
+; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s77
+; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s76
+; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s75
+; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s74
+; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s73
+; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s72
+; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s63
+; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s62
+; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s61
+; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s60
+; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s59
+; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s58
+; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s57
+; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s56
+; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s47
+; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v1, s17
+; GFX9-NEXT: v_mov_b32_e32 v2, s5
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s18
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v6, s20
@@ -30070,7 +30036,6 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3
; GFX9-NEXT: v_mov_b32_e32 v27, s8
; GFX9-NEXT: v_mov_b32_e32 v28, s7
; GFX9-NEXT: v_mov_b32_e32 v29, s6
-; GFX9-NEXT: v_readlane_b32 s31, v30, 1
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
@@ -31818,24 +31783,24 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s93, v5
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v4
; SI-NEXT: v_readfirstlane_b32 s31, v3
-; SI-NEXT: v_readfirstlane_b32 s68, v2
-; SI-NEXT: v_readfirstlane_b32 s71, v1
-; SI-NEXT: v_readfirstlane_b32 s82, v0
+; SI-NEXT: v_readfirstlane_b32 s96, v2
+; SI-NEXT: v_readfirstlane_b32 s68, v1
+; SI-NEXT: v_readfirstlane_b32 s71, v0
; SI-NEXT: s_lshr_b32 s90, s29, 16
; SI-NEXT: s_lshr_b32 s92, s28, 16
; SI-NEXT: s_lshr_b32 s94, s27, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s26, 16
; SI-NEXT: s_lshr_b32 s34, s25, 16
-; SI-NEXT: s_lshr_b32 s69, s24, 16
-; SI-NEXT: s_lshr_b32 s80, s23, 16
-; SI-NEXT: s_lshr_b32 s83, s22, 16
-; SI-NEXT: s_lshr_b32 s84, s21, 16
-; SI-NEXT: s_lshr_b32 s85, s20, 16
-; SI-NEXT: s_lshr_b32 s86, s19, 16
-; SI-NEXT: s_lshr_b32 s87, s18, 16
-; SI-NEXT: s_lshr_b32 s96, s17, 16
-; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s6, s7, 16
+; SI-NEXT: s_lshr_b32 s87, s24, 16
+; SI-NEXT: s_lshr_b32 s69, s23, 16
+; SI-NEXT: s_lshr_b32 s80, s22, 16
+; SI-NEXT: s_lshr_b32 s81, s21, 16
+; SI-NEXT: s_lshr_b32 s82, s20, 16
+; SI-NEXT: s_lshr_b32 s83, s19, 16
+; SI-NEXT: s_lshr_b32 s84, s18, 16
+; SI-NEXT: s_lshr_b32 s85, s17, 16
+; SI-NEXT: s_lshr_b32 s86, s16, 16
+; SI-NEXT: s_lshr_b32 s97, s7, 16
; SI-NEXT: s_lshr_b32 s8, s9, 16
; SI-NEXT: s_lshr_b32 s10, s11, 16
; SI-NEXT: s_lshr_b32 s12, s13, 16
@@ -31848,62 +31813,63 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s91, s93, 16
; SI-NEXT: s_lshr_b32 s95, vcc_lo, 16
; SI-NEXT: s_lshr_b32 s30, s31, 16
-; SI-NEXT: s_lshr_b32 s35, s68, 16
+; SI-NEXT: s_lshr_b32 s35, s96, 16
+; SI-NEXT: s_lshr_b32 s4, s68, 16
; SI-NEXT: s_lshr_b32 s70, s71, 16
-; SI-NEXT: s_lshr_b32 s81, s82, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_cmp_lg_u32 s4, 0
+; SI-NEXT: v_readfirstlane_b32 s5, v16
+; SI-NEXT: s_cmp_lg_u32 s5, 0
; SI-NEXT: s_cbranch_scc0 .LBB43_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
-; SI-NEXT: s_or_b32 s36, s4, s5
-; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
-; SI-NEXT: s_or_b32 s38, s4, s5
-; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_and_b32 s5, s16, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s86, 16
+; SI-NEXT: s_or_b32 s36, s5, s6
+; SI-NEXT: s_and_b32 s5, s18, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s84, 16
+; SI-NEXT: s_or_b32 s38, s5, s6
+; SI-NEXT: s_and_b32 s5, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s83, 16
; SI-NEXT: s_and_b32 s40, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s41, s96, 16
-; SI-NEXT: s_or_b32 s39, s4, s5
-; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s41, s85, 16
+; SI-NEXT: s_or_b32 s39, s5, s6
+; SI-NEXT: s_and_b32 s5, s20, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s82, 16
; SI-NEXT: s_or_b32 s37, s40, s41
-; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s42, s4, s5
-; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
-; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s44, s4, s5
-; SI-NEXT: s_and_b32 s4, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s26, 0xffff
-; SI-NEXT: s_lshl_b32 s5, vcc_hi, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
-; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
-; SI-NEXT: s_and_b32 s4, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s92, 16
-; SI-NEXT: s_or_b32 s48, s4, s5
-; SI-NEXT: s_and_b32 s4, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: s_or_b32 s49, s4, s5
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s50, s4, s5
-; SI-NEXT: s_and_b32 s4, s71, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s70, 16
-; SI-NEXT: s_or_b32 s51, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_or_b32 s40, s5, s6
+; SI-NEXT: s_and_b32 s5, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s81, 16
+; SI-NEXT: s_or_b32 s41, s5, s6
+; SI-NEXT: s_and_b32 s5, s22, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s80, 16
+; SI-NEXT: s_or_b32 s42, s5, s6
+; SI-NEXT: s_and_b32 s5, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s69, 16
+; SI-NEXT: s_or_b32 s43, s5, s6
+; SI-NEXT: s_and_b32 s5, s24, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s87, 16
+; SI-NEXT: s_or_b32 s44, s5, s6
+; SI-NEXT: s_and_b32 s5, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s34, 16
+; SI-NEXT: s_or_b32 s45, s5, s6
+; SI-NEXT: s_and_b32 s5, s26, 0xffff
+; SI-NEXT: s_lshl_b32 s6, vcc_hi, 16
+; SI-NEXT: s_or_b32 s46, s5, s6
+; SI-NEXT: s_and_b32 s5, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s94, 16
+; SI-NEXT: s_or_b32 s47, s5, s6
+; SI-NEXT: s_and_b32 s5, s28, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s92, 16
+; SI-NEXT: s_or_b32 s48, s5, s6
+; SI-NEXT: s_and_b32 s5, s29, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s90, 16
+; SI-NEXT: s_or_b32 s49, s5, s6
+; SI-NEXT: s_and_b32 s5, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s6, s70, 16
+; SI-NEXT: s_or_b32 s50, s5, s6
+; SI-NEXT: s_and_b32 s5, s68, 0xffff
+; SI-NEXT: s_mov_b32 s6, s4
+; SI-NEXT: s_lshl_b32 s4, s4, 16
+; SI-NEXT: s_or_b32 s51, s5, s4
+; SI-NEXT: s_and_b32 s4, s96, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s52, s4, s5
; SI-NEXT: s_and_b32 s4, s31, 0xffff
@@ -31943,11 +31909,12 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s8, 16
; SI-NEXT: s_or_b32 s64, s4, s5
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s65, s4, s5
; SI-NEXT: s_mov_b64 s[4:5], 0
; SI-NEXT: s_branch .LBB43_3
; SI-NEXT: .LBB43_2:
+; SI-NEXT: s_mov_b32 s6, s4
; SI-NEXT: s_mov_b64 s[4:5], -1
; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
; SI-NEXT: .LBB43_3: ; %Flow
@@ -31958,47 +31925,47 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_i32 s16, s16, 3
; SI-NEXT: s_and_b32 s4, s16, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s97, 16
+; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s36, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s96, 16
+; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s37, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s18, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s84, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s38, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, s83, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s39, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s20, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s21, s21, 3
; SI-NEXT: s_add_i32 s40, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
+; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s22, s22, 3
; SI-NEXT: s_add_i32 s41, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s22, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s83, 16
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s23, s23, 3
; SI-NEXT: s_add_i32 s42, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s80, 16
+; SI-NEXT: s_lshl_b32 s5, s69, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s43, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s4, 0x30000
@@ -32025,24 +31992,24 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s82, s82, 3
-; SI-NEXT: s_add_i32 s49, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s82, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s71, s71, 3
-; SI-NEXT: s_add_i32 s50, s4, 0x30000
+; SI-NEXT: s_add_i32 s49, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s71, 0xffff
; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s68, s68, 3
-; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s50, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s68, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_or_b32 s4, s5, s4
+; SI-NEXT: s_add_i32 s51, s4, 0x30000
+; SI-NEXT: s_add_i32 s4, s96, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: s_add_i32 s31, s31, 3
; SI-NEXT: s_add_i32 s52, s4, 0x30000
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_add_i32 s4, s31, 3
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 vcc_lo, vcc_lo, 3
@@ -32103,7 +32070,7 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; SI-NEXT: s_add_i32 s7, s7, 3
; SI-NEXT: s_add_i32 s64, s4, 0x30000
; SI-NEXT: s_and_b32 s4, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s6, 16
+; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_add_i32 s65, s4, 0x30000
; SI-NEXT: .LBB43_5: ; %end
@@ -32216,237 +32183,166 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v30, s87, 29
; VI-NEXT: v_writelane_b32 v30, s30, 30
; VI-NEXT: v_writelane_b32 v30, s31, 31
-; VI-NEXT: s_lshr_b32 s14, s20, 16
+; VI-NEXT: v_readfirstlane_b32 s7, v15
+; VI-NEXT: s_lshr_b32 s72, s7, 16
+; VI-NEXT: v_readfirstlane_b32 s9, v14
; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
-; VI-NEXT: s_lshr_b32 s42, s19, 16
-; VI-NEXT: v_writelane_b32 v31, s14, 0
-; VI-NEXT: s_lshr_b32 s43, s18, 16
-; VI-NEXT: v_readfirstlane_b32 s6, v15
-; VI-NEXT: v_readfirstlane_b32 s8, v14
-; VI-NEXT: v_readfirstlane_b32 s10, v13
-; VI-NEXT: v_readfirstlane_b32 s12, v12
-; VI-NEXT: v_readfirstlane_b32 s87, v11
-; VI-NEXT: v_readfirstlane_b32 s15, v10
-; VI-NEXT: v_readfirstlane_b32 s72, v9
+; VI-NEXT: s_lshr_b32 s64, s9, 16
+; VI-NEXT: v_readfirstlane_b32 s11, v13
+; VI-NEXT: v_writelane_b32 v31, s72, 0
+; VI-NEXT: s_lshr_b32 s63, s11, 16
+; VI-NEXT: v_readfirstlane_b32 s13, v12
+; VI-NEXT: v_writelane_b32 v31, s64, 1
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: v_readfirstlane_b32 s15, v11
+; VI-NEXT: v_readfirstlane_b32 s73, v10
+; VI-NEXT: v_readfirstlane_b32 s75, v9
; VI-NEXT: v_readfirstlane_b32 s77, v8
; VI-NEXT: v_readfirstlane_b32 s79, v7
; VI-NEXT: v_readfirstlane_b32 s89, v6
; VI-NEXT: v_readfirstlane_b32 vcc_hi, v5
; VI-NEXT: v_readfirstlane_b32 s34, v4
-; VI-NEXT: v_readfirstlane_b32 s69, v3
-; VI-NEXT: v_readfirstlane_b32 s80, v2
-; VI-NEXT: v_readfirstlane_b32 s83, v1
-; VI-NEXT: v_readfirstlane_b32 s86, v0
-; VI-NEXT: v_writelane_b32 v31, s42, 1
-; VI-NEXT: s_lshr_b32 s35, s29, 16
-; VI-NEXT: s_lshr_b32 s68, s28, 16
-; VI-NEXT: s_lshr_b32 s70, s27, 16
-; VI-NEXT: s_lshr_b32 s81, s26, 16
-; VI-NEXT: s_lshr_b32 s84, s25, 16
-; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: s_lshr_b32 s11, s23, 16
-; VI-NEXT: s_lshr_b32 s73, s22, 16
-; VI-NEXT: s_lshr_b32 s75, s21, 16
-; VI-NEXT: s_lshr_b32 s41, s17, 16
-; VI-NEXT: s_lshr_b32 s5, s16, 16
-; VI-NEXT: s_lshr_b32 s66, s6, 16
-; VI-NEXT: s_lshr_b32 s74, s8, 16
-; VI-NEXT: s_lshr_b32 s76, s10, 16
-; VI-NEXT: s_lshr_b32 s78, s12, 16
-; VI-NEXT: s_lshr_b32 s88, s87, 16
-; VI-NEXT: s_lshr_b32 s90, s15, 16
-; VI-NEXT: s_lshr_b32 s91, s72, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s77, 16
-; VI-NEXT: s_lshr_b32 s30, s79, 16
-; VI-NEXT: s_lshr_b32 s31, s89, 16
-; VI-NEXT: s_lshr_b32 s67, vcc_hi, 16
-; VI-NEXT: s_lshr_b32 s71, s34, 16
-; VI-NEXT: s_lshr_b32 s82, s69, 16
-; VI-NEXT: s_lshr_b32 s85, s80, 16
-; VI-NEXT: s_lshr_b32 s9, s83, 16
-; VI-NEXT: s_lshr_b32 s13, s86, 16
-; VI-NEXT: v_readfirstlane_b32 s4, v16
-; VI-NEXT: v_writelane_b32 v31, s43, 2
-; VI-NEXT: s_cmp_lg_u32 s4, 0
-; VI-NEXT: v_writelane_b32 v31, s41, 3
-; VI-NEXT: v_writelane_b32 v31, s5, 4
+; VI-NEXT: v_readfirstlane_b32 s67, v3
+; VI-NEXT: v_readfirstlane_b32 s69, v2
+; VI-NEXT: v_readfirstlane_b32 s80, v1
+; VI-NEXT: v_readfirstlane_b32 s83, v0
+; VI-NEXT: v_writelane_b32 v31, s63, 2
+; VI-NEXT: s_lshr_b32 s90, s29, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s28, 16
+; VI-NEXT: s_lshr_b32 s31, s27, 16
+; VI-NEXT: s_lshr_b32 s35, s26, 16
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: s_lshr_b32 s70, s24, 16
+; VI-NEXT: s_lshr_b32 s81, s23, 16
+; VI-NEXT: s_lshr_b32 s84, s22, 16
+; VI-NEXT: s_lshr_b32 s85, s21, 16
+; VI-NEXT: s_lshr_b32 s86, s20, 16
+; VI-NEXT: s_lshr_b32 s87, s19, 16
+; VI-NEXT: s_lshr_b32 s6, s18, 16
+; VI-NEXT: s_lshr_b32 s8, s17, 16
+; VI-NEXT: s_lshr_b32 s10, s16, 16
+; VI-NEXT: s_lshr_b32 s61, s15, 16
+; VI-NEXT: s_lshr_b32 s60, s73, 16
+; VI-NEXT: s_lshr_b32 s59, s75, 16
+; VI-NEXT: s_lshr_b32 s76, s77, 16
+; VI-NEXT: s_lshr_b32 s78, s79, 16
+; VI-NEXT: s_lshr_b32 s88, s89, 16
+; VI-NEXT: s_lshr_b32 s91, vcc_hi, 16
+; VI-NEXT: s_lshr_b32 s30, s34, 16
+; VI-NEXT: s_lshr_b32 s66, s67, 16
+; VI-NEXT: s_lshr_b32 s68, s69, 16
+; VI-NEXT: s_lshr_b32 s71, s80, 16
+; VI-NEXT: s_lshr_b32 s82, s83, 16
+; VI-NEXT: v_readfirstlane_b32 s5, v16
+; VI-NEXT: v_writelane_b32 v31, s62, 3
+; VI-NEXT: s_cmp_lg_u32 s5, 0
+; VI-NEXT: v_writelane_b32 v31, s61, 4
+; VI-NEXT: v_writelane_b32 v31, s60, 5
; VI-NEXT: s_cbranch_scc0 .LBB43_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s5, 16
-; VI-NEXT: s_or_b32 s36, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s5, s43, 16
-; VI-NEXT: s_or_b32 s38, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s5, s42, 16
-; VI-NEXT: s_and_b32 s40, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s41, s41, 16
-; VI-NEXT: s_or_b32 s39, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s5, s14, 16
-; VI-NEXT: s_or_b32 s37, s40, s41
-; VI-NEXT: s_or_b32 s40, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s5, s75, 16
-; VI-NEXT: s_or_b32 s41, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s5, s73, 16
-; VI-NEXT: s_or_b32 s42, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s5, s11, 16
-; VI-NEXT: s_or_b32 s43, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s5, s7, 16
-; VI-NEXT: s_or_b32 s44, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s5, s84, 16
-; VI-NEXT: s_or_b32 s45, s4, s5
+; VI-NEXT: s_and_b32 s5, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s12, s10, 16
+; VI-NEXT: s_or_b32 s36, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s12, s6, 16
+; VI-NEXT: s_or_b32 s38, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s12, s87, 16
+; VI-NEXT: s_and_b32 s14, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s40, s8, 16
+; VI-NEXT: s_or_b32 s39, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s20
+; VI-NEXT: s_lshl_b32 s12, s86, 16
+; VI-NEXT: s_or_b32 s37, s14, s40
+; VI-NEXT: s_or_b32 s40, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s21
+; VI-NEXT: s_lshl_b32 s12, s85, 16
+; VI-NEXT: s_or_b32 s41, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s12, s84, 16
+; VI-NEXT: s_or_b32 s42, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s12, s81, 16
+; VI-NEXT: s_or_b32 s43, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s12, s70, 16
+; VI-NEXT: s_or_b32 s44, s5, s12
+; VI-NEXT: s_and_b32 s5, 0xffff, s25
+; VI-NEXT: s_mov_b32 s12, s4
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s45, s5, s4
; VI-NEXT: s_and_b32 s4, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s46, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s47, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s48, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s5, s35, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s49, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s86
-; VI-NEXT: s_lshl_b32 s5, s13, 16
-; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s83
-; VI-NEXT: s_lshl_b32 s5, s9, 16
-; VI-NEXT: s_or_b32 s51, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_or_b32 s50, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s80
-; VI-NEXT: s_lshl_b32 s5, s85, 16
-; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_or_b32 s51, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s69
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s52, s4, s5
+; VI-NEXT: s_and_b32 s4, 0xffff, s67
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s53, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s34
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s54, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, vcc_hi
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s55, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s89
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s56, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s79
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s57, s4, s5
; VI-NEXT: s_and_b32 s4, 0xffff, s77
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s58, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s72
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s75
+; VI-NEXT: s_lshl_b32 s5, s59, 16
+; VI-NEXT: s_mov_b32 s74, s59
; VI-NEXT: s_or_b32 s59, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s73
+; VI-NEXT: s_lshl_b32 s5, s60, 16
; VI-NEXT: s_or_b32 s60, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s87
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s15
+; VI-NEXT: s_lshl_b32 s5, s61, 16
; VI-NEXT: s_or_b32 s61, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s13
+; VI-NEXT: s_lshl_b32 s5, s62, 16
; VI-NEXT: s_or_b32 s62, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s11
+; VI-NEXT: s_lshl_b32 s5, s63, 16
; VI-NEXT: s_or_b32 s63, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s9
+; VI-NEXT: s_lshl_b32 s5, s64, 16
; VI-NEXT: s_or_b32 s64, s4, s5
-; VI-NEXT: s_and_b32 s4, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_and_b32 s4, 0xffff, s7
+; VI-NEXT: s_lshl_b32 s5, s72, 16
; VI-NEXT: s_or_b32 s65, s4, s5
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB43_3
; VI-NEXT: .LBB43_2:
-; VI-NEXT: v_writelane_b32 v31, s26, 5
-; VI-NEXT: s_mov_b32 s26, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s27
-; VI-NEXT: s_mov_b32 s27, s89
-; VI-NEXT: s_mov_b32 s89, s28
-; VI-NEXT: s_mov_b32 s28, s79
-; VI-NEXT: s_mov_b32 s79, s29
-; VI-NEXT: s_mov_b32 s29, s77
-; VI-NEXT: s_mov_b32 s77, s13
-; VI-NEXT: s_mov_b32 s14, s12
-; VI-NEXT: s_mov_b32 s13, s11
-; VI-NEXT: s_mov_b32 s12, s10
-; VI-NEXT: s_mov_b32 s11, s9
-; VI-NEXT: s_mov_b32 s10, s8
-; VI-NEXT: s_mov_b32 s9, s7
-; VI-NEXT: s_mov_b32 s8, s6
-; VI-NEXT: s_mov_b32 s7, s85
-; VI-NEXT: s_mov_b32 s85, s82
-; VI-NEXT: s_mov_b32 s82, s71
-; VI-NEXT: s_mov_b32 s71, s68
-; VI-NEXT: s_mov_b32 s68, s35
-; VI-NEXT: s_mov_b32 s35, s31
-; VI-NEXT: s_mov_b32 s31, s30
-; VI-NEXT: s_mov_b32 s30, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s91
-; VI-NEXT: s_mov_b32 s91, s90
-; VI-NEXT: s_mov_b32 s90, s88
-; VI-NEXT: s_mov_b32 s88, s78
-; VI-NEXT: s_mov_b32 s78, s76
-; VI-NEXT: s_mov_b32 s76, s74
-; VI-NEXT: s_mov_b32 s74, s66
-; VI-NEXT: s_mov_b32 s6, s75
-; VI-NEXT: s_mov_b32 s75, s72
-; VI-NEXT: s_mov_b32 s72, s73
-; VI-NEXT: s_mov_b32 s73, s15
-; VI-NEXT: s_mov_b32 s15, s87
-; VI-NEXT: s_mov_b32 s87, s84
-; VI-NEXT: s_mov_b32 s84, s81
-; VI-NEXT: s_mov_b32 s81, s70
-; VI-NEXT: s_mov_b32 s70, s67
+; VI-NEXT: s_mov_b32 s74, s59
+; VI-NEXT: s_mov_b32 s72, s66
+; VI-NEXT: s_mov_b32 s14, s67
; VI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67
+; VI-NEXT: s_mov_b32 s12, s4
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: s_mov_b32 s67, s70
-; VI-NEXT: s_mov_b32 s70, s81
-; VI-NEXT: s_mov_b32 s81, s84
-; VI-NEXT: s_mov_b32 s84, s87
-; VI-NEXT: s_mov_b32 s87, s15
-; VI-NEXT: s_mov_b32 s15, s73
-; VI-NEXT: s_mov_b32 s73, s72
-; VI-NEXT: s_mov_b32 s72, s75
-; VI-NEXT: s_mov_b32 s75, s6
-; VI-NEXT: s_mov_b32 s66, s74
-; VI-NEXT: s_mov_b32 s74, s76
-; VI-NEXT: s_mov_b32 s76, s78
-; VI-NEXT: s_mov_b32 s78, s88
-; VI-NEXT: s_mov_b32 s88, s90
-; VI-NEXT: s_mov_b32 s90, s91
-; VI-NEXT: s_mov_b32 s91, vcc_lo
-; VI-NEXT: s_mov_b32 vcc_lo, s30
-; VI-NEXT: s_mov_b32 s30, s31
-; VI-NEXT: s_mov_b32 s31, s35
-; VI-NEXT: s_mov_b32 s35, s68
-; VI-NEXT: s_mov_b32 s68, s71
-; VI-NEXT: s_mov_b32 s71, s82
-; VI-NEXT: s_mov_b32 s82, s85
-; VI-NEXT: s_mov_b32 s85, s7
-; VI-NEXT: s_mov_b32 s6, s8
-; VI-NEXT: s_mov_b32 s7, s9
-; VI-NEXT: s_mov_b32 s8, s10
-; VI-NEXT: s_mov_b32 s9, s11
-; VI-NEXT: s_mov_b32 s10, s12
-; VI-NEXT: s_mov_b32 s11, s13
-; VI-NEXT: s_mov_b32 s12, s14
-; VI-NEXT: s_mov_b32 s13, s77
-; VI-NEXT: s_mov_b32 s77, s29
-; VI-NEXT: s_mov_b32 s29, s79
-; VI-NEXT: s_mov_b32 s79, s28
-; VI-NEXT: s_mov_b32 s28, s89
-; VI-NEXT: s_mov_b32 s89, s27
-; VI-NEXT: s_mov_b32 s27, vcc_hi
-; VI-NEXT: s_mov_b32 vcc_hi, s26
-; VI-NEXT: v_readlane_b32 s26, v31, 5
+; VI-NEXT: s_mov_b32 s67, s14
+; VI-NEXT: s_mov_b32 s66, s72
; VI-NEXT: .LBB43_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
@@ -32454,158 +32350,159 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3
; VI-NEXT: s_cbranch_scc1 .LBB43_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_i32 s16, s16, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_and_b32 s4, s16, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s10, 16
; VI-NEXT: s_add_i32 s17, s17, 3
-; VI-NEXT: v_readlane_b32 s14, v31, 3
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_and_b32 s5, s17, 0xffff
-; VI-NEXT: s_lshl_b32 s14, s14, 16
-; VI-NEXT: s_or_b32 s5, s14, s5
-; VI-NEXT: s_add_i32 s37, s5, 0x30000
+; VI-NEXT: s_lshl_b32 s8, s8, 16
+; VI-NEXT: s_or_b32 s5, s8, s5
; VI-NEXT: s_add_i32 s18, s18, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s36, s4, 0x30000
+; VI-NEXT: s_add_i32 s37, s5, 0x30000
; VI-NEXT: s_and_b32 s4, s18, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s6, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s19, s19, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s38, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s19, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s87, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s39, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s20, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_lshl_b32 s5, s86, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: s_add_i32 s40, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s21, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s75, 16
+; VI-NEXT: s_lshl_b32 s5, s85, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: s_add_i32 s41, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s22, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s73, 16
+; VI-NEXT: s_lshl_b32 s5, s84, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s23, s23, 3
; VI-NEXT: s_add_i32 s42, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s23, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s11, 16
+; VI-NEXT: s_lshl_b32 s5, s81, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s24, s24, 3
; VI-NEXT: s_add_i32 s43, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s24, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s7, 16
+; VI-NEXT: s_lshl_b32 s5, s70, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s25, s25, 3
; VI-NEXT: s_add_i32 s44, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s25, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s84, 16
+; VI-NEXT: s_lshl_b32 s5, s12, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s26, s26, 3
; VI-NEXT: s_add_i32 s45, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s26, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s81, 16
+; VI-NEXT: s_lshl_b32 s5, s35, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s27, s27, 3
; VI-NEXT: s_add_i32 s46, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s27, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s70, 16
+; VI-NEXT: s_lshl_b32 s5, s31, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s28, s28, 3
; VI-NEXT: s_add_i32 s47, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s28, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s29, s29, 3
; VI-NEXT: s_add_i32 s48, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s29, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s35, 16
-; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s86, s86, 3
-; VI-NEXT: s_add_i32 s49, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s86, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s13, 16
+; VI-NEXT: s_lshl_b32 s5, s90, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s83, s83, 3
-; VI-NEXT: s_add_i32 s50, s4, 0x30000
+; VI-NEXT: s_add_i32 s49, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s83, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s9, 16
+; VI-NEXT: s_lshl_b32 s5, s82, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s80, s80, 3
-; VI-NEXT: s_add_i32 s51, s4, 0x30000
+; VI-NEXT: s_add_i32 s50, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s80, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s85, 16
+; VI-NEXT: s_lshl_b32 s5, s71, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s69, s69, 3
-; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s51, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s69, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s82, 16
+; VI-NEXT: s_lshl_b32 s5, s68, 16
+; VI-NEXT: s_or_b32 s4, s5, s4
+; VI-NEXT: s_add_i32 s52, s4, 0x30000
+; VI-NEXT: s_add_i32 s4, s67, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s66, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s34, s34, 3
; VI-NEXT: s_add_i32 s53, s4, 0x30000
-; VI-NEXT: s_and_b32 s4, s34, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s71, 16
+; VI-NEXT: s_add_i32 s4, s34, 3
+; VI-NEXT: s_and_b32 s4, s4, 0xffff
+; VI-NEXT: s_lshl_b32 s5, s30, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT: s_add_i32 s54, s4, 0x30000
; VI-NEXT: s_and_b32 s4, vcc_hi, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s67, 16
+; VI-NEXT: s_lshl_b32 s5, s91, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s89, s89, 3
; VI-NEXT: s_add_i32 s55, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s89, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s31, 16
+; VI-NEXT: s_lshl_b32 s5, s88, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s79, s79, 3
; VI-NEXT: s_add_i32 s56, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s79, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s30, 16
+; VI-NEXT: s_lshl_b32 s5, s78, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s77, s77, 3
; VI-NEXT: s_add_i32 s57, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s77, 0xffff
-; VI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; VI-NEXT: s_lshl_b32 s5, s76, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s75, s72, 3
+; VI-NEXT: s_add_i32 s75, s75, 3
; VI-NEXT: s_add_i32 s58, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s75, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s91, 16
+; VI-NEXT: s_lshl_b32 s5, s74, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s73, s15, 3
+; VI-NEXT: s_add_i32 s73, s73, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 5
; VI-NEXT: s_add_i32 s59, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s73, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s90, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s15, s87, 3
+; VI-NEXT: s_add_i32 s15, s15, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 4
; VI-NEXT: s_add_i32 s60, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s15, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s88, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s13, s12, 3
+; VI-NEXT: s_add_i32 s13, s13, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 3
; VI-NEXT: s_add_i32 s61, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s13, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s78, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s11, s10, 3
+; VI-NEXT: s_add_i32 s11, s11, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 2
; VI-NEXT: s_add_i32 s62, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s11, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s76, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s9, s8, 3
+; VI-NEXT: s_add_i32 s9, s9, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 1
; VI-NEXT: s_add_i32 s63, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s9, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s74, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
-; VI-NEXT: s_add_i32 s7, s6, 3
+; VI-NEXT: s_add_i32 s7, s7, 3
+; VI-NEXT: v_readlane_b32 s5, v31, 0
; VI-NEXT: s_add_i32 s64, s4, 0x30000
; VI-NEXT: s_and_b32 s4, s7, 0xffff
-; VI-NEXT: s_lshl_b32 s5, s66, 16
+; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4
; VI-NEXT: s_add_i32 s65, s4, 0x30000
; VI-NEXT: .LBB43_5: ; %end
@@ -34081,25 +33978,15 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
-; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_writelane_b32 v30, s34, 0
; SI-NEXT: v_writelane_b32 v30, s35, 1
; SI-NEXT: v_writelane_b32 v30, s36, 2
; SI-NEXT: v_writelane_b32 v30, s37, 3
-; SI-NEXT: v_writelane_b32 v30, s38, 4
-; SI-NEXT: v_writelane_b32 v30, s39, 5
-; SI-NEXT: v_writelane_b32 v30, s48, 6
-; SI-NEXT: v_writelane_b32 v30, s49, 7
-; SI-NEXT: v_writelane_b32 v30, s50, 8
-; SI-NEXT: v_writelane_b32 v30, s51, 9
-; SI-NEXT: v_writelane_b32 v30, s52, 10
-; SI-NEXT: v_writelane_b32 v30, s53, 11
-; SI-NEXT: v_writelane_b32 v30, s54, 12
-; SI-NEXT: v_writelane_b32 v30, s55, 13
-; SI-NEXT: v_writelane_b32 v30, s64, 14
-; SI-NEXT: v_writelane_b32 v30, s30, 15
-; SI-NEXT: v_writelane_b32 v30, s31, 16
+; SI-NEXT: v_writelane_b32 v30, s30, 4
+; SI-NEXT: v_writelane_b32 v30, s31, 5
; SI-NEXT: v_readfirstlane_b32 s42, v16
; SI-NEXT: v_readfirstlane_b32 s5, v15
; SI-NEXT: v_readfirstlane_b32 s4, v14
@@ -34118,32 +34005,49 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s43, v1
; SI-NEXT: s_cmp_lg_u32 s42, 0
; SI-NEXT: v_readfirstlane_b32 s42, v0
+; SI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB45_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s44, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v31, s44, 0
+; SI-NEXT: s_lshr_b32 s44, s7, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 1
+; SI-NEXT: s_lshr_b32 s44, s9, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 2
+; SI-NEXT: s_lshr_b32 s44, s11, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 3
+; SI-NEXT: s_lshr_b32 s44, s13, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 4
+; SI-NEXT: s_lshr_b32 s44, s15, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 5
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 6
+; SI-NEXT: s_lshr_b32 s44, s43, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 7
+; SI-NEXT: s_lshr_b32 s44, s29, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 8
+; SI-NEXT: s_lshr_b32 s44, s27, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 9
+; SI-NEXT: s_lshr_b32 s44, s25, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 10
+; SI-NEXT: s_lshr_b32 s44, s23, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 11
+; SI-NEXT: s_lshr_b32 s44, s21, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 12
+; SI-NEXT: s_lshr_b32 s44, s19, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 13
+; SI-NEXT: s_lshr_b32 s44, s17, 16
+; SI-NEXT: v_writelane_b32 v31, s44, 14
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -34153,41 +34057,71 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_mov_b64 s[30:31], 0
; SI-NEXT: s_branch .LBB45_3
; SI-NEXT: .LBB45_2:
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: s_mov_b64 s[30:31], -1
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
; SI-NEXT: ; implicit-def: $vcc_lo
-; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr55
; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr53
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr49
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr39
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr37
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr35
-; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; kill: killed $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; kill: killed $sgpr45
; SI-NEXT: .LBB45_3: ; %Flow
; SI-NEXT: s_and_b64 s[30:31], s[30:31], exec
; SI-NEXT: s_cselect_b32 s45, 1, 0
; SI-NEXT: s_cmp_lg_u32 s45, 1
+; SI-NEXT: v_readlane_b32 s30, v31, 0
+; SI-NEXT: v_readlane_b32 s31, v31, 1
+; SI-NEXT: v_readlane_b32 s45, v31, 2
+; SI-NEXT: v_readlane_b32 s47, v31, 3
+; SI-NEXT: v_readlane_b32 s59, v31, 4
+; SI-NEXT: v_readlane_b32 s61, v31, 5
+; SI-NEXT: v_readlane_b32 s57, v31, 6
+; SI-NEXT: v_readlane_b32 s34, v31, 7
+; SI-NEXT: v_readlane_b32 s63, v31, 8
+; SI-NEXT: v_readlane_b32 s35, v31, 9
+; SI-NEXT: v_readlane_b32 s73, v31, 10
+; SI-NEXT: v_readlane_b32 s36, v31, 11
+; SI-NEXT: v_readlane_b32 s75, v31, 12
+; SI-NEXT: v_readlane_b32 s37, v31, 13
+; SI-NEXT: v_readlane_b32 s77, v31, 14
; SI-NEXT: s_cbranch_scc1 .LBB45_5
; SI-NEXT: ; %bb.4: ; %cmp.true
; SI-NEXT: s_add_u32 s4, s4, 3
@@ -34220,30 +34154,39 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_addc_u32 s19, s19, 0
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
-; SI-NEXT: s_lshr_b32 s34, s5, 16
-; SI-NEXT: s_lshr_b32 s35, s7, 16
-; SI-NEXT: s_lshr_b32 s36, s9, 16
-; SI-NEXT: s_lshr_b32 s37, s11, 16
-; SI-NEXT: s_lshr_b32 s38, s13, 16
-; SI-NEXT: s_lshr_b32 s39, s15, 16
-; SI-NEXT: s_lshr_b32 s48, s41, 16
-; SI-NEXT: s_lshr_b32 s49, s43, 16
-; SI-NEXT: s_lshr_b32 s50, s29, 16
-; SI-NEXT: s_lshr_b32 s51, s27, 16
-; SI-NEXT: s_lshr_b32 s52, s25, 16
-; SI-NEXT: s_lshr_b32 s53, s23, 16
-; SI-NEXT: s_lshr_b32 s54, s21, 16
-; SI-NEXT: s_lshr_b32 s55, s19, 16
-; SI-NEXT: s_lshr_b32 s64, s17, 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s74, s25, 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s44, s41, 16
+; SI-NEXT: s_lshr_b32 s45, s29, 16
+; SI-NEXT: s_lshr_b32 s76, s21, 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16
+; SI-NEXT: s_mov_b32 s73, s74
+; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s78, s9, 16
+; SI-NEXT: s_lshr_b32 s79, s11, 16
+; SI-NEXT: s_lshr_b32 s88, s13, 16
+; SI-NEXT: s_lshr_b32 s89, s15, 16
+; SI-NEXT: s_lshr_b32 s90, s17, 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_mov_b32 s57, s44
+; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16
+; SI-NEXT: s_mov_b32 s63, s45
+; SI-NEXT: s_mov_b32 s75, s76
+; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16
+; SI-NEXT: s_lshr_b32 s30, s5, 16
+; SI-NEXT: s_lshr_b32 s31, s7, 16
+; SI-NEXT: s_lshr_b32 s34, s43, 16
+; SI-NEXT: s_lshr_b32 s35, s27, 16
+; SI-NEXT: s_lshr_b32 s36, s23, 16
+; SI-NEXT: s_lshr_b32 s37, s19, 16
+; SI-NEXT: s_mov_b32 s77, s90
+; SI-NEXT: s_mov_b32 s61, s89
+; SI-NEXT: s_mov_b32 s59, s88
+; SI-NEXT: s_mov_b32 s47, s79
+; SI-NEXT: s_mov_b32 s45, s78
; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16
@@ -34251,97 +34194,97 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16
; SI-NEXT: .LBB45_5: ; %end
-; SI-NEXT: s_lshl_b32 s45, vcc_lo, 16
-; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: s_or_b32 s16, s16, s45
-; SI-NEXT: s_and_b32 s17, s17, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s64, 16
-; SI-NEXT: s_or_b32 s17, s17, s45
-; SI-NEXT: s_lshl_b32 s45, s94, 16
-; SI-NEXT: s_and_b32 s18, s18, 0xffff
-; SI-NEXT: s_or_b32 s18, s18, s45
-; SI-NEXT: s_and_b32 s19, s19, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s55, 16
-; SI-NEXT: s_or_b32 s19, s19, s45
-; SI-NEXT: s_lshl_b32 s45, s92, 16
-; SI-NEXT: s_and_b32 s20, s20, 0xffff
-; SI-NEXT: s_or_b32 s20, s20, s45
-; SI-NEXT: s_and_b32 s21, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s54, 16
-; SI-NEXT: s_or_b32 s21, s21, s45
-; SI-NEXT: s_lshl_b32 s45, s90, 16
-; SI-NEXT: s_and_b32 s22, s22, 0xffff
-; SI-NEXT: s_or_b32 s22, s22, s45
-; SI-NEXT: s_and_b32 s23, s23, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s53, 16
-; SI-NEXT: s_or_b32 s23, s23, s45
-; SI-NEXT: s_lshl_b32 s45, s88, 16
-; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_or_b32 s24, s24, s45
-; SI-NEXT: s_and_b32 s25, s25, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s52, 16
-; SI-NEXT: s_or_b32 s25, s25, s45
-; SI-NEXT: s_lshl_b32 s45, s78, 16
-; SI-NEXT: s_and_b32 s26, s26, 0xffff
-; SI-NEXT: s_or_b32 s26, s26, s45
-; SI-NEXT: s_and_b32 s27, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s51, 16
-; SI-NEXT: s_or_b32 s27, s27, s45
; SI-NEXT: s_and_b32 s28, s28, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s76, 16
-; SI-NEXT: s_or_b32 s28, s28, s45
+; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: s_or_b32 s28, s28, s44
; SI-NEXT: s_and_b32 s29, s29, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s50, 16
-; SI-NEXT: s_or_b32 s29, s29, s45
+; SI-NEXT: s_lshl_b32 s44, s63, 16
+; SI-NEXT: s_or_b32 s29, s29, s44
; SI-NEXT: s_and_b32 s42, s42, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s74, 16
-; SI-NEXT: s_or_b32 s42, s42, s45
+; SI-NEXT: s_lshl_b32 s44, s76, 16
+; SI-NEXT: s_or_b32 s42, s42, s44
; SI-NEXT: s_and_b32 s43, s43, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s49, 16
-; SI-NEXT: s_or_b32 s43, s43, s45
+; SI-NEXT: s_lshl_b32 s44, s34, 16
+; SI-NEXT: s_or_b32 s43, s43, s44
; SI-NEXT: s_and_b32 s40, s40, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s72, 16
-; SI-NEXT: s_or_b32 s40, s40, s45
+; SI-NEXT: s_lshl_b32 s44, s74, 16
+; SI-NEXT: s_or_b32 s40, s40, s44
; SI-NEXT: s_and_b32 s41, s41, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s48, 16
-; SI-NEXT: s_or_b32 s41, s41, s45
+; SI-NEXT: s_lshl_b32 s44, s57, 16
+; SI-NEXT: s_or_b32 s41, s41, s44
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s62, 16
-; SI-NEXT: s_or_b32 s14, s14, s45
+; SI-NEXT: s_lshl_b32 s44, s72, 16
+; SI-NEXT: s_or_b32 s14, s14, s44
; SI-NEXT: s_and_b32 s15, s15, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s39, 16
-; SI-NEXT: s_or_b32 s15, s15, s45
+; SI-NEXT: s_lshl_b32 s44, s61, 16
+; SI-NEXT: s_or_b32 s15, s15, s44
; SI-NEXT: s_and_b32 s12, s12, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s60, 16
-; SI-NEXT: s_or_b32 s12, s12, s45
+; SI-NEXT: s_lshl_b32 s44, s62, 16
+; SI-NEXT: s_or_b32 s12, s12, s44
; SI-NEXT: s_and_b32 s13, s13, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s38, 16
-; SI-NEXT: s_or_b32 s13, s13, s45
+; SI-NEXT: s_lshl_b32 s44, s59, 16
+; SI-NEXT: s_or_b32 s13, s13, s44
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s58, 16
-; SI-NEXT: s_or_b32 s10, s10, s45
+; SI-NEXT: s_lshl_b32 s44, s60, 16
+; SI-NEXT: s_or_b32 s10, s10, s44
; SI-NEXT: s_and_b32 s11, s11, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s37, 16
-; SI-NEXT: s_or_b32 s11, s11, s45
+; SI-NEXT: s_lshl_b32 s44, s47, 16
+; SI-NEXT: s_or_b32 s11, s11, s44
; SI-NEXT: s_and_b32 s8, s8, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s56, 16
-; SI-NEXT: s_or_b32 s8, s8, s45
+; SI-NEXT: s_lshl_b32 s44, s58, 16
+; SI-NEXT: s_or_b32 s8, s8, s44
; SI-NEXT: s_and_b32 s9, s9, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s36, 16
-; SI-NEXT: s_or_b32 s9, s9, s45
+; SI-NEXT: s_lshl_b32 s44, s45, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s77, 16
+; SI-NEXT: s_and_b32 s21, s21, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s75, 16
+; SI-NEXT: s_or_b32 s9, s9, s44
; SI-NEXT: s_and_b32 s6, s6, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s46, 16
-; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: s_or_b32 s6, s6, s45
+; SI-NEXT: s_lshl_b32 s44, s56, 16
+; SI-NEXT: s_or_b32 s17, s17, s77
+; SI-NEXT: s_lshl_b32 s77, s94, 16
+; SI-NEXT: s_and_b32 s18, s18, 0xffff
+; SI-NEXT: s_or_b32 s21, s21, s75
+; SI-NEXT: s_lshl_b32 s75, s90, 16
+; SI-NEXT: s_and_b32 s22, s22, 0xffff
+; SI-NEXT: s_and_b32 s25, s25, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s73, 16
+; SI-NEXT: s_or_b32 s6, s6, s44
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s35, 16
+; SI-NEXT: s_lshl_b32 s44, s31, 16
+; SI-NEXT: s_or_b32 s18, s18, s77
+; SI-NEXT: s_and_b32 s19, s19, 0xffff
+; SI-NEXT: s_lshl_b32 s77, s37, 16
+; SI-NEXT: s_or_b32 s22, s22, s75
+; SI-NEXT: s_and_b32 s23, s23, 0xffff
+; SI-NEXT: s_lshl_b32 s75, s36, 16
+; SI-NEXT: s_or_b32 s25, s25, s73
+; SI-NEXT: s_lshl_b32 s73, s78, 16
+; SI-NEXT: s_and_b32 s26, s26, 0xffff
+; SI-NEXT: s_or_b32 s7, s7, s44
+; SI-NEXT: s_and_b32 s4, s4, 0xffff
+; SI-NEXT: s_lshl_b32 s44, s46, 16
+; SI-NEXT: s_lshl_b32 s79, vcc_lo, 16
+; SI-NEXT: s_and_b32 s16, s16, 0xffff
+; SI-NEXT: s_or_b32 s19, s19, s77
+; SI-NEXT: s_lshl_b32 s77, s92, 16
+; SI-NEXT: s_and_b32 s20, s20, 0xffff
+; SI-NEXT: s_or_b32 s23, s23, s75
+; SI-NEXT: s_lshl_b32 s75, s88, 16
+; SI-NEXT: s_and_b32 s24, s24, 0xffff
+; SI-NEXT: s_or_b32 s26, s26, s73
+; SI-NEXT: s_and_b32 s27, s27, 0xffff
+; SI-NEXT: s_lshl_b32 s73, s35, 16
; SI-NEXT: s_or_b32 s4, s4, s44
; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: s_lshl_b32 s44, s34, 16
-; SI-NEXT: s_or_b32 s7, s7, s45
+; SI-NEXT: s_lshl_b32 s44, s30, 16
+; SI-NEXT: s_or_b32 s16, s16, s79
+; SI-NEXT: s_or_b32 s20, s20, s77
+; SI-NEXT: s_or_b32 s24, s24, s75
+; SI-NEXT: s_or_b32 s27, s27, s73
; SI-NEXT: s_or_b32 s5, s5, s44
-; SI-NEXT: v_readlane_b32 s30, v30, 15
+; SI-NEXT: v_readlane_b32 s30, v30, 4
; SI-NEXT: v_mov_b32_e32 v0, s16
; SI-NEXT: v_mov_b32_e32 v1, s17
; SI-NEXT: v_mov_b32_e32 v2, s18
@@ -34372,24 +34315,15 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v27, s7
; SI-NEXT: v_mov_b32_e32 v28, s4
; SI-NEXT: v_mov_b32_e32 v29, s5
-; SI-NEXT: v_readlane_b32 s31, v30, 16
-; SI-NEXT: v_readlane_b32 s64, v30, 14
-; SI-NEXT: v_readlane_b32 s55, v30, 13
-; SI-NEXT: v_readlane_b32 s54, v30, 12
-; SI-NEXT: v_readlane_b32 s53, v30, 11
-; SI-NEXT: v_readlane_b32 s52, v30, 10
-; SI-NEXT: v_readlane_b32 s51, v30, 9
-; SI-NEXT: v_readlane_b32 s50, v30, 8
-; SI-NEXT: v_readlane_b32 s49, v30, 7
-; SI-NEXT: v_readlane_b32 s48, v30, 6
-; SI-NEXT: v_readlane_b32 s39, v30, 5
-; SI-NEXT: v_readlane_b32 s38, v30, 4
+; SI-NEXT: v_readlane_b32 s31, v30, 5
; SI-NEXT: v_readlane_b32 s37, v30, 3
; SI-NEXT: v_readlane_b32 s36, v30, 2
; SI-NEXT: v_readlane_b32 s35, v30, 1
; SI-NEXT: v_readlane_b32 s34, v30, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -34399,13 +34333,12 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: v_writelane_b32 v30, s34, 0
; VI-NEXT: v_writelane_b32 v30, s35, 1
-; VI-NEXT: v_writelane_b32 v30, s36, 2
-; VI-NEXT: v_writelane_b32 v30, s37, 3
-; VI-NEXT: v_writelane_b32 v30, s30, 4
-; VI-NEXT: v_writelane_b32 v30, s31, 5
+; VI-NEXT: v_writelane_b32 v30, s30, 2
+; VI-NEXT: v_writelane_b32 v30, s31, 3
; VI-NEXT: v_readfirstlane_b32 s4, v16
; VI-NEXT: v_readfirstlane_b32 s6, v15
; VI-NEXT: v_readfirstlane_b32 s7, v14
@@ -34424,48 +34357,54 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; VI-NEXT: v_readfirstlane_b32 s44, v1
; VI-NEXT: s_cmp_lg_u32 s4, 0
; VI-NEXT: v_readfirstlane_b32 s45, v0
+; VI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane
; VI-NEXT: s_cbranch_scc0 .LBB45_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 0
+; VI-NEXT: s_lshr_b32 s4, s26, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 1
+; VI-NEXT: s_lshr_b32 s4, s25, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 2
+; VI-NEXT: s_lshr_b32 s4, s24, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 3
+; VI-NEXT: s_lshr_b32 s4, s23, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 4
+; VI-NEXT: s_lshr_b32 s4, s22, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: v_writelane_b32 v31, s4, 5
+; VI-NEXT: s_lshr_b32 s89, s21, 16
+; VI-NEXT: s_lshr_b32 s90, s20, 16
+; VI-NEXT: s_lshr_b32 s91, s19, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: s_mov_b64 s[4:5], 0
; VI-NEXT: s_branch .LBB45_3
; VI-NEXT: .LBB45_2:
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
; VI-NEXT: s_mov_b64 s[4:5], -1
-; VI-NEXT: ; implicit-def: $sgpr37
-; VI-NEXT: ; implicit-def: $sgpr36
-; VI-NEXT: ; implicit-def: $sgpr35
-; VI-NEXT: ; implicit-def: $sgpr34
-; VI-NEXT: ; implicit-def: $sgpr31
-; VI-NEXT: ; implicit-def: $sgpr30
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; implicit-def: $vcc_hi
; VI-NEXT: ; implicit-def: $vcc_lo
; VI-NEXT: ; implicit-def: $sgpr91
@@ -34489,11 +34428,30 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr57
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: ; implicit-def: $sgpr47
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; kill: killed $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr47
; VI-NEXT: .LBB45_3: ; %Flow
; VI-NEXT: s_and_b64 s[4:5], s[4:5], exec
; VI-NEXT: s_cselect_b32 s4, 1, 0
; VI-NEXT: s_cmp_lg_u32 s4, 1
+; VI-NEXT: s_mov_b32 s30, s91
+; VI-NEXT: s_mov_b32 s31, vcc_lo
+; VI-NEXT: s_mov_b32 vcc_lo, s89
+; VI-NEXT: s_mov_b32 s34, vcc_hi
+; VI-NEXT: s_mov_b32 vcc_hi, s90
+; VI-NEXT: s_mov_b32 s35, s46
+; VI-NEXT: v_readlane_b32 s4, v31, 0
+; VI-NEXT: v_readlane_b32 s5, v31, 1
+; VI-NEXT: v_readlane_b32 s46, v31, 2
+; VI-NEXT: v_readlane_b32 s89, v31, 3
+; VI-NEXT: v_readlane_b32 s90, v31, 4
+; VI-NEXT: v_readlane_b32 s91, v31, 5
; VI-NEXT: s_cbranch_scc1 .LBB45_5
; VI-NEXT: ; %bb.4: ; %cmp.true
; VI-NEXT: s_add_u32 s7, s7, 3
@@ -34526,140 +34484,140 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; VI-NEXT: s_addc_u32 s19, s19, 0
; VI-NEXT: s_add_u32 s16, s16, 3
; VI-NEXT: s_addc_u32 s17, s17, 0
-; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: s_lshr_b32 s47, s7, 16
-; VI-NEXT: s_lshr_b32 s56, s8, 16
-; VI-NEXT: s_lshr_b32 s57, s9, 16
-; VI-NEXT: s_lshr_b32 s58, s10, 16
-; VI-NEXT: s_lshr_b32 s59, s11, 16
-; VI-NEXT: s_lshr_b32 s60, s12, 16
-; VI-NEXT: s_lshr_b32 s61, s13, 16
-; VI-NEXT: s_lshr_b32 s62, s14, 16
-; VI-NEXT: s_lshr_b32 s63, s15, 16
-; VI-NEXT: s_lshr_b32 s72, s40, 16
-; VI-NEXT: s_lshr_b32 s73, s41, 16
-; VI-NEXT: s_lshr_b32 s74, s42, 16
-; VI-NEXT: s_lshr_b32 s75, s43, 16
-; VI-NEXT: s_lshr_b32 s76, s44, 16
-; VI-NEXT: s_lshr_b32 s77, s45, 16
-; VI-NEXT: s_lshr_b32 s78, s29, 16
-; VI-NEXT: s_lshr_b32 s79, s28, 16
-; VI-NEXT: s_lshr_b32 s88, s27, 16
-; VI-NEXT: s_lshr_b32 s89, s26, 16
-; VI-NEXT: s_lshr_b32 s90, s25, 16
-; VI-NEXT: s_lshr_b32 s91, s24, 16
-; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16
-; VI-NEXT: s_lshr_b32 vcc_hi, s22, 16
-; VI-NEXT: s_lshr_b32 s30, s21, 16
-; VI-NEXT: s_lshr_b32 s31, s20, 16
-; VI-NEXT: s_lshr_b32 s34, s19, 16
-; VI-NEXT: s_lshr_b32 s35, s18, 16
-; VI-NEXT: s_lshr_b32 s36, s17, 16
-; VI-NEXT: s_lshr_b32 s37, s16, 16
+; VI-NEXT: s_lshr_b32 s47, s6, 16
+; VI-NEXT: s_lshr_b32 s56, s7, 16
+; VI-NEXT: s_lshr_b32 s57, s8, 16
+; VI-NEXT: s_lshr_b32 s58, s9, 16
+; VI-NEXT: s_lshr_b32 s59, s10, 16
+; VI-NEXT: s_lshr_b32 s60, s11, 16
+; VI-NEXT: s_lshr_b32 s61, s12, 16
+; VI-NEXT: s_lshr_b32 s62, s13, 16
+; VI-NEXT: s_lshr_b32 s63, s14, 16
+; VI-NEXT: s_lshr_b32 s72, s15, 16
+; VI-NEXT: s_lshr_b32 s73, s40, 16
+; VI-NEXT: s_lshr_b32 s74, s41, 16
+; VI-NEXT: s_lshr_b32 s75, s42, 16
+; VI-NEXT: s_lshr_b32 s76, s43, 16
+; VI-NEXT: s_lshr_b32 s77, s44, 16
+; VI-NEXT: s_lshr_b32 s78, s45, 16
+; VI-NEXT: s_lshr_b32 s79, s29, 16
+; VI-NEXT: s_lshr_b32 s88, s28, 16
+; VI-NEXT: s_lshr_b32 s4, s27, 16
+; VI-NEXT: s_lshr_b32 s5, s26, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_lshr_b32 s89, s24, 16
+; VI-NEXT: s_lshr_b32 s90, s23, 16
+; VI-NEXT: s_lshr_b32 s91, s22, 16
+; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16
+; VI-NEXT: s_lshr_b32 vcc_hi, s20, 16
+; VI-NEXT: s_lshr_b32 s30, s19, 16
+; VI-NEXT: s_lshr_b32 s31, s18, 16
+; VI-NEXT: s_lshr_b32 s34, s17, 16
+; VI-NEXT: s_lshr_b32 s35, s16, 16
; VI-NEXT: .LBB45_5: ; %end
-; VI-NEXT: s_and_b32 s4, 0xffff, s16
-; VI-NEXT: s_lshl_b32 s5, s37, 16
-; VI-NEXT: s_or_b32 s4, s4, s5
-; VI-NEXT: s_and_b32 s5, 0xffff, s17
-; VI-NEXT: s_lshl_b32 s16, s36, 16
-; VI-NEXT: s_or_b32 s5, s5, s16
-; VI-NEXT: s_and_b32 s16, 0xffff, s18
-; VI-NEXT: s_lshl_b32 s17, s35, 16
-; VI-NEXT: s_or_b32 s16, s16, s17
-; VI-NEXT: s_and_b32 s17, 0xffff, s19
-; VI-NEXT: s_lshl_b32 s18, s34, 16
-; VI-NEXT: s_or_b32 s17, s17, s18
-; VI-NEXT: s_and_b32 s18, 0xffff, s20
-; VI-NEXT: s_lshl_b32 s19, s31, 16
-; VI-NEXT: s_or_b32 s18, s18, s19
-; VI-NEXT: s_and_b32 s19, 0xffff, s21
-; VI-NEXT: s_lshl_b32 s20, s30, 16
-; VI-NEXT: s_or_b32 s19, s19, s20
-; VI-NEXT: s_and_b32 s20, 0xffff, s22
-; VI-NEXT: s_lshl_b32 s21, vcc_hi, 16
-; VI-NEXT: s_or_b32 s20, s20, s21
-; VI-NEXT: s_and_b32 s21, 0xffff, s23
-; VI-NEXT: s_lshl_b32 s22, vcc_lo, 16
-; VI-NEXT: s_or_b32 s21, s21, s22
-; VI-NEXT: s_and_b32 s22, 0xffff, s24
-; VI-NEXT: s_lshl_b32 s23, s91, 16
-; VI-NEXT: s_or_b32 s22, s22, s23
-; VI-NEXT: s_and_b32 s23, 0xffff, s25
-; VI-NEXT: s_lshl_b32 s24, s90, 16
-; VI-NEXT: s_or_b32 s23, s23, s24
-; VI-NEXT: s_and_b32 s24, 0xffff, s26
-; VI-NEXT: s_lshl_b32 s25, s89, 16
-; VI-NEXT: s_or_b32 s24, s24, s25
-; VI-NEXT: s_and_b32 s25, 0xffff, s27
-; VI-NEXT: s_lshl_b32 s26, s88, 16
-; VI-NEXT: s_or_b32 s25, s25, s26
+; VI-NEXT: s_and_b32 s26, 0xffff, s26
+; VI-NEXT: s_lshl_b32 s5, s5, 16
+; VI-NEXT: s_or_b32 s5, s26, s5
+; VI-NEXT: s_and_b32 s26, 0xffff, s27
+; VI-NEXT: s_lshl_b32 s4, s4, 16
+; VI-NEXT: s_or_b32 s4, s26, s4
; VI-NEXT: s_and_b32 s26, 0xffff, s28
-; VI-NEXT: s_lshl_b32 s27, s79, 16
+; VI-NEXT: s_lshl_b32 s27, s88, 16
; VI-NEXT: s_or_b32 s26, s26, s27
; VI-NEXT: s_and_b32 s27, 0xffff, s29
-; VI-NEXT: s_lshl_b32 s28, s78, 16
+; VI-NEXT: s_lshl_b32 s28, s79, 16
; VI-NEXT: s_or_b32 s27, s27, s28
; VI-NEXT: s_and_b32 s28, 0xffff, s45
-; VI-NEXT: s_lshl_b32 s29, s77, 16
+; VI-NEXT: s_lshl_b32 s29, s78, 16
; VI-NEXT: s_or_b32 s28, s28, s29
; VI-NEXT: s_and_b32 s29, 0xffff, s44
-; VI-NEXT: s_lshl_b32 s44, s76, 16
+; VI-NEXT: s_lshl_b32 s44, s77, 16
; VI-NEXT: s_or_b32 s29, s29, s44
; VI-NEXT: s_and_b32 s43, 0xffff, s43
-; VI-NEXT: s_lshl_b32 s44, s75, 16
+; VI-NEXT: s_lshl_b32 s44, s76, 16
; VI-NEXT: s_or_b32 s43, s43, s44
; VI-NEXT: s_and_b32 s42, 0xffff, s42
-; VI-NEXT: s_lshl_b32 s44, s74, 16
+; VI-NEXT: s_lshl_b32 s44, s75, 16
; VI-NEXT: s_or_b32 s42, s42, s44
; VI-NEXT: s_and_b32 s41, 0xffff, s41
-; VI-NEXT: s_lshl_b32 s44, s73, 16
+; VI-NEXT: s_lshl_b32 s44, s74, 16
; VI-NEXT: s_or_b32 s41, s41, s44
; VI-NEXT: s_and_b32 s40, 0xffff, s40
-; VI-NEXT: s_lshl_b32 s44, s72, 16
+; VI-NEXT: s_lshl_b32 s44, s73, 16
; VI-NEXT: s_or_b32 s40, s40, s44
; VI-NEXT: s_and_b32 s15, 0xffff, s15
-; VI-NEXT: s_lshl_b32 s44, s63, 16
+; VI-NEXT: s_lshl_b32 s44, s72, 16
; VI-NEXT: s_or_b32 s15, s15, s44
; VI-NEXT: s_and_b32 s14, 0xffff, s14
-; VI-NEXT: s_lshl_b32 s44, s62, 16
+; VI-NEXT: s_lshl_b32 s44, s63, 16
; VI-NEXT: s_or_b32 s14, s14, s44
; VI-NEXT: s_and_b32 s13, 0xffff, s13
-; VI-NEXT: s_lshl_b32 s44, s61, 16
+; VI-NEXT: s_lshl_b32 s44, s62, 16
; VI-NEXT: s_or_b32 s13, s13, s44
; VI-NEXT: s_and_b32 s12, 0xffff, s12
-; VI-NEXT: s_lshl_b32 s44, s60, 16
+; VI-NEXT: s_lshl_b32 s44, s61, 16
; VI-NEXT: s_or_b32 s12, s12, s44
; VI-NEXT: s_and_b32 s11, 0xffff, s11
-; VI-NEXT: s_lshl_b32 s44, s59, 16
+; VI-NEXT: s_lshl_b32 s44, s60, 16
; VI-NEXT: s_or_b32 s11, s11, s44
; VI-NEXT: s_and_b32 s10, 0xffff, s10
-; VI-NEXT: s_lshl_b32 s44, s58, 16
+; VI-NEXT: s_lshl_b32 s44, s59, 16
; VI-NEXT: s_or_b32 s10, s10, s44
; VI-NEXT: s_and_b32 s9, 0xffff, s9
-; VI-NEXT: s_lshl_b32 s44, s57, 16
+; VI-NEXT: s_lshl_b32 s44, s58, 16
; VI-NEXT: s_or_b32 s9, s9, s44
; VI-NEXT: s_and_b32 s8, 0xffff, s8
-; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_lshl_b32 s44, s57, 16
; VI-NEXT: s_or_b32 s8, s8, s44
; VI-NEXT: s_and_b32 s7, 0xffff, s7
-; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_lshl_b32 s44, s56, 16
+; VI-NEXT: s_and_b32 s16, 0xffff, s16
+; VI-NEXT: s_lshl_b32 s35, s35, 16
+; VI-NEXT: s_and_b32 s17, 0xffff, s17
+; VI-NEXT: s_lshl_b32 s34, s34, 16
+; VI-NEXT: s_and_b32 s18, 0xffff, s18
+; VI-NEXT: s_lshl_b32 s31, s31, 16
+; VI-NEXT: s_and_b32 s19, 0xffff, s19
+; VI-NEXT: s_lshl_b32 s30, s30, 16
+; VI-NEXT: s_and_b32 s20, 0xffff, s20
+; VI-NEXT: s_lshl_b32 vcc_hi, vcc_hi, 16
+; VI-NEXT: s_and_b32 s21, 0xffff, s21
+; VI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16
+; VI-NEXT: s_and_b32 s22, 0xffff, s22
+; VI-NEXT: s_lshl_b32 s91, s91, 16
+; VI-NEXT: s_and_b32 s23, 0xffff, s23
+; VI-NEXT: s_lshl_b32 s90, s90, 16
+; VI-NEXT: s_and_b32 s24, 0xffff, s24
+; VI-NEXT: s_lshl_b32 s89, s89, 16
+; VI-NEXT: s_and_b32 s25, 0xffff, s25
+; VI-NEXT: s_lshl_b32 s46, s46, 16
; VI-NEXT: s_or_b32 s7, s7, s44
; VI-NEXT: s_and_b32 s6, 0xffff, s6
-; VI-NEXT: s_lshl_b32 s44, s46, 16
+; VI-NEXT: s_lshl_b32 s44, s47, 16
+; VI-NEXT: s_or_b32 s16, s16, s35
+; VI-NEXT: s_or_b32 s17, s17, s34
+; VI-NEXT: s_or_b32 s18, s18, s31
+; VI-NEXT: s_or_b32 s19, s19, s30
+; VI-NEXT: s_or_b32 s20, s20, vcc_hi
+; VI-NEXT: s_or_b32 s21, s21, vcc_lo
+; VI-NEXT: s_or_b32 s22, s22, s91
+; VI-NEXT: s_or_b32 s23, s23, s90
+; VI-NEXT: s_or_b32 s24, s24, s89
+; VI-NEXT: s_or_b32 s25, s25, s46
; VI-NEXT: s_or_b32 s6, s6, s44
-; VI-NEXT: v_readlane_b32 s30, v30, 4
-; VI-NEXT: v_mov_b32_e32 v0, s4
-; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v2, s16
-; VI-NEXT: v_mov_b32_e32 v3, s17
-; VI-NEXT: v_mov_b32_e32 v4, s18
-; VI-NEXT: v_mov_b32_e32 v5, s19
-; VI-NEXT: v_mov_b32_e32 v6, s20
-; VI-NEXT: v_mov_b32_e32 v7, s21
-; VI-NEXT: v_mov_b32_e32 v8, s22
-; VI-NEXT: v_mov_b32_e32 v9, s23
-; VI-NEXT: v_mov_b32_e32 v10, s24
-; VI-NEXT: v_mov_b32_e32 v11, s25
+; VI-NEXT: v_readlane_b32 s30, v30, 2
+; VI-NEXT: v_mov_b32_e32 v0, s16
+; VI-NEXT: v_mov_b32_e32 v1, s17
+; VI-NEXT: v_mov_b32_e32 v2, s18
+; VI-NEXT: v_mov_b32_e32 v3, s19
+; VI-NEXT: v_mov_b32_e32 v4, s20
+; VI-NEXT: v_mov_b32_e32 v5, s21
+; VI-NEXT: v_mov_b32_e32 v6, s22
+; VI-NEXT: v_mov_b32_e32 v7, s23
+; VI-NEXT: v_mov_b32_e32 v8, s24
+; VI-NEXT: v_mov_b32_e32 v9, s25
+; VI-NEXT: v_mov_b32_e32 v10, s5
+; VI-NEXT: v_mov_b32_e32 v11, s4
; VI-NEXT: v_mov_b32_e32 v12, s26
; VI-NEXT: v_mov_b32_e32 v13, s27
; VI-NEXT: v_mov_b32_e32 v14, s28
@@ -34678,13 +34636,12 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; VI-NEXT: v_mov_b32_e32 v27, s8
; VI-NEXT: v_mov_b32_e32 v28, s7
; VI-NEXT: v_mov_b32_e32 v29, s6
-; VI-NEXT: v_readlane_b32 s31, v30, 5
-; VI-NEXT: v_readlane_b32 s37, v30, 3
-; VI-NEXT: v_readlane_b32 s36, v30, 2
+; VI-NEXT: v_readlane_b32 s31, v30, 3
; VI-NEXT: v_readlane_b32 s35, v30, 1
; VI-NEXT: v_readlane_b32 s34, v30, 0
; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -34695,8 +34652,6 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
-; GFX9-NEXT: v_writelane_b32 v30, s30, 0
-; GFX9-NEXT: v_writelane_b32 v30, s31, 1
; GFX9-NEXT: v_readfirstlane_b32 s4, v16
; GFX9-NEXT: v_readfirstlane_b32 s6, v15
; GFX9-NEXT: v_readfirstlane_b32 s7, v14
@@ -34715,45 +34670,51 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: v_readfirstlane_b32 s44, v1
; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_readfirstlane_b32 s45, v0
+; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane
; GFX9-NEXT: s_cbranch_scc0 .LBB45_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 0
+; GFX9-NEXT: s_lshr_b32 s4, s18, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: v_writelane_b32 v30, s4, 1
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: s_mov_b64 s[4:5], 0
; GFX9-NEXT: s_branch .LBB45_3
; GFX9-NEXT: .LBB45_2:
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: s_mov_b64 s[4:5], -1
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; kill: killed $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr47
+; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; implicit-def: $vcc_hi
+; GFX9-NEXT: ; kill: killed $sgpr47
; GFX9-NEXT: ; implicit-def: $vcc_lo
; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr94
@@ -34780,11 +34741,12 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr56
; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: .LBB45_3: ; %Flow
; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], exec
; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_cmp_lg_u32 s4, 1
+; GFX9-NEXT: v_readlane_b32 s4, v30, 0
+; GFX9-NEXT: v_readlane_b32 s5, v30, 1
; GFX9-NEXT: s_cbranch_scc1 .LBB45_5
; GFX9-NEXT: ; %bb.4: ; %cmp.true
; GFX9-NEXT: s_add_u32 s7, s7, 3
@@ -34817,72 +34779,71 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: s_addc_u32 s19, s19, 0
; GFX9-NEXT: s_add_u32 s16, s16, 3
; GFX9-NEXT: s_addc_u32 s17, s17, 0
-; GFX9-NEXT: s_lshr_b32 s46, s6, 16
-; GFX9-NEXT: s_lshr_b32 s47, s7, 16
-; GFX9-NEXT: s_lshr_b32 s56, s8, 16
-; GFX9-NEXT: s_lshr_b32 s57, s9, 16
-; GFX9-NEXT: s_lshr_b32 s58, s10, 16
-; GFX9-NEXT: s_lshr_b32 s59, s11, 16
-; GFX9-NEXT: s_lshr_b32 s60, s12, 16
-; GFX9-NEXT: s_lshr_b32 s61, s13, 16
-; GFX9-NEXT: s_lshr_b32 s62, s14, 16
-; GFX9-NEXT: s_lshr_b32 s63, s15, 16
-; GFX9-NEXT: s_lshr_b32 s72, s40, 16
-; GFX9-NEXT: s_lshr_b32 s73, s41, 16
-; GFX9-NEXT: s_lshr_b32 s74, s42, 16
-; GFX9-NEXT: s_lshr_b32 s75, s43, 16
-; GFX9-NEXT: s_lshr_b32 s76, s44, 16
-; GFX9-NEXT: s_lshr_b32 s77, s45, 16
-; GFX9-NEXT: s_lshr_b32 s78, s29, 16
-; GFX9-NEXT: s_lshr_b32 s79, s28, 16
-; GFX9-NEXT: s_lshr_b32 s88, s27, 16
-; GFX9-NEXT: s_lshr_b32 s89, s26, 16
-; GFX9-NEXT: s_lshr_b32 s90, s25, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 16
-; GFX9-NEXT: s_lshr_b32 s92, s23, 16
-; GFX9-NEXT: s_lshr_b32 s93, s22, 16
-; GFX9-NEXT: s_lshr_b32 s94, s21, 16
-; GFX9-NEXT: s_lshr_b32 s95, s20, 16
-; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16
-; GFX9-NEXT: s_lshr_b32 vcc_hi, s18, 16
-; GFX9-NEXT: s_lshr_b32 s30, s17, 16
-; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s47, s6, 16
+; GFX9-NEXT: s_lshr_b32 s56, s7, 16
+; GFX9-NEXT: s_lshr_b32 s57, s8, 16
+; GFX9-NEXT: s_lshr_b32 s58, s9, 16
+; GFX9-NEXT: s_lshr_b32 s59, s10, 16
+; GFX9-NEXT: s_lshr_b32 s60, s11, 16
+; GFX9-NEXT: s_lshr_b32 s61, s12, 16
+; GFX9-NEXT: s_lshr_b32 s62, s13, 16
+; GFX9-NEXT: s_lshr_b32 s63, s14, 16
+; GFX9-NEXT: s_lshr_b32 s72, s15, 16
+; GFX9-NEXT: s_lshr_b32 s73, s40, 16
+; GFX9-NEXT: s_lshr_b32 s74, s41, 16
+; GFX9-NEXT: s_lshr_b32 s75, s42, 16
+; GFX9-NEXT: s_lshr_b32 s76, s43, 16
+; GFX9-NEXT: s_lshr_b32 s77, s44, 16
+; GFX9-NEXT: s_lshr_b32 s78, s45, 16
+; GFX9-NEXT: s_lshr_b32 s79, s29, 16
+; GFX9-NEXT: s_lshr_b32 s88, s28, 16
+; GFX9-NEXT: s_lshr_b32 s89, s27, 16
+; GFX9-NEXT: s_lshr_b32 s90, s26, 16
+; GFX9-NEXT: s_lshr_b32 s91, s25, 16
+; GFX9-NEXT: s_lshr_b32 s92, s24, 16
+; GFX9-NEXT: s_lshr_b32 s93, s23, 16
+; GFX9-NEXT: s_lshr_b32 s94, s22, 16
+; GFX9-NEXT: s_lshr_b32 s95, s21, 16
+; GFX9-NEXT: s_lshr_b32 vcc_lo, s20, 16
+; GFX9-NEXT: s_lshr_b32 s4, s19, 16
+; GFX9-NEXT: s_lshr_b32 s5, s18, 16
+; GFX9-NEXT: s_lshr_b32 vcc_hi, s17, 16
+; GFX9-NEXT: s_lshr_b32 s46, s16, 16
; GFX9-NEXT: .LBB45_5: ; %end
-; GFX9-NEXT: s_pack_ll_b32_b16 s4, s16, s31
-; GFX9-NEXT: s_pack_ll_b32_b16 s5, s17, s30
-; GFX9-NEXT: s_pack_ll_b32_b16 s16, s18, vcc_hi
-; GFX9-NEXT: s_pack_ll_b32_b16 s17, s19, vcc_lo
-; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, s95
-; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s94
-; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s93
-; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s92
-; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s91
-; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s90
-; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s89
-; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s88
-; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s79
-; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s78
-; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s77
-; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s76
-; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s75
-; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s74
-; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s73
-; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s72
-; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s63
-; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s62
-; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s61
-; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s60
-; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s59
-; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s58
-; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s57
-; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s56
-; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s47
-; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s46
-; GFX9-NEXT: v_readlane_b32 s30, v30, 0
-; GFX9-NEXT: v_mov_b32_e32 v0, s4
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: v_mov_b32_e32 v2, s16
-; GFX9-NEXT: v_mov_b32_e32 v3, s17
+; GFX9-NEXT: s_pack_ll_b32_b16 s16, s16, s46
+; GFX9-NEXT: s_pack_ll_b32_b16 s17, s17, vcc_hi
+; GFX9-NEXT: s_pack_ll_b32_b16 s5, s18, s5
+; GFX9-NEXT: s_pack_ll_b32_b16 s4, s19, s4
+; GFX9-NEXT: s_pack_ll_b32_b16 s18, s20, vcc_lo
+; GFX9-NEXT: s_pack_ll_b32_b16 s19, s21, s95
+; GFX9-NEXT: s_pack_ll_b32_b16 s20, s22, s94
+; GFX9-NEXT: s_pack_ll_b32_b16 s21, s23, s93
+; GFX9-NEXT: s_pack_ll_b32_b16 s22, s24, s92
+; GFX9-NEXT: s_pack_ll_b32_b16 s23, s25, s91
+; GFX9-NEXT: s_pack_ll_b32_b16 s24, s26, s90
+; GFX9-NEXT: s_pack_ll_b32_b16 s25, s27, s89
+; GFX9-NEXT: s_pack_ll_b32_b16 s26, s28, s88
+; GFX9-NEXT: s_pack_ll_b32_b16 s27, s29, s79
+; GFX9-NEXT: s_pack_ll_b32_b16 s28, s45, s78
+; GFX9-NEXT: s_pack_ll_b32_b16 s29, s44, s77
+; GFX9-NEXT: s_pack_ll_b32_b16 s43, s43, s76
+; GFX9-NEXT: s_pack_ll_b32_b16 s42, s42, s75
+; GFX9-NEXT: s_pack_ll_b32_b16 s41, s41, s74
+; GFX9-NEXT: s_pack_ll_b32_b16 s40, s40, s73
+; GFX9-NEXT: s_pack_ll_b32_b16 s15, s15, s72
+; GFX9-NEXT: s_pack_ll_b32_b16 s14, s14, s63
+; GFX9-NEXT: s_pack_ll_b32_b16 s13, s13, s62
+; GFX9-NEXT: s_pack_ll_b32_b16 s12, s12, s61
+; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s60
+; GFX9-NEXT: s_pack_ll_b32_b16 s10, s10, s59
+; GFX9-NEXT: s_pack_ll_b32_b16 s9, s9, s58
+; GFX9-NEXT: s_pack_ll_b32_b16 s8, s8, s57
+; GFX9-NEXT: s_pack_ll_b32_b16 s7, s7, s56
+; GFX9-NEXT: s_pack_ll_b32_b16 s6, s6, s47
+; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v1, s17
+; GFX9-NEXT: v_mov_b32_e32 v2, s5
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s18
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v6, s20
@@ -34909,7 +34870,6 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i
; GFX9-NEXT: v_mov_b32_e32 v27, s8
; GFX9-NEXT: v_mov_b32_e32 v28, s7
; GFX9-NEXT: v_mov_b32_e32 v29, s6
-; GFX9-NEXT: v_readlane_b32 s31, v30, 1
; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT: s_mov_b64 exec, s[4:5]
@@ -36802,13 +36762,13 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i
; SI-NEXT: v_readfirstlane_b32 s92, v4
; SI-NEXT: v_readfirstlane_b32 s94, v3
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2
-; SI-NEXT: v_readfirstlane_b32 s31, v1
-; SI-NEXT: v_readfirstlane_b32 s68, v0
+; SI-NEXT: v_readfirstlane_b32 s30, v1
+; SI-NEXT: v_readfirstlane_b32 s35, v0
; SI-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; SI-NEXT: s_lshr_b32 s34, s28, 16
-; SI-NEXT: s_lshr_b32 s69, s27, 16
-; SI-NEXT: s_lshr_b32 s71, s26, 16
-; SI-NEXT: s_lshr_b32 s80, s25, 16
+; SI-NEXT: s_lshr_b32 s31, s28, 16
+; SI-NEXT: s_lshr_b32 s68, s27, 16
+; SI-NEXT: s_lshr_b32 s70, s26, 16
+; SI-NEXT: s_lshr_b32 s71, s25, 16
; SI-NEXT: s_lshr_b32 s81, s24, 16
; SI-NEXT: s_lshr_b32 s82, s23, 16
; SI-NEXT: s_lshr_b32 s83, s22, 16
@@ -36818,7 +36778,7 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i
; SI-NEXT: s_lshr_b32 s87, s18, 16
; SI-NEXT: s_lshr_b32 s96, s17, 16
; SI-NEXT: s_lshr_b32 s97, s16, 16
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s80, s6, 16
; SI-NEXT: s_lshr_b32 s9, s8, 16
; SI-NEXT: s_lshr_b32 s11, s10, 16
; SI-NEXT: s_lshr_b32 s13, s12, 16
@@ -36831,64 +36791,65 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half>