[llvm] [SPIR-V] Print group operation of uniform group instructions as enum (PR #222540)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/222540

Opcodes typed `$groupOp` as i32imm, so the printer emitted 0 instead of "Reduce" and spirv-as rejected the output

>From 385274b478a4d16d93c72e08d211d6bb3ba534df Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Thu, 10 Sep 2026 10:08:07 +0200
Subject: [PATCH] [SPIR-V] Print group operation of uniform group instructions
 as enum

Opcodes typed `$groupOp` as i32imm, so the printer emitted 0 instead of "Reduce" and spirv-as rejected the output
---
 llvm/lib/Target/SPIRV/SPIRVInstrInfo.td       | 24 +++++---------
 .../uniform-group-instructions.ll             | 32 +++++++++----------
 2 files changed, 24 insertions(+), 32 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
index 04dea3ead579f..ad6bd994c5565 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+++ b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
@@ -935,22 +935,14 @@ def OpSubgroupImageMediaBlockWriteINTEL: Op<5581, (outs), (ins ID:$image, ID:$co
                   "OpSubgroupImageMediaBlockWriteINTEL $image $coordinate $width $height $data">;
 
 // - SPV_KHR_uniform_group_instructions
-def OpGroupIMulKHR: Op<6401, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupIMulKHR $type $scope $groupOp $value">;
-def OpGroupFMulKHR: Op<6402, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupFMulKHR $type $scope $groupOp $value">;
-def OpGroupBitwiseAndKHR: Op<6403, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupBitwiseAndKHR $type $scope $groupOp $value">;
-def OpGroupBitwiseOrKHR: Op<6404, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupBitwiseOrKHR $type $scope $groupOp $value">;
-def OpGroupBitwiseXorKHR: Op<6405, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupBitwiseXorKHR $type $scope $groupOp $value">;
-def OpGroupLogicalAndKHR: Op<6406, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupLogicalAndKHR $type $scope $groupOp $value">;
-def OpGroupLogicalOrKHR: Op<6407, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupLogicalOrKHR $type $scope $groupOp $value">;
-def OpGroupLogicalXorKHR: Op<6408, (outs ID:$res), (ins TYPE:$type, ID:$scope, i32imm:$groupOp, ID:$value),
-                  "$res = OpGroupLogicalXorKHR $type $scope $groupOp $value">;
+def OpGroupIMulKHR: OpGroup<"IMulKHR", 6401>;
+def OpGroupFMulKHR: OpGroup<"FMulKHR", 6402>;
+def OpGroupBitwiseAndKHR: OpGroup<"BitwiseAndKHR", 6403>;
+def OpGroupBitwiseOrKHR: OpGroup<"BitwiseOrKHR", 6404>;
+def OpGroupBitwiseXorKHR: OpGroup<"BitwiseXorKHR", 6405>;
+def OpGroupLogicalAndKHR: OpGroup<"LogicalAndKHR", 6406>;
+def OpGroupLogicalOrKHR: OpGroup<"LogicalOrKHR", 6407>;
+def OpGroupLogicalXorKHR: OpGroup<"LogicalXorKHR", 6408>;
 
 // Inline Assembly Instructions
 def OpAsmTargetINTEL: Op<5609, (outs ID:$res), (ins StringImm:$str, variable_ops), "$res = OpAsmTargetINTEL $str">;
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
index 852e778fcf8ee..a8dcf3e122283 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
@@ -15,23 +15,23 @@
 ; CHECK-DAG: %[[ConstFloat:[0-9]+]] = OpConstantNull %[[TyFloat]]
 ; CHECK-DAG: %[[ConstBool:[0-9]+]] = OpConstantFalse %[[TyBool]]
 
-; CHECK: OpGroupBitwiseAndKHR %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupBitwiseOrKHR  %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupBitwiseXorKHR %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupLogicalAndKHR %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupLogicalOrKHR  %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupLogicalXorKHR %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupIMulKHR       %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupFMulKHR       %[[TyFloat]] %[[Scope]] 0 %[[ConstFloat]]
+; CHECK: OpGroupBitwiseAndKHR %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupBitwiseOrKHR  %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupBitwiseXorKHR %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupLogicalAndKHR %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupLogicalOrKHR  %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupLogicalXorKHR %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupIMulKHR       %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupFMulKHR       %[[TyFloat]] %[[Scope]] Reduce %[[ConstFloat]]
 
-; CHECK: OpGroupBitwiseAndKHR %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupBitwiseOrKHR  %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupBitwiseXorKHR %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupLogicalAndKHR %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupLogicalOrKHR  %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupLogicalXorKHR %[[TyBool]]  %[[Scope]] 0 %[[ConstBool]]
-; CHECK: OpGroupIMulKHR       %[[TyInt]]   %[[Scope]] 0 %[[ConstInt]]
-; CHECK: OpGroupFMulKHR       %[[TyFloat]] %[[Scope]] 0 %[[ConstFloat]]
+; CHECK: OpGroupBitwiseAndKHR %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupBitwiseOrKHR  %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupBitwiseXorKHR %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupLogicalAndKHR %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupLogicalOrKHR  %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupLogicalXorKHR %[[TyBool]]  %[[Scope]] Reduce %[[ConstBool]]
+; CHECK: OpGroupIMulKHR       %[[TyInt]]   %[[Scope]] Reduce %[[ConstInt]]
+; CHECK: OpGroupFMulKHR       %[[TyFloat]] %[[Scope]] Reduce %[[ConstFloat]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64-unknown-unknown"