[llvm] [RISCV] Increase default vectorizer LMUL to 8 (PR #222213)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 9 20:56:52 PDT 2026
wangpc-pp wrote:
> > Can we assess the impact on register pressure by the statistics?
>
> Yes, we can. I've also seen that this increases register spilling in certain benchmarks. I'll investigate the root cause and work on a fix in the Loop Vectorizer.
I did some investigations in https://github.com/llvm/llvm-project/pull/216005, please feel free to take them if they are helpful.
https://github.com/llvm/llvm-project/pull/222213
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