[llvm] [WebAssembly] Fix the i32x4 case of simd splat shuffle cost (PR #191964)

Derek Schuff via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 9 12:50:17 PDT 2026


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@@ -406,6 +406,13 @@ InstructionCost WebAssemblyTTIImpl::getInterleavedMemoryOpCost(
 InstructionCost WebAssemblyTTIImpl::getVectorInstrCost(
     unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
     const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
+  // Treat insert at lane 0 into a poison vector as having zero cost. The
+  // insert + broadcast shuffle pair will be lowered to a single splat
+  // instruction, so the insert is free.
+  if (Opcode == Instruction::InsertElement && Index == 0 && Op0 &&
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dschuff wrote:

I think we want to guard this with `ST->hasSIMD128()` since there's otherwise no splat instruction.

https://github.com/llvm/llvm-project/pull/191964


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