[llvm] [AArch64] Add costs of Promoted types for compressstore (PR #220257)

[Benjamin Maxwell via llvm-commits]

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@@ -356,6 +356,20 @@ class AArch64TTIImpl final : public BasicTTIImplBase<AArch64TTIImpl> {
         DataType->getPrimitiveSizeInBits() < 128)
       return false;
 
+    if (!isa<VectorType>(DataType))
+      return isElementTypeLegalForScalableVector(DataType);
+
+    // For types where Promotion is possible to i32/i64 types and SME2p2/SVE2p2
+    // is not available, ensure the promoted scalar type is legal.
+    if (is_contained({8u, 16u}, DataType->getScalarSizeInBits()) &&
+        !(ST->hasSVE2p2() && ST->hasSME2p2()) &&
+        DataType->getPrimitiveSizeInBits().getKnownMinValue() < 128) {
+      auto LT = getTypeLegalizationCost(DataType);
+      if (!LT.first.isValid())
+        return false;
+      DataType = EVT(LT.second).getTypeForEVT(DataType->getContext());
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MacDue wrote:

This will work for i8 and i16 as those as e.g. nx2vi8 is promoted to nxv2i64 in type legalization. However, it won't work for f16/bf16, where nxv2f16 is a legal unpacked SVE type, but we can still promote it to use a nxv2i64 `compact`.

https://github.com/llvm/llvm-project/pull/220257