[llvm] [NVPTX] Add support for f32x2 mixed-precision add/sub (PR #221957)

[Durgadoss R via llvm-commits]

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@@ -2592,6 +2658,26 @@ foreach rnd = FPRoundingModes in {
              (f32 (fpextend type:$a)),
              (f32 (fneg f32:$b)), rnd_imm))]>,
         Requires<[SM100]>;
+
+  foreach t = [F16X2RT, BF16X2RT] in {
+    // combineFAddWithNeg has already folded the fneg into a sub node.
+    defvar SubOp = !cast<SDNode>("sub_" # rnd);
+
+    def INT_NVVM_MIXED_SUB_ # rnd # _f32x2_ # t.PtxType :
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durga4github wrote:

and a similar defvar for this name can also be reused below at line 2677.
+
I think defining the instr record once (with an empty pat) and using it in two explicit patterns is more readable (like what you have done in lines 2695 and 2698)


https://github.com/llvm/llvm-project/pull/221957