[llvm] [GlobalISel] Reserve IRTranslator value map and virtual register storage (NFC) (PR #222311)

[Cullen Rhodes via llvm-commits]

https://github.com/c-rhodes created https://github.com/llvm/llvm-project/pull/222311

Reserve storage based on the number of IR arguments and instructions to
avoid unnecessary container growth.

Improves CTMark geomean -0.08% on aarch64-O0-g, including 0.18% on sqlite.

https://llvm-compile-time-tracker.com/compare.php?from=cec101b15dd27fb1c51b6c87cb6e9d78517d2b09&to=996caa798ca6e27dfc657296db4b8ae6519701b0&stat=instructions:u

Assisted-by: codex

>From 996caa798ca6e27dfc657296db4b8ae6519701b0 Mon Sep 17 00:00:00 2001
From: Cullen Rhodes <cullen.rhodes at arm.com>
Date: Sun, 3 May 2026 23:48:29 +0000
Subject: [PATCH] [GlobalISel] Reserve IRTranslator value map and virtual
 register storage

Count arguments and instructions during IRTranslator's existing
basic-block walk, then use this estimate to reserve the value map and
MRI virtual-register storage. This reduces reallocations without adding
another traversal.

Improves CTMark geomean -0.08% on aarch64-O0-g, including 0.17% on
sqlite3.

Assisted-by: codex
---
 llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 6 ++++++
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp    | 9 +++++++++
 2 files changed, 15 insertions(+)

diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index a26462641de52..5e682029a57b8 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -823,6 +823,12 @@ class MachineRegisterInfo {
   /// getNumVirtRegs - Return the number of virtual registers created.
   unsigned getNumVirtRegs() const { return VRegInfo.size(); }
 
+  /// Reserve space for at least \p NumVirtRegs virtual registers.
+  void reserveVirtRegs(unsigned NumVirtRegs) {
+    VRegInfo.reserve(NumVirtRegs);
+    VRegToType.reserve(NumVirtRegs);
+  }
+
   /// clearVirtRegs - Remove all virtual registers (after physreg assignment).
   LLVM_ABI void clearVirtRegs();
 
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index d343633cb2105..78777f5b7a266 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -154,6 +154,8 @@ class IRTranslatorImpl {
 
     bool contains(const Value &V) const { return ValToVRegs.contains(&V); }
 
+    void reserveVRegs(unsigned NumValues) { ValToVRegs.reserve(NumValues); }
+
     void reset() {
       ValToVRegs.clear();
       TypeToOffsets.clear();
@@ -5072,10 +5074,14 @@ bool IRTranslatorImpl::runOnMachineFunction(
 
   bool IsVarArg = F.isVarArg();
   bool HasMustTailInVarArgFn = false;
+  // Use arguments and instructions to estimate the number of mapped values and
+  // virtual registers.
+  unsigned NumValues = F.arg_size();
 
   // Create all blocks, in IR order, to preserve the layout.
   FuncInfo.MBBMap.resize(F.getMaxBlockNumber());
   for (const BasicBlock &BB: F) {
+    NumValues += BB.size();
     auto *&MBB = FuncInfo.MBBMap[BB.getNumber()];
 
     MBB = MF->CreateMachineBasicBlock(&BB);
@@ -5094,6 +5100,9 @@ bool IRTranslatorImpl::runOnMachineFunction(
       HasMustTailInVarArgFn = checkForMustTailInVarArgFn(IsVarArg, BB);
   }
 
+  VMap.reserveVRegs(NumValues);
+  MRI->reserveVirtRegs(NumValues);
+
   MF->getFrameInfo().setHasMustTailInVarArgFunc(HasMustTailInVarArgFn);
 
   // Make our arguments/constants entry block fallthrough to the IR entry block.