[llvm] [SCEV] - Add positive-stride predicate for backedge-taken count. (PR #222261)

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 9 04:02:18 PDT 2026


================
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 5
+; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -S %s | FileCheck %s
+
+define void @variable_stride_predicated_vectorize(i32 %n, ptr noalias %a, ptr noalias %b, ptr noalias %c, i32 %inc) #0 {
+; CHECK-LABEL: define void @variable_stride_predicated_vectorize(
+; CHECK-SAME: i32 [[N:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]], i32 [[INC:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[CMP_NOT14:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT:    br i1 [[CMP_NOT14]], label %[[IF_END_PREHEADER:.*]], [[L20:label %.*]]
+; CHECK:       [[IF_END_PREHEADER]]:
+; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[INC]] to i64
+; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i32 [[N]] to i64
+; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP1]], i64 1)
+; CHECK-NEXT:    br label %[[VECTOR_SCEVCHECK:.*]]
+; CHECK:       [[VECTOR_SCEVCHECK]]:
+; CHECK-NEXT:    [[IDENT_CHECK2:%.*]] = icmp ne i32 [[INC]], 1
+; CHECK-NEXT:    br i1 [[IDENT_CHECK2]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK:       [[VECTOR_PH]]:
+; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
+; CHECK:       [[VECTOR_BODY]]:
+; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT:    [[AVL:%.*]] = phi i64 [ [[TMP2]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT:    [[TMP3:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
+; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x i8], ptr [[A]], i64 [[INDEX]]
+; CHECK-NEXT:    [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP4]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP3]]), !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x i8], ptr [[B]], i64 [[INDEX]]
+; CHECK-NEXT:    [[VP_OP_LOAD4:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP5]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP3]]), !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x i8], ptr [[C]], i64 [[INDEX]]
+; CHECK-NEXT:    [[VP_OP_LOAD5:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP3]]), !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP7:%.*]] = mul nsw <vscale x 4 x i32> [[VP_OP_LOAD5]], [[VP_OP_LOAD4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = add nsw <vscale x 4 x i32> [[TMP7]], [[VP_OP_LOAD]]
+; CHECK-NEXT:    call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP8]], ptr align 4 [[TMP4]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP3]]), !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP3]] to i64
+; CHECK-NEXT:    [[CURRENT_ITERATION_NEXT]] = add i64 [[TMP9]], [[INDEX]]
+; CHECK-NEXT:    [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]]
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
+; CHECK-NEXT:    br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK:       [[MIDDLE_BLOCK]]:
+; CHECK-NEXT:    br [[L20_LOOPEXIT:label %.*]]
+; CHECK:       [[SCALAR_PH]]:
+;
+entry:
+  %cmp.not14 = icmp sgt i32 %n, 0
+  br i1 %cmp.not14, label %if.end.preheader, label %L20
+
+if.end.preheader:                                 ; preds = %entry
+  %0 = sext i32 %inc to i64
+  %1 = zext nneg i32 %n to i64
+  br label %if.end
+
+if.end:                                           ; preds = %if.end.preheader, %if.end
+  %indvars.iv = phi i64 [ 0, %if.end.preheader ], [ %indvars.iv.next, %if.end ]
+  %arrayidx = getelementptr inbounds [4 x i8], ptr %a, i64 %indvars.iv
+  %2 = load i32, ptr %arrayidx, align 4, !tbaa !13
----------------
fhahn wrote:

same as for the SCEV test, please limit to minimum needed. Also take a look at other recently updated tests and try to be consistent with naming etc

https://github.com/llvm/llvm-project/pull/222261


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