[llvm] [AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (PR #219562)

Valery Pykhtin via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 9 03:16:41 PDT 2026

Previous message: [llvm] [AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (PR #219562)
Next message: [flang] [llvm] [Flang][OpenMP] Turn off NYI for nested record type maps in DoConcurrentConversion.cpp (PR #220099)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/vpykhtin edited https://github.com/llvm/llvm-project/pull/219562

Previous message: [llvm] [AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (PR #219562)
Next message: [flang] [llvm] [Flang][OpenMP] Turn off NYI for nested record type maps in DoConcurrentConversion.cpp (PR #220099)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list