[llvm] [MISched][RISCV] Add anti-dependency breaking to PostMachineScheduler (PR #221984)

[Pengcheng Wang via llvm-commits]

================
@@ -790,7 +1021,7 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
        I != E; --Count) {
     MachineInstr &MI = *--I;
 
-    if (MI.isDebugInstr())
+    if (MI.isDebugOrPseudoInstr())
----------------
wangpc-pp wrote:

https://github.com/llvm/llvm-project/pull/222271

https://github.com/llvm/llvm-project/pull/221984